amd/addrlib: move addrlib from amdgpu winsys to common code
[mesa.git] / src / amd / addrlib / r800 / ciaddrlib.h
1 /*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ***************************************************************************************************
29 * @file ciaddrlib.h
30 * @brief Contains the CIAddrLib class definition.
31 ***************************************************************************************************
32 */
33
34 #ifndef __CI_ADDR_LIB_H__
35 #define __CI_ADDR_LIB_H__
36
37 #include "addrlib.h"
38 #include "siaddrlib.h"
39
40 /**
41 ***************************************************************************************************
42 * @brief CI specific settings structure.
43 ***************************************************************************************************
44 */
45 struct CIChipSettings
46 {
47 struct
48 {
49 UINT_32 isSeaIsland : 1;
50 UINT_32 isBonaire : 1;
51 UINT_32 isKaveri : 1;
52 UINT_32 isSpectre : 1;
53 UINT_32 isSpooky : 1;
54 UINT_32 isKalindi : 1;
55 // Hawaii is GFXIP 7.2, similar with CI (Bonaire)
56 UINT_32 isHawaii : 1;
57
58 // VI
59 UINT_32 isVolcanicIslands : 1;
60 UINT_32 isIceland : 1;
61 UINT_32 isTonga : 1;
62 UINT_32 isFiji : 1;
63 UINT_32 isPolaris10 : 1;
64 UINT_32 isPolaris11 : 1;
65 // VI fusion (Carrizo)
66 UINT_32 isCarrizo : 1;
67 };
68 };
69
70 /**
71 ***************************************************************************************************
72 * @brief This class is the CI specific address library
73 * function set.
74 ***************************************************************************************************
75 */
76 class CIAddrLib : public SIAddrLib
77 {
78 public:
79 /// Creates CIAddrLib object
80 static AddrLib* CreateObj(const AddrClient* pClient)
81 {
82 return new(pClient) CIAddrLib(pClient);
83 }
84
85 private:
86 CIAddrLib(const AddrClient* pClient);
87 virtual ~CIAddrLib();
88
89 protected:
90
91 // Hwl interface - defined in AddrLib
92 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
93 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
94 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
95
96 virtual ADDR_E_RETURNCODE HwlComputeFmaskInfo(
97 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
98 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pOut);
99
100 virtual AddrChipFamily HwlConvertChipFamily(
101 UINT_32 uChipFamily, UINT_32 uChipRevision);
102
103 virtual BOOL_32 HwlInitGlobalParams(
104 const ADDR_CREATE_INPUT* pCreateIn);
105
106 virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
107 INT_32 index, INT_32 macroModeIndex, ADDR_TILEINFO* pInfo,
108 AddrTileMode* pMode = 0, AddrTileType* pType = 0) const;
109
110 virtual VOID HwlComputeTileDataWidthAndHeightLinear(
111 UINT_32* pMacroWidth, UINT_32* pMacroHeight,
112 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
113
114 virtual INT_32 HwlComputeMacroModeIndex(
115 INT_32 tileIndex, ADDR_SURFACE_FLAGS flags, UINT_32 bpp, UINT_32 numSamples,
116 ADDR_TILEINFO* pTileInfo, AddrTileMode* pTileMode = NULL, AddrTileType* pTileType = NULL
117 ) const;
118
119 // Sub-hwl interface - defined in EgBasedAddrLib
120 virtual VOID HwlSetupTileInfo(
121 AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags,
122 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples,
123 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo,
124 AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
125
126 virtual INT_32 HwlPostCheckTileIndex(
127 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type,
128 INT curIndex = TileIndexInvalid) const;
129
130 virtual VOID HwlFmaskPreThunkSurfInfo(
131 const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn,
132 const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut,
133 ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn,
134 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const;
135
136 virtual VOID HwlFmaskPostThunkSurfInfo(
137 const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut,
138 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const;
139
140 virtual AddrTileMode HwlDegradeThickTileMode(
141 AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const;
142
143 virtual BOOL_32 HwlOverrideTileMode(
144 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
145 AddrTileMode* pTileMode,
146 AddrTileType* pTileType) const;
147
148 virtual BOOL_32 HwlStereoCheckRightOffsetPadding() const;
149
150 virtual ADDR_E_RETURNCODE HwlComputeDccInfo(
151 const ADDR_COMPUTE_DCCINFO_INPUT* pIn,
152 ADDR_COMPUTE_DCCINFO_OUTPUT* pOut) const;
153
154 virtual ADDR_E_RETURNCODE HwlComputeCmaskAddrFromCoord(
155 const ADDR_COMPUTE_CMASK_ADDRFROMCOORD_INPUT* pIn,
156 ADDR_COMPUTE_CMASK_ADDRFROMCOORD_OUTPUT* pOut) const;
157
158 protected:
159 virtual VOID HwlPadDimensions(
160 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
161 UINT_32 numSamples, ADDR_TILEINFO* pTileInfo, UINT_32 padDims, UINT_32 mipLevel,
162 UINT_32* pPitch, UINT_32 pitchAlign, UINT_32* pHeight, UINT_32 heightAlign,
163 UINT_32* pSlices, UINT_32 sliceAlign) const;
164
165 private:
166 VOID ReadGbTileMode(
167 UINT_32 regValue, ADDR_TILECONFIG* pCfg) const;
168
169 VOID ReadGbMacroTileCfg(
170 UINT_32 regValue, ADDR_TILEINFO* pCfg) const;
171
172 UINT_32 GetPrtSwitchP4Threshold() const;
173
174 BOOL_32 InitTileSettingTable(
175 const UINT_32 *pSetting, UINT_32 noOfEntries);
176
177 BOOL_32 InitMacroTileCfgTable(
178 const UINT_32 *pSetting, UINT_32 noOfEntries);
179
180 UINT_64 HwlComputeMetadataNibbleAddress(
181 UINT_64 uncompressedDataByteAddress,
182 UINT_64 dataBaseByteAddress,
183 UINT_64 metadataBaseByteAddress,
184 UINT_32 metadataBitSize,
185 UINT_32 elementBitSize,
186 UINT_32 blockByteSize,
187 UINT_32 pipeInterleaveBytes,
188 UINT_32 numOfPipes,
189 UINT_32 numOfBanks,
190 UINT_32 numOfSamplesPerSplit) const;
191
192 static const UINT_32 MacroTileTableSize = 16;
193 ADDR_TILEINFO m_macroTileTable[MacroTileTableSize];
194 UINT_32 m_noOfMacroEntries;
195 BOOL_32 m_allowNonDispThickModes;
196
197 CIChipSettings m_settings;
198 };
199
200 #endif
201
202