ac/surface/gfx9: let addrlib choose the preferred swizzle kind
[mesa.git] / src / amd / addrlib / r800 / siaddrlib.h
1 /*
2 * Copyright © 2014 Advanced Micro Devices, Inc.
3 * All Rights Reserved.
4 *
5 * Permission is hereby granted, free of charge, to any person obtaining
6 * a copy of this software and associated documentation files (the
7 * "Software"), to deal in the Software without restriction, including
8 * without limitation the rights to use, copy, modify, merge, publish,
9 * distribute, sub license, and/or sell copies of the Software, and to
10 * permit persons to whom the Software is furnished to do so, subject to
11 * the following conditions:
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
15 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
17 * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
20 * USE OR OTHER DEALINGS IN THE SOFTWARE.
21 *
22 * The above copyright notice and this permission notice (including the
23 * next paragraph) shall be included in all copies or substantial portions
24 * of the Software.
25 */
26
27 /**
28 ****************************************************************************************************
29 * @file siaddrlib.h
30 * @brief Contains the R800Lib class definition.
31 ****************************************************************************************************
32 */
33
34 #ifndef __SI_ADDR_LIB_H__
35 #define __SI_ADDR_LIB_H__
36
37 #include "addrlib1.h"
38 #include "egbaddrlib.h"
39
40 namespace Addr
41 {
42 namespace V1
43 {
44
45 /**
46 ****************************************************************************************************
47 * @brief Describes the information in tile mode table
48 ****************************************************************************************************
49 */
50 struct TileConfig
51 {
52 AddrTileMode mode;
53 AddrTileType type;
54 ADDR_TILEINFO info;
55 };
56
57 /**
58 ****************************************************************************************************
59 * @brief SI specific settings structure.
60 ****************************************************************************************************
61 */
62 struct SiChipSettings
63 {
64 UINT_32 isSouthernIsland : 1;
65 UINT_32 isTahiti : 1;
66 UINT_32 isPitCairn : 1;
67 UINT_32 isCapeVerde : 1;
68 // Oland/Hainan are of GFXIP 6.0, similar with SI
69 UINT_32 isOland : 1;
70 UINT_32 isHainan : 1;
71
72 // CI
73 UINT_32 isSeaIsland : 1;
74 UINT_32 isBonaire : 1;
75 UINT_32 isKaveri : 1;
76 UINT_32 isSpectre : 1;
77 UINT_32 isSpooky : 1;
78 UINT_32 isKalindi : 1;
79 // Hawaii is GFXIP 7.2
80 UINT_32 isHawaii : 1;
81
82 // VI
83 UINT_32 isVolcanicIslands : 1;
84 UINT_32 isIceland : 1;
85 UINT_32 isTonga : 1;
86 UINT_32 isFiji : 1;
87 UINT_32 isPolaris10 : 1;
88 UINT_32 isPolaris11 : 1;
89 UINT_32 isPolaris12 : 1;
90 UINT_32 isVegaM : 1;
91 // VI fusion
92 UINT_32 isCarrizo : 1;
93 };
94
95 /**
96 ****************************************************************************************************
97 * @brief This class is the SI specific address library
98 * function set.
99 ****************************************************************************************************
100 */
101 class SiLib : public EgBasedLib
102 {
103 public:
104 /// Creates SiLib object
105 static Addr::Lib* CreateObj(const Client* pClient)
106 {
107 VOID* pMem = Object::ClientAlloc(sizeof(SiLib), pClient);
108 return (pMem != NULL) ? new (pMem) SiLib(pClient) : NULL;
109 }
110
111 protected:
112 SiLib(const Client* pClient);
113 virtual ~SiLib();
114
115 // Hwl interface - defined in AddrLib1
116 virtual ADDR_E_RETURNCODE HwlComputeSurfaceInfo(
117 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn,
118 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
119
120 virtual ADDR_E_RETURNCODE HwlConvertTileInfoToHW(
121 const ADDR_CONVERT_TILEINFOTOHW_INPUT* pIn,
122 ADDR_CONVERT_TILEINFOTOHW_OUTPUT* pOut) const;
123
124 virtual UINT_64 HwlComputeXmaskAddrFromCoord(
125 UINT_32 pitch, UINT_32 height, UINT_32 x, UINT_32 y, UINT_32 slice, UINT_32 numSlices,
126 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
127 ADDR_TILEINFO* pTileInfo, UINT_32* pBitPosition) const;
128
129 virtual VOID HwlComputeXmaskCoordFromAddr(
130 UINT_64 addr, UINT_32 bitPosition, UINT_32 pitch, UINT_32 height, UINT_32 numSlices,
131 UINT_32 factor, BOOL_32 isLinear, BOOL_32 isWidth8, BOOL_32 isHeight8,
132 ADDR_TILEINFO* pTileInfo, UINT_32* pX, UINT_32* pY, UINT_32* pSlice) const;
133
134 virtual ADDR_E_RETURNCODE HwlGetTileIndex(
135 const ADDR_GET_TILEINDEX_INPUT* pIn,
136 ADDR_GET_TILEINDEX_OUTPUT* pOut) const;
137
138 virtual BOOL_32 HwlComputeMipLevel(
139 ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn) const;
140
141 virtual ChipFamily HwlConvertChipFamily(
142 UINT_32 uChipFamily, UINT_32 uChipRevision);
143
144 virtual BOOL_32 HwlInitGlobalParams(
145 const ADDR_CREATE_INPUT* pCreateIn);
146
147 virtual ADDR_E_RETURNCODE HwlSetupTileCfg(
148 UINT_32 bpp, INT_32 index, INT_32 macroModeIndex,
149 ADDR_TILEINFO* pInfo, AddrTileMode* pMode = 0, AddrTileType* pType = 0) const;
150
151 virtual VOID HwlComputeTileDataWidthAndHeightLinear(
152 UINT_32* pMacroWidth, UINT_32* pMacroHeight,
153 UINT_32 bpp, ADDR_TILEINFO* pTileInfo) const;
154
155 virtual UINT_64 HwlComputeHtileBytes(
156 UINT_32 pitch, UINT_32 height, UINT_32 bpp,
157 BOOL_32 isLinear, UINT_32 numSlices, UINT_64* pSliceBytes, UINT_32 baseAlign) const;
158
159 virtual ADDR_E_RETURNCODE ComputeBankEquation(
160 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY,
161 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const;
162
163 virtual ADDR_E_RETURNCODE ComputePipeEquation(
164 UINT_32 log2BytesPP, UINT_32 threshX, UINT_32 threshY,
165 ADDR_TILEINFO* pTileInfo, ADDR_EQUATION* pEquation) const;
166
167 virtual UINT_32 ComputePipeFromCoord(
168 UINT_32 x, UINT_32 y, UINT_32 slice,
169 AddrTileMode tileMode, UINT_32 pipeSwizzle, BOOL_32 ignoreSE,
170 ADDR_TILEINFO* pTileInfo) const;
171
172 virtual UINT_32 HwlGetPipes(const ADDR_TILEINFO* pTileInfo) const;
173
174 /// Pre-handler of 3x pitch (96 bit) adjustment
175 virtual UINT_32 HwlPreHandleBaseLvl3xPitch(
176 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
177 /// Post-handler of 3x pitch adjustment
178 virtual UINT_32 HwlPostHandleBaseLvl3xPitch(
179 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, UINT_32 expPitch) const;
180
181 /// Dummy function to finalize the inheritance
182 virtual UINT_32 HwlComputeXmaskCoordYFrom8Pipe(
183 UINT_32 pipe, UINT_32 x) const;
184
185 // Sub-hwl interface - defined in EgBasedLib
186 virtual VOID HwlSetupTileInfo(
187 AddrTileMode tileMode, ADDR_SURFACE_FLAGS flags,
188 UINT_32 bpp, UINT_32 pitch, UINT_32 height, UINT_32 numSamples,
189 ADDR_TILEINFO* inputTileInfo, ADDR_TILEINFO* outputTileInfo,
190 AddrTileType inTileType, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
191
192 virtual UINT_32 HwlGetPitchAlignmentMicroTiled(
193 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples) const;
194
195 virtual UINT_64 HwlGetSizeAdjustmentMicroTiled(
196 UINT_32 thickness, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples,
197 UINT_32 baseAlign, UINT_32 pitchAlign,
198 UINT_32 *pPitch, UINT_32 *pHeight) const;
199
200 virtual VOID HwlCheckLastMacroTiledLvl(
201 const ADDR_COMPUTE_SURFACE_INFO_INPUT* pIn, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
202
203 virtual BOOL_32 HwlTileInfoEqual(
204 const ADDR_TILEINFO* pLeft, const ADDR_TILEINFO* pRight) const;
205
206 virtual AddrTileMode HwlDegradeThickTileMode(
207 AddrTileMode baseTileMode, UINT_32 numSlices, UINT_32* pBytesPerTile) const;
208
209 virtual VOID HwlOverrideTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
210
211 virtual VOID HwlOptimizeTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
212
213 virtual VOID HwlSelectTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
214
215 /// Overwrite tile setting to PRT
216 virtual VOID HwlSetPrtTileMode(ADDR_COMPUTE_SURFACE_INFO_INPUT* pInOut) const;
217
218 virtual BOOL_32 HwlSanityCheckMacroTiled(
219 ADDR_TILEINFO* pTileInfo) const
220 {
221 return TRUE;
222 }
223
224 virtual UINT_32 HwlGetPitchAlignmentLinear(UINT_32 bpp, ADDR_SURFACE_FLAGS flags) const;
225
226 virtual UINT_64 HwlGetSizeAdjustmentLinear(
227 AddrTileMode tileMode,
228 UINT_32 bpp, UINT_32 numSamples, UINT_32 baseAlign, UINT_32 pitchAlign,
229 UINT_32 *pPitch, UINT_32 *pHeight, UINT_32 *pHeightAlign) const;
230
231 virtual VOID HwlComputeSurfaceCoord2DFromBankPipe(
232 AddrTileMode tileMode, UINT_32* pX, UINT_32* pY, UINT_32 slice,
233 UINT_32 bank, UINT_32 pipe,
234 UINT_32 bankSwizzle, UINT_32 pipeSwizzle, UINT_32 tileSlices,
235 BOOL_32 ignoreSE,
236 ADDR_TILEINFO* pTileInfo) const;
237
238 virtual UINT_32 HwlPreAdjustBank(
239 UINT_32 tileX, UINT_32 bank, ADDR_TILEINFO* pTileInfo) const;
240
241 virtual INT_32 HwlPostCheckTileIndex(
242 const ADDR_TILEINFO* pInfo, AddrTileMode mode, AddrTileType type,
243 INT curIndex = TileIndexInvalid) const;
244
245 virtual VOID HwlFmaskPreThunkSurfInfo(
246 const ADDR_COMPUTE_FMASK_INFO_INPUT* pFmaskIn,
247 const ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut,
248 ADDR_COMPUTE_SURFACE_INFO_INPUT* pSurfIn,
249 ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut) const;
250
251 virtual VOID HwlFmaskPostThunkSurfInfo(
252 const ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pSurfOut,
253 ADDR_COMPUTE_FMASK_INFO_OUTPUT* pFmaskOut) const;
254
255 virtual UINT_32 HwlComputeFmaskBits(
256 const ADDR_COMPUTE_FMASK_INFO_INPUT* pIn,
257 UINT_32* pNumSamples) const;
258
259 virtual BOOL_32 HwlReduceBankWidthHeight(
260 UINT_32 tileSize, UINT_32 bpp, ADDR_SURFACE_FLAGS flags, UINT_32 numSamples,
261 UINT_32 bankHeightAlign, UINT_32 pipes,
262 ADDR_TILEINFO* pTileInfo) const
263 {
264 return TRUE;
265 }
266
267 virtual UINT_32 HwlComputeMaxBaseAlignments() const;
268
269 virtual UINT_32 HwlComputeMaxMetaBaseAlignments() const;
270
271 virtual VOID HwlComputeSurfaceAlignmentsMacroTiled(
272 AddrTileMode tileMode, UINT_32 bpp, ADDR_SURFACE_FLAGS flags,
273 UINT_32 mipLevel, UINT_32 numSamples, ADDR_COMPUTE_SURFACE_INFO_OUTPUT* pOut) const;
274
275 // Get equation table pointer and number of equations
276 virtual UINT_32 HwlGetEquationTableInfo(const ADDR_EQUATION** ppEquationTable) const
277 {
278 *ppEquationTable = m_equationTable;
279
280 return m_numEquations;
281 }
282
283 // Check if it is supported for given bpp and tile config to generate an equation
284 BOOL_32 IsEquationSupported(
285 UINT_32 bpp, TileConfig tileConfig, INT_32 tileIndex, UINT_32 elementBytesLog2) const;
286
287 // Protected non-virtual functions
288 VOID ComputeTileCoordFromPipeAndElemIdx(
289 UINT_32 elemIdx, UINT_32 pipe, AddrPipeCfg pipeCfg, UINT_32 pitchInMacroTile,
290 UINT_32 x, UINT_32 y, UINT_32* pX, UINT_32* pY) const;
291
292 UINT_32 TileCoordToMaskElementIndex(
293 UINT_32 tx, UINT_32 ty, AddrPipeCfg pipeConfig,
294 UINT_32 *macroShift, UINT_32 *elemIdxBits) const;
295
296 BOOL_32 DecodeGbRegs(
297 const ADDR_REGISTER_VALUE* pRegValue);
298
299 const TileConfig* GetTileSetting(
300 UINT_32 index) const;
301
302 // Initialize equation table
303 VOID InitEquationTable();
304
305 UINT_32 GetPipePerSurf(AddrPipeCfg pipeConfig) const;
306
307 static const UINT_32 TileTableSize = 32;
308 TileConfig m_tileTable[TileTableSize];
309 UINT_32 m_noOfEntries;
310
311 // Max number of bpp (8bpp/16bpp/32bpp/64bpp/128bpp)
312 static const UINT_32 MaxNumElementBytes = 5;
313
314 static const BOOL_32 m_EquationSupport[TileTableSize][MaxNumElementBytes];
315
316 // Prt tile mode index mask
317 static const UINT_32 SiPrtTileIndexMask = ((1 << 3) | (1 << 5) | (1 << 6) | (1 << 7) |
318 (1 << 21) | (1 << 22) | (1 << 23) | (1 << 24) |
319 (1 << 25) | (1 << 30));
320
321 // More than half slots in tile mode table can't support equation
322 static const UINT_32 EquationTableSize = (MaxNumElementBytes * TileTableSize) / 2;
323 // Equation table
324 ADDR_EQUATION m_equationTable[EquationTableSize];
325 UINT_32 m_numMacroBits[EquationTableSize];
326 UINT_32 m_blockWidth[EquationTableSize];
327 UINT_32 m_blockHeight[EquationTableSize];
328 UINT_32 m_blockSlices[EquationTableSize];
329 // Number of equation entries in the table
330 UINT_32 m_numEquations;
331 // Equation lookup table according to bpp and tile index
332 UINT_32 m_equationLookupTable[MaxNumElementBytes][TileTableSize];
333
334 UINT_32 m_uncompressDepthEqIndex;
335
336 SiChipSettings m_settings;
337
338 private:
339
340 VOID ReadGbTileMode(UINT_32 regValue, TileConfig* pCfg) const;
341 BOOL_32 InitTileSettingTable(const UINT_32 *pSetting, UINT_32 noOfEntries);
342 };
343
344 } // V1
345 } // Addr
346
347 #endif
348