src/amd/addrlib/src/chip/r800/si_gb_reg.h

   1 /*
   2  * Copyright © 2007-2019 Advanced Micro Devices, Inc.
   3  * All Rights Reserved.
   4  *
   5  * Permission is hereby granted, free of charge, to any person obtaining
   6  * a copy of this software and associated documentation files (the
   7  * "Software"), to deal in the Software without restriction, including
   8  * without limitation the rights to use, copy, modify, merge, publish,
   9  * distribute, sub license, and/or sell copies of the Software, and to
  10  * permit persons to whom the Software is furnished to do so, subject to
  11  * the following conditions:
  12  *
  13  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  14  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
  15  * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  16  * NON-INFRINGEMENT. IN NO EVENT SHALL THE COPYRIGHT HOLDERS, AUTHORS
  17  * AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  18  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  20  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  * The above copyright notice and this permission notice (including the
  23  * next paragraph) shall be included in all copies or substantial portions
  24  * of the Software.
  25  */
  26
  27 #if !defined (__SI_GB_REG_H__)
  28 #define __SI_GB_REG_H__
  29
  30 /*****************************************************************************************************************
  31  *
  32  *  si_gb_reg.h
  33  *
  34  *  Register Spec Release:  Chip Spec 0.28
  35  *
  36  *****************************************************************************************************************/
  37
  38 //
  39 // Make sure the necessary endian defines are there.
  40 //
  41 #include "util/u_endian.h"
  42
  43 #if defined(PIPE_ARCH_LITTLE_ENDIAN)
  44 #define LITTLEENDIAN_CPU
  45 #elif defined(PIPE_ARCH_BIG_ENDIAN)
  46 #define BIGENDIAN_CPU
  47 #endif
  48
  49 /*
  50  * GB_ADDR_CONFIG struct
  51  */
  52
  53 #if     defined(LITTLEENDIAN_CPU)
  54
  55      typedef struct _GB_ADDR_CONFIG_T {
  56           unsigned int num_pipes                      : 3;
  57           unsigned int                                : 1;
  58           unsigned int pipe_interleave_size           : 3;
  59           unsigned int                                : 1;
  60           unsigned int bank_interleave_size           : 3;
  61           unsigned int                                : 1;
  62           unsigned int num_shader_engines             : 2;
  63           unsigned int                                : 2;
  64           unsigned int shader_engine_tile_size        : 3;
  65           unsigned int                                : 1;
  66           unsigned int num_gpus                       : 3;
  67           unsigned int                                : 1;
  68           unsigned int multi_gpu_tile_size            : 2;
  69           unsigned int                                : 2;
  70           unsigned int row_size                       : 2;
  71           unsigned int num_lower_pipes                : 1;
  72           unsigned int                                : 1;
  73      } GB_ADDR_CONFIG_T;
  74
  75 #elif       defined(BIGENDIAN_CPU)
  76
  77      typedef struct _GB_ADDR_CONFIG_T {
  78           unsigned int                                : 1;
  79           unsigned int num_lower_pipes                : 1;
  80           unsigned int row_size                       : 2;
  81           unsigned int                                : 2;
  82           unsigned int multi_gpu_tile_size            : 2;
  83           unsigned int                                : 1;
  84           unsigned int num_gpus                       : 3;
  85           unsigned int                                : 1;
  86           unsigned int shader_engine_tile_size        : 3;
  87           unsigned int                                : 2;
  88           unsigned int num_shader_engines             : 2;
  89           unsigned int                                : 1;
  90           unsigned int bank_interleave_size           : 3;
  91           unsigned int                                : 1;
  92           unsigned int pipe_interleave_size           : 3;
  93           unsigned int                                : 1;
  94           unsigned int num_pipes                      : 3;
  95      } GB_ADDR_CONFIG_T;
  96
  97 #endif
  98
  99 typedef union {
 100      unsigned int val : 32;
 101      GB_ADDR_CONFIG_T f;
 102 } GB_ADDR_CONFIG;
 103
 104 #if       defined(LITTLEENDIAN_CPU)
 105
 106      typedef struct _GB_TILE_MODE_T {
 107           unsigned int micro_tile_mode                : 2;
 108           unsigned int array_mode                     : 4;
 109           unsigned int pipe_config                    : 5;
 110           unsigned int tile_split                     : 3;
 111           unsigned int bank_width                     : 2;
 112           unsigned int bank_height                    : 2;
 113           unsigned int macro_tile_aspect              : 2;
 114           unsigned int num_banks                      : 2;
 115           unsigned int micro_tile_mode_new            : 3;
 116           unsigned int sample_split                   : 2;
 117           unsigned int                                : 5;
 118      } GB_TILE_MODE_T;
 119
 120      typedef struct _GB_MACROTILE_MODE_T {
 121           unsigned int bank_width                     : 2;
 122           unsigned int bank_height                    : 2;
 123           unsigned int macro_tile_aspect              : 2;
 124           unsigned int num_banks                      : 2;
 125           unsigned int                                : 24;
 126      } GB_MACROTILE_MODE_T;
 127
 128 #elif          defined(BIGENDIAN_CPU)
 129
 130      typedef struct _GB_TILE_MODE_T {
 131           unsigned int                                : 5;
 132           unsigned int sample_split                   : 2;
 133           unsigned int micro_tile_mode_new            : 3;
 134           unsigned int num_banks                      : 2;
 135           unsigned int macro_tile_aspect              : 2;
 136           unsigned int bank_height                    : 2;
 137           unsigned int bank_width                     : 2;
 138           unsigned int tile_split                     : 3;
 139           unsigned int pipe_config                    : 5;
 140           unsigned int array_mode                     : 4;
 141           unsigned int micro_tile_mode                : 2;
 142      } GB_TILE_MODE_T;
 143
 144      typedef struct _GB_MACROTILE_MODE_T {
 145           unsigned int                                : 24;
 146           unsigned int num_banks                      : 2;
 147           unsigned int macro_tile_aspect              : 2;
 148           unsigned int bank_height                    : 2;
 149           unsigned int bank_width                     : 2;
 150      } GB_MACROTILE_MODE_T;
 151
 152 #endif
 153
 154 typedef union {
 155      unsigned int val : 32;
 156      GB_TILE_MODE_T f;
 157 } GB_TILE_MODE;
 158
 159 typedef union {
 160      unsigned int val : 32;
 161      GB_MACROTILE_MODE_T f;
 162 } GB_MACROTILE_MODE;
 163
 164 #endif
 165