src/amd/common/ac_llvm_util.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  13  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  14  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  15  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  16  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  17  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  18  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  19  *
  20  * The above copyright notice and this permission notice (including the
  21  * next paragraph) shall be included in all copies or substantial portions
  22  * of the Software.
  23  *
  24  */
  25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
  26 #include "ac_llvm_util.h"
  27 #include "ac_llvm_build.h"
  28 #include "util/bitscan.h"
  29 #include <llvm-c/Core.h>
  30 #include <llvm-c/Support.h>
  31 #include <llvm-c/Transforms/IPO.h>
  32 #include <llvm-c/Transforms/Scalar.h>
  33 #include <llvm-c/Transforms/Utils.h>
  34 #include "c11/threads.h"
  35 #include "gallivm/lp_bld_misc.h"
  36 #include "util/u_math.h"
  37
  38 #include <assert.h>
  39 #include <stdio.h>
  40 #include <string.h>
  41
  42 static void ac_init_llvm_target()
  43 {
  44         LLVMInitializeAMDGPUTargetInfo();
  45         LLVMInitializeAMDGPUTarget();
  46         LLVMInitializeAMDGPUTargetMC();
  47         LLVMInitializeAMDGPUAsmPrinter();
  48
  49         /* For inline assembly. */
  50         LLVMInitializeAMDGPUAsmParser();
  51
  52         /* Workaround for bug in llvm 4.0 that causes image intrinsics
  53          * to disappear.
  54          * https://reviews.llvm.org/D26348
  55          *
  56          * "mesa" is the prefix for error messages.
  57          *
  58          * -global-isel-abort=2 is a no-op unless global isel has been enabled.
  59          * This option tells the backend to fall-back to SelectionDAG and print
  60          * a diagnostic message if global isel fails.
  61          */
  62         const char *argv[] = {
  63                 "mesa",
  64                 "-simplifycfg-sink-common=false",
  65                 "-global-isel-abort=2",
  66 #if LLVM_VERSION_MAJOR >= 10
  67                 /* Atomic optimizations require LLVM 10.0 for gfx10 support. */
  68                 "-amdgpu-atomic-optimizations=true",
  69 #endif
  70         };
  71         LLVMParseCommandLineOptions(ARRAY_SIZE(argv), argv, NULL);
  72 }
  73
  74 static once_flag ac_init_llvm_target_once_flag = ONCE_FLAG_INIT;
  75
  76 void ac_init_llvm_once(void)
  77 {
  78         call_once(&ac_init_llvm_target_once_flag, ac_init_llvm_target);
  79 }
  80
  81 static LLVMTargetRef ac_get_llvm_target(const char *triple)
  82 {
  83         LLVMTargetRef target = NULL;
  84         char *err_message = NULL;
  85
  86         if (LLVMGetTargetFromTriple(triple, &target, &err_message)) {
  87                 fprintf(stderr, "Cannot find target for triple %s ", triple);
  88                 if (err_message) {
  89                         fprintf(stderr, "%s\n", err_message);
  90                 }
  91                 LLVMDisposeMessage(err_message);
  92                 return NULL;
  93         }
  94         return target;
  95 }
  96
  97 const char *ac_get_llvm_processor_name(enum radeon_family family)
  98 {
  99         switch (family) {
 100         case CHIP_TAHITI:
 101                 return "tahiti";
 102         case CHIP_PITCAIRN:
 103                 return "pitcairn";
 104         case CHIP_VERDE:
 105                 return "verde";
 106         case CHIP_OLAND:
 107                 return "oland";
 108         case CHIP_HAINAN:
 109                 return "hainan";
 110         case CHIP_BONAIRE:
 111                 return "bonaire";
 112         case CHIP_KABINI:
 113                 return "kabini";
 114         case CHIP_KAVERI:
 115                 return "kaveri";
 116         case CHIP_HAWAII:
 117                 return "hawaii";
 118         case CHIP_TONGA:
 119                 return "tonga";
 120         case CHIP_ICELAND:
 121                 return "iceland";
 122         case CHIP_CARRIZO:
 123                 return "carrizo";
 124         case CHIP_FIJI:
 125                 return "fiji";
 126         case CHIP_STONEY:
 127                 return "stoney";
 128         case CHIP_POLARIS10:
 129                 return "polaris10";
 130         case CHIP_POLARIS11:
 131         case CHIP_POLARIS12:
 132         case CHIP_VEGAM:
 133                 return "polaris11";
 134         case CHIP_VEGA10:
 135                 return "gfx900";
 136         case CHIP_RAVEN:
 137                 return "gfx902";
 138         case CHIP_VEGA12:
 139                 return "gfx904";
 140         case CHIP_VEGA20:
 141                 return "gfx906";
 142         case CHIP_RAVEN2:
 143         case CHIP_RENOIR:
 144                 return "gfx909";
 145         case CHIP_ARCTURUS:
 146                 return "gfx908";
 147         case CHIP_NAVI10:
 148                 return "gfx1010";
 149         case CHIP_NAVI12:
 150                 return "gfx1011";
 151         case CHIP_NAVI14:
 152                 return "gfx1012";
 153         default:
 154                 return "";
 155         }
 156 }
 157
 158 static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family,
 159                                                      enum ac_target_machine_options tm_options,
 160                                                      LLVMCodeGenOptLevel level,
 161                                                      const char **out_triple)
 162 {
 163         assert(family >= CHIP_TAHITI);
 164         char features[256];
 165         const char *triple = (tm_options & AC_TM_SUPPORTS_SPILL) ? "amdgcn-mesa-mesa3d" : "amdgcn--";
 166         LLVMTargetRef target = ac_get_llvm_target(triple);
 167
 168         snprintf(features, sizeof(features),
 169                  "+DumpCode,-fp32-denormals,+fp64-denormals%s%s%s%s%s%s",
 170                  family >= CHIP_NAVI10 && !(tm_options & AC_TM_WAVE32) ?
 171                          ",+wavefrontsize64,-wavefrontsize32" : "",
 172                  tm_options & AC_TM_SISCHED ? ",+si-scheduler" : "",
 173                  tm_options & AC_TM_FORCE_ENABLE_XNACK ? ",+xnack" : "",
 174                  tm_options & AC_TM_FORCE_DISABLE_XNACK ? ",-xnack" : "",
 175                  tm_options & AC_TM_PROMOTE_ALLOCA_TO_SCRATCH ? ",-promote-alloca" : "",
 176                  tm_options & AC_TM_NO_LOAD_STORE_OPT ? ",-load-store-opt" : "");
 177
 178         LLVMTargetMachineRef tm = LLVMCreateTargetMachine(
 179                                      target,
 180                                      triple,
 181                                      ac_get_llvm_processor_name(family),
 182                                      features,
 183                                      level,
 184                                      LLVMRelocDefault,
 185                                      LLVMCodeModelDefault);
 186
 187         if (out_triple)
 188                 *out_triple = triple;
 189         if (tm_options & AC_TM_ENABLE_GLOBAL_ISEL)
 190                 ac_enable_global_isel(tm);
 191         return tm;
 192 }
 193
 194 static LLVMPassManagerRef ac_create_passmgr(LLVMTargetLibraryInfoRef target_library_info,
 195                                             bool check_ir)
 196 {
 197         LLVMPassManagerRef passmgr = LLVMCreatePassManager();
 198         if (!passmgr)
 199                 return NULL;
 200
 201         if (target_library_info)
 202                 LLVMAddTargetLibraryInfo(target_library_info,
 203                                          passmgr);
 204
 205         if (check_ir)
 206                 LLVMAddVerifierPass(passmgr);
 207         LLVMAddAlwaysInlinerPass(passmgr);
 208         /* Normally, the pass manager runs all passes on one function before
 209          * moving onto another. Adding a barrier no-op pass forces the pass
 210          * manager to run the inliner on all functions first, which makes sure
 211          * that the following passes are only run on the remaining non-inline
 212          * function, so it removes useless work done on dead inline functions.
 213          */
 214         ac_llvm_add_barrier_noop_pass(passmgr);
 215         /* This pass should eliminate all the load and store instructions. */
 216         LLVMAddPromoteMemoryToRegisterPass(passmgr);
 217         LLVMAddScalarReplAggregatesPass(passmgr);
 218         LLVMAddLICMPass(passmgr);
 219         LLVMAddAggressiveDCEPass(passmgr);
 220         LLVMAddCFGSimplificationPass(passmgr);
 221         /* This is recommended by the instruction combining pass. */
 222         LLVMAddEarlyCSEMemSSAPass(passmgr);
 223         LLVMAddInstructionCombiningPass(passmgr);
 224         return passmgr;
 225 }
 226
 227 static const char *attr_to_str(enum ac_func_attr attr)
 228 {
 229    switch (attr) {
 230    case AC_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
 231    case AC_FUNC_ATTR_INREG: return "inreg";
 232    case AC_FUNC_ATTR_NOALIAS: return "noalias";
 233    case AC_FUNC_ATTR_NOUNWIND: return "nounwind";
 234    case AC_FUNC_ATTR_READNONE: return "readnone";
 235    case AC_FUNC_ATTR_READONLY: return "readonly";
 236    case AC_FUNC_ATTR_WRITEONLY: return "writeonly";
 237    case AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY: return "inaccessiblememonly";
 238    case AC_FUNC_ATTR_CONVERGENT: return "convergent";
 239    default:
 240            fprintf(stderr, "Unhandled function attribute: %x\n", attr);
 241            return 0;
 242    }
 243 }
 244
 245 void
 246 ac_add_function_attr(LLVMContextRef ctx, LLVMValueRef function,
 247                      int attr_idx, enum ac_func_attr attr)
 248 {
 249    const char *attr_name = attr_to_str(attr);
 250    unsigned kind_id = LLVMGetEnumAttributeKindForName(attr_name,
 251                                                       strlen(attr_name));
 252    LLVMAttributeRef llvm_attr = LLVMCreateEnumAttribute(ctx, kind_id, 0);
 253
 254    if (LLVMIsAFunction(function))
 255       LLVMAddAttributeAtIndex(function, attr_idx, llvm_attr);
 256    else
 257       LLVMAddCallSiteAttribute(function, attr_idx, llvm_attr);
 258 }
 259
 260 void ac_add_func_attributes(LLVMContextRef ctx, LLVMValueRef function,
 261                             unsigned attrib_mask)
 262 {
 263         attrib_mask |= AC_FUNC_ATTR_NOUNWIND;
 264         attrib_mask &= ~AC_FUNC_ATTR_LEGACY;
 265
 266         while (attrib_mask) {
 267                 enum ac_func_attr attr = 1u << u_bit_scan(&attrib_mask);
 268                 ac_add_function_attr(ctx, function, -1, attr);
 269         }
 270 }
 271
 272 void
 273 ac_dump_module(LLVMModuleRef module)
 274 {
 275         char *str = LLVMPrintModuleToString(module);
 276         fprintf(stderr, "%s", str);
 277         LLVMDisposeMessage(str);
 278 }
 279
 280 void
 281 ac_llvm_add_target_dep_function_attr(LLVMValueRef F,
 282                                      const char *name, unsigned value)
 283 {
 284         char str[16];
 285
 286         snprintf(str, sizeof(str), "0x%x", value);
 287         LLVMAddTargetDependentFunctionAttr(F, name, str);
 288 }
 289
 290 void ac_llvm_set_workgroup_size(LLVMValueRef F, unsigned size)
 291 {
 292         if (!size)
 293                 return;
 294
 295         char str[32];
 296         snprintf(str, sizeof(str), "%u,%u", size, size);
 297         LLVMAddTargetDependentFunctionAttr(F, "amdgpu-flat-work-group-size", str);
 298 }
 299
 300 unsigned
 301 ac_count_scratch_private_memory(LLVMValueRef function)
 302 {
 303         unsigned private_mem_vgprs = 0;
 304
 305         /* Process all LLVM instructions. */
 306         LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(function);
 307         while (bb) {
 308                 LLVMValueRef next = LLVMGetFirstInstruction(bb);
 309
 310                 while (next) {
 311                         LLVMValueRef inst = next;
 312                         next = LLVMGetNextInstruction(next);
 313
 314                         if (LLVMGetInstructionOpcode(inst) != LLVMAlloca)
 315                                 continue;
 316
 317                         LLVMTypeRef type = LLVMGetElementType(LLVMTypeOf(inst));
 318                         /* No idea why LLVM aligns allocas to 4 elements. */
 319                         unsigned alignment = LLVMGetAlignment(inst);
 320                         unsigned dw_size = align(ac_get_type_size(type) / 4, alignment);
 321                         private_mem_vgprs += dw_size;
 322                 }
 323                 bb = LLVMGetNextBasicBlock(bb);
 324         }
 325
 326         return private_mem_vgprs;
 327 }
 328
 329 bool
 330 ac_init_llvm_compiler(struct ac_llvm_compiler *compiler,
 331                       enum radeon_family family,
 332                       enum ac_target_machine_options tm_options)
 333 {
 334         const char *triple;
 335         memset(compiler, 0, sizeof(*compiler));
 336
 337         compiler->tm = ac_create_target_machine(family, tm_options,
 338                                                 LLVMCodeGenLevelDefault,
 339                                                 &triple);
 340         if (!compiler->tm)
 341                 return false;
 342
 343         if (tm_options & AC_TM_CREATE_LOW_OPT) {
 344                 compiler->low_opt_tm =
 345                         ac_create_target_machine(family, tm_options,
 346                                                  LLVMCodeGenLevelLess, NULL);
 347                 if (!compiler->low_opt_tm)
 348                         goto fail;
 349         }
 350
 351         if (family >= CHIP_NAVI10) {
 352                 assert(!(tm_options & AC_TM_CREATE_LOW_OPT));
 353                 compiler->tm_wave32 = ac_create_target_machine(family,
 354                                                                tm_options | AC_TM_WAVE32,
 355                                                                LLVMCodeGenLevelDefault,
 356                                                                NULL);
 357                 if (!compiler->tm_wave32)
 358                         goto fail;
 359         }
 360
 361         compiler->target_library_info =
 362                 ac_create_target_library_info(triple);
 363         if (!compiler->target_library_info)
 364                 goto fail;
 365
 366         compiler->passmgr = ac_create_passmgr(compiler->target_library_info,
 367                                               tm_options & AC_TM_CHECK_IR);
 368         if (!compiler->passmgr)
 369                 goto fail;
 370
 371         return true;
 372 fail:
 373         ac_destroy_llvm_compiler(compiler);
 374         return false;
 375 }
 376
 377 void
 378 ac_destroy_llvm_compiler(struct ac_llvm_compiler *compiler)
 379 {
 380         ac_destroy_llvm_passes(compiler->passes);
 381         ac_destroy_llvm_passes(compiler->passes_wave32);
 382         ac_destroy_llvm_passes(compiler->low_opt_passes);
 383
 384         if (compiler->passmgr)
 385                 LLVMDisposePassManager(compiler->passmgr);
 386         if (compiler->target_library_info)
 387                 ac_dispose_target_library_info(compiler->target_library_info);
 388         if (compiler->low_opt_tm)
 389                 LLVMDisposeTargetMachine(compiler->low_opt_tm);
 390         if (compiler->tm)
 391                 LLVMDisposeTargetMachine(compiler->tm);
 392         if (compiler->tm_wave32)
 393                 LLVMDisposeTargetMachine(compiler->tm_wave32);
 394 }