radeonsi: add support for Raven2 (v2)
[mesa.git] / src / amd / common / ac_llvm_util.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_util.h"
27 #include "ac_llvm_build.h"
28 #include "util/bitscan.h"
29 #include <llvm-c/Core.h>
30 #include <llvm-c/Support.h>
31 #include <llvm-c/Transforms/IPO.h>
32 #include <llvm-c/Transforms/Scalar.h>
33 #if HAVE_LLVM >= 0x0700
34 #include <llvm-c/Transforms/Utils.h>
35 #endif
36 #include "c11/threads.h"
37 #include "gallivm/lp_bld_misc.h"
38 #include "util/u_math.h"
39
40 #include <assert.h>
41 #include <stdio.h>
42 #include <string.h>
43
44 static void ac_init_llvm_target()
45 {
46 LLVMInitializeAMDGPUTargetInfo();
47 LLVMInitializeAMDGPUTarget();
48 LLVMInitializeAMDGPUTargetMC();
49 LLVMInitializeAMDGPUAsmPrinter();
50
51 /* For inline assembly. */
52 LLVMInitializeAMDGPUAsmParser();
53
54 /* Workaround for bug in llvm 4.0 that causes image intrinsics
55 * to disappear.
56 * https://reviews.llvm.org/D26348
57 *
58 * "mesa" is the prefix for error messages.
59 *
60 * -global-isel-abort=2 is a no-op unless global isel has been enabled.
61 * This option tells the backend to fall-back to SelectionDAG and print
62 * a diagnostic message if global isel fails.
63 */
64 const char *argv[3] = { "mesa", "-simplifycfg-sink-common=false", "-global-isel-abort=2" };
65 LLVMParseCommandLineOptions(3, argv, NULL);
66 }
67
68 static once_flag ac_init_llvm_target_once_flag = ONCE_FLAG_INIT;
69
70 void ac_init_llvm_once(void)
71 {
72 call_once(&ac_init_llvm_target_once_flag, ac_init_llvm_target);
73 }
74
75 static LLVMTargetRef ac_get_llvm_target(const char *triple)
76 {
77 LLVMTargetRef target = NULL;
78 char *err_message = NULL;
79
80 if (LLVMGetTargetFromTriple(triple, &target, &err_message)) {
81 fprintf(stderr, "Cannot find target for triple %s ", triple);
82 if (err_message) {
83 fprintf(stderr, "%s\n", err_message);
84 }
85 LLVMDisposeMessage(err_message);
86 return NULL;
87 }
88 return target;
89 }
90
91 const char *ac_get_llvm_processor_name(enum radeon_family family)
92 {
93 switch (family) {
94 case CHIP_TAHITI:
95 return "tahiti";
96 case CHIP_PITCAIRN:
97 return "pitcairn";
98 case CHIP_VERDE:
99 return "verde";
100 case CHIP_OLAND:
101 return "oland";
102 case CHIP_HAINAN:
103 return "hainan";
104 case CHIP_BONAIRE:
105 return "bonaire";
106 case CHIP_KABINI:
107 return "kabini";
108 case CHIP_KAVERI:
109 return "kaveri";
110 case CHIP_HAWAII:
111 return "hawaii";
112 case CHIP_MULLINS:
113 return "mullins";
114 case CHIP_TONGA:
115 return "tonga";
116 case CHIP_ICELAND:
117 return "iceland";
118 case CHIP_CARRIZO:
119 return "carrizo";
120 case CHIP_FIJI:
121 return "fiji";
122 case CHIP_STONEY:
123 return "stoney";
124 case CHIP_POLARIS10:
125 return "polaris10";
126 case CHIP_POLARIS11:
127 case CHIP_POLARIS12:
128 case CHIP_VEGAM:
129 return "polaris11";
130 case CHIP_VEGA10:
131 return "gfx900";
132 case CHIP_RAVEN:
133 return "gfx902";
134 case CHIP_VEGA12:
135 return HAVE_LLVM >= 0x0700 ? "gfx904" : "gfx902";
136 case CHIP_VEGA20:
137 return HAVE_LLVM >= 0x0700 ? "gfx906" : "gfx902";
138 case CHIP_RAVEN2:
139 return "gfx902"; /* TODO: use gfx909 when it's available */
140 default:
141 return "";
142 }
143 }
144
145 static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family,
146 enum ac_target_machine_options tm_options,
147 LLVMCodeGenOptLevel level,
148 const char **out_triple)
149 {
150 assert(family >= CHIP_TAHITI);
151 char features[256];
152 const char *triple = (tm_options & AC_TM_SUPPORTS_SPILL) ? "amdgcn-mesa-mesa3d" : "amdgcn--";
153 LLVMTargetRef target = ac_get_llvm_target(triple);
154
155 snprintf(features, sizeof(features),
156 "+DumpCode,+vgpr-spilling,-fp32-denormals,+fp64-denormals%s%s%s%s",
157 tm_options & AC_TM_SISCHED ? ",+si-scheduler" : "",
158 tm_options & AC_TM_FORCE_ENABLE_XNACK ? ",+xnack" : "",
159 tm_options & AC_TM_FORCE_DISABLE_XNACK ? ",-xnack" : "",
160 tm_options & AC_TM_PROMOTE_ALLOCA_TO_SCRATCH ? ",-promote-alloca" : "");
161
162 LLVMTargetMachineRef tm = LLVMCreateTargetMachine(
163 target,
164 triple,
165 ac_get_llvm_processor_name(family),
166 features,
167 level,
168 LLVMRelocDefault,
169 LLVMCodeModelDefault);
170
171 if (out_triple)
172 *out_triple = triple;
173 if (tm_options & AC_TM_ENABLE_GLOBAL_ISEL)
174 ac_enable_global_isel(tm);
175 return tm;
176 }
177
178 static LLVMPassManagerRef ac_create_passmgr(LLVMTargetLibraryInfoRef target_library_info,
179 bool check_ir)
180 {
181 LLVMPassManagerRef passmgr = LLVMCreatePassManager();
182 if (!passmgr)
183 return NULL;
184
185 if (target_library_info)
186 LLVMAddTargetLibraryInfo(target_library_info,
187 passmgr);
188
189 if (check_ir)
190 LLVMAddVerifierPass(passmgr);
191 LLVMAddAlwaysInlinerPass(passmgr);
192 /* Normally, the pass manager runs all passes on one function before
193 * moving onto another. Adding a barrier no-op pass forces the pass
194 * manager to run the inliner on all functions first, which makes sure
195 * that the following passes are only run on the remaining non-inline
196 * function, so it removes useless work done on dead inline functions.
197 */
198 ac_llvm_add_barrier_noop_pass(passmgr);
199 /* This pass should eliminate all the load and store instructions. */
200 LLVMAddPromoteMemoryToRegisterPass(passmgr);
201 LLVMAddScalarReplAggregatesPass(passmgr);
202 LLVMAddLICMPass(passmgr);
203 LLVMAddAggressiveDCEPass(passmgr);
204 LLVMAddCFGSimplificationPass(passmgr);
205 /* This is recommended by the instruction combining pass. */
206 LLVMAddEarlyCSEMemSSAPass(passmgr);
207 LLVMAddInstructionCombiningPass(passmgr);
208 return passmgr;
209 }
210
211 static const char *attr_to_str(enum ac_func_attr attr)
212 {
213 switch (attr) {
214 case AC_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
215 case AC_FUNC_ATTR_INREG: return "inreg";
216 case AC_FUNC_ATTR_NOALIAS: return "noalias";
217 case AC_FUNC_ATTR_NOUNWIND: return "nounwind";
218 case AC_FUNC_ATTR_READNONE: return "readnone";
219 case AC_FUNC_ATTR_READONLY: return "readonly";
220 case AC_FUNC_ATTR_WRITEONLY: return "writeonly";
221 case AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY: return "inaccessiblememonly";
222 case AC_FUNC_ATTR_CONVERGENT: return "convergent";
223 default:
224 fprintf(stderr, "Unhandled function attribute: %x\n", attr);
225 return 0;
226 }
227 }
228
229 void
230 ac_add_function_attr(LLVMContextRef ctx, LLVMValueRef function,
231 int attr_idx, enum ac_func_attr attr)
232 {
233 const char *attr_name = attr_to_str(attr);
234 unsigned kind_id = LLVMGetEnumAttributeKindForName(attr_name,
235 strlen(attr_name));
236 LLVMAttributeRef llvm_attr = LLVMCreateEnumAttribute(ctx, kind_id, 0);
237
238 if (LLVMIsAFunction(function))
239 LLVMAddAttributeAtIndex(function, attr_idx, llvm_attr);
240 else
241 LLVMAddCallSiteAttribute(function, attr_idx, llvm_attr);
242 }
243
244 void ac_add_func_attributes(LLVMContextRef ctx, LLVMValueRef function,
245 unsigned attrib_mask)
246 {
247 attrib_mask |= AC_FUNC_ATTR_NOUNWIND;
248 attrib_mask &= ~AC_FUNC_ATTR_LEGACY;
249
250 while (attrib_mask) {
251 enum ac_func_attr attr = 1u << u_bit_scan(&attrib_mask);
252 ac_add_function_attr(ctx, function, -1, attr);
253 }
254 }
255
256 void
257 ac_dump_module(LLVMModuleRef module)
258 {
259 char *str = LLVMPrintModuleToString(module);
260 fprintf(stderr, "%s", str);
261 LLVMDisposeMessage(str);
262 }
263
264 void
265 ac_llvm_add_target_dep_function_attr(LLVMValueRef F,
266 const char *name, unsigned value)
267 {
268 char str[16];
269
270 snprintf(str, sizeof(str), "0x%x", value);
271 LLVMAddTargetDependentFunctionAttr(F, name, str);
272 }
273
274 unsigned
275 ac_count_scratch_private_memory(LLVMValueRef function)
276 {
277 unsigned private_mem_vgprs = 0;
278
279 /* Process all LLVM instructions. */
280 LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(function);
281 while (bb) {
282 LLVMValueRef next = LLVMGetFirstInstruction(bb);
283
284 while (next) {
285 LLVMValueRef inst = next;
286 next = LLVMGetNextInstruction(next);
287
288 if (LLVMGetInstructionOpcode(inst) != LLVMAlloca)
289 continue;
290
291 LLVMTypeRef type = LLVMGetElementType(LLVMTypeOf(inst));
292 /* No idea why LLVM aligns allocas to 4 elements. */
293 unsigned alignment = LLVMGetAlignment(inst);
294 unsigned dw_size = align(ac_get_type_size(type) / 4, alignment);
295 private_mem_vgprs += dw_size;
296 }
297 bb = LLVMGetNextBasicBlock(bb);
298 }
299
300 return private_mem_vgprs;
301 }
302
303 bool
304 ac_init_llvm_compiler(struct ac_llvm_compiler *compiler,
305 bool okay_to_leak_target_library_info,
306 enum radeon_family family,
307 enum ac_target_machine_options tm_options)
308 {
309 const char *triple;
310 memset(compiler, 0, sizeof(*compiler));
311
312 compiler->tm = ac_create_target_machine(family, tm_options,
313 LLVMCodeGenLevelDefault,
314 &triple);
315 if (!compiler->tm)
316 return false;
317
318 if (tm_options & AC_TM_CREATE_LOW_OPT) {
319 compiler->low_opt_tm =
320 ac_create_target_machine(family, tm_options,
321 LLVMCodeGenLevelLess, NULL);
322 if (!compiler->low_opt_tm)
323 goto fail;
324 }
325
326 if (okay_to_leak_target_library_info || (HAVE_LLVM >= 0x0700)) {
327 compiler->target_library_info =
328 ac_create_target_library_info(triple);
329 if (!compiler->target_library_info)
330 goto fail;
331 }
332
333 compiler->passmgr = ac_create_passmgr(compiler->target_library_info,
334 tm_options & AC_TM_CHECK_IR);
335 if (!compiler->passmgr)
336 goto fail;
337
338 return true;
339 fail:
340 ac_destroy_llvm_compiler(compiler);
341 return false;
342 }
343
344 void
345 ac_destroy_llvm_compiler(struct ac_llvm_compiler *compiler)
346 {
347 if (compiler->passmgr)
348 LLVMDisposePassManager(compiler->passmgr);
349 #if HAVE_LLVM >= 0x0700
350 /* This crashes on LLVM 5.0 and 6.0 and Ubuntu 18.04, so leak it there. */
351 if (compiler->target_library_info)
352 ac_dispose_target_library_info(compiler->target_library_info);
353 #endif
354 if (compiler->low_opt_tm)
355 LLVMDisposeTargetMachine(compiler->low_opt_tm);
356 if (compiler->tm)
357 LLVMDisposeTargetMachine(compiler->tm);
358 }