2 * Copyright © 2016 Bas Nieuwenhuizen
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "ac_nir_to_llvm.h"
25 #include "ac_llvm_build.h"
26 #include "ac_llvm_util.h"
27 #include "ac_binary.h"
30 #include "../vulkan/radv_descriptor_set.h"
31 #include "util/bitscan.h"
32 #include <llvm-c/Transforms/Scalar.h>
33 #include "ac_shader_info.h"
34 enum radeon_llvm_calling_convention
{
35 RADEON_LLVM_AMDGPU_VS
= 87,
36 RADEON_LLVM_AMDGPU_GS
= 88,
37 RADEON_LLVM_AMDGPU_PS
= 89,
38 RADEON_LLVM_AMDGPU_CS
= 90,
41 #define CONST_ADDR_SPACE 2
42 #define LOCAL_ADDR_SPACE 3
44 #define RADEON_LLVM_MAX_INPUTS (VARYING_SLOT_VAR31 + 1)
45 #define RADEON_LLVM_MAX_OUTPUTS (VARYING_SLOT_VAR31 + 1)
54 struct nir_to_llvm_context
{
55 struct ac_llvm_context ac
;
56 const struct ac_nir_compiler_options
*options
;
57 struct ac_shader_variant_info
*shader_info
;
59 LLVMContextRef context
;
61 LLVMBuilderRef builder
;
62 LLVMValueRef main_function
;
64 struct hash_table
*defs
;
65 struct hash_table
*phis
;
67 LLVMValueRef descriptor_sets
[AC_UD_MAX_SETS
];
68 LLVMValueRef ring_offsets
;
69 LLVMValueRef push_constants
;
70 LLVMValueRef num_work_groups
;
71 LLVMValueRef workgroup_ids
;
72 LLVMValueRef local_invocation_ids
;
75 LLVMValueRef vertex_buffers
;
76 LLVMValueRef base_vertex
;
77 LLVMValueRef start_instance
;
78 LLVMValueRef draw_index
;
79 LLVMValueRef vertex_id
;
80 LLVMValueRef rel_auto_id
;
81 LLVMValueRef vs_prim_id
;
82 LLVMValueRef instance_id
;
83 LLVMValueRef ls_out_layout
;
84 LLVMValueRef es2gs_offset
;
86 LLVMValueRef tcs_offchip_layout
;
87 LLVMValueRef tcs_out_offsets
;
88 LLVMValueRef tcs_out_layout
;
89 LLVMValueRef tcs_in_layout
;
91 LLVMValueRef tess_factor_offset
;
92 LLVMValueRef tcs_patch_id
;
93 LLVMValueRef tcs_rel_ids
;
94 LLVMValueRef tes_rel_patch_id
;
95 LLVMValueRef tes_patch_id
;
99 LLVMValueRef gsvs_ring_stride
;
100 LLVMValueRef gsvs_num_entries
;
101 LLVMValueRef gs2vs_offset
;
102 LLVMValueRef gs_wave_id
;
103 LLVMValueRef gs_vtx_offset
[6];
104 LLVMValueRef gs_prim_id
, gs_invocation_id
;
106 LLVMValueRef esgs_ring
;
107 LLVMValueRef gsvs_ring
;
108 LLVMValueRef hs_ring_tess_offchip
;
109 LLVMValueRef hs_ring_tess_factor
;
111 LLVMValueRef prim_mask
;
112 LLVMValueRef sample_pos_offset
;
113 LLVMValueRef persp_sample
, persp_center
, persp_centroid
;
114 LLVMValueRef linear_sample
, linear_center
, linear_centroid
;
115 LLVMValueRef front_face
;
116 LLVMValueRef ancillary
;
117 LLVMValueRef sample_coverage
;
118 LLVMValueRef frag_pos
[4];
120 LLVMBasicBlockRef continue_block
;
121 LLVMBasicBlockRef break_block
;
141 LLVMValueRef i1false
;
142 LLVMValueRef i32zero
;
144 LLVMValueRef f32zero
;
146 LLVMValueRef v4f32empty
;
148 unsigned uniform_md_kind
;
149 LLVMValueRef empty_md
;
150 gl_shader_stage stage
;
153 LLVMValueRef inputs
[RADEON_LLVM_MAX_INPUTS
* 4];
154 LLVMValueRef outputs
[RADEON_LLVM_MAX_OUTPUTS
* 4];
156 LLVMValueRef shared_memory
;
158 uint64_t output_mask
;
160 LLVMValueRef
*locals
;
162 uint8_t num_output_clips
;
163 uint8_t num_output_culls
;
165 bool has_ds_bpermute
;
167 bool is_gs_copy_shader
;
168 LLVMValueRef gs_next_vertex
;
169 unsigned gs_max_out_vertices
;
171 unsigned tes_primitive_mode
;
172 uint64_t tess_outputs_written
;
173 uint64_t tess_patch_outputs_written
;
176 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
177 nir_deref_var
*deref
,
178 enum desc_type desc_type
);
179 static unsigned radeon_llvm_reg_index_soa(unsigned index
, unsigned chan
)
181 return (index
* 4) + chan
;
184 static unsigned shader_io_get_unique_index(gl_varying_slot slot
)
186 /* handle patch indices separate */
187 if (slot
== VARYING_SLOT_TESS_LEVEL_OUTER
)
189 if (slot
== VARYING_SLOT_TESS_LEVEL_INNER
)
191 if (slot
>= VARYING_SLOT_PATCH0
&& slot
<= VARYING_SLOT_TESS_MAX
)
192 return 2 + (slot
- VARYING_SLOT_PATCH0
);
194 if (slot
== VARYING_SLOT_POS
)
196 if (slot
== VARYING_SLOT_PSIZ
)
198 if (slot
== VARYING_SLOT_CLIP_DIST0
)
200 /* 3 is reserved for clip dist as well */
201 if (slot
>= VARYING_SLOT_VAR0
&& slot
<= VARYING_SLOT_VAR31
)
202 return 4 + (slot
- VARYING_SLOT_VAR0
);
203 unreachable("illegal slot in get unique index\n");
206 static unsigned llvm_get_type_size(LLVMTypeRef type
)
208 LLVMTypeKind kind
= LLVMGetTypeKind(type
);
211 case LLVMIntegerTypeKind
:
212 return LLVMGetIntTypeWidth(type
) / 8;
213 case LLVMFloatTypeKind
:
215 case LLVMPointerTypeKind
:
217 case LLVMVectorTypeKind
:
218 return LLVMGetVectorSize(type
) *
219 llvm_get_type_size(LLVMGetElementType(type
));
226 static void set_llvm_calling_convention(LLVMValueRef func
,
227 gl_shader_stage stage
)
229 enum radeon_llvm_calling_convention calling_conv
;
232 case MESA_SHADER_VERTEX
:
233 case MESA_SHADER_TESS_CTRL
:
234 case MESA_SHADER_TESS_EVAL
:
235 calling_conv
= RADEON_LLVM_AMDGPU_VS
;
237 case MESA_SHADER_GEOMETRY
:
238 calling_conv
= RADEON_LLVM_AMDGPU_GS
;
240 case MESA_SHADER_FRAGMENT
:
241 calling_conv
= RADEON_LLVM_AMDGPU_PS
;
243 case MESA_SHADER_COMPUTE
:
244 calling_conv
= RADEON_LLVM_AMDGPU_CS
;
247 unreachable("Unhandle shader type");
250 LLVMSetFunctionCallConv(func
, calling_conv
);
254 create_llvm_function(LLVMContextRef ctx
, LLVMModuleRef module
,
255 LLVMBuilderRef builder
, LLVMTypeRef
*return_types
,
256 unsigned num_return_elems
, LLVMTypeRef
*param_types
,
257 unsigned param_count
, unsigned array_params_mask
,
258 unsigned sgpr_params
, bool unsafe_math
)
260 LLVMTypeRef main_function_type
, ret_type
;
261 LLVMBasicBlockRef main_function_body
;
263 if (num_return_elems
)
264 ret_type
= LLVMStructTypeInContext(ctx
, return_types
,
265 num_return_elems
, true);
267 ret_type
= LLVMVoidTypeInContext(ctx
);
269 /* Setup the function */
271 LLVMFunctionType(ret_type
, param_types
, param_count
, 0);
272 LLVMValueRef main_function
=
273 LLVMAddFunction(module
, "main", main_function_type
);
275 LLVMAppendBasicBlockInContext(ctx
, main_function
, "main_body");
276 LLVMPositionBuilderAtEnd(builder
, main_function_body
);
278 LLVMSetFunctionCallConv(main_function
, RADEON_LLVM_AMDGPU_CS
);
279 for (unsigned i
= 0; i
< sgpr_params
; ++i
) {
280 if (array_params_mask
& (1 << i
)) {
281 LLVMValueRef P
= LLVMGetParam(main_function
, i
);
282 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_BYVAL
);
283 ac_add_attr_dereferenceable(P
, UINT64_MAX
);
286 ac_add_function_attr(ctx
, main_function
, i
+ 1, AC_FUNC_ATTR_INREG
);
291 /* These were copied from some LLVM test. */
292 LLVMAddTargetDependentFunctionAttr(main_function
,
293 "less-precise-fpmad",
295 LLVMAddTargetDependentFunctionAttr(main_function
,
298 LLVMAddTargetDependentFunctionAttr(main_function
,
301 LLVMAddTargetDependentFunctionAttr(main_function
,
305 return main_function
;
308 static LLVMTypeRef
const_array(LLVMTypeRef elem_type
, int num_elements
)
310 return LLVMPointerType(LLVMArrayType(elem_type
, num_elements
),
314 static LLVMValueRef
get_shared_memory_ptr(struct nir_to_llvm_context
*ctx
,
322 offset
= LLVMConstInt(ctx
->i32
, idx
* 16, false);
324 ptr
= ctx
->shared_memory
;
325 ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &offset
, 1, "");
326 addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
327 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
, LLVMPointerType(type
, addr_space
), "");
331 static LLVMTypeRef
to_integer_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
333 if (t
== ctx
->f16
|| t
== ctx
->i16
)
335 else if (t
== ctx
->f32
|| t
== ctx
->i32
)
337 else if (t
== ctx
->f64
|| t
== ctx
->i64
)
340 unreachable("Unhandled integer size");
343 static LLVMTypeRef
to_integer_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
345 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
346 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
347 return LLVMVectorType(to_integer_type_scalar(ctx
, elem_type
),
348 LLVMGetVectorSize(t
));
350 return to_integer_type_scalar(ctx
, t
);
353 static LLVMValueRef
to_integer(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
355 LLVMTypeRef type
= LLVMTypeOf(v
);
356 return LLVMBuildBitCast(ctx
->builder
, v
, to_integer_type(ctx
, type
), "");
359 static LLVMTypeRef
to_float_type_scalar(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
361 if (t
== ctx
->i16
|| t
== ctx
->f16
)
363 else if (t
== ctx
->i32
|| t
== ctx
->f32
)
365 else if (t
== ctx
->i64
|| t
== ctx
->f64
)
368 unreachable("Unhandled float size");
371 static LLVMTypeRef
to_float_type(struct nir_to_llvm_context
*ctx
, LLVMTypeRef t
)
373 if (LLVMGetTypeKind(t
) == LLVMVectorTypeKind
) {
374 LLVMTypeRef elem_type
= LLVMGetElementType(t
);
375 return LLVMVectorType(to_float_type_scalar(ctx
, elem_type
),
376 LLVMGetVectorSize(t
));
378 return to_float_type_scalar(ctx
, t
);
381 static LLVMValueRef
to_float(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
)
383 LLVMTypeRef type
= LLVMTypeOf(v
);
384 return LLVMBuildBitCast(ctx
->builder
, v
, to_float_type(ctx
, type
), "");
387 static int get_elem_bits(struct nir_to_llvm_context
*ctx
, LLVMTypeRef type
)
389 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
390 type
= LLVMGetElementType(type
);
392 if (LLVMGetTypeKind(type
) == LLVMIntegerTypeKind
)
393 return LLVMGetIntTypeWidth(type
);
395 if (type
== ctx
->f16
)
397 if (type
== ctx
->f32
)
399 if (type
== ctx
->f64
)
402 unreachable("Unhandled type kind in get_elem_bits");
405 static LLVMValueRef
unpack_param(struct nir_to_llvm_context
*ctx
,
406 LLVMValueRef param
, unsigned rshift
,
409 LLVMValueRef value
= param
;
411 value
= LLVMBuildLShr(ctx
->builder
, value
,
412 LLVMConstInt(ctx
->i32
, rshift
, false), "");
414 if (rshift
+ bitwidth
< 32) {
415 unsigned mask
= (1 << bitwidth
) - 1;
416 value
= LLVMBuildAnd(ctx
->builder
, value
,
417 LLVMConstInt(ctx
->i32
, mask
, false), "");
422 static LLVMValueRef
get_rel_patch_id(struct nir_to_llvm_context
*ctx
)
424 switch (ctx
->stage
) {
425 case MESA_SHADER_TESS_CTRL
:
426 return unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
427 case MESA_SHADER_TESS_EVAL
:
428 return ctx
->tes_rel_patch_id
;
431 unreachable("Illegal stage");
435 /* Tessellation shaders pass outputs to the next shader using LDS.
437 * LS outputs = TCS inputs
438 * TCS outputs = TES inputs
441 * - TCS inputs for patch 0
442 * - TCS inputs for patch 1
443 * - TCS inputs for patch 2 = get_tcs_in_current_patch_offset (if RelPatchID==2)
445 * - TCS outputs for patch 0 = get_tcs_out_patch0_offset
446 * - Per-patch TCS outputs for patch 0 = get_tcs_out_patch0_patch_data_offset
447 * - TCS outputs for patch 1
448 * - Per-patch TCS outputs for patch 1
449 * - TCS outputs for patch 2 = get_tcs_out_current_patch_offset (if RelPatchID==2)
450 * - Per-patch TCS outputs for patch 2 = get_tcs_out_current_patch_data_offset (if RelPatchID==2)
453 * All three shaders VS(LS), TCS, TES share the same LDS space.
456 get_tcs_in_patch_stride(struct nir_to_llvm_context
*ctx
)
458 if (ctx
->stage
== MESA_SHADER_VERTEX
)
459 return unpack_param(ctx
, ctx
->ls_out_layout
, 0, 13);
460 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
461 return unpack_param(ctx
, ctx
->tcs_in_layout
, 0, 13);
469 get_tcs_out_patch_stride(struct nir_to_llvm_context
*ctx
)
471 return unpack_param(ctx
, ctx
->tcs_out_layout
, 0, 13);
475 get_tcs_out_patch0_offset(struct nir_to_llvm_context
*ctx
)
477 return LLVMBuildMul(ctx
->builder
,
478 unpack_param(ctx
, ctx
->tcs_out_offsets
, 0, 16),
479 LLVMConstInt(ctx
->i32
, 4, false), "");
483 get_tcs_out_patch0_patch_data_offset(struct nir_to_llvm_context
*ctx
)
485 return LLVMBuildMul(ctx
->builder
,
486 unpack_param(ctx
, ctx
->tcs_out_offsets
, 16, 16),
487 LLVMConstInt(ctx
->i32
, 4, false), "");
491 get_tcs_in_current_patch_offset(struct nir_to_llvm_context
*ctx
)
493 LLVMValueRef patch_stride
= get_tcs_in_patch_stride(ctx
);
494 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
496 return LLVMBuildMul(ctx
->builder
, patch_stride
, rel_patch_id
, "");
500 get_tcs_out_current_patch_offset(struct nir_to_llvm_context
*ctx
)
502 LLVMValueRef patch0_offset
= get_tcs_out_patch0_offset(ctx
);
503 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
504 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
506 return LLVMBuildAdd(ctx
->builder
, patch0_offset
,
507 LLVMBuildMul(ctx
->builder
, patch_stride
,
513 get_tcs_out_current_patch_data_offset(struct nir_to_llvm_context
*ctx
)
515 LLVMValueRef patch0_patch_data_offset
=
516 get_tcs_out_patch0_patch_data_offset(ctx
);
517 LLVMValueRef patch_stride
= get_tcs_out_patch_stride(ctx
);
518 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
520 return LLVMBuildAdd(ctx
->builder
, patch0_patch_data_offset
,
521 LLVMBuildMul(ctx
->builder
, patch_stride
,
526 static void set_userdata_location(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
528 ud_info
->sgpr_idx
= sgpr_idx
;
529 ud_info
->num_sgprs
= num_sgprs
;
530 ud_info
->indirect
= false;
531 ud_info
->indirect_offset
= 0;
534 static void set_userdata_location_shader(struct nir_to_llvm_context
*ctx
,
535 int idx
, uint8_t sgpr_idx
, uint8_t num_sgprs
)
537 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.shader_data
[idx
], sgpr_idx
, num_sgprs
);
541 static void set_userdata_location_indirect(struct ac_userdata_info
*ud_info
, uint8_t sgpr_idx
, uint8_t num_sgprs
,
542 uint32_t indirect_offset
)
544 ud_info
->sgpr_idx
= sgpr_idx
;
545 ud_info
->num_sgprs
= num_sgprs
;
546 ud_info
->indirect
= true;
547 ud_info
->indirect_offset
= indirect_offset
;
551 static void declare_tess_lds(struct nir_to_llvm_context
*ctx
)
553 unsigned lds_size
= ctx
->options
->chip_class
>= CIK
? 65536 : 32768;
554 ctx
->lds
= LLVMBuildIntToPtr(ctx
->builder
, ctx
->i32zero
,
555 LLVMPointerType(LLVMArrayType(ctx
->i32
, lds_size
/ 4), LOCAL_ADDR_SPACE
),
559 static void create_function(struct nir_to_llvm_context
*ctx
)
561 LLVMTypeRef arg_types
[23];
562 unsigned arg_idx
= 0;
563 unsigned array_params_mask
= 0;
564 unsigned sgpr_count
= 0, user_sgpr_count
;
566 unsigned num_sets
= ctx
->options
->layout
? ctx
->options
->layout
->num_sets
: 0;
567 unsigned user_sgpr_idx
;
568 bool need_push_constants
;
569 bool need_ring_offsets
= false;
571 /* until we sort out scratch/global buffers always assign ring offsets for gs/vs/es */
572 if (ctx
->stage
== MESA_SHADER_GEOMETRY
||
573 ctx
->stage
== MESA_SHADER_VERTEX
||
574 ctx
->stage
== MESA_SHADER_TESS_CTRL
||
575 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
576 ctx
->stage
== MESA_SHADER_FRAGMENT
||
577 ctx
->is_gs_copy_shader
)
578 need_ring_offsets
= true;
580 need_push_constants
= true;
581 if (!ctx
->options
->layout
)
582 need_push_constants
= false;
583 else if (!ctx
->options
->layout
->push_constant_size
&&
584 !ctx
->options
->layout
->dynamic_offset_count
)
585 need_push_constants
= false;
587 if (need_ring_offsets
&& !ctx
->options
->supports_spill
) {
588 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* address of rings */
591 /* 1 for each descriptor set */
592 for (unsigned i
= 0; i
< num_sets
; ++i
) {
593 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
594 array_params_mask
|= (1 << arg_idx
);
595 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
599 if (need_push_constants
) {
600 /* 1 for push constants and dynamic descriptors */
601 array_params_mask
|= (1 << arg_idx
);
602 arg_types
[arg_idx
++] = const_array(ctx
->i8
, 1024 * 1024);
605 switch (ctx
->stage
) {
606 case MESA_SHADER_COMPUTE
:
607 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3); /* grid size */
608 user_sgpr_count
= arg_idx
;
609 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
610 arg_types
[arg_idx
++] = ctx
->i32
;
611 sgpr_count
= arg_idx
;
613 arg_types
[arg_idx
++] = LLVMVectorType(ctx
->i32
, 3);
615 case MESA_SHADER_VERTEX
:
616 if (!ctx
->is_gs_copy_shader
) {
617 arg_types
[arg_idx
++] = const_array(ctx
->v16i8
, 16); /* vertex buffers */
618 arg_types
[arg_idx
++] = ctx
->i32
; // base vertex
619 arg_types
[arg_idx
++] = ctx
->i32
; // start instance
620 arg_types
[arg_idx
++] = ctx
->i32
; // draw index
622 user_sgpr_count
= arg_idx
;
623 if (ctx
->options
->key
.vs
.as_es
)
624 arg_types
[arg_idx
++] = ctx
->i32
; //es2gs offset
625 else if (ctx
->options
->key
.vs
.as_ls
) {
626 arg_types
[arg_idx
++] = ctx
->i32
; //ls out layout
629 sgpr_count
= arg_idx
;
630 arg_types
[arg_idx
++] = ctx
->i32
; // vertex id
631 if (!ctx
->is_gs_copy_shader
) {
632 arg_types
[arg_idx
++] = ctx
->i32
; // rel auto id
633 arg_types
[arg_idx
++] = ctx
->i32
; // vs prim id
634 arg_types
[arg_idx
++] = ctx
->i32
; // instance id
637 case MESA_SHADER_TESS_CTRL
:
638 arg_types
[arg_idx
++] = ctx
->i32
; // tcs offchip layout
639 arg_types
[arg_idx
++] = ctx
->i32
; // tcs out offsets
640 arg_types
[arg_idx
++] = ctx
->i32
; // tcs out layout
641 arg_types
[arg_idx
++] = ctx
->i32
; // tcs in layout
642 user_sgpr_count
= arg_idx
;
643 arg_types
[arg_idx
++] = ctx
->i32
; // param oc lds
644 arg_types
[arg_idx
++] = ctx
->i32
; // tess factor offset
645 sgpr_count
= arg_idx
;
646 arg_types
[arg_idx
++] = ctx
->i32
; // patch id
647 arg_types
[arg_idx
++] = ctx
->i32
; // rel ids;
649 case MESA_SHADER_TESS_EVAL
:
650 arg_types
[arg_idx
++] = ctx
->i32
; // tcs offchip layout
651 user_sgpr_count
= arg_idx
;
652 if (ctx
->options
->key
.tes
.as_es
) {
653 arg_types
[arg_idx
++] = ctx
->i32
; // OC LDS
654 arg_types
[arg_idx
++] = ctx
->i32
; //
655 arg_types
[arg_idx
++] = ctx
->i32
; // es2gs offset
657 arg_types
[arg_idx
++] = ctx
->i32
; //
658 arg_types
[arg_idx
++] = ctx
->i32
; // OC LDS
660 sgpr_count
= arg_idx
;
661 arg_types
[arg_idx
++] = ctx
->f32
; // tes_u
662 arg_types
[arg_idx
++] = ctx
->f32
; // tes_v
663 arg_types
[arg_idx
++] = ctx
->i32
; // tes rel patch id
664 arg_types
[arg_idx
++] = ctx
->i32
; // tes patch id
666 case MESA_SHADER_GEOMETRY
:
667 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs stride
668 arg_types
[arg_idx
++] = ctx
->i32
; // gsvs num entires
669 user_sgpr_count
= arg_idx
;
670 arg_types
[arg_idx
++] = ctx
->i32
; // gs2vs offset
671 arg_types
[arg_idx
++] = ctx
->i32
; // wave id
672 sgpr_count
= arg_idx
;
673 arg_types
[arg_idx
++] = ctx
->i32
; // vtx0
674 arg_types
[arg_idx
++] = ctx
->i32
; // vtx1
675 arg_types
[arg_idx
++] = ctx
->i32
; // prim id
676 arg_types
[arg_idx
++] = ctx
->i32
; // vtx2
677 arg_types
[arg_idx
++] = ctx
->i32
; // vtx3
678 arg_types
[arg_idx
++] = ctx
->i32
; // vtx4
679 arg_types
[arg_idx
++] = ctx
->i32
; // vtx5
680 arg_types
[arg_idx
++] = ctx
->i32
; // GS instance id
682 case MESA_SHADER_FRAGMENT
:
683 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
)
684 arg_types
[arg_idx
++] = ctx
->i32
; /* sample position offset */
685 user_sgpr_count
= arg_idx
;
686 arg_types
[arg_idx
++] = ctx
->i32
; /* prim mask */
687 sgpr_count
= arg_idx
;
688 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp sample */
689 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp center */
690 arg_types
[arg_idx
++] = ctx
->v2i32
; /* persp centroid */
691 arg_types
[arg_idx
++] = ctx
->v3i32
; /* persp pull model */
692 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear sample */
693 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear center */
694 arg_types
[arg_idx
++] = ctx
->v2i32
; /* linear centroid */
695 arg_types
[arg_idx
++] = ctx
->f32
; /* line stipple tex */
696 arg_types
[arg_idx
++] = ctx
->f32
; /* pos x float */
697 arg_types
[arg_idx
++] = ctx
->f32
; /* pos y float */
698 arg_types
[arg_idx
++] = ctx
->f32
; /* pos z float */
699 arg_types
[arg_idx
++] = ctx
->f32
; /* pos w float */
700 arg_types
[arg_idx
++] = ctx
->i32
; /* front face */
701 arg_types
[arg_idx
++] = ctx
->i32
; /* ancillary */
702 arg_types
[arg_idx
++] = ctx
->i32
; /* sample coverage */
703 arg_types
[arg_idx
++] = ctx
->i32
; /* fixed pt */
706 unreachable("Shader stage not implemented");
709 ctx
->main_function
= create_llvm_function(
710 ctx
->context
, ctx
->module
, ctx
->builder
, NULL
, 0, arg_types
,
711 arg_idx
, array_params_mask
, sgpr_count
, ctx
->options
->unsafe_math
);
712 set_llvm_calling_convention(ctx
->main_function
, ctx
->stage
);
714 ctx
->shader_info
->num_input_sgprs
= 0;
715 ctx
->shader_info
->num_input_vgprs
= 0;
717 ctx
->shader_info
->num_user_sgprs
= ctx
->options
->supports_spill
? 2 : 0;
718 for (i
= 0; i
< user_sgpr_count
; i
++)
719 ctx
->shader_info
->num_user_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
721 ctx
->shader_info
->num_input_sgprs
= ctx
->shader_info
->num_user_sgprs
;
722 for (; i
< sgpr_count
; i
++)
723 ctx
->shader_info
->num_input_sgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
725 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
726 for (; i
< arg_idx
; ++i
)
727 ctx
->shader_info
->num_input_vgprs
+= llvm_get_type_size(arg_types
[i
]) / 4;
732 if (ctx
->options
->supports_spill
|| need_ring_offsets
) {
733 set_userdata_location_shader(ctx
, AC_UD_SCRATCH_RING_OFFSETS
, user_sgpr_idx
, 2);
735 if (ctx
->options
->supports_spill
) {
736 ctx
->ring_offsets
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.implicit.buffer.ptr",
737 LLVMPointerType(ctx
->i8
, CONST_ADDR_SPACE
),
738 NULL
, 0, AC_FUNC_ATTR_READNONE
);
739 ctx
->ring_offsets
= LLVMBuildBitCast(ctx
->builder
, ctx
->ring_offsets
,
740 const_array(ctx
->v16i8
, 16), "");
742 ctx
->ring_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
745 for (unsigned i
= 0; i
< num_sets
; ++i
) {
746 if (ctx
->options
->layout
->set
[i
].layout
->shader_stages
& (1 << ctx
->stage
)) {
747 set_userdata_location(&ctx
->shader_info
->user_sgprs_locs
.descriptor_sets
[i
], user_sgpr_idx
, 2);
749 ctx
->descriptor_sets
[i
] =
750 LLVMGetParam(ctx
->main_function
, arg_idx
++);
752 ctx
->descriptor_sets
[i
] = NULL
;
755 if (need_push_constants
) {
756 ctx
->push_constants
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
757 set_userdata_location_shader(ctx
, AC_UD_PUSH_CONSTANTS
, user_sgpr_idx
, 2);
761 switch (ctx
->stage
) {
762 case MESA_SHADER_COMPUTE
:
763 set_userdata_location_shader(ctx
, AC_UD_CS_GRID_SIZE
, user_sgpr_idx
, 3);
765 ctx
->num_work_groups
=
766 LLVMGetParam(ctx
->main_function
, arg_idx
++);
768 LLVMGetParam(ctx
->main_function
, arg_idx
++);
770 LLVMGetParam(ctx
->main_function
, arg_idx
++);
771 ctx
->local_invocation_ids
=
772 LLVMGetParam(ctx
->main_function
, arg_idx
++);
774 case MESA_SHADER_VERTEX
:
775 if (!ctx
->is_gs_copy_shader
) {
776 set_userdata_location_shader(ctx
, AC_UD_VS_VERTEX_BUFFERS
, user_sgpr_idx
, 2);
778 ctx
->vertex_buffers
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
779 set_userdata_location_shader(ctx
, AC_UD_VS_BASE_VERTEX_START_INSTANCE
, user_sgpr_idx
, 3);
781 ctx
->base_vertex
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
782 ctx
->start_instance
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
783 ctx
->draw_index
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
785 if (ctx
->options
->key
.vs
.as_es
)
786 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
787 else if (ctx
->options
->key
.vs
.as_ls
) {
788 set_userdata_location_shader(ctx
, AC_UD_VS_LS_TCS_IN_LAYOUT
, user_sgpr_idx
, 1);
790 ctx
->ls_out_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
792 ctx
->vertex_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
793 if (!ctx
->is_gs_copy_shader
) {
794 ctx
->rel_auto_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
795 ctx
->vs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
796 ctx
->instance_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
798 if (ctx
->options
->key
.vs
.as_ls
)
799 declare_tess_lds(ctx
);
801 case MESA_SHADER_TESS_CTRL
:
802 set_userdata_location_shader(ctx
, AC_UD_TCS_OFFCHIP_LAYOUT
, user_sgpr_idx
, 4);
804 ctx
->tcs_offchip_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
805 ctx
->tcs_out_offsets
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
806 ctx
->tcs_out_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
807 ctx
->tcs_in_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
808 ctx
->oc_lds
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
809 ctx
->tess_factor_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
810 ctx
->tcs_patch_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
811 ctx
->tcs_rel_ids
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
813 declare_tess_lds(ctx
);
815 case MESA_SHADER_TESS_EVAL
:
816 set_userdata_location_shader(ctx
, AC_UD_TES_OFFCHIP_LAYOUT
, user_sgpr_idx
, 1);
818 ctx
->tcs_offchip_layout
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
819 if (ctx
->options
->key
.tes
.as_es
) {
820 ctx
->oc_lds
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
822 ctx
->es2gs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
825 ctx
->oc_lds
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
827 ctx
->tes_u
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
828 ctx
->tes_v
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
829 ctx
->tes_rel_patch_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
830 ctx
->tes_patch_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
832 case MESA_SHADER_GEOMETRY
:
833 set_userdata_location_shader(ctx
, AC_UD_GS_VS_RING_STRIDE_ENTRIES
, user_sgpr_idx
, 2);
835 ctx
->gsvs_ring_stride
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
836 ctx
->gsvs_num_entries
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
837 ctx
->gs2vs_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
838 ctx
->gs_wave_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
839 ctx
->gs_vtx_offset
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
840 ctx
->gs_vtx_offset
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
841 ctx
->gs_prim_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
842 ctx
->gs_vtx_offset
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
843 ctx
->gs_vtx_offset
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
844 ctx
->gs_vtx_offset
[4] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
845 ctx
->gs_vtx_offset
[5] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
846 ctx
->gs_invocation_id
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
848 case MESA_SHADER_FRAGMENT
:
849 if (ctx
->shader_info
->info
.ps
.needs_sample_positions
) {
850 set_userdata_location_shader(ctx
, AC_UD_PS_SAMPLE_POS_OFFSET
, user_sgpr_idx
, 1);
852 ctx
->sample_pos_offset
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
854 ctx
->prim_mask
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
855 ctx
->persp_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
856 ctx
->persp_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
857 ctx
->persp_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
859 ctx
->linear_sample
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
860 ctx
->linear_center
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
861 ctx
->linear_centroid
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
862 arg_idx
++; /* line stipple */
863 ctx
->frag_pos
[0] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
864 ctx
->frag_pos
[1] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
865 ctx
->frag_pos
[2] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
866 ctx
->frag_pos
[3] = LLVMGetParam(ctx
->main_function
, arg_idx
++);
867 ctx
->front_face
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
868 ctx
->ancillary
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
869 ctx
->sample_coverage
= LLVMGetParam(ctx
->main_function
, arg_idx
++);
872 unreachable("Shader stage not implemented");
876 static void setup_types(struct nir_to_llvm_context
*ctx
)
878 LLVMValueRef args
[4];
880 ctx
->voidt
= LLVMVoidTypeInContext(ctx
->context
);
881 ctx
->i1
= LLVMIntTypeInContext(ctx
->context
, 1);
882 ctx
->i8
= LLVMIntTypeInContext(ctx
->context
, 8);
883 ctx
->i16
= LLVMIntTypeInContext(ctx
->context
, 16);
884 ctx
->i32
= LLVMIntTypeInContext(ctx
->context
, 32);
885 ctx
->i64
= LLVMIntTypeInContext(ctx
->context
, 64);
886 ctx
->v2i32
= LLVMVectorType(ctx
->i32
, 2);
887 ctx
->v3i32
= LLVMVectorType(ctx
->i32
, 3);
888 ctx
->v4i32
= LLVMVectorType(ctx
->i32
, 4);
889 ctx
->v8i32
= LLVMVectorType(ctx
->i32
, 8);
890 ctx
->f32
= LLVMFloatTypeInContext(ctx
->context
);
891 ctx
->f16
= LLVMHalfTypeInContext(ctx
->context
);
892 ctx
->f64
= LLVMDoubleTypeInContext(ctx
->context
);
893 ctx
->v2f32
= LLVMVectorType(ctx
->f32
, 2);
894 ctx
->v4f32
= LLVMVectorType(ctx
->f32
, 4);
895 ctx
->v16i8
= LLVMVectorType(ctx
->i8
, 16);
897 ctx
->i1false
= LLVMConstInt(ctx
->i1
, 0, false);
898 ctx
->i1true
= LLVMConstInt(ctx
->i1
, 1, false);
899 ctx
->i32zero
= LLVMConstInt(ctx
->i32
, 0, false);
900 ctx
->i32one
= LLVMConstInt(ctx
->i32
, 1, false);
901 ctx
->f32zero
= LLVMConstReal(ctx
->f32
, 0.0);
902 ctx
->f32one
= LLVMConstReal(ctx
->f32
, 1.0);
904 args
[0] = ctx
->f32zero
;
905 args
[1] = ctx
->f32zero
;
906 args
[2] = ctx
->f32zero
;
907 args
[3] = ctx
->f32one
;
908 ctx
->v4f32empty
= LLVMConstVector(args
, 4);
910 ctx
->uniform_md_kind
=
911 LLVMGetMDKindIDInContext(ctx
->context
, "amdgpu.uniform", 14);
912 ctx
->empty_md
= LLVMMDNodeInContext(ctx
->context
, NULL
, 0);
914 args
[0] = LLVMConstReal(ctx
->f32
, 2.5);
917 static int get_llvm_num_components(LLVMValueRef value
)
919 LLVMTypeRef type
= LLVMTypeOf(value
);
920 unsigned num_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
921 ? LLVMGetVectorSize(type
)
923 return num_components
;
926 static LLVMValueRef
llvm_extract_elem(struct nir_to_llvm_context
*ctx
,
930 int count
= get_llvm_num_components(value
);
932 assert(index
< count
);
936 return LLVMBuildExtractElement(ctx
->builder
, value
,
937 LLVMConstInt(ctx
->i32
, index
, false), "");
940 static LLVMValueRef
trim_vector(struct nir_to_llvm_context
*ctx
,
941 LLVMValueRef value
, unsigned count
)
943 unsigned num_components
= get_llvm_num_components(value
);
944 if (count
== num_components
)
947 LLVMValueRef masks
[] = {
948 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
949 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false)};
952 return LLVMBuildExtractElement(ctx
->builder
, value
, masks
[0],
955 LLVMValueRef swizzle
= LLVMConstVector(masks
, count
);
956 return LLVMBuildShuffleVector(ctx
->builder
, value
, value
, swizzle
, "");
960 build_store_values_extended(struct nir_to_llvm_context
*ctx
,
961 LLVMValueRef
*values
,
962 unsigned value_count
,
963 unsigned value_stride
,
966 LLVMBuilderRef builder
= ctx
->builder
;
969 if (value_count
== 1) {
970 LLVMBuildStore(builder
, vec
, values
[0]);
974 for (i
= 0; i
< value_count
; i
++) {
975 LLVMValueRef ptr
= values
[i
* value_stride
];
976 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, i
, false);
977 LLVMValueRef value
= LLVMBuildExtractElement(builder
, vec
, index
, "");
978 LLVMBuildStore(builder
, value
, ptr
);
982 static LLVMTypeRef
get_def_type(struct nir_to_llvm_context
*ctx
,
985 LLVMTypeRef type
= LLVMIntTypeInContext(ctx
->context
, def
->bit_size
);
986 if (def
->num_components
> 1) {
987 type
= LLVMVectorType(type
, def
->num_components
);
992 static LLVMValueRef
get_src(struct nir_to_llvm_context
*ctx
, nir_src src
)
995 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, src
.ssa
);
996 return (LLVMValueRef
)entry
->data
;
1000 static LLVMBasicBlockRef
get_block(struct nir_to_llvm_context
*ctx
,
1001 struct nir_block
*b
)
1003 struct hash_entry
*entry
= _mesa_hash_table_search(ctx
->defs
, b
);
1004 return (LLVMBasicBlockRef
)entry
->data
;
1007 static LLVMValueRef
get_alu_src(struct nir_to_llvm_context
*ctx
,
1009 unsigned num_components
)
1011 LLVMValueRef value
= get_src(ctx
, src
.src
);
1012 bool need_swizzle
= false;
1015 LLVMTypeRef type
= LLVMTypeOf(value
);
1016 unsigned src_components
= LLVMGetTypeKind(type
) == LLVMVectorTypeKind
1017 ? LLVMGetVectorSize(type
)
1020 for (unsigned i
= 0; i
< num_components
; ++i
) {
1021 assert(src
.swizzle
[i
] < src_components
);
1022 if (src
.swizzle
[i
] != i
)
1023 need_swizzle
= true;
1026 if (need_swizzle
|| num_components
!= src_components
) {
1027 LLVMValueRef masks
[] = {
1028 LLVMConstInt(ctx
->i32
, src
.swizzle
[0], false),
1029 LLVMConstInt(ctx
->i32
, src
.swizzle
[1], false),
1030 LLVMConstInt(ctx
->i32
, src
.swizzle
[2], false),
1031 LLVMConstInt(ctx
->i32
, src
.swizzle
[3], false)};
1033 if (src_components
> 1 && num_components
== 1) {
1034 value
= LLVMBuildExtractElement(ctx
->builder
, value
,
1036 } else if (src_components
== 1 && num_components
> 1) {
1037 LLVMValueRef values
[] = {value
, value
, value
, value
};
1038 value
= ac_build_gather_values(&ctx
->ac
, values
, num_components
);
1040 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
1041 value
= LLVMBuildShuffleVector(ctx
->builder
, value
, value
,
1045 assert(!src
.negate
);
1050 static LLVMValueRef
emit_int_cmp(struct nir_to_llvm_context
*ctx
,
1051 LLVMIntPredicate pred
, LLVMValueRef src0
,
1054 LLVMValueRef result
= LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, "");
1055 return LLVMBuildSelect(ctx
->builder
, result
,
1056 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1057 LLVMConstInt(ctx
->i32
, 0, false), "");
1060 static LLVMValueRef
emit_float_cmp(struct nir_to_llvm_context
*ctx
,
1061 LLVMRealPredicate pred
, LLVMValueRef src0
,
1064 LLVMValueRef result
;
1065 src0
= to_float(ctx
, src0
);
1066 src1
= to_float(ctx
, src1
);
1067 result
= LLVMBuildFCmp(ctx
->builder
, pred
, src0
, src1
, "");
1068 return LLVMBuildSelect(ctx
->builder
, result
,
1069 LLVMConstInt(ctx
->i32
, 0xFFFFFFFF, false),
1070 LLVMConstInt(ctx
->i32
, 0, false), "");
1073 static LLVMValueRef
emit_intrin_1f_param(struct nir_to_llvm_context
*ctx
,
1075 LLVMTypeRef result_type
,
1079 LLVMValueRef params
[] = {
1080 to_float(ctx
, src0
),
1083 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1084 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 1, AC_FUNC_ATTR_READNONE
);
1087 static LLVMValueRef
emit_intrin_2f_param(struct nir_to_llvm_context
*ctx
,
1089 LLVMTypeRef result_type
,
1090 LLVMValueRef src0
, LLVMValueRef src1
)
1093 LLVMValueRef params
[] = {
1094 to_float(ctx
, src0
),
1095 to_float(ctx
, src1
),
1098 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1099 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 2, AC_FUNC_ATTR_READNONE
);
1102 static LLVMValueRef
emit_intrin_3f_param(struct nir_to_llvm_context
*ctx
,
1104 LLVMTypeRef result_type
,
1105 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1108 LLVMValueRef params
[] = {
1109 to_float(ctx
, src0
),
1110 to_float(ctx
, src1
),
1111 to_float(ctx
, src2
),
1114 sprintf(name
, "%s.f%d", intrin
, get_elem_bits(ctx
, result_type
));
1115 return ac_build_intrinsic(&ctx
->ac
, name
, result_type
, params
, 3, AC_FUNC_ATTR_READNONE
);
1118 static LLVMValueRef
emit_bcsel(struct nir_to_llvm_context
*ctx
,
1119 LLVMValueRef src0
, LLVMValueRef src1
, LLVMValueRef src2
)
1121 LLVMValueRef v
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, src0
,
1123 return LLVMBuildSelect(ctx
->builder
, v
, src1
, src2
, "");
1126 static LLVMValueRef
emit_find_lsb(struct nir_to_llvm_context
*ctx
,
1129 LLVMValueRef params
[2] = {
1132 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
1133 * add special code to check for x=0. The reason is that
1134 * the LLVM behavior for x=0 is different from what we
1137 * The hardware already implements the correct behavior.
1139 LLVMConstInt(ctx
->i32
, 1, false),
1141 return ac_build_intrinsic(&ctx
->ac
, "llvm.cttz.i32", ctx
->i32
, params
, 2, AC_FUNC_ATTR_READNONE
);
1144 static LLVMValueRef
emit_ifind_msb(struct nir_to_llvm_context
*ctx
,
1147 return ac_build_imsb(&ctx
->ac
, src0
, ctx
->i32
);
1150 static LLVMValueRef
emit_ufind_msb(struct nir_to_llvm_context
*ctx
,
1153 return ac_build_umsb(&ctx
->ac
, src0
, ctx
->i32
);
1156 static LLVMValueRef
emit_minmax_int(struct nir_to_llvm_context
*ctx
,
1157 LLVMIntPredicate pred
,
1158 LLVMValueRef src0
, LLVMValueRef src1
)
1160 return LLVMBuildSelect(ctx
->builder
,
1161 LLVMBuildICmp(ctx
->builder
, pred
, src0
, src1
, ""),
1166 static LLVMValueRef
emit_iabs(struct nir_to_llvm_context
*ctx
,
1169 return emit_minmax_int(ctx
, LLVMIntSGT
, src0
,
1170 LLVMBuildNeg(ctx
->builder
, src0
, ""));
1173 static LLVMValueRef
emit_fsign(struct nir_to_llvm_context
*ctx
,
1176 LLVMValueRef cmp
, val
;
1178 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGT
, src0
, ctx
->f32zero
, "");
1179 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->f32one
, src0
, "");
1180 cmp
= LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
, val
, ctx
->f32zero
, "");
1181 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstReal(ctx
->f32
, -1.0), "");
1185 static LLVMValueRef
emit_isign(struct nir_to_llvm_context
*ctx
,
1188 LLVMValueRef cmp
, val
;
1190 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGT
, src0
, ctx
->i32zero
, "");
1191 val
= LLVMBuildSelect(ctx
->builder
, cmp
, ctx
->i32one
, src0
, "");
1192 cmp
= LLVMBuildICmp(ctx
->builder
, LLVMIntSGE
, val
, ctx
->i32zero
, "");
1193 val
= LLVMBuildSelect(ctx
->builder
, cmp
, val
, LLVMConstInt(ctx
->i32
, -1, true), "");
1197 static LLVMValueRef
emit_ffract(struct nir_to_llvm_context
*ctx
,
1200 const char *intr
= "llvm.floor.f32";
1201 LLVMValueRef fsrc0
= to_float(ctx
, src0
);
1202 LLVMValueRef params
[] = {
1205 LLVMValueRef floor
= ac_build_intrinsic(&ctx
->ac
, intr
,
1206 ctx
->f32
, params
, 1,
1207 AC_FUNC_ATTR_READNONE
);
1208 return LLVMBuildFSub(ctx
->builder
, fsrc0
, floor
, "");
1211 static LLVMValueRef
emit_uint_carry(struct nir_to_llvm_context
*ctx
,
1213 LLVMValueRef src0
, LLVMValueRef src1
)
1215 LLVMTypeRef ret_type
;
1216 LLVMTypeRef types
[] = { ctx
->i32
, ctx
->i1
};
1218 LLVMValueRef params
[] = { src0
, src1
};
1219 ret_type
= LLVMStructTypeInContext(ctx
->context
, types
,
1222 res
= ac_build_intrinsic(&ctx
->ac
, intrin
, ret_type
,
1223 params
, 2, AC_FUNC_ATTR_READNONE
);
1225 res
= LLVMBuildExtractValue(ctx
->builder
, res
, 1, "");
1226 res
= LLVMBuildZExt(ctx
->builder
, res
, ctx
->i32
, "");
1230 static LLVMValueRef
emit_b2f(struct nir_to_llvm_context
*ctx
,
1233 return LLVMBuildAnd(ctx
->builder
, src0
, LLVMBuildBitCast(ctx
->builder
, LLVMConstReal(ctx
->f32
, 1.0), ctx
->i32
, ""), "");
1236 static LLVMValueRef
emit_umul_high(struct nir_to_llvm_context
*ctx
,
1237 LLVMValueRef src0
, LLVMValueRef src1
)
1239 LLVMValueRef dst64
, result
;
1240 src0
= LLVMBuildZExt(ctx
->builder
, src0
, ctx
->i64
, "");
1241 src1
= LLVMBuildZExt(ctx
->builder
, src1
, ctx
->i64
, "");
1243 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1244 dst64
= LLVMBuildLShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1245 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1249 static LLVMValueRef
emit_imul_high(struct nir_to_llvm_context
*ctx
,
1250 LLVMValueRef src0
, LLVMValueRef src1
)
1252 LLVMValueRef dst64
, result
;
1253 src0
= LLVMBuildSExt(ctx
->builder
, src0
, ctx
->i64
, "");
1254 src1
= LLVMBuildSExt(ctx
->builder
, src1
, ctx
->i64
, "");
1256 dst64
= LLVMBuildMul(ctx
->builder
, src0
, src1
, "");
1257 dst64
= LLVMBuildAShr(ctx
->builder
, dst64
, LLVMConstInt(ctx
->i64
, 32, false), "");
1258 result
= LLVMBuildTrunc(ctx
->builder
, dst64
, ctx
->i32
, "");
1262 static LLVMValueRef
emit_bitfield_extract(struct nir_to_llvm_context
*ctx
,
1264 LLVMValueRef srcs
[3])
1266 LLVMValueRef result
;
1267 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, srcs
[2], LLVMConstInt(ctx
->i32
, 32, false), "");
1269 result
= ac_build_bfe(&ctx
->ac
, srcs
[0], srcs
[1], srcs
[2], is_signed
);
1270 result
= LLVMBuildSelect(ctx
->builder
, icond
, srcs
[0], result
, "");
1274 static LLVMValueRef
emit_bitfield_insert(struct nir_to_llvm_context
*ctx
,
1275 LLVMValueRef src0
, LLVMValueRef src1
,
1276 LLVMValueRef src2
, LLVMValueRef src3
)
1278 LLVMValueRef bfi_args
[3], result
;
1280 bfi_args
[0] = LLVMBuildShl(ctx
->builder
,
1281 LLVMBuildSub(ctx
->builder
,
1282 LLVMBuildShl(ctx
->builder
,
1287 bfi_args
[1] = LLVMBuildShl(ctx
->builder
, src1
, src2
, "");
1290 LLVMValueRef icond
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, src3
, LLVMConstInt(ctx
->i32
, 32, false), "");
1293 * (arg0 & arg1) | (~arg0 & arg2) = arg2 ^ (arg0 & (arg1 ^ arg2)
1294 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
1296 result
= LLVMBuildXor(ctx
->builder
, bfi_args
[2],
1297 LLVMBuildAnd(ctx
->builder
, bfi_args
[0],
1298 LLVMBuildXor(ctx
->builder
, bfi_args
[1], bfi_args
[2], ""), ""), "");
1300 result
= LLVMBuildSelect(ctx
->builder
, icond
, src1
, result
, "");
1304 static LLVMValueRef
emit_pack_half_2x16(struct nir_to_llvm_context
*ctx
,
1307 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1309 LLVMValueRef comp
[2];
1311 src0
= to_float(ctx
, src0
);
1312 comp
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, "");
1313 comp
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, "");
1314 for (i
= 0; i
< 2; i
++) {
1315 comp
[i
] = LLVMBuildFPTrunc(ctx
->builder
, comp
[i
], ctx
->f16
, "");
1316 comp
[i
] = LLVMBuildBitCast(ctx
->builder
, comp
[i
], ctx
->i16
, "");
1317 comp
[i
] = LLVMBuildZExt(ctx
->builder
, comp
[i
], ctx
->i32
, "");
1320 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
1321 comp
[0] = LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
1326 static LLVMValueRef
emit_unpack_half_2x16(struct nir_to_llvm_context
*ctx
,
1329 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
1330 LLVMValueRef temps
[2], result
, val
;
1333 for (i
= 0; i
< 2; i
++) {
1334 val
= i
== 1 ? LLVMBuildLShr(ctx
->builder
, src0
, const16
, "") : src0
;
1335 val
= LLVMBuildTrunc(ctx
->builder
, val
, ctx
->i16
, "");
1336 val
= LLVMBuildBitCast(ctx
->builder
, val
, ctx
->f16
, "");
1337 temps
[i
] = LLVMBuildFPExt(ctx
->builder
, val
, ctx
->f32
, "");
1340 result
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), temps
[0],
1342 result
= LLVMBuildInsertElement(ctx
->builder
, result
, temps
[1],
1347 static LLVMValueRef
emit_ddxy(struct nir_to_llvm_context
*ctx
,
1353 LLVMValueRef result
;
1354 ctx
->has_ddxy
= true;
1356 if (!ctx
->lds
&& !ctx
->has_ds_bpermute
)
1357 ctx
->lds
= LLVMAddGlobalInAddressSpace(ctx
->module
,
1358 LLVMArrayType(ctx
->i32
, 64),
1359 "ddxy_lds", LOCAL_ADDR_SPACE
);
1361 if (op
== nir_op_fddx_fine
|| op
== nir_op_fddx
)
1362 mask
= AC_TID_MASK_LEFT
;
1363 else if (op
== nir_op_fddy_fine
|| op
== nir_op_fddy
)
1364 mask
= AC_TID_MASK_TOP
;
1366 mask
= AC_TID_MASK_TOP_LEFT
;
1368 /* for DDX we want to next X pixel, DDY next Y pixel. */
1369 if (op
== nir_op_fddx_fine
||
1370 op
== nir_op_fddx_coarse
||
1376 result
= ac_build_ddxy(&ctx
->ac
, ctx
->has_ds_bpermute
,
1377 mask
, idx
, ctx
->lds
,
1383 * this takes an I,J coordinate pair,
1384 * and works out the X and Y derivatives.
1385 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
1387 static LLVMValueRef
emit_ddxy_interp(
1388 struct nir_to_llvm_context
*ctx
,
1389 LLVMValueRef interp_ij
)
1391 LLVMValueRef result
[4], a
;
1394 for (i
= 0; i
< 2; i
++) {
1395 a
= LLVMBuildExtractElement(ctx
->builder
, interp_ij
,
1396 LLVMConstInt(ctx
->i32
, i
, false), "");
1397 result
[i
] = emit_ddxy(ctx
, nir_op_fddx
, a
);
1398 result
[2+i
] = emit_ddxy(ctx
, nir_op_fddy
, a
);
1400 return ac_build_gather_values(&ctx
->ac
, result
, 4);
1403 static void visit_alu(struct nir_to_llvm_context
*ctx
, nir_alu_instr
*instr
)
1405 LLVMValueRef src
[4], result
= NULL
;
1406 unsigned num_components
= instr
->dest
.dest
.ssa
.num_components
;
1407 unsigned src_components
;
1408 LLVMTypeRef def_type
= get_def_type(ctx
, &instr
->dest
.dest
.ssa
);
1410 assert(nir_op_infos
[instr
->op
].num_inputs
<= ARRAY_SIZE(src
));
1411 switch (instr
->op
) {
1417 case nir_op_pack_half_2x16
:
1420 case nir_op_unpack_half_2x16
:
1424 src_components
= num_components
;
1427 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1428 src
[i
] = get_alu_src(ctx
, instr
->src
[i
], src_components
);
1430 switch (instr
->op
) {
1436 src
[0] = to_float(ctx
, src
[0]);
1437 result
= LLVMBuildFNeg(ctx
->builder
, src
[0], "");
1440 result
= LLVMBuildNeg(ctx
->builder
, src
[0], "");
1443 result
= LLVMBuildNot(ctx
->builder
, src
[0], "");
1446 result
= LLVMBuildAdd(ctx
->builder
, src
[0], src
[1], "");
1449 src
[0] = to_float(ctx
, src
[0]);
1450 src
[1] = to_float(ctx
, src
[1]);
1451 result
= LLVMBuildFAdd(ctx
->builder
, src
[0], src
[1], "");
1454 src
[0] = to_float(ctx
, src
[0]);
1455 src
[1] = to_float(ctx
, src
[1]);
1456 result
= LLVMBuildFSub(ctx
->builder
, src
[0], src
[1], "");
1459 result
= LLVMBuildSub(ctx
->builder
, src
[0], src
[1], "");
1462 result
= LLVMBuildMul(ctx
->builder
, src
[0], src
[1], "");
1465 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1468 result
= LLVMBuildURem(ctx
->builder
, src
[0], src
[1], "");
1471 src
[0] = to_float(ctx
, src
[0]);
1472 src
[1] = to_float(ctx
, src
[1]);
1473 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1474 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1475 to_float_type(ctx
, def_type
), result
);
1476 result
= LLVMBuildFMul(ctx
->builder
, src
[1] , result
, "");
1477 result
= LLVMBuildFSub(ctx
->builder
, src
[0], result
, "");
1480 src
[0] = to_float(ctx
, src
[0]);
1481 src
[1] = to_float(ctx
, src
[1]);
1482 result
= LLVMBuildFRem(ctx
->builder
, src
[0], src
[1], "");
1485 result
= LLVMBuildSRem(ctx
->builder
, src
[0], src
[1], "");
1488 result
= LLVMBuildSDiv(ctx
->builder
, src
[0], src
[1], "");
1491 result
= LLVMBuildUDiv(ctx
->builder
, src
[0], src
[1], "");
1494 src
[0] = to_float(ctx
, src
[0]);
1495 src
[1] = to_float(ctx
, src
[1]);
1496 result
= LLVMBuildFMul(ctx
->builder
, src
[0], src
[1], "");
1499 src
[0] = to_float(ctx
, src
[0]);
1500 src
[1] = to_float(ctx
, src
[1]);
1501 result
= ac_build_fdiv(&ctx
->ac
, src
[0], src
[1]);
1504 src
[0] = to_float(ctx
, src
[0]);
1505 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, src
[0]);
1508 result
= LLVMBuildAnd(ctx
->builder
, src
[0], src
[1], "");
1511 result
= LLVMBuildOr(ctx
->builder
, src
[0], src
[1], "");
1514 result
= LLVMBuildXor(ctx
->builder
, src
[0], src
[1], "");
1517 result
= LLVMBuildShl(ctx
->builder
, src
[0], src
[1], "");
1520 result
= LLVMBuildAShr(ctx
->builder
, src
[0], src
[1], "");
1523 result
= LLVMBuildLShr(ctx
->builder
, src
[0], src
[1], "");
1526 result
= emit_int_cmp(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1529 result
= emit_int_cmp(ctx
, LLVMIntNE
, src
[0], src
[1]);
1532 result
= emit_int_cmp(ctx
, LLVMIntEQ
, src
[0], src
[1]);
1535 result
= emit_int_cmp(ctx
, LLVMIntSGE
, src
[0], src
[1]);
1538 result
= emit_int_cmp(ctx
, LLVMIntULT
, src
[0], src
[1]);
1541 result
= emit_int_cmp(ctx
, LLVMIntUGE
, src
[0], src
[1]);
1544 result
= emit_float_cmp(ctx
, LLVMRealUEQ
, src
[0], src
[1]);
1547 result
= emit_float_cmp(ctx
, LLVMRealUNE
, src
[0], src
[1]);
1550 result
= emit_float_cmp(ctx
, LLVMRealULT
, src
[0], src
[1]);
1553 result
= emit_float_cmp(ctx
, LLVMRealUGE
, src
[0], src
[1]);
1556 result
= emit_intrin_1f_param(ctx
, "llvm.fabs",
1557 to_float_type(ctx
, def_type
), src
[0]);
1560 result
= emit_iabs(ctx
, src
[0]);
1563 result
= emit_minmax_int(ctx
, LLVMIntSGT
, src
[0], src
[1]);
1566 result
= emit_minmax_int(ctx
, LLVMIntSLT
, src
[0], src
[1]);
1569 result
= emit_minmax_int(ctx
, LLVMIntUGT
, src
[0], src
[1]);
1572 result
= emit_minmax_int(ctx
, LLVMIntULT
, src
[0], src
[1]);
1575 result
= emit_isign(ctx
, src
[0]);
1578 src
[0] = to_float(ctx
, src
[0]);
1579 result
= emit_fsign(ctx
, src
[0]);
1582 result
= emit_intrin_1f_param(ctx
, "llvm.floor",
1583 to_float_type(ctx
, def_type
), src
[0]);
1586 result
= emit_intrin_1f_param(ctx
, "llvm.trunc",
1587 to_float_type(ctx
, def_type
), src
[0]);
1590 result
= emit_intrin_1f_param(ctx
, "llvm.ceil",
1591 to_float_type(ctx
, def_type
), src
[0]);
1593 case nir_op_fround_even
:
1594 result
= emit_intrin_1f_param(ctx
, "llvm.rint",
1595 to_float_type(ctx
, def_type
),src
[0]);
1598 result
= emit_ffract(ctx
, src
[0]);
1601 result
= emit_intrin_1f_param(ctx
, "llvm.sin",
1602 to_float_type(ctx
, def_type
), src
[0]);
1605 result
= emit_intrin_1f_param(ctx
, "llvm.cos",
1606 to_float_type(ctx
, def_type
), src
[0]);
1609 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1610 to_float_type(ctx
, def_type
), src
[0]);
1613 result
= emit_intrin_1f_param(ctx
, "llvm.exp2",
1614 to_float_type(ctx
, def_type
), src
[0]);
1617 result
= emit_intrin_1f_param(ctx
, "llvm.log2",
1618 to_float_type(ctx
, def_type
), src
[0]);
1621 result
= emit_intrin_1f_param(ctx
, "llvm.sqrt",
1622 to_float_type(ctx
, def_type
), src
[0]);
1623 result
= ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, result
);
1626 result
= emit_intrin_2f_param(ctx
, "llvm.pow",
1627 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1630 result
= emit_intrin_2f_param(ctx
, "llvm.maxnum",
1631 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1634 result
= emit_intrin_2f_param(ctx
, "llvm.minnum",
1635 to_float_type(ctx
, def_type
), src
[0], src
[1]);
1638 result
= emit_intrin_3f_param(ctx
, "llvm.fma",
1639 to_float_type(ctx
, def_type
), src
[0], src
[1], src
[2]);
1641 case nir_op_ibitfield_extract
:
1642 result
= emit_bitfield_extract(ctx
, true, src
);
1644 case nir_op_ubitfield_extract
:
1645 result
= emit_bitfield_extract(ctx
, false, src
);
1647 case nir_op_bitfield_insert
:
1648 result
= emit_bitfield_insert(ctx
, src
[0], src
[1], src
[2], src
[3]);
1650 case nir_op_bitfield_reverse
:
1651 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.bitreverse.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1653 case nir_op_bit_count
:
1654 result
= ac_build_intrinsic(&ctx
->ac
, "llvm.ctpop.i32", ctx
->i32
, src
, 1, AC_FUNC_ATTR_READNONE
);
1659 for (unsigned i
= 0; i
< nir_op_infos
[instr
->op
].num_inputs
; i
++)
1660 src
[i
] = to_integer(ctx
, src
[i
]);
1661 result
= ac_build_gather_values(&ctx
->ac
, src
, num_components
);
1665 src
[0] = to_float(ctx
, src
[0]);
1666 result
= LLVMBuildFPToSI(ctx
->builder
, src
[0], def_type
, "");
1670 src
[0] = to_float(ctx
, src
[0]);
1671 result
= LLVMBuildFPToUI(ctx
->builder
, src
[0], def_type
, "");
1675 result
= LLVMBuildSIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1679 result
= LLVMBuildUIToFP(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1682 result
= LLVMBuildFPExt(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1685 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], to_float_type(ctx
, def_type
), "");
1689 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1690 result
= LLVMBuildZExt(ctx
->builder
, src
[0], def_type
, "");
1692 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1696 if (get_elem_bits(ctx
, LLVMTypeOf(src
[0])) < get_elem_bits(ctx
, def_type
))
1697 result
= LLVMBuildSExt(ctx
->builder
, src
[0], def_type
, "");
1699 result
= LLVMBuildTrunc(ctx
->builder
, src
[0], def_type
, "");
1702 result
= emit_bcsel(ctx
, src
[0], src
[1], src
[2]);
1704 case nir_op_find_lsb
:
1705 result
= emit_find_lsb(ctx
, src
[0]);
1707 case nir_op_ufind_msb
:
1708 result
= emit_ufind_msb(ctx
, src
[0]);
1710 case nir_op_ifind_msb
:
1711 result
= emit_ifind_msb(ctx
, src
[0]);
1713 case nir_op_uadd_carry
:
1714 result
= emit_uint_carry(ctx
, "llvm.uadd.with.overflow.i32", src
[0], src
[1]);
1716 case nir_op_usub_borrow
:
1717 result
= emit_uint_carry(ctx
, "llvm.usub.with.overflow.i32", src
[0], src
[1]);
1720 result
= emit_b2f(ctx
, src
[0]);
1722 case nir_op_fquantize2f16
:
1723 src
[0] = to_float(ctx
, src
[0]);
1724 result
= LLVMBuildFPTrunc(ctx
->builder
, src
[0], ctx
->f16
, "");
1725 /* need to convert back up to f32 */
1726 result
= LLVMBuildFPExt(ctx
->builder
, result
, ctx
->f32
, "");
1728 case nir_op_umul_high
:
1729 result
= emit_umul_high(ctx
, src
[0], src
[1]);
1731 case nir_op_imul_high
:
1732 result
= emit_imul_high(ctx
, src
[0], src
[1]);
1734 case nir_op_pack_half_2x16
:
1735 result
= emit_pack_half_2x16(ctx
, src
[0]);
1737 case nir_op_unpack_half_2x16
:
1738 result
= emit_unpack_half_2x16(ctx
, src
[0]);
1742 case nir_op_fddx_fine
:
1743 case nir_op_fddy_fine
:
1744 case nir_op_fddx_coarse
:
1745 case nir_op_fddy_coarse
:
1746 result
= emit_ddxy(ctx
, instr
->op
, src
[0]);
1749 fprintf(stderr
, "Unknown NIR alu instr: ");
1750 nir_print_instr(&instr
->instr
, stderr
);
1751 fprintf(stderr
, "\n");
1756 assert(instr
->dest
.dest
.is_ssa
);
1757 result
= to_integer(ctx
, result
);
1758 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.dest
.ssa
,
1763 static void visit_load_const(struct nir_to_llvm_context
*ctx
,
1764 nir_load_const_instr
*instr
)
1766 LLVMValueRef values
[4], value
= NULL
;
1767 LLVMTypeRef element_type
=
1768 LLVMIntTypeInContext(ctx
->context
, instr
->def
.bit_size
);
1770 for (unsigned i
= 0; i
< instr
->def
.num_components
; ++i
) {
1771 switch (instr
->def
.bit_size
) {
1773 values
[i
] = LLVMConstInt(element_type
,
1774 instr
->value
.u32
[i
], false);
1777 values
[i
] = LLVMConstInt(element_type
,
1778 instr
->value
.u64
[i
], false);
1782 "unsupported nir load_const bit_size: %d\n",
1783 instr
->def
.bit_size
);
1787 if (instr
->def
.num_components
> 1) {
1788 value
= LLVMConstVector(values
, instr
->def
.num_components
);
1792 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, value
);
1795 static LLVMValueRef
cast_ptr(struct nir_to_llvm_context
*ctx
, LLVMValueRef ptr
,
1798 int addr_space
= LLVMGetPointerAddressSpace(LLVMTypeOf(ptr
));
1799 return LLVMBuildBitCast(ctx
->builder
, ptr
,
1800 LLVMPointerType(type
, addr_space
), "");
1804 get_buffer_size(struct nir_to_llvm_context
*ctx
, LLVMValueRef descriptor
, bool in_elements
)
1807 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1808 LLVMConstInt(ctx
->i32
, 2, false), "");
1811 if (ctx
->options
->chip_class
>= VI
&& in_elements
) {
1812 /* On VI, the descriptor contains the size in bytes,
1813 * but TXQ must return the size in elements.
1814 * The stride is always non-zero for resources using TXQ.
1816 LLVMValueRef stride
=
1817 LLVMBuildExtractElement(ctx
->builder
, descriptor
,
1818 LLVMConstInt(ctx
->i32
, 1, false), "");
1819 stride
= LLVMBuildLShr(ctx
->builder
, stride
,
1820 LLVMConstInt(ctx
->i32
, 16, false), "");
1821 stride
= LLVMBuildAnd(ctx
->builder
, stride
,
1822 LLVMConstInt(ctx
->i32
, 0x3fff, false), "");
1824 size
= LLVMBuildUDiv(ctx
->builder
, size
, stride
, "");
1830 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
1833 static void build_int_type_name(
1835 char *buf
, unsigned bufsize
)
1837 assert(bufsize
>= 6);
1839 if (LLVMGetTypeKind(type
) == LLVMVectorTypeKind
)
1840 snprintf(buf
, bufsize
, "v%ui32",
1841 LLVMGetVectorSize(type
));
1846 static LLVMValueRef
radv_lower_gather4_integer(struct nir_to_llvm_context
*ctx
,
1847 struct ac_image_args
*args
,
1848 nir_tex_instr
*instr
)
1850 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
1851 LLVMValueRef coord
= args
->addr
;
1852 LLVMValueRef half_texel
[2];
1853 LLVMValueRef compare_cube_wa
;
1854 LLVMValueRef result
;
1856 unsigned coord_vgpr_index
= (unsigned)args
->offset
+ (unsigned)args
->compare
;
1860 struct ac_image_args txq_args
= { 0 };
1862 txq_args
.da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
1863 txq_args
.opcode
= ac_image_get_resinfo
;
1864 txq_args
.dmask
= 0xf;
1865 txq_args
.addr
= ctx
->i32zero
;
1866 txq_args
.resource
= args
->resource
;
1867 LLVMValueRef size
= ac_build_image_opcode(&ctx
->ac
, &txq_args
);
1869 for (c
= 0; c
< 2; c
++) {
1870 half_texel
[c
] = LLVMBuildExtractElement(ctx
->builder
, size
,
1871 LLVMConstInt(ctx
->i32
, c
, false), "");
1872 half_texel
[c
] = LLVMBuildUIToFP(ctx
->builder
, half_texel
[c
], ctx
->f32
, "");
1873 half_texel
[c
] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, half_texel
[c
]);
1874 half_texel
[c
] = LLVMBuildFMul(ctx
->builder
, half_texel
[c
],
1875 LLVMConstReal(ctx
->f32
, -0.5), "");
1879 LLVMValueRef orig_coords
= args
->addr
;
1881 for (c
= 0; c
< 2; c
++) {
1883 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, coord_vgpr_index
+ c
, 0);
1884 tmp
= LLVMBuildExtractElement(ctx
->builder
, coord
, index
, "");
1885 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1886 tmp
= LLVMBuildFAdd(ctx
->builder
, tmp
, half_texel
[c
], "");
1887 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1888 coord
= LLVMBuildInsertElement(ctx
->builder
, coord
, tmp
, index
, "");
1893 * Apparantly cube has issue with integer types that the workaround doesn't solve,
1894 * so this tests if the format is 8_8_8_8 and an integer type do an alternate
1895 * workaround by sampling using a scaled type and converting.
1896 * This is taken from amdgpu-pro shaders.
1898 /* NOTE this produces some ugly code compared to amdgpu-pro,
1899 * LLVM ends up dumping SGPRs into VGPRs to deal with the compare/select,
1900 * and then reads them back. -pro generates two selects,
1901 * one s_cmp for the descriptor rewriting
1902 * one v_cmp for the coordinate and result changes.
1904 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
1905 LLVMValueRef tmp
, tmp2
;
1907 /* workaround 8/8/8/8 uint/sint cube gather bug */
1908 /* first detect it then change to a scaled read and f2i */
1909 tmp
= LLVMBuildExtractElement(ctx
->builder
, args
->resource
, ctx
->i32one
, "");
1912 /* extract the DATA_FORMAT */
1913 tmp
= ac_build_bfe(&ctx
->ac
, tmp
, LLVMConstInt(ctx
->i32
, 20, false),
1914 LLVMConstInt(ctx
->i32
, 6, false), false);
1916 /* is the DATA_FORMAT == 8_8_8_8 */
1917 compare_cube_wa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, tmp
, LLVMConstInt(ctx
->i32
, V_008F14_IMG_DATA_FORMAT_8_8_8_8
, false), "");
1919 if (stype
== GLSL_TYPE_UINT
)
1920 /* Create a NUM FORMAT - 0x2 or 0x4 - USCALED or UINT */
1921 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0x8000000, false),
1922 LLVMConstInt(ctx
->i32
, 0x10000000, false), "");
1924 /* Create a NUM FORMAT - 0x3 or 0x5 - SSCALED or SINT */
1925 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, LLVMConstInt(ctx
->i32
, 0xc000000, false),
1926 LLVMConstInt(ctx
->i32
, 0x14000000, false), "");
1928 /* replace the NUM FORMAT in the descriptor */
1929 tmp2
= LLVMBuildAnd(ctx
->builder
, tmp2
, LLVMConstInt(ctx
->i32
, C_008F14_NUM_FORMAT_GFX6
, false), "");
1930 tmp2
= LLVMBuildOr(ctx
->builder
, tmp2
, tmp
, "");
1932 args
->resource
= LLVMBuildInsertElement(ctx
->builder
, args
->resource
, tmp2
, ctx
->i32one
, "");
1934 /* don't modify the coordinates for this case */
1935 coord
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, orig_coords
, coord
, "");
1938 result
= ac_build_image_opcode(&ctx
->ac
, args
);
1940 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
) {
1941 LLVMValueRef tmp
, tmp2
;
1943 /* if the cube workaround is in place, f2i the result. */
1944 for (c
= 0; c
< 4; c
++) {
1945 tmp
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, c
, false), "");
1946 if (stype
== GLSL_TYPE_UINT
)
1947 tmp2
= LLVMBuildFPToUI(ctx
->builder
, tmp
, ctx
->i32
, "");
1949 tmp2
= LLVMBuildFPToSI(ctx
->builder
, tmp
, ctx
->i32
, "");
1950 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->i32
, "");
1951 tmp2
= LLVMBuildBitCast(ctx
->builder
, tmp2
, ctx
->i32
, "");
1952 tmp
= LLVMBuildSelect(ctx
->builder
, compare_cube_wa
, tmp2
, tmp
, "");
1953 tmp
= LLVMBuildBitCast(ctx
->builder
, tmp
, ctx
->f32
, "");
1954 result
= LLVMBuildInsertElement(ctx
->builder
, result
, tmp
, LLVMConstInt(ctx
->i32
, c
, false), "");
1960 static LLVMValueRef
build_tex_intrinsic(struct nir_to_llvm_context
*ctx
,
1961 nir_tex_instr
*instr
,
1962 struct ac_image_args
*args
)
1964 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
1965 return ac_build_buffer_load_format(&ctx
->ac
,
1968 LLVMConstInt(ctx
->i32
, 0, false),
1972 args
->opcode
= ac_image_sample
;
1973 args
->compare
= instr
->is_shadow
;
1975 switch (instr
->op
) {
1977 case nir_texop_txf_ms
:
1978 case nir_texop_samples_identical
:
1979 args
->opcode
= instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
? ac_image_load
: ac_image_load_mip
;
1980 args
->compare
= false;
1981 args
->offset
= false;
1990 case nir_texop_query_levels
:
1991 args
->opcode
= ac_image_get_resinfo
;
1994 if (ctx
->stage
!= MESA_SHADER_FRAGMENT
)
1995 args
->level_zero
= true;
2001 args
->opcode
= ac_image_gather4
;
2002 args
->level_zero
= true;
2005 args
->opcode
= ac_image_get_lod
;
2006 args
->compare
= false;
2007 args
->offset
= false;
2013 if (instr
->op
== nir_texop_tg4
) {
2014 enum glsl_base_type stype
= glsl_get_sampler_result_type(instr
->texture
->var
->type
);
2015 if (stype
== GLSL_TYPE_UINT
|| stype
== GLSL_TYPE_INT
) {
2016 return radv_lower_gather4_integer(ctx
, args
, instr
);
2019 return ac_build_image_opcode(&ctx
->ac
, args
);
2022 static LLVMValueRef
visit_vulkan_resource_index(struct nir_to_llvm_context
*ctx
,
2023 nir_intrinsic_instr
*instr
)
2025 LLVMValueRef index
= get_src(ctx
, instr
->src
[0]);
2026 unsigned desc_set
= nir_intrinsic_desc_set(instr
);
2027 unsigned binding
= nir_intrinsic_binding(instr
);
2028 LLVMValueRef desc_ptr
= ctx
->descriptor_sets
[desc_set
];
2029 struct radv_pipeline_layout
*pipeline_layout
= ctx
->options
->layout
;
2030 struct radv_descriptor_set_layout
*layout
= pipeline_layout
->set
[desc_set
].layout
;
2031 unsigned base_offset
= layout
->binding
[binding
].offset
;
2032 LLVMValueRef offset
, stride
;
2034 if (layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_UNIFORM_BUFFER_DYNAMIC
||
2035 layout
->binding
[binding
].type
== VK_DESCRIPTOR_TYPE_STORAGE_BUFFER_DYNAMIC
) {
2036 unsigned idx
= pipeline_layout
->set
[desc_set
].dynamic_offset_start
+
2037 layout
->binding
[binding
].dynamic_offset_offset
;
2038 desc_ptr
= ctx
->push_constants
;
2039 base_offset
= pipeline_layout
->push_constant_size
+ 16 * idx
;
2040 stride
= LLVMConstInt(ctx
->i32
, 16, false);
2042 stride
= LLVMConstInt(ctx
->i32
, layout
->binding
[binding
].size
, false);
2044 offset
= LLVMConstInt(ctx
->i32
, base_offset
, false);
2045 index
= LLVMBuildMul(ctx
->builder
, index
, stride
, "");
2046 offset
= LLVMBuildAdd(ctx
->builder
, offset
, index
, "");
2048 desc_ptr
= ac_build_gep0(&ctx
->ac
, desc_ptr
, offset
);
2049 desc_ptr
= cast_ptr(ctx
, desc_ptr
, ctx
->v4i32
);
2050 LLVMSetMetadata(desc_ptr
, ctx
->uniform_md_kind
, ctx
->empty_md
);
2052 return LLVMBuildLoad(ctx
->builder
, desc_ptr
, "");
2055 static LLVMValueRef
visit_load_push_constant(struct nir_to_llvm_context
*ctx
,
2056 nir_intrinsic_instr
*instr
)
2058 LLVMValueRef ptr
, addr
;
2060 addr
= LLVMConstInt(ctx
->i32
, nir_intrinsic_base(instr
), 0);
2061 addr
= LLVMBuildAdd(ctx
->builder
, addr
, get_src(ctx
, instr
->src
[0]), "");
2063 ptr
= ac_build_gep0(&ctx
->ac
, ctx
->push_constants
, addr
);
2064 ptr
= cast_ptr(ctx
, ptr
, get_def_type(ctx
, &instr
->dest
.ssa
));
2066 return LLVMBuildLoad(ctx
->builder
, ptr
, "");
2069 static LLVMValueRef
visit_get_buffer_size(struct nir_to_llvm_context
*ctx
,
2070 nir_intrinsic_instr
*instr
)
2072 LLVMValueRef desc
= get_src(ctx
, instr
->src
[0]);
2074 return get_buffer_size(ctx
, desc
, false);
2076 static void visit_store_ssbo(struct nir_to_llvm_context
*ctx
,
2077 nir_intrinsic_instr
*instr
)
2079 const char *store_name
;
2080 LLVMValueRef src_data
= get_src(ctx
, instr
->src
[0]);
2081 LLVMTypeRef data_type
= ctx
->f32
;
2082 int elem_size_mult
= get_elem_bits(ctx
, LLVMTypeOf(src_data
)) / 32;
2083 int components_32bit
= elem_size_mult
* instr
->num_components
;
2084 unsigned writemask
= nir_intrinsic_write_mask(instr
);
2085 LLVMValueRef base_data
, base_offset
;
2086 LLVMValueRef params
[6];
2088 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2089 ctx
->shader_info
->fs
.writes_memory
= true;
2091 params
[1] = get_src(ctx
, instr
->src
[1]);
2092 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2093 params
[4] = ctx
->i1false
; /* glc */
2094 params
[5] = ctx
->i1false
; /* slc */
2096 if (components_32bit
> 1)
2097 data_type
= LLVMVectorType(ctx
->f32
, components_32bit
);
2099 base_data
= to_float(ctx
, src_data
);
2100 base_data
= trim_vector(ctx
, base_data
, instr
->num_components
);
2101 base_data
= LLVMBuildBitCast(ctx
->builder
, base_data
,
2103 base_offset
= get_src(ctx
, instr
->src
[2]); /* voffset */
2107 LLVMValueRef offset
;
2109 u_bit_scan_consecutive_range(&writemask
, &start
, &count
);
2111 /* Due to an LLVM limitation, split 3-element writes
2112 * into a 2-element and a 1-element write. */
2114 writemask
|= 1 << (start
+ 2);
2118 start
*= elem_size_mult
;
2119 count
*= elem_size_mult
;
2122 writemask
|= ((1u << (count
- 4)) - 1u) << (start
+ 4);
2127 store_name
= "llvm.amdgcn.buffer.store.v4f32";
2129 } else if (count
== 2) {
2130 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2131 base_data
, LLVMConstInt(ctx
->i32
, start
, false), "");
2132 data
= LLVMBuildInsertElement(ctx
->builder
, LLVMGetUndef(ctx
->v2f32
), tmp
,
2135 tmp
= LLVMBuildExtractElement(ctx
->builder
,
2136 base_data
, LLVMConstInt(ctx
->i32
, start
+ 1, false), "");
2137 data
= LLVMBuildInsertElement(ctx
->builder
, data
, tmp
,
2139 store_name
= "llvm.amdgcn.buffer.store.v2f32";
2143 if (get_llvm_num_components(base_data
) > 1)
2144 data
= LLVMBuildExtractElement(ctx
->builder
, base_data
,
2145 LLVMConstInt(ctx
->i32
, start
, false), "");
2148 store_name
= "llvm.amdgcn.buffer.store.f32";
2151 offset
= base_offset
;
2153 offset
= LLVMBuildAdd(ctx
->builder
, offset
, LLVMConstInt(ctx
->i32
, start
* 4, false), "");
2157 ac_build_intrinsic(&ctx
->ac
, store_name
,
2158 ctx
->voidt
, params
, 6, 0);
2162 static LLVMValueRef
visit_atomic_ssbo(struct nir_to_llvm_context
*ctx
,
2163 nir_intrinsic_instr
*instr
)
2166 LLVMValueRef params
[6];
2168 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
2169 ctx
->shader_info
->fs
.writes_memory
= true;
2171 if (instr
->intrinsic
== nir_intrinsic_ssbo_atomic_comp_swap
) {
2172 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[3]), 0);
2174 params
[arg_count
++] = llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[2]), 0);
2175 params
[arg_count
++] = get_src(ctx
, instr
->src
[0]);
2176 params
[arg_count
++] = LLVMConstInt(ctx
->i32
, 0, false); /* vindex */
2177 params
[arg_count
++] = get_src(ctx
, instr
->src
[1]); /* voffset */
2178 params
[arg_count
++] = ctx
->i1false
; /* slc */
2180 switch (instr
->intrinsic
) {
2181 case nir_intrinsic_ssbo_atomic_add
:
2182 name
= "llvm.amdgcn.buffer.atomic.add";
2184 case nir_intrinsic_ssbo_atomic_imin
:
2185 name
= "llvm.amdgcn.buffer.atomic.smin";
2187 case nir_intrinsic_ssbo_atomic_umin
:
2188 name
= "llvm.amdgcn.buffer.atomic.umin";
2190 case nir_intrinsic_ssbo_atomic_imax
:
2191 name
= "llvm.amdgcn.buffer.atomic.smax";
2193 case nir_intrinsic_ssbo_atomic_umax
:
2194 name
= "llvm.amdgcn.buffer.atomic.umax";
2196 case nir_intrinsic_ssbo_atomic_and
:
2197 name
= "llvm.amdgcn.buffer.atomic.and";
2199 case nir_intrinsic_ssbo_atomic_or
:
2200 name
= "llvm.amdgcn.buffer.atomic.or";
2202 case nir_intrinsic_ssbo_atomic_xor
:
2203 name
= "llvm.amdgcn.buffer.atomic.xor";
2205 case nir_intrinsic_ssbo_atomic_exchange
:
2206 name
= "llvm.amdgcn.buffer.atomic.swap";
2208 case nir_intrinsic_ssbo_atomic_comp_swap
:
2209 name
= "llvm.amdgcn.buffer.atomic.cmpswap";
2215 return ac_build_intrinsic(&ctx
->ac
, name
, ctx
->i32
, params
, arg_count
, 0);
2218 static LLVMValueRef
visit_load_buffer(struct nir_to_llvm_context
*ctx
,
2219 nir_intrinsic_instr
*instr
)
2221 LLVMValueRef results
[2];
2222 int load_components
;
2223 int num_components
= instr
->num_components
;
2224 if (instr
->dest
.ssa
.bit_size
== 64)
2225 num_components
*= 2;
2227 for (int i
= 0; i
< num_components
; i
+= load_components
) {
2228 load_components
= MIN2(num_components
- i
, 4);
2229 const char *load_name
;
2230 LLVMTypeRef data_type
= ctx
->f32
;
2231 LLVMValueRef offset
= LLVMConstInt(ctx
->i32
, i
* 4, false);
2232 offset
= LLVMBuildAdd(ctx
->builder
, get_src(ctx
, instr
->src
[1]), offset
, "");
2234 if (load_components
== 3)
2235 data_type
= LLVMVectorType(ctx
->f32
, 4);
2236 else if (load_components
> 1)
2237 data_type
= LLVMVectorType(ctx
->f32
, load_components
);
2239 if (load_components
>= 3)
2240 load_name
= "llvm.amdgcn.buffer.load.v4f32";
2241 else if (load_components
== 2)
2242 load_name
= "llvm.amdgcn.buffer.load.v2f32";
2243 else if (load_components
== 1)
2244 load_name
= "llvm.amdgcn.buffer.load.f32";
2246 unreachable("unhandled number of components");
2248 LLVMValueRef params
[] = {
2249 get_src(ctx
, instr
->src
[0]),
2250 LLVMConstInt(ctx
->i32
, 0, false),
2256 results
[i
] = ac_build_intrinsic(&ctx
->ac
, load_name
, data_type
, params
, 5, 0);
2260 LLVMValueRef ret
= results
[0];
2261 if (num_components
> 4 || num_components
== 3) {
2262 LLVMValueRef masks
[] = {
2263 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
2264 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
2265 LLVMConstInt(ctx
->i32
, 4, false), LLVMConstInt(ctx
->i32
, 5, false),
2266 LLVMConstInt(ctx
->i32
, 6, false), LLVMConstInt(ctx
->i32
, 7, false)
2269 LLVMValueRef swizzle
= LLVMConstVector(masks
, num_components
);
2270 ret
= LLVMBuildShuffleVector(ctx
->builder
, results
[0],
2271 results
[num_components
> 4 ? 1 : 0], swizzle
, "");
2274 return LLVMBuildBitCast(ctx
->builder
, ret
,
2275 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2278 static LLVMValueRef
visit_load_ubo_buffer(struct nir_to_llvm_context
*ctx
,
2279 nir_intrinsic_instr
*instr
)
2281 LLVMValueRef results
[8], ret
;
2282 LLVMValueRef rsrc
= get_src(ctx
, instr
->src
[0]);
2283 LLVMValueRef offset
= get_src(ctx
, instr
->src
[1]);
2284 int num_components
= instr
->num_components
;
2286 rsrc
= LLVMBuildBitCast(ctx
->builder
, rsrc
, LLVMVectorType(ctx
->i8
, 16), "");
2288 if (instr
->dest
.ssa
.bit_size
== 64)
2289 num_components
*= 2;
2291 for (unsigned i
= 0; i
< num_components
; ++i
) {
2292 LLVMValueRef params
[] = {
2294 LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, 4 * i
, 0),
2297 results
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.load.const", ctx
->f32
,
2299 AC_FUNC_ATTR_READNONE
|
2300 AC_FUNC_ATTR_LEGACY
);
2304 ret
= ac_build_gather_values(&ctx
->ac
, results
, instr
->num_components
);
2305 return LLVMBuildBitCast(ctx
->builder
, ret
,
2306 get_def_type(ctx
, &instr
->dest
.ssa
), "");
2310 radv_get_deref_offset(struct nir_to_llvm_context
*ctx
, nir_deref_var
*deref
,
2311 bool vs_in
, unsigned *vertex_index_out
,
2312 LLVMValueRef
*vertex_index_ref
,
2313 unsigned *const_out
, LLVMValueRef
*indir_out
)
2315 unsigned const_offset
= 0;
2316 nir_deref
*tail
= &deref
->deref
;
2317 LLVMValueRef offset
= NULL
;
2319 if (vertex_index_out
!= NULL
|| vertex_index_ref
!= NULL
) {
2321 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2322 if (vertex_index_out
)
2323 *vertex_index_out
= deref_array
->base_offset
;
2325 if (vertex_index_ref
) {
2326 LLVMValueRef vtx
= LLVMConstInt(ctx
->i32
, deref_array
->base_offset
, false);
2327 if (deref_array
->deref_array_type
== nir_deref_array_type_indirect
) {
2328 vtx
= LLVMBuildAdd(ctx
->builder
, vtx
, get_src(ctx
, deref_array
->indirect
), "");
2330 *vertex_index_ref
= vtx
;
2334 if (deref
->var
->data
.compact
) {
2335 assert(tail
->child
->deref_type
== nir_deref_type_array
);
2336 assert(glsl_type_is_scalar(glsl_without_array(deref
->var
->type
)));
2337 nir_deref_array
*deref_array
= nir_deref_as_array(tail
->child
);
2338 /* We always lower indirect dereferences for "compact" array vars. */
2339 assert(deref_array
->deref_array_type
== nir_deref_array_type_direct
);
2341 const_offset
= deref_array
->base_offset
;
2345 while (tail
->child
!= NULL
) {
2346 const struct glsl_type
*parent_type
= tail
->type
;
2349 if (tail
->deref_type
== nir_deref_type_array
) {
2350 nir_deref_array
*deref_array
= nir_deref_as_array(tail
);
2351 LLVMValueRef index
, stride
, local_offset
;
2352 unsigned size
= glsl_count_attribute_slots(tail
->type
, vs_in
);
2354 const_offset
+= size
* deref_array
->base_offset
;
2355 if (deref_array
->deref_array_type
== nir_deref_array_type_direct
)
2358 assert(deref_array
->deref_array_type
== nir_deref_array_type_indirect
);
2359 index
= get_src(ctx
, deref_array
->indirect
);
2360 stride
= LLVMConstInt(ctx
->i32
, size
, 0);
2361 local_offset
= LLVMBuildMul(ctx
->builder
, stride
, index
, "");
2364 offset
= LLVMBuildAdd(ctx
->builder
, offset
, local_offset
, "");
2366 offset
= local_offset
;
2367 } else if (tail
->deref_type
== nir_deref_type_struct
) {
2368 nir_deref_struct
*deref_struct
= nir_deref_as_struct(tail
);
2370 for (unsigned i
= 0; i
< deref_struct
->index
; i
++) {
2371 const struct glsl_type
*ft
= glsl_get_struct_field(parent_type
, i
);
2372 const_offset
+= glsl_count_attribute_slots(ft
, vs_in
);
2375 unreachable("unsupported deref type");
2379 if (const_offset
&& offset
)
2380 offset
= LLVMBuildAdd(ctx
->builder
, offset
,
2381 LLVMConstInt(ctx
->i32
, const_offset
, 0),
2384 *const_out
= const_offset
;
2385 *indir_out
= offset
;
2389 lds_load(struct nir_to_llvm_context
*ctx
,
2390 LLVMValueRef dw_addr
)
2393 value
= ac_build_indexed_load(&ctx
->ac
, ctx
->lds
, dw_addr
, false);
2398 lds_store(struct nir_to_llvm_context
*ctx
,
2399 LLVMValueRef dw_addr
, LLVMValueRef value
)
2401 value
= LLVMBuildBitCast(ctx
->builder
, value
, ctx
->i32
, "");
2402 ac_build_indexed_store(&ctx
->ac
, ctx
->lds
,
2406 /* The offchip buffer layout for TCS->TES is
2408 * - attribute 0 of patch 0 vertex 0
2409 * - attribute 0 of patch 0 vertex 1
2410 * - attribute 0 of patch 0 vertex 2
2412 * - attribute 0 of patch 1 vertex 0
2413 * - attribute 0 of patch 1 vertex 1
2415 * - attribute 1 of patch 0 vertex 0
2416 * - attribute 1 of patch 0 vertex 1
2418 * - per patch attribute 0 of patch 0
2419 * - per patch attribute 0 of patch 1
2422 * Note that every attribute has 4 components.
2424 static LLVMValueRef
get_tcs_tes_buffer_address(struct nir_to_llvm_context
*ctx
,
2425 LLVMValueRef vertex_index
,
2426 LLVMValueRef param_index
)
2428 LLVMValueRef base_addr
, vertices_per_patch
, num_patches
, total_vertices
;
2429 LLVMValueRef param_stride
, constant16
;
2430 LLVMValueRef rel_patch_id
= get_rel_patch_id(ctx
);
2432 vertices_per_patch
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 9, 6);
2433 num_patches
= unpack_param(ctx
, ctx
->tcs_offchip_layout
, 0, 9);
2434 total_vertices
= LLVMBuildMul(ctx
->builder
, vertices_per_patch
,
2437 constant16
= LLVMConstInt(ctx
->i32
, 16, false);
2439 base_addr
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
2440 vertices_per_patch
, "");
2442 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2445 param_stride
= total_vertices
;
2447 base_addr
= rel_patch_id
;
2448 param_stride
= num_patches
;
2451 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2452 LLVMBuildMul(ctx
->builder
, param_index
,
2453 param_stride
, ""), "");
2455 base_addr
= LLVMBuildMul(ctx
->builder
, base_addr
, constant16
, "");
2457 if (!vertex_index
) {
2458 LLVMValueRef patch_data_offset
=
2459 unpack_param(ctx
, ctx
->tcs_offchip_layout
, 16, 16);
2461 base_addr
= LLVMBuildAdd(ctx
->builder
, base_addr
,
2462 patch_data_offset
, "");
2467 static LLVMValueRef
get_tcs_tes_buffer_address_params(struct nir_to_llvm_context
*ctx
,
2469 unsigned const_index
,
2471 LLVMValueRef vertex_index
,
2472 LLVMValueRef indir_index
)
2474 LLVMValueRef param_index
;
2477 param_index
= LLVMBuildAdd(ctx
->builder
, LLVMConstInt(ctx
->i32
, param
, false),
2480 if (const_index
&& !is_compact
)
2481 param
+= const_index
;
2482 param_index
= LLVMConstInt(ctx
->i32
, param
, false);
2484 return get_tcs_tes_buffer_address(ctx
, vertex_index
, param_index
);
2488 mark_tess_output(struct nir_to_llvm_context
*ctx
,
2489 bool is_patch
, uint32_t param
)
2493 ctx
->tess_patch_outputs_written
|= (1ull << param
);
2495 ctx
->tess_outputs_written
|= (1ull << param
);
2499 get_dw_address(struct nir_to_llvm_context
*ctx
,
2500 LLVMValueRef dw_addr
,
2502 unsigned const_index
,
2503 bool compact_const_index
,
2504 LLVMValueRef vertex_index
,
2505 LLVMValueRef stride
,
2506 LLVMValueRef indir_index
)
2511 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2512 LLVMBuildMul(ctx
->builder
,
2518 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2519 LLVMBuildMul(ctx
->builder
, indir_index
,
2520 LLVMConstInt(ctx
->i32
, 4, false), ""), "");
2521 else if (const_index
&& !compact_const_index
)
2522 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2523 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2525 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2526 LLVMConstInt(ctx
->i32
, param
* 4, false), "");
2528 if (const_index
&& compact_const_index
)
2529 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2530 LLVMConstInt(ctx
->i32
, const_index
, false), "");
2535 load_tcs_input(struct nir_to_llvm_context
*ctx
,
2536 nir_intrinsic_instr
*instr
)
2538 LLVMValueRef dw_addr
, stride
;
2539 unsigned const_index
;
2540 LLVMValueRef vertex_index
;
2541 LLVMValueRef indir_index
;
2543 LLVMValueRef value
[4], result
;
2544 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2545 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2546 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2547 radv_get_deref_offset(ctx
, instr
->variables
[0],
2548 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2549 &const_index
, &indir_index
);
2551 stride
= unpack_param(ctx
, ctx
->tcs_in_layout
, 13, 8);
2552 dw_addr
= get_tcs_in_current_patch_offset(ctx
);
2553 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2556 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2557 value
[i
] = lds_load(ctx
, dw_addr
);
2558 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2561 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2562 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2567 load_tcs_output(struct nir_to_llvm_context
*ctx
,
2568 nir_intrinsic_instr
*instr
)
2570 LLVMValueRef dw_addr
, stride
;
2571 LLVMValueRef value
[4], result
;
2572 LLVMValueRef vertex_index
= NULL
;
2573 LLVMValueRef indir_index
= NULL
;
2574 unsigned const_index
= 0;
2576 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2577 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2578 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2579 radv_get_deref_offset(ctx
, instr
->variables
[0],
2580 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2581 &const_index
, &indir_index
);
2583 if (!instr
->variables
[0]->var
->data
.patch
) {
2584 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2585 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2587 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2590 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2593 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2594 value
[i
] = lds_load(ctx
, dw_addr
);
2595 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2598 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2599 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2604 store_tcs_output(struct nir_to_llvm_context
*ctx
,
2605 nir_intrinsic_instr
*instr
,
2609 LLVMValueRef stride
, dw_addr
;
2610 LLVMValueRef buf_addr
= NULL
;
2611 LLVMValueRef vertex_index
= NULL
;
2612 LLVMValueRef indir_index
= NULL
;
2613 unsigned const_index
= 0;
2615 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2616 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2618 radv_get_deref_offset(ctx
, instr
->variables
[0],
2619 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2620 &const_index
, &indir_index
);
2622 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2623 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2624 is_compact
&& const_index
> 3) {
2629 if (!instr
->variables
[0]->var
->data
.patch
) {
2630 stride
= unpack_param(ctx
, ctx
->tcs_out_layout
, 13, 8);
2631 dw_addr
= get_tcs_out_current_patch_offset(ctx
);
2633 dw_addr
= get_tcs_out_current_patch_data_offset(ctx
);
2636 mark_tess_output(ctx
, instr
->variables
[0]->var
->data
.patch
, param
);
2638 dw_addr
= get_dw_address(ctx
, dw_addr
, param
, const_index
, is_compact
, vertex_index
, stride
,
2640 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
, is_compact
,
2641 vertex_index
, indir_index
);
2643 unsigned base
= is_compact
? const_index
: 0;
2644 for (unsigned chan
= 0; chan
< 8; chan
++) {
2645 bool is_tess_factor
= false;
2646 if (!(writemask
& (1 << chan
)))
2648 LLVMValueRef value
= llvm_extract_elem(ctx
, src
, chan
);
2650 lds_store(ctx
, dw_addr
, value
);
2652 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_INNER
||
2653 instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_TESS_LEVEL_OUTER
)
2654 is_tess_factor
= true;
2656 if (!is_tess_factor
&& writemask
!= 0xF)
2657 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, value
, 1,
2658 buf_addr
, ctx
->oc_lds
,
2659 4 * (base
+ chan
), 1, 0, true, false);
2661 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
,
2665 if (writemask
== 0xF) {
2666 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, src
, 4,
2667 buf_addr
, ctx
->oc_lds
,
2668 (base
* 4), 1, 0, true, false);
2673 load_tes_input(struct nir_to_llvm_context
*ctx
,
2674 nir_intrinsic_instr
*instr
)
2676 LLVMValueRef buf_addr
;
2677 LLVMValueRef result
;
2678 LLVMValueRef vertex_index
= NULL
;
2679 LLVMValueRef indir_index
= NULL
;
2680 unsigned const_index
= 0;
2682 const bool per_vertex
= nir_is_per_vertex_io(instr
->variables
[0]->var
, ctx
->stage
);
2683 const bool is_compact
= instr
->variables
[0]->var
->data
.compact
;
2685 radv_get_deref_offset(ctx
, instr
->variables
[0],
2686 false, NULL
, per_vertex
? &vertex_index
: NULL
,
2687 &const_index
, &indir_index
);
2688 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2689 if (instr
->variables
[0]->var
->data
.location
== VARYING_SLOT_CLIP_DIST0
&&
2690 is_compact
&& const_index
> 3) {
2694 buf_addr
= get_tcs_tes_buffer_address_params(ctx
, param
, const_index
,
2695 is_compact
, vertex_index
, indir_index
);
2697 result
= ac_build_buffer_load(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, instr
->num_components
, NULL
,
2698 buf_addr
, ctx
->oc_lds
, is_compact
? (4 * const_index
) : 0, 1, 0, true);
2699 result
= trim_vector(ctx
, result
, instr
->num_components
);
2700 result
= LLVMBuildBitCast(ctx
->builder
, result
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2705 load_gs_input(struct nir_to_llvm_context
*ctx
,
2706 nir_intrinsic_instr
*instr
)
2708 LLVMValueRef indir_index
, vtx_offset
;
2709 unsigned const_index
;
2710 LLVMValueRef args
[9];
2711 unsigned param
, vtx_offset_param
;
2712 LLVMValueRef value
[4], result
;
2713 unsigned vertex_index
;
2714 radv_get_deref_offset(ctx
, instr
->variables
[0],
2715 false, &vertex_index
, NULL
,
2716 &const_index
, &indir_index
);
2717 vtx_offset_param
= vertex_index
;
2718 assert(vtx_offset_param
< 6);
2719 vtx_offset
= LLVMBuildMul(ctx
->builder
, ctx
->gs_vtx_offset
[vtx_offset_param
],
2720 LLVMConstInt(ctx
->i32
, 4, false), "");
2722 param
= shader_io_get_unique_index(instr
->variables
[0]->var
->data
.location
);
2723 for (unsigned i
= 0; i
< instr
->num_components
; i
++) {
2725 args
[0] = ctx
->esgs_ring
;
2726 args
[1] = vtx_offset
;
2727 args
[2] = LLVMConstInt(ctx
->i32
, (param
* 4 + i
+ const_index
) * 256, false);
2728 args
[3] = ctx
->i32zero
;
2729 args
[4] = ctx
->i32one
; /* OFFEN */
2730 args
[5] = ctx
->i32zero
; /* IDXEN */
2731 args
[6] = ctx
->i32one
; /* GLC */
2732 args
[7] = ctx
->i32zero
; /* SLC */
2733 args
[8] = ctx
->i32zero
; /* TFE */
2735 value
[i
] = ac_build_intrinsic(&ctx
->ac
, "llvm.SI.buffer.load.dword.i32.i32",
2737 AC_FUNC_ATTR_READONLY
|
2738 AC_FUNC_ATTR_LEGACY
);
2740 result
= ac_build_gather_values(&ctx
->ac
, value
, instr
->num_components
);
2745 static LLVMValueRef
visit_load_var(struct nir_to_llvm_context
*ctx
,
2746 nir_intrinsic_instr
*instr
)
2748 LLVMValueRef values
[8];
2749 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2750 int ve
= instr
->dest
.ssa
.num_components
;
2751 LLVMValueRef indir_index
;
2753 unsigned const_index
;
2754 bool vs_in
= ctx
->stage
== MESA_SHADER_VERTEX
&&
2755 instr
->variables
[0]->var
->data
.mode
== nir_var_shader_in
;
2756 radv_get_deref_offset(ctx
, instr
->variables
[0], vs_in
, NULL
, NULL
,
2757 &const_index
, &indir_index
);
2759 if (instr
->dest
.ssa
.bit_size
== 64)
2762 switch (instr
->variables
[0]->var
->data
.mode
) {
2763 case nir_var_shader_in
:
2764 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2765 return load_tcs_input(ctx
, instr
);
2766 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
)
2767 return load_tes_input(ctx
, instr
);
2768 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
2769 return load_gs_input(ctx
, instr
);
2771 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2773 unsigned count
= glsl_count_attribute_slots(
2774 instr
->variables
[0]->var
->type
,
2775 ctx
->stage
== MESA_SHADER_VERTEX
);
2777 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2778 &ctx
->ac
, ctx
->inputs
+ idx
+ chan
, count
,
2781 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2785 values
[chan
] = ctx
->inputs
[idx
+ chan
+ const_index
* 4];
2789 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2791 unsigned count
= glsl_count_attribute_slots(
2792 instr
->variables
[0]->var
->type
, false);
2794 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2795 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2798 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2802 values
[chan
] = LLVMBuildLoad(ctx
->builder
, ctx
->locals
[idx
+ chan
+ const_index
* 4], "");
2806 case nir_var_shader_out
:
2807 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
2808 return load_tcs_output(ctx
, instr
);
2809 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2811 unsigned count
= glsl_count_attribute_slots(
2812 instr
->variables
[0]->var
->type
, false);
2814 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2815 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2818 values
[chan
] = LLVMBuildExtractElement(ctx
->builder
,
2822 values
[chan
] = LLVMBuildLoad(ctx
->builder
,
2823 ctx
->outputs
[idx
+ chan
+ const_index
* 4],
2828 case nir_var_shared
: {
2829 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2830 LLVMValueRef derived_ptr
;
2833 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2835 for (unsigned chan
= 0; chan
< ve
; chan
++) {
2836 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2838 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2839 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2841 values
[chan
] = LLVMBuildLoad(ctx
->builder
, derived_ptr
, "");
2846 unreachable("unhandle variable mode");
2848 ret
= ac_build_gather_values(&ctx
->ac
, values
, ve
);
2849 return LLVMBuildBitCast(ctx
->builder
, ret
, get_def_type(ctx
, &instr
->dest
.ssa
), "");
2853 visit_store_var(struct nir_to_llvm_context
*ctx
,
2854 nir_intrinsic_instr
*instr
)
2856 LLVMValueRef temp_ptr
, value
;
2857 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
2858 LLVMValueRef src
= to_float(ctx
, get_src(ctx
, instr
->src
[0]));
2859 int writemask
= instr
->const_index
[0];
2860 LLVMValueRef indir_index
;
2861 unsigned const_index
;
2862 radv_get_deref_offset(ctx
, instr
->variables
[0], false,
2863 NULL
, NULL
, &const_index
, &indir_index
);
2865 if (get_elem_bits(ctx
, LLVMTypeOf(src
)) == 64) {
2866 int old_writemask
= writemask
;
2868 src
= LLVMBuildBitCast(ctx
->builder
, src
,
2869 LLVMVectorType(ctx
->f32
, get_llvm_num_components(src
) * 2),
2873 for (unsigned chan
= 0; chan
< 4; chan
++) {
2874 if (old_writemask
& (1 << chan
))
2875 writemask
|= 3u << (2 * chan
);
2879 switch (instr
->variables
[0]->var
->data
.mode
) {
2880 case nir_var_shader_out
:
2882 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
2883 store_tcs_output(ctx
, instr
, src
, writemask
);
2887 for (unsigned chan
= 0; chan
< 8; chan
++) {
2889 if (!(writemask
& (1 << chan
)))
2892 value
= llvm_extract_elem(ctx
, src
, chan
);
2894 if (instr
->variables
[0]->var
->data
.compact
)
2897 unsigned count
= glsl_count_attribute_slots(
2898 instr
->variables
[0]->var
->type
, false);
2900 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2901 &ctx
->ac
, ctx
->outputs
+ idx
+ chan
, count
,
2904 if (get_llvm_num_components(tmp_vec
) > 1) {
2905 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2906 value
, indir_index
, "");
2909 build_store_values_extended(ctx
, ctx
->outputs
+ idx
+ chan
,
2910 count
, stride
, tmp_vec
);
2913 temp_ptr
= ctx
->outputs
[idx
+ chan
+ const_index
* stride
];
2915 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2920 for (unsigned chan
= 0; chan
< 8; chan
++) {
2921 if (!(writemask
& (1 << chan
)))
2924 value
= llvm_extract_elem(ctx
, src
, chan
);
2926 unsigned count
= glsl_count_attribute_slots(
2927 instr
->variables
[0]->var
->type
, false);
2929 LLVMValueRef tmp_vec
= ac_build_gather_values_extended(
2930 &ctx
->ac
, ctx
->locals
+ idx
+ chan
, count
,
2933 tmp_vec
= LLVMBuildInsertElement(ctx
->builder
, tmp_vec
,
2934 value
, indir_index
, "");
2935 build_store_values_extended(ctx
, ctx
->locals
+ idx
+ chan
,
2938 temp_ptr
= ctx
->locals
[idx
+ chan
+ const_index
* 4];
2940 LLVMBuildStore(ctx
->builder
, value
, temp_ptr
);
2944 case nir_var_shared
: {
2945 LLVMValueRef ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
2948 indir_index
= LLVMBuildMul(ctx
->builder
, indir_index
, LLVMConstInt(ctx
->i32
, 4, false), "");
2950 for (unsigned chan
= 0; chan
< 8; chan
++) {
2951 if (!(writemask
& (1 << chan
)))
2953 LLVMValueRef index
= LLVMConstInt(ctx
->i32
, chan
, false);
2954 LLVMValueRef derived_ptr
;
2957 index
= LLVMBuildAdd(ctx
->builder
, index
, indir_index
, "");
2959 value
= llvm_extract_elem(ctx
, src
, chan
);
2960 derived_ptr
= LLVMBuildGEP(ctx
->builder
, ptr
, &index
, 1, "");
2961 LLVMBuildStore(ctx
->builder
,
2962 to_integer(ctx
, value
), derived_ptr
);
2971 static int image_type_to_components_count(enum glsl_sampler_dim dim
, bool array
)
2974 case GLSL_SAMPLER_DIM_BUF
:
2976 case GLSL_SAMPLER_DIM_1D
:
2977 return array
? 2 : 1;
2978 case GLSL_SAMPLER_DIM_2D
:
2979 return array
? 3 : 2;
2980 case GLSL_SAMPLER_DIM_MS
:
2981 return array
? 4 : 3;
2982 case GLSL_SAMPLER_DIM_3D
:
2983 case GLSL_SAMPLER_DIM_CUBE
:
2985 case GLSL_SAMPLER_DIM_RECT
:
2986 case GLSL_SAMPLER_DIM_SUBPASS
:
2988 case GLSL_SAMPLER_DIM_SUBPASS_MS
:
2998 /* Adjust the sample index according to FMASK.
3000 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3001 * which is the identity mapping. Each nibble says which physical sample
3002 * should be fetched to get that sample.
3004 * For example, 0x11111100 means there are only 2 samples stored and
3005 * the second sample covers 3/4 of the pixel. When reading samples 0
3006 * and 1, return physical sample 0 (determined by the first two 0s
3007 * in FMASK), otherwise return physical sample 1.
3009 * The sample index should be adjusted as follows:
3010 * sample_index = (fmask >> (sample_index * 4)) & 0xF;
3012 static LLVMValueRef
adjust_sample_index_using_fmask(struct nir_to_llvm_context
*ctx
,
3013 LLVMValueRef coord_x
, LLVMValueRef coord_y
,
3014 LLVMValueRef coord_z
,
3015 LLVMValueRef sample_index
,
3016 LLVMValueRef fmask_desc_ptr
)
3018 LLVMValueRef fmask_load_address
[4];
3021 fmask_load_address
[0] = coord_x
;
3022 fmask_load_address
[1] = coord_y
;
3024 fmask_load_address
[2] = coord_z
;
3025 fmask_load_address
[3] = LLVMGetUndef(ctx
->i32
);
3028 struct ac_image_args args
= {0};
3030 args
.opcode
= ac_image_load
;
3031 args
.da
= coord_z
? true : false;
3032 args
.resource
= fmask_desc_ptr
;
3034 args
.addr
= ac_build_gather_values(&ctx
->ac
, fmask_load_address
, coord_z
? 4 : 2);
3036 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3038 res
= to_integer(ctx
, res
);
3039 LLVMValueRef four
= LLVMConstInt(ctx
->i32
, 4, false);
3040 LLVMValueRef F
= LLVMConstInt(ctx
->i32
, 0xf, false);
3042 LLVMValueRef fmask
= LLVMBuildExtractElement(ctx
->builder
,
3046 LLVMValueRef sample_index4
=
3047 LLVMBuildMul(ctx
->builder
, sample_index
, four
, "");
3048 LLVMValueRef shifted_fmask
=
3049 LLVMBuildLShr(ctx
->builder
, fmask
, sample_index4
, "");
3050 LLVMValueRef final_sample
=
3051 LLVMBuildAnd(ctx
->builder
, shifted_fmask
, F
, "");
3053 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3054 * resource descriptor is 0 (invalid),
3056 LLVMValueRef fmask_desc
=
3057 LLVMBuildBitCast(ctx
->builder
, fmask_desc_ptr
,
3060 LLVMValueRef fmask_word1
=
3061 LLVMBuildExtractElement(ctx
->builder
, fmask_desc
,
3064 LLVMValueRef word1_is_nonzero
=
3065 LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3066 fmask_word1
, ctx
->i32zero
, "");
3068 /* Replace the MSAA sample index. */
3070 LLVMBuildSelect(ctx
->builder
, word1_is_nonzero
,
3071 final_sample
, sample_index
, "");
3072 return sample_index
;
3075 static LLVMValueRef
get_image_coords(struct nir_to_llvm_context
*ctx
,
3076 nir_intrinsic_instr
*instr
)
3078 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3079 if(instr
->variables
[0]->deref
.child
)
3080 type
= instr
->variables
[0]->deref
.child
->type
;
3082 LLVMValueRef src0
= get_src(ctx
, instr
->src
[0]);
3083 LLVMValueRef coords
[4];
3084 LLVMValueRef masks
[] = {
3085 LLVMConstInt(ctx
->i32
, 0, false), LLVMConstInt(ctx
->i32
, 1, false),
3086 LLVMConstInt(ctx
->i32
, 2, false), LLVMConstInt(ctx
->i32
, 3, false),
3089 LLVMValueRef sample_index
= llvm_extract_elem(ctx
, get_src(ctx
, instr
->src
[1]), 0);
3092 enum glsl_sampler_dim dim
= glsl_get_sampler_dim(type
);
3093 bool add_frag_pos
= (dim
== GLSL_SAMPLER_DIM_SUBPASS
||
3094 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3095 bool is_ms
= (dim
== GLSL_SAMPLER_DIM_MS
||
3096 dim
== GLSL_SAMPLER_DIM_SUBPASS_MS
);
3098 count
= image_type_to_components_count(dim
,
3099 glsl_sampler_type_is_array(type
));
3102 LLVMValueRef fmask_load_address
[3];
3105 fmask_load_address
[0] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3106 fmask_load_address
[1] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[1], "");
3107 if (glsl_sampler_type_is_array(type
))
3108 fmask_load_address
[2] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[2], "");
3110 fmask_load_address
[2] = NULL
;
3112 for (chan
= 0; chan
< 2; ++chan
)
3113 fmask_load_address
[chan
] = LLVMBuildAdd(ctx
->builder
, fmask_load_address
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3115 sample_index
= adjust_sample_index_using_fmask(ctx
,
3116 fmask_load_address
[0],
3117 fmask_load_address
[1],
3118 fmask_load_address
[2],
3120 get_sampler_desc(ctx
, instr
->variables
[0], DESC_FMASK
));
3123 if (instr
->src
[0].ssa
->num_components
)
3124 res
= LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[0], "");
3131 for (chan
= 0; chan
< count
; ++chan
) {
3132 coords
[chan
] = LLVMBuildExtractElement(ctx
->builder
, src0
, masks
[chan
], "");
3136 for (chan
= 0; chan
< count
; ++chan
)
3137 coords
[chan
] = LLVMBuildAdd(ctx
->builder
, coords
[chan
], LLVMBuildFPToUI(ctx
->builder
, ctx
->frag_pos
[chan
], ctx
->i32
, ""), "");
3140 coords
[count
] = sample_index
;
3145 coords
[3] = LLVMGetUndef(ctx
->i32
);
3148 res
= ac_build_gather_values(&ctx
->ac
, coords
, count
);
3153 static LLVMValueRef
visit_image_load(struct nir_to_llvm_context
*ctx
,
3154 nir_intrinsic_instr
*instr
)
3156 LLVMValueRef params
[7];
3158 char intrinsic_name
[64];
3159 const nir_variable
*var
= instr
->variables
[0]->var
;
3160 const struct glsl_type
*type
= var
->type
;
3161 if(instr
->variables
[0]->deref
.child
)
3162 type
= instr
->variables
[0]->deref
.child
->type
;
3164 type
= glsl_without_array(type
);
3165 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3166 params
[0] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3167 params
[1] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3168 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3169 params
[2] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3170 params
[3] = ctx
->i1false
; /* glc */
3171 params
[4] = ctx
->i1false
; /* slc */
3172 res
= ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.load.format.v4f32", ctx
->v4f32
,
3175 res
= trim_vector(ctx
, res
, instr
->dest
.ssa
.num_components
);
3176 res
= to_integer(ctx
, res
);
3178 bool is_da
= glsl_sampler_type_is_array(type
) ||
3179 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3180 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3181 LLVMValueRef glc
= ctx
->i1false
;
3182 LLVMValueRef slc
= ctx
->i1false
;
3184 params
[0] = get_image_coords(ctx
, instr
);
3185 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3186 params
[2] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3187 if (HAVE_LLVM
<= 0x0309) {
3188 params
[3] = ctx
->i1false
; /* r128 */
3193 LLVMValueRef lwe
= ctx
->i1false
;
3200 ac_get_image_intr_name("llvm.amdgcn.image.load",
3201 ctx
->v4f32
, /* vdata */
3202 LLVMTypeOf(params
[0]), /* coords */
3203 LLVMTypeOf(params
[1]), /* rsrc */
3204 intrinsic_name
, sizeof(intrinsic_name
));
3206 res
= ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->v4f32
,
3207 params
, 7, AC_FUNC_ATTR_READONLY
);
3209 return to_integer(ctx
, res
);
3212 static void visit_image_store(struct nir_to_llvm_context
*ctx
,
3213 nir_intrinsic_instr
*instr
)
3215 LLVMValueRef params
[8];
3216 char intrinsic_name
[64];
3217 const nir_variable
*var
= instr
->variables
[0]->var
;
3218 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3220 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3221 ctx
->shader_info
->fs
.writes_memory
= true;
3223 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3224 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2])); /* data */
3225 params
[1] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3226 params
[2] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3227 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3228 params
[3] = LLVMConstInt(ctx
->i32
, 0, false); /* voffset */
3229 params
[4] = ctx
->i1false
; /* glc */
3230 params
[5] = ctx
->i1false
; /* slc */
3231 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.buffer.store.format.v4f32", ctx
->voidt
,
3234 bool is_da
= glsl_sampler_type_is_array(type
) ||
3235 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3236 LLVMValueRef da
= is_da
? ctx
->i1true
: ctx
->i1false
;
3237 LLVMValueRef glc
= ctx
->i1false
;
3238 LLVMValueRef slc
= ctx
->i1false
;
3240 params
[0] = to_float(ctx
, get_src(ctx
, instr
->src
[2]));
3241 params
[1] = get_image_coords(ctx
, instr
); /* coords */
3242 params
[2] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3243 params
[3] = LLVMConstInt(ctx
->i32
, 15, false); /* dmask */
3244 if (HAVE_LLVM
<= 0x0309) {
3245 params
[4] = ctx
->i1false
; /* r128 */
3250 LLVMValueRef lwe
= ctx
->i1false
;
3257 ac_get_image_intr_name("llvm.amdgcn.image.store",
3258 LLVMTypeOf(params
[0]), /* vdata */
3259 LLVMTypeOf(params
[1]), /* coords */
3260 LLVMTypeOf(params
[2]), /* rsrc */
3261 intrinsic_name
, sizeof(intrinsic_name
));
3263 ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->voidt
,
3269 static LLVMValueRef
visit_image_atomic(struct nir_to_llvm_context
*ctx
,
3270 nir_intrinsic_instr
*instr
)
3272 LLVMValueRef params
[6];
3273 int param_count
= 0;
3274 const nir_variable
*var
= instr
->variables
[0]->var
;
3276 const char *base_name
= "llvm.amdgcn.image.atomic";
3277 const char *atomic_name
;
3278 LLVMValueRef coords
;
3279 char intrinsic_name
[32], coords_type
[8];
3280 const struct glsl_type
*type
= glsl_without_array(var
->type
);
3282 if (ctx
->stage
== MESA_SHADER_FRAGMENT
)
3283 ctx
->shader_info
->fs
.writes_memory
= true;
3285 params
[param_count
++] = get_src(ctx
, instr
->src
[2]);
3286 if (instr
->intrinsic
== nir_intrinsic_image_atomic_comp_swap
)
3287 params
[param_count
++] = get_src(ctx
, instr
->src
[3]);
3289 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
) {
3290 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
);
3291 coords
= params
[param_count
++] = LLVMBuildExtractElement(ctx
->builder
, get_src(ctx
, instr
->src
[0]),
3292 LLVMConstInt(ctx
->i32
, 0, false), ""); /* vindex */
3293 params
[param_count
++] = ctx
->i32zero
; /* voffset */
3294 params
[param_count
++] = ctx
->i1false
; /* glc */
3295 params
[param_count
++] = ctx
->i1false
; /* slc */
3297 bool da
= glsl_sampler_type_is_array(type
) ||
3298 glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
;
3300 coords
= params
[param_count
++] = get_image_coords(ctx
, instr
);
3301 params
[param_count
++] = get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3302 params
[param_count
++] = ctx
->i1false
; /* r128 */
3303 params
[param_count
++] = da
? ctx
->i1true
: ctx
->i1false
; /* da */
3304 params
[param_count
++] = ctx
->i1false
; /* slc */
3307 switch (instr
->intrinsic
) {
3308 case nir_intrinsic_image_atomic_add
:
3309 atomic_name
= "add";
3311 case nir_intrinsic_image_atomic_min
:
3312 atomic_name
= "smin";
3314 case nir_intrinsic_image_atomic_max
:
3315 atomic_name
= "smax";
3317 case nir_intrinsic_image_atomic_and
:
3318 atomic_name
= "and";
3320 case nir_intrinsic_image_atomic_or
:
3323 case nir_intrinsic_image_atomic_xor
:
3324 atomic_name
= "xor";
3326 case nir_intrinsic_image_atomic_exchange
:
3327 atomic_name
= "swap";
3329 case nir_intrinsic_image_atomic_comp_swap
:
3330 atomic_name
= "cmpswap";
3335 build_int_type_name(LLVMTypeOf(coords
),
3336 coords_type
, sizeof(coords_type
));
3338 snprintf(intrinsic_name
, sizeof(intrinsic_name
),
3339 "%s.%s.%s", base_name
, atomic_name
, coords_type
);
3340 return ac_build_intrinsic(&ctx
->ac
, intrinsic_name
, ctx
->i32
, params
, param_count
, 0);
3343 static LLVMValueRef
visit_image_size(struct nir_to_llvm_context
*ctx
,
3344 nir_intrinsic_instr
*instr
)
3347 const nir_variable
*var
= instr
->variables
[0]->var
;
3348 const struct glsl_type
*type
= instr
->variables
[0]->var
->type
;
3349 bool da
= glsl_sampler_type_is_array(var
->type
) ||
3350 glsl_get_sampler_dim(var
->type
) == GLSL_SAMPLER_DIM_CUBE
;
3351 if(instr
->variables
[0]->deref
.child
)
3352 type
= instr
->variables
[0]->deref
.child
->type
;
3354 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_BUF
)
3355 return get_buffer_size(ctx
, get_sampler_desc(ctx
, instr
->variables
[0], DESC_BUFFER
), true);
3357 struct ac_image_args args
= { 0 };
3361 args
.resource
= get_sampler_desc(ctx
, instr
->variables
[0], DESC_IMAGE
);
3362 args
.opcode
= ac_image_get_resinfo
;
3363 args
.addr
= ctx
->i32zero
;
3365 res
= ac_build_image_opcode(&ctx
->ac
, &args
);
3367 if (glsl_get_sampler_dim(type
) == GLSL_SAMPLER_DIM_CUBE
&&
3368 glsl_sampler_type_is_array(type
)) {
3369 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
3370 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
3371 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, res
, two
, "");
3372 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
3373 res
= LLVMBuildInsertElement(ctx
->builder
, res
, z
, two
, "");
3378 #define NOOP_WAITCNT 0xf7f
3379 #define LGKM_CNT 0x07f
3380 #define VM_CNT 0xf70
3382 static void emit_waitcnt(struct nir_to_llvm_context
*ctx
,
3385 LLVMValueRef args
[1] = {
3386 LLVMConstInt(ctx
->i32
, simm16
, false),
3388 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.waitcnt",
3389 ctx
->voidt
, args
, 1, 0);
3392 static void emit_barrier(struct nir_to_llvm_context
*ctx
)
3394 /* SI only (thanks to a hw bug workaround):
3395 * The real barrier instruction isn’t needed, because an entire patch
3396 * always fits into a single wave.
3398 if (ctx
->options
->chip_class
== SI
&&
3399 ctx
->stage
== MESA_SHADER_TESS_CTRL
) {
3400 emit_waitcnt(ctx
, LGKM_CNT
& VM_CNT
);
3403 ac_build_intrinsic(&ctx
->ac
, "llvm.amdgcn.s.barrier",
3404 ctx
->voidt
, NULL
, 0, AC_FUNC_ATTR_CONVERGENT
);
3407 static void emit_discard_if(struct nir_to_llvm_context
*ctx
,
3408 nir_intrinsic_instr
*instr
)
3411 ctx
->shader_info
->fs
.can_discard
= true;
3413 cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
,
3414 get_src(ctx
, instr
->src
[0]),
3417 cond
= LLVMBuildSelect(ctx
->builder
, cond
,
3418 LLVMConstReal(ctx
->f32
, -1.0f
),
3420 ac_build_kill(&ctx
->ac
, cond
);
3424 visit_load_local_invocation_index(struct nir_to_llvm_context
*ctx
)
3426 LLVMValueRef result
;
3427 LLVMValueRef thread_id
= ac_get_thread_id(&ctx
->ac
);
3428 result
= LLVMBuildAnd(ctx
->builder
, ctx
->tg_size
,
3429 LLVMConstInt(ctx
->i32
, 0xfc0, false), "");
3431 return LLVMBuildAdd(ctx
->builder
, result
, thread_id
, "");
3434 static LLVMValueRef
visit_var_atomic(struct nir_to_llvm_context
*ctx
,
3435 nir_intrinsic_instr
*instr
)
3437 LLVMValueRef ptr
, result
;
3438 int idx
= instr
->variables
[0]->var
->data
.driver_location
;
3439 LLVMValueRef src
= get_src(ctx
, instr
->src
[0]);
3440 ptr
= get_shared_memory_ptr(ctx
, idx
, ctx
->i32
);
3442 if (instr
->intrinsic
== nir_intrinsic_var_atomic_comp_swap
) {
3443 LLVMValueRef src1
= get_src(ctx
, instr
->src
[1]);
3444 result
= LLVMBuildAtomicCmpXchg(ctx
->builder
,
3446 LLVMAtomicOrderingSequentiallyConsistent
,
3447 LLVMAtomicOrderingSequentiallyConsistent
,
3450 LLVMAtomicRMWBinOp op
;
3451 switch (instr
->intrinsic
) {
3452 case nir_intrinsic_var_atomic_add
:
3453 op
= LLVMAtomicRMWBinOpAdd
;
3455 case nir_intrinsic_var_atomic_umin
:
3456 op
= LLVMAtomicRMWBinOpUMin
;
3458 case nir_intrinsic_var_atomic_umax
:
3459 op
= LLVMAtomicRMWBinOpUMax
;
3461 case nir_intrinsic_var_atomic_imin
:
3462 op
= LLVMAtomicRMWBinOpMin
;
3464 case nir_intrinsic_var_atomic_imax
:
3465 op
= LLVMAtomicRMWBinOpMax
;
3467 case nir_intrinsic_var_atomic_and
:
3468 op
= LLVMAtomicRMWBinOpAnd
;
3470 case nir_intrinsic_var_atomic_or
:
3471 op
= LLVMAtomicRMWBinOpOr
;
3473 case nir_intrinsic_var_atomic_xor
:
3474 op
= LLVMAtomicRMWBinOpXor
;
3476 case nir_intrinsic_var_atomic_exchange
:
3477 op
= LLVMAtomicRMWBinOpXchg
;
3483 result
= LLVMBuildAtomicRMW(ctx
->builder
, op
, ptr
, to_integer(ctx
, src
),
3484 LLVMAtomicOrderingSequentiallyConsistent
,
3490 #define INTERP_CENTER 0
3491 #define INTERP_CENTROID 1
3492 #define INTERP_SAMPLE 2
3494 static LLVMValueRef
lookup_interp_param(struct nir_to_llvm_context
*ctx
,
3495 enum glsl_interp_mode interp
, unsigned location
)
3498 case INTERP_MODE_FLAT
:
3501 case INTERP_MODE_SMOOTH
:
3502 case INTERP_MODE_NONE
:
3503 if (location
== INTERP_CENTER
)
3504 return ctx
->persp_center
;
3505 else if (location
== INTERP_CENTROID
)
3506 return ctx
->persp_centroid
;
3507 else if (location
== INTERP_SAMPLE
)
3508 return ctx
->persp_sample
;
3510 case INTERP_MODE_NOPERSPECTIVE
:
3511 if (location
== INTERP_CENTER
)
3512 return ctx
->linear_center
;
3513 else if (location
== INTERP_CENTROID
)
3514 return ctx
->linear_centroid
;
3515 else if (location
== INTERP_SAMPLE
)
3516 return ctx
->linear_sample
;
3522 static LLVMValueRef
load_sample_position(struct nir_to_llvm_context
*ctx
,
3523 LLVMValueRef sample_id
)
3525 LLVMValueRef result
;
3526 LLVMValueRef ptr
= ac_build_gep0(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_PS_SAMPLE_POSITIONS
, false));
3528 ptr
= LLVMBuildBitCast(ctx
->builder
, ptr
,
3529 const_array(ctx
->v2f32
, 64), "");
3531 sample_id
= LLVMBuildAdd(ctx
->builder
, sample_id
, ctx
->sample_pos_offset
, "");
3532 result
= ac_build_indexed_load(&ctx
->ac
, ptr
, sample_id
, false);
3537 static LLVMValueRef
load_sample_pos(struct nir_to_llvm_context
*ctx
)
3539 LLVMValueRef values
[2];
3541 values
[0] = emit_ffract(ctx
, ctx
->frag_pos
[0]);
3542 values
[1] = emit_ffract(ctx
, ctx
->frag_pos
[1]);
3543 return ac_build_gather_values(&ctx
->ac
, values
, 2);
3546 static LLVMValueRef
visit_interp(struct nir_to_llvm_context
*ctx
,
3547 nir_intrinsic_instr
*instr
)
3549 LLVMValueRef result
[2];
3550 LLVMValueRef interp_param
, attr_number
;
3553 LLVMValueRef src_c0
, src_c1
;
3555 int input_index
= instr
->variables
[0]->var
->data
.location
- VARYING_SLOT_VAR0
;
3556 switch (instr
->intrinsic
) {
3557 case nir_intrinsic_interp_var_at_centroid
:
3558 location
= INTERP_CENTROID
;
3560 case nir_intrinsic_interp_var_at_sample
:
3561 case nir_intrinsic_interp_var_at_offset
:
3562 location
= INTERP_CENTER
;
3563 src0
= get_src(ctx
, instr
->src
[0]);
3569 if (instr
->intrinsic
== nir_intrinsic_interp_var_at_offset
) {
3570 src_c0
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32zero
, ""));
3571 src_c1
= to_float(ctx
, LLVMBuildExtractElement(ctx
->builder
, src0
, ctx
->i32one
, ""));
3572 } else if (instr
->intrinsic
== nir_intrinsic_interp_var_at_sample
) {
3573 LLVMValueRef sample_position
;
3574 LLVMValueRef halfval
= LLVMConstReal(ctx
->f32
, 0.5f
);
3576 /* fetch sample ID */
3577 sample_position
= load_sample_position(ctx
, src0
);
3579 src_c0
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32zero
, "");
3580 src_c0
= LLVMBuildFSub(ctx
->builder
, src_c0
, halfval
, "");
3581 src_c1
= LLVMBuildExtractElement(ctx
->builder
, sample_position
, ctx
->i32one
, "");
3582 src_c1
= LLVMBuildFSub(ctx
->builder
, src_c1
, halfval
, "");
3584 interp_param
= lookup_interp_param(ctx
, instr
->variables
[0]->var
->data
.interpolation
, location
);
3585 attr_number
= LLVMConstInt(ctx
->i32
, input_index
, false);
3587 if (location
== INTERP_SAMPLE
|| location
== INTERP_CENTER
) {
3588 LLVMValueRef ij_out
[2];
3589 LLVMValueRef ddxy_out
= emit_ddxy_interp(ctx
, interp_param
);
3592 * take the I then J parameters, and the DDX/Y for it, and
3593 * calculate the IJ inputs for the interpolator.
3594 * temp1 = ddx * offset/sample.x + I;
3595 * interp_param.I = ddy * offset/sample.y + temp1;
3596 * temp1 = ddx * offset/sample.x + J;
3597 * interp_param.J = ddy * offset/sample.y + temp1;
3599 for (unsigned i
= 0; i
< 2; i
++) {
3600 LLVMValueRef ix_ll
= LLVMConstInt(ctx
->i32
, i
, false);
3601 LLVMValueRef iy_ll
= LLVMConstInt(ctx
->i32
, i
+ 2, false);
3602 LLVMValueRef ddx_el
= LLVMBuildExtractElement(ctx
->builder
,
3603 ddxy_out
, ix_ll
, "");
3604 LLVMValueRef ddy_el
= LLVMBuildExtractElement(ctx
->builder
,
3605 ddxy_out
, iy_ll
, "");
3606 LLVMValueRef interp_el
= LLVMBuildExtractElement(ctx
->builder
,
3607 interp_param
, ix_ll
, "");
3608 LLVMValueRef temp1
, temp2
;
3610 interp_el
= LLVMBuildBitCast(ctx
->builder
, interp_el
,
3613 temp1
= LLVMBuildFMul(ctx
->builder
, ddx_el
, src_c0
, "");
3614 temp1
= LLVMBuildFAdd(ctx
->builder
, temp1
, interp_el
, "");
3616 temp2
= LLVMBuildFMul(ctx
->builder
, ddy_el
, src_c1
, "");
3617 temp2
= LLVMBuildFAdd(ctx
->builder
, temp2
, temp1
, "");
3619 ij_out
[i
] = LLVMBuildBitCast(ctx
->builder
,
3620 temp2
, ctx
->i32
, "");
3622 interp_param
= ac_build_gather_values(&ctx
->ac
, ij_out
, 2);
3626 for (chan
= 0; chan
< 2; chan
++) {
3627 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
3630 interp_param
= LLVMBuildBitCast(ctx
->builder
,
3631 interp_param
, LLVMVectorType(ctx
->f32
, 2), "");
3632 LLVMValueRef i
= LLVMBuildExtractElement(
3633 ctx
->builder
, interp_param
, ctx
->i32zero
, "");
3634 LLVMValueRef j
= LLVMBuildExtractElement(
3635 ctx
->builder
, interp_param
, ctx
->i32one
, "");
3637 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
3638 llvm_chan
, attr_number
,
3639 ctx
->prim_mask
, i
, j
);
3641 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
3642 LLVMConstInt(ctx
->i32
, 2, false),
3643 llvm_chan
, attr_number
,
3647 return ac_build_gather_values(&ctx
->ac
, result
, 2);
3651 visit_emit_vertex(struct nir_to_llvm_context
*ctx
,
3652 nir_intrinsic_instr
*instr
)
3654 LLVMValueRef gs_next_vertex
;
3655 LLVMValueRef can_emit
, kill
;
3658 assert(instr
->const_index
[0] == 0);
3659 /* Write vertex attribute values to GSVS ring */
3660 gs_next_vertex
= LLVMBuildLoad(ctx
->builder
,
3661 ctx
->gs_next_vertex
,
3664 /* If this thread has already emitted the declared maximum number of
3665 * vertices, kill it: excessive vertex emissions are not supposed to
3666 * have any effect, and GS threads have no externally observable
3667 * effects other than emitting vertices.
3669 can_emit
= LLVMBuildICmp(ctx
->builder
, LLVMIntULT
, gs_next_vertex
,
3670 LLVMConstInt(ctx
->i32
, ctx
->gs_max_out_vertices
, false), "");
3672 kill
= LLVMBuildSelect(ctx
->builder
, can_emit
,
3673 LLVMConstReal(ctx
->f32
, 1.0f
),
3674 LLVMConstReal(ctx
->f32
, -1.0f
), "");
3675 ac_build_kill(&ctx
->ac
, kill
);
3677 /* loop num outputs */
3679 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
3680 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
3685 if (!(ctx
->output_mask
& (1ull << i
)))
3688 if (i
== VARYING_SLOT_CLIP_DIST0
) {
3689 /* pack clip and cull into a single set of slots */
3690 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
3694 for (unsigned j
= 0; j
< length
; j
++) {
3695 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
,
3697 LLVMValueRef voffset
= LLVMConstInt(ctx
->i32
, (slot
* 4 + j
) * ctx
->gs_max_out_vertices
, false);
3698 voffset
= LLVMBuildAdd(ctx
->builder
, voffset
, gs_next_vertex
, "");
3699 voffset
= LLVMBuildMul(ctx
->builder
, voffset
, LLVMConstInt(ctx
->i32
, 4, false), "");
3701 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
3703 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->gsvs_ring
,
3705 voffset
, ctx
->gs2vs_offset
, 0,
3711 gs_next_vertex
= LLVMBuildAdd(ctx
->builder
, gs_next_vertex
,
3713 LLVMBuildStore(ctx
->builder
, gs_next_vertex
, ctx
->gs_next_vertex
);
3715 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_EMIT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3719 visit_end_primitive(struct nir_to_llvm_context
*ctx
,
3720 nir_intrinsic_instr
*instr
)
3722 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_CUT
| AC_SENDMSG_GS
| (0 << 8), ctx
->gs_wave_id
);
3726 visit_load_tess_coord(struct nir_to_llvm_context
*ctx
,
3727 nir_intrinsic_instr
*instr
)
3729 LLVMValueRef coord
[4] = {
3736 if (ctx
->tes_primitive_mode
== GL_TRIANGLES
)
3737 coord
[2] = LLVMBuildFSub(ctx
->builder
, ctx
->f32one
,
3738 LLVMBuildFAdd(ctx
->builder
, coord
[0], coord
[1], ""), "");
3740 LLVMValueRef result
= ac_build_gather_values(&ctx
->ac
, coord
, instr
->num_components
);
3741 return LLVMBuildBitCast(ctx
->builder
, result
,
3742 get_def_type(ctx
, &instr
->dest
.ssa
), "");
3745 static void visit_intrinsic(struct nir_to_llvm_context
*ctx
,
3746 nir_intrinsic_instr
*instr
)
3748 LLVMValueRef result
= NULL
;
3750 switch (instr
->intrinsic
) {
3751 case nir_intrinsic_load_work_group_id
: {
3752 result
= ctx
->workgroup_ids
;
3755 case nir_intrinsic_load_base_vertex
: {
3756 result
= ctx
->base_vertex
;
3759 case nir_intrinsic_load_vertex_id_zero_base
: {
3760 result
= ctx
->vertex_id
;
3763 case nir_intrinsic_load_local_invocation_id
: {
3764 result
= ctx
->local_invocation_ids
;
3767 case nir_intrinsic_load_base_instance
:
3768 result
= ctx
->start_instance
;
3770 case nir_intrinsic_load_draw_id
:
3771 result
= ctx
->draw_index
;
3773 case nir_intrinsic_load_invocation_id
:
3774 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
3775 result
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
3777 result
= ctx
->gs_invocation_id
;
3779 case nir_intrinsic_load_primitive_id
:
3780 if (ctx
->stage
== MESA_SHADER_GEOMETRY
)
3781 result
= ctx
->gs_prim_id
;
3782 else if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
3783 result
= ctx
->tcs_patch_id
;
3784 else if (ctx
->stage
== MESA_SHADER_TESS_EVAL
)
3785 result
= ctx
->tes_patch_id
;
3787 fprintf(stderr
, "Unknown primitive id intrinsic: %d", ctx
->stage
);
3789 case nir_intrinsic_load_sample_id
:
3790 ctx
->shader_info
->fs
.force_persample
= true;
3791 result
= unpack_param(ctx
, ctx
->ancillary
, 8, 4);
3793 case nir_intrinsic_load_sample_pos
:
3794 ctx
->shader_info
->fs
.force_persample
= true;
3795 result
= load_sample_pos(ctx
);
3797 case nir_intrinsic_load_sample_mask_in
:
3798 result
= ctx
->sample_coverage
;
3800 case nir_intrinsic_load_front_face
:
3801 result
= ctx
->front_face
;
3803 case nir_intrinsic_load_instance_id
:
3804 result
= ctx
->instance_id
;
3805 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
3806 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
3808 case nir_intrinsic_load_num_work_groups
:
3809 result
= ctx
->num_work_groups
;
3811 case nir_intrinsic_load_local_invocation_index
:
3812 result
= visit_load_local_invocation_index(ctx
);
3814 case nir_intrinsic_load_push_constant
:
3815 result
= visit_load_push_constant(ctx
, instr
);
3817 case nir_intrinsic_vulkan_resource_index
:
3818 result
= visit_vulkan_resource_index(ctx
, instr
);
3820 case nir_intrinsic_store_ssbo
:
3821 visit_store_ssbo(ctx
, instr
);
3823 case nir_intrinsic_load_ssbo
:
3824 result
= visit_load_buffer(ctx
, instr
);
3826 case nir_intrinsic_ssbo_atomic_add
:
3827 case nir_intrinsic_ssbo_atomic_imin
:
3828 case nir_intrinsic_ssbo_atomic_umin
:
3829 case nir_intrinsic_ssbo_atomic_imax
:
3830 case nir_intrinsic_ssbo_atomic_umax
:
3831 case nir_intrinsic_ssbo_atomic_and
:
3832 case nir_intrinsic_ssbo_atomic_or
:
3833 case nir_intrinsic_ssbo_atomic_xor
:
3834 case nir_intrinsic_ssbo_atomic_exchange
:
3835 case nir_intrinsic_ssbo_atomic_comp_swap
:
3836 result
= visit_atomic_ssbo(ctx
, instr
);
3838 case nir_intrinsic_load_ubo
:
3839 result
= visit_load_ubo_buffer(ctx
, instr
);
3841 case nir_intrinsic_get_buffer_size
:
3842 result
= visit_get_buffer_size(ctx
, instr
);
3844 case nir_intrinsic_load_var
:
3845 result
= visit_load_var(ctx
, instr
);
3847 case nir_intrinsic_store_var
:
3848 visit_store_var(ctx
, instr
);
3850 case nir_intrinsic_image_load
:
3851 result
= visit_image_load(ctx
, instr
);
3853 case nir_intrinsic_image_store
:
3854 visit_image_store(ctx
, instr
);
3856 case nir_intrinsic_image_atomic_add
:
3857 case nir_intrinsic_image_atomic_min
:
3858 case nir_intrinsic_image_atomic_max
:
3859 case nir_intrinsic_image_atomic_and
:
3860 case nir_intrinsic_image_atomic_or
:
3861 case nir_intrinsic_image_atomic_xor
:
3862 case nir_intrinsic_image_atomic_exchange
:
3863 case nir_intrinsic_image_atomic_comp_swap
:
3864 result
= visit_image_atomic(ctx
, instr
);
3866 case nir_intrinsic_image_size
:
3867 result
= visit_image_size(ctx
, instr
);
3869 case nir_intrinsic_discard
:
3870 ctx
->shader_info
->fs
.can_discard
= true;
3871 ac_build_intrinsic(&ctx
->ac
, "llvm.AMDGPU.kilp",
3873 NULL
, 0, AC_FUNC_ATTR_LEGACY
);
3875 case nir_intrinsic_discard_if
:
3876 emit_discard_if(ctx
, instr
);
3878 case nir_intrinsic_memory_barrier
:
3879 emit_waitcnt(ctx
, VM_CNT
);
3881 case nir_intrinsic_barrier
:
3884 case nir_intrinsic_var_atomic_add
:
3885 case nir_intrinsic_var_atomic_imin
:
3886 case nir_intrinsic_var_atomic_umin
:
3887 case nir_intrinsic_var_atomic_imax
:
3888 case nir_intrinsic_var_atomic_umax
:
3889 case nir_intrinsic_var_atomic_and
:
3890 case nir_intrinsic_var_atomic_or
:
3891 case nir_intrinsic_var_atomic_xor
:
3892 case nir_intrinsic_var_atomic_exchange
:
3893 case nir_intrinsic_var_atomic_comp_swap
:
3894 result
= visit_var_atomic(ctx
, instr
);
3896 case nir_intrinsic_interp_var_at_centroid
:
3897 case nir_intrinsic_interp_var_at_sample
:
3898 case nir_intrinsic_interp_var_at_offset
:
3899 result
= visit_interp(ctx
, instr
);
3901 case nir_intrinsic_emit_vertex
:
3902 visit_emit_vertex(ctx
, instr
);
3904 case nir_intrinsic_end_primitive
:
3905 visit_end_primitive(ctx
, instr
);
3907 case nir_intrinsic_load_tess_coord
:
3908 result
= visit_load_tess_coord(ctx
, instr
);
3910 case nir_intrinsic_load_patch_vertices_in
:
3911 result
= LLVMConstInt(ctx
->i32
, ctx
->options
->key
.tcs
.input_vertices
, false);
3914 fprintf(stderr
, "Unknown intrinsic: ");
3915 nir_print_instr(&instr
->instr
, stderr
);
3916 fprintf(stderr
, "\n");
3920 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
3924 static LLVMValueRef
get_sampler_desc(struct nir_to_llvm_context
*ctx
,
3925 nir_deref_var
*deref
,
3926 enum desc_type desc_type
)
3928 unsigned desc_set
= deref
->var
->data
.descriptor_set
;
3929 LLVMValueRef list
= ctx
->descriptor_sets
[desc_set
];
3930 struct radv_descriptor_set_layout
*layout
= ctx
->options
->layout
->set
[desc_set
].layout
;
3931 struct radv_descriptor_set_binding_layout
*binding
= layout
->binding
+ deref
->var
->data
.binding
;
3932 unsigned offset
= binding
->offset
;
3933 unsigned stride
= binding
->size
;
3935 LLVMBuilderRef builder
= ctx
->builder
;
3937 LLVMValueRef index
= NULL
;
3938 unsigned constant_index
= 0;
3940 assert(deref
->var
->data
.binding
< layout
->binding_count
);
3942 switch (desc_type
) {
3954 if (binding
->type
== VK_DESCRIPTOR_TYPE_COMBINED_IMAGE_SAMPLER
)
3964 unreachable("invalid desc_type\n");
3967 if (deref
->deref
.child
) {
3968 nir_deref_array
*child
= (nir_deref_array
*)deref
->deref
.child
;
3970 assert(child
->deref_array_type
!= nir_deref_array_type_wildcard
);
3971 offset
+= child
->base_offset
* stride
;
3972 if (child
->deref_array_type
== nir_deref_array_type_indirect
) {
3973 index
= get_src(ctx
, child
->indirect
);
3976 constant_index
= child
->base_offset
;
3978 if (desc_type
== DESC_SAMPLER
&& binding
->immutable_samplers_offset
&&
3979 (!index
|| binding
->immutable_samplers_equal
)) {
3980 if (binding
->immutable_samplers_equal
)
3983 const uint32_t *samplers
= radv_immutable_samplers(layout
, binding
);
3985 LLVMValueRef constants
[] = {
3986 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 0], 0),
3987 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 1], 0),
3988 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 2], 0),
3989 LLVMConstInt(ctx
->i32
, samplers
[constant_index
* 4 + 3], 0),
3991 return ac_build_gather_values(&ctx
->ac
, constants
, 4);
3994 assert(stride
% type_size
== 0);
3997 index
= ctx
->i32zero
;
3999 index
= LLVMBuildMul(builder
, index
, LLVMConstInt(ctx
->i32
, stride
/ type_size
, 0), "");
4001 list
= ac_build_gep0(&ctx
->ac
, list
, LLVMConstInt(ctx
->i32
, offset
, 0));
4002 list
= LLVMBuildPointerCast(builder
, list
, const_array(type
, 0), "");
4004 return ac_build_indexed_load_const(&ctx
->ac
, list
, index
);
4007 static void set_tex_fetch_args(struct nir_to_llvm_context
*ctx
,
4008 struct ac_image_args
*args
,
4009 nir_tex_instr
*instr
,
4011 LLVMValueRef res_ptr
, LLVMValueRef samp_ptr
,
4012 LLVMValueRef
*param
, unsigned count
,
4015 unsigned is_rect
= 0;
4016 bool da
= instr
->is_array
|| instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
;
4018 if (op
== nir_texop_lod
)
4020 /* Pad to power of two vector */
4021 while (count
< util_next_power_of_two(count
))
4022 param
[count
++] = LLVMGetUndef(ctx
->i32
);
4025 args
->addr
= ac_build_gather_values(&ctx
->ac
, param
, count
);
4027 args
->addr
= param
[0];
4029 args
->resource
= res_ptr
;
4030 args
->sampler
= samp_ptr
;
4032 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
&& op
== nir_texop_txf
) {
4033 args
->addr
= param
[0];
4037 args
->dmask
= dmask
;
4038 args
->unorm
= is_rect
;
4042 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4045 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4046 * filtering manually. The driver sets img7 to a mask clearing
4047 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4048 * s_and_b32 samp0, samp0, img7
4051 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4053 static LLVMValueRef
sici_fix_sampler_aniso(struct nir_to_llvm_context
*ctx
,
4054 LLVMValueRef res
, LLVMValueRef samp
)
4056 LLVMBuilderRef builder
= ctx
->builder
;
4057 LLVMValueRef img7
, samp0
;
4059 if (ctx
->options
->chip_class
>= VI
)
4062 img7
= LLVMBuildExtractElement(builder
, res
,
4063 LLVMConstInt(ctx
->i32
, 7, 0), "");
4064 samp0
= LLVMBuildExtractElement(builder
, samp
,
4065 LLVMConstInt(ctx
->i32
, 0, 0), "");
4066 samp0
= LLVMBuildAnd(builder
, samp0
, img7
, "");
4067 return LLVMBuildInsertElement(builder
, samp
, samp0
,
4068 LLVMConstInt(ctx
->i32
, 0, 0), "");
4071 static void tex_fetch_ptrs(struct nir_to_llvm_context
*ctx
,
4072 nir_tex_instr
*instr
,
4073 LLVMValueRef
*res_ptr
, LLVMValueRef
*samp_ptr
,
4074 LLVMValueRef
*fmask_ptr
)
4076 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
)
4077 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_BUFFER
);
4079 *res_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_IMAGE
);
4082 *samp_ptr
= get_sampler_desc(ctx
, instr
->sampler
, DESC_SAMPLER
);
4084 *samp_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_SAMPLER
);
4085 if (instr
->sampler_dim
< GLSL_SAMPLER_DIM_RECT
)
4086 *samp_ptr
= sici_fix_sampler_aniso(ctx
, *res_ptr
, *samp_ptr
);
4088 if (fmask_ptr
&& !instr
->sampler
&& (instr
->op
== nir_texop_txf_ms
||
4089 instr
->op
== nir_texop_samples_identical
))
4090 *fmask_ptr
= get_sampler_desc(ctx
, instr
->texture
, DESC_FMASK
);
4093 static LLVMValueRef
apply_round_slice(struct nir_to_llvm_context
*ctx
,
4096 coord
= to_float(ctx
, coord
);
4097 coord
= ac_build_intrinsic(&ctx
->ac
, "llvm.rint.f32", ctx
->f32
, &coord
, 1, 0);
4098 coord
= to_integer(ctx
, coord
);
4102 static void visit_tex(struct nir_to_llvm_context
*ctx
, nir_tex_instr
*instr
)
4104 LLVMValueRef result
= NULL
;
4105 struct ac_image_args args
= { 0 };
4106 unsigned dmask
= 0xf;
4107 LLVMValueRef address
[16];
4108 LLVMValueRef coords
[5];
4109 LLVMValueRef coord
= NULL
, lod
= NULL
, comparator
= NULL
;
4110 LLVMValueRef bias
= NULL
, offsets
= NULL
;
4111 LLVMValueRef res_ptr
, samp_ptr
, fmask_ptr
= NULL
, sample_index
= NULL
;
4112 LLVMValueRef ddx
= NULL
, ddy
= NULL
;
4113 LLVMValueRef derivs
[6];
4114 unsigned chan
, count
= 0;
4115 unsigned const_src
= 0, num_deriv_comp
= 0;
4117 tex_fetch_ptrs(ctx
, instr
, &res_ptr
, &samp_ptr
, &fmask_ptr
);
4119 for (unsigned i
= 0; i
< instr
->num_srcs
; i
++) {
4120 switch (instr
->src
[i
].src_type
) {
4121 case nir_tex_src_coord
:
4122 coord
= get_src(ctx
, instr
->src
[i
].src
);
4124 case nir_tex_src_projector
:
4126 case nir_tex_src_comparator
:
4127 comparator
= get_src(ctx
, instr
->src
[i
].src
);
4129 case nir_tex_src_offset
:
4130 offsets
= get_src(ctx
, instr
->src
[i
].src
);
4133 case nir_tex_src_bias
:
4134 bias
= get_src(ctx
, instr
->src
[i
].src
);
4136 case nir_tex_src_lod
:
4137 lod
= get_src(ctx
, instr
->src
[i
].src
);
4139 case nir_tex_src_ms_index
:
4140 sample_index
= get_src(ctx
, instr
->src
[i
].src
);
4142 case nir_tex_src_ms_mcs
:
4144 case nir_tex_src_ddx
:
4145 ddx
= get_src(ctx
, instr
->src
[i
].src
);
4146 num_deriv_comp
= instr
->src
[i
].src
.ssa
->num_components
;
4148 case nir_tex_src_ddy
:
4149 ddy
= get_src(ctx
, instr
->src
[i
].src
);
4151 case nir_tex_src_texture_offset
:
4152 case nir_tex_src_sampler_offset
:
4153 case nir_tex_src_plane
:
4159 if (instr
->op
== nir_texop_txs
&& instr
->sampler_dim
== GLSL_SAMPLER_DIM_BUF
) {
4160 result
= get_buffer_size(ctx
, res_ptr
, true);
4164 if (instr
->op
== nir_texop_texture_samples
) {
4165 LLVMValueRef res
, samples
, is_msaa
;
4166 res
= LLVMBuildBitCast(ctx
->builder
, res_ptr
, ctx
->v8i32
, "");
4167 samples
= LLVMBuildExtractElement(ctx
->builder
, res
,
4168 LLVMConstInt(ctx
->i32
, 3, false), "");
4169 is_msaa
= LLVMBuildLShr(ctx
->builder
, samples
,
4170 LLVMConstInt(ctx
->i32
, 28, false), "");
4171 is_msaa
= LLVMBuildAnd(ctx
->builder
, is_msaa
,
4172 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4173 is_msaa
= LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
, is_msaa
,
4174 LLVMConstInt(ctx
->i32
, 0xe, false), "");
4176 samples
= LLVMBuildLShr(ctx
->builder
, samples
,
4177 LLVMConstInt(ctx
->i32
, 16, false), "");
4178 samples
= LLVMBuildAnd(ctx
->builder
, samples
,
4179 LLVMConstInt(ctx
->i32
, 0xf, false), "");
4180 samples
= LLVMBuildShl(ctx
->builder
, ctx
->i32one
,
4182 samples
= LLVMBuildSelect(ctx
->builder
, is_msaa
, samples
,
4189 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4190 coords
[chan
] = llvm_extract_elem(ctx
, coord
, chan
);
4192 if (offsets
&& instr
->op
!= nir_texop_txf
) {
4193 LLVMValueRef offset
[3], pack
;
4194 for (chan
= 0; chan
< 3; ++chan
)
4195 offset
[chan
] = ctx
->i32zero
;
4198 for (chan
= 0; chan
< get_llvm_num_components(offsets
); chan
++) {
4199 offset
[chan
] = llvm_extract_elem(ctx
, offsets
, chan
);
4200 offset
[chan
] = LLVMBuildAnd(ctx
->builder
, offset
[chan
],
4201 LLVMConstInt(ctx
->i32
, 0x3f, false), "");
4203 offset
[chan
] = LLVMBuildShl(ctx
->builder
, offset
[chan
],
4204 LLVMConstInt(ctx
->i32
, chan
* 8, false), "");
4206 pack
= LLVMBuildOr(ctx
->builder
, offset
[0], offset
[1], "");
4207 pack
= LLVMBuildOr(ctx
->builder
, pack
, offset
[2], "");
4208 address
[count
++] = pack
;
4211 /* pack LOD bias value */
4212 if (instr
->op
== nir_texop_txb
&& bias
) {
4213 address
[count
++] = bias
;
4216 /* Pack depth comparison value */
4217 if (instr
->is_shadow
&& comparator
) {
4218 address
[count
++] = llvm_extract_elem(ctx
, comparator
, 0);
4221 /* pack derivatives */
4223 switch (instr
->sampler_dim
) {
4224 case GLSL_SAMPLER_DIM_3D
:
4225 case GLSL_SAMPLER_DIM_CUBE
:
4228 case GLSL_SAMPLER_DIM_2D
:
4232 case GLSL_SAMPLER_DIM_1D
:
4237 for (unsigned i
= 0; i
< num_deriv_comp
; i
++) {
4238 derivs
[i
] = to_float(ctx
, llvm_extract_elem(ctx
, ddx
, i
));
4239 derivs
[num_deriv_comp
+ i
] = to_float(ctx
, llvm_extract_elem(ctx
, ddy
, i
));
4243 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&& coord
) {
4244 if (instr
->is_array
&& instr
->op
!= nir_texop_lod
)
4245 coords
[3] = apply_round_slice(ctx
, coords
[3]);
4246 for (chan
= 0; chan
< instr
->coord_components
; chan
++)
4247 coords
[chan
] = to_float(ctx
, coords
[chan
]);
4248 if (instr
->coord_components
== 3)
4249 coords
[3] = LLVMGetUndef(ctx
->f32
);
4250 ac_prepare_cube_coords(&ctx
->ac
,
4251 instr
->op
== nir_texop_txd
, instr
->is_array
,
4258 for (unsigned i
= 0; i
< num_deriv_comp
* 2; i
++)
4259 address
[count
++] = derivs
[i
];
4262 /* Pack texture coordinates */
4264 address
[count
++] = coords
[0];
4265 if (instr
->coord_components
> 1) {
4266 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_1D
&& instr
->is_array
&& instr
->op
!= nir_texop_txf
) {
4267 coords
[1] = apply_round_slice(ctx
, coords
[1]);
4269 address
[count
++] = coords
[1];
4271 if (instr
->coord_components
> 2) {
4272 /* This seems like a bit of a hack - but it passes Vulkan CTS with it */
4273 if (instr
->sampler_dim
!= GLSL_SAMPLER_DIM_3D
&&
4274 instr
->sampler_dim
!= GLSL_SAMPLER_DIM_CUBE
&&
4275 instr
->op
!= nir_texop_txf
) {
4276 coords
[2] = apply_round_slice(ctx
, coords
[2]);
4278 address
[count
++] = coords
[2];
4283 if ((instr
->op
== nir_texop_txl
|| instr
->op
== nir_texop_txf
) && lod
) {
4284 address
[count
++] = lod
;
4285 } else if (instr
->op
== nir_texop_txf_ms
&& sample_index
) {
4286 address
[count
++] = sample_index
;
4287 } else if(instr
->op
== nir_texop_txs
) {
4290 address
[count
++] = lod
;
4292 address
[count
++] = ctx
->i32zero
;
4295 for (chan
= 0; chan
< count
; chan
++) {
4296 address
[chan
] = LLVMBuildBitCast(ctx
->builder
,
4297 address
[chan
], ctx
->i32
, "");
4300 if (instr
->op
== nir_texop_samples_identical
) {
4301 LLVMValueRef txf_address
[4];
4302 struct ac_image_args txf_args
= { 0 };
4303 unsigned txf_count
= count
;
4304 memcpy(txf_address
, address
, sizeof(txf_address
));
4306 if (!instr
->is_array
)
4307 txf_address
[2] = ctx
->i32zero
;
4308 txf_address
[3] = ctx
->i32zero
;
4310 set_tex_fetch_args(ctx
, &txf_args
, instr
, nir_texop_txf
,
4312 txf_address
, txf_count
, 0xf);
4314 result
= build_tex_intrinsic(ctx
, instr
, &txf_args
);
4316 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4317 result
= emit_int_cmp(ctx
, LLVMIntEQ
, result
, ctx
->i32zero
);
4321 if (instr
->sampler_dim
== GLSL_SAMPLER_DIM_MS
&&
4322 instr
->op
!= nir_texop_txs
) {
4323 unsigned sample_chan
= instr
->is_array
? 3 : 2;
4324 address
[sample_chan
] = adjust_sample_index_using_fmask(ctx
,
4327 instr
->is_array
? address
[2] : NULL
,
4328 address
[sample_chan
],
4332 if (offsets
&& instr
->op
== nir_texop_txf
) {
4333 nir_const_value
*const_offset
=
4334 nir_src_as_const_value(instr
->src
[const_src
].src
);
4335 int num_offsets
= instr
->src
[const_src
].src
.ssa
->num_components
;
4336 assert(const_offset
);
4337 num_offsets
= MIN2(num_offsets
, instr
->coord_components
);
4338 if (num_offsets
> 2)
4339 address
[2] = LLVMBuildAdd(ctx
->builder
,
4340 address
[2], LLVMConstInt(ctx
->i32
, const_offset
->i32
[2], false), "");
4341 if (num_offsets
> 1)
4342 address
[1] = LLVMBuildAdd(ctx
->builder
,
4343 address
[1], LLVMConstInt(ctx
->i32
, const_offset
->i32
[1], false), "");
4344 address
[0] = LLVMBuildAdd(ctx
->builder
,
4345 address
[0], LLVMConstInt(ctx
->i32
, const_offset
->i32
[0], false), "");
4349 /* TODO TG4 support */
4350 if (instr
->op
== nir_texop_tg4
) {
4351 if (instr
->is_shadow
)
4354 dmask
= 1 << instr
->component
;
4356 set_tex_fetch_args(ctx
, &args
, instr
, instr
->op
,
4357 res_ptr
, samp_ptr
, address
, count
, dmask
);
4359 result
= build_tex_intrinsic(ctx
, instr
, &args
);
4361 if (instr
->op
== nir_texop_query_levels
)
4362 result
= LLVMBuildExtractElement(ctx
->builder
, result
, LLVMConstInt(ctx
->i32
, 3, false), "");
4363 else if (instr
->is_shadow
&& instr
->op
!= nir_texop_txs
&& instr
->op
!= nir_texop_lod
&& instr
->op
!= nir_texop_tg4
)
4364 result
= LLVMBuildExtractElement(ctx
->builder
, result
, ctx
->i32zero
, "");
4365 else if (instr
->op
== nir_texop_txs
&&
4366 instr
->sampler_dim
== GLSL_SAMPLER_DIM_CUBE
&&
4368 LLVMValueRef two
= LLVMConstInt(ctx
->i32
, 2, false);
4369 LLVMValueRef six
= LLVMConstInt(ctx
->i32
, 6, false);
4370 LLVMValueRef z
= LLVMBuildExtractElement(ctx
->builder
, result
, two
, "");
4371 z
= LLVMBuildSDiv(ctx
->builder
, z
, six
, "");
4372 result
= LLVMBuildInsertElement(ctx
->builder
, result
, z
, two
, "");
4373 } else if (instr
->dest
.ssa
.num_components
!= 4)
4374 result
= trim_vector(ctx
, result
, instr
->dest
.ssa
.num_components
);
4378 assert(instr
->dest
.is_ssa
);
4379 result
= to_integer(ctx
, result
);
4380 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4385 static void visit_phi(struct nir_to_llvm_context
*ctx
, nir_phi_instr
*instr
)
4387 LLVMTypeRef type
= get_def_type(ctx
, &instr
->dest
.ssa
);
4388 LLVMValueRef result
= LLVMBuildPhi(ctx
->builder
, type
, "");
4390 _mesa_hash_table_insert(ctx
->defs
, &instr
->dest
.ssa
, result
);
4391 _mesa_hash_table_insert(ctx
->phis
, instr
, result
);
4394 static void visit_post_phi(struct nir_to_llvm_context
*ctx
,
4395 nir_phi_instr
*instr
,
4396 LLVMValueRef llvm_phi
)
4398 nir_foreach_phi_src(src
, instr
) {
4399 LLVMBasicBlockRef block
= get_block(ctx
, src
->pred
);
4400 LLVMValueRef llvm_src
= get_src(ctx
, src
->src
);
4402 LLVMAddIncoming(llvm_phi
, &llvm_src
, &block
, 1);
4406 static void phi_post_pass(struct nir_to_llvm_context
*ctx
)
4408 struct hash_entry
*entry
;
4409 hash_table_foreach(ctx
->phis
, entry
) {
4410 visit_post_phi(ctx
, (nir_phi_instr
*)entry
->key
,
4411 (LLVMValueRef
)entry
->data
);
4416 static void visit_ssa_undef(struct nir_to_llvm_context
*ctx
,
4417 nir_ssa_undef_instr
*instr
)
4419 unsigned num_components
= instr
->def
.num_components
;
4422 if (num_components
== 1)
4423 undef
= LLVMGetUndef(ctx
->i32
);
4425 undef
= LLVMGetUndef(LLVMVectorType(ctx
->i32
, num_components
));
4427 _mesa_hash_table_insert(ctx
->defs
, &instr
->def
, undef
);
4430 static void visit_jump(struct nir_to_llvm_context
*ctx
,
4431 nir_jump_instr
*instr
)
4433 switch (instr
->type
) {
4434 case nir_jump_break
:
4435 LLVMBuildBr(ctx
->builder
, ctx
->break_block
);
4436 LLVMClearInsertionPosition(ctx
->builder
);
4438 case nir_jump_continue
:
4439 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4440 LLVMClearInsertionPosition(ctx
->builder
);
4443 fprintf(stderr
, "Unknown NIR jump instr: ");
4444 nir_print_instr(&instr
->instr
, stderr
);
4445 fprintf(stderr
, "\n");
4450 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4451 struct exec_list
*list
);
4453 static void visit_block(struct nir_to_llvm_context
*ctx
, nir_block
*block
)
4455 LLVMBasicBlockRef llvm_block
= LLVMGetInsertBlock(ctx
->builder
);
4456 nir_foreach_instr(instr
, block
)
4458 switch (instr
->type
) {
4459 case nir_instr_type_alu
:
4460 visit_alu(ctx
, nir_instr_as_alu(instr
));
4462 case nir_instr_type_load_const
:
4463 visit_load_const(ctx
, nir_instr_as_load_const(instr
));
4465 case nir_instr_type_intrinsic
:
4466 visit_intrinsic(ctx
, nir_instr_as_intrinsic(instr
));
4468 case nir_instr_type_tex
:
4469 visit_tex(ctx
, nir_instr_as_tex(instr
));
4471 case nir_instr_type_phi
:
4472 visit_phi(ctx
, nir_instr_as_phi(instr
));
4474 case nir_instr_type_ssa_undef
:
4475 visit_ssa_undef(ctx
, nir_instr_as_ssa_undef(instr
));
4477 case nir_instr_type_jump
:
4478 visit_jump(ctx
, nir_instr_as_jump(instr
));
4481 fprintf(stderr
, "Unknown NIR instr type: ");
4482 nir_print_instr(instr
, stderr
);
4483 fprintf(stderr
, "\n");
4488 _mesa_hash_table_insert(ctx
->defs
, block
, llvm_block
);
4491 static void visit_if(struct nir_to_llvm_context
*ctx
, nir_if
*if_stmt
)
4493 LLVMValueRef value
= get_src(ctx
, if_stmt
->condition
);
4495 LLVMBasicBlockRef merge_block
=
4496 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4497 LLVMBasicBlockRef if_block
=
4498 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4499 LLVMBasicBlockRef else_block
= merge_block
;
4500 if (!exec_list_is_empty(&if_stmt
->else_list
))
4501 else_block
= LLVMAppendBasicBlockInContext(
4502 ctx
->context
, ctx
->main_function
, "");
4504 LLVMValueRef cond
= LLVMBuildICmp(ctx
->builder
, LLVMIntNE
, value
,
4505 LLVMConstInt(ctx
->i32
, 0, false), "");
4506 LLVMBuildCondBr(ctx
->builder
, cond
, if_block
, else_block
);
4508 LLVMPositionBuilderAtEnd(ctx
->builder
, if_block
);
4509 visit_cf_list(ctx
, &if_stmt
->then_list
);
4510 if (LLVMGetInsertBlock(ctx
->builder
))
4511 LLVMBuildBr(ctx
->builder
, merge_block
);
4513 if (!exec_list_is_empty(&if_stmt
->else_list
)) {
4514 LLVMPositionBuilderAtEnd(ctx
->builder
, else_block
);
4515 visit_cf_list(ctx
, &if_stmt
->else_list
);
4516 if (LLVMGetInsertBlock(ctx
->builder
))
4517 LLVMBuildBr(ctx
->builder
, merge_block
);
4520 LLVMPositionBuilderAtEnd(ctx
->builder
, merge_block
);
4523 static void visit_loop(struct nir_to_llvm_context
*ctx
, nir_loop
*loop
)
4525 LLVMBasicBlockRef continue_parent
= ctx
->continue_block
;
4526 LLVMBasicBlockRef break_parent
= ctx
->break_block
;
4528 ctx
->continue_block
=
4529 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4531 LLVMAppendBasicBlockInContext(ctx
->context
, ctx
->main_function
, "");
4533 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4534 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->continue_block
);
4535 visit_cf_list(ctx
, &loop
->body
);
4537 if (LLVMGetInsertBlock(ctx
->builder
))
4538 LLVMBuildBr(ctx
->builder
, ctx
->continue_block
);
4539 LLVMPositionBuilderAtEnd(ctx
->builder
, ctx
->break_block
);
4541 ctx
->continue_block
= continue_parent
;
4542 ctx
->break_block
= break_parent
;
4545 static void visit_cf_list(struct nir_to_llvm_context
*ctx
,
4546 struct exec_list
*list
)
4548 foreach_list_typed(nir_cf_node
, node
, node
, list
)
4550 switch (node
->type
) {
4551 case nir_cf_node_block
:
4552 visit_block(ctx
, nir_cf_node_as_block(node
));
4555 case nir_cf_node_if
:
4556 visit_if(ctx
, nir_cf_node_as_if(node
));
4559 case nir_cf_node_loop
:
4560 visit_loop(ctx
, nir_cf_node_as_loop(node
));
4570 handle_vs_input_decl(struct nir_to_llvm_context
*ctx
,
4571 struct nir_variable
*variable
)
4573 LLVMValueRef t_list_ptr
= ctx
->vertex_buffers
;
4574 LLVMValueRef t_offset
;
4575 LLVMValueRef t_list
;
4577 LLVMValueRef buffer_index
;
4578 int index
= variable
->data
.location
- VERT_ATTRIB_GENERIC0
;
4579 int idx
= variable
->data
.location
;
4580 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, true);
4582 variable
->data
.driver_location
= idx
* 4;
4584 if (ctx
->options
->key
.vs
.instance_rate_inputs
& (1u << index
)) {
4585 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->instance_id
,
4586 ctx
->start_instance
, "");
4587 ctx
->shader_info
->vs
.vgpr_comp_cnt
= MAX2(3,
4588 ctx
->shader_info
->vs
.vgpr_comp_cnt
);
4590 buffer_index
= LLVMBuildAdd(ctx
->builder
, ctx
->vertex_id
,
4591 ctx
->base_vertex
, "");
4593 for (unsigned i
= 0; i
< attrib_count
; ++i
, ++idx
) {
4594 t_offset
= LLVMConstInt(ctx
->i32
, index
+ i
, false);
4596 t_list
= ac_build_indexed_load_const(&ctx
->ac
, t_list_ptr
, t_offset
);
4598 input
= ac_build_buffer_load_format(&ctx
->ac
, t_list
,
4600 LLVMConstInt(ctx
->i32
, 0, false),
4603 for (unsigned chan
= 0; chan
< 4; chan
++) {
4604 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4605 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
, chan
)] =
4606 to_integer(ctx
, LLVMBuildExtractElement(ctx
->builder
,
4607 input
, llvm_chan
, ""));
4612 static void interp_fs_input(struct nir_to_llvm_context
*ctx
,
4614 LLVMValueRef interp_param
,
4615 LLVMValueRef prim_mask
,
4616 LLVMValueRef result
[4])
4618 LLVMValueRef attr_number
;
4621 bool interp
= interp_param
!= NULL
;
4623 attr_number
= LLVMConstInt(ctx
->i32
, attr
, false);
4625 /* fs.constant returns the param from the middle vertex, so it's not
4626 * really useful for flat shading. It's meant to be used for custom
4627 * interpolation (but the intrinsic can't fetch from the other two
4630 * Luckily, it doesn't matter, because we rely on the FLAT_SHADE state
4631 * to do the right thing. The only reason we use fs.constant is that
4632 * fs.interp cannot be used on integers, because they can be equal
4636 interp_param
= LLVMBuildBitCast(ctx
->builder
, interp_param
,
4637 LLVMVectorType(ctx
->f32
, 2), "");
4639 i
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4641 j
= LLVMBuildExtractElement(ctx
->builder
, interp_param
,
4645 for (chan
= 0; chan
< 4; chan
++) {
4646 LLVMValueRef llvm_chan
= LLVMConstInt(ctx
->i32
, chan
, false);
4649 result
[chan
] = ac_build_fs_interp(&ctx
->ac
,
4654 result
[chan
] = ac_build_fs_interp_mov(&ctx
->ac
,
4655 LLVMConstInt(ctx
->i32
, 2, false),
4664 handle_fs_input_decl(struct nir_to_llvm_context
*ctx
,
4665 struct nir_variable
*variable
)
4667 int idx
= variable
->data
.location
;
4668 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4669 LLVMValueRef interp
;
4671 variable
->data
.driver_location
= idx
* 4;
4672 ctx
->input_mask
|= ((1ull << attrib_count
) - 1) << variable
->data
.location
;
4674 if (glsl_get_base_type(glsl_without_array(variable
->type
)) == GLSL_TYPE_FLOAT
) {
4675 unsigned interp_type
;
4676 if (variable
->data
.sample
) {
4677 interp_type
= INTERP_SAMPLE
;
4678 ctx
->shader_info
->fs
.force_persample
= true;
4679 } else if (variable
->data
.centroid
)
4680 interp_type
= INTERP_CENTROID
;
4682 interp_type
= INTERP_CENTER
;
4684 interp
= lookup_interp_param(ctx
, variable
->data
.interpolation
, interp_type
);
4688 for (unsigned i
= 0; i
< attrib_count
; ++i
)
4689 ctx
->inputs
[radeon_llvm_reg_index_soa(idx
+ i
, 0)] = interp
;
4694 handle_shader_input_decl(struct nir_to_llvm_context
*ctx
,
4695 struct nir_variable
*variable
)
4697 switch (ctx
->stage
) {
4698 case MESA_SHADER_VERTEX
:
4699 handle_vs_input_decl(ctx
, variable
);
4701 case MESA_SHADER_FRAGMENT
:
4702 handle_fs_input_decl(ctx
, variable
);
4711 handle_fs_inputs_pre(struct nir_to_llvm_context
*ctx
,
4712 struct nir_shader
*nir
)
4715 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_INPUTS
; ++i
) {
4716 LLVMValueRef interp_param
;
4717 LLVMValueRef
*inputs
= ctx
->inputs
+radeon_llvm_reg_index_soa(i
, 0);
4719 if (!(ctx
->input_mask
& (1ull << i
)))
4722 if (i
>= VARYING_SLOT_VAR0
|| i
== VARYING_SLOT_PNTC
||
4723 i
== VARYING_SLOT_PRIMITIVE_ID
|| i
== VARYING_SLOT_LAYER
) {
4724 interp_param
= *inputs
;
4725 interp_fs_input(ctx
, index
, interp_param
, ctx
->prim_mask
,
4729 ctx
->shader_info
->fs
.flat_shaded_mask
|= 1u << index
;
4731 } else if (i
== VARYING_SLOT_POS
) {
4732 for(int i
= 0; i
< 3; ++i
)
4733 inputs
[i
] = ctx
->frag_pos
[i
];
4735 inputs
[3] = ac_build_fdiv(&ctx
->ac
, ctx
->f32one
, ctx
->frag_pos
[3]);
4738 ctx
->shader_info
->fs
.num_interp
= index
;
4739 if (ctx
->input_mask
& (1 << VARYING_SLOT_PNTC
))
4740 ctx
->shader_info
->fs
.has_pcoord
= true;
4741 if (ctx
->input_mask
& (1 << VARYING_SLOT_PRIMITIVE_ID
))
4742 ctx
->shader_info
->fs
.prim_id_input
= true;
4743 if (ctx
->input_mask
& (1 << VARYING_SLOT_LAYER
))
4744 ctx
->shader_info
->fs
.layer_input
= true;
4745 ctx
->shader_info
->fs
.input_mask
= ctx
->input_mask
>> VARYING_SLOT_VAR0
;
4749 ac_build_alloca(struct nir_to_llvm_context
*ctx
,
4753 LLVMBuilderRef builder
= ctx
->builder
;
4754 LLVMBasicBlockRef current_block
= LLVMGetInsertBlock(builder
);
4755 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
4756 LLVMBasicBlockRef first_block
= LLVMGetEntryBasicBlock(function
);
4757 LLVMValueRef first_instr
= LLVMGetFirstInstruction(first_block
);
4758 LLVMBuilderRef first_builder
= LLVMCreateBuilderInContext(ctx
->context
);
4762 LLVMPositionBuilderBefore(first_builder
, first_instr
);
4764 LLVMPositionBuilderAtEnd(first_builder
, first_block
);
4767 res
= LLVMBuildAlloca(first_builder
, type
, name
);
4768 LLVMBuildStore(builder
, LLVMConstNull(type
), res
);
4770 LLVMDisposeBuilder(first_builder
);
4775 static LLVMValueRef
si_build_alloca_undef(struct nir_to_llvm_context
*ctx
,
4779 LLVMValueRef ptr
= ac_build_alloca(ctx
, type
, name
);
4780 LLVMBuildStore(ctx
->builder
, LLVMGetUndef(type
), ptr
);
4785 handle_shader_output_decl(struct nir_to_llvm_context
*ctx
,
4786 struct nir_variable
*variable
)
4788 int idx
= variable
->data
.location
+ variable
->data
.index
;
4789 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4790 uint64_t mask_attribs
;
4791 variable
->data
.driver_location
= idx
* 4;
4793 /* tess ctrl has it's own load/store paths for outputs */
4794 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
)
4797 mask_attribs
= ((1ull << attrib_count
) - 1) << idx
;
4798 if (ctx
->stage
== MESA_SHADER_VERTEX
||
4799 ctx
->stage
== MESA_SHADER_TESS_EVAL
||
4800 ctx
->stage
== MESA_SHADER_GEOMETRY
) {
4801 if (idx
== VARYING_SLOT_CLIP_DIST0
) {
4802 int length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
4803 if (ctx
->stage
== MESA_SHADER_VERTEX
) {
4804 ctx
->shader_info
->vs
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4805 ctx
->shader_info
->vs
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4807 if (ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
4808 ctx
->shader_info
->tes
.outinfo
.clip_dist_mask
= (1 << ctx
->num_output_clips
) - 1;
4809 ctx
->shader_info
->tes
.outinfo
.cull_dist_mask
= (1 << ctx
->num_output_culls
) - 1;
4816 mask_attribs
= 1ull << idx
;
4820 for (unsigned i
= 0; i
< attrib_count
; ++i
) {
4821 for (unsigned chan
= 0; chan
< 4; chan
++) {
4822 ctx
->outputs
[radeon_llvm_reg_index_soa(idx
+ i
, chan
)] =
4823 si_build_alloca_undef(ctx
, ctx
->f32
, "");
4826 ctx
->output_mask
|= mask_attribs
;
4830 setup_locals(struct nir_to_llvm_context
*ctx
,
4831 struct nir_function
*func
)
4834 ctx
->num_locals
= 0;
4835 nir_foreach_variable(variable
, &func
->impl
->locals
) {
4836 unsigned attrib_count
= glsl_count_attribute_slots(variable
->type
, false);
4837 variable
->data
.driver_location
= ctx
->num_locals
* 4;
4838 ctx
->num_locals
+= attrib_count
;
4840 ctx
->locals
= malloc(4 * ctx
->num_locals
* sizeof(LLVMValueRef
));
4844 for (i
= 0; i
< ctx
->num_locals
; i
++) {
4845 for (j
= 0; j
< 4; j
++) {
4846 ctx
->locals
[i
* 4 + j
] =
4847 si_build_alloca_undef(ctx
, ctx
->f32
, "temp");
4853 emit_float_saturate(struct nir_to_llvm_context
*ctx
, LLVMValueRef v
, float lo
, float hi
)
4855 v
= to_float(ctx
, v
);
4856 v
= emit_intrin_2f_param(ctx
, "llvm.maxnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, lo
));
4857 return emit_intrin_2f_param(ctx
, "llvm.minnum.f32", ctx
->f32
, v
, LLVMConstReal(ctx
->f32
, hi
));
4861 static LLVMValueRef
emit_pack_int16(struct nir_to_llvm_context
*ctx
,
4862 LLVMValueRef src0
, LLVMValueRef src1
)
4864 LLVMValueRef const16
= LLVMConstInt(ctx
->i32
, 16, false);
4865 LLVMValueRef comp
[2];
4867 comp
[0] = LLVMBuildAnd(ctx
->builder
, src0
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4868 comp
[1] = LLVMBuildAnd(ctx
->builder
, src1
, LLVMConstInt(ctx
-> i32
, 65535, 0), "");
4869 comp
[1] = LLVMBuildShl(ctx
->builder
, comp
[1], const16
, "");
4870 return LLVMBuildOr(ctx
->builder
, comp
[0], comp
[1], "");
4873 /* Initialize arguments for the shader export intrinsic */
4875 si_llvm_init_export_args(struct nir_to_llvm_context
*ctx
,
4876 LLVMValueRef
*values
,
4878 struct ac_export_args
*args
)
4880 /* Default is 0xf. Adjusted below depending on the format. */
4881 args
->enabled_channels
= 0xf;
4883 /* Specify whether the EXEC mask represents the valid mask */
4884 args
->valid_mask
= 0;
4886 /* Specify whether this is the last export */
4889 /* Specify the target we are exporting */
4890 args
->target
= target
;
4892 args
->compr
= false;
4893 args
->out
[0] = LLVMGetUndef(ctx
->f32
);
4894 args
->out
[1] = LLVMGetUndef(ctx
->f32
);
4895 args
->out
[2] = LLVMGetUndef(ctx
->f32
);
4896 args
->out
[3] = LLVMGetUndef(ctx
->f32
);
4901 if (ctx
->stage
== MESA_SHADER_FRAGMENT
&& target
>= V_008DFC_SQ_EXP_MRT
) {
4902 LLVMValueRef val
[4];
4903 unsigned index
= target
- V_008DFC_SQ_EXP_MRT
;
4904 unsigned col_format
= (ctx
->options
->key
.fs
.col_format
>> (4 * index
)) & 0xf;
4905 bool is_int8
= (ctx
->options
->key
.fs
.is_int8
>> index
) & 1;
4907 switch(col_format
) {
4908 case V_028714_SPI_SHADER_ZERO
:
4909 args
->enabled_channels
= 0; /* writemask */
4910 args
->target
= V_008DFC_SQ_EXP_NULL
;
4913 case V_028714_SPI_SHADER_32_R
:
4914 args
->enabled_channels
= 1;
4915 args
->out
[0] = values
[0];
4918 case V_028714_SPI_SHADER_32_GR
:
4919 args
->enabled_channels
= 0x3;
4920 args
->out
[0] = values
[0];
4921 args
->out
[1] = values
[1];
4924 case V_028714_SPI_SHADER_32_AR
:
4925 args
->enabled_channels
= 0x9;
4926 args
->out
[0] = values
[0];
4927 args
->out
[3] = values
[3];
4930 case V_028714_SPI_SHADER_FP16_ABGR
:
4933 for (unsigned chan
= 0; chan
< 2; chan
++) {
4934 LLVMValueRef pack_args
[2] = {
4936 values
[2 * chan
+ 1]
4938 LLVMValueRef packed
;
4940 packed
= ac_build_cvt_pkrtz_f16(&ctx
->ac
, pack_args
);
4941 args
->out
[chan
] = packed
;
4945 case V_028714_SPI_SHADER_UNORM16_ABGR
:
4946 for (unsigned chan
= 0; chan
< 4; chan
++) {
4947 val
[chan
] = ac_build_clamp(&ctx
->ac
, values
[chan
]);
4948 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4949 LLVMConstReal(ctx
->f32
, 65535), "");
4950 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4951 LLVMConstReal(ctx
->f32
, 0.5), "");
4952 val
[chan
] = LLVMBuildFPToUI(ctx
->builder
, val
[chan
],
4957 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4958 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4961 case V_028714_SPI_SHADER_SNORM16_ABGR
:
4962 for (unsigned chan
= 0; chan
< 4; chan
++) {
4963 val
[chan
] = emit_float_saturate(ctx
, values
[chan
], -1, 1);
4964 val
[chan
] = LLVMBuildFMul(ctx
->builder
, val
[chan
],
4965 LLVMConstReal(ctx
->f32
, 32767), "");
4967 /* If positive, add 0.5, else add -0.5. */
4968 val
[chan
] = LLVMBuildFAdd(ctx
->builder
, val
[chan
],
4969 LLVMBuildSelect(ctx
->builder
,
4970 LLVMBuildFCmp(ctx
->builder
, LLVMRealOGE
,
4971 val
[chan
], ctx
->f32zero
, ""),
4972 LLVMConstReal(ctx
->f32
, 0.5),
4973 LLVMConstReal(ctx
->f32
, -0.5), ""), "");
4974 val
[chan
] = LLVMBuildFPToSI(ctx
->builder
, val
[chan
], ctx
->i32
, "");
4978 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4979 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4982 case V_028714_SPI_SHADER_UINT16_ABGR
: {
4983 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 255 : 65535, 0);
4985 for (unsigned chan
= 0; chan
< 4; chan
++) {
4986 val
[chan
] = to_integer(ctx
, values
[chan
]);
4987 val
[chan
] = emit_minmax_int(ctx
, LLVMIntULT
, val
[chan
], max
);
4991 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
4992 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
4996 case V_028714_SPI_SHADER_SINT16_ABGR
: {
4997 LLVMValueRef max
= LLVMConstInt(ctx
->i32
, is_int8
? 127 : 32767, 0);
4998 LLVMValueRef min
= LLVMConstInt(ctx
->i32
, is_int8
? -128 : -32768, 0);
5001 for (unsigned chan
= 0; chan
< 4; chan
++) {
5002 val
[chan
] = to_integer(ctx
, values
[chan
]);
5003 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSLT
, val
[chan
], max
);
5004 val
[chan
] = emit_minmax_int(ctx
, LLVMIntSGT
, val
[chan
], min
);
5008 args
->out
[0] = emit_pack_int16(ctx
, val
[0], val
[1]);
5009 args
->out
[1] = emit_pack_int16(ctx
, val
[2], val
[3]);
5014 case V_028714_SPI_SHADER_32_ABGR
:
5015 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5019 memcpy(&args
->out
[0], values
, sizeof(values
[0]) * 4);
5021 for (unsigned i
= 0; i
< 4; ++i
)
5022 args
->out
[i
] = to_float(ctx
, args
->out
[i
]);
5026 handle_vs_outputs_post(struct nir_to_llvm_context
*ctx
,
5027 struct ac_vs_output_info
*outinfo
)
5029 uint32_t param_count
= 0;
5031 unsigned pos_idx
, num_pos_exports
= 0;
5032 struct ac_export_args args
, pos_args
[4] = {};
5033 LLVMValueRef psize_value
= NULL
, layer_value
= NULL
, viewport_index_value
= NULL
;
5036 outinfo
->prim_id_output
= 0xffffffff;
5037 outinfo
->layer_output
= 0xffffffff;
5038 if (ctx
->output_mask
& (1ull << VARYING_SLOT_CLIP_DIST0
)) {
5039 LLVMValueRef slots
[8];
5042 if (outinfo
->cull_dist_mask
)
5043 outinfo
->cull_dist_mask
<<= ctx
->num_output_clips
;
5045 i
= VARYING_SLOT_CLIP_DIST0
;
5046 for (j
= 0; j
< ctx
->num_output_clips
+ ctx
->num_output_culls
; j
++)
5047 slots
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5048 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5050 for (i
= ctx
->num_output_clips
+ ctx
->num_output_culls
; i
< 8; i
++)
5051 slots
[i
] = LLVMGetUndef(ctx
->f32
);
5053 if (ctx
->num_output_clips
+ ctx
->num_output_culls
> 4) {
5054 target
= V_008DFC_SQ_EXP_POS
+ 3;
5055 si_llvm_init_export_args(ctx
, &slots
[4], target
, &args
);
5056 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5057 &args
, sizeof(args
));
5060 target
= V_008DFC_SQ_EXP_POS
+ 2;
5061 si_llvm_init_export_args(ctx
, &slots
[0], target
, &args
);
5062 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5063 &args
, sizeof(args
));
5067 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5068 LLVMValueRef values
[4];
5069 if (!(ctx
->output_mask
& (1ull << i
)))
5072 for (unsigned j
= 0; j
< 4; j
++)
5073 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5074 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5076 if (i
== VARYING_SLOT_POS
) {
5077 target
= V_008DFC_SQ_EXP_POS
;
5078 } else if (i
== VARYING_SLOT_CLIP_DIST0
) {
5080 } else if (i
== VARYING_SLOT_PSIZ
) {
5081 outinfo
->writes_pointsize
= true;
5082 psize_value
= values
[0];
5084 } else if (i
== VARYING_SLOT_LAYER
) {
5085 outinfo
->writes_layer
= true;
5086 layer_value
= values
[0];
5087 outinfo
->layer_output
= param_count
;
5088 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5090 } else if (i
== VARYING_SLOT_VIEWPORT
) {
5091 outinfo
->writes_viewport_index
= true;
5092 viewport_index_value
= values
[0];
5094 } else if (i
== VARYING_SLOT_PRIMITIVE_ID
) {
5095 outinfo
->prim_id_output
= param_count
;
5096 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5098 } else if (i
>= VARYING_SLOT_VAR0
) {
5099 outinfo
->export_mask
|= 1u << (i
- VARYING_SLOT_VAR0
);
5100 target
= V_008DFC_SQ_EXP_PARAM
+ param_count
;
5104 si_llvm_init_export_args(ctx
, values
, target
, &args
);
5106 if (target
>= V_008DFC_SQ_EXP_POS
&&
5107 target
<= (V_008DFC_SQ_EXP_POS
+ 3)) {
5108 memcpy(&pos_args
[target
- V_008DFC_SQ_EXP_POS
],
5109 &args
, sizeof(args
));
5111 ac_build_export(&ctx
->ac
, &args
);
5115 /* We need to add the position output manually if it's missing. */
5116 if (!pos_args
[0].out
[0]) {
5117 pos_args
[0].enabled_channels
= 0xf;
5118 pos_args
[0].valid_mask
= 0;
5119 pos_args
[0].done
= 0;
5120 pos_args
[0].target
= V_008DFC_SQ_EXP_POS
;
5121 pos_args
[0].compr
= 0;
5122 pos_args
[0].out
[0] = ctx
->f32zero
; /* X */
5123 pos_args
[0].out
[1] = ctx
->f32zero
; /* Y */
5124 pos_args
[0].out
[2] = ctx
->f32zero
; /* Z */
5125 pos_args
[0].out
[3] = ctx
->f32one
; /* W */
5128 uint32_t mask
= ((outinfo
->writes_pointsize
== true ? 1 : 0) |
5129 (outinfo
->writes_layer
== true ? 4 : 0) |
5130 (outinfo
->writes_viewport_index
== true ? 8 : 0));
5132 pos_args
[1].enabled_channels
= mask
;
5133 pos_args
[1].valid_mask
= 0;
5134 pos_args
[1].done
= 0;
5135 pos_args
[1].target
= V_008DFC_SQ_EXP_POS
+ 1;
5136 pos_args
[1].compr
= 0;
5137 pos_args
[1].out
[0] = ctx
->f32zero
; /* X */
5138 pos_args
[1].out
[1] = ctx
->f32zero
; /* Y */
5139 pos_args
[1].out
[2] = ctx
->f32zero
; /* Z */
5140 pos_args
[1].out
[3] = ctx
->f32zero
; /* W */
5142 if (outinfo
->writes_pointsize
== true)
5143 pos_args
[1].out
[0] = psize_value
;
5144 if (outinfo
->writes_layer
== true)
5145 pos_args
[1].out
[2] = layer_value
;
5146 if (outinfo
->writes_viewport_index
== true)
5147 pos_args
[1].out
[3] = viewport_index_value
;
5149 for (i
= 0; i
< 4; i
++) {
5150 if (pos_args
[i
].out
[0])
5155 for (i
= 0; i
< 4; i
++) {
5156 if (!pos_args
[i
].out
[0])
5159 /* Specify the target we are exporting */
5160 pos_args
[i
].target
= V_008DFC_SQ_EXP_POS
+ pos_idx
++;
5161 if (pos_idx
== num_pos_exports
)
5162 pos_args
[i
].done
= 1;
5163 ac_build_export(&ctx
->ac
, &pos_args
[i
]);
5166 outinfo
->pos_exports
= num_pos_exports
;
5167 outinfo
->param_exports
= param_count
;
5171 handle_es_outputs_post(struct nir_to_llvm_context
*ctx
,
5172 struct ac_es_output_info
*outinfo
)
5175 uint64_t max_output_written
= 0;
5176 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5177 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5181 if (!(ctx
->output_mask
& (1ull << i
)))
5184 if (i
== VARYING_SLOT_CLIP_DIST0
)
5185 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5187 param_index
= shader_io_get_unique_index(i
);
5189 max_output_written
= MAX2(param_index
+ (length
> 4), max_output_written
);
5191 for (j
= 0; j
< length
; j
++) {
5192 LLVMValueRef out_val
= LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], "");
5193 out_val
= LLVMBuildBitCast(ctx
->builder
, out_val
, ctx
->i32
, "");
5195 ac_build_buffer_store_dword(&ctx
->ac
,
5198 NULL
, ctx
->es2gs_offset
,
5199 (4 * param_index
+ j
) * 4,
5203 outinfo
->esgs_itemsize
= (max_output_written
+ 1) * 16;
5207 handle_ls_outputs_post(struct nir_to_llvm_context
*ctx
)
5209 LLVMValueRef vertex_id
= ctx
->rel_auto_id
;
5210 LLVMValueRef vertex_dw_stride
= unpack_param(ctx
, ctx
->ls_out_layout
, 13, 8);
5211 LLVMValueRef base_dw_addr
= LLVMBuildMul(ctx
->builder
, vertex_id
,
5212 vertex_dw_stride
, "");
5214 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5215 LLVMValueRef
*out_ptr
= &ctx
->outputs
[i
* 4];
5218 if (!(ctx
->output_mask
& (1ull << i
)))
5221 if (i
== VARYING_SLOT_CLIP_DIST0
)
5222 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
5223 int param
= shader_io_get_unique_index(i
);
5224 mark_tess_output(ctx
, false, param
);
5226 mark_tess_output(ctx
, false, param
+ 1);
5227 LLVMValueRef dw_addr
= LLVMBuildAdd(ctx
->builder
, base_dw_addr
,
5228 LLVMConstInt(ctx
->i32
, param
* 4, false),
5230 for (unsigned j
= 0; j
< length
; j
++) {
5231 lds_store(ctx
, dw_addr
,
5232 LLVMBuildLoad(ctx
->builder
, out_ptr
[j
], ""));
5233 dw_addr
= LLVMBuildAdd(ctx
->builder
, dw_addr
, ctx
->i32one
, "");
5238 struct ac_build_if_state
5240 struct nir_to_llvm_context
*ctx
;
5241 LLVMValueRef condition
;
5242 LLVMBasicBlockRef entry_block
;
5243 LLVMBasicBlockRef true_block
;
5244 LLVMBasicBlockRef false_block
;
5245 LLVMBasicBlockRef merge_block
;
5248 static LLVMBasicBlockRef
5249 ac_build_insert_new_block(struct nir_to_llvm_context
*ctx
, const char *name
)
5251 LLVMBasicBlockRef current_block
;
5252 LLVMBasicBlockRef next_block
;
5253 LLVMBasicBlockRef new_block
;
5255 /* get current basic block */
5256 current_block
= LLVMGetInsertBlock(ctx
->builder
);
5258 /* chqeck if there's another block after this one */
5259 next_block
= LLVMGetNextBasicBlock(current_block
);
5261 /* insert the new block before the next block */
5262 new_block
= LLVMInsertBasicBlockInContext(ctx
->context
, next_block
, name
);
5265 /* append new block after current block */
5266 LLVMValueRef function
= LLVMGetBasicBlockParent(current_block
);
5267 new_block
= LLVMAppendBasicBlockInContext(ctx
->context
, function
, name
);
5273 ac_nir_build_if(struct ac_build_if_state
*ifthen
,
5274 struct nir_to_llvm_context
*ctx
,
5275 LLVMValueRef condition
)
5277 LLVMBasicBlockRef block
= LLVMGetInsertBlock(ctx
->builder
);
5279 memset(ifthen
, 0, sizeof *ifthen
);
5281 ifthen
->condition
= condition
;
5282 ifthen
->entry_block
= block
;
5284 /* create endif/merge basic block for the phi functions */
5285 ifthen
->merge_block
= ac_build_insert_new_block(ctx
, "endif-block");
5287 /* create/insert true_block before merge_block */
5288 ifthen
->true_block
=
5289 LLVMInsertBasicBlockInContext(ctx
->context
,
5290 ifthen
->merge_block
,
5293 /* successive code goes into the true block */
5294 LLVMPositionBuilderAtEnd(ctx
->builder
, ifthen
->true_block
);
5298 * End a conditional.
5301 ac_nir_build_endif(struct ac_build_if_state
*ifthen
)
5303 LLVMBuilderRef builder
= ifthen
->ctx
->builder
;
5305 /* Insert branch to the merge block from current block */
5306 LLVMBuildBr(builder
, ifthen
->merge_block
);
5309 * Now patch in the various branch instructions.
5312 /* Insert the conditional branch instruction at the end of entry_block */
5313 LLVMPositionBuilderAtEnd(builder
, ifthen
->entry_block
);
5314 if (ifthen
->false_block
) {
5315 /* we have an else clause */
5316 LLVMBuildCondBr(builder
, ifthen
->condition
,
5317 ifthen
->true_block
, ifthen
->false_block
);
5320 /* no else clause */
5321 LLVMBuildCondBr(builder
, ifthen
->condition
,
5322 ifthen
->true_block
, ifthen
->merge_block
);
5325 /* Resume building code at end of the ifthen->merge_block */
5326 LLVMPositionBuilderAtEnd(builder
, ifthen
->merge_block
);
5330 write_tess_factors(struct nir_to_llvm_context
*ctx
)
5332 unsigned stride
, outer_comps
, inner_comps
;
5333 struct ac_build_if_state if_ctx
, inner_if_ctx
;
5334 LLVMValueRef invocation_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 8, 5);
5335 LLVMValueRef rel_patch_id
= unpack_param(ctx
, ctx
->tcs_rel_ids
, 0, 8);
5336 unsigned tess_inner_index
, tess_outer_index
;
5337 LLVMValueRef lds_base
, lds_inner
, lds_outer
, byteoffset
, buffer
;
5338 LLVMValueRef out
[6], vec0
, vec1
, tf_base
, inner
[4], outer
[4];
5342 switch (ctx
->options
->key
.tcs
.primitive_mode
) {
5362 ac_nir_build_if(&if_ctx
, ctx
,
5363 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5364 invocation_id
, ctx
->i32zero
, ""));
5366 tess_inner_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5367 tess_outer_index
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5369 mark_tess_output(ctx
, true, tess_inner_index
);
5370 mark_tess_output(ctx
, true, tess_outer_index
);
5371 lds_base
= get_tcs_out_current_patch_data_offset(ctx
);
5372 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5373 LLVMConstInt(ctx
->i32
, tess_inner_index
* 4, false), "");
5374 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_base
,
5375 LLVMConstInt(ctx
->i32
, tess_outer_index
* 4, false), "");
5377 for (i
= 0; i
< 4; i
++) {
5378 inner
[i
] = LLVMGetUndef(ctx
->i32
);
5379 outer
[i
] = LLVMGetUndef(ctx
->i32
);
5383 if (ctx
->options
->key
.tcs
.primitive_mode
== GL_ISOLINES
) {
5384 outer
[0] = out
[1] = lds_load(ctx
, lds_outer
);
5385 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5386 LLVMConstInt(ctx
->i32
, 1, false), "");
5387 outer
[1] = out
[0] = lds_load(ctx
, lds_outer
);
5389 for (i
= 0; i
< outer_comps
; i
++) {
5391 lds_load(ctx
, lds_outer
);
5392 lds_outer
= LLVMBuildAdd(ctx
->builder
, lds_outer
,
5393 LLVMConstInt(ctx
->i32
, 1, false), "");
5395 for (i
= 0; i
< inner_comps
; i
++) {
5396 inner
[i
] = out
[outer_comps
+i
] =
5397 lds_load(ctx
, lds_inner
);
5398 lds_inner
= LLVMBuildAdd(ctx
->builder
, lds_inner
,
5399 LLVMConstInt(ctx
->i32
, 1, false), "");
5403 /* Convert the outputs to vectors for stores. */
5404 vec0
= ac_build_gather_values(&ctx
->ac
, out
, MIN2(stride
, 4));
5408 vec1
= ac_build_gather_values(&ctx
->ac
, out
+ 4, stride
- 4);
5411 buffer
= ctx
->hs_ring_tess_factor
;
5412 tf_base
= ctx
->tess_factor_offset
;
5413 byteoffset
= LLVMBuildMul(ctx
->builder
, rel_patch_id
,
5414 LLVMConstInt(ctx
->i32
, 4 * stride
, false), "");
5416 ac_nir_build_if(&inner_if_ctx
, ctx
,
5417 LLVMBuildICmp(ctx
->builder
, LLVMIntEQ
,
5418 rel_patch_id
, ctx
->i32zero
, ""));
5420 /* Store the dynamic HS control word. */
5421 ac_build_buffer_store_dword(&ctx
->ac
, buffer
,
5422 LLVMConstInt(ctx
->i32
, 0x80000000, false),
5423 1, ctx
->i32zero
, tf_base
,
5424 0, 1, 0, true, false);
5425 ac_nir_build_endif(&inner_if_ctx
);
5427 /* Store the tessellation factors. */
5428 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec0
,
5429 MIN2(stride
, 4), byteoffset
, tf_base
,
5430 4, 1, 0, true, false);
5432 ac_build_buffer_store_dword(&ctx
->ac
, buffer
, vec1
,
5433 stride
- 4, byteoffset
, tf_base
,
5434 20, 1, 0, true, false);
5436 //TODO store to offchip for TES to read - only if TES reads them
5438 LLVMValueRef inner_vec
, outer_vec
, tf_outer_offset
;
5439 LLVMValueRef tf_inner_offset
;
5440 unsigned param_outer
, param_inner
;
5442 param_outer
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_OUTER
);
5443 tf_outer_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5444 LLVMConstInt(ctx
->i32
, param_outer
, 0));
5446 outer_vec
= ac_build_gather_values(&ctx
->ac
, outer
,
5447 util_next_power_of_two(outer_comps
));
5449 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, outer_vec
,
5450 outer_comps
, tf_outer_offset
,
5451 ctx
->oc_lds
, 0, 1, 0, true, false);
5453 param_inner
= shader_io_get_unique_index(VARYING_SLOT_TESS_LEVEL_INNER
);
5454 tf_inner_offset
= get_tcs_tes_buffer_address(ctx
, NULL
,
5455 LLVMConstInt(ctx
->i32
, param_inner
, 0));
5457 inner_vec
= inner_comps
== 1 ? inner
[0] :
5458 ac_build_gather_values(&ctx
->ac
, inner
, inner_comps
);
5459 ac_build_buffer_store_dword(&ctx
->ac
, ctx
->hs_ring_tess_offchip
, inner_vec
,
5460 inner_comps
, tf_inner_offset
,
5461 ctx
->oc_lds
, 0, 1, 0, true, false);
5464 ac_nir_build_endif(&if_ctx
);
5468 handle_tcs_outputs_post(struct nir_to_llvm_context
*ctx
)
5470 write_tess_factors(ctx
);
5474 si_export_mrt_color(struct nir_to_llvm_context
*ctx
,
5475 LLVMValueRef
*color
, unsigned param
, bool is_last
)
5478 struct ac_export_args args
;
5481 si_llvm_init_export_args(ctx
, color
, param
,
5485 args
.valid_mask
= 1; /* whether the EXEC mask is valid */
5486 args
.done
= 1; /* DONE bit */
5487 } else if (!args
.enabled_channels
)
5488 return; /* unnecessary NULL export */
5490 ac_build_export(&ctx
->ac
, &args
);
5494 si_export_mrt_z(struct nir_to_llvm_context
*ctx
,
5495 LLVMValueRef depth
, LLVMValueRef stencil
,
5496 LLVMValueRef samplemask
)
5498 struct ac_export_args args
;
5500 args
.enabled_channels
= 0;
5501 args
.valid_mask
= 1;
5503 args
.target
= V_008DFC_SQ_EXP_MRTZ
;
5506 args
.out
[0] = LLVMGetUndef(ctx
->f32
); /* R, depth */
5507 args
.out
[1] = LLVMGetUndef(ctx
->f32
); /* G, stencil test val[0:7], stencil op val[8:15] */
5508 args
.out
[2] = LLVMGetUndef(ctx
->f32
); /* B, sample mask */
5509 args
.out
[3] = LLVMGetUndef(ctx
->f32
); /* A, alpha to mask */
5512 args
.out
[0] = depth
;
5513 args
.enabled_channels
|= 0x1;
5517 args
.out
[1] = stencil
;
5518 args
.enabled_channels
|= 0x2;
5522 args
.out
[2] = samplemask
;
5523 args
.enabled_channels
|= 0x4;
5526 /* SI (except OLAND) has a bug that it only looks
5527 * at the X writemask component. */
5528 if (ctx
->options
->chip_class
== SI
&&
5529 ctx
->options
->family
!= CHIP_OLAND
)
5530 args
.enabled_channels
|= 0x1;
5532 ac_build_export(&ctx
->ac
, &args
);
5536 handle_fs_outputs_post(struct nir_to_llvm_context
*ctx
)
5539 LLVMValueRef depth
= NULL
, stencil
= NULL
, samplemask
= NULL
;
5541 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
5542 LLVMValueRef values
[4];
5544 if (!(ctx
->output_mask
& (1ull << i
)))
5547 if (i
== FRAG_RESULT_DEPTH
) {
5548 ctx
->shader_info
->fs
.writes_z
= true;
5549 depth
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5550 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5551 } else if (i
== FRAG_RESULT_STENCIL
) {
5552 ctx
->shader_info
->fs
.writes_stencil
= true;
5553 stencil
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5554 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5555 } else if (i
== FRAG_RESULT_SAMPLE_MASK
) {
5556 ctx
->shader_info
->fs
.writes_sample_mask
= true;
5557 samplemask
= to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5558 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, 0)], ""));
5561 for (unsigned j
= 0; j
< 4; j
++)
5562 values
[j
] = to_float(ctx
, LLVMBuildLoad(ctx
->builder
,
5563 ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)], ""));
5565 if (!ctx
->shader_info
->fs
.writes_z
&& !ctx
->shader_info
->fs
.writes_stencil
&& !ctx
->shader_info
->fs
.writes_sample_mask
)
5566 last
= ctx
->output_mask
<= ((1ull << (i
+ 1)) - 1);
5568 si_export_mrt_color(ctx
, values
, V_008DFC_SQ_EXP_MRT
+ index
, last
);
5573 if (depth
|| stencil
|| samplemask
)
5574 si_export_mrt_z(ctx
, depth
, stencil
, samplemask
);
5576 si_export_mrt_color(ctx
, NULL
, V_008DFC_SQ_EXP_NULL
, true);
5578 ctx
->shader_info
->fs
.output_mask
= index
? ((1ull << index
) - 1) : 0;
5582 emit_gs_epilogue(struct nir_to_llvm_context
*ctx
)
5584 ac_build_sendmsg(&ctx
->ac
, AC_SENDMSG_GS_OP_NOP
| AC_SENDMSG_GS_DONE
, ctx
->gs_wave_id
);
5588 handle_shader_outputs_post(struct nir_to_llvm_context
*ctx
)
5590 switch (ctx
->stage
) {
5591 case MESA_SHADER_VERTEX
:
5592 if (ctx
->options
->key
.vs
.as_ls
)
5593 handle_ls_outputs_post(ctx
);
5594 else if (ctx
->options
->key
.vs
.as_es
)
5595 handle_es_outputs_post(ctx
, &ctx
->shader_info
->vs
.es_info
);
5597 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->vs
.outinfo
);
5599 case MESA_SHADER_FRAGMENT
:
5600 handle_fs_outputs_post(ctx
);
5602 case MESA_SHADER_GEOMETRY
:
5603 emit_gs_epilogue(ctx
);
5605 case MESA_SHADER_TESS_CTRL
:
5606 handle_tcs_outputs_post(ctx
);
5608 case MESA_SHADER_TESS_EVAL
:
5609 if (ctx
->options
->key
.tes
.as_es
)
5610 handle_es_outputs_post(ctx
, &ctx
->shader_info
->tes
.es_info
);
5612 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->tes
.outinfo
);
5620 handle_shared_compute_var(struct nir_to_llvm_context
*ctx
,
5621 struct nir_variable
*variable
, uint32_t *offset
, int idx
)
5623 unsigned size
= glsl_count_attribute_slots(variable
->type
, false);
5624 variable
->data
.driver_location
= *offset
;
5628 static void ac_llvm_finalize_module(struct nir_to_llvm_context
* ctx
)
5630 LLVMPassManagerRef passmgr
;
5631 /* Create the pass manager */
5632 passmgr
= LLVMCreateFunctionPassManagerForModule(
5635 /* This pass should eliminate all the load and store instructions */
5636 LLVMAddPromoteMemoryToRegisterPass(passmgr
);
5638 /* Add some optimization passes */
5639 LLVMAddScalarReplAggregatesPass(passmgr
);
5640 LLVMAddLICMPass(passmgr
);
5641 LLVMAddAggressiveDCEPass(passmgr
);
5642 LLVMAddCFGSimplificationPass(passmgr
);
5643 LLVMAddInstructionCombiningPass(passmgr
);
5646 LLVMInitializeFunctionPassManager(passmgr
);
5647 LLVMRunFunctionPassManager(passmgr
, ctx
->main_function
);
5648 LLVMFinalizeFunctionPassManager(passmgr
);
5650 LLVMDisposeBuilder(ctx
->builder
);
5651 LLVMDisposePassManager(passmgr
);
5655 ac_setup_rings(struct nir_to_llvm_context
*ctx
)
5657 if ((ctx
->stage
== MESA_SHADER_VERTEX
&& ctx
->options
->key
.vs
.as_es
) ||
5658 (ctx
->stage
== MESA_SHADER_TESS_EVAL
&& ctx
->options
->key
.tes
.as_es
)) {
5659 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_VS
, false));
5662 if (ctx
->is_gs_copy_shader
) {
5663 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_VS
, false));
5665 if (ctx
->stage
== MESA_SHADER_GEOMETRY
) {
5667 ctx
->esgs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_ESGS_GS
, false));
5668 ctx
->gsvs_ring
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_GSVS_GS
, false));
5670 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v4i32
, "");
5672 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->gsvs_num_entries
, LLVMConstInt(ctx
->i32
, 2, false), "");
5673 tmp
= LLVMBuildExtractElement(ctx
->builder
, ctx
->gsvs_ring
, ctx
->i32one
, "");
5674 tmp
= LLVMBuildOr(ctx
->builder
, tmp
, ctx
->gsvs_ring_stride
, "");
5675 ctx
->gsvs_ring
= LLVMBuildInsertElement(ctx
->builder
, ctx
->gsvs_ring
, tmp
, ctx
->i32one
, "");
5677 ctx
->gsvs_ring
= LLVMBuildBitCast(ctx
->builder
, ctx
->gsvs_ring
, ctx
->v16i8
, "");
5680 if (ctx
->stage
== MESA_SHADER_TESS_CTRL
||
5681 ctx
->stage
== MESA_SHADER_TESS_EVAL
) {
5682 ctx
->hs_ring_tess_offchip
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_OFFCHIP
, false));
5683 ctx
->hs_ring_tess_factor
= ac_build_indexed_load_const(&ctx
->ac
, ctx
->ring_offsets
, LLVMConstInt(ctx
->i32
, RING_HS_TESS_FACTOR
, false));
5688 LLVMModuleRef
ac_translate_nir_to_llvm(LLVMTargetMachineRef tm
,
5689 struct nir_shader
*nir
,
5690 struct ac_shader_variant_info
*shader_info
,
5691 const struct ac_nir_compiler_options
*options
)
5693 struct nir_to_llvm_context ctx
= {0};
5694 struct nir_function
*func
;
5696 ctx
.options
= options
;
5697 ctx
.shader_info
= shader_info
;
5698 ctx
.context
= LLVMContextCreate();
5699 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
5701 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
5702 ctx
.ac
.module
= ctx
.module
;
5704 ctx
.has_ds_bpermute
= ctx
.options
->chip_class
>= VI
;
5706 memset(shader_info
, 0, sizeof(*shader_info
));
5708 ac_nir_shader_info_pass(nir
, options
, &shader_info
->info
);
5710 LLVMSetTarget(ctx
.module
, options
->supports_spill
? "amdgcn-mesa-mesa3d" : "amdgcn--");
5712 LLVMTargetDataRef data_layout
= LLVMCreateTargetDataLayout(tm
);
5713 char *data_layout_str
= LLVMCopyStringRepOfTargetData(data_layout
);
5714 LLVMSetDataLayout(ctx
.module
, data_layout_str
);
5715 LLVMDisposeTargetData(data_layout
);
5716 LLVMDisposeMessage(data_layout_str
);
5720 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
5721 ctx
.ac
.builder
= ctx
.builder
;
5722 ctx
.stage
= nir
->stage
;
5724 for (i
= 0; i
< AC_UD_MAX_SETS
; i
++)
5725 shader_info
->user_sgprs_locs
.descriptor_sets
[i
].sgpr_idx
= -1;
5726 for (i
= 0; i
< AC_UD_MAX_UD
; i
++)
5727 shader_info
->user_sgprs_locs
.shader_data
[i
].sgpr_idx
= -1;
5729 create_function(&ctx
);
5731 if (nir
->stage
== MESA_SHADER_COMPUTE
) {
5733 nir_foreach_variable(variable
, &nir
->shared
)
5737 uint32_t shared_size
= 0;
5739 LLVMTypeRef i8p
= LLVMPointerType(ctx
.i8
, LOCAL_ADDR_SPACE
);
5740 nir_foreach_variable(variable
, &nir
->shared
) {
5741 handle_shared_compute_var(&ctx
, variable
, &shared_size
, idx
);
5746 var
= LLVMAddGlobalInAddressSpace(ctx
.module
,
5747 LLVMArrayType(ctx
.i8
, shared_size
),
5750 LLVMSetAlignment(var
, 4);
5751 ctx
.shared_memory
= LLVMBuildBitCast(ctx
.builder
, var
, i8p
, "");
5753 } else if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5754 ctx
.gs_next_vertex
= ac_build_alloca(&ctx
, ctx
.i32
, "gs_next_vertex");
5756 ctx
.gs_max_out_vertices
= nir
->info
->gs
.vertices_out
;
5757 } else if (nir
->stage
== MESA_SHADER_TESS_EVAL
) {
5758 ctx
.tes_primitive_mode
= nir
->info
->tess
.primitive_mode
;
5761 ac_setup_rings(&ctx
);
5763 nir_foreach_variable(variable
, &nir
->inputs
)
5764 handle_shader_input_decl(&ctx
, variable
);
5766 if (nir
->stage
== MESA_SHADER_FRAGMENT
)
5767 handle_fs_inputs_pre(&ctx
, nir
);
5769 ctx
.num_output_clips
= nir
->info
->clip_distance_array_size
;
5770 ctx
.num_output_culls
= nir
->info
->cull_distance_array_size
;
5772 nir_foreach_variable(variable
, &nir
->outputs
)
5773 handle_shader_output_decl(&ctx
, variable
);
5775 ctx
.defs
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5776 _mesa_key_pointer_equal
);
5777 ctx
.phis
= _mesa_hash_table_create(NULL
, _mesa_hash_pointer
,
5778 _mesa_key_pointer_equal
);
5780 func
= (struct nir_function
*)exec_list_get_head(&nir
->functions
);
5782 setup_locals(&ctx
, func
);
5784 visit_cf_list(&ctx
, &func
->impl
->body
);
5785 phi_post_pass(&ctx
);
5787 handle_shader_outputs_post(&ctx
);
5788 LLVMBuildRetVoid(ctx
.builder
);
5790 ac_llvm_finalize_module(&ctx
);
5792 ralloc_free(ctx
.defs
);
5793 ralloc_free(ctx
.phis
);
5795 if (nir
->stage
== MESA_SHADER_GEOMETRY
) {
5796 unsigned addclip
= ctx
.num_output_clips
+ ctx
.num_output_culls
> 4;
5797 shader_info
->gs
.gsvs_vertex_size
= (util_bitcount64(ctx
.output_mask
) + addclip
) * 16;
5798 shader_info
->gs
.max_gsvs_emit_size
= shader_info
->gs
.gsvs_vertex_size
*
5799 nir
->info
->gs
.vertices_out
;
5800 } else if (nir
->stage
== MESA_SHADER_TESS_CTRL
) {
5801 shader_info
->tcs
.outputs_written
= ctx
.tess_outputs_written
;
5802 shader_info
->tcs
.patch_outputs_written
= ctx
.tess_patch_outputs_written
;
5803 } else if (nir
->stage
== MESA_SHADER_VERTEX
&& ctx
.options
->key
.vs
.as_ls
) {
5804 shader_info
->vs
.outputs_written
= ctx
.tess_outputs_written
;
5810 static void ac_diagnostic_handler(LLVMDiagnosticInfoRef di
, void *context
)
5812 unsigned *retval
= (unsigned *)context
;
5813 LLVMDiagnosticSeverity severity
= LLVMGetDiagInfoSeverity(di
);
5814 char *description
= LLVMGetDiagInfoDescription(di
);
5816 if (severity
== LLVMDSError
) {
5818 fprintf(stderr
, "LLVM triggered Diagnostic Handler: %s\n",
5822 LLVMDisposeMessage(description
);
5825 static unsigned ac_llvm_compile(LLVMModuleRef M
,
5826 struct ac_shader_binary
*binary
,
5827 LLVMTargetMachineRef tm
)
5829 unsigned retval
= 0;
5831 LLVMContextRef llvm_ctx
;
5832 LLVMMemoryBufferRef out_buffer
;
5833 unsigned buffer_size
;
5834 const char *buffer_data
;
5837 /* Setup Diagnostic Handler*/
5838 llvm_ctx
= LLVMGetModuleContext(M
);
5840 LLVMContextSetDiagnosticHandler(llvm_ctx
, ac_diagnostic_handler
,
5844 mem_err
= LLVMTargetMachineEmitToMemoryBuffer(tm
, M
, LLVMObjectFile
,
5847 /* Process Errors/Warnings */
5849 fprintf(stderr
, "%s: %s", __FUNCTION__
, err
);
5855 /* Extract Shader Code*/
5856 buffer_size
= LLVMGetBufferSize(out_buffer
);
5857 buffer_data
= LLVMGetBufferStart(out_buffer
);
5859 ac_elf_read(buffer_data
, buffer_size
, binary
);
5862 LLVMDisposeMemoryBuffer(out_buffer
);
5868 static void ac_compile_llvm_module(LLVMTargetMachineRef tm
,
5869 LLVMModuleRef llvm_module
,
5870 struct ac_shader_binary
*binary
,
5871 struct ac_shader_config
*config
,
5872 struct ac_shader_variant_info
*shader_info
,
5873 gl_shader_stage stage
,
5874 bool dump_shader
, bool supports_spill
)
5877 ac_dump_module(llvm_module
);
5879 memset(binary
, 0, sizeof(*binary
));
5880 int v
= ac_llvm_compile(llvm_module
, binary
, tm
);
5882 fprintf(stderr
, "compile failed\n");
5886 fprintf(stderr
, "disasm:\n%s\n", binary
->disasm_string
);
5888 ac_shader_binary_read_config(binary
, config
, 0, supports_spill
);
5890 LLVMContextRef ctx
= LLVMGetModuleContext(llvm_module
);
5891 LLVMDisposeModule(llvm_module
);
5892 LLVMContextDispose(ctx
);
5894 if (stage
== MESA_SHADER_FRAGMENT
) {
5895 shader_info
->num_input_vgprs
= 0;
5896 if (G_0286CC_PERSP_SAMPLE_ENA(config
->spi_ps_input_addr
))
5897 shader_info
->num_input_vgprs
+= 2;
5898 if (G_0286CC_PERSP_CENTER_ENA(config
->spi_ps_input_addr
))
5899 shader_info
->num_input_vgprs
+= 2;
5900 if (G_0286CC_PERSP_CENTROID_ENA(config
->spi_ps_input_addr
))
5901 shader_info
->num_input_vgprs
+= 2;
5902 if (G_0286CC_PERSP_PULL_MODEL_ENA(config
->spi_ps_input_addr
))
5903 shader_info
->num_input_vgprs
+= 3;
5904 if (G_0286CC_LINEAR_SAMPLE_ENA(config
->spi_ps_input_addr
))
5905 shader_info
->num_input_vgprs
+= 2;
5906 if (G_0286CC_LINEAR_CENTER_ENA(config
->spi_ps_input_addr
))
5907 shader_info
->num_input_vgprs
+= 2;
5908 if (G_0286CC_LINEAR_CENTROID_ENA(config
->spi_ps_input_addr
))
5909 shader_info
->num_input_vgprs
+= 2;
5910 if (G_0286CC_LINE_STIPPLE_TEX_ENA(config
->spi_ps_input_addr
))
5911 shader_info
->num_input_vgprs
+= 1;
5912 if (G_0286CC_POS_X_FLOAT_ENA(config
->spi_ps_input_addr
))
5913 shader_info
->num_input_vgprs
+= 1;
5914 if (G_0286CC_POS_Y_FLOAT_ENA(config
->spi_ps_input_addr
))
5915 shader_info
->num_input_vgprs
+= 1;
5916 if (G_0286CC_POS_Z_FLOAT_ENA(config
->spi_ps_input_addr
))
5917 shader_info
->num_input_vgprs
+= 1;
5918 if (G_0286CC_POS_W_FLOAT_ENA(config
->spi_ps_input_addr
))
5919 shader_info
->num_input_vgprs
+= 1;
5920 if (G_0286CC_FRONT_FACE_ENA(config
->spi_ps_input_addr
))
5921 shader_info
->num_input_vgprs
+= 1;
5922 if (G_0286CC_ANCILLARY_ENA(config
->spi_ps_input_addr
))
5923 shader_info
->num_input_vgprs
+= 1;
5924 if (G_0286CC_SAMPLE_COVERAGE_ENA(config
->spi_ps_input_addr
))
5925 shader_info
->num_input_vgprs
+= 1;
5926 if (G_0286CC_POS_FIXED_PT_ENA(config
->spi_ps_input_addr
))
5927 shader_info
->num_input_vgprs
+= 1;
5929 config
->num_vgprs
= MAX2(config
->num_vgprs
, shader_info
->num_input_vgprs
);
5931 /* +3 for scratch wave offset and VCC */
5932 config
->num_sgprs
= MAX2(config
->num_sgprs
,
5933 shader_info
->num_input_sgprs
+ 3);
5936 void ac_compile_nir_shader(LLVMTargetMachineRef tm
,
5937 struct ac_shader_binary
*binary
,
5938 struct ac_shader_config
*config
,
5939 struct ac_shader_variant_info
*shader_info
,
5940 struct nir_shader
*nir
,
5941 const struct ac_nir_compiler_options
*options
,
5945 LLVMModuleRef llvm_module
= ac_translate_nir_to_llvm(tm
, nir
, shader_info
,
5948 ac_compile_llvm_module(tm
, llvm_module
, binary
, config
, shader_info
, nir
->stage
, dump_shader
, options
->supports_spill
);
5949 switch (nir
->stage
) {
5950 case MESA_SHADER_COMPUTE
:
5951 for (int i
= 0; i
< 3; ++i
)
5952 shader_info
->cs
.block_size
[i
] = nir
->info
->cs
.local_size
[i
];
5954 case MESA_SHADER_FRAGMENT
:
5955 shader_info
->fs
.early_fragment_test
= nir
->info
->fs
.early_fragment_tests
;
5957 case MESA_SHADER_GEOMETRY
:
5958 shader_info
->gs
.vertices_in
= nir
->info
->gs
.vertices_in
;
5959 shader_info
->gs
.vertices_out
= nir
->info
->gs
.vertices_out
;
5960 shader_info
->gs
.output_prim
= nir
->info
->gs
.output_primitive
;
5961 shader_info
->gs
.invocations
= nir
->info
->gs
.invocations
;
5963 case MESA_SHADER_TESS_EVAL
:
5964 shader_info
->tes
.primitive_mode
= nir
->info
->tess
.primitive_mode
;
5965 shader_info
->tes
.spacing
= nir
->info
->tess
.spacing
;
5966 shader_info
->tes
.ccw
= nir
->info
->tess
.ccw
;
5967 shader_info
->tes
.point_mode
= nir
->info
->tess
.point_mode
;
5968 shader_info
->tes
.as_es
= options
->key
.tes
.as_es
;
5970 case MESA_SHADER_TESS_CTRL
:
5971 shader_info
->tcs
.tcs_vertices_out
= nir
->info
->tess
.tcs_vertices_out
;
5973 case MESA_SHADER_VERTEX
:
5974 shader_info
->vs
.as_es
= options
->key
.vs
.as_es
;
5975 shader_info
->vs
.as_ls
= options
->key
.vs
.as_ls
;
5976 /* in LS mode we need at least 1, invocation id needs 3, handled elsewhere */
5977 if (options
->key
.vs
.as_ls
)
5978 shader_info
->vs
.vgpr_comp_cnt
= MAX2(1, shader_info
->vs
.vgpr_comp_cnt
);
5986 ac_gs_copy_shader_emit(struct nir_to_llvm_context
*ctx
)
5988 LLVMValueRef args
[9];
5989 args
[0] = ctx
->gsvs_ring
;
5990 args
[1] = LLVMBuildMul(ctx
->builder
, ctx
->vertex_id
, LLVMConstInt(ctx
->i32
, 4, false), "");
5991 args
[3] = ctx
->i32zero
;
5992 args
[4] = ctx
->i32one
; /* OFFEN */
5993 args
[5] = ctx
->i32zero
; /* IDXEN */
5994 args
[6] = ctx
->i32one
; /* GLC */
5995 args
[7] = ctx
->i32one
; /* SLC */
5996 args
[8] = ctx
->i32zero
; /* TFE */
6000 for (unsigned i
= 0; i
< RADEON_LLVM_MAX_OUTPUTS
; ++i
) {
6004 if (!(ctx
->output_mask
& (1ull << i
)))
6007 if (i
== VARYING_SLOT_CLIP_DIST0
) {
6008 /* unpack clip and cull from a single set of slots */
6009 length
= ctx
->num_output_clips
+ ctx
->num_output_culls
;
6014 for (unsigned j
= 0; j
< length
; j
++) {
6016 args
[2] = LLVMConstInt(ctx
->i32
,
6018 ctx
->gs_max_out_vertices
* 16 * 4, false);
6020 value
= ac_build_intrinsic(&ctx
->ac
,
6021 "llvm.SI.buffer.load.dword.i32.i32",
6023 AC_FUNC_ATTR_READONLY
|
6024 AC_FUNC_ATTR_LEGACY
);
6026 LLVMBuildStore(ctx
->builder
,
6027 to_float(ctx
, value
), ctx
->outputs
[radeon_llvm_reg_index_soa(i
, j
)]);
6031 handle_vs_outputs_post(ctx
, &ctx
->shader_info
->vs
.outinfo
);
6034 void ac_create_gs_copy_shader(LLVMTargetMachineRef tm
,
6035 struct nir_shader
*geom_shader
,
6036 struct ac_shader_binary
*binary
,
6037 struct ac_shader_config
*config
,
6038 struct ac_shader_variant_info
*shader_info
,
6039 const struct ac_nir_compiler_options
*options
,
6042 struct nir_to_llvm_context ctx
= {0};
6043 ctx
.context
= LLVMContextCreate();
6044 ctx
.module
= LLVMModuleCreateWithNameInContext("shader", ctx
.context
);
6045 ctx
.options
= options
;
6046 ctx
.shader_info
= shader_info
;
6048 ac_llvm_context_init(&ctx
.ac
, ctx
.context
);
6049 ctx
.ac
.module
= ctx
.module
;
6051 ctx
.is_gs_copy_shader
= true;
6052 LLVMSetTarget(ctx
.module
, "amdgcn--");
6055 ctx
.builder
= LLVMCreateBuilderInContext(ctx
.context
);
6056 ctx
.ac
.builder
= ctx
.builder
;
6057 ctx
.stage
= MESA_SHADER_VERTEX
;
6059 create_function(&ctx
);
6061 ctx
.gs_max_out_vertices
= geom_shader
->info
->gs
.vertices_out
;
6062 ac_setup_rings(&ctx
);
6064 ctx
.num_output_clips
= geom_shader
->info
->clip_distance_array_size
;
6065 ctx
.num_output_culls
= geom_shader
->info
->cull_distance_array_size
;
6067 nir_foreach_variable(variable
, &geom_shader
->outputs
)
6068 handle_shader_output_decl(&ctx
, variable
);
6070 ac_gs_copy_shader_emit(&ctx
);
6072 LLVMBuildRetVoid(ctx
.builder
);
6074 ac_llvm_finalize_module(&ctx
);
6076 ac_compile_llvm_module(tm
, ctx
.module
, binary
, config
, shader_info
,
6078 dump_shader
, options
->supports_spill
);