src/amd/compiler/aco_print_ir.cpp

   1 #include "aco_ir.h"
   2 #include "aco_builder.h"
   3
   4 #include "sid.h"
   5 #include "ac_shader_util.h"
   6
   7 namespace aco {
   8
   9 static const char *reduce_ops[] = {
  10    [iadd32] = "iadd32",
  11    [iadd64] = "iadd64",
  12    [imul32] = "imul32",
  13    [imul64] = "imul64",
  14    [fadd32] = "fadd32",
  15    [fadd64] = "fadd64",
  16    [fmul32] = "fmul32",
  17    [fmul64] = "fmul64",
  18    [imin32] = "imin32",
  19    [imin64] = "imin64",
  20    [imax32] = "imax32",
  21    [imax64] = "imax64",
  22    [umin32] = "umin32",
  23    [umin64] = "umin64",
  24    [umax32] = "umax32",
  25    [umax64] = "umax64",
  26    [fmin32] = "fmin32",
  27    [fmin64] = "fmin64",
  28    [fmax32] = "fmax32",
  29    [fmax64] = "fmax64",
  30    [iand32] = "iand32",
  31    [iand64] = "iand64",
  32    [ior32] = "ior32",
  33    [ior64] = "ior64",
  34    [ixor32] = "ixor32",
  35    [ixor64] = "ixor64",
  36 };
  37
  38 static void print_reg_class(const RegClass rc, FILE *output)
  39 {
  40    switch (rc) {
  41       case RegClass::s1: fprintf(output, " s1: "); return;
  42       case RegClass::s2: fprintf(output, " s2: "); return;
  43       case RegClass::s3: fprintf(output, " s3: "); return;
  44       case RegClass::s4: fprintf(output, " s4: "); return;
  45       case RegClass::s6: fprintf(output, " s6: "); return;
  46       case RegClass::s8: fprintf(output, " s8: "); return;
  47       case RegClass::s16: fprintf(output, "s16: "); return;
  48       case RegClass::v1: fprintf(output, " v1: "); return;
  49       case RegClass::v2: fprintf(output, " v2: "); return;
  50       case RegClass::v3: fprintf(output, " v3: "); return;
  51       case RegClass::v4: fprintf(output, " v4: "); return;
  52       case RegClass::v5: fprintf(output, " v5: "); return;
  53       case RegClass::v6: fprintf(output, " v6: "); return;
  54       case RegClass::v7: fprintf(output, " v7: "); return;
  55       case RegClass::v8: fprintf(output, " v8: "); return;
  56       case RegClass::v1_linear: fprintf(output, " v1: "); return;
  57       case RegClass::v2_linear: fprintf(output, " v2: "); return;
  58    }
  59 }
  60
  61 void print_physReg(unsigned reg, unsigned size, FILE *output)
  62 {
  63    if (reg == 124) {
  64       fprintf(output, ":m0");
  65    } else if (reg == 106) {
  66       fprintf(output, ":vcc");
  67    } else if (reg == 253) {
  68       fprintf(output, ":scc");
  69    } else if (reg == 126) {
  70       fprintf(output, ":exec");
  71    } else {
  72       bool is_vgpr = reg / 256;
  73       reg = reg % 256;
  74       fprintf(output, ":%c[%d", is_vgpr ? 'v' : 's', reg);
  75       if (size > 1)
  76          fprintf(output, "-%d]", reg + size -1);
  77       else
  78          fprintf(output, "]");
  79    }
  80 }
  81
  82 static void print_constant(uint8_t reg, FILE *output)
  83 {
  84    if (reg >= 128 && reg <= 192) {
  85       fprintf(output, "%d", reg - 128);
  86       return;
  87    } else if (reg >= 192 && reg <= 208) {
  88       fprintf(output, "%d", 192 - reg);
  89       return;
  90    }
  91
  92    switch (reg) {
  93    case 240:
  94       fprintf(output, "0.5");
  95       break;
  96    case 241:
  97       fprintf(output, "-0.5");
  98       break;
  99    case 242:
 100       fprintf(output, "1.0");
 101       break;
 102    case 243:
 103       fprintf(output, "-1.0");
 104       break;
 105    case 244:
 106       fprintf(output, "2.0");
 107       break;
 108    case 245:
 109       fprintf(output, "-2.0");
 110       break;
 111    case 246:
 112       fprintf(output, "4.0");
 113       break;
 114    case 247:
 115       fprintf(output, "-4.0");
 116       break;
 117    case 248:
 118       fprintf(output, "1/(2*PI)");
 119       break;
 120    }
 121 }
 122
 123 static void print_operand(const Operand *operand, FILE *output)
 124 {
 125    if (operand->isLiteral()) {
 126       fprintf(output, "0x%x", operand->constantValue());
 127    } else if (operand->isConstant()) {
 128       print_constant(operand->physReg().reg, output);
 129    } else if (operand->isUndefined()) {
 130       print_reg_class(operand->regClass(), output);
 131       fprintf(output, "undef");
 132    } else {
 133       fprintf(output, "%%%d", operand->tempId());
 134
 135       if (operand->isFixed())
 136          print_physReg(operand->physReg(), operand->size(), output);
 137    }
 138 }
 139
 140 static void print_definition(const Definition *definition, FILE *output)
 141 {
 142    print_reg_class(definition->regClass(), output);
 143    fprintf(output, "%%%d", definition->tempId());
 144
 145    if (definition->isFixed())
 146       print_physReg(definition->physReg(), definition->size(), output);
 147 }
 148
 149 static void print_barrier_reorder(bool can_reorder, barrier_interaction barrier, FILE *output)
 150 {
 151    if (can_reorder)
 152       fprintf(output, " reorder");
 153
 154    if (barrier & barrier_buffer)
 155       fprintf(output, " buffer");
 156    if (barrier & barrier_image)
 157       fprintf(output, " image");
 158    if (barrier & barrier_atomic)
 159       fprintf(output, " atomic");
 160    if (barrier & barrier_shared)
 161       fprintf(output, " shared");
 162    if (barrier & barrier_gs_data)
 163       fprintf(output, " gs_data");
 164    if (barrier & barrier_gs_sendmsg)
 165       fprintf(output, " gs_sendmsg");
 166 }
 167
 168 static void print_instr_format_specific(struct Instruction *instr, FILE *output)
 169 {
 170    switch (instr->format) {
 171    case Format::SOPK: {
 172       SOPK_instruction* sopk = static_cast<SOPK_instruction*>(instr);
 173       fprintf(output, " imm:%d", sopk->imm & 0x8000 ? (sopk->imm - 65536) : sopk->imm);
 174       break;
 175    }
 176    case Format::SOPP: {
 177       SOPP_instruction* sopp = static_cast<SOPP_instruction*>(instr);
 178       uint16_t imm = sopp->imm;
 179       switch (instr->opcode) {
 180       case aco_opcode::s_waitcnt: {
 181          /* we usually should check the chip class for vmcnt/lgkm, but
 182           * insert_waitcnt() should fill it in regardless. */
 183          unsigned vmcnt = (imm & 0xF) | ((imm & (0x3 << 14)) >> 10);
 184          if (vmcnt != 63) fprintf(output, " vmcnt(%d)", vmcnt);
 185          if (((imm >> 4) & 0x7) < 0x7) fprintf(output, " expcnt(%d)", (imm >> 4) & 0x7);
 186          if (((imm >> 8) & 0x3F) < 0x3F) fprintf(output, " lgkmcnt(%d)", (imm >> 8) & 0x3F);
 187          break;
 188       }
 189       case aco_opcode::s_endpgm:
 190       case aco_opcode::s_endpgm_saved:
 191       case aco_opcode::s_endpgm_ordered_ps_done:
 192       case aco_opcode::s_wakeup:
 193       case aco_opcode::s_barrier:
 194       case aco_opcode::s_icache_inv:
 195       case aco_opcode::s_ttracedata:
 196       case aco_opcode::s_set_gpr_idx_off: {
 197          break;
 198       }
 199       case aco_opcode::s_sendmsg: {
 200          unsigned id = imm & sendmsg_id_mask;
 201          switch (id) {
 202          case sendmsg_none:
 203             fprintf(output, " sendmsg(MSG_NONE)");
 204             break;
 205          case _sendmsg_gs:
 206             fprintf(output, " sendmsg(gs%s%s, %u)",
 207                     imm & 0x10 ? ", cut" : "", imm & 0x20 ? ", emit" : "", imm >> 8);
 208             break;
 209          case _sendmsg_gs_done:
 210             fprintf(output, " sendmsg(gs_done%s%s, %u)",
 211                     imm & 0x10 ? ", cut" : "", imm & 0x20 ? ", emit" : "", imm >> 8);
 212             break;
 213          case sendmsg_save_wave:
 214             fprintf(output, " sendmsg(save_wave)");
 215             break;
 216          case sendmsg_stall_wave_gen:
 217             fprintf(output, " sendmsg(stall_wave_gen)");
 218             break;
 219          case sendmsg_halt_waves:
 220             fprintf(output, " sendmsg(halt_waves)");
 221             break;
 222          case sendmsg_ordered_ps_done:
 223             fprintf(output, " sendmsg(ordered_ps_done)");
 224             break;
 225          case sendmsg_early_prim_dealloc:
 226             fprintf(output, " sendmsg(early_prim_dealloc)");
 227             break;
 228          case sendmsg_gs_alloc_req:
 229             fprintf(output, " sendmsg(gs_alloc_req)");
 230             break;
 231          }
 232          break;
 233       }
 234       default: {
 235          if (imm)
 236             fprintf(output, " imm:%u", imm);
 237          break;
 238       }
 239       }
 240       if (sopp->block != -1)
 241          fprintf(output, " block:BB%d", sopp->block);
 242       break;
 243    }
 244    case Format::SMEM: {
 245       SMEM_instruction* smem = static_cast<SMEM_instruction*>(instr);
 246       if (smem->glc)
 247          fprintf(output, " glc");
 248       if (smem->dlc)
 249          fprintf(output, " dlc");
 250       if (smem->nv)
 251          fprintf(output, " nv");
 252       print_barrier_reorder(smem->can_reorder, smem->barrier, output);
 253       break;
 254    }
 255    case Format::VINTRP: {
 256       Interp_instruction* vintrp = static_cast<Interp_instruction*>(instr);
 257       fprintf(output, " attr%d.%c", vintrp->attribute, "xyzw"[vintrp->component]);
 258       break;
 259    }
 260    case Format::DS: {
 261       DS_instruction* ds = static_cast<DS_instruction*>(instr);
 262       if (ds->offset0)
 263          fprintf(output, " offset0:%u", ds->offset0);
 264       if (ds->offset1)
 265          fprintf(output, " offset1:%u", ds->offset1);
 266       if (ds->gds)
 267          fprintf(output, " gds");
 268       break;
 269    }
 270    case Format::MUBUF: {
 271       MUBUF_instruction* mubuf = static_cast<MUBUF_instruction*>(instr);
 272       if (mubuf->offset)
 273          fprintf(output, " offset:%u", mubuf->offset);
 274       if (mubuf->offen)
 275          fprintf(output, " offen");
 276       if (mubuf->idxen)
 277          fprintf(output, " idxen");
 278       if (mubuf->addr64)
 279          fprintf(output, " addr64");
 280       if (mubuf->glc)
 281          fprintf(output, " glc");
 282       if (mubuf->dlc)
 283          fprintf(output, " dlc");
 284       if (mubuf->slc)
 285          fprintf(output, " slc");
 286       if (mubuf->tfe)
 287          fprintf(output, " tfe");
 288       if (mubuf->lds)
 289          fprintf(output, " lds");
 290       if (mubuf->disable_wqm)
 291          fprintf(output, " disable_wqm");
 292       print_barrier_reorder(mubuf->can_reorder, mubuf->barrier, output);
 293       break;
 294    }
 295    case Format::MIMG: {
 296       MIMG_instruction* mimg = static_cast<MIMG_instruction*>(instr);
 297       unsigned identity_dmask = !instr->definitions.empty() ?
 298                                 (1 << instr->definitions[0].size()) - 1 :
 299                                 0xf;
 300       if ((mimg->dmask & identity_dmask) != identity_dmask)
 301          fprintf(output, " dmask:%s%s%s%s",
 302                  mimg->dmask & 0x1 ? "x" : "",
 303                  mimg->dmask & 0x2 ? "y" : "",
 304                  mimg->dmask & 0x4 ? "z" : "",
 305                  mimg->dmask & 0x8 ? "w" : "");
 306       switch (mimg->dim) {
 307       case ac_image_1d:
 308          fprintf(output, " 1d");
 309          break;
 310       case ac_image_2d:
 311          fprintf(output, " 2d");
 312          break;
 313       case ac_image_3d:
 314          fprintf(output, " 3d");
 315          break;
 316       case ac_image_cube:
 317          fprintf(output, " cube");
 318          break;
 319       case ac_image_1darray:
 320          fprintf(output, " 1darray");
 321          break;
 322       case ac_image_2darray:
 323          fprintf(output, " 2darray");
 324          break;
 325       case ac_image_2dmsaa:
 326          fprintf(output, " 2dmsaa");
 327          break;
 328       case ac_image_2darraymsaa:
 329          fprintf(output, " 2darraymsaa");
 330          break;
 331       }
 332       if (mimg->unrm)
 333          fprintf(output, " unrm");
 334       if (mimg->glc)
 335          fprintf(output, " glc");
 336       if (mimg->dlc)
 337          fprintf(output, " dlc");
 338       if (mimg->slc)
 339          fprintf(output, " slc");
 340       if (mimg->tfe)
 341          fprintf(output, " tfe");
 342       if (mimg->da)
 343          fprintf(output, " da");
 344       if (mimg->lwe)
 345          fprintf(output, " lwe");
 346       if (mimg->r128 || mimg->a16)
 347          fprintf(output, " r128/a16");
 348       if (mimg->d16)
 349          fprintf(output, " d16");
 350       if (mimg->disable_wqm)
 351          fprintf(output, " disable_wqm");
 352       print_barrier_reorder(mimg->can_reorder, mimg->barrier, output);
 353       break;
 354    }
 355    case Format::EXP: {
 356       Export_instruction* exp = static_cast<Export_instruction*>(instr);
 357       unsigned identity_mask = exp->compressed ? 0x5 : 0xf;
 358       if ((exp->enabled_mask & identity_mask) != identity_mask)
 359          fprintf(output, " en:%c%c%c%c",
 360                  exp->enabled_mask & 0x1 ? 'r' : '*',
 361                  exp->enabled_mask & 0x2 ? 'g' : '*',
 362                  exp->enabled_mask & 0x4 ? 'b' : '*',
 363                  exp->enabled_mask & 0x8 ? 'a' : '*');
 364       if (exp->compressed)
 365          fprintf(output, " compr");
 366       if (exp->done)
 367          fprintf(output, " done");
 368       if (exp->valid_mask)
 369          fprintf(output, " vm");
 370
 371       if (exp->dest <= V_008DFC_SQ_EXP_MRT + 7)
 372          fprintf(output, " mrt%d", exp->dest - V_008DFC_SQ_EXP_MRT);
 373       else if (exp->dest == V_008DFC_SQ_EXP_MRTZ)
 374          fprintf(output, " mrtz");
 375       else if (exp->dest == V_008DFC_SQ_EXP_NULL)
 376          fprintf(output, " null");
 377       else if (exp->dest >= V_008DFC_SQ_EXP_POS && exp->dest <= V_008DFC_SQ_EXP_POS + 3)
 378          fprintf(output, " pos%d", exp->dest - V_008DFC_SQ_EXP_POS);
 379       else if (exp->dest >= V_008DFC_SQ_EXP_PARAM && exp->dest <= V_008DFC_SQ_EXP_PARAM + 31)
 380          fprintf(output, " param%d", exp->dest - V_008DFC_SQ_EXP_PARAM);
 381       break;
 382    }
 383    case Format::PSEUDO_BRANCH: {
 384       Pseudo_branch_instruction* branch = static_cast<Pseudo_branch_instruction*>(instr);
 385       /* Note: BB0 cannot be a branch target */
 386       if (branch->target[0] != 0)
 387          fprintf(output, " BB%d", branch->target[0]);
 388       if (branch->target[1] != 0)
 389          fprintf(output, ", BB%d", branch->target[1]);
 390       break;
 391    }
 392    case Format::PSEUDO_REDUCTION: {
 393       Pseudo_reduction_instruction* reduce = static_cast<Pseudo_reduction_instruction*>(instr);
 394       fprintf(output, " op:%s", reduce_ops[reduce->reduce_op]);
 395       if (reduce->cluster_size)
 396          fprintf(output, " cluster_size:%u", reduce->cluster_size);
 397       break;
 398    }
 399    case Format::FLAT:
 400    case Format::GLOBAL:
 401    case Format::SCRATCH: {
 402       FLAT_instruction* flat = static_cast<FLAT_instruction*>(instr);
 403       if (flat->offset)
 404          fprintf(output, " offset:%u", flat->offset);
 405       if (flat->glc)
 406          fprintf(output, " glc");
 407       if (flat->dlc)
 408          fprintf(output, " dlc");
 409       if (flat->slc)
 410          fprintf(output, " slc");
 411       if (flat->lds)
 412          fprintf(output, " lds");
 413       if (flat->nv)
 414          fprintf(output, " nv");
 415       if (flat->disable_wqm)
 416          fprintf(output, " disable_wqm");
 417       print_barrier_reorder(flat->can_reorder, flat->barrier, output);
 418       break;
 419    }
 420    case Format::MTBUF: {
 421       MTBUF_instruction* mtbuf = static_cast<MTBUF_instruction*>(instr);
 422       fprintf(output, " dfmt:");
 423       switch (mtbuf->dfmt) {
 424       case V_008F0C_BUF_DATA_FORMAT_8: fprintf(output, "8"); break;
 425       case V_008F0C_BUF_DATA_FORMAT_16: fprintf(output, "16"); break;
 426       case V_008F0C_BUF_DATA_FORMAT_8_8: fprintf(output, "8_8"); break;
 427       case V_008F0C_BUF_DATA_FORMAT_32: fprintf(output, "32"); break;
 428       case V_008F0C_BUF_DATA_FORMAT_16_16: fprintf(output, "16_16"); break;
 429       case V_008F0C_BUF_DATA_FORMAT_10_11_11: fprintf(output, "10_11_11"); break;
 430       case V_008F0C_BUF_DATA_FORMAT_11_11_10: fprintf(output, "11_11_10"); break;
 431       case V_008F0C_BUF_DATA_FORMAT_10_10_10_2: fprintf(output, "10_10_10_2"); break;
 432       case V_008F0C_BUF_DATA_FORMAT_2_10_10_10: fprintf(output, "2_10_10_10"); break;
 433       case V_008F0C_BUF_DATA_FORMAT_8_8_8_8: fprintf(output, "8_8_8_8"); break;
 434       case V_008F0C_BUF_DATA_FORMAT_32_32: fprintf(output, "32_32"); break;
 435       case V_008F0C_BUF_DATA_FORMAT_16_16_16_16: fprintf(output, "16_16_16_16"); break;
 436       case V_008F0C_BUF_DATA_FORMAT_32_32_32: fprintf(output, "32_32_32"); break;
 437       case V_008F0C_BUF_DATA_FORMAT_32_32_32_32: fprintf(output, "32_32_32_32"); break;
 438       case V_008F0C_BUF_DATA_FORMAT_RESERVED_15: fprintf(output, "reserved15"); break;
 439       }
 440       fprintf(output, " nfmt:");
 441       switch (mtbuf->nfmt) {
 442       case V_008F0C_BUF_NUM_FORMAT_UNORM: fprintf(output, "unorm"); break;
 443       case V_008F0C_BUF_NUM_FORMAT_SNORM: fprintf(output, "snorm"); break;
 444       case V_008F0C_BUF_NUM_FORMAT_USCALED: fprintf(output, "uscaled"); break;
 445       case V_008F0C_BUF_NUM_FORMAT_SSCALED: fprintf(output, "sscaled"); break;
 446       case V_008F0C_BUF_NUM_FORMAT_UINT: fprintf(output, "uint"); break;
 447       case V_008F0C_BUF_NUM_FORMAT_SINT: fprintf(output, "sint"); break;
 448       case V_008F0C_BUF_NUM_FORMAT_SNORM_OGL: fprintf(output, "snorm"); break;
 449       case V_008F0C_BUF_NUM_FORMAT_FLOAT: fprintf(output, "float"); break;
 450       }
 451       if (mtbuf->offset)
 452          fprintf(output, " offset:%u", mtbuf->offset);
 453       if (mtbuf->offen)
 454          fprintf(output, " offen");
 455       if (mtbuf->idxen)
 456          fprintf(output, " idxen");
 457       if (mtbuf->glc)
 458          fprintf(output, " glc");
 459       if (mtbuf->dlc)
 460          fprintf(output, " dlc");
 461       if (mtbuf->slc)
 462          fprintf(output, " slc");
 463       if (mtbuf->tfe)
 464          fprintf(output, " tfe");
 465       if (mtbuf->disable_wqm)
 466          fprintf(output, " disable_wqm");
 467       print_barrier_reorder(mtbuf->can_reorder, mtbuf->barrier, output);
 468       break;
 469    }
 470    default: {
 471       break;
 472    }
 473    }
 474    if (instr->isVOP3()) {
 475       VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
 476       switch (vop3->omod) {
 477       case 1:
 478          fprintf(output, " *2");
 479          break;
 480       case 2:
 481          fprintf(output, " *4");
 482          break;
 483       case 3:
 484          fprintf(output, " *0.5");
 485          break;
 486       }
 487       if (vop3->clamp)
 488          fprintf(output, " clamp");
 489    } else if (instr->isDPP()) {
 490       DPP_instruction* dpp = static_cast<DPP_instruction*>(instr);
 491       if (dpp->dpp_ctrl <= 0xff) {
 492          fprintf(output, " quad_perm:[%d,%d,%d,%d]",
 493                  dpp->dpp_ctrl & 0x3, (dpp->dpp_ctrl >> 2) & 0x3,
 494                  (dpp->dpp_ctrl >> 4) & 0x3, (dpp->dpp_ctrl >> 6) & 0x3);
 495       } else if (dpp->dpp_ctrl >= 0x101 && dpp->dpp_ctrl <= 0x10f) {
 496          fprintf(output, " row_shl:%d", dpp->dpp_ctrl & 0xf);
 497       } else if (dpp->dpp_ctrl >= 0x111 && dpp->dpp_ctrl <= 0x11f) {
 498          fprintf(output, " row_shr:%d", dpp->dpp_ctrl & 0xf);
 499       } else if (dpp->dpp_ctrl >= 0x121 && dpp->dpp_ctrl <= 0x12f) {
 500          fprintf(output, " row_ror:%d", dpp->dpp_ctrl & 0xf);
 501       } else if (dpp->dpp_ctrl == dpp_wf_sl1) {
 502          fprintf(output, " wave_shl:1");
 503       } else if (dpp->dpp_ctrl == dpp_wf_rl1) {
 504          fprintf(output, " wave_rol:1");
 505       } else if (dpp->dpp_ctrl == dpp_wf_sr1) {
 506          fprintf(output, " wave_shr:1");
 507       } else if (dpp->dpp_ctrl == dpp_wf_rr1) {
 508          fprintf(output, " wave_ror:1");
 509       } else if (dpp->dpp_ctrl == dpp_row_mirror) {
 510          fprintf(output, " row_mirror");
 511       } else if (dpp->dpp_ctrl == dpp_row_half_mirror) {
 512          fprintf(output, " row_half_mirror");
 513       } else if (dpp->dpp_ctrl == dpp_row_bcast15) {
 514          fprintf(output, " row_bcast:15");
 515       } else if (dpp->dpp_ctrl == dpp_row_bcast31) {
 516          fprintf(output, " row_bcast:31");
 517       } else {
 518          fprintf(output, " dpp_ctrl:0x%.3x", dpp->dpp_ctrl);
 519       }
 520       if (dpp->row_mask != 0xf)
 521          fprintf(output, " row_mask:0x%.1x", dpp->row_mask);
 522       if (dpp->bank_mask != 0xf)
 523          fprintf(output, " bank_mask:0x%.1x", dpp->bank_mask);
 524       if (dpp->bound_ctrl)
 525          fprintf(output, " bound_ctrl:1");
 526    } else if ((int)instr->format & (int)Format::SDWA) {
 527       fprintf(output, " (printing unimplemented)");
 528    }
 529 }
 530
 531 void aco_print_instr(struct Instruction *instr, FILE *output)
 532 {
 533    if (!instr->definitions.empty()) {
 534       for (unsigned i = 0; i < instr->definitions.size(); ++i) {
 535          print_definition(&instr->definitions[i], output);
 536          if (i + 1 != instr->definitions.size())
 537             fprintf(output, ", ");
 538       }
 539       fprintf(output, " = ");
 540    }
 541    fprintf(output, "%s", instr_info.name[(int)instr->opcode]);
 542    if (instr->operands.size()) {
 543       bool abs[instr->operands.size()];
 544       bool neg[instr->operands.size()];
 545       if ((int)instr->format & (int)Format::VOP3A) {
 546          VOP3A_instruction* vop3 = static_cast<VOP3A_instruction*>(instr);
 547          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 548             abs[i] = vop3->abs[i];
 549             neg[i] = vop3->neg[i];
 550          }
 551       } else if (instr->isDPP()) {
 552          DPP_instruction* dpp = static_cast<DPP_instruction*>(instr);
 553          assert(instr->operands.size() <= 2);
 554          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 555             abs[i] = dpp->abs[i];
 556             neg[i] = dpp->neg[i];
 557          }
 558       } else {
 559          for (unsigned i = 0; i < instr->operands.size(); ++i) {
 560             abs[i] = false;
 561             neg[i] = false;
 562          }
 563       }
 564       for (unsigned i = 0; i < instr->operands.size(); ++i) {
 565          if (i)
 566             fprintf(output, ", ");
 567          else
 568             fprintf(output, " ");
 569
 570          if (neg[i])
 571             fprintf(output, "-");
 572          if (abs[i])
 573             fprintf(output, "|");
 574          print_operand(&instr->operands[i], output);
 575          if (abs[i])
 576             fprintf(output, "|");
 577        }
 578    }
 579    print_instr_format_specific(instr, output);
 580 }
 581
 582 static void print_block_kind(uint16_t kind, FILE *output)
 583 {
 584    if (kind & block_kind_uniform)
 585       fprintf(output, "uniform, ");
 586    if (kind & block_kind_top_level)
 587       fprintf(output, "top-level, ");
 588    if (kind & block_kind_loop_preheader)
 589       fprintf(output, "loop-preheader, ");
 590    if (kind & block_kind_loop_header)
 591       fprintf(output, "loop-header, ");
 592    if (kind & block_kind_loop_exit)
 593       fprintf(output, "loop-exit, ");
 594    if (kind & block_kind_continue)
 595       fprintf(output, "continue, ");
 596    if (kind & block_kind_break)
 597       fprintf(output, "break, ");
 598    if (kind & block_kind_continue_or_break)
 599       fprintf(output, "continue_or_break, ");
 600    if (kind & block_kind_discard)
 601       fprintf(output, "discard, ");
 602    if (kind & block_kind_branch)
 603       fprintf(output, "branch, ");
 604    if (kind & block_kind_merge)
 605       fprintf(output, "merge, ");
 606    if (kind & block_kind_invert)
 607       fprintf(output, "invert, ");
 608    if (kind & block_kind_uses_discard_if)
 609       fprintf(output, "discard_if, ");
 610    if (kind & block_kind_needs_lowering)
 611       fprintf(output, "needs_lowering, ");
 612    if (kind & block_kind_uses_demote)
 613       fprintf(output, "uses_demote, ");
 614 }
 615
 616 void aco_print_block(const struct Block* block, FILE *output)
 617 {
 618    fprintf(output, "BB%d\n", block->index);
 619    fprintf(output, "/* logical preds: ");
 620    for (unsigned pred : block->logical_preds)
 621       fprintf(output, "BB%d, ", pred);
 622    fprintf(output, "/ linear preds: ");
 623    for (unsigned pred : block->linear_preds)
 624       fprintf(output, "BB%d, ", pred);
 625    fprintf(output, "/ kind: ");
 626    print_block_kind(block->kind, output);
 627    fprintf(output, "*/\n");
 628    for (auto const& instr : block->instructions) {
 629       fprintf(output, "\t");
 630       aco_print_instr(instr.get(), output);
 631       fprintf(output, "\n");
 632    }
 633 }
 634
 635 void aco_print_program(Program *program, FILE *output)
 636 {
 637    for (Block const& block : program->blocks)
 638       aco_print_block(&block, output);
 639
 640    if (program->constant_data.size()) {
 641       fprintf(output, "\n/* constant data */\n");
 642       for (unsigned i = 0; i < program->constant_data.size(); i += 32) {
 643          fprintf(output, "[%06d] ", i);
 644          unsigned line_size = std::min<size_t>(program->constant_data.size() - i, 32);
 645          for (unsigned j = 0; j < line_size; j += 4) {
 646             unsigned size = std::min<size_t>(program->constant_data.size() - (i + j), 4);
 647             uint32_t v = 0;
 648             memcpy(&v, &program->constant_data[i + j], size);
 649             fprintf(output, " %08x", v);
 650          }
 651          fprintf(output, "\n");
 652       }
 653    }
 654
 655    fprintf(output, "\n");
 656 }
 657
 658 }