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ac,radeonsi: simplify checking for Navi1x chips
[mesa.git] / src / amd / llvm / ac_llvm_build.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_build.h"
27
28 #include <llvm-c/Core.h>
29 #include <llvm/Config/llvm-config.h>
30
31 #include "c11/threads.h"
32
33 #include <assert.h>
34 #include <stdio.h>
35
36 #include "ac_llvm_util.h"
37 #include "ac_shader_util.h"
38 #include "ac_exp_param.h"
39 #include "util/bitscan.h"
40 #include "util/macros.h"
41 #include "util/u_atomic.h"
42 #include "util/u_math.h"
43 #include "sid.h"
44
45 #include "shader_enums.h"
46
47 #define AC_LLVM_INITIAL_CF_DEPTH 4
48
49 /* Data for if/else/endif and bgnloop/endloop control flow structures.
50 */
51 struct ac_llvm_flow {
52 /* Loop exit or next part of if/else/endif. */
53 LLVMBasicBlockRef next_block;
54 LLVMBasicBlockRef loop_entry_block;
55 };
56
57 /* Initialize module-independent parts of the context.
58 *
59 * The caller is responsible for initializing ctx::module and ctx::builder.
60 */
61 void
62 ac_llvm_context_init(struct ac_llvm_context *ctx,
63 struct ac_llvm_compiler *compiler,
64 enum chip_class chip_class, enum radeon_family family,
65 enum ac_float_mode float_mode, unsigned wave_size,
66 unsigned ballot_mask_bits)
67 {
68 ctx->context = LLVMContextCreate();
69
70 ctx->chip_class = chip_class;
71 ctx->family = family;
72 ctx->wave_size = wave_size;
73 ctx->ballot_mask_bits = ballot_mask_bits;
74 ctx->float_mode = float_mode;
75 ctx->module = ac_create_module(wave_size == 32 ? compiler->tm_wave32
76 : compiler->tm,
77 ctx->context);
78 ctx->builder = ac_create_builder(ctx->context, float_mode);
79
80 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
81 ctx->i1 = LLVMInt1TypeInContext(ctx->context);
82 ctx->i8 = LLVMInt8TypeInContext(ctx->context);
83 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
84 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
85 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
86 ctx->i128 = LLVMIntTypeInContext(ctx->context, 128);
87 ctx->intptr = ctx->i32;
88 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
89 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
90 ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
91 ctx->v2i16 = LLVMVectorType(ctx->i16, 2);
92 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
93 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
94 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
95 ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
96 ctx->v3f32 = LLVMVectorType(ctx->f32, 3);
97 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
98 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
99 ctx->iN_wavemask = LLVMIntTypeInContext(ctx->context, ctx->wave_size);
100 ctx->iN_ballotmask = LLVMIntTypeInContext(ctx->context, ballot_mask_bits);
101
102 ctx->i8_0 = LLVMConstInt(ctx->i8, 0, false);
103 ctx->i8_1 = LLVMConstInt(ctx->i8, 1, false);
104 ctx->i16_0 = LLVMConstInt(ctx->i16, 0, false);
105 ctx->i16_1 = LLVMConstInt(ctx->i16, 1, false);
106 ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
107 ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
108 ctx->i64_0 = LLVMConstInt(ctx->i64, 0, false);
109 ctx->i64_1 = LLVMConstInt(ctx->i64, 1, false);
110 ctx->i128_0 = LLVMConstInt(ctx->i128, 0, false);
111 ctx->i128_1 = LLVMConstInt(ctx->i128, 1, false);
112 ctx->f16_0 = LLVMConstReal(ctx->f16, 0.0);
113 ctx->f16_1 = LLVMConstReal(ctx->f16, 1.0);
114 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
115 ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
116 ctx->f64_0 = LLVMConstReal(ctx->f64, 0.0);
117 ctx->f64_1 = LLVMConstReal(ctx->f64, 1.0);
118
119 ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
120 ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
121
122 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
123 "range", 5);
124
125 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
126 "invariant.load", 14);
127
128 ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
129 "amdgpu.uniform", 14);
130
131 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
132 ctx->flow = calloc(1, sizeof(*ctx->flow));
133 }
134
135 void
136 ac_llvm_context_dispose(struct ac_llvm_context *ctx)
137 {
138 free(ctx->flow->stack);
139 free(ctx->flow);
140 ctx->flow = NULL;
141 }
142
143 int
144 ac_get_llvm_num_components(LLVMValueRef value)
145 {
146 LLVMTypeRef type = LLVMTypeOf(value);
147 unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
148 ? LLVMGetVectorSize(type)
149 : 1;
150 return num_components;
151 }
152
153 LLVMValueRef
154 ac_llvm_extract_elem(struct ac_llvm_context *ac,
155 LLVMValueRef value,
156 int index)
157 {
158 if (LLVMGetTypeKind(LLVMTypeOf(value)) != LLVMVectorTypeKind) {
159 assert(index == 0);
160 return value;
161 }
162
163 return LLVMBuildExtractElement(ac->builder, value,
164 LLVMConstInt(ac->i32, index, false), "");
165 }
166
167 int
168 ac_get_elem_bits(struct ac_llvm_context *ctx, LLVMTypeRef type)
169 {
170 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
171 type = LLVMGetElementType(type);
172
173 if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
174 return LLVMGetIntTypeWidth(type);
175
176 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind) {
177 if (LLVMGetPointerAddressSpace(type) == AC_ADDR_SPACE_LDS)
178 return 32;
179 }
180
181 if (type == ctx->f16)
182 return 16;
183 if (type == ctx->f32)
184 return 32;
185 if (type == ctx->f64)
186 return 64;
187
188 unreachable("Unhandled type kind in get_elem_bits");
189 }
190
191 unsigned
192 ac_get_type_size(LLVMTypeRef type)
193 {
194 LLVMTypeKind kind = LLVMGetTypeKind(type);
195
196 switch (kind) {
197 case LLVMIntegerTypeKind:
198 return LLVMGetIntTypeWidth(type) / 8;
199 case LLVMHalfTypeKind:
200 return 2;
201 case LLVMFloatTypeKind:
202 return 4;
203 case LLVMDoubleTypeKind:
204 return 8;
205 case LLVMPointerTypeKind:
206 if (LLVMGetPointerAddressSpace(type) == AC_ADDR_SPACE_CONST_32BIT)
207 return 4;
208 return 8;
209 case LLVMVectorTypeKind:
210 return LLVMGetVectorSize(type) *
211 ac_get_type_size(LLVMGetElementType(type));
212 case LLVMArrayTypeKind:
213 return LLVMGetArrayLength(type) *
214 ac_get_type_size(LLVMGetElementType(type));
215 default:
216 assert(0);
217 return 0;
218 }
219 }
220
221 static LLVMTypeRef to_integer_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
222 {
223 if (t == ctx->i8)
224 return ctx->i8;
225 else if (t == ctx->f16 || t == ctx->i16)
226 return ctx->i16;
227 else if (t == ctx->f32 || t == ctx->i32)
228 return ctx->i32;
229 else if (t == ctx->f64 || t == ctx->i64)
230 return ctx->i64;
231 else
232 unreachable("Unhandled integer size");
233 }
234
235 LLVMTypeRef
236 ac_to_integer_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
237 {
238 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
239 LLVMTypeRef elem_type = LLVMGetElementType(t);
240 return LLVMVectorType(to_integer_type_scalar(ctx, elem_type),
241 LLVMGetVectorSize(t));
242 }
243 if (LLVMGetTypeKind(t) == LLVMPointerTypeKind) {
244 switch (LLVMGetPointerAddressSpace(t)) {
245 case AC_ADDR_SPACE_GLOBAL:
246 return ctx->i64;
247 case AC_ADDR_SPACE_CONST_32BIT:
248 case AC_ADDR_SPACE_LDS:
249 return ctx->i32;
250 default:
251 unreachable("unhandled address space");
252 }
253 }
254 return to_integer_type_scalar(ctx, t);
255 }
256
257 LLVMValueRef
258 ac_to_integer(struct ac_llvm_context *ctx, LLVMValueRef v)
259 {
260 LLVMTypeRef type = LLVMTypeOf(v);
261 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind) {
262 return LLVMBuildPtrToInt(ctx->builder, v, ac_to_integer_type(ctx, type), "");
263 }
264 return LLVMBuildBitCast(ctx->builder, v, ac_to_integer_type(ctx, type), "");
265 }
266
267 LLVMValueRef
268 ac_to_integer_or_pointer(struct ac_llvm_context *ctx, LLVMValueRef v)
269 {
270 LLVMTypeRef type = LLVMTypeOf(v);
271 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind)
272 return v;
273 return ac_to_integer(ctx, v);
274 }
275
276 static LLVMTypeRef to_float_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
277 {
278 if (t == ctx->i8)
279 return ctx->i8;
280 else if (t == ctx->i16 || t == ctx->f16)
281 return ctx->f16;
282 else if (t == ctx->i32 || t == ctx->f32)
283 return ctx->f32;
284 else if (t == ctx->i64 || t == ctx->f64)
285 return ctx->f64;
286 else
287 unreachable("Unhandled float size");
288 }
289
290 LLVMTypeRef
291 ac_to_float_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
292 {
293 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
294 LLVMTypeRef elem_type = LLVMGetElementType(t);
295 return LLVMVectorType(to_float_type_scalar(ctx, elem_type),
296 LLVMGetVectorSize(t));
297 }
298 return to_float_type_scalar(ctx, t);
299 }
300
301 LLVMValueRef
302 ac_to_float(struct ac_llvm_context *ctx, LLVMValueRef v)
303 {
304 LLVMTypeRef type = LLVMTypeOf(v);
305 return LLVMBuildBitCast(ctx->builder, v, ac_to_float_type(ctx, type), "");
306 }
307
308
309 LLVMValueRef
310 ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
311 LLVMTypeRef return_type, LLVMValueRef *params,
312 unsigned param_count, unsigned attrib_mask)
313 {
314 LLVMValueRef function, call;
315 bool set_callsite_attrs = !(attrib_mask & AC_FUNC_ATTR_LEGACY);
316
317 function = LLVMGetNamedFunction(ctx->module, name);
318 if (!function) {
319 LLVMTypeRef param_types[32], function_type;
320 unsigned i;
321
322 assert(param_count <= 32);
323
324 for (i = 0; i < param_count; ++i) {
325 assert(params[i]);
326 param_types[i] = LLVMTypeOf(params[i]);
327 }
328 function_type =
329 LLVMFunctionType(return_type, param_types, param_count, 0);
330 function = LLVMAddFunction(ctx->module, name, function_type);
331
332 LLVMSetFunctionCallConv(function, LLVMCCallConv);
333 LLVMSetLinkage(function, LLVMExternalLinkage);
334
335 if (!set_callsite_attrs)
336 ac_add_func_attributes(ctx->context, function, attrib_mask);
337 }
338
339 call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
340 if (set_callsite_attrs)
341 ac_add_func_attributes(ctx->context, call, attrib_mask);
342 return call;
343 }
344
345 /**
346 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
347 * intrinsic names).
348 */
349 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
350 {
351 LLVMTypeRef elem_type = type;
352
353 assert(bufsize >= 8);
354
355 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
356 int ret = snprintf(buf, bufsize, "v%u",
357 LLVMGetVectorSize(type));
358 if (ret < 0) {
359 char *type_name = LLVMPrintTypeToString(type);
360 fprintf(stderr, "Error building type name for: %s\n",
361 type_name);
362 LLVMDisposeMessage(type_name);
363 return;
364 }
365 elem_type = LLVMGetElementType(type);
366 buf += ret;
367 bufsize -= ret;
368 }
369 switch (LLVMGetTypeKind(elem_type)) {
370 default: break;
371 case LLVMIntegerTypeKind:
372 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
373 break;
374 case LLVMHalfTypeKind:
375 snprintf(buf, bufsize, "f16");
376 break;
377 case LLVMFloatTypeKind:
378 snprintf(buf, bufsize, "f32");
379 break;
380 case LLVMDoubleTypeKind:
381 snprintf(buf, bufsize, "f64");
382 break;
383 }
384 }
385
386 /**
387 * Helper function that builds an LLVM IR PHI node and immediately adds
388 * incoming edges.
389 */
390 LLVMValueRef
391 ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
392 unsigned count_incoming, LLVMValueRef *values,
393 LLVMBasicBlockRef *blocks)
394 {
395 LLVMValueRef phi = LLVMBuildPhi(ctx->builder, type, "");
396 LLVMAddIncoming(phi, values, blocks, count_incoming);
397 return phi;
398 }
399
400 void ac_build_s_barrier(struct ac_llvm_context *ctx)
401 {
402 ac_build_intrinsic(ctx, "llvm.amdgcn.s.barrier", ctx->voidt, NULL,
403 0, AC_FUNC_ATTR_CONVERGENT);
404 }
405
406 /* Prevent optimizations (at least of memory accesses) across the current
407 * point in the program by emitting empty inline assembly that is marked as
408 * having side effects.
409 *
410 * Optionally, a value can be passed through the inline assembly to prevent
411 * LLVM from hoisting calls to ReadNone functions.
412 */
413 void
414 ac_build_optimization_barrier(struct ac_llvm_context *ctx,
415 LLVMValueRef *pvgpr)
416 {
417 static int counter = 0;
418
419 LLVMBuilderRef builder = ctx->builder;
420 char code[16];
421
422 snprintf(code, sizeof(code), "; %d", p_atomic_inc_return(&counter));
423
424 if (!pvgpr) {
425 LLVMTypeRef ftype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
426 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "", true, false);
427 LLVMBuildCall(builder, inlineasm, NULL, 0, "");
428 } else {
429 LLVMTypeRef ftype = LLVMFunctionType(ctx->i32, &ctx->i32, 1, false);
430 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "=v,0", true, false);
431 LLVMTypeRef type = LLVMTypeOf(*pvgpr);
432 unsigned bitsize = ac_get_elem_bits(ctx, type);
433 LLVMValueRef vgpr = *pvgpr;
434 LLVMTypeRef vgpr_type;
435 unsigned vgpr_size;
436 LLVMValueRef vgpr0;
437
438 if (bitsize < 32)
439 vgpr = LLVMBuildZExt(ctx->builder, vgpr, ctx->i32, "");
440
441 vgpr_type = LLVMTypeOf(vgpr);
442 vgpr_size = ac_get_type_size(vgpr_type);
443
444 assert(vgpr_size % 4 == 0);
445
446 vgpr = LLVMBuildBitCast(builder, vgpr, LLVMVectorType(ctx->i32, vgpr_size / 4), "");
447 vgpr0 = LLVMBuildExtractElement(builder, vgpr, ctx->i32_0, "");
448 vgpr0 = LLVMBuildCall(builder, inlineasm, &vgpr0, 1, "");
449 vgpr = LLVMBuildInsertElement(builder, vgpr, vgpr0, ctx->i32_0, "");
450 vgpr = LLVMBuildBitCast(builder, vgpr, vgpr_type, "");
451
452 if (bitsize < 32)
453 vgpr = LLVMBuildTrunc(builder, vgpr, type, "");
454
455 *pvgpr = vgpr;
456 }
457 }
458
459 LLVMValueRef
460 ac_build_shader_clock(struct ac_llvm_context *ctx)
461 {
462 const char *intr = LLVM_VERSION_MAJOR >= 9 && ctx->chip_class >= GFX8 ?
463 "llvm.amdgcn.s.memrealtime" : "llvm.readcyclecounter";
464 LLVMValueRef tmp = ac_build_intrinsic(ctx, intr, ctx->i64, NULL, 0, 0);
465 return LLVMBuildBitCast(ctx->builder, tmp, ctx->v2i32, "");
466 }
467
468 LLVMValueRef
469 ac_build_ballot(struct ac_llvm_context *ctx,
470 LLVMValueRef value)
471 {
472 const char *name;
473
474 if (LLVM_VERSION_MAJOR >= 9) {
475 if (ctx->wave_size == 64)
476 name = "llvm.amdgcn.icmp.i64.i32";
477 else
478 name = "llvm.amdgcn.icmp.i32.i32";
479 } else {
480 name = "llvm.amdgcn.icmp.i32";
481 }
482 LLVMValueRef args[3] = {
483 value,
484 ctx->i32_0,
485 LLVMConstInt(ctx->i32, LLVMIntNE, 0)
486 };
487
488 /* We currently have no other way to prevent LLVM from lifting the icmp
489 * calls to a dominating basic block.
490 */
491 ac_build_optimization_barrier(ctx, &args[0]);
492
493 args[0] = ac_to_integer(ctx, args[0]);
494
495 return ac_build_intrinsic(ctx, name, ctx->iN_wavemask, args, 3,
496 AC_FUNC_ATTR_NOUNWIND |
497 AC_FUNC_ATTR_READNONE |
498 AC_FUNC_ATTR_CONVERGENT);
499 }
500
501 LLVMValueRef ac_get_i1_sgpr_mask(struct ac_llvm_context *ctx,
502 LLVMValueRef value)
503 {
504 const char *name;
505
506 if (LLVM_VERSION_MAJOR >= 9) {
507 if (ctx->wave_size == 64)
508 name = "llvm.amdgcn.icmp.i64.i1";
509 else
510 name = "llvm.amdgcn.icmp.i32.i1";
511 } else {
512 name = "llvm.amdgcn.icmp.i1";
513 }
514 LLVMValueRef args[3] = {
515 value,
516 ctx->i1false,
517 LLVMConstInt(ctx->i32, LLVMIntNE, 0),
518 };
519
520 return ac_build_intrinsic(ctx, name, ctx->iN_wavemask, args, 3,
521 AC_FUNC_ATTR_NOUNWIND |
522 AC_FUNC_ATTR_READNONE |
523 AC_FUNC_ATTR_CONVERGENT);
524 }
525
526 LLVMValueRef
527 ac_build_vote_all(struct ac_llvm_context *ctx, LLVMValueRef value)
528 {
529 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
530 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
531 return LLVMBuildICmp(ctx->builder, LLVMIntEQ, vote_set, active_set, "");
532 }
533
534 LLVMValueRef
535 ac_build_vote_any(struct ac_llvm_context *ctx, LLVMValueRef value)
536 {
537 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
538 return LLVMBuildICmp(ctx->builder, LLVMIntNE, vote_set,
539 LLVMConstInt(ctx->iN_wavemask, 0, 0), "");
540 }
541
542 LLVMValueRef
543 ac_build_vote_eq(struct ac_llvm_context *ctx, LLVMValueRef value)
544 {
545 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
546 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
547
548 LLVMValueRef all = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
549 vote_set, active_set, "");
550 LLVMValueRef none = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
551 vote_set,
552 LLVMConstInt(ctx->iN_wavemask, 0, 0), "");
553 return LLVMBuildOr(ctx->builder, all, none, "");
554 }
555
556 LLVMValueRef
557 ac_build_varying_gather_values(struct ac_llvm_context *ctx, LLVMValueRef *values,
558 unsigned value_count, unsigned component)
559 {
560 LLVMValueRef vec = NULL;
561
562 if (value_count == 1) {
563 return values[component];
564 } else if (!value_count)
565 unreachable("value_count is 0");
566
567 for (unsigned i = component; i < value_count + component; i++) {
568 LLVMValueRef value = values[i];
569
570 if (i == component)
571 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
572 LLVMValueRef index = LLVMConstInt(ctx->i32, i - component, false);
573 vec = LLVMBuildInsertElement(ctx->builder, vec, value, index, "");
574 }
575 return vec;
576 }
577
578 LLVMValueRef
579 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
580 LLVMValueRef *values,
581 unsigned value_count,
582 unsigned value_stride,
583 bool load,
584 bool always_vector)
585 {
586 LLVMBuilderRef builder = ctx->builder;
587 LLVMValueRef vec = NULL;
588 unsigned i;
589
590 if (value_count == 1 && !always_vector) {
591 if (load)
592 return LLVMBuildLoad(builder, values[0], "");
593 return values[0];
594 } else if (!value_count)
595 unreachable("value_count is 0");
596
597 for (i = 0; i < value_count; i++) {
598 LLVMValueRef value = values[i * value_stride];
599 if (load)
600 value = LLVMBuildLoad(builder, value, "");
601
602 if (!i)
603 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
604 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
605 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
606 }
607 return vec;
608 }
609
610 LLVMValueRef
611 ac_build_gather_values(struct ac_llvm_context *ctx,
612 LLVMValueRef *values,
613 unsigned value_count)
614 {
615 return ac_build_gather_values_extended(ctx, values, value_count, 1, false, false);
616 }
617
618 /* Expand a scalar or vector to <dst_channels x type> by filling the remaining
619 * channels with undef. Extract at most src_channels components from the input.
620 */
621 static LLVMValueRef
622 ac_build_expand(struct ac_llvm_context *ctx,
623 LLVMValueRef value,
624 unsigned src_channels,
625 unsigned dst_channels)
626 {
627 LLVMTypeRef elemtype;
628 LLVMValueRef chan[dst_channels];
629
630 if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMVectorTypeKind) {
631 unsigned vec_size = LLVMGetVectorSize(LLVMTypeOf(value));
632
633 if (src_channels == dst_channels && vec_size == dst_channels)
634 return value;
635
636 src_channels = MIN2(src_channels, vec_size);
637
638 for (unsigned i = 0; i < src_channels; i++)
639 chan[i] = ac_llvm_extract_elem(ctx, value, i);
640
641 elemtype = LLVMGetElementType(LLVMTypeOf(value));
642 } else {
643 if (src_channels) {
644 assert(src_channels == 1);
645 chan[0] = value;
646 }
647 elemtype = LLVMTypeOf(value);
648 }
649
650 for (unsigned i = src_channels; i < dst_channels; i++)
651 chan[i] = LLVMGetUndef(elemtype);
652
653 return ac_build_gather_values(ctx, chan, dst_channels);
654 }
655
656 /* Extract components [start, start + channels) from a vector.
657 */
658 LLVMValueRef
659 ac_extract_components(struct ac_llvm_context *ctx,
660 LLVMValueRef value,
661 unsigned start,
662 unsigned channels)
663 {
664 LLVMValueRef chan[channels];
665
666 for (unsigned i = 0; i < channels; i++)
667 chan[i] = ac_llvm_extract_elem(ctx, value, i + start);
668
669 return ac_build_gather_values(ctx, chan, channels);
670 }
671
672 /* Expand a scalar or vector to <4 x type> by filling the remaining channels
673 * with undef. Extract at most num_channels components from the input.
674 */
675 LLVMValueRef ac_build_expand_to_vec4(struct ac_llvm_context *ctx,
676 LLVMValueRef value,
677 unsigned num_channels)
678 {
679 return ac_build_expand(ctx, value, num_channels, 4);
680 }
681
682 LLVMValueRef ac_build_round(struct ac_llvm_context *ctx, LLVMValueRef value)
683 {
684 unsigned type_size = ac_get_type_size(LLVMTypeOf(value));
685 const char *name;
686
687 if (type_size == 2)
688 name = "llvm.rint.f16";
689 else if (type_size == 4)
690 name = "llvm.rint.f32";
691 else
692 name = "llvm.rint.f64";
693
694 return ac_build_intrinsic(ctx, name, LLVMTypeOf(value), &value, 1,
695 AC_FUNC_ATTR_READNONE);
696 }
697
698 LLVMValueRef
699 ac_build_fdiv(struct ac_llvm_context *ctx,
700 LLVMValueRef num,
701 LLVMValueRef den)
702 {
703 unsigned type_size = ac_get_type_size(LLVMTypeOf(den));
704 const char *name;
705
706 if (type_size == 2)
707 name = "llvm.amdgcn.rcp.f16";
708 else if (type_size == 4)
709 name = "llvm.amdgcn.rcp.f32";
710 else
711 name = "llvm.amdgcn.rcp.f64";
712
713 LLVMValueRef rcp = ac_build_intrinsic(ctx, name, LLVMTypeOf(den),
714 &den, 1, AC_FUNC_ATTR_READNONE);
715
716 return LLVMBuildFMul(ctx->builder, num, rcp, "");
717 }
718
719 /* See fast_idiv_by_const.h. */
720 /* Set: increment = util_fast_udiv_info::increment ? multiplier : 0; */
721 LLVMValueRef ac_build_fast_udiv(struct ac_llvm_context *ctx,
722 LLVMValueRef num,
723 LLVMValueRef multiplier,
724 LLVMValueRef pre_shift,
725 LLVMValueRef post_shift,
726 LLVMValueRef increment)
727 {
728 LLVMBuilderRef builder = ctx->builder;
729
730 num = LLVMBuildLShr(builder, num, pre_shift, "");
731 num = LLVMBuildMul(builder,
732 LLVMBuildZExt(builder, num, ctx->i64, ""),
733 LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
734 num = LLVMBuildAdd(builder, num,
735 LLVMBuildZExt(builder, increment, ctx->i64, ""), "");
736 num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
737 num = LLVMBuildTrunc(builder, num, ctx->i32, "");
738 return LLVMBuildLShr(builder, num, post_shift, "");
739 }
740
741 /* See fast_idiv_by_const.h. */
742 /* If num != UINT_MAX, this more efficient version can be used. */
743 /* Set: increment = util_fast_udiv_info::increment; */
744 LLVMValueRef ac_build_fast_udiv_nuw(struct ac_llvm_context *ctx,
745 LLVMValueRef num,
746 LLVMValueRef multiplier,
747 LLVMValueRef pre_shift,
748 LLVMValueRef post_shift,
749 LLVMValueRef increment)
750 {
751 LLVMBuilderRef builder = ctx->builder;
752
753 num = LLVMBuildLShr(builder, num, pre_shift, "");
754 num = LLVMBuildNUWAdd(builder, num, increment, "");
755 num = LLVMBuildMul(builder,
756 LLVMBuildZExt(builder, num, ctx->i64, ""),
757 LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
758 num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
759 num = LLVMBuildTrunc(builder, num, ctx->i32, "");
760 return LLVMBuildLShr(builder, num, post_shift, "");
761 }
762
763 /* See fast_idiv_by_const.h. */
764 /* Both operands must fit in 31 bits and the divisor must not be 1. */
765 LLVMValueRef ac_build_fast_udiv_u31_d_not_one(struct ac_llvm_context *ctx,
766 LLVMValueRef num,
767 LLVMValueRef multiplier,
768 LLVMValueRef post_shift)
769 {
770 LLVMBuilderRef builder = ctx->builder;
771
772 num = LLVMBuildMul(builder,
773 LLVMBuildZExt(builder, num, ctx->i64, ""),
774 LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
775 num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
776 num = LLVMBuildTrunc(builder, num, ctx->i32, "");
777 return LLVMBuildLShr(builder, num, post_shift, "");
778 }
779
780 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
781 * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
782 * already multiplied by two. id is the cube face number.
783 */
784 struct cube_selection_coords {
785 LLVMValueRef stc[2];
786 LLVMValueRef ma;
787 LLVMValueRef id;
788 };
789
790 static void
791 build_cube_intrinsic(struct ac_llvm_context *ctx,
792 LLVMValueRef in[3],
793 struct cube_selection_coords *out)
794 {
795 LLVMTypeRef f32 = ctx->f32;
796
797 out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
798 f32, in, 3, AC_FUNC_ATTR_READNONE);
799 out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
800 f32, in, 3, AC_FUNC_ATTR_READNONE);
801 out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
802 f32, in, 3, AC_FUNC_ATTR_READNONE);
803 out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
804 f32, in, 3, AC_FUNC_ATTR_READNONE);
805 }
806
807 /**
808 * Build a manual selection sequence for cube face sc/tc coordinates and
809 * major axis vector (multiplied by 2 for consistency) for the given
810 * vec3 \p coords, for the face implied by \p selcoords.
811 *
812 * For the major axis, we always adjust the sign to be in the direction of
813 * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards
814 * the selcoords major axis.
815 */
816 static void build_cube_select(struct ac_llvm_context *ctx,
817 const struct cube_selection_coords *selcoords,
818 const LLVMValueRef *coords,
819 LLVMValueRef *out_st,
820 LLVMValueRef *out_ma)
821 {
822 LLVMBuilderRef builder = ctx->builder;
823 LLVMTypeRef f32 = LLVMTypeOf(coords[0]);
824 LLVMValueRef is_ma_positive;
825 LLVMValueRef sgn_ma;
826 LLVMValueRef is_ma_z, is_not_ma_z;
827 LLVMValueRef is_ma_y;
828 LLVMValueRef is_ma_x;
829 LLVMValueRef sgn;
830 LLVMValueRef tmp;
831
832 is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE,
833 selcoords->ma, LLVMConstReal(f32, 0.0), "");
834 sgn_ma = LLVMBuildSelect(builder, is_ma_positive,
835 LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), "");
836
837 is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), "");
838 is_not_ma_z = LLVMBuildNot(builder, is_ma_z, "");
839 is_ma_y = LLVMBuildAnd(builder, is_not_ma_z,
840 LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), "");
841 is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), "");
842
843 /* Select sc */
844 tmp = LLVMBuildSelect(builder, is_ma_x, coords[2], coords[0], "");
845 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0),
846 LLVMBuildSelect(builder, is_ma_z, sgn_ma,
847 LLVMBuildFNeg(builder, sgn_ma, ""), ""), "");
848 out_st[0] = LLVMBuildFMul(builder, tmp, sgn, "");
849
850 /* Select tc */
851 tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], "");
852 sgn = LLVMBuildSelect(builder, is_ma_y, sgn_ma,
853 LLVMConstReal(f32, -1.0), "");
854 out_st[1] = LLVMBuildFMul(builder, tmp, sgn, "");
855
856 /* Select ma */
857 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2],
858 LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), "");
859 tmp = ac_build_intrinsic(ctx, "llvm.fabs.f32",
860 ctx->f32, &tmp, 1, AC_FUNC_ATTR_READNONE);
861 *out_ma = LLVMBuildFMul(builder, tmp, LLVMConstReal(f32, 2.0), "");
862 }
863
864 void
865 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
866 bool is_deriv, bool is_array, bool is_lod,
867 LLVMValueRef *coords_arg,
868 LLVMValueRef *derivs_arg)
869 {
870
871 LLVMBuilderRef builder = ctx->builder;
872 struct cube_selection_coords selcoords;
873 LLVMValueRef coords[3];
874 LLVMValueRef invma;
875
876 if (is_array && !is_lod) {
877 LLVMValueRef tmp = ac_build_round(ctx, coords_arg[3]);
878
879 /* Section 8.9 (Texture Functions) of the GLSL 4.50 spec says:
880 *
881 * "For Array forms, the array layer used will be
882 *
883 * max(0, min(d−1, floor(layer+0.5)))
884 *
885 * where d is the depth of the texture array and layer
886 * comes from the component indicated in the tables below.
887 * Workaroudn for an issue where the layer is taken from a
888 * helper invocation which happens to fall on a different
889 * layer due to extrapolation."
890 *
891 * GFX8 and earlier attempt to implement this in hardware by
892 * clamping the value of coords[2] = (8 * layer) + face.
893 * Unfortunately, this means that the we end up with the wrong
894 * face when clamping occurs.
895 *
896 * Clamp the layer earlier to work around the issue.
897 */
898 if (ctx->chip_class <= GFX8) {
899 LLVMValueRef ge0;
900 ge0 = LLVMBuildFCmp(builder, LLVMRealOGE, tmp, ctx->f32_0, "");
901 tmp = LLVMBuildSelect(builder, ge0, tmp, ctx->f32_0, "");
902 }
903
904 coords_arg[3] = tmp;
905 }
906
907 build_cube_intrinsic(ctx, coords_arg, &selcoords);
908
909 invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
910 ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
911 invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
912
913 for (int i = 0; i < 2; ++i)
914 coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
915
916 coords[2] = selcoords.id;
917
918 if (is_deriv && derivs_arg) {
919 LLVMValueRef derivs[4];
920 int axis;
921
922 /* Convert cube derivatives to 2D derivatives. */
923 for (axis = 0; axis < 2; axis++) {
924 LLVMValueRef deriv_st[2];
925 LLVMValueRef deriv_ma;
926
927 /* Transform the derivative alongside the texture
928 * coordinate. Mathematically, the correct formula is
929 * as follows. Assume we're projecting onto the +Z face
930 * and denote by dx/dh the derivative of the (original)
931 * X texture coordinate with respect to horizontal
932 * window coordinates. The projection onto the +Z face
933 * plane is:
934 *
935 * f(x,z) = x/z
936 *
937 * Then df/dh = df/dx * dx/dh + df/dz * dz/dh
938 * = 1/z * dx/dh - x/z * 1/z * dz/dh.
939 *
940 * This motivatives the implementation below.
941 *
942 * Whether this actually gives the expected results for
943 * apps that might feed in derivatives obtained via
944 * finite differences is anyone's guess. The OpenGL spec
945 * seems awfully quiet about how textureGrad for cube
946 * maps should be handled.
947 */
948 build_cube_select(ctx, &selcoords, &derivs_arg[axis * 3],
949 deriv_st, &deriv_ma);
950
951 deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, "");
952
953 for (int i = 0; i < 2; ++i)
954 derivs[axis * 2 + i] =
955 LLVMBuildFSub(builder,
956 LLVMBuildFMul(builder, deriv_st[i], invma, ""),
957 LLVMBuildFMul(builder, deriv_ma, coords[i], ""), "");
958 }
959
960 memcpy(derivs_arg, derivs, sizeof(derivs));
961 }
962
963 /* Shift the texture coordinate. This must be applied after the
964 * derivative calculation.
965 */
966 for (int i = 0; i < 2; ++i)
967 coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), "");
968
969 if (is_array) {
970 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
971 /* coords_arg.w component - array_index for cube arrays */
972 coords[2] = ac_build_fmad(ctx, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), coords[2]);
973 }
974
975 memcpy(coords_arg, coords, sizeof(coords));
976 }
977
978
979 LLVMValueRef
980 ac_build_fs_interp(struct ac_llvm_context *ctx,
981 LLVMValueRef llvm_chan,
982 LLVMValueRef attr_number,
983 LLVMValueRef params,
984 LLVMValueRef i,
985 LLVMValueRef j)
986 {
987 LLVMValueRef args[5];
988 LLVMValueRef p1;
989
990 args[0] = i;
991 args[1] = llvm_chan;
992 args[2] = attr_number;
993 args[3] = params;
994
995 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
996 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
997
998 args[0] = p1;
999 args[1] = j;
1000 args[2] = llvm_chan;
1001 args[3] = attr_number;
1002 args[4] = params;
1003
1004 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
1005 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
1006 }
1007
1008 LLVMValueRef
1009 ac_build_fs_interp_f16(struct ac_llvm_context *ctx,
1010 LLVMValueRef llvm_chan,
1011 LLVMValueRef attr_number,
1012 LLVMValueRef params,
1013 LLVMValueRef i,
1014 LLVMValueRef j)
1015 {
1016 LLVMValueRef args[6];
1017 LLVMValueRef p1;
1018
1019 args[0] = i;
1020 args[1] = llvm_chan;
1021 args[2] = attr_number;
1022 args[3] = ctx->i1false;
1023 args[4] = params;
1024
1025 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1.f16",
1026 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
1027
1028 args[0] = p1;
1029 args[1] = j;
1030 args[2] = llvm_chan;
1031 args[3] = attr_number;
1032 args[4] = ctx->i1false;
1033 args[5] = params;
1034
1035 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2.f16",
1036 ctx->f16, args, 6, AC_FUNC_ATTR_READNONE);
1037 }
1038
1039 LLVMValueRef
1040 ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
1041 LLVMValueRef parameter,
1042 LLVMValueRef llvm_chan,
1043 LLVMValueRef attr_number,
1044 LLVMValueRef params)
1045 {
1046 LLVMValueRef args[4];
1047
1048 args[0] = parameter;
1049 args[1] = llvm_chan;
1050 args[2] = attr_number;
1051 args[3] = params;
1052
1053 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
1054 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
1055 }
1056
1057 LLVMValueRef
1058 ac_build_gep_ptr(struct ac_llvm_context *ctx,
1059 LLVMValueRef base_ptr,
1060 LLVMValueRef index)
1061 {
1062 return LLVMBuildGEP(ctx->builder, base_ptr, &index, 1, "");
1063 }
1064
1065 LLVMValueRef
1066 ac_build_gep0(struct ac_llvm_context *ctx,
1067 LLVMValueRef base_ptr,
1068 LLVMValueRef index)
1069 {
1070 LLVMValueRef indices[2] = {
1071 ctx->i32_0,
1072 index,
1073 };
1074 return LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
1075 }
1076
1077 LLVMValueRef ac_build_pointer_add(struct ac_llvm_context *ctx, LLVMValueRef ptr,
1078 LLVMValueRef index)
1079 {
1080 return LLVMBuildPointerCast(ctx->builder,
1081 LLVMBuildGEP(ctx->builder, ptr, &index, 1, ""),
1082 LLVMTypeOf(ptr), "");
1083 }
1084
1085 void
1086 ac_build_indexed_store(struct ac_llvm_context *ctx,
1087 LLVMValueRef base_ptr, LLVMValueRef index,
1088 LLVMValueRef value)
1089 {
1090 LLVMBuildStore(ctx->builder, value,
1091 ac_build_gep0(ctx, base_ptr, index));
1092 }
1093
1094 /**
1095 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
1096 * It's equivalent to doing a load from &base_ptr[index].
1097 *
1098 * \param base_ptr Where the array starts.
1099 * \param index The element index into the array.
1100 * \param uniform Whether the base_ptr and index can be assumed to be
1101 * dynamically uniform (i.e. load to an SGPR)
1102 * \param invariant Whether the load is invariant (no other opcodes affect it)
1103 * \param no_unsigned_wraparound
1104 * For all possible re-associations and re-distributions of an expression
1105 * "base_ptr + index * elemsize" into "addr + offset" (excluding GEPs
1106 * without inbounds in base_ptr), this parameter is true if "addr + offset"
1107 * does not result in an unsigned integer wraparound. This is used for
1108 * optimal code generation of 32-bit pointer arithmetic.
1109 *
1110 * For example, a 32-bit immediate offset that causes a 32-bit unsigned
1111 * integer wraparound can't be an imm offset in s_load_dword, because
1112 * the instruction performs "addr + offset" in 64 bits.
1113 *
1114 * Expected usage for bindless textures by chaining GEPs:
1115 * // possible unsigned wraparound, don't use InBounds:
1116 * ptr1 = LLVMBuildGEP(base_ptr, index);
1117 * image = load(ptr1); // becomes "s_load ptr1, 0"
1118 *
1119 * ptr2 = LLVMBuildInBoundsGEP(ptr1, 32 / elemsize);
1120 * sampler = load(ptr2); // becomes "s_load ptr1, 32" thanks to InBounds
1121 */
1122 static LLVMValueRef
1123 ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
1124 LLVMValueRef index, bool uniform, bool invariant,
1125 bool no_unsigned_wraparound)
1126 {
1127 LLVMValueRef pointer, result;
1128
1129 if (no_unsigned_wraparound &&
1130 LLVMGetPointerAddressSpace(LLVMTypeOf(base_ptr)) == AC_ADDR_SPACE_CONST_32BIT)
1131 pointer = LLVMBuildInBoundsGEP(ctx->builder, base_ptr, &index, 1, "");
1132 else
1133 pointer = LLVMBuildGEP(ctx->builder, base_ptr, &index, 1, "");
1134
1135 if (uniform)
1136 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
1137 result = LLVMBuildLoad(ctx->builder, pointer, "");
1138 if (invariant)
1139 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
1140 return result;
1141 }
1142
1143 LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
1144 LLVMValueRef index)
1145 {
1146 return ac_build_load_custom(ctx, base_ptr, index, false, false, false);
1147 }
1148
1149 LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
1150 LLVMValueRef base_ptr, LLVMValueRef index)
1151 {
1152 return ac_build_load_custom(ctx, base_ptr, index, false, true, false);
1153 }
1154
1155 /* This assumes that there is no unsigned integer wraparound during the address
1156 * computation, excluding all GEPs within base_ptr. */
1157 LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
1158 LLVMValueRef base_ptr, LLVMValueRef index)
1159 {
1160 return ac_build_load_custom(ctx, base_ptr, index, true, true, true);
1161 }
1162
1163 /* See ac_build_load_custom() documentation. */
1164 LLVMValueRef ac_build_load_to_sgpr_uint_wraparound(struct ac_llvm_context *ctx,
1165 LLVMValueRef base_ptr, LLVMValueRef index)
1166 {
1167 return ac_build_load_custom(ctx, base_ptr, index, true, true, false);
1168 }
1169
1170 static unsigned get_load_cache_policy(struct ac_llvm_context *ctx,
1171 unsigned cache_policy)
1172 {
1173 return cache_policy |
1174 (ctx->chip_class >= GFX10 && cache_policy & ac_glc ? ac_dlc : 0);
1175 }
1176
1177 static void
1178 ac_build_buffer_store_common(struct ac_llvm_context *ctx,
1179 LLVMValueRef rsrc,
1180 LLVMValueRef data,
1181 LLVMValueRef vindex,
1182 LLVMValueRef voffset,
1183 LLVMValueRef soffset,
1184 unsigned num_channels,
1185 LLVMTypeRef return_channel_type,
1186 unsigned cache_policy,
1187 bool use_format,
1188 bool structurized)
1189 {
1190 LLVMValueRef args[6];
1191 int idx = 0;
1192 args[idx++] = data;
1193 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1194 if (structurized)
1195 args[idx++] = vindex ? vindex : ctx->i32_0;
1196 args[idx++] = voffset ? voffset : ctx->i32_0;
1197 args[idx++] = soffset ? soffset : ctx->i32_0;
1198 args[idx++] = LLVMConstInt(ctx->i32, cache_policy, 0);
1199 unsigned func = !ac_has_vec3_support(ctx->chip_class, use_format) && num_channels == 3 ? 4 : num_channels;
1200 const char *indexing_kind = structurized ? "struct" : "raw";
1201 char name[256], type_name[8];
1202
1203 LLVMTypeRef type = func > 1 ? LLVMVectorType(return_channel_type, func) : return_channel_type;
1204 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1205
1206 if (use_format) {
1207 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.store.format.%s",
1208 indexing_kind, type_name);
1209 } else {
1210 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.store.%s",
1211 indexing_kind, type_name);
1212 }
1213
1214 ac_build_intrinsic(ctx, name, ctx->voidt, args, idx,
1215 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY);
1216 }
1217
1218 void
1219 ac_build_buffer_store_format(struct ac_llvm_context *ctx,
1220 LLVMValueRef rsrc,
1221 LLVMValueRef data,
1222 LLVMValueRef vindex,
1223 LLVMValueRef voffset,
1224 unsigned num_channels,
1225 unsigned cache_policy)
1226 {
1227 ac_build_buffer_store_common(ctx, rsrc, data, vindex,
1228 voffset, NULL, num_channels,
1229 ctx->f32, cache_policy,
1230 true, true);
1231 }
1232
1233 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
1234 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
1235 * or v4i32 (num_channels=3,4).
1236 */
1237 void
1238 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
1239 LLVMValueRef rsrc,
1240 LLVMValueRef vdata,
1241 unsigned num_channels,
1242 LLVMValueRef voffset,
1243 LLVMValueRef soffset,
1244 unsigned inst_offset,
1245 unsigned cache_policy)
1246 {
1247 /* Split 3 channel stores, because only LLVM 9+ support 3-channel
1248 * intrinsics. */
1249 if (num_channels == 3 && !ac_has_vec3_support(ctx->chip_class, false)) {
1250 LLVMValueRef v[3], v01;
1251
1252 for (int i = 0; i < 3; i++) {
1253 v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
1254 LLVMConstInt(ctx->i32, i, 0), "");
1255 }
1256 v01 = ac_build_gather_values(ctx, v, 2);
1257
1258 ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
1259 soffset, inst_offset, cache_policy);
1260 ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
1261 soffset, inst_offset + 8,
1262 cache_policy);
1263 return;
1264 }
1265
1266 /* SWIZZLE_ENABLE requires that soffset isn't folded into voffset
1267 * (voffset is swizzled, but soffset isn't swizzled).
1268 * llvm.amdgcn.buffer.store doesn't have a separate soffset parameter.
1269 */
1270 if (!(cache_policy & ac_swizzled)) {
1271 LLVMValueRef offset = soffset;
1272
1273 if (inst_offset)
1274 offset = LLVMBuildAdd(ctx->builder, offset,
1275 LLVMConstInt(ctx->i32, inst_offset, 0), "");
1276
1277 ac_build_buffer_store_common(ctx, rsrc, ac_to_float(ctx, vdata),
1278 ctx->i32_0, voffset, offset,
1279 num_channels, ctx->f32,
1280 cache_policy, false, false);
1281 return;
1282 }
1283
1284 static const unsigned dfmts[] = {
1285 V_008F0C_BUF_DATA_FORMAT_32,
1286 V_008F0C_BUF_DATA_FORMAT_32_32,
1287 V_008F0C_BUF_DATA_FORMAT_32_32_32,
1288 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
1289 };
1290 unsigned dfmt = dfmts[num_channels - 1];
1291 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1292 LLVMValueRef immoffset = LLVMConstInt(ctx->i32, inst_offset, 0);
1293
1294 ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
1295 immoffset, num_channels, dfmt, nfmt, cache_policy);
1296 }
1297
1298 static LLVMValueRef
1299 ac_build_buffer_load_common(struct ac_llvm_context *ctx,
1300 LLVMValueRef rsrc,
1301 LLVMValueRef vindex,
1302 LLVMValueRef voffset,
1303 LLVMValueRef soffset,
1304 unsigned num_channels,
1305 LLVMTypeRef channel_type,
1306 unsigned cache_policy,
1307 bool can_speculate,
1308 bool use_format,
1309 bool structurized)
1310 {
1311 LLVMValueRef args[5];
1312 int idx = 0;
1313 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1314 if (structurized)
1315 args[idx++] = vindex ? vindex : ctx->i32_0;
1316 args[idx++] = voffset ? voffset : ctx->i32_0;
1317 args[idx++] = soffset ? soffset : ctx->i32_0;
1318 args[idx++] = LLVMConstInt(ctx->i32, get_load_cache_policy(ctx, cache_policy), 0);
1319 unsigned func = !ac_has_vec3_support(ctx->chip_class, use_format) && num_channels == 3 ? 4 : num_channels;
1320 const char *indexing_kind = structurized ? "struct" : "raw";
1321 char name[256], type_name[8];
1322
1323 LLVMTypeRef type = func > 1 ? LLVMVectorType(channel_type, func) : channel_type;
1324 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1325
1326 if (use_format) {
1327 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.load.format.%s",
1328 indexing_kind, type_name);
1329 } else {
1330 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.load.%s",
1331 indexing_kind, type_name);
1332 }
1333
1334 return ac_build_intrinsic(ctx, name, type, args, idx,
1335 ac_get_load_intr_attribs(can_speculate));
1336 }
1337
1338 LLVMValueRef
1339 ac_build_buffer_load(struct ac_llvm_context *ctx,
1340 LLVMValueRef rsrc,
1341 int num_channels,
1342 LLVMValueRef vindex,
1343 LLVMValueRef voffset,
1344 LLVMValueRef soffset,
1345 unsigned inst_offset,
1346 unsigned cache_policy,
1347 bool can_speculate,
1348 bool allow_smem)
1349 {
1350 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
1351 if (voffset)
1352 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
1353 if (soffset)
1354 offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
1355
1356 if (allow_smem && !(cache_policy & ac_slc) &&
1357 (!(cache_policy & ac_glc) || ctx->chip_class >= GFX8)) {
1358 assert(vindex == NULL);
1359
1360 LLVMValueRef result[8];
1361
1362 for (int i = 0; i < num_channels; i++) {
1363 if (i) {
1364 offset = LLVMBuildAdd(ctx->builder, offset,
1365 LLVMConstInt(ctx->i32, 4, 0), "");
1366 }
1367 LLVMValueRef args[3] = {
1368 rsrc,
1369 offset,
1370 LLVMConstInt(ctx->i32, get_load_cache_policy(ctx, cache_policy), 0),
1371 };
1372 result[i] = ac_build_intrinsic(ctx,
1373 "llvm.amdgcn.s.buffer.load.f32",
1374 ctx->f32, args, 3,
1375 AC_FUNC_ATTR_READNONE);
1376 }
1377 if (num_channels == 1)
1378 return result[0];
1379
1380 if (num_channels == 3 && !ac_has_vec3_support(ctx->chip_class, false))
1381 result[num_channels++] = LLVMGetUndef(ctx->f32);
1382 return ac_build_gather_values(ctx, result, num_channels);
1383 }
1384
1385 return ac_build_buffer_load_common(ctx, rsrc, vindex,
1386 offset, ctx->i32_0,
1387 num_channels, ctx->f32,
1388 cache_policy,
1389 can_speculate, false, false);
1390 }
1391
1392 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
1393 LLVMValueRef rsrc,
1394 LLVMValueRef vindex,
1395 LLVMValueRef voffset,
1396 unsigned num_channels,
1397 unsigned cache_policy,
1398 bool can_speculate)
1399 {
1400 return ac_build_buffer_load_common(ctx, rsrc, vindex, voffset,
1401 ctx->i32_0, num_channels, ctx->f32,
1402 cache_policy, can_speculate,
1403 true, true);
1404 }
1405
1406 static LLVMValueRef
1407 ac_build_tbuffer_load(struct ac_llvm_context *ctx,
1408 LLVMValueRef rsrc,
1409 LLVMValueRef vindex,
1410 LLVMValueRef voffset,
1411 LLVMValueRef soffset,
1412 LLVMValueRef immoffset,
1413 unsigned num_channels,
1414 unsigned dfmt,
1415 unsigned nfmt,
1416 unsigned cache_policy,
1417 bool can_speculate,
1418 bool structurized)
1419 {
1420 voffset = LLVMBuildAdd(ctx->builder, voffset, immoffset, "");
1421
1422 LLVMValueRef args[6];
1423 int idx = 0;
1424 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1425 if (structurized)
1426 args[idx++] = vindex ? vindex : ctx->i32_0;
1427 args[idx++] = voffset ? voffset : ctx->i32_0;
1428 args[idx++] = soffset ? soffset : ctx->i32_0;
1429 args[idx++] = LLVMConstInt(ctx->i32, ac_get_tbuffer_format(ctx->chip_class, dfmt, nfmt), 0);
1430 args[idx++] = LLVMConstInt(ctx->i32, get_load_cache_policy(ctx, cache_policy), 0);
1431 unsigned func = !ac_has_vec3_support(ctx->chip_class, true) && num_channels == 3 ? 4 : num_channels;
1432 const char *indexing_kind = structurized ? "struct" : "raw";
1433 char name[256], type_name[8];
1434
1435 LLVMTypeRef type = func > 1 ? LLVMVectorType(ctx->i32, func) : ctx->i32;
1436 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1437
1438 snprintf(name, sizeof(name), "llvm.amdgcn.%s.tbuffer.load.%s",
1439 indexing_kind, type_name);
1440
1441 return ac_build_intrinsic(ctx, name, type, args, idx,
1442 ac_get_load_intr_attribs(can_speculate));
1443 }
1444
1445 LLVMValueRef
1446 ac_build_struct_tbuffer_load(struct ac_llvm_context *ctx,
1447 LLVMValueRef rsrc,
1448 LLVMValueRef vindex,
1449 LLVMValueRef voffset,
1450 LLVMValueRef soffset,
1451 LLVMValueRef immoffset,
1452 unsigned num_channels,
1453 unsigned dfmt,
1454 unsigned nfmt,
1455 unsigned cache_policy,
1456 bool can_speculate)
1457 {
1458 return ac_build_tbuffer_load(ctx, rsrc, vindex, voffset, soffset,
1459 immoffset, num_channels, dfmt, nfmt,
1460 cache_policy, can_speculate, true);
1461 }
1462
1463 LLVMValueRef
1464 ac_build_raw_tbuffer_load(struct ac_llvm_context *ctx,
1465 LLVMValueRef rsrc,
1466 LLVMValueRef voffset,
1467 LLVMValueRef soffset,
1468 LLVMValueRef immoffset,
1469 unsigned num_channels,
1470 unsigned dfmt,
1471 unsigned nfmt,
1472 unsigned cache_policy,
1473 bool can_speculate)
1474 {
1475 return ac_build_tbuffer_load(ctx, rsrc, NULL, voffset, soffset,
1476 immoffset, num_channels, dfmt, nfmt,
1477 cache_policy, can_speculate, false);
1478 }
1479
1480 LLVMValueRef
1481 ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
1482 LLVMValueRef rsrc,
1483 LLVMValueRef voffset,
1484 LLVMValueRef soffset,
1485 LLVMValueRef immoffset,
1486 unsigned cache_policy)
1487 {
1488 LLVMValueRef res;
1489
1490 if (LLVM_VERSION_MAJOR >= 9) {
1491 voffset = LLVMBuildAdd(ctx->builder, voffset, immoffset, "");
1492
1493 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1494 res = ac_build_buffer_load_common(ctx, rsrc, NULL,
1495 voffset, soffset,
1496 1, ctx->i16, cache_policy,
1497 false, false, false);
1498 } else {
1499 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_16;
1500 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1501
1502 res = ac_build_raw_tbuffer_load(ctx, rsrc, voffset, soffset,
1503 immoffset, 1, dfmt, nfmt, cache_policy,
1504 false);
1505
1506 res = LLVMBuildTrunc(ctx->builder, res, ctx->i16, "");
1507 }
1508
1509 return res;
1510 }
1511
1512 LLVMValueRef
1513 ac_build_tbuffer_load_byte(struct ac_llvm_context *ctx,
1514 LLVMValueRef rsrc,
1515 LLVMValueRef voffset,
1516 LLVMValueRef soffset,
1517 LLVMValueRef immoffset,
1518 unsigned cache_policy)
1519 {
1520 LLVMValueRef res;
1521
1522 if (LLVM_VERSION_MAJOR >= 9) {
1523 voffset = LLVMBuildAdd(ctx->builder, voffset, immoffset, "");
1524
1525 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1526 res = ac_build_buffer_load_common(ctx, rsrc, NULL,
1527 voffset, soffset,
1528 1, ctx->i8, cache_policy,
1529 false, false, false);
1530 } else {
1531 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_8;
1532 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1533
1534 res = ac_build_raw_tbuffer_load(ctx, rsrc, voffset, soffset,
1535 immoffset, 1, dfmt, nfmt, cache_policy,
1536 false);
1537
1538 res = LLVMBuildTrunc(ctx->builder, res, ctx->i8, "");
1539 }
1540
1541 return res;
1542 }
1543
1544 /**
1545 * Convert an 11- or 10-bit unsigned floating point number to an f32.
1546 *
1547 * The input exponent is expected to be biased analogous to IEEE-754, i.e. by
1548 * 2^(exp_bits-1) - 1 (as defined in OpenGL and other graphics APIs).
1549 */
1550 static LLVMValueRef
1551 ac_ufN_to_float(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned exp_bits, unsigned mant_bits)
1552 {
1553 assert(LLVMTypeOf(src) == ctx->i32);
1554
1555 LLVMValueRef tmp;
1556 LLVMValueRef mantissa;
1557 mantissa = LLVMBuildAnd(ctx->builder, src, LLVMConstInt(ctx->i32, (1 << mant_bits) - 1, false), "");
1558
1559 /* Converting normal numbers is just a shift + correcting the exponent bias */
1560 unsigned normal_shift = 23 - mant_bits;
1561 unsigned bias_shift = 127 - ((1 << (exp_bits - 1)) - 1);
1562 LLVMValueRef shifted, normal;
1563
1564 shifted = LLVMBuildShl(ctx->builder, src, LLVMConstInt(ctx->i32, normal_shift, false), "");
1565 normal = LLVMBuildAdd(ctx->builder, shifted, LLVMConstInt(ctx->i32, bias_shift << 23, false), "");
1566
1567 /* Converting nan/inf numbers is the same, but with a different exponent update */
1568 LLVMValueRef naninf;
1569 naninf = LLVMBuildOr(ctx->builder, normal, LLVMConstInt(ctx->i32, 0xff << 23, false), "");
1570
1571 /* Converting denormals is the complex case: determine the leading zeros of the
1572 * mantissa to obtain the correct shift for the mantissa and exponent correction.
1573 */
1574 LLVMValueRef denormal;
1575 LLVMValueRef params[2] = {
1576 mantissa,
1577 ctx->i1true, /* result can be undef when arg is 0 */
1578 };
1579 LLVMValueRef ctlz = ac_build_intrinsic(ctx, "llvm.ctlz.i32", ctx->i32,
1580 params, 2, AC_FUNC_ATTR_READNONE);
1581
1582 /* Shift such that the leading 1 ends up as the LSB of the exponent field. */
1583 tmp = LLVMBuildSub(ctx->builder, ctlz, LLVMConstInt(ctx->i32, 8, false), "");
1584 denormal = LLVMBuildShl(ctx->builder, mantissa, tmp, "");
1585
1586 unsigned denormal_exp = bias_shift + (32 - mant_bits) - 1;
1587 tmp = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, denormal_exp, false), ctlz, "");
1588 tmp = LLVMBuildShl(ctx->builder, tmp, LLVMConstInt(ctx->i32, 23, false), "");
1589 denormal = LLVMBuildAdd(ctx->builder, denormal, tmp, "");
1590
1591 /* Select the final result. */
1592 LLVMValueRef result;
1593
1594 tmp = LLVMBuildICmp(ctx->builder, LLVMIntUGE, src,
1595 LLVMConstInt(ctx->i32, ((1 << exp_bits) - 1) << mant_bits, false), "");
1596 result = LLVMBuildSelect(ctx->builder, tmp, naninf, normal, "");
1597
1598 tmp = LLVMBuildICmp(ctx->builder, LLVMIntUGE, src,
1599 LLVMConstInt(ctx->i32, 1 << mant_bits, false), "");
1600 result = LLVMBuildSelect(ctx->builder, tmp, result, denormal, "");
1601
1602 tmp = LLVMBuildICmp(ctx->builder, LLVMIntNE, src, ctx->i32_0, "");
1603 result = LLVMBuildSelect(ctx->builder, tmp, result, ctx->i32_0, "");
1604
1605 return ac_to_float(ctx, result);
1606 }
1607
1608 /**
1609 * Generate a fully general open coded buffer format fetch with all required
1610 * fixups suitable for vertex fetch, using non-format buffer loads.
1611 *
1612 * Some combinations of argument values have special interpretations:
1613 * - size = 8 bytes, format = fixed indicates PIPE_FORMAT_R11G11B10_FLOAT
1614 * - size = 8 bytes, format != {float,fixed} indicates a 2_10_10_10 data format
1615 *
1616 * \param log_size log(size of channel in bytes)
1617 * \param num_channels number of channels (1 to 4)
1618 * \param format AC_FETCH_FORMAT_xxx value
1619 * \param reverse whether XYZ channels are reversed
1620 * \param known_aligned whether the source is known to be aligned to hardware's
1621 * effective element size for loading the given format
1622 * (note: this means dword alignment for 8_8_8_8, 16_16, etc.)
1623 * \param rsrc buffer resource descriptor
1624 * \return the resulting vector of floats or integers bitcast to <4 x i32>
1625 */
1626 LLVMValueRef
1627 ac_build_opencoded_load_format(struct ac_llvm_context *ctx,
1628 unsigned log_size,
1629 unsigned num_channels,
1630 unsigned format,
1631 bool reverse,
1632 bool known_aligned,
1633 LLVMValueRef rsrc,
1634 LLVMValueRef vindex,
1635 LLVMValueRef voffset,
1636 LLVMValueRef soffset,
1637 unsigned cache_policy,
1638 bool can_speculate)
1639 {
1640 LLVMValueRef tmp;
1641 unsigned load_log_size = log_size;
1642 unsigned load_num_channels = num_channels;
1643 if (log_size == 3) {
1644 load_log_size = 2;
1645 if (format == AC_FETCH_FORMAT_FLOAT) {
1646 load_num_channels = 2 * num_channels;
1647 } else {
1648 load_num_channels = 1; /* 10_11_11 or 2_10_10_10 */
1649 }
1650 }
1651
1652 int log_recombine = 0;
1653 if (ctx->chip_class == GFX6 && !known_aligned) {
1654 /* Avoid alignment restrictions by loading one byte at a time. */
1655 load_num_channels <<= load_log_size;
1656 log_recombine = load_log_size;
1657 load_log_size = 0;
1658 } else if (load_num_channels == 2 || load_num_channels == 4) {
1659 log_recombine = -util_logbase2(load_num_channels);
1660 load_num_channels = 1;
1661 load_log_size += -log_recombine;
1662 }
1663
1664 assert(load_log_size >= 2 || LLVM_VERSION_MAJOR >= 9);
1665
1666 LLVMValueRef loads[32]; /* up to 32 bytes */
1667 for (unsigned i = 0; i < load_num_channels; ++i) {
1668 tmp = LLVMBuildAdd(ctx->builder, soffset,
1669 LLVMConstInt(ctx->i32, i << load_log_size, false), "");
1670 LLVMTypeRef channel_type = load_log_size == 0 ? ctx->i8 :
1671 load_log_size == 1 ? ctx->i16 : ctx->i32;
1672 unsigned num_channels = 1 << (MAX2(load_log_size, 2) - 2);
1673 loads[i] = ac_build_buffer_load_common(
1674 ctx, rsrc, vindex, voffset, tmp,
1675 num_channels, channel_type, cache_policy,
1676 can_speculate, false, true);
1677 if (load_log_size >= 2)
1678 loads[i] = ac_to_integer(ctx, loads[i]);
1679 }
1680
1681 if (log_recombine > 0) {
1682 /* Recombine bytes if necessary (GFX6 only) */
1683 LLVMTypeRef dst_type = log_recombine == 2 ? ctx->i32 : ctx->i16;
1684
1685 for (unsigned src = 0, dst = 0; src < load_num_channels; ++dst) {
1686 LLVMValueRef accum = NULL;
1687 for (unsigned i = 0; i < (1 << log_recombine); ++i, ++src) {
1688 tmp = LLVMBuildZExt(ctx->builder, loads[src], dst_type, "");
1689 if (i == 0) {
1690 accum = tmp;
1691 } else {
1692 tmp = LLVMBuildShl(ctx->builder, tmp,
1693 LLVMConstInt(dst_type, 8 * i, false), "");
1694 accum = LLVMBuildOr(ctx->builder, accum, tmp, "");
1695 }
1696 }
1697 loads[dst] = accum;
1698 }
1699 } else if (log_recombine < 0) {
1700 /* Split vectors of dwords */
1701 if (load_log_size > 2) {
1702 assert(load_num_channels == 1);
1703 LLVMValueRef loaded = loads[0];
1704 unsigned log_split = load_log_size - 2;
1705 log_recombine += log_split;
1706 load_num_channels = 1 << log_split;
1707 load_log_size = 2;
1708 for (unsigned i = 0; i < load_num_channels; ++i) {
1709 tmp = LLVMConstInt(ctx->i32, i, false);
1710 loads[i] = LLVMBuildExtractElement(ctx->builder, loaded, tmp, "");
1711 }
1712 }
1713
1714 /* Further split dwords and shorts if required */
1715 if (log_recombine < 0) {
1716 for (unsigned src = load_num_channels,
1717 dst = load_num_channels << -log_recombine;
1718 src > 0; --src) {
1719 unsigned dst_bits = 1 << (3 + load_log_size + log_recombine);
1720 LLVMTypeRef dst_type = LLVMIntTypeInContext(ctx->context, dst_bits);
1721 LLVMValueRef loaded = loads[src - 1];
1722 LLVMTypeRef loaded_type = LLVMTypeOf(loaded);
1723 for (unsigned i = 1 << -log_recombine; i > 0; --i, --dst) {
1724 tmp = LLVMConstInt(loaded_type, dst_bits * (i - 1), false);
1725 tmp = LLVMBuildLShr(ctx->builder, loaded, tmp, "");
1726 loads[dst - 1] = LLVMBuildTrunc(ctx->builder, tmp, dst_type, "");
1727 }
1728 }
1729 }
1730 }
1731
1732 if (log_size == 3) {
1733 if (format == AC_FETCH_FORMAT_FLOAT) {
1734 for (unsigned i = 0; i < num_channels; ++i) {
1735 tmp = ac_build_gather_values(ctx, &loads[2 * i], 2);
1736 loads[i] = LLVMBuildBitCast(ctx->builder, tmp, ctx->f64, "");
1737 }
1738 } else if (format == AC_FETCH_FORMAT_FIXED) {
1739 /* 10_11_11_FLOAT */
1740 LLVMValueRef data = loads[0];
1741 LLVMValueRef i32_2047 = LLVMConstInt(ctx->i32, 2047, false);
1742 LLVMValueRef r = LLVMBuildAnd(ctx->builder, data, i32_2047, "");
1743 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 11, false), "");
1744 LLVMValueRef g = LLVMBuildAnd(ctx->builder, tmp, i32_2047, "");
1745 LLVMValueRef b = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 22, false), "");
1746
1747 loads[0] = ac_to_integer(ctx, ac_ufN_to_float(ctx, r, 5, 6));
1748 loads[1] = ac_to_integer(ctx, ac_ufN_to_float(ctx, g, 5, 6));
1749 loads[2] = ac_to_integer(ctx, ac_ufN_to_float(ctx, b, 5, 5));
1750
1751 num_channels = 3;
1752 log_size = 2;
1753 format = AC_FETCH_FORMAT_FLOAT;
1754 } else {
1755 /* 2_10_10_10 data formats */
1756 LLVMValueRef data = loads[0];
1757 LLVMTypeRef i10 = LLVMIntTypeInContext(ctx->context, 10);
1758 LLVMTypeRef i2 = LLVMIntTypeInContext(ctx->context, 2);
1759 loads[0] = LLVMBuildTrunc(ctx->builder, data, i10, "");
1760 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 10, false), "");
1761 loads[1] = LLVMBuildTrunc(ctx->builder, tmp, i10, "");
1762 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 20, false), "");
1763 loads[2] = LLVMBuildTrunc(ctx->builder, tmp, i10, "");
1764 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 30, false), "");
1765 loads[3] = LLVMBuildTrunc(ctx->builder, tmp, i2, "");
1766
1767 num_channels = 4;
1768 }
1769 }
1770
1771 if (format == AC_FETCH_FORMAT_FLOAT) {
1772 if (log_size != 2) {
1773 for (unsigned chan = 0; chan < num_channels; ++chan) {
1774 tmp = ac_to_float(ctx, loads[chan]);
1775 if (log_size == 3)
1776 tmp = LLVMBuildFPTrunc(ctx->builder, tmp, ctx->f32, "");
1777 else if (log_size == 1)
1778 tmp = LLVMBuildFPExt(ctx->builder, tmp, ctx->f32, "");
1779 loads[chan] = ac_to_integer(ctx, tmp);
1780 }
1781 }
1782 } else if (format == AC_FETCH_FORMAT_UINT) {
1783 if (log_size != 2) {
1784 for (unsigned chan = 0; chan < num_channels; ++chan)
1785 loads[chan] = LLVMBuildZExt(ctx->builder, loads[chan], ctx->i32, "");
1786 }
1787 } else if (format == AC_FETCH_FORMAT_SINT) {
1788 if (log_size != 2) {
1789 for (unsigned chan = 0; chan < num_channels; ++chan)
1790 loads[chan] = LLVMBuildSExt(ctx->builder, loads[chan], ctx->i32, "");
1791 }
1792 } else {
1793 bool unsign = format == AC_FETCH_FORMAT_UNORM ||
1794 format == AC_FETCH_FORMAT_USCALED ||
1795 format == AC_FETCH_FORMAT_UINT;
1796
1797 for (unsigned chan = 0; chan < num_channels; ++chan) {
1798 if (unsign) {
1799 tmp = LLVMBuildUIToFP(ctx->builder, loads[chan], ctx->f32, "");
1800 } else {
1801 tmp = LLVMBuildSIToFP(ctx->builder, loads[chan], ctx->f32, "");
1802 }
1803
1804 LLVMValueRef scale = NULL;
1805 if (format == AC_FETCH_FORMAT_FIXED) {
1806 assert(log_size == 2);
1807 scale = LLVMConstReal(ctx->f32, 1.0 / 0x10000);
1808 } else if (format == AC_FETCH_FORMAT_UNORM) {
1809 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(loads[chan]));
1810 scale = LLVMConstReal(ctx->f32, 1.0 / (((uint64_t)1 << bits) - 1));
1811 } else if (format == AC_FETCH_FORMAT_SNORM) {
1812 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(loads[chan]));
1813 scale = LLVMConstReal(ctx->f32, 1.0 / (((uint64_t)1 << (bits - 1)) - 1));
1814 }
1815 if (scale)
1816 tmp = LLVMBuildFMul(ctx->builder, tmp, scale, "");
1817
1818 if (format == AC_FETCH_FORMAT_SNORM) {
1819 /* Clamp to [-1, 1] */
1820 LLVMValueRef neg_one = LLVMConstReal(ctx->f32, -1.0);
1821 LLVMValueRef clamp =
1822 LLVMBuildFCmp(ctx->builder, LLVMRealULT, tmp, neg_one, "");
1823 tmp = LLVMBuildSelect(ctx->builder, clamp, neg_one, tmp, "");
1824 }
1825
1826 loads[chan] = ac_to_integer(ctx, tmp);
1827 }
1828 }
1829
1830 while (num_channels < 4) {
1831 if (format == AC_FETCH_FORMAT_UINT || format == AC_FETCH_FORMAT_SINT) {
1832 loads[num_channels] = num_channels == 3 ? ctx->i32_1 : ctx->i32_0;
1833 } else {
1834 loads[num_channels] = ac_to_integer(ctx, num_channels == 3 ? ctx->f32_1 : ctx->f32_0);
1835 }
1836 num_channels++;
1837 }
1838
1839 if (reverse) {
1840 tmp = loads[0];
1841 loads[0] = loads[2];
1842 loads[2] = tmp;
1843 }
1844
1845 return ac_build_gather_values(ctx, loads, 4);
1846 }
1847
1848 static void
1849 ac_build_tbuffer_store(struct ac_llvm_context *ctx,
1850 LLVMValueRef rsrc,
1851 LLVMValueRef vdata,
1852 LLVMValueRef vindex,
1853 LLVMValueRef voffset,
1854 LLVMValueRef soffset,
1855 LLVMValueRef immoffset,
1856 unsigned num_channels,
1857 unsigned dfmt,
1858 unsigned nfmt,
1859 unsigned cache_policy,
1860 bool structurized)
1861 {
1862 voffset = LLVMBuildAdd(ctx->builder, voffset ? voffset : ctx->i32_0,
1863 immoffset, "");
1864
1865 LLVMValueRef args[7];
1866 int idx = 0;
1867 args[idx++] = vdata;
1868 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1869 if (structurized)
1870 args[idx++] = vindex ? vindex : ctx->i32_0;
1871 args[idx++] = voffset ? voffset : ctx->i32_0;
1872 args[idx++] = soffset ? soffset : ctx->i32_0;
1873 args[idx++] = LLVMConstInt(ctx->i32, ac_get_tbuffer_format(ctx->chip_class, dfmt, nfmt), 0);
1874 args[idx++] = LLVMConstInt(ctx->i32, cache_policy, 0);
1875 unsigned func = !ac_has_vec3_support(ctx->chip_class, true) && num_channels == 3 ? 4 : num_channels;
1876 const char *indexing_kind = structurized ? "struct" : "raw";
1877 char name[256], type_name[8];
1878
1879 LLVMTypeRef type = func > 1 ? LLVMVectorType(ctx->i32, func) : ctx->i32;
1880 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1881
1882 snprintf(name, sizeof(name), "llvm.amdgcn.%s.tbuffer.store.%s",
1883 indexing_kind, type_name);
1884
1885 ac_build_intrinsic(ctx, name, ctx->voidt, args, idx,
1886 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY);
1887 }
1888
1889 void
1890 ac_build_struct_tbuffer_store(struct ac_llvm_context *ctx,
1891 LLVMValueRef rsrc,
1892 LLVMValueRef vdata,
1893 LLVMValueRef vindex,
1894 LLVMValueRef voffset,
1895 LLVMValueRef soffset,
1896 LLVMValueRef immoffset,
1897 unsigned num_channels,
1898 unsigned dfmt,
1899 unsigned nfmt,
1900 unsigned cache_policy)
1901 {
1902 ac_build_tbuffer_store(ctx, rsrc, vdata, vindex, voffset, soffset,
1903 immoffset, num_channels, dfmt, nfmt, cache_policy,
1904 true);
1905 }
1906
1907 void
1908 ac_build_raw_tbuffer_store(struct ac_llvm_context *ctx,
1909 LLVMValueRef rsrc,
1910 LLVMValueRef vdata,
1911 LLVMValueRef voffset,
1912 LLVMValueRef soffset,
1913 LLVMValueRef immoffset,
1914 unsigned num_channels,
1915 unsigned dfmt,
1916 unsigned nfmt,
1917 unsigned cache_policy)
1918 {
1919 ac_build_tbuffer_store(ctx, rsrc, vdata, NULL, voffset, soffset,
1920 immoffset, num_channels, dfmt, nfmt, cache_policy,
1921 false);
1922 }
1923
1924 void
1925 ac_build_tbuffer_store_short(struct ac_llvm_context *ctx,
1926 LLVMValueRef rsrc,
1927 LLVMValueRef vdata,
1928 LLVMValueRef voffset,
1929 LLVMValueRef soffset,
1930 unsigned cache_policy)
1931 {
1932 vdata = LLVMBuildBitCast(ctx->builder, vdata, ctx->i16, "");
1933
1934 if (LLVM_VERSION_MAJOR >= 9) {
1935 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1936 ac_build_buffer_store_common(ctx, rsrc, vdata, NULL,
1937 voffset, soffset, 1,
1938 ctx->i16, cache_policy,
1939 false, false);
1940 } else {
1941 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_16;
1942 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1943
1944 vdata = LLVMBuildZExt(ctx->builder, vdata, ctx->i32, "");
1945
1946 ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
1947 ctx->i32_0, 1, dfmt, nfmt, cache_policy);
1948 }
1949 }
1950
1951 void
1952 ac_build_tbuffer_store_byte(struct ac_llvm_context *ctx,
1953 LLVMValueRef rsrc,
1954 LLVMValueRef vdata,
1955 LLVMValueRef voffset,
1956 LLVMValueRef soffset,
1957 unsigned cache_policy)
1958 {
1959 vdata = LLVMBuildBitCast(ctx->builder, vdata, ctx->i8, "");
1960
1961 if (LLVM_VERSION_MAJOR >= 9) {
1962 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1963 ac_build_buffer_store_common(ctx, rsrc, vdata, NULL,
1964 voffset, soffset, 1,
1965 ctx->i8, cache_policy,
1966 false, false);
1967 } else {
1968 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_8;
1969 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1970
1971 vdata = LLVMBuildZExt(ctx->builder, vdata, ctx->i32, "");
1972
1973 ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
1974 ctx->i32_0, 1, dfmt, nfmt, cache_policy);
1975 }
1976 }
1977 /**
1978 * Set range metadata on an instruction. This can only be used on load and
1979 * call instructions. If you know an instruction can only produce the values
1980 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1981 * \p lo is the minimum value inclusive.
1982 * \p hi is the maximum value exclusive.
1983 */
1984 static void set_range_metadata(struct ac_llvm_context *ctx,
1985 LLVMValueRef value, unsigned lo, unsigned hi)
1986 {
1987 LLVMValueRef range_md, md_args[2];
1988 LLVMTypeRef type = LLVMTypeOf(value);
1989 LLVMContextRef context = LLVMGetTypeContext(type);
1990
1991 md_args[0] = LLVMConstInt(type, lo, false);
1992 md_args[1] = LLVMConstInt(type, hi, false);
1993 range_md = LLVMMDNodeInContext(context, md_args, 2);
1994 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
1995 }
1996
1997 LLVMValueRef
1998 ac_get_thread_id(struct ac_llvm_context *ctx)
1999 {
2000 LLVMValueRef tid;
2001
2002 LLVMValueRef tid_args[2];
2003 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
2004 tid_args[1] = ctx->i32_0;
2005 tid_args[1] = ac_build_intrinsic(ctx,
2006 "llvm.amdgcn.mbcnt.lo", ctx->i32,
2007 tid_args, 2, AC_FUNC_ATTR_READNONE);
2008
2009 if (ctx->wave_size == 32) {
2010 tid = tid_args[1];
2011 } else {
2012 tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
2013 ctx->i32, tid_args,
2014 2, AC_FUNC_ATTR_READNONE);
2015 }
2016 set_range_metadata(ctx, tid, 0, ctx->wave_size);
2017 return tid;
2018 }
2019
2020 /*
2021 * AMD GCN implements derivatives using the local data store (LDS)
2022 * All writes to the LDS happen in all executing threads at
2023 * the same time. TID is the Thread ID for the current
2024 * thread and is a value between 0 and 63, representing
2025 * the thread's position in the wavefront.
2026 *
2027 * For the pixel shader threads are grouped into quads of four pixels.
2028 * The TIDs of the pixels of a quad are:
2029 *
2030 * +------+------+
2031 * |4n + 0|4n + 1|
2032 * +------+------+
2033 * |4n + 2|4n + 3|
2034 * +------+------+
2035 *
2036 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
2037 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
2038 * the current pixel's column, and masking with 0xfffffffe yields the TID
2039 * of the left pixel of the current pixel's row.
2040 *
2041 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
2042 * adding 2 yields the TID of the pixel below the top pixel.
2043 */
2044 LLVMValueRef
2045 ac_build_ddxy(struct ac_llvm_context *ctx,
2046 uint32_t mask,
2047 int idx,
2048 LLVMValueRef val)
2049 {
2050 unsigned tl_lanes[4], trbl_lanes[4];
2051 char name[32], type[8];
2052 LLVMValueRef tl, trbl;
2053 LLVMTypeRef result_type;
2054 LLVMValueRef result;
2055
2056 result_type = ac_to_float_type(ctx, LLVMTypeOf(val));
2057
2058 if (result_type == ctx->f16)
2059 val = LLVMBuildZExt(ctx->builder, val, ctx->i32, "");
2060
2061 for (unsigned i = 0; i < 4; ++i) {
2062 tl_lanes[i] = i & mask;
2063 trbl_lanes[i] = (i & mask) + idx;
2064 }
2065
2066 tl = ac_build_quad_swizzle(ctx, val,
2067 tl_lanes[0], tl_lanes[1],
2068 tl_lanes[2], tl_lanes[3]);
2069 trbl = ac_build_quad_swizzle(ctx, val,
2070 trbl_lanes[0], trbl_lanes[1],
2071 trbl_lanes[2], trbl_lanes[3]);
2072
2073 if (result_type == ctx->f16) {
2074 tl = LLVMBuildTrunc(ctx->builder, tl, ctx->i16, "");
2075 trbl = LLVMBuildTrunc(ctx->builder, trbl, ctx->i16, "");
2076 }
2077
2078 tl = LLVMBuildBitCast(ctx->builder, tl, result_type, "");
2079 trbl = LLVMBuildBitCast(ctx->builder, trbl, result_type, "");
2080 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
2081
2082 ac_build_type_name_for_intr(result_type, type, sizeof(type));
2083 snprintf(name, sizeof(name), "llvm.amdgcn.wqm.%s", type);
2084
2085 return ac_build_intrinsic(ctx, name, result_type, &result, 1, 0);
2086 }
2087
2088 void
2089 ac_build_sendmsg(struct ac_llvm_context *ctx,
2090 uint32_t msg,
2091 LLVMValueRef wave_id)
2092 {
2093 LLVMValueRef args[2];
2094 args[0] = LLVMConstInt(ctx->i32, msg, false);
2095 args[1] = wave_id;
2096 ac_build_intrinsic(ctx, "llvm.amdgcn.s.sendmsg", ctx->voidt, args, 2, 0);
2097 }
2098
2099 LLVMValueRef
2100 ac_build_imsb(struct ac_llvm_context *ctx,
2101 LLVMValueRef arg,
2102 LLVMTypeRef dst_type)
2103 {
2104 LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.amdgcn.sffbh.i32",
2105 dst_type, &arg, 1,
2106 AC_FUNC_ATTR_READNONE);
2107
2108 /* The HW returns the last bit index from MSB, but NIR/TGSI wants
2109 * the index from LSB. Invert it by doing "31 - msb". */
2110 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
2111 msb, "");
2112
2113 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
2114 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
2115 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
2116 arg, ctx->i32_0, ""),
2117 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
2118 arg, all_ones, ""), "");
2119
2120 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
2121 }
2122
2123 LLVMValueRef
2124 ac_build_umsb(struct ac_llvm_context *ctx,
2125 LLVMValueRef arg,
2126 LLVMTypeRef dst_type)
2127 {
2128 const char *intrin_name;
2129 LLVMTypeRef type;
2130 LLVMValueRef highest_bit;
2131 LLVMValueRef zero;
2132 unsigned bitsize;
2133
2134 bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(arg));
2135 switch (bitsize) {
2136 case 64:
2137 intrin_name = "llvm.ctlz.i64";
2138 type = ctx->i64;
2139 highest_bit = LLVMConstInt(ctx->i64, 63, false);
2140 zero = ctx->i64_0;
2141 break;
2142 case 32:
2143 intrin_name = "llvm.ctlz.i32";
2144 type = ctx->i32;
2145 highest_bit = LLVMConstInt(ctx->i32, 31, false);
2146 zero = ctx->i32_0;
2147 break;
2148 case 16:
2149 intrin_name = "llvm.ctlz.i16";
2150 type = ctx->i16;
2151 highest_bit = LLVMConstInt(ctx->i16, 15, false);
2152 zero = ctx->i16_0;
2153 break;
2154 case 8:
2155 intrin_name = "llvm.ctlz.i8";
2156 type = ctx->i8;
2157 highest_bit = LLVMConstInt(ctx->i8, 7, false);
2158 zero = ctx->i8_0;
2159 break;
2160 default:
2161 unreachable(!"invalid bitsize");
2162 break;
2163 }
2164
2165 LLVMValueRef params[2] = {
2166 arg,
2167 ctx->i1true,
2168 };
2169
2170 LLVMValueRef msb = ac_build_intrinsic(ctx, intrin_name, type,
2171 params, 2,
2172 AC_FUNC_ATTR_READNONE);
2173
2174 /* The HW returns the last bit index from MSB, but TGSI/NIR wants
2175 * the index from LSB. Invert it by doing "31 - msb". */
2176 msb = LLVMBuildSub(ctx->builder, highest_bit, msb, "");
2177
2178 if (bitsize == 64) {
2179 msb = LLVMBuildTrunc(ctx->builder, msb, ctx->i32, "");
2180 } else if (bitsize < 32) {
2181 msb = LLVMBuildSExt(ctx->builder, msb, ctx->i32, "");
2182 }
2183
2184 /* check for zero */
2185 return LLVMBuildSelect(ctx->builder,
2186 LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg, zero, ""),
2187 LLVMConstInt(ctx->i32, -1, true), msb, "");
2188 }
2189
2190 LLVMValueRef ac_build_fmin(struct ac_llvm_context *ctx, LLVMValueRef a,
2191 LLVMValueRef b)
2192 {
2193 char name[64];
2194 snprintf(name, sizeof(name), "llvm.minnum.f%d", ac_get_elem_bits(ctx, LLVMTypeOf(a)));
2195 LLVMValueRef args[2] = {a, b};
2196 return ac_build_intrinsic(ctx, name, LLVMTypeOf(a), args, 2,
2197 AC_FUNC_ATTR_READNONE);
2198 }
2199
2200 LLVMValueRef ac_build_fmax(struct ac_llvm_context *ctx, LLVMValueRef a,
2201 LLVMValueRef b)
2202 {
2203 char name[64];
2204 snprintf(name, sizeof(name), "llvm.maxnum.f%d", ac_get_elem_bits(ctx, LLVMTypeOf(a)));
2205 LLVMValueRef args[2] = {a, b};
2206 return ac_build_intrinsic(ctx, name, LLVMTypeOf(a), args, 2,
2207 AC_FUNC_ATTR_READNONE);
2208 }
2209
2210 LLVMValueRef ac_build_imin(struct ac_llvm_context *ctx, LLVMValueRef a,
2211 LLVMValueRef b)
2212 {
2213 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntSLE, a, b, "");
2214 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2215 }
2216
2217 LLVMValueRef ac_build_imax(struct ac_llvm_context *ctx, LLVMValueRef a,
2218 LLVMValueRef b)
2219 {
2220 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, a, b, "");
2221 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2222 }
2223
2224 LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a,
2225 LLVMValueRef b)
2226 {
2227 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntULE, a, b, "");
2228 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2229 }
2230
2231 LLVMValueRef ac_build_umax(struct ac_llvm_context *ctx, LLVMValueRef a,
2232 LLVMValueRef b)
2233 {
2234 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntUGE, a, b, "");
2235 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2236 }
2237
2238 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
2239 {
2240 LLVMTypeRef t = LLVMTypeOf(value);
2241 return ac_build_fmin(ctx, ac_build_fmax(ctx, value, LLVMConstReal(t, 0.0)),
2242 LLVMConstReal(t, 1.0));
2243 }
2244
2245 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
2246 {
2247 LLVMValueRef args[9];
2248
2249 args[0] = LLVMConstInt(ctx->i32, a->target, 0);
2250 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
2251
2252 if (a->compr) {
2253 LLVMTypeRef i16 = LLVMInt16TypeInContext(ctx->context);
2254 LLVMTypeRef v2i16 = LLVMVectorType(i16, 2);
2255
2256 args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
2257 v2i16, "");
2258 args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
2259 v2i16, "");
2260 args[4] = LLVMConstInt(ctx->i1, a->done, 0);
2261 args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
2262
2263 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
2264 ctx->voidt, args, 6, 0);
2265 } else {
2266 args[2] = a->out[0];
2267 args[3] = a->out[1];
2268 args[4] = a->out[2];
2269 args[5] = a->out[3];
2270 args[6] = LLVMConstInt(ctx->i1, a->done, 0);
2271 args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
2272
2273 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
2274 ctx->voidt, args, 8, 0);
2275 }
2276 }
2277
2278 void ac_build_export_null(struct ac_llvm_context *ctx)
2279 {
2280 struct ac_export_args args;
2281
2282 args.enabled_channels = 0x0; /* enabled channels */
2283 args.valid_mask = 1; /* whether the EXEC mask is valid */
2284 args.done = 1; /* DONE bit */
2285 args.target = V_008DFC_SQ_EXP_NULL;
2286 args.compr = 0; /* COMPR flag (0 = 32-bit export) */
2287 args.out[0] = LLVMGetUndef(ctx->f32); /* R */
2288 args.out[1] = LLVMGetUndef(ctx->f32); /* G */
2289 args.out[2] = LLVMGetUndef(ctx->f32); /* B */
2290 args.out[3] = LLVMGetUndef(ctx->f32); /* A */
2291
2292 ac_build_export(ctx, &args);
2293 }
2294
2295 static unsigned ac_num_coords(enum ac_image_dim dim)
2296 {
2297 switch (dim) {
2298 case ac_image_1d:
2299 return 1;
2300 case ac_image_2d:
2301 case ac_image_1darray:
2302 return 2;
2303 case ac_image_3d:
2304 case ac_image_cube:
2305 case ac_image_2darray:
2306 case ac_image_2dmsaa:
2307 return 3;
2308 case ac_image_2darraymsaa:
2309 return 4;
2310 default:
2311 unreachable("ac_num_coords: bad dim");
2312 }
2313 }
2314
2315 static unsigned ac_num_derivs(enum ac_image_dim dim)
2316 {
2317 switch (dim) {
2318 case ac_image_1d:
2319 case ac_image_1darray:
2320 return 2;
2321 case ac_image_2d:
2322 case ac_image_2darray:
2323 case ac_image_cube:
2324 return 4;
2325 case ac_image_3d:
2326 return 6;
2327 case ac_image_2dmsaa:
2328 case ac_image_2darraymsaa:
2329 default:
2330 unreachable("derivatives not supported");
2331 }
2332 }
2333
2334 static const char *get_atomic_name(enum ac_atomic_op op)
2335 {
2336 switch (op) {
2337 case ac_atomic_swap: return "swap";
2338 case ac_atomic_add: return "add";
2339 case ac_atomic_sub: return "sub";
2340 case ac_atomic_smin: return "smin";
2341 case ac_atomic_umin: return "umin";
2342 case ac_atomic_smax: return "smax";
2343 case ac_atomic_umax: return "umax";
2344 case ac_atomic_and: return "and";
2345 case ac_atomic_or: return "or";
2346 case ac_atomic_xor: return "xor";
2347 case ac_atomic_inc_wrap: return "inc";
2348 case ac_atomic_dec_wrap: return "dec";
2349 }
2350 unreachable("bad atomic op");
2351 }
2352
2353 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
2354 struct ac_image_args *a)
2355 {
2356 const char *overload[3] = { "", "", "" };
2357 unsigned num_overloads = 0;
2358 LLVMValueRef args[18];
2359 unsigned num_args = 0;
2360 enum ac_image_dim dim = a->dim;
2361
2362 assert(!a->lod || a->lod == ctx->i32_0 || a->lod == ctx->f32_0 ||
2363 !a->level_zero);
2364 assert((a->opcode != ac_image_get_resinfo && a->opcode != ac_image_load_mip &&
2365 a->opcode != ac_image_store_mip) ||
2366 a->lod);
2367 assert(a->opcode == ac_image_sample || a->opcode == ac_image_gather4 ||
2368 (!a->compare && !a->offset));
2369 assert((a->opcode == ac_image_sample || a->opcode == ac_image_gather4 ||
2370 a->opcode == ac_image_get_lod) ||
2371 !a->bias);
2372 assert((a->bias ? 1 : 0) +
2373 (a->lod ? 1 : 0) +
2374 (a->level_zero ? 1 : 0) +
2375 (a->derivs[0] ? 1 : 0) <= 1);
2376
2377 if (a->opcode == ac_image_get_lod) {
2378 switch (dim) {
2379 case ac_image_1darray:
2380 dim = ac_image_1d;
2381 break;
2382 case ac_image_2darray:
2383 case ac_image_cube:
2384 dim = ac_image_2d;
2385 break;
2386 default:
2387 break;
2388 }
2389 }
2390
2391 bool sample = a->opcode == ac_image_sample ||
2392 a->opcode == ac_image_gather4 ||
2393 a->opcode == ac_image_get_lod;
2394 bool atomic = a->opcode == ac_image_atomic ||
2395 a->opcode == ac_image_atomic_cmpswap;
2396 bool load = a->opcode == ac_image_sample ||
2397 a->opcode == ac_image_gather4 ||
2398 a->opcode == ac_image_load ||
2399 a->opcode == ac_image_load_mip;
2400 LLVMTypeRef coord_type = sample ? ctx->f32 : ctx->i32;
2401
2402 if (atomic || a->opcode == ac_image_store || a->opcode == ac_image_store_mip) {
2403 args[num_args++] = a->data[0];
2404 if (a->opcode == ac_image_atomic_cmpswap)
2405 args[num_args++] = a->data[1];
2406 }
2407
2408 if (!atomic)
2409 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, false);
2410
2411 if (a->offset)
2412 args[num_args++] = ac_to_integer(ctx, a->offset);
2413 if (a->bias) {
2414 args[num_args++] = ac_to_float(ctx, a->bias);
2415 overload[num_overloads++] = ".f32";
2416 }
2417 if (a->compare)
2418 args[num_args++] = ac_to_float(ctx, a->compare);
2419 if (a->derivs[0]) {
2420 unsigned count = ac_num_derivs(dim);
2421 for (unsigned i = 0; i < count; ++i)
2422 args[num_args++] = ac_to_float(ctx, a->derivs[i]);
2423 overload[num_overloads++] = ".f32";
2424 }
2425 unsigned num_coords =
2426 a->opcode != ac_image_get_resinfo ? ac_num_coords(dim) : 0;
2427 for (unsigned i = 0; i < num_coords; ++i)
2428 args[num_args++] = LLVMBuildBitCast(ctx->builder, a->coords[i], coord_type, "");
2429 if (a->lod)
2430 args[num_args++] = LLVMBuildBitCast(ctx->builder, a->lod, coord_type, "");
2431 overload[num_overloads++] = sample ? ".f32" : ".i32";
2432
2433 args[num_args++] = a->resource;
2434 if (sample) {
2435 args[num_args++] = a->sampler;
2436 args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, false);
2437 }
2438
2439 args[num_args++] = ctx->i32_0; /* texfailctrl */
2440 args[num_args++] = LLVMConstInt(ctx->i32,
2441 load ? get_load_cache_policy(ctx, a->cache_policy) :
2442 a->cache_policy, false);
2443
2444 const char *name;
2445 const char *atomic_subop = "";
2446 switch (a->opcode) {
2447 case ac_image_sample: name = "sample"; break;
2448 case ac_image_gather4: name = "gather4"; break;
2449 case ac_image_load: name = "load"; break;
2450 case ac_image_load_mip: name = "load.mip"; break;
2451 case ac_image_store: name = "store"; break;
2452 case ac_image_store_mip: name = "store.mip"; break;
2453 case ac_image_atomic:
2454 name = "atomic.";
2455 atomic_subop = get_atomic_name(a->atomic);
2456 break;
2457 case ac_image_atomic_cmpswap:
2458 name = "atomic.";
2459 atomic_subop = "cmpswap";
2460 break;
2461 case ac_image_get_lod: name = "getlod"; break;
2462 case ac_image_get_resinfo: name = "getresinfo"; break;
2463 default: unreachable("invalid image opcode");
2464 }
2465
2466 const char *dimname;
2467 switch (dim) {
2468 case ac_image_1d: dimname = "1d"; break;
2469 case ac_image_2d: dimname = "2d"; break;
2470 case ac_image_3d: dimname = "3d"; break;
2471 case ac_image_cube: dimname = "cube"; break;
2472 case ac_image_1darray: dimname = "1darray"; break;
2473 case ac_image_2darray: dimname = "2darray"; break;
2474 case ac_image_2dmsaa: dimname = "2dmsaa"; break;
2475 case ac_image_2darraymsaa: dimname = "2darraymsaa"; break;
2476 default: unreachable("invalid dim");
2477 }
2478
2479 bool lod_suffix =
2480 a->lod && (a->opcode == ac_image_sample || a->opcode == ac_image_gather4);
2481 char intr_name[96];
2482 snprintf(intr_name, sizeof(intr_name),
2483 "llvm.amdgcn.image.%s%s" /* base name */
2484 "%s%s%s" /* sample/gather modifiers */
2485 ".%s.%s%s%s%s", /* dimension and type overloads */
2486 name, atomic_subop,
2487 a->compare ? ".c" : "",
2488 a->bias ? ".b" :
2489 lod_suffix ? ".l" :
2490 a->derivs[0] ? ".d" :
2491 a->level_zero ? ".lz" : "",
2492 a->offset ? ".o" : "",
2493 dimname,
2494 atomic ? "i32" : "v4f32",
2495 overload[0], overload[1], overload[2]);
2496
2497 LLVMTypeRef retty;
2498 if (atomic)
2499 retty = ctx->i32;
2500 else if (a->opcode == ac_image_store || a->opcode == ac_image_store_mip)
2501 retty = ctx->voidt;
2502 else
2503 retty = ctx->v4f32;
2504
2505 LLVMValueRef result =
2506 ac_build_intrinsic(ctx, intr_name, retty, args, num_args,
2507 a->attributes);
2508 if (!sample && retty == ctx->v4f32) {
2509 result = LLVMBuildBitCast(ctx->builder, result,
2510 ctx->v4i32, "");
2511 }
2512 return result;
2513 }
2514
2515 LLVMValueRef ac_build_image_get_sample_count(struct ac_llvm_context *ctx,
2516 LLVMValueRef rsrc)
2517 {
2518 LLVMValueRef samples;
2519
2520 /* Read the samples from the descriptor directly.
2521 * Hardware doesn't have any instruction for this.
2522 */
2523 samples = LLVMBuildExtractElement(ctx->builder, rsrc,
2524 LLVMConstInt(ctx->i32, 3, 0), "");
2525 samples = LLVMBuildLShr(ctx->builder, samples,
2526 LLVMConstInt(ctx->i32, 16, 0), "");
2527 samples = LLVMBuildAnd(ctx->builder, samples,
2528 LLVMConstInt(ctx->i32, 0xf, 0), "");
2529 samples = LLVMBuildShl(ctx->builder, ctx->i32_1,
2530 samples, "");
2531 return samples;
2532 }
2533
2534 LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
2535 LLVMValueRef args[2])
2536 {
2537 LLVMTypeRef v2f16 =
2538 LLVMVectorType(LLVMHalfTypeInContext(ctx->context), 2);
2539
2540 return ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz", v2f16,
2541 args, 2, AC_FUNC_ATTR_READNONE);
2542 }
2543
2544 LLVMValueRef ac_build_cvt_pknorm_i16(struct ac_llvm_context *ctx,
2545 LLVMValueRef args[2])
2546 {
2547 LLVMValueRef res =
2548 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.i16",
2549 ctx->v2i16, args, 2,
2550 AC_FUNC_ATTR_READNONE);
2551 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2552 }
2553
2554 LLVMValueRef ac_build_cvt_pknorm_u16(struct ac_llvm_context *ctx,
2555 LLVMValueRef args[2])
2556 {
2557 LLVMValueRef res =
2558 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.u16",
2559 ctx->v2i16, args, 2,
2560 AC_FUNC_ATTR_READNONE);
2561 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2562 }
2563
2564 /* The 8-bit and 10-bit clamping is for HW workarounds. */
2565 LLVMValueRef ac_build_cvt_pk_i16(struct ac_llvm_context *ctx,
2566 LLVMValueRef args[2], unsigned bits, bool hi)
2567 {
2568 assert(bits == 8 || bits == 10 || bits == 16);
2569
2570 LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
2571 bits == 8 ? 127 : bits == 10 ? 511 : 32767, 0);
2572 LLVMValueRef min_rgb = LLVMConstInt(ctx->i32,
2573 bits == 8 ? -128 : bits == 10 ? -512 : -32768, 0);
2574 LLVMValueRef max_alpha =
2575 bits != 10 ? max_rgb : ctx->i32_1;
2576 LLVMValueRef min_alpha =
2577 bits != 10 ? min_rgb : LLVMConstInt(ctx->i32, -2, 0);
2578
2579 /* Clamp. */
2580 if (bits != 16) {
2581 for (int i = 0; i < 2; i++) {
2582 bool alpha = hi && i == 1;
2583 args[i] = ac_build_imin(ctx, args[i],
2584 alpha ? max_alpha : max_rgb);
2585 args[i] = ac_build_imax(ctx, args[i],
2586 alpha ? min_alpha : min_rgb);
2587 }
2588 }
2589
2590 LLVMValueRef res =
2591 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.i16",
2592 ctx->v2i16, args, 2,
2593 AC_FUNC_ATTR_READNONE);
2594 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2595 }
2596
2597 /* The 8-bit and 10-bit clamping is for HW workarounds. */
2598 LLVMValueRef ac_build_cvt_pk_u16(struct ac_llvm_context *ctx,
2599 LLVMValueRef args[2], unsigned bits, bool hi)
2600 {
2601 assert(bits == 8 || bits == 10 || bits == 16);
2602
2603 LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
2604 bits == 8 ? 255 : bits == 10 ? 1023 : 65535, 0);
2605 LLVMValueRef max_alpha =
2606 bits != 10 ? max_rgb : LLVMConstInt(ctx->i32, 3, 0);
2607
2608 /* Clamp. */
2609 if (bits != 16) {
2610 for (int i = 0; i < 2; i++) {
2611 bool alpha = hi && i == 1;
2612 args[i] = ac_build_umin(ctx, args[i],
2613 alpha ? max_alpha : max_rgb);
2614 }
2615 }
2616
2617 LLVMValueRef res =
2618 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.u16",
2619 ctx->v2i16, args, 2,
2620 AC_FUNC_ATTR_READNONE);
2621 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2622 }
2623
2624 LLVMValueRef ac_build_wqm_vote(struct ac_llvm_context *ctx, LLVMValueRef i1)
2625 {
2626 return ac_build_intrinsic(ctx, "llvm.amdgcn.wqm.vote", ctx->i1,
2627 &i1, 1, AC_FUNC_ATTR_READNONE);
2628 }
2629
2630 void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1)
2631 {
2632 ac_build_intrinsic(ctx, "llvm.amdgcn.kill", ctx->voidt,
2633 &i1, 1, 0);
2634 }
2635
2636 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
2637 LLVMValueRef offset, LLVMValueRef width,
2638 bool is_signed)
2639 {
2640 LLVMValueRef args[] = {
2641 input,
2642 offset,
2643 width,
2644 };
2645
2646 return ac_build_intrinsic(ctx, is_signed ? "llvm.amdgcn.sbfe.i32" :
2647 "llvm.amdgcn.ubfe.i32",
2648 ctx->i32, args, 3, AC_FUNC_ATTR_READNONE);
2649
2650 }
2651
2652 LLVMValueRef ac_build_imad(struct ac_llvm_context *ctx, LLVMValueRef s0,
2653 LLVMValueRef s1, LLVMValueRef s2)
2654 {
2655 return LLVMBuildAdd(ctx->builder,
2656 LLVMBuildMul(ctx->builder, s0, s1, ""), s2, "");
2657 }
2658
2659 LLVMValueRef ac_build_fmad(struct ac_llvm_context *ctx, LLVMValueRef s0,
2660 LLVMValueRef s1, LLVMValueRef s2)
2661 {
2662 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
2663 if (ctx->chip_class >= GFX10) {
2664 return ac_build_intrinsic(ctx, "llvm.fma.f32", ctx->f32,
2665 (LLVMValueRef []) {s0, s1, s2}, 3,
2666 AC_FUNC_ATTR_READNONE);
2667 }
2668
2669 return LLVMBuildFAdd(ctx->builder,
2670 LLVMBuildFMul(ctx->builder, s0, s1, ""), s2, "");
2671 }
2672
2673 void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned wait_flags)
2674 {
2675 if (!wait_flags)
2676 return;
2677
2678 unsigned lgkmcnt = 63;
2679 unsigned vmcnt = ctx->chip_class >= GFX9 ? 63 : 15;
2680 unsigned vscnt = 63;
2681
2682 if (wait_flags & AC_WAIT_LGKM)
2683 lgkmcnt = 0;
2684 if (wait_flags & AC_WAIT_VLOAD)
2685 vmcnt = 0;
2686
2687 if (wait_flags & AC_WAIT_VSTORE) {
2688 if (ctx->chip_class >= GFX10)
2689 vscnt = 0;
2690 else
2691 vmcnt = 0;
2692 }
2693
2694 /* There is no intrinsic for vscnt(0), so use a fence. */
2695 if ((wait_flags & AC_WAIT_LGKM &&
2696 wait_flags & AC_WAIT_VLOAD &&
2697 wait_flags & AC_WAIT_VSTORE) ||
2698 vscnt == 0) {
2699 LLVMBuildFence(ctx->builder, LLVMAtomicOrderingRelease, false, "");
2700 return;
2701 }
2702
2703 unsigned simm16 = (lgkmcnt << 8) |
2704 (7 << 4) | /* expcnt */
2705 (vmcnt & 0xf) |
2706 ((vmcnt >> 4) << 14);
2707
2708 LLVMValueRef args[1] = {
2709 LLVMConstInt(ctx->i32, simm16, false),
2710 };
2711 ac_build_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
2712 ctx->voidt, args, 1, 0);
2713 }
2714
2715 LLVMValueRef ac_build_fmed3(struct ac_llvm_context *ctx, LLVMValueRef src0,
2716 LLVMValueRef src1, LLVMValueRef src2,
2717 unsigned bitsize)
2718 {
2719 LLVMValueRef result;
2720
2721 if (bitsize == 64 || (bitsize == 16 && ctx->chip_class <= GFX8)) {
2722 /* Lower 64-bit fmed because LLVM doesn't expose an intrinsic,
2723 * or lower 16-bit fmed because it's only supported on GFX9+.
2724 */
2725 LLVMValueRef min1, min2, max1;
2726
2727 min1 = ac_build_fmin(ctx, src0, src1);
2728 max1 = ac_build_fmax(ctx, src0, src1);
2729 min2 = ac_build_fmin(ctx, max1, src2);
2730
2731 result = ac_build_fmax(ctx, min2, min1);
2732 } else {
2733 LLVMTypeRef type;
2734 char *intr;
2735
2736 if (bitsize == 16) {
2737 intr = "llvm.amdgcn.fmed3.f16";
2738 type = ctx->f16;
2739 } else {
2740 assert(bitsize == 32);
2741 intr = "llvm.amdgcn.fmed3.f32";
2742 type = ctx->f32;
2743 }
2744
2745 LLVMValueRef params[] = {
2746 src0,
2747 src1,
2748 src2,
2749 };
2750
2751 result = ac_build_intrinsic(ctx, intr, type, params, 3,
2752 AC_FUNC_ATTR_READNONE);
2753 }
2754
2755 if (ctx->chip_class < GFX9 && bitsize == 32) {
2756 /* Only pre-GFX9 chips do not flush denorms. */
2757 result = ac_build_canonicalize(ctx, result, bitsize);
2758 }
2759
2760 return result;
2761 }
2762
2763 LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0,
2764 unsigned bitsize)
2765 {
2766 LLVMTypeRef type;
2767 char *intr;
2768
2769 if (bitsize == 16) {
2770 intr = "llvm.amdgcn.fract.f16";
2771 type = ctx->f16;
2772 } else if (bitsize == 32) {
2773 intr = "llvm.amdgcn.fract.f32";
2774 type = ctx->f32;
2775 } else {
2776 intr = "llvm.amdgcn.fract.f64";
2777 type = ctx->f64;
2778 }
2779
2780 LLVMValueRef params[] = {
2781 src0,
2782 };
2783 return ac_build_intrinsic(ctx, intr, type, params, 1,
2784 AC_FUNC_ATTR_READNONE);
2785 }
2786
2787 LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0,
2788 unsigned bitsize)
2789 {
2790 LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, bitsize);
2791 LLVMValueRef zero = LLVMConstInt(type, 0, false);
2792 LLVMValueRef one = LLVMConstInt(type, 1, false);
2793
2794 LLVMValueRef cmp, val;
2795 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, zero, "");
2796 val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
2797 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, zero, "");
2798 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(type, -1, true), "");
2799 return val;
2800 }
2801
2802 LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0,
2803 unsigned bitsize)
2804 {
2805 LLVMValueRef cmp, val, zero, one;
2806 LLVMTypeRef type;
2807
2808 if (bitsize == 16) {
2809 type = ctx->f16;
2810 zero = ctx->f16_0;
2811 one = ctx->f16_1;
2812 } else if (bitsize == 32) {
2813 type = ctx->f32;
2814 zero = ctx->f32_0;
2815 one = ctx->f32_1;
2816 } else {
2817 type = ctx->f64;
2818 zero = ctx->f64_0;
2819 one = ctx->f64_1;
2820 }
2821
2822 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, zero, "");
2823 val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
2824 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, zero, "");
2825 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(type, -1.0), "");
2826 return val;
2827 }
2828
2829 LLVMValueRef ac_build_bit_count(struct ac_llvm_context *ctx, LLVMValueRef src0)
2830 {
2831 LLVMValueRef result;
2832 unsigned bitsize;
2833
2834 bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
2835
2836 switch (bitsize) {
2837 case 128:
2838 result = ac_build_intrinsic(ctx, "llvm.ctpop.i128", ctx->i128,
2839 (LLVMValueRef []) { src0 }, 1,
2840 AC_FUNC_ATTR_READNONE);
2841 result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
2842 break;
2843 case 64:
2844 result = ac_build_intrinsic(ctx, "llvm.ctpop.i64", ctx->i64,
2845 (LLVMValueRef []) { src0 }, 1,
2846 AC_FUNC_ATTR_READNONE);
2847
2848 result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
2849 break;
2850 case 32:
2851 result = ac_build_intrinsic(ctx, "llvm.ctpop.i32", ctx->i32,
2852 (LLVMValueRef []) { src0 }, 1,
2853 AC_FUNC_ATTR_READNONE);
2854 break;
2855 case 16:
2856 result = ac_build_intrinsic(ctx, "llvm.ctpop.i16", ctx->i16,
2857 (LLVMValueRef []) { src0 }, 1,
2858 AC_FUNC_ATTR_READNONE);
2859
2860 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2861 break;
2862 case 8:
2863 result = ac_build_intrinsic(ctx, "llvm.ctpop.i8", ctx->i8,
2864 (LLVMValueRef []) { src0 }, 1,
2865 AC_FUNC_ATTR_READNONE);
2866
2867 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2868 break;
2869 default:
2870 unreachable(!"invalid bitsize");
2871 break;
2872 }
2873
2874 return result;
2875 }
2876
2877 LLVMValueRef ac_build_bitfield_reverse(struct ac_llvm_context *ctx,
2878 LLVMValueRef src0)
2879 {
2880 LLVMValueRef result;
2881 unsigned bitsize;
2882
2883 bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
2884
2885 switch (bitsize) {
2886 case 64:
2887 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i64", ctx->i64,
2888 (LLVMValueRef []) { src0 }, 1,
2889 AC_FUNC_ATTR_READNONE);
2890
2891 result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
2892 break;
2893 case 32:
2894 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i32", ctx->i32,
2895 (LLVMValueRef []) { src0 }, 1,
2896 AC_FUNC_ATTR_READNONE);
2897 break;
2898 case 16:
2899 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i16", ctx->i16,
2900 (LLVMValueRef []) { src0 }, 1,
2901 AC_FUNC_ATTR_READNONE);
2902
2903 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2904 break;
2905 case 8:
2906 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i8", ctx->i8,
2907 (LLVMValueRef []) { src0 }, 1,
2908 AC_FUNC_ATTR_READNONE);
2909
2910 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2911 break;
2912 default:
2913 unreachable(!"invalid bitsize");
2914 break;
2915 }
2916
2917 return result;
2918 }
2919
2920 #define AC_EXP_TARGET 0
2921 #define AC_EXP_ENABLED_CHANNELS 1
2922 #define AC_EXP_OUT0 2
2923
2924 enum ac_ir_type {
2925 AC_IR_UNDEF,
2926 AC_IR_CONST,
2927 AC_IR_VALUE,
2928 };
2929
2930 struct ac_vs_exp_chan
2931 {
2932 LLVMValueRef value;
2933 float const_float;
2934 enum ac_ir_type type;
2935 };
2936
2937 struct ac_vs_exp_inst {
2938 unsigned offset;
2939 LLVMValueRef inst;
2940 struct ac_vs_exp_chan chan[4];
2941 };
2942
2943 struct ac_vs_exports {
2944 unsigned num;
2945 struct ac_vs_exp_inst exp[VARYING_SLOT_MAX];
2946 };
2947
2948 /* Return true if the PARAM export has been eliminated. */
2949 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset,
2950 uint32_t num_outputs,
2951 struct ac_vs_exp_inst *exp)
2952 {
2953 unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
2954 bool is_zero[4] = {}, is_one[4] = {};
2955
2956 for (i = 0; i < 4; i++) {
2957 /* It's a constant expression. Undef outputs are eliminated too. */
2958 if (exp->chan[i].type == AC_IR_UNDEF) {
2959 is_zero[i] = true;
2960 is_one[i] = true;
2961 } else if (exp->chan[i].type == AC_IR_CONST) {
2962 if (exp->chan[i].const_float == 0)
2963 is_zero[i] = true;
2964 else if (exp->chan[i].const_float == 1)
2965 is_one[i] = true;
2966 else
2967 return false; /* other constant */
2968 } else
2969 return false;
2970 }
2971
2972 /* Only certain combinations of 0 and 1 can be eliminated. */
2973 if (is_zero[0] && is_zero[1] && is_zero[2])
2974 default_val = is_zero[3] ? 0 : 1;
2975 else if (is_one[0] && is_one[1] && is_one[2])
2976 default_val = is_zero[3] ? 2 : 3;
2977 else
2978 return false;
2979
2980 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
2981 LLVMInstructionEraseFromParent(exp->inst);
2982
2983 /* Change OFFSET to DEFAULT_VAL. */
2984 for (i = 0; i < num_outputs; i++) {
2985 if (vs_output_param_offset[i] == exp->offset) {
2986 vs_output_param_offset[i] =
2987 AC_EXP_PARAM_DEFAULT_VAL_0000 + default_val;
2988 break;
2989 }
2990 }
2991 return true;
2992 }
2993
2994 static bool ac_eliminate_duplicated_output(struct ac_llvm_context *ctx,
2995 uint8_t *vs_output_param_offset,
2996 uint32_t num_outputs,
2997 struct ac_vs_exports *processed,
2998 struct ac_vs_exp_inst *exp)
2999 {
3000 unsigned p, copy_back_channels = 0;
3001
3002 /* See if the output is already in the list of processed outputs.
3003 * The LLVMValueRef comparison relies on SSA.
3004 */
3005 for (p = 0; p < processed->num; p++) {
3006 bool different = false;
3007
3008 for (unsigned j = 0; j < 4; j++) {
3009 struct ac_vs_exp_chan *c1 = &processed->exp[p].chan[j];
3010 struct ac_vs_exp_chan *c2 = &exp->chan[j];
3011
3012 /* Treat undef as a match. */
3013 if (c2->type == AC_IR_UNDEF)
3014 continue;
3015
3016 /* If c1 is undef but c2 isn't, we can copy c2 to c1
3017 * and consider the instruction duplicated.
3018 */
3019 if (c1->type == AC_IR_UNDEF) {
3020 copy_back_channels |= 1 << j;
3021 continue;
3022 }
3023
3024 /* Test whether the channels are not equal. */
3025 if (c1->type != c2->type ||
3026 (c1->type == AC_IR_CONST &&
3027 c1->const_float != c2->const_float) ||
3028 (c1->type == AC_IR_VALUE &&
3029 c1->value != c2->value)) {
3030 different = true;
3031 break;
3032 }
3033 }
3034 if (!different)
3035 break;
3036
3037 copy_back_channels = 0;
3038 }
3039 if (p == processed->num)
3040 return false;
3041
3042 /* If a match was found, but the matching export has undef where the new
3043 * one has a normal value, copy the normal value to the undef channel.
3044 */
3045 struct ac_vs_exp_inst *match = &processed->exp[p];
3046
3047 /* Get current enabled channels mask. */
3048 LLVMValueRef arg = LLVMGetOperand(match->inst, AC_EXP_ENABLED_CHANNELS);
3049 unsigned enabled_channels = LLVMConstIntGetZExtValue(arg);
3050
3051 while (copy_back_channels) {
3052 unsigned chan = u_bit_scan(&copy_back_channels);
3053
3054 assert(match->chan[chan].type == AC_IR_UNDEF);
3055 LLVMSetOperand(match->inst, AC_EXP_OUT0 + chan,
3056 exp->chan[chan].value);
3057 match->chan[chan] = exp->chan[chan];
3058
3059 /* Update number of enabled channels because the original mask
3060 * is not always 0xf.
3061 */
3062 enabled_channels |= (1 << chan);
3063 LLVMSetOperand(match->inst, AC_EXP_ENABLED_CHANNELS,
3064 LLVMConstInt(ctx->i32, enabled_channels, 0));
3065 }
3066
3067 /* The PARAM export is duplicated. Kill it. */
3068 LLVMInstructionEraseFromParent(exp->inst);
3069
3070 /* Change OFFSET to the matching export. */
3071 for (unsigned i = 0; i < num_outputs; i++) {
3072 if (vs_output_param_offset[i] == exp->offset) {
3073 vs_output_param_offset[i] = match->offset;
3074 break;
3075 }
3076 }
3077 return true;
3078 }
3079
3080 void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
3081 LLVMValueRef main_fn,
3082 uint8_t *vs_output_param_offset,
3083 uint32_t num_outputs,
3084 uint32_t skip_output_mask,
3085 uint8_t *num_param_exports)
3086 {
3087 LLVMBasicBlockRef bb;
3088 bool removed_any = false;
3089 struct ac_vs_exports exports;
3090
3091 exports.num = 0;
3092
3093 /* Process all LLVM instructions. */
3094 bb = LLVMGetFirstBasicBlock(main_fn);
3095 while (bb) {
3096 LLVMValueRef inst = LLVMGetFirstInstruction(bb);
3097
3098 while (inst) {
3099 LLVMValueRef cur = inst;
3100 inst = LLVMGetNextInstruction(inst);
3101 struct ac_vs_exp_inst exp;
3102
3103 if (LLVMGetInstructionOpcode(cur) != LLVMCall)
3104 continue;
3105
3106 LLVMValueRef callee = ac_llvm_get_called_value(cur);
3107
3108 if (!ac_llvm_is_function(callee))
3109 continue;
3110
3111 const char *name = LLVMGetValueName(callee);
3112 unsigned num_args = LLVMCountParams(callee);
3113
3114 /* Check if this is an export instruction. */
3115 if ((num_args != 9 && num_args != 8) ||
3116 (strcmp(name, "llvm.SI.export") &&
3117 strcmp(name, "llvm.amdgcn.exp.f32")))
3118 continue;
3119
3120 LLVMValueRef arg = LLVMGetOperand(cur, AC_EXP_TARGET);
3121 unsigned target = LLVMConstIntGetZExtValue(arg);
3122
3123 if (target < V_008DFC_SQ_EXP_PARAM)
3124 continue;
3125
3126 target -= V_008DFC_SQ_EXP_PARAM;
3127
3128 if ((1u << target) & skip_output_mask)
3129 continue;
3130
3131 /* Parse the instruction. */
3132 memset(&exp, 0, sizeof(exp));
3133 exp.offset = target;
3134 exp.inst = cur;
3135
3136 for (unsigned i = 0; i < 4; i++) {
3137 LLVMValueRef v = LLVMGetOperand(cur, AC_EXP_OUT0 + i);
3138
3139 exp.chan[i].value = v;
3140
3141 if (LLVMIsUndef(v)) {
3142 exp.chan[i].type = AC_IR_UNDEF;
3143 } else if (LLVMIsAConstantFP(v)) {
3144 LLVMBool loses_info;
3145 exp.chan[i].type = AC_IR_CONST;
3146 exp.chan[i].const_float =
3147 LLVMConstRealGetDouble(v, &loses_info);
3148 } else {
3149 exp.chan[i].type = AC_IR_VALUE;
3150 }
3151 }
3152
3153 /* Eliminate constant and duplicated PARAM exports. */
3154 if (ac_eliminate_const_output(vs_output_param_offset,
3155 num_outputs, &exp) ||
3156 ac_eliminate_duplicated_output(ctx,
3157 vs_output_param_offset,
3158 num_outputs, &exports,
3159 &exp)) {
3160 removed_any = true;
3161 } else {
3162 exports.exp[exports.num++] = exp;
3163 }
3164 }
3165 bb = LLVMGetNextBasicBlock(bb);
3166 }
3167
3168 /* Remove holes in export memory due to removed PARAM exports.
3169 * This is done by renumbering all PARAM exports.
3170 */
3171 if (removed_any) {
3172 uint8_t old_offset[VARYING_SLOT_MAX];
3173 unsigned out, i;
3174
3175 /* Make a copy of the offsets. We need the old version while
3176 * we are modifying some of them. */
3177 memcpy(old_offset, vs_output_param_offset,
3178 sizeof(old_offset));
3179
3180 for (i = 0; i < exports.num; i++) {
3181 unsigned offset = exports.exp[i].offset;
3182
3183 /* Update vs_output_param_offset. Multiple outputs can
3184 * have the same offset.
3185 */
3186 for (out = 0; out < num_outputs; out++) {
3187 if (old_offset[out] == offset)
3188 vs_output_param_offset[out] = i;
3189 }
3190
3191 /* Change the PARAM offset in the instruction. */
3192 LLVMSetOperand(exports.exp[i].inst, AC_EXP_TARGET,
3193 LLVMConstInt(ctx->i32,
3194 V_008DFC_SQ_EXP_PARAM + i, 0));
3195 }
3196 *num_param_exports = exports.num;
3197 }
3198 }
3199
3200 void ac_init_exec_full_mask(struct ac_llvm_context *ctx)
3201 {
3202 LLVMValueRef full_mask = LLVMConstInt(ctx->i64, ~0ull, 0);
3203 ac_build_intrinsic(ctx,
3204 "llvm.amdgcn.init.exec", ctx->voidt,
3205 &full_mask, 1, AC_FUNC_ATTR_CONVERGENT);
3206 }
3207
3208 void ac_declare_lds_as_pointer(struct ac_llvm_context *ctx)
3209 {
3210 unsigned lds_size = ctx->chip_class >= GFX7 ? 65536 : 32768;
3211 ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32_0,
3212 LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_ADDR_SPACE_LDS),
3213 "lds");
3214 }
3215
3216 LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
3217 LLVMValueRef dw_addr)
3218 {
3219 return LLVMBuildLoad(ctx->builder, ac_build_gep0(ctx, ctx->lds, dw_addr), "");
3220 }
3221
3222 void ac_lds_store(struct ac_llvm_context *ctx,
3223 LLVMValueRef dw_addr,
3224 LLVMValueRef value)
3225 {
3226 value = ac_to_integer(ctx, value);
3227 ac_build_indexed_store(ctx, ctx->lds,
3228 dw_addr, value);
3229 }
3230
3231 LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
3232 LLVMTypeRef dst_type,
3233 LLVMValueRef src0)
3234 {
3235 unsigned src0_bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
3236 const char *intrin_name;
3237 LLVMTypeRef type;
3238 LLVMValueRef zero;
3239
3240 switch (src0_bitsize) {
3241 case 64:
3242 intrin_name = "llvm.cttz.i64";
3243 type = ctx->i64;
3244 zero = ctx->i64_0;
3245 break;
3246 case 32:
3247 intrin_name = "llvm.cttz.i32";
3248 type = ctx->i32;
3249 zero = ctx->i32_0;
3250 break;
3251 case 16:
3252 intrin_name = "llvm.cttz.i16";
3253 type = ctx->i16;
3254 zero = ctx->i16_0;
3255 break;
3256 case 8:
3257 intrin_name = "llvm.cttz.i8";
3258 type = ctx->i8;
3259 zero = ctx->i8_0;
3260 break;
3261 default:
3262 unreachable(!"invalid bitsize");
3263 }
3264
3265 LLVMValueRef params[2] = {
3266 src0,
3267
3268 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
3269 * add special code to check for x=0. The reason is that
3270 * the LLVM behavior for x=0 is different from what we
3271 * need here. However, LLVM also assumes that ffs(x) is
3272 * in [0, 31], but GLSL expects that ffs(0) = -1, so
3273 * a conditional assignment to handle 0 is still required.
3274 *
3275 * The hardware already implements the correct behavior.
3276 */
3277 ctx->i1true,
3278 };
3279
3280 LLVMValueRef lsb = ac_build_intrinsic(ctx, intrin_name, type,
3281 params, 2,
3282 AC_FUNC_ATTR_READNONE);
3283
3284 if (src0_bitsize == 64) {
3285 lsb = LLVMBuildTrunc(ctx->builder, lsb, ctx->i32, "");
3286 } else if (src0_bitsize < 32) {
3287 lsb = LLVMBuildSExt(ctx->builder, lsb, ctx->i32, "");
3288 }
3289
3290 /* TODO: We need an intrinsic to skip this conditional. */
3291 /* Check for zero: */
3292 return LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder,
3293 LLVMIntEQ, src0,
3294 zero, ""),
3295 LLVMConstInt(ctx->i32, -1, 0), lsb, "");
3296 }
3297
3298 LLVMTypeRef ac_array_in_const_addr_space(LLVMTypeRef elem_type)
3299 {
3300 return LLVMPointerType(elem_type, AC_ADDR_SPACE_CONST);
3301 }
3302
3303 LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type)
3304 {
3305 return LLVMPointerType(elem_type, AC_ADDR_SPACE_CONST_32BIT);
3306 }
3307
3308 static struct ac_llvm_flow *
3309 get_current_flow(struct ac_llvm_context *ctx)
3310 {
3311 if (ctx->flow->depth > 0)
3312 return &ctx->flow->stack[ctx->flow->depth - 1];
3313 return NULL;
3314 }
3315
3316 static struct ac_llvm_flow *
3317 get_innermost_loop(struct ac_llvm_context *ctx)
3318 {
3319 for (unsigned i = ctx->flow->depth; i > 0; --i) {
3320 if (ctx->flow->stack[i - 1].loop_entry_block)
3321 return &ctx->flow->stack[i - 1];
3322 }
3323 return NULL;
3324 }
3325
3326 static struct ac_llvm_flow *
3327 push_flow(struct ac_llvm_context *ctx)
3328 {
3329 struct ac_llvm_flow *flow;
3330
3331 if (ctx->flow->depth >= ctx->flow->depth_max) {
3332 unsigned new_max = MAX2(ctx->flow->depth << 1,
3333 AC_LLVM_INITIAL_CF_DEPTH);
3334
3335 ctx->flow->stack = realloc(ctx->flow->stack, new_max * sizeof(*ctx->flow->stack));
3336 ctx->flow->depth_max = new_max;
3337 }
3338
3339 flow = &ctx->flow->stack[ctx->flow->depth];
3340 ctx->flow->depth++;
3341
3342 flow->next_block = NULL;
3343 flow->loop_entry_block = NULL;
3344 return flow;
3345 }
3346
3347 static void set_basicblock_name(LLVMBasicBlockRef bb, const char *base,
3348 int label_id)
3349 {
3350 char buf[32];
3351 snprintf(buf, sizeof(buf), "%s%d", base, label_id);
3352 LLVMSetValueName(LLVMBasicBlockAsValue(bb), buf);
3353 }
3354
3355 /* Append a basic block at the level of the parent flow.
3356 */
3357 static LLVMBasicBlockRef append_basic_block(struct ac_llvm_context *ctx,
3358 const char *name)
3359 {
3360 assert(ctx->flow->depth >= 1);
3361
3362 if (ctx->flow->depth >= 2) {
3363 struct ac_llvm_flow *flow = &ctx->flow->stack[ctx->flow->depth - 2];
3364
3365 return LLVMInsertBasicBlockInContext(ctx->context,
3366 flow->next_block, name);
3367 }
3368
3369 LLVMValueRef main_fn =
3370 LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx->builder));
3371 return LLVMAppendBasicBlockInContext(ctx->context, main_fn, name);
3372 }
3373
3374 /* Emit a branch to the given default target for the current block if
3375 * applicable -- that is, if the current block does not already contain a
3376 * branch from a break or continue.
3377 */
3378 static void emit_default_branch(LLVMBuilderRef builder,
3379 LLVMBasicBlockRef target)
3380 {
3381 if (!LLVMGetBasicBlockTerminator(LLVMGetInsertBlock(builder)))
3382 LLVMBuildBr(builder, target);
3383 }
3384
3385 void ac_build_bgnloop(struct ac_llvm_context *ctx, int label_id)
3386 {
3387 struct ac_llvm_flow *flow = push_flow(ctx);
3388 flow->loop_entry_block = append_basic_block(ctx, "LOOP");
3389 flow->next_block = append_basic_block(ctx, "ENDLOOP");
3390 set_basicblock_name(flow->loop_entry_block, "loop", label_id);
3391 LLVMBuildBr(ctx->builder, flow->loop_entry_block);
3392 LLVMPositionBuilderAtEnd(ctx->builder, flow->loop_entry_block);
3393 }
3394
3395 void ac_build_break(struct ac_llvm_context *ctx)
3396 {
3397 struct ac_llvm_flow *flow = get_innermost_loop(ctx);
3398 LLVMBuildBr(ctx->builder, flow->next_block);
3399 }
3400
3401 void ac_build_continue(struct ac_llvm_context *ctx)
3402 {
3403 struct ac_llvm_flow *flow = get_innermost_loop(ctx);
3404 LLVMBuildBr(ctx->builder, flow->loop_entry_block);
3405 }
3406
3407 void ac_build_else(struct ac_llvm_context *ctx, int label_id)
3408 {
3409 struct ac_llvm_flow *current_branch = get_current_flow(ctx);
3410 LLVMBasicBlockRef endif_block;
3411
3412 assert(!current_branch->loop_entry_block);
3413
3414 endif_block = append_basic_block(ctx, "ENDIF");
3415 emit_default_branch(ctx->builder, endif_block);
3416
3417 LLVMPositionBuilderAtEnd(ctx->builder, current_branch->next_block);
3418 set_basicblock_name(current_branch->next_block, "else", label_id);
3419
3420 current_branch->next_block = endif_block;
3421 }
3422
3423 void ac_build_endif(struct ac_llvm_context *ctx, int label_id)
3424 {
3425 struct ac_llvm_flow *current_branch = get_current_flow(ctx);
3426
3427 assert(!current_branch->loop_entry_block);
3428
3429 emit_default_branch(ctx->builder, current_branch->next_block);
3430 LLVMPositionBuilderAtEnd(ctx->builder, current_branch->next_block);
3431 set_basicblock_name(current_branch->next_block, "endif", label_id);
3432
3433 ctx->flow->depth--;
3434 }
3435
3436 void ac_build_endloop(struct ac_llvm_context *ctx, int label_id)
3437 {
3438 struct ac_llvm_flow *current_loop = get_current_flow(ctx);
3439
3440 assert(current_loop->loop_entry_block);
3441
3442 emit_default_branch(ctx->builder, current_loop->loop_entry_block);
3443
3444 LLVMPositionBuilderAtEnd(ctx->builder, current_loop->next_block);
3445 set_basicblock_name(current_loop->next_block, "endloop", label_id);
3446 ctx->flow->depth--;
3447 }
3448
3449 void ac_build_ifcc(struct ac_llvm_context *ctx, LLVMValueRef cond, int label_id)
3450 {
3451 struct ac_llvm_flow *flow = push_flow(ctx);
3452 LLVMBasicBlockRef if_block;
3453
3454 if_block = append_basic_block(ctx, "IF");
3455 flow->next_block = append_basic_block(ctx, "ELSE");
3456 set_basicblock_name(if_block, "if", label_id);
3457 LLVMBuildCondBr(ctx->builder, cond, if_block, flow->next_block);
3458 LLVMPositionBuilderAtEnd(ctx->builder, if_block);
3459 }
3460
3461 void ac_build_if(struct ac_llvm_context *ctx, LLVMValueRef value,
3462 int label_id)
3463 {
3464 LLVMValueRef cond = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
3465 value, ctx->f32_0, "");
3466 ac_build_ifcc(ctx, cond, label_id);
3467 }
3468
3469 void ac_build_uif(struct ac_llvm_context *ctx, LLVMValueRef value,
3470 int label_id)
3471 {
3472 LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
3473 ac_to_integer(ctx, value),
3474 ctx->i32_0, "");
3475 ac_build_ifcc(ctx, cond, label_id);
3476 }
3477
3478 LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac, LLVMTypeRef type,
3479 const char *name)
3480 {
3481 LLVMBuilderRef builder = ac->builder;
3482 LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder);
3483 LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
3484 LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function);
3485 LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block);
3486 LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ac->context);
3487 LLVMValueRef res;
3488
3489 if (first_instr) {
3490 LLVMPositionBuilderBefore(first_builder, first_instr);
3491 } else {
3492 LLVMPositionBuilderAtEnd(first_builder, first_block);
3493 }
3494
3495 res = LLVMBuildAlloca(first_builder, type, name);
3496 LLVMDisposeBuilder(first_builder);
3497 return res;
3498 }
3499
3500 LLVMValueRef ac_build_alloca(struct ac_llvm_context *ac,
3501 LLVMTypeRef type, const char *name)
3502 {
3503 LLVMValueRef ptr = ac_build_alloca_undef(ac, type, name);
3504 LLVMBuildStore(ac->builder, LLVMConstNull(type), ptr);
3505 return ptr;
3506 }
3507
3508 LLVMValueRef ac_cast_ptr(struct ac_llvm_context *ctx, LLVMValueRef ptr,
3509 LLVMTypeRef type)
3510 {
3511 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3512 return LLVMBuildBitCast(ctx->builder, ptr,
3513 LLVMPointerType(type, addr_space), "");
3514 }
3515
3516 LLVMValueRef ac_trim_vector(struct ac_llvm_context *ctx, LLVMValueRef value,
3517 unsigned count)
3518 {
3519 unsigned num_components = ac_get_llvm_num_components(value);
3520 if (count == num_components)
3521 return value;
3522
3523 LLVMValueRef masks[MAX2(count, 2)];
3524 masks[0] = ctx->i32_0;
3525 masks[1] = ctx->i32_1;
3526 for (unsigned i = 2; i < count; i++)
3527 masks[i] = LLVMConstInt(ctx->i32, i, false);
3528
3529 if (count == 1)
3530 return LLVMBuildExtractElement(ctx->builder, value, masks[0],
3531 "");
3532
3533 LLVMValueRef swizzle = LLVMConstVector(masks, count);
3534 return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
3535 }
3536
3537 LLVMValueRef ac_unpack_param(struct ac_llvm_context *ctx, LLVMValueRef param,
3538 unsigned rshift, unsigned bitwidth)
3539 {
3540 LLVMValueRef value = param;
3541 if (rshift)
3542 value = LLVMBuildLShr(ctx->builder, value,
3543 LLVMConstInt(ctx->i32, rshift, false), "");
3544
3545 if (rshift + bitwidth < 32) {
3546 unsigned mask = (1 << bitwidth) - 1;
3547 value = LLVMBuildAnd(ctx->builder, value,
3548 LLVMConstInt(ctx->i32, mask, false), "");
3549 }
3550 return value;
3551 }
3552
3553 /* Adjust the sample index according to FMASK.
3554 *
3555 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3556 * which is the identity mapping. Each nibble says which physical sample
3557 * should be fetched to get that sample.
3558 *
3559 * For example, 0x11111100 means there are only 2 samples stored and
3560 * the second sample covers 3/4 of the pixel. When reading samples 0
3561 * and 1, return physical sample 0 (determined by the first two 0s
3562 * in FMASK), otherwise return physical sample 1.
3563 *
3564 * The sample index should be adjusted as follows:
3565 * addr[sample_index] = (fmask >> (addr[sample_index] * 4)) & 0xF;
3566 */
3567 void ac_apply_fmask_to_sample(struct ac_llvm_context *ac, LLVMValueRef fmask,
3568 LLVMValueRef *addr, bool is_array_tex)
3569 {
3570 struct ac_image_args fmask_load = {};
3571 fmask_load.opcode = ac_image_load;
3572 fmask_load.resource = fmask;
3573 fmask_load.dmask = 0xf;
3574 fmask_load.dim = is_array_tex ? ac_image_2darray : ac_image_2d;
3575 fmask_load.attributes = AC_FUNC_ATTR_READNONE;
3576
3577 fmask_load.coords[0] = addr[0];
3578 fmask_load.coords[1] = addr[1];
3579 if (is_array_tex)
3580 fmask_load.coords[2] = addr[2];
3581
3582 LLVMValueRef fmask_value = ac_build_image_opcode(ac, &fmask_load);
3583 fmask_value = LLVMBuildExtractElement(ac->builder, fmask_value,
3584 ac->i32_0, "");
3585
3586 /* Apply the formula. */
3587 unsigned sample_chan = is_array_tex ? 3 : 2;
3588 LLVMValueRef final_sample;
3589 final_sample = LLVMBuildMul(ac->builder, addr[sample_chan],
3590 LLVMConstInt(ac->i32, 4, 0), "");
3591 final_sample = LLVMBuildLShr(ac->builder, fmask_value, final_sample, "");
3592 /* Mask the sample index by 0x7, because 0x8 means an unknown value
3593 * with EQAA, so those will map to 0. */
3594 final_sample = LLVMBuildAnd(ac->builder, final_sample,
3595 LLVMConstInt(ac->i32, 0x7, 0), "");
3596
3597 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3598 * resource descriptor is 0 (invalid).
3599 */
3600 LLVMValueRef tmp;
3601 tmp = LLVMBuildBitCast(ac->builder, fmask, ac->v8i32, "");
3602 tmp = LLVMBuildExtractElement(ac->builder, tmp, ac->i32_1, "");
3603 tmp = LLVMBuildICmp(ac->builder, LLVMIntNE, tmp, ac->i32_0, "");
3604
3605 /* Replace the MSAA sample index. */
3606 addr[sample_chan] = LLVMBuildSelect(ac->builder, tmp, final_sample,
3607 addr[sample_chan], "");
3608 }
3609
3610 static LLVMValueRef
3611 _ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src,
3612 LLVMValueRef lane, bool with_opt_barrier)
3613 {
3614 LLVMTypeRef type = LLVMTypeOf(src);
3615 LLVMValueRef result;
3616
3617 if (with_opt_barrier)
3618 ac_build_optimization_barrier(ctx, &src);
3619
3620 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3621 if (lane)
3622 lane = LLVMBuildZExt(ctx->builder, lane, ctx->i32, "");
3623
3624 result = ac_build_intrinsic(ctx,
3625 lane == NULL ? "llvm.amdgcn.readfirstlane" : "llvm.amdgcn.readlane",
3626 ctx->i32, (LLVMValueRef []) { src, lane },
3627 lane == NULL ? 1 : 2,
3628 AC_FUNC_ATTR_READNONE |
3629 AC_FUNC_ATTR_CONVERGENT);
3630
3631 return LLVMBuildTrunc(ctx->builder, result, type, "");
3632 }
3633
3634 static LLVMValueRef
3635 ac_build_readlane_common(struct ac_llvm_context *ctx,
3636 LLVMValueRef src, LLVMValueRef lane,
3637 bool with_opt_barrier)
3638 {
3639 LLVMTypeRef src_type = LLVMTypeOf(src);
3640 src = ac_to_integer(ctx, src);
3641 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3642 LLVMValueRef ret;
3643
3644 if (bits > 32) {
3645 assert(bits % 32 == 0);
3646 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3647 LLVMValueRef src_vector =
3648 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3649 ret = LLVMGetUndef(vec_type);
3650 for (unsigned i = 0; i < bits / 32; i++) {
3651 LLVMValueRef ret_comp;
3652
3653 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3654 LLVMConstInt(ctx->i32, i, 0), "");
3655
3656 ret_comp = _ac_build_readlane(ctx, src, lane,
3657 with_opt_barrier);
3658
3659 ret = LLVMBuildInsertElement(ctx->builder, ret, ret_comp,
3660 LLVMConstInt(ctx->i32, i, 0), "");
3661 }
3662 } else {
3663 ret = _ac_build_readlane(ctx, src, lane, with_opt_barrier);
3664 }
3665
3666 if (LLVMGetTypeKind(src_type) == LLVMPointerTypeKind)
3667 return LLVMBuildIntToPtr(ctx->builder, ret, src_type, "");
3668 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3669 }
3670
3671 /**
3672 * Builds the "llvm.amdgcn.readlane" or "llvm.amdgcn.readfirstlane" intrinsic.
3673 *
3674 * The optimization barrier is not needed if the value is the same in all lanes
3675 * or if this is called in the outermost block.
3676 *
3677 * @param ctx
3678 * @param src
3679 * @param lane - id of the lane or NULL for the first active lane
3680 * @return value of the lane
3681 */
3682 LLVMValueRef ac_build_readlane_no_opt_barrier(struct ac_llvm_context *ctx,
3683 LLVMValueRef src, LLVMValueRef lane)
3684 {
3685 return ac_build_readlane_common(ctx, src, lane, false);
3686 }
3687
3688
3689 LLVMValueRef
3690 ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane)
3691 {
3692 return ac_build_readlane_common(ctx, src, lane, true);
3693 }
3694
3695 LLVMValueRef
3696 ac_build_writelane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef value, LLVMValueRef lane)
3697 {
3698 return ac_build_intrinsic(ctx, "llvm.amdgcn.writelane", ctx->i32,
3699 (LLVMValueRef []) {value, lane, src}, 3,
3700 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3701 }
3702
3703 LLVMValueRef
3704 ac_build_mbcnt(struct ac_llvm_context *ctx, LLVMValueRef mask)
3705 {
3706 if (ctx->wave_size == 32) {
3707 return ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.lo", ctx->i32,
3708 (LLVMValueRef []) { mask, ctx->i32_0 },
3709 2, AC_FUNC_ATTR_READNONE);
3710 }
3711 LLVMValueRef mask_vec = LLVMBuildBitCast(ctx->builder, mask,
3712 LLVMVectorType(ctx->i32, 2),
3713 "");
3714 LLVMValueRef mask_lo = LLVMBuildExtractElement(ctx->builder, mask_vec,
3715 ctx->i32_0, "");
3716 LLVMValueRef mask_hi = LLVMBuildExtractElement(ctx->builder, mask_vec,
3717 ctx->i32_1, "");
3718 LLVMValueRef val =
3719 ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.lo", ctx->i32,
3720 (LLVMValueRef []) { mask_lo, ctx->i32_0 },
3721 2, AC_FUNC_ATTR_READNONE);
3722 val = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi", ctx->i32,
3723 (LLVMValueRef []) { mask_hi, val },
3724 2, AC_FUNC_ATTR_READNONE);
3725 return val;
3726 }
3727
3728 enum dpp_ctrl {
3729 _dpp_quad_perm = 0x000,
3730 _dpp_row_sl = 0x100,
3731 _dpp_row_sr = 0x110,
3732 _dpp_row_rr = 0x120,
3733 dpp_wf_sl1 = 0x130,
3734 dpp_wf_rl1 = 0x134,
3735 dpp_wf_sr1 = 0x138,
3736 dpp_wf_rr1 = 0x13C,
3737 dpp_row_mirror = 0x140,
3738 dpp_row_half_mirror = 0x141,
3739 dpp_row_bcast15 = 0x142,
3740 dpp_row_bcast31 = 0x143
3741 };
3742
3743 static inline enum dpp_ctrl
3744 dpp_quad_perm(unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
3745 {
3746 assert(lane0 < 4 && lane1 < 4 && lane2 < 4 && lane3 < 4);
3747 return _dpp_quad_perm | lane0 | (lane1 << 2) | (lane2 << 4) | (lane3 << 6);
3748 }
3749
3750 static inline enum dpp_ctrl
3751 dpp_row_sl(unsigned amount)
3752 {
3753 assert(amount > 0 && amount < 16);
3754 return _dpp_row_sl | amount;
3755 }
3756
3757 static inline enum dpp_ctrl
3758 dpp_row_sr(unsigned amount)
3759 {
3760 assert(amount > 0 && amount < 16);
3761 return _dpp_row_sr | amount;
3762 }
3763
3764 static LLVMValueRef
3765 _ac_build_dpp(struct ac_llvm_context *ctx, LLVMValueRef old, LLVMValueRef src,
3766 enum dpp_ctrl dpp_ctrl, unsigned row_mask, unsigned bank_mask,
3767 bool bound_ctrl)
3768 {
3769 LLVMTypeRef type = LLVMTypeOf(src);
3770 LLVMValueRef res;
3771
3772 old = LLVMBuildZExt(ctx->builder, old, ctx->i32, "");
3773 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3774
3775 res = ac_build_intrinsic(ctx, "llvm.amdgcn.update.dpp.i32", ctx->i32,
3776 (LLVMValueRef[]) {
3777 old, src,
3778 LLVMConstInt(ctx->i32, dpp_ctrl, 0),
3779 LLVMConstInt(ctx->i32, row_mask, 0),
3780 LLVMConstInt(ctx->i32, bank_mask, 0),
3781 LLVMConstInt(ctx->i1, bound_ctrl, 0) },
3782 6, AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3783
3784 return LLVMBuildTrunc(ctx->builder, res, type, "");
3785 }
3786
3787 static LLVMValueRef
3788 ac_build_dpp(struct ac_llvm_context *ctx, LLVMValueRef old, LLVMValueRef src,
3789 enum dpp_ctrl dpp_ctrl, unsigned row_mask, unsigned bank_mask,
3790 bool bound_ctrl)
3791 {
3792 LLVMTypeRef src_type = LLVMTypeOf(src);
3793 src = ac_to_integer(ctx, src);
3794 old = ac_to_integer(ctx, old);
3795 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3796 LLVMValueRef ret;
3797 if (bits > 32) {
3798 assert(bits % 32 == 0);
3799 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3800 LLVMValueRef src_vector =
3801 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3802 LLVMValueRef old_vector =
3803 LLVMBuildBitCast(ctx->builder, old, vec_type, "");
3804 ret = LLVMGetUndef(vec_type);
3805 for (unsigned i = 0; i < bits / 32; i++) {
3806 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3807 LLVMConstInt(ctx->i32, i,
3808 0), "");
3809 old = LLVMBuildExtractElement(ctx->builder, old_vector,
3810 LLVMConstInt(ctx->i32, i,
3811 0), "");
3812 LLVMValueRef ret_comp = _ac_build_dpp(ctx, old, src,
3813 dpp_ctrl,
3814 row_mask,
3815 bank_mask,
3816 bound_ctrl);
3817 ret = LLVMBuildInsertElement(ctx->builder, ret,
3818 ret_comp,
3819 LLVMConstInt(ctx->i32, i,
3820 0), "");
3821 }
3822 } else {
3823 ret = _ac_build_dpp(ctx, old, src, dpp_ctrl, row_mask,
3824 bank_mask, bound_ctrl);
3825 }
3826 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3827 }
3828
3829 static LLVMValueRef
3830 _ac_build_permlane16(struct ac_llvm_context *ctx, LLVMValueRef src, uint64_t sel,
3831 bool exchange_rows, bool bound_ctrl)
3832 {
3833 LLVMTypeRef type = LLVMTypeOf(src);
3834 LLVMValueRef result;
3835
3836 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3837
3838 LLVMValueRef args[6] = {
3839 src,
3840 src,
3841 LLVMConstInt(ctx->i32, sel, false),
3842 LLVMConstInt(ctx->i32, sel >> 32, false),
3843 ctx->i1true, /* fi */
3844 bound_ctrl ? ctx->i1true : ctx->i1false,
3845 };
3846
3847 result = ac_build_intrinsic(ctx, exchange_rows ? "llvm.amdgcn.permlanex16"
3848 : "llvm.amdgcn.permlane16",
3849 ctx->i32, args, 6,
3850 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3851
3852 return LLVMBuildTrunc(ctx->builder, result, type, "");
3853 }
3854
3855 static LLVMValueRef
3856 ac_build_permlane16(struct ac_llvm_context *ctx, LLVMValueRef src, uint64_t sel,
3857 bool exchange_rows, bool bound_ctrl)
3858 {
3859 LLVMTypeRef src_type = LLVMTypeOf(src);
3860 src = ac_to_integer(ctx, src);
3861 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3862 LLVMValueRef ret;
3863 if (bits > 32) {
3864 assert(bits % 32 == 0);
3865 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3866 LLVMValueRef src_vector =
3867 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3868 ret = LLVMGetUndef(vec_type);
3869 for (unsigned i = 0; i < bits / 32; i++) {
3870 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3871 LLVMConstInt(ctx->i32, i,
3872 0), "");
3873 LLVMValueRef ret_comp =
3874 _ac_build_permlane16(ctx, src, sel,
3875 exchange_rows,
3876 bound_ctrl);
3877 ret = LLVMBuildInsertElement(ctx->builder, ret,
3878 ret_comp,
3879 LLVMConstInt(ctx->i32, i,
3880 0), "");
3881 }
3882 } else {
3883 ret = _ac_build_permlane16(ctx, src, sel, exchange_rows,
3884 bound_ctrl);
3885 }
3886 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3887 }
3888
3889 static inline unsigned
3890 ds_pattern_bitmode(unsigned and_mask, unsigned or_mask, unsigned xor_mask)
3891 {
3892 assert(and_mask < 32 && or_mask < 32 && xor_mask < 32);
3893 return and_mask | (or_mask << 5) | (xor_mask << 10);
3894 }
3895
3896 static LLVMValueRef
3897 _ac_build_ds_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned mask)
3898 {
3899 LLVMTypeRef src_type = LLVMTypeOf(src);
3900 LLVMValueRef ret;
3901
3902 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3903
3904 ret = ac_build_intrinsic(ctx, "llvm.amdgcn.ds.swizzle", ctx->i32,
3905 (LLVMValueRef []) {
3906 src, LLVMConstInt(ctx->i32, mask, 0) },
3907 2, AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3908
3909 return LLVMBuildTrunc(ctx->builder, ret, src_type, "");
3910 }
3911
3912 LLVMValueRef
3913 ac_build_ds_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned mask)
3914 {
3915 LLVMTypeRef src_type = LLVMTypeOf(src);
3916 src = ac_to_integer(ctx, src);
3917 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3918 LLVMValueRef ret;
3919 if (bits > 32) {
3920 assert(bits % 32 == 0);
3921 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3922 LLVMValueRef src_vector =
3923 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3924 ret = LLVMGetUndef(vec_type);
3925 for (unsigned i = 0; i < bits / 32; i++) {
3926 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3927 LLVMConstInt(ctx->i32, i,
3928 0), "");
3929 LLVMValueRef ret_comp = _ac_build_ds_swizzle(ctx, src,
3930 mask);
3931 ret = LLVMBuildInsertElement(ctx->builder, ret,
3932 ret_comp,
3933 LLVMConstInt(ctx->i32, i,
3934 0), "");
3935 }
3936 } else {
3937 ret = _ac_build_ds_swizzle(ctx, src, mask);
3938 }
3939 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3940 }
3941
3942 static LLVMValueRef
3943 ac_build_wwm(struct ac_llvm_context *ctx, LLVMValueRef src)
3944 {
3945 LLVMTypeRef src_type = LLVMTypeOf(src);
3946 unsigned bitsize = ac_get_elem_bits(ctx, src_type);
3947 char name[32], type[8];
3948 LLVMValueRef ret;
3949
3950 src = ac_to_integer(ctx, src);
3951
3952 if (bitsize < 32)
3953 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3954
3955 ac_build_type_name_for_intr(LLVMTypeOf(src), type, sizeof(type));
3956 snprintf(name, sizeof(name), "llvm.amdgcn.wwm.%s", type);
3957 ret = ac_build_intrinsic(ctx, name, LLVMTypeOf(src),
3958 (LLVMValueRef []) { src }, 1,
3959 AC_FUNC_ATTR_READNONE);
3960
3961 if (bitsize < 32)
3962 ret = LLVMBuildTrunc(ctx->builder, ret,
3963 ac_to_integer_type(ctx, src_type), "");
3964
3965 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3966 }
3967
3968 static LLVMValueRef
3969 ac_build_set_inactive(struct ac_llvm_context *ctx, LLVMValueRef src,
3970 LLVMValueRef inactive)
3971 {
3972 char name[33], type[8];
3973 LLVMTypeRef src_type = LLVMTypeOf(src);
3974 unsigned bitsize = ac_get_elem_bits(ctx, src_type);
3975 src = ac_to_integer(ctx, src);
3976 inactive = ac_to_integer(ctx, inactive);
3977
3978 if (bitsize < 32) {
3979 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3980 inactive = LLVMBuildZExt(ctx->builder, inactive, ctx->i32, "");
3981 }
3982
3983 ac_build_type_name_for_intr(LLVMTypeOf(src), type, sizeof(type));
3984 snprintf(name, sizeof(name), "llvm.amdgcn.set.inactive.%s", type);
3985 LLVMValueRef ret =
3986 ac_build_intrinsic(ctx, name,
3987 LLVMTypeOf(src), (LLVMValueRef []) {
3988 src, inactive }, 2,
3989 AC_FUNC_ATTR_READNONE |
3990 AC_FUNC_ATTR_CONVERGENT);
3991 if (bitsize < 32)
3992 ret = LLVMBuildTrunc(ctx->builder, ret, src_type, "");
3993
3994 return ret;
3995 }
3996
3997 static LLVMValueRef
3998 get_reduction_identity(struct ac_llvm_context *ctx, nir_op op, unsigned type_size)
3999 {
4000 if (type_size == 1) {
4001 switch (op) {
4002 case nir_op_iadd: return ctx->i8_0;
4003 case nir_op_imul: return ctx->i8_1;
4004 case nir_op_imin: return LLVMConstInt(ctx->i8, INT8_MAX, 0);
4005 case nir_op_umin: return LLVMConstInt(ctx->i8, UINT8_MAX, 0);
4006 case nir_op_imax: return LLVMConstInt(ctx->i8, INT8_MIN, 0);
4007 case nir_op_umax: return ctx->i8_0;
4008 case nir_op_iand: return LLVMConstInt(ctx->i8, -1, 0);
4009 case nir_op_ior: return ctx->i8_0;
4010 case nir_op_ixor: return ctx->i8_0;
4011 default:
4012 unreachable("bad reduction intrinsic");
4013 }
4014 } else if (type_size == 2) {
4015 switch (op) {
4016 case nir_op_iadd: return ctx->i16_0;
4017 case nir_op_fadd: return ctx->f16_0;
4018 case nir_op_imul: return ctx->i16_1;
4019 case nir_op_fmul: return ctx->f16_1;
4020 case nir_op_imin: return LLVMConstInt(ctx->i16, INT16_MAX, 0);
4021 case nir_op_umin: return LLVMConstInt(ctx->i16, UINT16_MAX, 0);
4022 case nir_op_fmin: return LLVMConstReal(ctx->f16, INFINITY);
4023 case nir_op_imax: return LLVMConstInt(ctx->i16, INT16_MIN, 0);
4024 case nir_op_umax: return ctx->i16_0;
4025 case nir_op_fmax: return LLVMConstReal(ctx->f16, -INFINITY);
4026 case nir_op_iand: return LLVMConstInt(ctx->i16, -1, 0);
4027 case nir_op_ior: return ctx->i16_0;
4028 case nir_op_ixor: return ctx->i16_0;
4029 default:
4030 unreachable("bad reduction intrinsic");
4031 }
4032 } else if (type_size == 4) {
4033 switch (op) {
4034 case nir_op_iadd: return ctx->i32_0;
4035 case nir_op_fadd: return ctx->f32_0;
4036 case nir_op_imul: return ctx->i32_1;
4037 case nir_op_fmul: return ctx->f32_1;
4038 case nir_op_imin: return LLVMConstInt(ctx->i32, INT32_MAX, 0);
4039 case nir_op_umin: return LLVMConstInt(ctx->i32, UINT32_MAX, 0);
4040 case nir_op_fmin: return LLVMConstReal(ctx->f32, INFINITY);
4041 case nir_op_imax: return LLVMConstInt(ctx->i32, INT32_MIN, 0);
4042 case nir_op_umax: return ctx->i32_0;
4043 case nir_op_fmax: return LLVMConstReal(ctx->f32, -INFINITY);
4044 case nir_op_iand: return LLVMConstInt(ctx->i32, -1, 0);
4045 case nir_op_ior: return ctx->i32_0;
4046 case nir_op_ixor: return ctx->i32_0;
4047 default:
4048 unreachable("bad reduction intrinsic");
4049 }
4050 } else { /* type_size == 64bit */
4051 switch (op) {
4052 case nir_op_iadd: return ctx->i64_0;
4053 case nir_op_fadd: return ctx->f64_0;
4054 case nir_op_imul: return ctx->i64_1;
4055 case nir_op_fmul: return ctx->f64_1;
4056 case nir_op_imin: return LLVMConstInt(ctx->i64, INT64_MAX, 0);
4057 case nir_op_umin: return LLVMConstInt(ctx->i64, UINT64_MAX, 0);
4058 case nir_op_fmin: return LLVMConstReal(ctx->f64, INFINITY);
4059 case nir_op_imax: return LLVMConstInt(ctx->i64, INT64_MIN, 0);
4060 case nir_op_umax: return ctx->i64_0;
4061 case nir_op_fmax: return LLVMConstReal(ctx->f64, -INFINITY);
4062 case nir_op_iand: return LLVMConstInt(ctx->i64, -1, 0);
4063 case nir_op_ior: return ctx->i64_0;
4064 case nir_op_ixor: return ctx->i64_0;
4065 default:
4066 unreachable("bad reduction intrinsic");
4067 }
4068 }
4069 }
4070
4071 static LLVMValueRef
4072 ac_build_alu_op(struct ac_llvm_context *ctx, LLVMValueRef lhs, LLVMValueRef rhs, nir_op op)
4073 {
4074 bool _64bit = ac_get_type_size(LLVMTypeOf(lhs)) == 8;
4075 bool _32bit = ac_get_type_size(LLVMTypeOf(lhs)) == 4;
4076 switch (op) {
4077 case nir_op_iadd: return LLVMBuildAdd(ctx->builder, lhs, rhs, "");
4078 case nir_op_fadd: return LLVMBuildFAdd(ctx->builder, lhs, rhs, "");
4079 case nir_op_imul: return LLVMBuildMul(ctx->builder, lhs, rhs, "");
4080 case nir_op_fmul: return LLVMBuildFMul(ctx->builder, lhs, rhs, "");
4081 case nir_op_imin: return LLVMBuildSelect(ctx->builder,
4082 LLVMBuildICmp(ctx->builder, LLVMIntSLT, lhs, rhs, ""),
4083 lhs, rhs, "");
4084 case nir_op_umin: return LLVMBuildSelect(ctx->builder,
4085 LLVMBuildICmp(ctx->builder, LLVMIntULT, lhs, rhs, ""),
4086 lhs, rhs, "");
4087 case nir_op_fmin: return ac_build_intrinsic(ctx,
4088 _64bit ? "llvm.minnum.f64" : _32bit ? "llvm.minnum.f32" : "llvm.minnum.f16",
4089 _64bit ? ctx->f64 : _32bit ? ctx->f32 : ctx->f16,
4090 (LLVMValueRef[]){lhs, rhs}, 2, AC_FUNC_ATTR_READNONE);
4091 case nir_op_imax: return LLVMBuildSelect(ctx->builder,
4092 LLVMBuildICmp(ctx->builder, LLVMIntSGT, lhs, rhs, ""),
4093 lhs, rhs, "");
4094 case nir_op_umax: return LLVMBuildSelect(ctx->builder,
4095 LLVMBuildICmp(ctx->builder, LLVMIntUGT, lhs, rhs, ""),
4096 lhs, rhs, "");
4097 case nir_op_fmax: return ac_build_intrinsic(ctx,
4098 _64bit ? "llvm.maxnum.f64" : _32bit ? "llvm.maxnum.f32" : "llvm.maxnum.f16",
4099 _64bit ? ctx->f64 : _32bit ? ctx->f32 : ctx->f16,
4100 (LLVMValueRef[]){lhs, rhs}, 2, AC_FUNC_ATTR_READNONE);
4101 case nir_op_iand: return LLVMBuildAnd(ctx->builder, lhs, rhs, "");
4102 case nir_op_ior: return LLVMBuildOr(ctx->builder, lhs, rhs, "");
4103 case nir_op_ixor: return LLVMBuildXor(ctx->builder, lhs, rhs, "");
4104 default:
4105 unreachable("bad reduction intrinsic");
4106 }
4107 }
4108
4109 /**
4110 * \param src The value to shift.
4111 * \param identity The value to use the first lane.
4112 * \param maxprefix specifies that the result only needs to be correct for a
4113 * prefix of this many threads
4114 * \return src, shifted 1 lane up, and identity shifted into lane 0.
4115 */
4116 static LLVMValueRef
4117 ac_wavefront_shift_right_1(struct ac_llvm_context *ctx, LLVMValueRef src,
4118 LLVMValueRef identity, unsigned maxprefix)
4119 {
4120 if (ctx->chip_class >= GFX10) {
4121 /* wavefront shift_right by 1 on GFX10 (emulate dpp_wf_sr1) */
4122 LLVMValueRef active, tmp1, tmp2;
4123 LLVMValueRef tid = ac_get_thread_id(ctx);
4124
4125 tmp1 = ac_build_dpp(ctx, identity, src, dpp_row_sr(1), 0xf, 0xf, false);
4126
4127 tmp2 = ac_build_permlane16(ctx, src, (uint64_t)~0, true, false);
4128
4129 if (maxprefix > 32) {
4130 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid,
4131 LLVMConstInt(ctx->i32, 32, false), "");
4132
4133 tmp2 = LLVMBuildSelect(ctx->builder, active,
4134 ac_build_readlane(ctx, src,
4135 LLVMConstInt(ctx->i32, 31, false)),
4136 tmp2, "");
4137
4138 active = LLVMBuildOr(ctx->builder, active,
4139 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4140 LLVMBuildAnd(ctx->builder, tid,
4141 LLVMConstInt(ctx->i32, 0x1f, false), ""),
4142 LLVMConstInt(ctx->i32, 0x10, false), ""), "");
4143 return LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4144 } else if (maxprefix > 16) {
4145 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid,
4146 LLVMConstInt(ctx->i32, 16, false), "");
4147
4148 return LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4149 }
4150 } else if (ctx->chip_class >= GFX8) {
4151 return ac_build_dpp(ctx, identity, src, dpp_wf_sr1, 0xf, 0xf, false);
4152 }
4153
4154 /* wavefront shift_right by 1 on SI/CI */
4155 LLVMValueRef active, tmp1, tmp2;
4156 LLVMValueRef tid = ac_get_thread_id(ctx);
4157 tmp1 = ac_build_ds_swizzle(ctx, src, (1 << 15) | dpp_quad_perm(0, 0, 1, 2));
4158 tmp2 = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x18, 0x03, 0x00));
4159 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4160 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 0x7, 0), ""),
4161 LLVMConstInt(ctx->i32, 0x4, 0), "");
4162 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4163 tmp2 = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x10, 0x07, 0x00));
4164 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4165 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 0xf, 0), ""),
4166 LLVMConstInt(ctx->i32, 0x8, 0), "");
4167 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4168 tmp2 = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x00, 0x0f, 0x00));
4169 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4170 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 0x1f, 0), ""),
4171 LLVMConstInt(ctx->i32, 0x10, 0), "");
4172 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4173 tmp2 = ac_build_readlane(ctx, src, LLVMConstInt(ctx->i32, 31, 0));
4174 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid, LLVMConstInt(ctx->i32, 32, 0), "");
4175 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4176 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid, LLVMConstInt(ctx->i32, 0, 0), "");
4177 return LLVMBuildSelect(ctx->builder, active, identity, tmp1, "");
4178 }
4179
4180 /**
4181 * \param maxprefix specifies that the result only needs to be correct for a
4182 * prefix of this many threads
4183 */
4184 static LLVMValueRef
4185 ac_build_scan(struct ac_llvm_context *ctx, nir_op op, LLVMValueRef src, LLVMValueRef identity,
4186 unsigned maxprefix, bool inclusive)
4187 {
4188 LLVMValueRef result, tmp;
4189
4190 if (!inclusive)
4191 src = ac_wavefront_shift_right_1(ctx, src, identity, maxprefix);
4192
4193 result = src;
4194
4195 if (ctx->chip_class <= GFX7) {
4196 assert(maxprefix == 64);
4197 LLVMValueRef tid = ac_get_thread_id(ctx);
4198 LLVMValueRef active;
4199 tmp = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x1e, 0x00, 0x00));
4200 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4201 LLVMBuildAnd(ctx->builder, tid, ctx->i32_1, ""),
4202 ctx->i32_0, "");
4203 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4204 result = ac_build_alu_op(ctx, result, tmp, op);
4205 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1c, 0x01, 0x00));
4206 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4207 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 2, 0), ""),
4208 ctx->i32_0, "");
4209 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4210 result = ac_build_alu_op(ctx, result, tmp, op);
4211 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x18, 0x03, 0x00));
4212 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4213 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 4, 0), ""),
4214 ctx->i32_0, "");
4215 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4216 result = ac_build_alu_op(ctx, result, tmp, op);
4217 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x10, 0x07, 0x00));
4218 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4219 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 8, 0), ""),
4220 ctx->i32_0, "");
4221 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4222 result = ac_build_alu_op(ctx, result, tmp, op);
4223 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x00, 0x0f, 0x00));
4224 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4225 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 16, 0), ""),
4226 ctx->i32_0, "");
4227 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4228 result = ac_build_alu_op(ctx, result, tmp, op);
4229 tmp = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 31, 0));
4230 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4231 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 32, 0), ""),
4232 ctx->i32_0, "");
4233 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4234 result = ac_build_alu_op(ctx, result, tmp, op);
4235 return result;
4236 }
4237
4238 if (maxprefix <= 1)
4239 return result;
4240 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(1), 0xf, 0xf, false);
4241 result = ac_build_alu_op(ctx, result, tmp, op);
4242 if (maxprefix <= 2)
4243 return result;
4244 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(2), 0xf, 0xf, false);
4245 result = ac_build_alu_op(ctx, result, tmp, op);
4246 if (maxprefix <= 3)
4247 return result;
4248 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(3), 0xf, 0xf, false);
4249 result = ac_build_alu_op(ctx, result, tmp, op);
4250 if (maxprefix <= 4)
4251 return result;
4252 tmp = ac_build_dpp(ctx, identity, result, dpp_row_sr(4), 0xf, 0xe, false);
4253 result = ac_build_alu_op(ctx, result, tmp, op);
4254 if (maxprefix <= 8)
4255 return result;
4256 tmp = ac_build_dpp(ctx, identity, result, dpp_row_sr(8), 0xf, 0xc, false);
4257 result = ac_build_alu_op(ctx, result, tmp, op);
4258 if (maxprefix <= 16)
4259 return result;
4260
4261 if (ctx->chip_class >= GFX10) {
4262 LLVMValueRef tid = ac_get_thread_id(ctx);
4263 LLVMValueRef active;
4264
4265 tmp = ac_build_permlane16(ctx, result, ~(uint64_t)0, true, false);
4266
4267 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4268 LLVMBuildAnd(ctx->builder, tid,
4269 LLVMConstInt(ctx->i32, 16, false), ""),
4270 ctx->i32_0, "");
4271
4272 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4273
4274 result = ac_build_alu_op(ctx, result, tmp, op);
4275
4276 if (maxprefix <= 32)
4277 return result;
4278
4279 tmp = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 31, false));
4280
4281 active = LLVMBuildICmp(ctx->builder, LLVMIntUGE, tid,
4282 LLVMConstInt(ctx->i32, 32, false), "");
4283
4284 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4285
4286 result = ac_build_alu_op(ctx, result, tmp, op);
4287 return result;
4288 }
4289
4290 tmp = ac_build_dpp(ctx, identity, result, dpp_row_bcast15, 0xa, 0xf, false);
4291 result = ac_build_alu_op(ctx, result, tmp, op);
4292 if (maxprefix <= 32)
4293 return result;
4294 tmp = ac_build_dpp(ctx, identity, result, dpp_row_bcast31, 0xc, 0xf, false);
4295 result = ac_build_alu_op(ctx, result, tmp, op);
4296 return result;
4297 }
4298
4299 LLVMValueRef
4300 ac_build_inclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op)
4301 {
4302 LLVMValueRef result;
4303
4304 if (LLVMTypeOf(src) == ctx->i1 && op == nir_op_iadd) {
4305 LLVMBuilderRef builder = ctx->builder;
4306 src = LLVMBuildZExt(builder, src, ctx->i32, "");
4307 result = ac_build_ballot(ctx, src);
4308 result = ac_build_mbcnt(ctx, result);
4309 result = LLVMBuildAdd(builder, result, src, "");
4310 return result;
4311 }
4312
4313 ac_build_optimization_barrier(ctx, &src);
4314
4315 LLVMValueRef identity =
4316 get_reduction_identity(ctx, op, ac_get_type_size(LLVMTypeOf(src)));
4317 result = LLVMBuildBitCast(ctx->builder, ac_build_set_inactive(ctx, src, identity),
4318 LLVMTypeOf(identity), "");
4319 result = ac_build_scan(ctx, op, result, identity, ctx->wave_size, true);
4320
4321 return ac_build_wwm(ctx, result);
4322 }
4323
4324 LLVMValueRef
4325 ac_build_exclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op)
4326 {
4327 LLVMValueRef result;
4328
4329 if (LLVMTypeOf(src) == ctx->i1 && op == nir_op_iadd) {
4330 LLVMBuilderRef builder = ctx->builder;
4331 src = LLVMBuildZExt(builder, src, ctx->i32, "");
4332 result = ac_build_ballot(ctx, src);
4333 result = ac_build_mbcnt(ctx, result);
4334 return result;
4335 }
4336
4337 ac_build_optimization_barrier(ctx, &src);
4338
4339 LLVMValueRef identity =
4340 get_reduction_identity(ctx, op, ac_get_type_size(LLVMTypeOf(src)));
4341 result = LLVMBuildBitCast(ctx->builder, ac_build_set_inactive(ctx, src, identity),
4342 LLVMTypeOf(identity), "");
4343 result = ac_build_scan(ctx, op, result, identity, ctx->wave_size, false);
4344
4345 return ac_build_wwm(ctx, result);
4346 }
4347
4348 LLVMValueRef
4349 ac_build_reduce(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op, unsigned cluster_size)
4350 {
4351 if (cluster_size == 1) return src;
4352 ac_build_optimization_barrier(ctx, &src);
4353 LLVMValueRef result, swap;
4354 LLVMValueRef identity = get_reduction_identity(ctx, op,
4355 ac_get_type_size(LLVMTypeOf(src)));
4356 result = LLVMBuildBitCast(ctx->builder,
4357 ac_build_set_inactive(ctx, src, identity),
4358 LLVMTypeOf(identity), "");
4359 swap = ac_build_quad_swizzle(ctx, result, 1, 0, 3, 2);
4360 result = ac_build_alu_op(ctx, result, swap, op);
4361 if (cluster_size == 2) return ac_build_wwm(ctx, result);
4362
4363 swap = ac_build_quad_swizzle(ctx, result, 2, 3, 0, 1);
4364 result = ac_build_alu_op(ctx, result, swap, op);
4365 if (cluster_size == 4) return ac_build_wwm(ctx, result);
4366
4367 if (ctx->chip_class >= GFX8)
4368 swap = ac_build_dpp(ctx, identity, result, dpp_row_half_mirror, 0xf, 0xf, false);
4369 else
4370 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x04));
4371 result = ac_build_alu_op(ctx, result, swap, op);
4372 if (cluster_size == 8) return ac_build_wwm(ctx, result);
4373
4374 if (ctx->chip_class >= GFX8)
4375 swap = ac_build_dpp(ctx, identity, result, dpp_row_mirror, 0xf, 0xf, false);
4376 else
4377 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x08));
4378 result = ac_build_alu_op(ctx, result, swap, op);
4379 if (cluster_size == 16) return ac_build_wwm(ctx, result);
4380
4381 if (ctx->chip_class >= GFX10)
4382 swap = ac_build_permlane16(ctx, result, 0, true, false);
4383 else if (ctx->chip_class >= GFX8 && cluster_size != 32)
4384 swap = ac_build_dpp(ctx, identity, result, dpp_row_bcast15, 0xa, 0xf, false);
4385 else
4386 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x10));
4387 result = ac_build_alu_op(ctx, result, swap, op);
4388 if (cluster_size == 32) return ac_build_wwm(ctx, result);
4389
4390 if (ctx->chip_class >= GFX8) {
4391 if (ctx->wave_size == 64) {
4392 if (ctx->chip_class >= GFX10)
4393 swap = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 31, false));
4394 else
4395 swap = ac_build_dpp(ctx, identity, result, dpp_row_bcast31, 0xc, 0xf, false);
4396 result = ac_build_alu_op(ctx, result, swap, op);
4397 result = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 63, 0));
4398 }
4399
4400 return ac_build_wwm(ctx, result);
4401 } else {
4402 swap = ac_build_readlane(ctx, result, ctx->i32_0);
4403 result = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 32, 0));
4404 result = ac_build_alu_op(ctx, result, swap, op);
4405 return ac_build_wwm(ctx, result);
4406 }
4407 }
4408
4409 /**
4410 * "Top half" of a scan that reduces per-wave values across an entire
4411 * workgroup.
4412 *
4413 * The source value must be present in the highest lane of the wave, and the
4414 * highest lane must be live.
4415 */
4416 void
4417 ac_build_wg_wavescan_top(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4418 {
4419 if (ws->maxwaves <= 1)
4420 return;
4421
4422 const LLVMValueRef last_lane = LLVMConstInt(ctx->i32, ctx->wave_size - 1, false);
4423 LLVMBuilderRef builder = ctx->builder;
4424 LLVMValueRef tid = ac_get_thread_id(ctx);
4425 LLVMValueRef tmp;
4426
4427 tmp = LLVMBuildICmp(builder, LLVMIntEQ, tid, last_lane, "");
4428 ac_build_ifcc(ctx, tmp, 1000);
4429 LLVMBuildStore(builder, ws->src, LLVMBuildGEP(builder, ws->scratch, &ws->waveidx, 1, ""));
4430 ac_build_endif(ctx, 1000);
4431 }
4432
4433 /**
4434 * "Bottom half" of a scan that reduces per-wave values across an entire
4435 * workgroup.
4436 *
4437 * The caller must place a barrier between the top and bottom halves.
4438 */
4439 void
4440 ac_build_wg_wavescan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4441 {
4442 const LLVMTypeRef type = LLVMTypeOf(ws->src);
4443 const LLVMValueRef identity =
4444 get_reduction_identity(ctx, ws->op, ac_get_type_size(type));
4445
4446 if (ws->maxwaves <= 1) {
4447 ws->result_reduce = ws->src;
4448 ws->result_inclusive = ws->src;
4449 ws->result_exclusive = identity;
4450 return;
4451 }
4452 assert(ws->maxwaves <= 32);
4453
4454 LLVMBuilderRef builder = ctx->builder;
4455 LLVMValueRef tid = ac_get_thread_id(ctx);
4456 LLVMBasicBlockRef bbs[2];
4457 LLVMValueRef phivalues_scan[2];
4458 LLVMValueRef tmp, tmp2;
4459
4460 bbs[0] = LLVMGetInsertBlock(builder);
4461 phivalues_scan[0] = LLVMGetUndef(type);
4462
4463 if (ws->enable_reduce)
4464 tmp = LLVMBuildICmp(builder, LLVMIntULT, tid, ws->numwaves, "");
4465 else if (ws->enable_inclusive)
4466 tmp = LLVMBuildICmp(builder, LLVMIntULE, tid, ws->waveidx, "");
4467 else
4468 tmp = LLVMBuildICmp(builder, LLVMIntULT, tid, ws->waveidx, "");
4469 ac_build_ifcc(ctx, tmp, 1001);
4470 {
4471 tmp = LLVMBuildLoad(builder, LLVMBuildGEP(builder, ws->scratch, &tid, 1, ""), "");
4472
4473 ac_build_optimization_barrier(ctx, &tmp);
4474
4475 bbs[1] = LLVMGetInsertBlock(builder);
4476 phivalues_scan[1] = ac_build_scan(ctx, ws->op, tmp, identity, ws->maxwaves, true);
4477 }
4478 ac_build_endif(ctx, 1001);
4479
4480 const LLVMValueRef scan = ac_build_phi(ctx, type, 2, phivalues_scan, bbs);
4481
4482 if (ws->enable_reduce) {
4483 tmp = LLVMBuildSub(builder, ws->numwaves, ctx->i32_1, "");
4484 ws->result_reduce = ac_build_readlane(ctx, scan, tmp);
4485 }
4486 if (ws->enable_inclusive)
4487 ws->result_inclusive = ac_build_readlane(ctx, scan, ws->waveidx);
4488 if (ws->enable_exclusive) {
4489 tmp = LLVMBuildSub(builder, ws->waveidx, ctx->i32_1, "");
4490 tmp = ac_build_readlane(ctx, scan, tmp);
4491 tmp2 = LLVMBuildICmp(builder, LLVMIntEQ, ws->waveidx, ctx->i32_0, "");
4492 ws->result_exclusive = LLVMBuildSelect(builder, tmp2, identity, tmp, "");
4493 }
4494 }
4495
4496 /**
4497 * Inclusive scan of a per-wave value across an entire workgroup.
4498 *
4499 * This implies an s_barrier instruction.
4500 *
4501 * Unlike ac_build_inclusive_scan, the caller \em must ensure that all threads
4502 * of the workgroup are live. (This requirement cannot easily be relaxed in a
4503 * useful manner because of the barrier in the algorithm.)
4504 */
4505 void
4506 ac_build_wg_wavescan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4507 {
4508 ac_build_wg_wavescan_top(ctx, ws);
4509 ac_build_s_barrier(ctx);
4510 ac_build_wg_wavescan_bottom(ctx, ws);
4511 }
4512
4513 /**
4514 * "Top half" of a scan that reduces per-thread values across an entire
4515 * workgroup.
4516 *
4517 * All lanes must be active when this code runs.
4518 */
4519 void
4520 ac_build_wg_scan_top(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4521 {
4522 if (ws->enable_exclusive) {
4523 ws->extra = ac_build_exclusive_scan(ctx, ws->src, ws->op);
4524 if (LLVMTypeOf(ws->src) == ctx->i1 && ws->op == nir_op_iadd)
4525 ws->src = LLVMBuildZExt(ctx->builder, ws->src, ctx->i32, "");
4526 ws->src = ac_build_alu_op(ctx, ws->extra, ws->src, ws->op);
4527 } else {
4528 ws->src = ac_build_inclusive_scan(ctx, ws->src, ws->op);
4529 }
4530
4531 bool enable_inclusive = ws->enable_inclusive;
4532 bool enable_exclusive = ws->enable_exclusive;
4533 ws->enable_inclusive = false;
4534 ws->enable_exclusive = ws->enable_exclusive || enable_inclusive;
4535 ac_build_wg_wavescan_top(ctx, ws);
4536 ws->enable_inclusive = enable_inclusive;
4537 ws->enable_exclusive = enable_exclusive;
4538 }
4539
4540 /**
4541 * "Bottom half" of a scan that reduces per-thread values across an entire
4542 * workgroup.
4543 *
4544 * The caller must place a barrier between the top and bottom halves.
4545 */
4546 void
4547 ac_build_wg_scan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4548 {
4549 bool enable_inclusive = ws->enable_inclusive;
4550 bool enable_exclusive = ws->enable_exclusive;
4551 ws->enable_inclusive = false;
4552 ws->enable_exclusive = ws->enable_exclusive || enable_inclusive;
4553 ac_build_wg_wavescan_bottom(ctx, ws);
4554 ws->enable_inclusive = enable_inclusive;
4555 ws->enable_exclusive = enable_exclusive;
4556
4557 /* ws->result_reduce is already the correct value */
4558 if (ws->enable_inclusive)
4559 ws->result_inclusive = ac_build_alu_op(ctx, ws->result_inclusive, ws->src, ws->op);
4560 if (ws->enable_exclusive)
4561 ws->result_exclusive = ac_build_alu_op(ctx, ws->result_exclusive, ws->extra, ws->op);
4562 }
4563
4564 /**
4565 * A scan that reduces per-thread values across an entire workgroup.
4566 *
4567 * The caller must ensure that all lanes are active when this code runs
4568 * (WWM is insufficient!), because there is an implied barrier.
4569 */
4570 void
4571 ac_build_wg_scan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4572 {
4573 ac_build_wg_scan_top(ctx, ws);
4574 ac_build_s_barrier(ctx);
4575 ac_build_wg_scan_bottom(ctx, ws);
4576 }
4577
4578 LLVMValueRef
4579 ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src,
4580 unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
4581 {
4582 unsigned mask = dpp_quad_perm(lane0, lane1, lane2, lane3);
4583 if (ctx->chip_class >= GFX8) {
4584 return ac_build_dpp(ctx, src, src, mask, 0xf, 0xf, false);
4585 } else {
4586 return ac_build_ds_swizzle(ctx, src, (1 << 15) | mask);
4587 }
4588 }
4589
4590 LLVMValueRef
4591 ac_build_shuffle(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef index)
4592 {
4593 LLVMTypeRef type = LLVMTypeOf(src);
4594 LLVMValueRef result;
4595
4596 index = LLVMBuildMul(ctx->builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
4597 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
4598
4599 result = ac_build_intrinsic(ctx, "llvm.amdgcn.ds.bpermute", ctx->i32,
4600 (LLVMValueRef []) {index, src}, 2,
4601 AC_FUNC_ATTR_READNONE |
4602 AC_FUNC_ATTR_CONVERGENT);
4603 return LLVMBuildTrunc(ctx->builder, result, type, "");
4604 }
4605
4606 LLVMValueRef
4607 ac_build_frexp_exp(struct ac_llvm_context *ctx, LLVMValueRef src0,
4608 unsigned bitsize)
4609 {
4610 LLVMTypeRef type;
4611 char *intr;
4612
4613 if (bitsize == 16) {
4614 intr = "llvm.amdgcn.frexp.exp.i16.f16";
4615 type = ctx->i16;
4616 } else if (bitsize == 32) {
4617 intr = "llvm.amdgcn.frexp.exp.i32.f32";
4618 type = ctx->i32;
4619 } else {
4620 intr = "llvm.amdgcn.frexp.exp.i32.f64";
4621 type = ctx->i32;
4622 }
4623
4624 LLVMValueRef params[] = {
4625 src0,
4626 };
4627 return ac_build_intrinsic(ctx, intr, type, params, 1,
4628 AC_FUNC_ATTR_READNONE);
4629 }
4630 LLVMValueRef
4631 ac_build_frexp_mant(struct ac_llvm_context *ctx, LLVMValueRef src0,
4632 unsigned bitsize)
4633 {
4634 LLVMTypeRef type;
4635 char *intr;
4636
4637 if (bitsize == 16) {
4638 intr = "llvm.amdgcn.frexp.mant.f16";
4639 type = ctx->f16;
4640 } else if (bitsize == 32) {
4641 intr = "llvm.amdgcn.frexp.mant.f32";
4642 type = ctx->f32;
4643 } else {
4644 intr = "llvm.amdgcn.frexp.mant.f64";
4645 type = ctx->f64;
4646 }
4647
4648 LLVMValueRef params[] = {
4649 src0,
4650 };
4651 return ac_build_intrinsic(ctx, intr, type, params, 1,
4652 AC_FUNC_ATTR_READNONE);
4653 }
4654
4655 LLVMValueRef
4656 ac_build_canonicalize(struct ac_llvm_context *ctx, LLVMValueRef src0,
4657 unsigned bitsize)
4658 {
4659 LLVMTypeRef type;
4660 char *intr;
4661
4662 if (bitsize == 16) {
4663 intr = "llvm.canonicalize.f16";
4664 type = ctx->f16;
4665 } else if (bitsize == 32) {
4666 intr = "llvm.canonicalize.f32";
4667 type = ctx->f32;
4668 } else {
4669 intr = "llvm.canonicalize.f64";
4670 type = ctx->f64;
4671 }
4672
4673 LLVMValueRef params[] = {
4674 src0,
4675 };
4676 return ac_build_intrinsic(ctx, intr, type, params, 1,
4677 AC_FUNC_ATTR_READNONE);
4678 }
4679
4680 /*
4681 * this takes an I,J coordinate pair,
4682 * and works out the X and Y derivatives.
4683 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
4684 */
4685 LLVMValueRef
4686 ac_build_ddxy_interp(struct ac_llvm_context *ctx, LLVMValueRef interp_ij)
4687 {
4688 LLVMValueRef result[4], a;
4689 unsigned i;
4690
4691 for (i = 0; i < 2; i++) {
4692 a = LLVMBuildExtractElement(ctx->builder, interp_ij,
4693 LLVMConstInt(ctx->i32, i, false), "");
4694 result[i] = ac_build_ddxy(ctx, AC_TID_MASK_TOP_LEFT, 1, a);
4695 result[2+i] = ac_build_ddxy(ctx, AC_TID_MASK_TOP_LEFT, 2, a);
4696 }
4697 return ac_build_gather_values(ctx, result, 4);
4698 }
4699
4700 LLVMValueRef
4701 ac_build_load_helper_invocation(struct ac_llvm_context *ctx)
4702 {
4703 LLVMValueRef result = ac_build_intrinsic(ctx, "llvm.amdgcn.ps.live",
4704 ctx->i1, NULL, 0,
4705 AC_FUNC_ATTR_READNONE);
4706 result = LLVMBuildNot(ctx->builder, result, "");
4707 return LLVMBuildSExt(ctx->builder, result, ctx->i32, "");
4708 }
4709
4710 LLVMValueRef
4711 ac_build_is_helper_invocation(struct ac_llvm_context *ctx)
4712 {
4713 if (!ctx->postponed_kill)
4714 return ac_build_load_helper_invocation(ctx);
4715
4716 /* !(exact && postponed) */
4717 LLVMValueRef exact = ac_build_intrinsic(ctx, "llvm.amdgcn.ps.live",
4718 ctx->i1, NULL, 0,
4719 AC_FUNC_ATTR_READNONE);
4720
4721 LLVMValueRef postponed = LLVMBuildLoad(ctx->builder, ctx->postponed_kill, "");
4722 LLVMValueRef result = LLVMBuildAnd(ctx->builder, exact, postponed, "");
4723
4724 return LLVMBuildSelect(ctx->builder, result, ctx->i32_0,
4725 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false), "");
4726 }
4727
4728 LLVMValueRef ac_build_call(struct ac_llvm_context *ctx, LLVMValueRef func,
4729 LLVMValueRef *args, unsigned num_args)
4730 {
4731 LLVMValueRef ret = LLVMBuildCall(ctx->builder, func, args, num_args, "");
4732 LLVMSetInstructionCallConv(ret, LLVMGetFunctionCallConv(func));
4733 return ret;
4734 }
4735
4736 void
4737 ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth,
4738 LLVMValueRef stencil, LLVMValueRef samplemask,
4739 struct ac_export_args *args)
4740 {
4741 unsigned mask = 0;
4742 unsigned format = ac_get_spi_shader_z_format(depth != NULL,
4743 stencil != NULL,
4744 samplemask != NULL);
4745
4746 assert(depth || stencil || samplemask);
4747
4748 memset(args, 0, sizeof(*args));
4749
4750 args->valid_mask = 1; /* whether the EXEC mask is valid */
4751 args->done = 1; /* DONE bit */
4752
4753 /* Specify the target we are exporting */
4754 args->target = V_008DFC_SQ_EXP_MRTZ;
4755
4756 args->compr = 0; /* COMP flag */
4757 args->out[0] = LLVMGetUndef(ctx->f32); /* R, depth */
4758 args->out[1] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
4759 args->out[2] = LLVMGetUndef(ctx->f32); /* B, sample mask */
4760 args->out[3] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
4761
4762 if (format == V_028710_SPI_SHADER_UINT16_ABGR) {
4763 assert(!depth);
4764 args->compr = 1; /* COMPR flag */
4765
4766 if (stencil) {
4767 /* Stencil should be in X[23:16]. */
4768 stencil = ac_to_integer(ctx, stencil);
4769 stencil = LLVMBuildShl(ctx->builder, stencil,
4770 LLVMConstInt(ctx->i32, 16, 0), "");
4771 args->out[0] = ac_to_float(ctx, stencil);
4772 mask |= 0x3;
4773 }
4774 if (samplemask) {
4775 /* SampleMask should be in Y[15:0]. */
4776 args->out[1] = samplemask;
4777 mask |= 0xc;
4778 }
4779 } else {
4780 if (depth) {
4781 args->out[0] = depth;
4782 mask |= 0x1;
4783 }
4784 if (stencil) {
4785 args->out[1] = stencil;
4786 mask |= 0x2;
4787 }
4788 if (samplemask) {
4789 args->out[2] = samplemask;
4790 mask |= 0x4;
4791 }
4792 }
4793
4794 /* GFX6 (except OLAND and HAINAN) has a bug that it only looks
4795 * at the X writemask component. */
4796 if (ctx->chip_class == GFX6 &&
4797 ctx->family != CHIP_OLAND &&
4798 ctx->family != CHIP_HAINAN)
4799 mask |= 0x1;
4800
4801 /* Specify which components to enable */
4802 args->enabled_channels = mask;
4803 }
4804
4805 /* Send GS Alloc Req message from the first wave of the group to SPI.
4806 * Message payload is:
4807 * - bits 0..10: vertices in group
4808 * - bits 12..22: primitives in group
4809 */
4810 void ac_build_sendmsg_gs_alloc_req(struct ac_llvm_context *ctx, LLVMValueRef wave_id,
4811 LLVMValueRef vtx_cnt, LLVMValueRef prim_cnt)
4812 {
4813 LLVMBuilderRef builder = ctx->builder;
4814 LLVMValueRef tmp;
4815 bool export_dummy_prim = false;
4816
4817 /* HW workaround for a GPU hang with 100% culling.
4818 * We always have to export at least 1 primitive.
4819 * Export a degenerate triangle using vertex 0 for all 3 vertices.
4820 */
4821 if (prim_cnt == ctx->i32_0 && ctx->chip_class == GFX10) {
4822 assert(vtx_cnt == ctx->i32_0);
4823 prim_cnt = ctx->i32_1;
4824 vtx_cnt = ctx->i32_1;
4825 export_dummy_prim = true;
4826 }
4827
4828 ac_build_ifcc(ctx, LLVMBuildICmp(builder, LLVMIntEQ, wave_id, ctx->i32_0, ""), 5020);
4829
4830 tmp = LLVMBuildShl(builder, prim_cnt, LLVMConstInt(ctx->i32, 12, false),"");
4831 tmp = LLVMBuildOr(builder, tmp, vtx_cnt, "");
4832 ac_build_sendmsg(ctx, AC_SENDMSG_GS_ALLOC_REQ, tmp);
4833
4834 if (export_dummy_prim) {
4835 struct ac_ngg_prim prim = {};
4836 /* The vertex indices are 0,0,0. */
4837 prim.passthrough = ctx->i32_0;
4838
4839 struct ac_export_args pos = {};
4840 pos.out[0] = pos.out[1] = pos.out[2] = pos.out[3] = ctx->f32_0;
4841 pos.target = V_008DFC_SQ_EXP_POS;
4842 pos.enabled_channels = 0xf;
4843 pos.done = true;
4844
4845 ac_build_ifcc(ctx, LLVMBuildICmp(builder, LLVMIntEQ, ac_get_thread_id(ctx),
4846 ctx->i32_0, ""), 5021);
4847 ac_build_export_prim(ctx, &prim);
4848 ac_build_export(ctx, &pos);
4849 ac_build_endif(ctx, 5021);
4850 }
4851
4852 ac_build_endif(ctx, 5020);
4853 }
4854
4855 LLVMValueRef ac_pack_prim_export(struct ac_llvm_context *ctx,
4856 const struct ac_ngg_prim *prim)
4857 {
4858 /* The prim export format is:
4859 * - bits 0..8: index 0
4860 * - bit 9: edge flag 0
4861 * - bits 10..18: index 1
4862 * - bit 19: edge flag 1
4863 * - bits 20..28: index 2
4864 * - bit 29: edge flag 2
4865 * - bit 31: null primitive (skip)
4866 */
4867 LLVMBuilderRef builder = ctx->builder;
4868 LLVMValueRef tmp = LLVMBuildZExt(builder, prim->isnull, ctx->i32, "");
4869 LLVMValueRef result = LLVMBuildShl(builder, tmp, LLVMConstInt(ctx->i32, 31, false), "");
4870
4871 for (unsigned i = 0; i < prim->num_vertices; ++i) {
4872 tmp = LLVMBuildShl(builder, prim->index[i],
4873 LLVMConstInt(ctx->i32, 10 * i, false), "");
4874 result = LLVMBuildOr(builder, result, tmp, "");
4875 tmp = LLVMBuildZExt(builder, prim->edgeflag[i], ctx->i32, "");
4876 tmp = LLVMBuildShl(builder, tmp,
4877 LLVMConstInt(ctx->i32, 10 * i + 9, false), "");
4878 result = LLVMBuildOr(builder, result, tmp, "");
4879 }
4880 return result;
4881 }
4882
4883 void ac_build_export_prim(struct ac_llvm_context *ctx,
4884 const struct ac_ngg_prim *prim)
4885 {
4886 struct ac_export_args args;
4887
4888 if (prim->passthrough) {
4889 args.out[0] = prim->passthrough;
4890 } else {
4891 args.out[0] = ac_pack_prim_export(ctx, prim);
4892 }
4893
4894 args.out[0] = LLVMBuildBitCast(ctx->builder, args.out[0], ctx->f32, "");
4895 args.out[1] = LLVMGetUndef(ctx->f32);
4896 args.out[2] = LLVMGetUndef(ctx->f32);
4897 args.out[3] = LLVMGetUndef(ctx->f32);
4898
4899 args.target = V_008DFC_SQ_EXP_PRIM;
4900 args.enabled_channels = 1;
4901 args.done = true;
4902 args.valid_mask = false;
4903 args.compr = false;
4904
4905 ac_build_export(ctx, &args);
4906 }
4907
4908 static LLVMTypeRef
4909 arg_llvm_type(enum ac_arg_type type, unsigned size, struct ac_llvm_context *ctx)
4910 {
4911 if (type == AC_ARG_FLOAT) {
4912 return size == 1 ? ctx->f32 : LLVMVectorType(ctx->f32, size);
4913 } else if (type == AC_ARG_INT) {
4914 return size == 1 ? ctx->i32 : LLVMVectorType(ctx->i32, size);
4915 } else {
4916 LLVMTypeRef ptr_type;
4917 switch (type) {
4918 case AC_ARG_CONST_PTR:
4919 ptr_type = ctx->i8;
4920 break;
4921 case AC_ARG_CONST_FLOAT_PTR:
4922 ptr_type = ctx->f32;
4923 break;
4924 case AC_ARG_CONST_PTR_PTR:
4925 ptr_type = ac_array_in_const32_addr_space(ctx->i8);
4926 break;
4927 case AC_ARG_CONST_DESC_PTR:
4928 ptr_type = ctx->v4i32;
4929 break;
4930 case AC_ARG_CONST_IMAGE_PTR:
4931 ptr_type = ctx->v8i32;
4932 break;
4933 default:
4934 unreachable("unknown arg type");
4935 }
4936 if (size == 1) {
4937 return ac_array_in_const32_addr_space(ptr_type);
4938 } else {
4939 assert(size == 2);
4940 return ac_array_in_const_addr_space(ptr_type);
4941 }
4942 }
4943 }
4944
4945 LLVMValueRef
4946 ac_build_main(const struct ac_shader_args *args,
4947 struct ac_llvm_context *ctx,
4948 enum ac_llvm_calling_convention convention,
4949 const char *name, LLVMTypeRef ret_type,
4950 LLVMModuleRef module)
4951 {
4952 LLVMTypeRef arg_types[AC_MAX_ARGS];
4953
4954 for (unsigned i = 0; i < args->arg_count; i++) {
4955 arg_types[i] = arg_llvm_type(args->args[i].type,
4956 args->args[i].size, ctx);
4957 }
4958
4959 LLVMTypeRef main_function_type =
4960 LLVMFunctionType(ret_type, arg_types, args->arg_count, 0);
4961
4962 LLVMValueRef main_function =
4963 LLVMAddFunction(module, name, main_function_type);
4964 LLVMBasicBlockRef main_function_body =
4965 LLVMAppendBasicBlockInContext(ctx->context, main_function, "main_body");
4966 LLVMPositionBuilderAtEnd(ctx->builder, main_function_body);
4967
4968 LLVMSetFunctionCallConv(main_function, convention);
4969 for (unsigned i = 0; i < args->arg_count; ++i) {
4970 LLVMValueRef P = LLVMGetParam(main_function, i);
4971
4972 if (args->args[i].file != AC_ARG_SGPR)
4973 continue;
4974
4975 ac_add_function_attr(ctx->context, main_function, i + 1, AC_FUNC_ATTR_INREG);
4976
4977 if (LLVMGetTypeKind(LLVMTypeOf(P)) == LLVMPointerTypeKind) {
4978 ac_add_function_attr(ctx->context, main_function, i + 1, AC_FUNC_ATTR_NOALIAS);
4979 ac_add_attr_dereferenceable(P, UINT64_MAX);
4980 }
4981 }
4982
4983 ctx->main_function = main_function;
4984
4985 if (LLVM_VERSION_MAJOR >= 11) {
4986 /* Enable denormals for FP16 and FP64: */
4987 LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math",
4988 "ieee,ieee");
4989 /* Disable denormals for FP32: */
4990 LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math-f32",
4991 "preserve-sign,preserve-sign");
4992 }
4993 return main_function;
4994 }
4995
4996 void ac_build_s_endpgm(struct ac_llvm_context *ctx)
4997 {
4998 LLVMTypeRef calltype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
4999 LLVMValueRef code = LLVMConstInlineAsm(calltype, "s_endpgm", "", true, false);
5000 LLVMBuildCall(ctx->builder, code, NULL, 0, "");
5001 }
5002
5003 LLVMValueRef ac_prefix_bitcount(struct ac_llvm_context *ctx,
5004 LLVMValueRef mask, LLVMValueRef index)
5005 {
5006 LLVMBuilderRef builder = ctx->builder;
5007 LLVMTypeRef type = LLVMTypeOf(mask);
5008
5009 LLVMValueRef bit = LLVMBuildShl(builder, LLVMConstInt(type, 1, 0),
5010 LLVMBuildZExt(builder, index, type, ""), "");
5011 LLVMValueRef prefix_bits = LLVMBuildSub(builder, bit, LLVMConstInt(type, 1, 0), "");
5012 LLVMValueRef prefix_mask = LLVMBuildAnd(builder, mask, prefix_bits, "");
5013 return ac_build_bit_count(ctx, prefix_mask);
5014 }
5015
5016 /* Compute the prefix sum of the "mask" bit array with 128 elements (bits). */
5017 LLVMValueRef ac_prefix_bitcount_2x64(struct ac_llvm_context *ctx,
5018 LLVMValueRef mask[2], LLVMValueRef index)
5019 {
5020 LLVMBuilderRef builder = ctx->builder;
5021 #if 0
5022 /* Reference version using i128. */
5023 LLVMValueRef input_mask =
5024 LLVMBuildBitCast(builder, ac_build_gather_values(ctx, mask, 2), ctx->i128, "");
5025
5026 return ac_prefix_bitcount(ctx, input_mask, index);
5027 #else
5028 /* Optimized version using 2 64-bit masks. */
5029 LLVMValueRef is_hi, is_0, c64, c128, all_bits;
5030 LLVMValueRef prefix_mask[2], shift[2], mask_bcnt0, prefix_bcnt[2];
5031
5032 /* Compute the 128-bit prefix mask. */
5033 c64 = LLVMConstInt(ctx->i32, 64, 0);
5034 c128 = LLVMConstInt(ctx->i32, 128, 0);
5035 all_bits = LLVMConstInt(ctx->i64, UINT64_MAX, 0);
5036 /* The first index that can have non-zero high bits in the prefix mask is 65. */
5037 is_hi = LLVMBuildICmp(builder, LLVMIntUGT, index, c64, "");
5038 is_0 = LLVMBuildICmp(builder, LLVMIntEQ, index, ctx->i32_0, "");
5039 mask_bcnt0 = ac_build_bit_count(ctx, mask[0]);
5040
5041 for (unsigned i = 0; i < 2; i++) {
5042 shift[i] = LLVMBuildSub(builder, i ? c128 : c64, index, "");
5043 /* For i==0, index==0, the right shift by 64 doesn't give the desired result,
5044 * so we handle it by the is_0 select.
5045 * For i==1, index==64, same story, so we handle it by the last is_hi select.
5046 * For i==0, index==64, we shift by 0, which is what we want.
5047 */
5048 prefix_mask[i] = LLVMBuildLShr(builder, all_bits,
5049 LLVMBuildZExt(builder, shift[i], ctx->i64, ""), "");
5050 prefix_mask[i] = LLVMBuildAnd(builder, mask[i], prefix_mask[i], "");
5051 prefix_bcnt[i] = ac_build_bit_count(ctx, prefix_mask[i]);
5052 }
5053
5054 prefix_bcnt[0] = LLVMBuildSelect(builder, is_0, ctx->i32_0, prefix_bcnt[0], "");
5055 prefix_bcnt[0] = LLVMBuildSelect(builder, is_hi, mask_bcnt0, prefix_bcnt[0], "");
5056 prefix_bcnt[1] = LLVMBuildSelect(builder, is_hi, prefix_bcnt[1], ctx->i32_0, "");
5057
5058 return LLVMBuildAdd(builder, prefix_bcnt[0], prefix_bcnt[1], "");
5059 #endif
5060 }
5061
5062 /**
5063 * Convert triangle strip indices to triangle indices. This is used to decompose
5064 * triangle strips into triangles.
5065 */
5066 void ac_build_triangle_strip_indices_to_triangle(struct ac_llvm_context *ctx,
5067 LLVMValueRef is_odd,
5068 LLVMValueRef flatshade_first,
5069 LLVMValueRef index[3])
5070 {
5071 LLVMBuilderRef builder = ctx->builder;
5072 LLVMValueRef out[3];
5073
5074 /* We need to change the vertex order for odd triangles to get correct
5075 * front/back facing by swapping 2 vertex indices, but we also have to
5076 * keep the provoking vertex in the same place.
5077 *
5078 * If the first vertex is provoking, swap index 1 and 2.
5079 * If the last vertex is provoking, swap index 0 and 1.
5080 */
5081 out[0] = LLVMBuildSelect(builder, flatshade_first,
5082 index[0],
5083 LLVMBuildSelect(builder, is_odd,
5084 index[1], index[0], ""), "");
5085 out[1] = LLVMBuildSelect(builder, flatshade_first,
5086 LLVMBuildSelect(builder, is_odd,
5087 index[2], index[1], ""),
5088 LLVMBuildSelect(builder, is_odd,
5089 index[0], index[1], ""), "");
5090 out[2] = LLVMBuildSelect(builder, flatshade_first,
5091 LLVMBuildSelect(builder, is_odd,
5092 index[1], index[2], ""),
5093 index[2], "");
5094 memcpy(index, out, sizeof(out));
5095 }