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ac/nir: support v2f16 derivatives
[mesa.git] / src / amd / llvm / ac_llvm_build.c
1 /*
2 * Copyright 2014 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the
6 * "Software"), to deal in the Software without restriction, including
7 * without limitation the rights to use, copy, modify, merge, publish,
8 * distribute, sub license, and/or sell copies of the Software, and to
9 * permit persons to whom the Software is furnished to do so, subject to
10 * the following conditions:
11 *
12 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
13 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
15 * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
16 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
17 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
18 * USE OR OTHER DEALINGS IN THE SOFTWARE.
19 *
20 * The above copyright notice and this permission notice (including the
21 * next paragraph) shall be included in all copies or substantial portions
22 * of the Software.
23 *
24 */
25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
26 #include "ac_llvm_build.h"
27
28 #include <llvm-c/Core.h>
29 #include <llvm/Config/llvm-config.h>
30
31 #include "c11/threads.h"
32
33 #include <assert.h>
34 #include <stdio.h>
35
36 #include "ac_llvm_util.h"
37 #include "ac_shader_util.h"
38 #include "ac_exp_param.h"
39 #include "util/bitscan.h"
40 #include "util/macros.h"
41 #include "util/u_atomic.h"
42 #include "util/u_math.h"
43 #include "sid.h"
44
45 #include "shader_enums.h"
46
47 #define AC_LLVM_INITIAL_CF_DEPTH 4
48
49 /* Data for if/else/endif and bgnloop/endloop control flow structures.
50 */
51 struct ac_llvm_flow {
52 /* Loop exit or next part of if/else/endif. */
53 LLVMBasicBlockRef next_block;
54 LLVMBasicBlockRef loop_entry_block;
55 };
56
57 /* Initialize module-independent parts of the context.
58 *
59 * The caller is responsible for initializing ctx::module and ctx::builder.
60 */
61 void
62 ac_llvm_context_init(struct ac_llvm_context *ctx,
63 struct ac_llvm_compiler *compiler,
64 enum chip_class chip_class, enum radeon_family family,
65 enum ac_float_mode float_mode, unsigned wave_size,
66 unsigned ballot_mask_bits)
67 {
68 ctx->context = LLVMContextCreate();
69
70 ctx->chip_class = chip_class;
71 ctx->family = family;
72 ctx->wave_size = wave_size;
73 ctx->ballot_mask_bits = ballot_mask_bits;
74 ctx->float_mode = float_mode;
75 ctx->module = ac_create_module(wave_size == 32 ? compiler->tm_wave32
76 : compiler->tm,
77 ctx->context);
78 ctx->builder = ac_create_builder(ctx->context, float_mode);
79
80 ctx->voidt = LLVMVoidTypeInContext(ctx->context);
81 ctx->i1 = LLVMInt1TypeInContext(ctx->context);
82 ctx->i8 = LLVMInt8TypeInContext(ctx->context);
83 ctx->i16 = LLVMIntTypeInContext(ctx->context, 16);
84 ctx->i32 = LLVMIntTypeInContext(ctx->context, 32);
85 ctx->i64 = LLVMIntTypeInContext(ctx->context, 64);
86 ctx->i128 = LLVMIntTypeInContext(ctx->context, 128);
87 ctx->intptr = ctx->i32;
88 ctx->f16 = LLVMHalfTypeInContext(ctx->context);
89 ctx->f32 = LLVMFloatTypeInContext(ctx->context);
90 ctx->f64 = LLVMDoubleTypeInContext(ctx->context);
91 ctx->v2i16 = LLVMVectorType(ctx->i16, 2);
92 ctx->v4i16 = LLVMVectorType(ctx->i16, 4);
93 ctx->v2f16 = LLVMVectorType(ctx->f16, 2);
94 ctx->v4f16 = LLVMVectorType(ctx->f16, 4);
95 ctx->v2i32 = LLVMVectorType(ctx->i32, 2);
96 ctx->v3i32 = LLVMVectorType(ctx->i32, 3);
97 ctx->v4i32 = LLVMVectorType(ctx->i32, 4);
98 ctx->v2f32 = LLVMVectorType(ctx->f32, 2);
99 ctx->v3f32 = LLVMVectorType(ctx->f32, 3);
100 ctx->v4f32 = LLVMVectorType(ctx->f32, 4);
101 ctx->v8i32 = LLVMVectorType(ctx->i32, 8);
102 ctx->iN_wavemask = LLVMIntTypeInContext(ctx->context, ctx->wave_size);
103 ctx->iN_ballotmask = LLVMIntTypeInContext(ctx->context, ballot_mask_bits);
104
105 ctx->i8_0 = LLVMConstInt(ctx->i8, 0, false);
106 ctx->i8_1 = LLVMConstInt(ctx->i8, 1, false);
107 ctx->i16_0 = LLVMConstInt(ctx->i16, 0, false);
108 ctx->i16_1 = LLVMConstInt(ctx->i16, 1, false);
109 ctx->i32_0 = LLVMConstInt(ctx->i32, 0, false);
110 ctx->i32_1 = LLVMConstInt(ctx->i32, 1, false);
111 ctx->i64_0 = LLVMConstInt(ctx->i64, 0, false);
112 ctx->i64_1 = LLVMConstInt(ctx->i64, 1, false);
113 ctx->i128_0 = LLVMConstInt(ctx->i128, 0, false);
114 ctx->i128_1 = LLVMConstInt(ctx->i128, 1, false);
115 ctx->f16_0 = LLVMConstReal(ctx->f16, 0.0);
116 ctx->f16_1 = LLVMConstReal(ctx->f16, 1.0);
117 ctx->f32_0 = LLVMConstReal(ctx->f32, 0.0);
118 ctx->f32_1 = LLVMConstReal(ctx->f32, 1.0);
119 ctx->f64_0 = LLVMConstReal(ctx->f64, 0.0);
120 ctx->f64_1 = LLVMConstReal(ctx->f64, 1.0);
121
122 ctx->i1false = LLVMConstInt(ctx->i1, 0, false);
123 ctx->i1true = LLVMConstInt(ctx->i1, 1, false);
124
125 ctx->range_md_kind = LLVMGetMDKindIDInContext(ctx->context,
126 "range", 5);
127
128 ctx->invariant_load_md_kind = LLVMGetMDKindIDInContext(ctx->context,
129 "invariant.load", 14);
130
131 ctx->uniform_md_kind = LLVMGetMDKindIDInContext(ctx->context,
132 "amdgpu.uniform", 14);
133
134 ctx->empty_md = LLVMMDNodeInContext(ctx->context, NULL, 0);
135 ctx->flow = calloc(1, sizeof(*ctx->flow));
136 }
137
138 void
139 ac_llvm_context_dispose(struct ac_llvm_context *ctx)
140 {
141 free(ctx->flow->stack);
142 free(ctx->flow);
143 ctx->flow = NULL;
144 }
145
146 int
147 ac_get_llvm_num_components(LLVMValueRef value)
148 {
149 LLVMTypeRef type = LLVMTypeOf(value);
150 unsigned num_components = LLVMGetTypeKind(type) == LLVMVectorTypeKind
151 ? LLVMGetVectorSize(type)
152 : 1;
153 return num_components;
154 }
155
156 LLVMValueRef
157 ac_llvm_extract_elem(struct ac_llvm_context *ac,
158 LLVMValueRef value,
159 int index)
160 {
161 if (LLVMGetTypeKind(LLVMTypeOf(value)) != LLVMVectorTypeKind) {
162 assert(index == 0);
163 return value;
164 }
165
166 return LLVMBuildExtractElement(ac->builder, value,
167 LLVMConstInt(ac->i32, index, false), "");
168 }
169
170 int
171 ac_get_elem_bits(struct ac_llvm_context *ctx, LLVMTypeRef type)
172 {
173 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind)
174 type = LLVMGetElementType(type);
175
176 if (LLVMGetTypeKind(type) == LLVMIntegerTypeKind)
177 return LLVMGetIntTypeWidth(type);
178
179 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind) {
180 if (LLVMGetPointerAddressSpace(type) == AC_ADDR_SPACE_LDS)
181 return 32;
182 }
183
184 if (type == ctx->f16)
185 return 16;
186 if (type == ctx->f32)
187 return 32;
188 if (type == ctx->f64)
189 return 64;
190
191 unreachable("Unhandled type kind in get_elem_bits");
192 }
193
194 unsigned
195 ac_get_type_size(LLVMTypeRef type)
196 {
197 LLVMTypeKind kind = LLVMGetTypeKind(type);
198
199 switch (kind) {
200 case LLVMIntegerTypeKind:
201 return LLVMGetIntTypeWidth(type) / 8;
202 case LLVMHalfTypeKind:
203 return 2;
204 case LLVMFloatTypeKind:
205 return 4;
206 case LLVMDoubleTypeKind:
207 return 8;
208 case LLVMPointerTypeKind:
209 if (LLVMGetPointerAddressSpace(type) == AC_ADDR_SPACE_CONST_32BIT)
210 return 4;
211 return 8;
212 case LLVMVectorTypeKind:
213 return LLVMGetVectorSize(type) *
214 ac_get_type_size(LLVMGetElementType(type));
215 case LLVMArrayTypeKind:
216 return LLVMGetArrayLength(type) *
217 ac_get_type_size(LLVMGetElementType(type));
218 default:
219 assert(0);
220 return 0;
221 }
222 }
223
224 static LLVMTypeRef to_integer_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
225 {
226 if (t == ctx->i8)
227 return ctx->i8;
228 else if (t == ctx->f16 || t == ctx->i16)
229 return ctx->i16;
230 else if (t == ctx->f32 || t == ctx->i32)
231 return ctx->i32;
232 else if (t == ctx->f64 || t == ctx->i64)
233 return ctx->i64;
234 else
235 unreachable("Unhandled integer size");
236 }
237
238 LLVMTypeRef
239 ac_to_integer_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
240 {
241 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
242 LLVMTypeRef elem_type = LLVMGetElementType(t);
243 return LLVMVectorType(to_integer_type_scalar(ctx, elem_type),
244 LLVMGetVectorSize(t));
245 }
246 if (LLVMGetTypeKind(t) == LLVMPointerTypeKind) {
247 switch (LLVMGetPointerAddressSpace(t)) {
248 case AC_ADDR_SPACE_GLOBAL:
249 return ctx->i64;
250 case AC_ADDR_SPACE_CONST_32BIT:
251 case AC_ADDR_SPACE_LDS:
252 return ctx->i32;
253 default:
254 unreachable("unhandled address space");
255 }
256 }
257 return to_integer_type_scalar(ctx, t);
258 }
259
260 LLVMValueRef
261 ac_to_integer(struct ac_llvm_context *ctx, LLVMValueRef v)
262 {
263 LLVMTypeRef type = LLVMTypeOf(v);
264 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind) {
265 return LLVMBuildPtrToInt(ctx->builder, v, ac_to_integer_type(ctx, type), "");
266 }
267 return LLVMBuildBitCast(ctx->builder, v, ac_to_integer_type(ctx, type), "");
268 }
269
270 LLVMValueRef
271 ac_to_integer_or_pointer(struct ac_llvm_context *ctx, LLVMValueRef v)
272 {
273 LLVMTypeRef type = LLVMTypeOf(v);
274 if (LLVMGetTypeKind(type) == LLVMPointerTypeKind)
275 return v;
276 return ac_to_integer(ctx, v);
277 }
278
279 static LLVMTypeRef to_float_type_scalar(struct ac_llvm_context *ctx, LLVMTypeRef t)
280 {
281 if (t == ctx->i8)
282 return ctx->i8;
283 else if (t == ctx->i16 || t == ctx->f16)
284 return ctx->f16;
285 else if (t == ctx->i32 || t == ctx->f32)
286 return ctx->f32;
287 else if (t == ctx->i64 || t == ctx->f64)
288 return ctx->f64;
289 else
290 unreachable("Unhandled float size");
291 }
292
293 LLVMTypeRef
294 ac_to_float_type(struct ac_llvm_context *ctx, LLVMTypeRef t)
295 {
296 if (LLVMGetTypeKind(t) == LLVMVectorTypeKind) {
297 LLVMTypeRef elem_type = LLVMGetElementType(t);
298 return LLVMVectorType(to_float_type_scalar(ctx, elem_type),
299 LLVMGetVectorSize(t));
300 }
301 return to_float_type_scalar(ctx, t);
302 }
303
304 LLVMValueRef
305 ac_to_float(struct ac_llvm_context *ctx, LLVMValueRef v)
306 {
307 LLVMTypeRef type = LLVMTypeOf(v);
308 return LLVMBuildBitCast(ctx->builder, v, ac_to_float_type(ctx, type), "");
309 }
310
311
312 LLVMValueRef
313 ac_build_intrinsic(struct ac_llvm_context *ctx, const char *name,
314 LLVMTypeRef return_type, LLVMValueRef *params,
315 unsigned param_count, unsigned attrib_mask)
316 {
317 LLVMValueRef function, call;
318 bool set_callsite_attrs = !(attrib_mask & AC_FUNC_ATTR_LEGACY);
319
320 function = LLVMGetNamedFunction(ctx->module, name);
321 if (!function) {
322 LLVMTypeRef param_types[32], function_type;
323 unsigned i;
324
325 assert(param_count <= 32);
326
327 for (i = 0; i < param_count; ++i) {
328 assert(params[i]);
329 param_types[i] = LLVMTypeOf(params[i]);
330 }
331 function_type =
332 LLVMFunctionType(return_type, param_types, param_count, 0);
333 function = LLVMAddFunction(ctx->module, name, function_type);
334
335 LLVMSetFunctionCallConv(function, LLVMCCallConv);
336 LLVMSetLinkage(function, LLVMExternalLinkage);
337
338 if (!set_callsite_attrs)
339 ac_add_func_attributes(ctx->context, function, attrib_mask);
340 }
341
342 call = LLVMBuildCall(ctx->builder, function, params, param_count, "");
343 if (set_callsite_attrs)
344 ac_add_func_attributes(ctx->context, call, attrib_mask);
345 return call;
346 }
347
348 /**
349 * Given the i32 or vNi32 \p type, generate the textual name (e.g. for use with
350 * intrinsic names).
351 */
352 void ac_build_type_name_for_intr(LLVMTypeRef type, char *buf, unsigned bufsize)
353 {
354 LLVMTypeRef elem_type = type;
355
356 assert(bufsize >= 8);
357
358 if (LLVMGetTypeKind(type) == LLVMVectorTypeKind) {
359 int ret = snprintf(buf, bufsize, "v%u",
360 LLVMGetVectorSize(type));
361 if (ret < 0) {
362 char *type_name = LLVMPrintTypeToString(type);
363 fprintf(stderr, "Error building type name for: %s\n",
364 type_name);
365 LLVMDisposeMessage(type_name);
366 return;
367 }
368 elem_type = LLVMGetElementType(type);
369 buf += ret;
370 bufsize -= ret;
371 }
372 switch (LLVMGetTypeKind(elem_type)) {
373 default: break;
374 case LLVMIntegerTypeKind:
375 snprintf(buf, bufsize, "i%d", LLVMGetIntTypeWidth(elem_type));
376 break;
377 case LLVMHalfTypeKind:
378 snprintf(buf, bufsize, "f16");
379 break;
380 case LLVMFloatTypeKind:
381 snprintf(buf, bufsize, "f32");
382 break;
383 case LLVMDoubleTypeKind:
384 snprintf(buf, bufsize, "f64");
385 break;
386 }
387 }
388
389 /**
390 * Helper function that builds an LLVM IR PHI node and immediately adds
391 * incoming edges.
392 */
393 LLVMValueRef
394 ac_build_phi(struct ac_llvm_context *ctx, LLVMTypeRef type,
395 unsigned count_incoming, LLVMValueRef *values,
396 LLVMBasicBlockRef *blocks)
397 {
398 LLVMValueRef phi = LLVMBuildPhi(ctx->builder, type, "");
399 LLVMAddIncoming(phi, values, blocks, count_incoming);
400 return phi;
401 }
402
403 void ac_build_s_barrier(struct ac_llvm_context *ctx)
404 {
405 ac_build_intrinsic(ctx, "llvm.amdgcn.s.barrier", ctx->voidt, NULL,
406 0, AC_FUNC_ATTR_CONVERGENT);
407 }
408
409 /* Prevent optimizations (at least of memory accesses) across the current
410 * point in the program by emitting empty inline assembly that is marked as
411 * having side effects.
412 *
413 * Optionally, a value can be passed through the inline assembly to prevent
414 * LLVM from hoisting calls to ReadNone functions.
415 */
416 void
417 ac_build_optimization_barrier(struct ac_llvm_context *ctx,
418 LLVMValueRef *pvgpr)
419 {
420 static int counter = 0;
421
422 LLVMBuilderRef builder = ctx->builder;
423 char code[16];
424
425 snprintf(code, sizeof(code), "; %d", p_atomic_inc_return(&counter));
426
427 if (!pvgpr) {
428 LLVMTypeRef ftype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
429 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "", true, false);
430 LLVMBuildCall(builder, inlineasm, NULL, 0, "");
431 } else {
432 LLVMTypeRef ftype = LLVMFunctionType(ctx->i32, &ctx->i32, 1, false);
433 LLVMValueRef inlineasm = LLVMConstInlineAsm(ftype, code, "=v,0", true, false);
434 LLVMTypeRef type = LLVMTypeOf(*pvgpr);
435 unsigned bitsize = ac_get_elem_bits(ctx, type);
436 LLVMValueRef vgpr = *pvgpr;
437 LLVMTypeRef vgpr_type;
438 unsigned vgpr_size;
439 LLVMValueRef vgpr0;
440
441 if (bitsize < 32)
442 vgpr = LLVMBuildZExt(ctx->builder, vgpr, ctx->i32, "");
443
444 vgpr_type = LLVMTypeOf(vgpr);
445 vgpr_size = ac_get_type_size(vgpr_type);
446
447 assert(vgpr_size % 4 == 0);
448
449 vgpr = LLVMBuildBitCast(builder, vgpr, LLVMVectorType(ctx->i32, vgpr_size / 4), "");
450 vgpr0 = LLVMBuildExtractElement(builder, vgpr, ctx->i32_0, "");
451 vgpr0 = LLVMBuildCall(builder, inlineasm, &vgpr0, 1, "");
452 vgpr = LLVMBuildInsertElement(builder, vgpr, vgpr0, ctx->i32_0, "");
453 vgpr = LLVMBuildBitCast(builder, vgpr, vgpr_type, "");
454
455 if (bitsize < 32)
456 vgpr = LLVMBuildTrunc(builder, vgpr, type, "");
457
458 *pvgpr = vgpr;
459 }
460 }
461
462 LLVMValueRef
463 ac_build_shader_clock(struct ac_llvm_context *ctx, nir_scope scope)
464 {
465 const char *name = scope == NIR_SCOPE_DEVICE ? "llvm.amdgcn.s.memrealtime" : "llvm.amdgcn.s.memtime";
466 LLVMValueRef tmp = ac_build_intrinsic(ctx, name, ctx->i64, NULL, 0, 0);
467 return LLVMBuildBitCast(ctx->builder, tmp, ctx->v2i32, "");
468 }
469
470 LLVMValueRef
471 ac_build_ballot(struct ac_llvm_context *ctx,
472 LLVMValueRef value)
473 {
474 const char *name;
475
476 if (LLVM_VERSION_MAJOR >= 9) {
477 if (ctx->wave_size == 64)
478 name = "llvm.amdgcn.icmp.i64.i32";
479 else
480 name = "llvm.amdgcn.icmp.i32.i32";
481 } else {
482 name = "llvm.amdgcn.icmp.i32";
483 }
484 LLVMValueRef args[3] = {
485 value,
486 ctx->i32_0,
487 LLVMConstInt(ctx->i32, LLVMIntNE, 0)
488 };
489
490 /* We currently have no other way to prevent LLVM from lifting the icmp
491 * calls to a dominating basic block.
492 */
493 ac_build_optimization_barrier(ctx, &args[0]);
494
495 args[0] = ac_to_integer(ctx, args[0]);
496
497 return ac_build_intrinsic(ctx, name, ctx->iN_wavemask, args, 3,
498 AC_FUNC_ATTR_NOUNWIND |
499 AC_FUNC_ATTR_READNONE |
500 AC_FUNC_ATTR_CONVERGENT);
501 }
502
503 LLVMValueRef ac_get_i1_sgpr_mask(struct ac_llvm_context *ctx,
504 LLVMValueRef value)
505 {
506 const char *name;
507
508 if (LLVM_VERSION_MAJOR >= 9) {
509 if (ctx->wave_size == 64)
510 name = "llvm.amdgcn.icmp.i64.i1";
511 else
512 name = "llvm.amdgcn.icmp.i32.i1";
513 } else {
514 name = "llvm.amdgcn.icmp.i1";
515 }
516 LLVMValueRef args[3] = {
517 value,
518 ctx->i1false,
519 LLVMConstInt(ctx->i32, LLVMIntNE, 0),
520 };
521
522 return ac_build_intrinsic(ctx, name, ctx->iN_wavemask, args, 3,
523 AC_FUNC_ATTR_NOUNWIND |
524 AC_FUNC_ATTR_READNONE |
525 AC_FUNC_ATTR_CONVERGENT);
526 }
527
528 LLVMValueRef
529 ac_build_vote_all(struct ac_llvm_context *ctx, LLVMValueRef value)
530 {
531 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
532 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
533 return LLVMBuildICmp(ctx->builder, LLVMIntEQ, vote_set, active_set, "");
534 }
535
536 LLVMValueRef
537 ac_build_vote_any(struct ac_llvm_context *ctx, LLVMValueRef value)
538 {
539 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
540 return LLVMBuildICmp(ctx->builder, LLVMIntNE, vote_set,
541 LLVMConstInt(ctx->iN_wavemask, 0, 0), "");
542 }
543
544 LLVMValueRef
545 ac_build_vote_eq(struct ac_llvm_context *ctx, LLVMValueRef value)
546 {
547 LLVMValueRef active_set = ac_build_ballot(ctx, ctx->i32_1);
548 LLVMValueRef vote_set = ac_build_ballot(ctx, value);
549
550 LLVMValueRef all = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
551 vote_set, active_set, "");
552 LLVMValueRef none = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
553 vote_set,
554 LLVMConstInt(ctx->iN_wavemask, 0, 0), "");
555 return LLVMBuildOr(ctx->builder, all, none, "");
556 }
557
558 LLVMValueRef
559 ac_build_varying_gather_values(struct ac_llvm_context *ctx, LLVMValueRef *values,
560 unsigned value_count, unsigned component)
561 {
562 LLVMValueRef vec = NULL;
563
564 if (value_count == 1) {
565 return values[component];
566 } else if (!value_count)
567 unreachable("value_count is 0");
568
569 for (unsigned i = component; i < value_count + component; i++) {
570 LLVMValueRef value = values[i];
571
572 if (i == component)
573 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
574 LLVMValueRef index = LLVMConstInt(ctx->i32, i - component, false);
575 vec = LLVMBuildInsertElement(ctx->builder, vec, value, index, "");
576 }
577 return vec;
578 }
579
580 LLVMValueRef
581 ac_build_gather_values_extended(struct ac_llvm_context *ctx,
582 LLVMValueRef *values,
583 unsigned value_count,
584 unsigned value_stride,
585 bool load,
586 bool always_vector)
587 {
588 LLVMBuilderRef builder = ctx->builder;
589 LLVMValueRef vec = NULL;
590 unsigned i;
591
592 if (value_count == 1 && !always_vector) {
593 if (load)
594 return LLVMBuildLoad(builder, values[0], "");
595 return values[0];
596 } else if (!value_count)
597 unreachable("value_count is 0");
598
599 for (i = 0; i < value_count; i++) {
600 LLVMValueRef value = values[i * value_stride];
601 if (load)
602 value = LLVMBuildLoad(builder, value, "");
603
604 if (!i)
605 vec = LLVMGetUndef( LLVMVectorType(LLVMTypeOf(value), value_count));
606 LLVMValueRef index = LLVMConstInt(ctx->i32, i, false);
607 vec = LLVMBuildInsertElement(builder, vec, value, index, "");
608 }
609 return vec;
610 }
611
612 LLVMValueRef
613 ac_build_gather_values(struct ac_llvm_context *ctx,
614 LLVMValueRef *values,
615 unsigned value_count)
616 {
617 return ac_build_gather_values_extended(ctx, values, value_count, 1, false, false);
618 }
619
620 /* Expand a scalar or vector to <dst_channels x type> by filling the remaining
621 * channels with undef. Extract at most src_channels components from the input.
622 */
623 static LLVMValueRef
624 ac_build_expand(struct ac_llvm_context *ctx,
625 LLVMValueRef value,
626 unsigned src_channels,
627 unsigned dst_channels)
628 {
629 LLVMTypeRef elemtype;
630 LLVMValueRef chan[dst_channels];
631
632 if (LLVMGetTypeKind(LLVMTypeOf(value)) == LLVMVectorTypeKind) {
633 unsigned vec_size = LLVMGetVectorSize(LLVMTypeOf(value));
634
635 if (src_channels == dst_channels && vec_size == dst_channels)
636 return value;
637
638 src_channels = MIN2(src_channels, vec_size);
639
640 for (unsigned i = 0; i < src_channels; i++)
641 chan[i] = ac_llvm_extract_elem(ctx, value, i);
642
643 elemtype = LLVMGetElementType(LLVMTypeOf(value));
644 } else {
645 if (src_channels) {
646 assert(src_channels == 1);
647 chan[0] = value;
648 }
649 elemtype = LLVMTypeOf(value);
650 }
651
652 for (unsigned i = src_channels; i < dst_channels; i++)
653 chan[i] = LLVMGetUndef(elemtype);
654
655 return ac_build_gather_values(ctx, chan, dst_channels);
656 }
657
658 /* Extract components [start, start + channels) from a vector.
659 */
660 LLVMValueRef
661 ac_extract_components(struct ac_llvm_context *ctx,
662 LLVMValueRef value,
663 unsigned start,
664 unsigned channels)
665 {
666 LLVMValueRef chan[channels];
667
668 for (unsigned i = 0; i < channels; i++)
669 chan[i] = ac_llvm_extract_elem(ctx, value, i + start);
670
671 return ac_build_gather_values(ctx, chan, channels);
672 }
673
674 /* Expand a scalar or vector to <4 x type> by filling the remaining channels
675 * with undef. Extract at most num_channels components from the input.
676 */
677 LLVMValueRef ac_build_expand_to_vec4(struct ac_llvm_context *ctx,
678 LLVMValueRef value,
679 unsigned num_channels)
680 {
681 return ac_build_expand(ctx, value, num_channels, 4);
682 }
683
684 LLVMValueRef ac_build_round(struct ac_llvm_context *ctx, LLVMValueRef value)
685 {
686 unsigned type_size = ac_get_type_size(LLVMTypeOf(value));
687 const char *name;
688
689 if (type_size == 2)
690 name = "llvm.rint.f16";
691 else if (type_size == 4)
692 name = "llvm.rint.f32";
693 else
694 name = "llvm.rint.f64";
695
696 return ac_build_intrinsic(ctx, name, LLVMTypeOf(value), &value, 1,
697 AC_FUNC_ATTR_READNONE);
698 }
699
700 LLVMValueRef
701 ac_build_fdiv(struct ac_llvm_context *ctx,
702 LLVMValueRef num,
703 LLVMValueRef den)
704 {
705 unsigned type_size = ac_get_type_size(LLVMTypeOf(den));
706 const char *name;
707
708 if (type_size == 2)
709 name = "llvm.amdgcn.rcp.f16";
710 else if (type_size == 4)
711 name = "llvm.amdgcn.rcp.f32";
712 else
713 name = "llvm.amdgcn.rcp.f64";
714
715 LLVMValueRef rcp = ac_build_intrinsic(ctx, name, LLVMTypeOf(den),
716 &den, 1, AC_FUNC_ATTR_READNONE);
717
718 return LLVMBuildFMul(ctx->builder, num, rcp, "");
719 }
720
721 /* See fast_idiv_by_const.h. */
722 /* Set: increment = util_fast_udiv_info::increment ? multiplier : 0; */
723 LLVMValueRef ac_build_fast_udiv(struct ac_llvm_context *ctx,
724 LLVMValueRef num,
725 LLVMValueRef multiplier,
726 LLVMValueRef pre_shift,
727 LLVMValueRef post_shift,
728 LLVMValueRef increment)
729 {
730 LLVMBuilderRef builder = ctx->builder;
731
732 num = LLVMBuildLShr(builder, num, pre_shift, "");
733 num = LLVMBuildMul(builder,
734 LLVMBuildZExt(builder, num, ctx->i64, ""),
735 LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
736 num = LLVMBuildAdd(builder, num,
737 LLVMBuildZExt(builder, increment, ctx->i64, ""), "");
738 num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
739 num = LLVMBuildTrunc(builder, num, ctx->i32, "");
740 return LLVMBuildLShr(builder, num, post_shift, "");
741 }
742
743 /* See fast_idiv_by_const.h. */
744 /* If num != UINT_MAX, this more efficient version can be used. */
745 /* Set: increment = util_fast_udiv_info::increment; */
746 LLVMValueRef ac_build_fast_udiv_nuw(struct ac_llvm_context *ctx,
747 LLVMValueRef num,
748 LLVMValueRef multiplier,
749 LLVMValueRef pre_shift,
750 LLVMValueRef post_shift,
751 LLVMValueRef increment)
752 {
753 LLVMBuilderRef builder = ctx->builder;
754
755 num = LLVMBuildLShr(builder, num, pre_shift, "");
756 num = LLVMBuildNUWAdd(builder, num, increment, "");
757 num = LLVMBuildMul(builder,
758 LLVMBuildZExt(builder, num, ctx->i64, ""),
759 LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
760 num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
761 num = LLVMBuildTrunc(builder, num, ctx->i32, "");
762 return LLVMBuildLShr(builder, num, post_shift, "");
763 }
764
765 /* See fast_idiv_by_const.h. */
766 /* Both operands must fit in 31 bits and the divisor must not be 1. */
767 LLVMValueRef ac_build_fast_udiv_u31_d_not_one(struct ac_llvm_context *ctx,
768 LLVMValueRef num,
769 LLVMValueRef multiplier,
770 LLVMValueRef post_shift)
771 {
772 LLVMBuilderRef builder = ctx->builder;
773
774 num = LLVMBuildMul(builder,
775 LLVMBuildZExt(builder, num, ctx->i64, ""),
776 LLVMBuildZExt(builder, multiplier, ctx->i64, ""), "");
777 num = LLVMBuildLShr(builder, num, LLVMConstInt(ctx->i64, 32, 0), "");
778 num = LLVMBuildTrunc(builder, num, ctx->i32, "");
779 return LLVMBuildLShr(builder, num, post_shift, "");
780 }
781
782 /* Coordinates for cube map selection. sc, tc, and ma are as in Table 8.27
783 * of the OpenGL 4.5 (Compatibility Profile) specification, except ma is
784 * already multiplied by two. id is the cube face number.
785 */
786 struct cube_selection_coords {
787 LLVMValueRef stc[2];
788 LLVMValueRef ma;
789 LLVMValueRef id;
790 };
791
792 static void
793 build_cube_intrinsic(struct ac_llvm_context *ctx,
794 LLVMValueRef in[3],
795 struct cube_selection_coords *out)
796 {
797 LLVMTypeRef f32 = ctx->f32;
798
799 out->stc[1] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubetc",
800 f32, in, 3, AC_FUNC_ATTR_READNONE);
801 out->stc[0] = ac_build_intrinsic(ctx, "llvm.amdgcn.cubesc",
802 f32, in, 3, AC_FUNC_ATTR_READNONE);
803 out->ma = ac_build_intrinsic(ctx, "llvm.amdgcn.cubema",
804 f32, in, 3, AC_FUNC_ATTR_READNONE);
805 out->id = ac_build_intrinsic(ctx, "llvm.amdgcn.cubeid",
806 f32, in, 3, AC_FUNC_ATTR_READNONE);
807 }
808
809 /**
810 * Build a manual selection sequence for cube face sc/tc coordinates and
811 * major axis vector (multiplied by 2 for consistency) for the given
812 * vec3 \p coords, for the face implied by \p selcoords.
813 *
814 * For the major axis, we always adjust the sign to be in the direction of
815 * selcoords.ma; i.e., a positive out_ma means that coords is pointed towards
816 * the selcoords major axis.
817 */
818 static void build_cube_select(struct ac_llvm_context *ctx,
819 const struct cube_selection_coords *selcoords,
820 const LLVMValueRef *coords,
821 LLVMValueRef *out_st,
822 LLVMValueRef *out_ma)
823 {
824 LLVMBuilderRef builder = ctx->builder;
825 LLVMTypeRef f32 = LLVMTypeOf(coords[0]);
826 LLVMValueRef is_ma_positive;
827 LLVMValueRef sgn_ma;
828 LLVMValueRef is_ma_z, is_not_ma_z;
829 LLVMValueRef is_ma_y;
830 LLVMValueRef is_ma_x;
831 LLVMValueRef sgn;
832 LLVMValueRef tmp;
833
834 is_ma_positive = LLVMBuildFCmp(builder, LLVMRealUGE,
835 selcoords->ma, LLVMConstReal(f32, 0.0), "");
836 sgn_ma = LLVMBuildSelect(builder, is_ma_positive,
837 LLVMConstReal(f32, 1.0), LLVMConstReal(f32, -1.0), "");
838
839 is_ma_z = LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 4.0), "");
840 is_not_ma_z = LLVMBuildNot(builder, is_ma_z, "");
841 is_ma_y = LLVMBuildAnd(builder, is_not_ma_z,
842 LLVMBuildFCmp(builder, LLVMRealUGE, selcoords->id, LLVMConstReal(f32, 2.0), ""), "");
843 is_ma_x = LLVMBuildAnd(builder, is_not_ma_z, LLVMBuildNot(builder, is_ma_y, ""), "");
844
845 /* Select sc */
846 tmp = LLVMBuildSelect(builder, is_ma_x, coords[2], coords[0], "");
847 sgn = LLVMBuildSelect(builder, is_ma_y, LLVMConstReal(f32, 1.0),
848 LLVMBuildSelect(builder, is_ma_z, sgn_ma,
849 LLVMBuildFNeg(builder, sgn_ma, ""), ""), "");
850 out_st[0] = LLVMBuildFMul(builder, tmp, sgn, "");
851
852 /* Select tc */
853 tmp = LLVMBuildSelect(builder, is_ma_y, coords[2], coords[1], "");
854 sgn = LLVMBuildSelect(builder, is_ma_y, sgn_ma,
855 LLVMConstReal(f32, -1.0), "");
856 out_st[1] = LLVMBuildFMul(builder, tmp, sgn, "");
857
858 /* Select ma */
859 tmp = LLVMBuildSelect(builder, is_ma_z, coords[2],
860 LLVMBuildSelect(builder, is_ma_y, coords[1], coords[0], ""), "");
861 tmp = ac_build_intrinsic(ctx, "llvm.fabs.f32",
862 ctx->f32, &tmp, 1, AC_FUNC_ATTR_READNONE);
863 *out_ma = LLVMBuildFMul(builder, tmp, LLVMConstReal(f32, 2.0), "");
864 }
865
866 void
867 ac_prepare_cube_coords(struct ac_llvm_context *ctx,
868 bool is_deriv, bool is_array, bool is_lod,
869 LLVMValueRef *coords_arg,
870 LLVMValueRef *derivs_arg)
871 {
872
873 LLVMBuilderRef builder = ctx->builder;
874 struct cube_selection_coords selcoords;
875 LLVMValueRef coords[3];
876 LLVMValueRef invma;
877
878 if (is_array && !is_lod) {
879 LLVMValueRef tmp = ac_build_round(ctx, coords_arg[3]);
880
881 /* Section 8.9 (Texture Functions) of the GLSL 4.50 spec says:
882 *
883 * "For Array forms, the array layer used will be
884 *
885 * max(0, min(d−1, floor(layer+0.5)))
886 *
887 * where d is the depth of the texture array and layer
888 * comes from the component indicated in the tables below.
889 * Workaroudn for an issue where the layer is taken from a
890 * helper invocation which happens to fall on a different
891 * layer due to extrapolation."
892 *
893 * GFX8 and earlier attempt to implement this in hardware by
894 * clamping the value of coords[2] = (8 * layer) + face.
895 * Unfortunately, this means that the we end up with the wrong
896 * face when clamping occurs.
897 *
898 * Clamp the layer earlier to work around the issue.
899 */
900 if (ctx->chip_class <= GFX8) {
901 LLVMValueRef ge0;
902 ge0 = LLVMBuildFCmp(builder, LLVMRealOGE, tmp, ctx->f32_0, "");
903 tmp = LLVMBuildSelect(builder, ge0, tmp, ctx->f32_0, "");
904 }
905
906 coords_arg[3] = tmp;
907 }
908
909 build_cube_intrinsic(ctx, coords_arg, &selcoords);
910
911 invma = ac_build_intrinsic(ctx, "llvm.fabs.f32",
912 ctx->f32, &selcoords.ma, 1, AC_FUNC_ATTR_READNONE);
913 invma = ac_build_fdiv(ctx, LLVMConstReal(ctx->f32, 1.0), invma);
914
915 for (int i = 0; i < 2; ++i)
916 coords[i] = LLVMBuildFMul(builder, selcoords.stc[i], invma, "");
917
918 coords[2] = selcoords.id;
919
920 if (is_deriv && derivs_arg) {
921 LLVMValueRef derivs[4];
922 int axis;
923
924 /* Convert cube derivatives to 2D derivatives. */
925 for (axis = 0; axis < 2; axis++) {
926 LLVMValueRef deriv_st[2];
927 LLVMValueRef deriv_ma;
928
929 /* Transform the derivative alongside the texture
930 * coordinate. Mathematically, the correct formula is
931 * as follows. Assume we're projecting onto the +Z face
932 * and denote by dx/dh the derivative of the (original)
933 * X texture coordinate with respect to horizontal
934 * window coordinates. The projection onto the +Z face
935 * plane is:
936 *
937 * f(x,z) = x/z
938 *
939 * Then df/dh = df/dx * dx/dh + df/dz * dz/dh
940 * = 1/z * dx/dh - x/z * 1/z * dz/dh.
941 *
942 * This motivatives the implementation below.
943 *
944 * Whether this actually gives the expected results for
945 * apps that might feed in derivatives obtained via
946 * finite differences is anyone's guess. The OpenGL spec
947 * seems awfully quiet about how textureGrad for cube
948 * maps should be handled.
949 */
950 build_cube_select(ctx, &selcoords, &derivs_arg[axis * 3],
951 deriv_st, &deriv_ma);
952
953 deriv_ma = LLVMBuildFMul(builder, deriv_ma, invma, "");
954
955 for (int i = 0; i < 2; ++i)
956 derivs[axis * 2 + i] =
957 LLVMBuildFSub(builder,
958 LLVMBuildFMul(builder, deriv_st[i], invma, ""),
959 LLVMBuildFMul(builder, deriv_ma, coords[i], ""), "");
960 }
961
962 memcpy(derivs_arg, derivs, sizeof(derivs));
963 }
964
965 /* Shift the texture coordinate. This must be applied after the
966 * derivative calculation.
967 */
968 for (int i = 0; i < 2; ++i)
969 coords[i] = LLVMBuildFAdd(builder, coords[i], LLVMConstReal(ctx->f32, 1.5), "");
970
971 if (is_array) {
972 /* for cube arrays coord.z = coord.w(array_index) * 8 + face */
973 /* coords_arg.w component - array_index for cube arrays */
974 coords[2] = ac_build_fmad(ctx, coords_arg[3], LLVMConstReal(ctx->f32, 8.0), coords[2]);
975 }
976
977 memcpy(coords_arg, coords, sizeof(coords));
978 }
979
980
981 LLVMValueRef
982 ac_build_fs_interp(struct ac_llvm_context *ctx,
983 LLVMValueRef llvm_chan,
984 LLVMValueRef attr_number,
985 LLVMValueRef params,
986 LLVMValueRef i,
987 LLVMValueRef j)
988 {
989 LLVMValueRef args[5];
990 LLVMValueRef p1;
991
992 args[0] = i;
993 args[1] = llvm_chan;
994 args[2] = attr_number;
995 args[3] = params;
996
997 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1",
998 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
999
1000 args[0] = p1;
1001 args[1] = j;
1002 args[2] = llvm_chan;
1003 args[3] = attr_number;
1004 args[4] = params;
1005
1006 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2",
1007 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
1008 }
1009
1010 LLVMValueRef
1011 ac_build_fs_interp_f16(struct ac_llvm_context *ctx,
1012 LLVMValueRef llvm_chan,
1013 LLVMValueRef attr_number,
1014 LLVMValueRef params,
1015 LLVMValueRef i,
1016 LLVMValueRef j)
1017 {
1018 LLVMValueRef args[6];
1019 LLVMValueRef p1;
1020
1021 args[0] = i;
1022 args[1] = llvm_chan;
1023 args[2] = attr_number;
1024 args[3] = ctx->i1false;
1025 args[4] = params;
1026
1027 p1 = ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p1.f16",
1028 ctx->f32, args, 5, AC_FUNC_ATTR_READNONE);
1029
1030 args[0] = p1;
1031 args[1] = j;
1032 args[2] = llvm_chan;
1033 args[3] = attr_number;
1034 args[4] = ctx->i1false;
1035 args[5] = params;
1036
1037 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.p2.f16",
1038 ctx->f16, args, 6, AC_FUNC_ATTR_READNONE);
1039 }
1040
1041 LLVMValueRef
1042 ac_build_fs_interp_mov(struct ac_llvm_context *ctx,
1043 LLVMValueRef parameter,
1044 LLVMValueRef llvm_chan,
1045 LLVMValueRef attr_number,
1046 LLVMValueRef params)
1047 {
1048 LLVMValueRef args[4];
1049
1050 args[0] = parameter;
1051 args[1] = llvm_chan;
1052 args[2] = attr_number;
1053 args[3] = params;
1054
1055 return ac_build_intrinsic(ctx, "llvm.amdgcn.interp.mov",
1056 ctx->f32, args, 4, AC_FUNC_ATTR_READNONE);
1057 }
1058
1059 LLVMValueRef
1060 ac_build_gep_ptr(struct ac_llvm_context *ctx,
1061 LLVMValueRef base_ptr,
1062 LLVMValueRef index)
1063 {
1064 return LLVMBuildGEP(ctx->builder, base_ptr, &index, 1, "");
1065 }
1066
1067 LLVMValueRef
1068 ac_build_gep0(struct ac_llvm_context *ctx,
1069 LLVMValueRef base_ptr,
1070 LLVMValueRef index)
1071 {
1072 LLVMValueRef indices[2] = {
1073 ctx->i32_0,
1074 index,
1075 };
1076 return LLVMBuildGEP(ctx->builder, base_ptr, indices, 2, "");
1077 }
1078
1079 LLVMValueRef ac_build_pointer_add(struct ac_llvm_context *ctx, LLVMValueRef ptr,
1080 LLVMValueRef index)
1081 {
1082 return LLVMBuildPointerCast(ctx->builder,
1083 LLVMBuildGEP(ctx->builder, ptr, &index, 1, ""),
1084 LLVMTypeOf(ptr), "");
1085 }
1086
1087 void
1088 ac_build_indexed_store(struct ac_llvm_context *ctx,
1089 LLVMValueRef base_ptr, LLVMValueRef index,
1090 LLVMValueRef value)
1091 {
1092 LLVMBuildStore(ctx->builder, value,
1093 ac_build_gep0(ctx, base_ptr, index));
1094 }
1095
1096 /**
1097 * Build an LLVM bytecode indexed load using LLVMBuildGEP + LLVMBuildLoad.
1098 * It's equivalent to doing a load from &base_ptr[index].
1099 *
1100 * \param base_ptr Where the array starts.
1101 * \param index The element index into the array.
1102 * \param uniform Whether the base_ptr and index can be assumed to be
1103 * dynamically uniform (i.e. load to an SGPR)
1104 * \param invariant Whether the load is invariant (no other opcodes affect it)
1105 * \param no_unsigned_wraparound
1106 * For all possible re-associations and re-distributions of an expression
1107 * "base_ptr + index * elemsize" into "addr + offset" (excluding GEPs
1108 * without inbounds in base_ptr), this parameter is true if "addr + offset"
1109 * does not result in an unsigned integer wraparound. This is used for
1110 * optimal code generation of 32-bit pointer arithmetic.
1111 *
1112 * For example, a 32-bit immediate offset that causes a 32-bit unsigned
1113 * integer wraparound can't be an imm offset in s_load_dword, because
1114 * the instruction performs "addr + offset" in 64 bits.
1115 *
1116 * Expected usage for bindless textures by chaining GEPs:
1117 * // possible unsigned wraparound, don't use InBounds:
1118 * ptr1 = LLVMBuildGEP(base_ptr, index);
1119 * image = load(ptr1); // becomes "s_load ptr1, 0"
1120 *
1121 * ptr2 = LLVMBuildInBoundsGEP(ptr1, 32 / elemsize);
1122 * sampler = load(ptr2); // becomes "s_load ptr1, 32" thanks to InBounds
1123 */
1124 static LLVMValueRef
1125 ac_build_load_custom(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
1126 LLVMValueRef index, bool uniform, bool invariant,
1127 bool no_unsigned_wraparound)
1128 {
1129 LLVMValueRef pointer, result;
1130
1131 if (no_unsigned_wraparound &&
1132 LLVMGetPointerAddressSpace(LLVMTypeOf(base_ptr)) == AC_ADDR_SPACE_CONST_32BIT)
1133 pointer = LLVMBuildInBoundsGEP(ctx->builder, base_ptr, &index, 1, "");
1134 else
1135 pointer = LLVMBuildGEP(ctx->builder, base_ptr, &index, 1, "");
1136
1137 if (uniform)
1138 LLVMSetMetadata(pointer, ctx->uniform_md_kind, ctx->empty_md);
1139 result = LLVMBuildLoad(ctx->builder, pointer, "");
1140 if (invariant)
1141 LLVMSetMetadata(result, ctx->invariant_load_md_kind, ctx->empty_md);
1142 return result;
1143 }
1144
1145 LLVMValueRef ac_build_load(struct ac_llvm_context *ctx, LLVMValueRef base_ptr,
1146 LLVMValueRef index)
1147 {
1148 return ac_build_load_custom(ctx, base_ptr, index, false, false, false);
1149 }
1150
1151 LLVMValueRef ac_build_load_invariant(struct ac_llvm_context *ctx,
1152 LLVMValueRef base_ptr, LLVMValueRef index)
1153 {
1154 return ac_build_load_custom(ctx, base_ptr, index, false, true, false);
1155 }
1156
1157 /* This assumes that there is no unsigned integer wraparound during the address
1158 * computation, excluding all GEPs within base_ptr. */
1159 LLVMValueRef ac_build_load_to_sgpr(struct ac_llvm_context *ctx,
1160 LLVMValueRef base_ptr, LLVMValueRef index)
1161 {
1162 return ac_build_load_custom(ctx, base_ptr, index, true, true, true);
1163 }
1164
1165 /* See ac_build_load_custom() documentation. */
1166 LLVMValueRef ac_build_load_to_sgpr_uint_wraparound(struct ac_llvm_context *ctx,
1167 LLVMValueRef base_ptr, LLVMValueRef index)
1168 {
1169 return ac_build_load_custom(ctx, base_ptr, index, true, true, false);
1170 }
1171
1172 static unsigned get_load_cache_policy(struct ac_llvm_context *ctx,
1173 unsigned cache_policy)
1174 {
1175 return cache_policy |
1176 (ctx->chip_class >= GFX10 && cache_policy & ac_glc ? ac_dlc : 0);
1177 }
1178
1179 static void
1180 ac_build_buffer_store_common(struct ac_llvm_context *ctx,
1181 LLVMValueRef rsrc,
1182 LLVMValueRef data,
1183 LLVMValueRef vindex,
1184 LLVMValueRef voffset,
1185 LLVMValueRef soffset,
1186 unsigned cache_policy,
1187 bool use_format,
1188 bool structurized)
1189 {
1190 LLVMValueRef args[6];
1191 int idx = 0;
1192 args[idx++] = data;
1193 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1194 if (structurized)
1195 args[idx++] = vindex ? vindex : ctx->i32_0;
1196 args[idx++] = voffset ? voffset : ctx->i32_0;
1197 args[idx++] = soffset ? soffset : ctx->i32_0;
1198 args[idx++] = LLVMConstInt(ctx->i32, cache_policy, 0);
1199 const char *indexing_kind = structurized ? "struct" : "raw";
1200 char name[256], type_name[8];
1201
1202 ac_build_type_name_for_intr(LLVMTypeOf(data), type_name, sizeof(type_name));
1203
1204 if (use_format) {
1205 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.store.format.%s",
1206 indexing_kind, type_name);
1207 } else {
1208 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.store.%s",
1209 indexing_kind, type_name);
1210 }
1211
1212 ac_build_intrinsic(ctx, name, ctx->voidt, args, idx,
1213 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY);
1214 }
1215
1216 void
1217 ac_build_buffer_store_format(struct ac_llvm_context *ctx,
1218 LLVMValueRef rsrc,
1219 LLVMValueRef data,
1220 LLVMValueRef vindex,
1221 LLVMValueRef voffset,
1222 unsigned cache_policy)
1223 {
1224 ac_build_buffer_store_common(ctx, rsrc, data, vindex, voffset, NULL,
1225 cache_policy, true, true);
1226 }
1227
1228 /* TBUFFER_STORE_FORMAT_{X,XY,XYZ,XYZW} <- the suffix is selected by num_channels=1..4.
1229 * The type of vdata must be one of i32 (num_channels=1), v2i32 (num_channels=2),
1230 * or v4i32 (num_channels=3,4).
1231 */
1232 void
1233 ac_build_buffer_store_dword(struct ac_llvm_context *ctx,
1234 LLVMValueRef rsrc,
1235 LLVMValueRef vdata,
1236 unsigned num_channels,
1237 LLVMValueRef voffset,
1238 LLVMValueRef soffset,
1239 unsigned inst_offset,
1240 unsigned cache_policy)
1241 {
1242 /* Split 3 channel stores, because only LLVM 9+ support 3-channel
1243 * intrinsics. */
1244 if (num_channels == 3 && !ac_has_vec3_support(ctx->chip_class, false)) {
1245 LLVMValueRef v[3], v01;
1246
1247 for (int i = 0; i < 3; i++) {
1248 v[i] = LLVMBuildExtractElement(ctx->builder, vdata,
1249 LLVMConstInt(ctx->i32, i, 0), "");
1250 }
1251 v01 = ac_build_gather_values(ctx, v, 2);
1252
1253 ac_build_buffer_store_dword(ctx, rsrc, v01, 2, voffset,
1254 soffset, inst_offset, cache_policy);
1255 ac_build_buffer_store_dword(ctx, rsrc, v[2], 1, voffset,
1256 soffset, inst_offset + 8,
1257 cache_policy);
1258 return;
1259 }
1260
1261 /* SWIZZLE_ENABLE requires that soffset isn't folded into voffset
1262 * (voffset is swizzled, but soffset isn't swizzled).
1263 * llvm.amdgcn.buffer.store doesn't have a separate soffset parameter.
1264 */
1265 if (!(cache_policy & ac_swizzled)) {
1266 LLVMValueRef offset = soffset;
1267
1268 if (inst_offset)
1269 offset = LLVMBuildAdd(ctx->builder, offset,
1270 LLVMConstInt(ctx->i32, inst_offset, 0), "");
1271
1272 ac_build_buffer_store_common(ctx, rsrc, ac_to_float(ctx, vdata),
1273 ctx->i32_0, voffset, offset,
1274 cache_policy, false, false);
1275 return;
1276 }
1277
1278 static const unsigned dfmts[] = {
1279 V_008F0C_BUF_DATA_FORMAT_32,
1280 V_008F0C_BUF_DATA_FORMAT_32_32,
1281 V_008F0C_BUF_DATA_FORMAT_32_32_32,
1282 V_008F0C_BUF_DATA_FORMAT_32_32_32_32
1283 };
1284 unsigned dfmt = dfmts[num_channels - 1];
1285 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1286 LLVMValueRef immoffset = LLVMConstInt(ctx->i32, inst_offset, 0);
1287
1288 ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
1289 immoffset, num_channels, dfmt, nfmt, cache_policy);
1290 }
1291
1292 static LLVMValueRef
1293 ac_build_buffer_load_common(struct ac_llvm_context *ctx,
1294 LLVMValueRef rsrc,
1295 LLVMValueRef vindex,
1296 LLVMValueRef voffset,
1297 LLVMValueRef soffset,
1298 unsigned num_channels,
1299 LLVMTypeRef channel_type,
1300 unsigned cache_policy,
1301 bool can_speculate,
1302 bool use_format,
1303 bool structurized)
1304 {
1305 LLVMValueRef args[5];
1306 int idx = 0;
1307 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1308 if (structurized)
1309 args[idx++] = vindex ? vindex : ctx->i32_0;
1310 args[idx++] = voffset ? voffset : ctx->i32_0;
1311 args[idx++] = soffset ? soffset : ctx->i32_0;
1312 args[idx++] = LLVMConstInt(ctx->i32, get_load_cache_policy(ctx, cache_policy), 0);
1313 unsigned func = !ac_has_vec3_support(ctx->chip_class, use_format) && num_channels == 3 ? 4 : num_channels;
1314 const char *indexing_kind = structurized ? "struct" : "raw";
1315 char name[256], type_name[8];
1316
1317 /* D16 is only supported on gfx8+ */
1318 assert((channel_type != ctx->f16 && channel_type != ctx->i16) ||
1319 ctx->chip_class >= GFX8);
1320
1321 LLVMTypeRef type = func > 1 ? LLVMVectorType(channel_type, func) : channel_type;
1322 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1323
1324 if (use_format) {
1325 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.load.format.%s",
1326 indexing_kind, type_name);
1327 } else {
1328 snprintf(name, sizeof(name), "llvm.amdgcn.%s.buffer.load.%s",
1329 indexing_kind, type_name);
1330 }
1331
1332 return ac_build_intrinsic(ctx, name, type, args, idx,
1333 ac_get_load_intr_attribs(can_speculate));
1334 }
1335
1336 LLVMValueRef
1337 ac_build_buffer_load(struct ac_llvm_context *ctx,
1338 LLVMValueRef rsrc,
1339 int num_channels,
1340 LLVMValueRef vindex,
1341 LLVMValueRef voffset,
1342 LLVMValueRef soffset,
1343 unsigned inst_offset,
1344 unsigned cache_policy,
1345 bool can_speculate,
1346 bool allow_smem)
1347 {
1348 LLVMValueRef offset = LLVMConstInt(ctx->i32, inst_offset, 0);
1349 if (voffset)
1350 offset = LLVMBuildAdd(ctx->builder, offset, voffset, "");
1351 if (soffset)
1352 offset = LLVMBuildAdd(ctx->builder, offset, soffset, "");
1353
1354 if (allow_smem && !(cache_policy & ac_slc) &&
1355 (!(cache_policy & ac_glc) || ctx->chip_class >= GFX8)) {
1356 assert(vindex == NULL);
1357
1358 LLVMValueRef result[8];
1359
1360 for (int i = 0; i < num_channels; i++) {
1361 if (i) {
1362 offset = LLVMBuildAdd(ctx->builder, offset,
1363 LLVMConstInt(ctx->i32, 4, 0), "");
1364 }
1365 LLVMValueRef args[3] = {
1366 rsrc,
1367 offset,
1368 LLVMConstInt(ctx->i32, get_load_cache_policy(ctx, cache_policy), 0),
1369 };
1370 result[i] = ac_build_intrinsic(ctx,
1371 "llvm.amdgcn.s.buffer.load.f32",
1372 ctx->f32, args, 3,
1373 AC_FUNC_ATTR_READNONE);
1374 }
1375 if (num_channels == 1)
1376 return result[0];
1377
1378 if (num_channels == 3 && !ac_has_vec3_support(ctx->chip_class, false))
1379 result[num_channels++] = LLVMGetUndef(ctx->f32);
1380 return ac_build_gather_values(ctx, result, num_channels);
1381 }
1382
1383 return ac_build_buffer_load_common(ctx, rsrc, vindex,
1384 offset, ctx->i32_0,
1385 num_channels, ctx->f32,
1386 cache_policy,
1387 can_speculate, false, false);
1388 }
1389
1390 LLVMValueRef ac_build_buffer_load_format(struct ac_llvm_context *ctx,
1391 LLVMValueRef rsrc,
1392 LLVMValueRef vindex,
1393 LLVMValueRef voffset,
1394 unsigned num_channels,
1395 unsigned cache_policy,
1396 bool can_speculate,
1397 bool d16)
1398 {
1399 return ac_build_buffer_load_common(ctx, rsrc, vindex, voffset,
1400 ctx->i32_0, num_channels,
1401 d16 ? ctx->f16 : ctx->f32,
1402 cache_policy, can_speculate,
1403 true, true);
1404 }
1405
1406 static LLVMValueRef
1407 ac_build_tbuffer_load(struct ac_llvm_context *ctx,
1408 LLVMValueRef rsrc,
1409 LLVMValueRef vindex,
1410 LLVMValueRef voffset,
1411 LLVMValueRef soffset,
1412 LLVMValueRef immoffset,
1413 unsigned num_channels,
1414 unsigned dfmt,
1415 unsigned nfmt,
1416 unsigned cache_policy,
1417 bool can_speculate,
1418 bool structurized)
1419 {
1420 voffset = LLVMBuildAdd(ctx->builder, voffset, immoffset, "");
1421
1422 LLVMValueRef args[6];
1423 int idx = 0;
1424 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1425 if (structurized)
1426 args[idx++] = vindex ? vindex : ctx->i32_0;
1427 args[idx++] = voffset ? voffset : ctx->i32_0;
1428 args[idx++] = soffset ? soffset : ctx->i32_0;
1429 args[idx++] = LLVMConstInt(ctx->i32, ac_get_tbuffer_format(ctx->chip_class, dfmt, nfmt), 0);
1430 args[idx++] = LLVMConstInt(ctx->i32, get_load_cache_policy(ctx, cache_policy), 0);
1431 unsigned func = !ac_has_vec3_support(ctx->chip_class, true) && num_channels == 3 ? 4 : num_channels;
1432 const char *indexing_kind = structurized ? "struct" : "raw";
1433 char name[256], type_name[8];
1434
1435 LLVMTypeRef type = func > 1 ? LLVMVectorType(ctx->i32, func) : ctx->i32;
1436 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1437
1438 snprintf(name, sizeof(name), "llvm.amdgcn.%s.tbuffer.load.%s",
1439 indexing_kind, type_name);
1440
1441 return ac_build_intrinsic(ctx, name, type, args, idx,
1442 ac_get_load_intr_attribs(can_speculate));
1443 }
1444
1445 LLVMValueRef
1446 ac_build_struct_tbuffer_load(struct ac_llvm_context *ctx,
1447 LLVMValueRef rsrc,
1448 LLVMValueRef vindex,
1449 LLVMValueRef voffset,
1450 LLVMValueRef soffset,
1451 LLVMValueRef immoffset,
1452 unsigned num_channels,
1453 unsigned dfmt,
1454 unsigned nfmt,
1455 unsigned cache_policy,
1456 bool can_speculate)
1457 {
1458 return ac_build_tbuffer_load(ctx, rsrc, vindex, voffset, soffset,
1459 immoffset, num_channels, dfmt, nfmt,
1460 cache_policy, can_speculate, true);
1461 }
1462
1463 LLVMValueRef
1464 ac_build_raw_tbuffer_load(struct ac_llvm_context *ctx,
1465 LLVMValueRef rsrc,
1466 LLVMValueRef voffset,
1467 LLVMValueRef soffset,
1468 LLVMValueRef immoffset,
1469 unsigned num_channels,
1470 unsigned dfmt,
1471 unsigned nfmt,
1472 unsigned cache_policy,
1473 bool can_speculate)
1474 {
1475 return ac_build_tbuffer_load(ctx, rsrc, NULL, voffset, soffset,
1476 immoffset, num_channels, dfmt, nfmt,
1477 cache_policy, can_speculate, false);
1478 }
1479
1480 LLVMValueRef
1481 ac_build_tbuffer_load_short(struct ac_llvm_context *ctx,
1482 LLVMValueRef rsrc,
1483 LLVMValueRef voffset,
1484 LLVMValueRef soffset,
1485 LLVMValueRef immoffset,
1486 unsigned cache_policy)
1487 {
1488 LLVMValueRef res;
1489
1490 if (LLVM_VERSION_MAJOR >= 9) {
1491 voffset = LLVMBuildAdd(ctx->builder, voffset, immoffset, "");
1492
1493 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1494 res = ac_build_buffer_load_common(ctx, rsrc, NULL,
1495 voffset, soffset,
1496 1, ctx->i16, cache_policy,
1497 false, false, false);
1498 } else {
1499 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_16;
1500 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1501
1502 res = ac_build_raw_tbuffer_load(ctx, rsrc, voffset, soffset,
1503 immoffset, 1, dfmt, nfmt, cache_policy,
1504 false);
1505
1506 res = LLVMBuildTrunc(ctx->builder, res, ctx->i16, "");
1507 }
1508
1509 return res;
1510 }
1511
1512 LLVMValueRef
1513 ac_build_tbuffer_load_byte(struct ac_llvm_context *ctx,
1514 LLVMValueRef rsrc,
1515 LLVMValueRef voffset,
1516 LLVMValueRef soffset,
1517 LLVMValueRef immoffset,
1518 unsigned cache_policy)
1519 {
1520 LLVMValueRef res;
1521
1522 if (LLVM_VERSION_MAJOR >= 9) {
1523 voffset = LLVMBuildAdd(ctx->builder, voffset, immoffset, "");
1524
1525 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1526 res = ac_build_buffer_load_common(ctx, rsrc, NULL,
1527 voffset, soffset,
1528 1, ctx->i8, cache_policy,
1529 false, false, false);
1530 } else {
1531 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_8;
1532 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1533
1534 res = ac_build_raw_tbuffer_load(ctx, rsrc, voffset, soffset,
1535 immoffset, 1, dfmt, nfmt, cache_policy,
1536 false);
1537
1538 res = LLVMBuildTrunc(ctx->builder, res, ctx->i8, "");
1539 }
1540
1541 return res;
1542 }
1543
1544 /**
1545 * Convert an 11- or 10-bit unsigned floating point number to an f32.
1546 *
1547 * The input exponent is expected to be biased analogous to IEEE-754, i.e. by
1548 * 2^(exp_bits-1) - 1 (as defined in OpenGL and other graphics APIs).
1549 */
1550 static LLVMValueRef
1551 ac_ufN_to_float(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned exp_bits, unsigned mant_bits)
1552 {
1553 assert(LLVMTypeOf(src) == ctx->i32);
1554
1555 LLVMValueRef tmp;
1556 LLVMValueRef mantissa;
1557 mantissa = LLVMBuildAnd(ctx->builder, src, LLVMConstInt(ctx->i32, (1 << mant_bits) - 1, false), "");
1558
1559 /* Converting normal numbers is just a shift + correcting the exponent bias */
1560 unsigned normal_shift = 23 - mant_bits;
1561 unsigned bias_shift = 127 - ((1 << (exp_bits - 1)) - 1);
1562 LLVMValueRef shifted, normal;
1563
1564 shifted = LLVMBuildShl(ctx->builder, src, LLVMConstInt(ctx->i32, normal_shift, false), "");
1565 normal = LLVMBuildAdd(ctx->builder, shifted, LLVMConstInt(ctx->i32, bias_shift << 23, false), "");
1566
1567 /* Converting nan/inf numbers is the same, but with a different exponent update */
1568 LLVMValueRef naninf;
1569 naninf = LLVMBuildOr(ctx->builder, normal, LLVMConstInt(ctx->i32, 0xff << 23, false), "");
1570
1571 /* Converting denormals is the complex case: determine the leading zeros of the
1572 * mantissa to obtain the correct shift for the mantissa and exponent correction.
1573 */
1574 LLVMValueRef denormal;
1575 LLVMValueRef params[2] = {
1576 mantissa,
1577 ctx->i1true, /* result can be undef when arg is 0 */
1578 };
1579 LLVMValueRef ctlz = ac_build_intrinsic(ctx, "llvm.ctlz.i32", ctx->i32,
1580 params, 2, AC_FUNC_ATTR_READNONE);
1581
1582 /* Shift such that the leading 1 ends up as the LSB of the exponent field. */
1583 tmp = LLVMBuildSub(ctx->builder, ctlz, LLVMConstInt(ctx->i32, 8, false), "");
1584 denormal = LLVMBuildShl(ctx->builder, mantissa, tmp, "");
1585
1586 unsigned denormal_exp = bias_shift + (32 - mant_bits) - 1;
1587 tmp = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, denormal_exp, false), ctlz, "");
1588 tmp = LLVMBuildShl(ctx->builder, tmp, LLVMConstInt(ctx->i32, 23, false), "");
1589 denormal = LLVMBuildAdd(ctx->builder, denormal, tmp, "");
1590
1591 /* Select the final result. */
1592 LLVMValueRef result;
1593
1594 tmp = LLVMBuildICmp(ctx->builder, LLVMIntUGE, src,
1595 LLVMConstInt(ctx->i32, ((1 << exp_bits) - 1) << mant_bits, false), "");
1596 result = LLVMBuildSelect(ctx->builder, tmp, naninf, normal, "");
1597
1598 tmp = LLVMBuildICmp(ctx->builder, LLVMIntUGE, src,
1599 LLVMConstInt(ctx->i32, 1 << mant_bits, false), "");
1600 result = LLVMBuildSelect(ctx->builder, tmp, result, denormal, "");
1601
1602 tmp = LLVMBuildICmp(ctx->builder, LLVMIntNE, src, ctx->i32_0, "");
1603 result = LLVMBuildSelect(ctx->builder, tmp, result, ctx->i32_0, "");
1604
1605 return ac_to_float(ctx, result);
1606 }
1607
1608 /**
1609 * Generate a fully general open coded buffer format fetch with all required
1610 * fixups suitable for vertex fetch, using non-format buffer loads.
1611 *
1612 * Some combinations of argument values have special interpretations:
1613 * - size = 8 bytes, format = fixed indicates PIPE_FORMAT_R11G11B10_FLOAT
1614 * - size = 8 bytes, format != {float,fixed} indicates a 2_10_10_10 data format
1615 *
1616 * \param log_size log(size of channel in bytes)
1617 * \param num_channels number of channels (1 to 4)
1618 * \param format AC_FETCH_FORMAT_xxx value
1619 * \param reverse whether XYZ channels are reversed
1620 * \param known_aligned whether the source is known to be aligned to hardware's
1621 * effective element size for loading the given format
1622 * (note: this means dword alignment for 8_8_8_8, 16_16, etc.)
1623 * \param rsrc buffer resource descriptor
1624 * \return the resulting vector of floats or integers bitcast to <4 x i32>
1625 */
1626 LLVMValueRef
1627 ac_build_opencoded_load_format(struct ac_llvm_context *ctx,
1628 unsigned log_size,
1629 unsigned num_channels,
1630 unsigned format,
1631 bool reverse,
1632 bool known_aligned,
1633 LLVMValueRef rsrc,
1634 LLVMValueRef vindex,
1635 LLVMValueRef voffset,
1636 LLVMValueRef soffset,
1637 unsigned cache_policy,
1638 bool can_speculate)
1639 {
1640 LLVMValueRef tmp;
1641 unsigned load_log_size = log_size;
1642 unsigned load_num_channels = num_channels;
1643 if (log_size == 3) {
1644 load_log_size = 2;
1645 if (format == AC_FETCH_FORMAT_FLOAT) {
1646 load_num_channels = 2 * num_channels;
1647 } else {
1648 load_num_channels = 1; /* 10_11_11 or 2_10_10_10 */
1649 }
1650 }
1651
1652 int log_recombine = 0;
1653 if (ctx->chip_class == GFX6 && !known_aligned) {
1654 /* Avoid alignment restrictions by loading one byte at a time. */
1655 load_num_channels <<= load_log_size;
1656 log_recombine = load_log_size;
1657 load_log_size = 0;
1658 } else if (load_num_channels == 2 || load_num_channels == 4) {
1659 log_recombine = -util_logbase2(load_num_channels);
1660 load_num_channels = 1;
1661 load_log_size += -log_recombine;
1662 }
1663
1664 assert(load_log_size >= 2 || LLVM_VERSION_MAJOR >= 9);
1665
1666 LLVMValueRef loads[32]; /* up to 32 bytes */
1667 for (unsigned i = 0; i < load_num_channels; ++i) {
1668 tmp = LLVMBuildAdd(ctx->builder, soffset,
1669 LLVMConstInt(ctx->i32, i << load_log_size, false), "");
1670 LLVMTypeRef channel_type = load_log_size == 0 ? ctx->i8 :
1671 load_log_size == 1 ? ctx->i16 : ctx->i32;
1672 unsigned num_channels = 1 << (MAX2(load_log_size, 2) - 2);
1673 loads[i] = ac_build_buffer_load_common(
1674 ctx, rsrc, vindex, voffset, tmp,
1675 num_channels, channel_type, cache_policy,
1676 can_speculate, false, true);
1677 if (load_log_size >= 2)
1678 loads[i] = ac_to_integer(ctx, loads[i]);
1679 }
1680
1681 if (log_recombine > 0) {
1682 /* Recombine bytes if necessary (GFX6 only) */
1683 LLVMTypeRef dst_type = log_recombine == 2 ? ctx->i32 : ctx->i16;
1684
1685 for (unsigned src = 0, dst = 0; src < load_num_channels; ++dst) {
1686 LLVMValueRef accum = NULL;
1687 for (unsigned i = 0; i < (1 << log_recombine); ++i, ++src) {
1688 tmp = LLVMBuildZExt(ctx->builder, loads[src], dst_type, "");
1689 if (i == 0) {
1690 accum = tmp;
1691 } else {
1692 tmp = LLVMBuildShl(ctx->builder, tmp,
1693 LLVMConstInt(dst_type, 8 * i, false), "");
1694 accum = LLVMBuildOr(ctx->builder, accum, tmp, "");
1695 }
1696 }
1697 loads[dst] = accum;
1698 }
1699 } else if (log_recombine < 0) {
1700 /* Split vectors of dwords */
1701 if (load_log_size > 2) {
1702 assert(load_num_channels == 1);
1703 LLVMValueRef loaded = loads[0];
1704 unsigned log_split = load_log_size - 2;
1705 log_recombine += log_split;
1706 load_num_channels = 1 << log_split;
1707 load_log_size = 2;
1708 for (unsigned i = 0; i < load_num_channels; ++i) {
1709 tmp = LLVMConstInt(ctx->i32, i, false);
1710 loads[i] = LLVMBuildExtractElement(ctx->builder, loaded, tmp, "");
1711 }
1712 }
1713
1714 /* Further split dwords and shorts if required */
1715 if (log_recombine < 0) {
1716 for (unsigned src = load_num_channels,
1717 dst = load_num_channels << -log_recombine;
1718 src > 0; --src) {
1719 unsigned dst_bits = 1 << (3 + load_log_size + log_recombine);
1720 LLVMTypeRef dst_type = LLVMIntTypeInContext(ctx->context, dst_bits);
1721 LLVMValueRef loaded = loads[src - 1];
1722 LLVMTypeRef loaded_type = LLVMTypeOf(loaded);
1723 for (unsigned i = 1 << -log_recombine; i > 0; --i, --dst) {
1724 tmp = LLVMConstInt(loaded_type, dst_bits * (i - 1), false);
1725 tmp = LLVMBuildLShr(ctx->builder, loaded, tmp, "");
1726 loads[dst - 1] = LLVMBuildTrunc(ctx->builder, tmp, dst_type, "");
1727 }
1728 }
1729 }
1730 }
1731
1732 if (log_size == 3) {
1733 if (format == AC_FETCH_FORMAT_FLOAT) {
1734 for (unsigned i = 0; i < num_channels; ++i) {
1735 tmp = ac_build_gather_values(ctx, &loads[2 * i], 2);
1736 loads[i] = LLVMBuildBitCast(ctx->builder, tmp, ctx->f64, "");
1737 }
1738 } else if (format == AC_FETCH_FORMAT_FIXED) {
1739 /* 10_11_11_FLOAT */
1740 LLVMValueRef data = loads[0];
1741 LLVMValueRef i32_2047 = LLVMConstInt(ctx->i32, 2047, false);
1742 LLVMValueRef r = LLVMBuildAnd(ctx->builder, data, i32_2047, "");
1743 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 11, false), "");
1744 LLVMValueRef g = LLVMBuildAnd(ctx->builder, tmp, i32_2047, "");
1745 LLVMValueRef b = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 22, false), "");
1746
1747 loads[0] = ac_to_integer(ctx, ac_ufN_to_float(ctx, r, 5, 6));
1748 loads[1] = ac_to_integer(ctx, ac_ufN_to_float(ctx, g, 5, 6));
1749 loads[2] = ac_to_integer(ctx, ac_ufN_to_float(ctx, b, 5, 5));
1750
1751 num_channels = 3;
1752 log_size = 2;
1753 format = AC_FETCH_FORMAT_FLOAT;
1754 } else {
1755 /* 2_10_10_10 data formats */
1756 LLVMValueRef data = loads[0];
1757 LLVMTypeRef i10 = LLVMIntTypeInContext(ctx->context, 10);
1758 LLVMTypeRef i2 = LLVMIntTypeInContext(ctx->context, 2);
1759 loads[0] = LLVMBuildTrunc(ctx->builder, data, i10, "");
1760 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 10, false), "");
1761 loads[1] = LLVMBuildTrunc(ctx->builder, tmp, i10, "");
1762 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 20, false), "");
1763 loads[2] = LLVMBuildTrunc(ctx->builder, tmp, i10, "");
1764 tmp = LLVMBuildLShr(ctx->builder, data, LLVMConstInt(ctx->i32, 30, false), "");
1765 loads[3] = LLVMBuildTrunc(ctx->builder, tmp, i2, "");
1766
1767 num_channels = 4;
1768 }
1769 }
1770
1771 if (format == AC_FETCH_FORMAT_FLOAT) {
1772 if (log_size != 2) {
1773 for (unsigned chan = 0; chan < num_channels; ++chan) {
1774 tmp = ac_to_float(ctx, loads[chan]);
1775 if (log_size == 3)
1776 tmp = LLVMBuildFPTrunc(ctx->builder, tmp, ctx->f32, "");
1777 else if (log_size == 1)
1778 tmp = LLVMBuildFPExt(ctx->builder, tmp, ctx->f32, "");
1779 loads[chan] = ac_to_integer(ctx, tmp);
1780 }
1781 }
1782 } else if (format == AC_FETCH_FORMAT_UINT) {
1783 if (log_size != 2) {
1784 for (unsigned chan = 0; chan < num_channels; ++chan)
1785 loads[chan] = LLVMBuildZExt(ctx->builder, loads[chan], ctx->i32, "");
1786 }
1787 } else if (format == AC_FETCH_FORMAT_SINT) {
1788 if (log_size != 2) {
1789 for (unsigned chan = 0; chan < num_channels; ++chan)
1790 loads[chan] = LLVMBuildSExt(ctx->builder, loads[chan], ctx->i32, "");
1791 }
1792 } else {
1793 bool unsign = format == AC_FETCH_FORMAT_UNORM ||
1794 format == AC_FETCH_FORMAT_USCALED ||
1795 format == AC_FETCH_FORMAT_UINT;
1796
1797 for (unsigned chan = 0; chan < num_channels; ++chan) {
1798 if (unsign) {
1799 tmp = LLVMBuildUIToFP(ctx->builder, loads[chan], ctx->f32, "");
1800 } else {
1801 tmp = LLVMBuildSIToFP(ctx->builder, loads[chan], ctx->f32, "");
1802 }
1803
1804 LLVMValueRef scale = NULL;
1805 if (format == AC_FETCH_FORMAT_FIXED) {
1806 assert(log_size == 2);
1807 scale = LLVMConstReal(ctx->f32, 1.0 / 0x10000);
1808 } else if (format == AC_FETCH_FORMAT_UNORM) {
1809 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(loads[chan]));
1810 scale = LLVMConstReal(ctx->f32, 1.0 / (((uint64_t)1 << bits) - 1));
1811 } else if (format == AC_FETCH_FORMAT_SNORM) {
1812 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(loads[chan]));
1813 scale = LLVMConstReal(ctx->f32, 1.0 / (((uint64_t)1 << (bits - 1)) - 1));
1814 }
1815 if (scale)
1816 tmp = LLVMBuildFMul(ctx->builder, tmp, scale, "");
1817
1818 if (format == AC_FETCH_FORMAT_SNORM) {
1819 /* Clamp to [-1, 1] */
1820 LLVMValueRef neg_one = LLVMConstReal(ctx->f32, -1.0);
1821 LLVMValueRef clamp =
1822 LLVMBuildFCmp(ctx->builder, LLVMRealULT, tmp, neg_one, "");
1823 tmp = LLVMBuildSelect(ctx->builder, clamp, neg_one, tmp, "");
1824 }
1825
1826 loads[chan] = ac_to_integer(ctx, tmp);
1827 }
1828 }
1829
1830 while (num_channels < 4) {
1831 if (format == AC_FETCH_FORMAT_UINT || format == AC_FETCH_FORMAT_SINT) {
1832 loads[num_channels] = num_channels == 3 ? ctx->i32_1 : ctx->i32_0;
1833 } else {
1834 loads[num_channels] = ac_to_integer(ctx, num_channels == 3 ? ctx->f32_1 : ctx->f32_0);
1835 }
1836 num_channels++;
1837 }
1838
1839 if (reverse) {
1840 tmp = loads[0];
1841 loads[0] = loads[2];
1842 loads[2] = tmp;
1843 }
1844
1845 return ac_build_gather_values(ctx, loads, 4);
1846 }
1847
1848 static void
1849 ac_build_tbuffer_store(struct ac_llvm_context *ctx,
1850 LLVMValueRef rsrc,
1851 LLVMValueRef vdata,
1852 LLVMValueRef vindex,
1853 LLVMValueRef voffset,
1854 LLVMValueRef soffset,
1855 LLVMValueRef immoffset,
1856 unsigned num_channels,
1857 unsigned dfmt,
1858 unsigned nfmt,
1859 unsigned cache_policy,
1860 bool structurized)
1861 {
1862 voffset = LLVMBuildAdd(ctx->builder, voffset ? voffset : ctx->i32_0,
1863 immoffset, "");
1864
1865 LLVMValueRef args[7];
1866 int idx = 0;
1867 args[idx++] = vdata;
1868 args[idx++] = LLVMBuildBitCast(ctx->builder, rsrc, ctx->v4i32, "");
1869 if (structurized)
1870 args[idx++] = vindex ? vindex : ctx->i32_0;
1871 args[idx++] = voffset ? voffset : ctx->i32_0;
1872 args[idx++] = soffset ? soffset : ctx->i32_0;
1873 args[idx++] = LLVMConstInt(ctx->i32, ac_get_tbuffer_format(ctx->chip_class, dfmt, nfmt), 0);
1874 args[idx++] = LLVMConstInt(ctx->i32, cache_policy, 0);
1875 unsigned func = !ac_has_vec3_support(ctx->chip_class, true) && num_channels == 3 ? 4 : num_channels;
1876 const char *indexing_kind = structurized ? "struct" : "raw";
1877 char name[256], type_name[8];
1878
1879 LLVMTypeRef type = func > 1 ? LLVMVectorType(ctx->i32, func) : ctx->i32;
1880 ac_build_type_name_for_intr(type, type_name, sizeof(type_name));
1881
1882 snprintf(name, sizeof(name), "llvm.amdgcn.%s.tbuffer.store.%s",
1883 indexing_kind, type_name);
1884
1885 ac_build_intrinsic(ctx, name, ctx->voidt, args, idx,
1886 AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY);
1887 }
1888
1889 void
1890 ac_build_struct_tbuffer_store(struct ac_llvm_context *ctx,
1891 LLVMValueRef rsrc,
1892 LLVMValueRef vdata,
1893 LLVMValueRef vindex,
1894 LLVMValueRef voffset,
1895 LLVMValueRef soffset,
1896 LLVMValueRef immoffset,
1897 unsigned num_channels,
1898 unsigned dfmt,
1899 unsigned nfmt,
1900 unsigned cache_policy)
1901 {
1902 ac_build_tbuffer_store(ctx, rsrc, vdata, vindex, voffset, soffset,
1903 immoffset, num_channels, dfmt, nfmt, cache_policy,
1904 true);
1905 }
1906
1907 void
1908 ac_build_raw_tbuffer_store(struct ac_llvm_context *ctx,
1909 LLVMValueRef rsrc,
1910 LLVMValueRef vdata,
1911 LLVMValueRef voffset,
1912 LLVMValueRef soffset,
1913 LLVMValueRef immoffset,
1914 unsigned num_channels,
1915 unsigned dfmt,
1916 unsigned nfmt,
1917 unsigned cache_policy)
1918 {
1919 ac_build_tbuffer_store(ctx, rsrc, vdata, NULL, voffset, soffset,
1920 immoffset, num_channels, dfmt, nfmt, cache_policy,
1921 false);
1922 }
1923
1924 void
1925 ac_build_tbuffer_store_short(struct ac_llvm_context *ctx,
1926 LLVMValueRef rsrc,
1927 LLVMValueRef vdata,
1928 LLVMValueRef voffset,
1929 LLVMValueRef soffset,
1930 unsigned cache_policy)
1931 {
1932 vdata = LLVMBuildBitCast(ctx->builder, vdata, ctx->i16, "");
1933
1934 if (LLVM_VERSION_MAJOR >= 9) {
1935 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1936 ac_build_buffer_store_common(ctx, rsrc, vdata, NULL,
1937 voffset, soffset, cache_policy,
1938 false, false);
1939 } else {
1940 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_16;
1941 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1942
1943 vdata = LLVMBuildZExt(ctx->builder, vdata, ctx->i32, "");
1944
1945 ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
1946 ctx->i32_0, 1, dfmt, nfmt, cache_policy);
1947 }
1948 }
1949
1950 void
1951 ac_build_tbuffer_store_byte(struct ac_llvm_context *ctx,
1952 LLVMValueRef rsrc,
1953 LLVMValueRef vdata,
1954 LLVMValueRef voffset,
1955 LLVMValueRef soffset,
1956 unsigned cache_policy)
1957 {
1958 vdata = LLVMBuildBitCast(ctx->builder, vdata, ctx->i8, "");
1959
1960 if (LLVM_VERSION_MAJOR >= 9) {
1961 /* LLVM 9+ supports i8/i16 with struct/raw intrinsics. */
1962 ac_build_buffer_store_common(ctx, rsrc, vdata, NULL,
1963 voffset, soffset, cache_policy,
1964 false, false);
1965 } else {
1966 unsigned dfmt = V_008F0C_BUF_DATA_FORMAT_8;
1967 unsigned nfmt = V_008F0C_BUF_NUM_FORMAT_UINT;
1968
1969 vdata = LLVMBuildZExt(ctx->builder, vdata, ctx->i32, "");
1970
1971 ac_build_raw_tbuffer_store(ctx, rsrc, vdata, voffset, soffset,
1972 ctx->i32_0, 1, dfmt, nfmt, cache_policy);
1973 }
1974 }
1975 /**
1976 * Set range metadata on an instruction. This can only be used on load and
1977 * call instructions. If you know an instruction can only produce the values
1978 * 0, 1, 2, you would do set_range_metadata(value, 0, 3);
1979 * \p lo is the minimum value inclusive.
1980 * \p hi is the maximum value exclusive.
1981 */
1982 static void set_range_metadata(struct ac_llvm_context *ctx,
1983 LLVMValueRef value, unsigned lo, unsigned hi)
1984 {
1985 LLVMValueRef range_md, md_args[2];
1986 LLVMTypeRef type = LLVMTypeOf(value);
1987 LLVMContextRef context = LLVMGetTypeContext(type);
1988
1989 md_args[0] = LLVMConstInt(type, lo, false);
1990 md_args[1] = LLVMConstInt(type, hi, false);
1991 range_md = LLVMMDNodeInContext(context, md_args, 2);
1992 LLVMSetMetadata(value, ctx->range_md_kind, range_md);
1993 }
1994
1995 LLVMValueRef
1996 ac_get_thread_id(struct ac_llvm_context *ctx)
1997 {
1998 LLVMValueRef tid;
1999
2000 LLVMValueRef tid_args[2];
2001 tid_args[0] = LLVMConstInt(ctx->i32, 0xffffffff, false);
2002 tid_args[1] = ctx->i32_0;
2003 tid_args[1] = ac_build_intrinsic(ctx,
2004 "llvm.amdgcn.mbcnt.lo", ctx->i32,
2005 tid_args, 2, AC_FUNC_ATTR_READNONE);
2006
2007 if (ctx->wave_size == 32) {
2008 tid = tid_args[1];
2009 } else {
2010 tid = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi",
2011 ctx->i32, tid_args,
2012 2, AC_FUNC_ATTR_READNONE);
2013 }
2014 set_range_metadata(ctx, tid, 0, ctx->wave_size);
2015 return tid;
2016 }
2017
2018 /*
2019 * AMD GCN implements derivatives using the local data store (LDS)
2020 * All writes to the LDS happen in all executing threads at
2021 * the same time. TID is the Thread ID for the current
2022 * thread and is a value between 0 and 63, representing
2023 * the thread's position in the wavefront.
2024 *
2025 * For the pixel shader threads are grouped into quads of four pixels.
2026 * The TIDs of the pixels of a quad are:
2027 *
2028 * +------+------+
2029 * |4n + 0|4n + 1|
2030 * +------+------+
2031 * |4n + 2|4n + 3|
2032 * +------+------+
2033 *
2034 * So, masking the TID with 0xfffffffc yields the TID of the top left pixel
2035 * of the quad, masking with 0xfffffffd yields the TID of the top pixel of
2036 * the current pixel's column, and masking with 0xfffffffe yields the TID
2037 * of the left pixel of the current pixel's row.
2038 *
2039 * Adding 1 yields the TID of the pixel to the right of the left pixel, and
2040 * adding 2 yields the TID of the pixel below the top pixel.
2041 */
2042 LLVMValueRef
2043 ac_build_ddxy(struct ac_llvm_context *ctx,
2044 uint32_t mask,
2045 int idx,
2046 LLVMValueRef val)
2047 {
2048 unsigned tl_lanes[4], trbl_lanes[4];
2049 char name[32], type[8];
2050 LLVMValueRef tl, trbl;
2051 LLVMTypeRef result_type;
2052 LLVMValueRef result;
2053
2054 result_type = ac_to_float_type(ctx, LLVMTypeOf(val));
2055
2056 if (result_type == ctx->f16)
2057 val = LLVMBuildZExt(ctx->builder, val, ctx->i32, "");
2058 else if (result_type == ctx->v2f16)
2059 val = LLVMBuildBitCast(ctx->builder, val, ctx->i32, "");
2060
2061 for (unsigned i = 0; i < 4; ++i) {
2062 tl_lanes[i] = i & mask;
2063 trbl_lanes[i] = (i & mask) + idx;
2064 }
2065
2066 tl = ac_build_quad_swizzle(ctx, val,
2067 tl_lanes[0], tl_lanes[1],
2068 tl_lanes[2], tl_lanes[3]);
2069 trbl = ac_build_quad_swizzle(ctx, val,
2070 trbl_lanes[0], trbl_lanes[1],
2071 trbl_lanes[2], trbl_lanes[3]);
2072
2073 if (result_type == ctx->f16) {
2074 tl = LLVMBuildTrunc(ctx->builder, tl, ctx->i16, "");
2075 trbl = LLVMBuildTrunc(ctx->builder, trbl, ctx->i16, "");
2076 }
2077
2078 tl = LLVMBuildBitCast(ctx->builder, tl, result_type, "");
2079 trbl = LLVMBuildBitCast(ctx->builder, trbl, result_type, "");
2080 result = LLVMBuildFSub(ctx->builder, trbl, tl, "");
2081
2082 ac_build_type_name_for_intr(result_type, type, sizeof(type));
2083 snprintf(name, sizeof(name), "llvm.amdgcn.wqm.%s", type);
2084
2085 return ac_build_intrinsic(ctx, name, result_type, &result, 1, 0);
2086 }
2087
2088 void
2089 ac_build_sendmsg(struct ac_llvm_context *ctx,
2090 uint32_t msg,
2091 LLVMValueRef wave_id)
2092 {
2093 LLVMValueRef args[2];
2094 args[0] = LLVMConstInt(ctx->i32, msg, false);
2095 args[1] = wave_id;
2096 ac_build_intrinsic(ctx, "llvm.amdgcn.s.sendmsg", ctx->voidt, args, 2, 0);
2097 }
2098
2099 LLVMValueRef
2100 ac_build_imsb(struct ac_llvm_context *ctx,
2101 LLVMValueRef arg,
2102 LLVMTypeRef dst_type)
2103 {
2104 LLVMValueRef msb = ac_build_intrinsic(ctx, "llvm.amdgcn.sffbh.i32",
2105 dst_type, &arg, 1,
2106 AC_FUNC_ATTR_READNONE);
2107
2108 /* The HW returns the last bit index from MSB, but NIR/TGSI wants
2109 * the index from LSB. Invert it by doing "31 - msb". */
2110 msb = LLVMBuildSub(ctx->builder, LLVMConstInt(ctx->i32, 31, false),
2111 msb, "");
2112
2113 LLVMValueRef all_ones = LLVMConstInt(ctx->i32, -1, true);
2114 LLVMValueRef cond = LLVMBuildOr(ctx->builder,
2115 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
2116 arg, ctx->i32_0, ""),
2117 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
2118 arg, all_ones, ""), "");
2119
2120 return LLVMBuildSelect(ctx->builder, cond, all_ones, msb, "");
2121 }
2122
2123 LLVMValueRef
2124 ac_build_umsb(struct ac_llvm_context *ctx,
2125 LLVMValueRef arg,
2126 LLVMTypeRef dst_type)
2127 {
2128 const char *intrin_name;
2129 LLVMTypeRef type;
2130 LLVMValueRef highest_bit;
2131 LLVMValueRef zero;
2132 unsigned bitsize;
2133
2134 bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(arg));
2135 switch (bitsize) {
2136 case 64:
2137 intrin_name = "llvm.ctlz.i64";
2138 type = ctx->i64;
2139 highest_bit = LLVMConstInt(ctx->i64, 63, false);
2140 zero = ctx->i64_0;
2141 break;
2142 case 32:
2143 intrin_name = "llvm.ctlz.i32";
2144 type = ctx->i32;
2145 highest_bit = LLVMConstInt(ctx->i32, 31, false);
2146 zero = ctx->i32_0;
2147 break;
2148 case 16:
2149 intrin_name = "llvm.ctlz.i16";
2150 type = ctx->i16;
2151 highest_bit = LLVMConstInt(ctx->i16, 15, false);
2152 zero = ctx->i16_0;
2153 break;
2154 case 8:
2155 intrin_name = "llvm.ctlz.i8";
2156 type = ctx->i8;
2157 highest_bit = LLVMConstInt(ctx->i8, 7, false);
2158 zero = ctx->i8_0;
2159 break;
2160 default:
2161 unreachable(!"invalid bitsize");
2162 break;
2163 }
2164
2165 LLVMValueRef params[2] = {
2166 arg,
2167 ctx->i1true,
2168 };
2169
2170 LLVMValueRef msb = ac_build_intrinsic(ctx, intrin_name, type,
2171 params, 2,
2172 AC_FUNC_ATTR_READNONE);
2173
2174 /* The HW returns the last bit index from MSB, but TGSI/NIR wants
2175 * the index from LSB. Invert it by doing "31 - msb". */
2176 msb = LLVMBuildSub(ctx->builder, highest_bit, msb, "");
2177
2178 if (bitsize == 64) {
2179 msb = LLVMBuildTrunc(ctx->builder, msb, ctx->i32, "");
2180 } else if (bitsize < 32) {
2181 msb = LLVMBuildSExt(ctx->builder, msb, ctx->i32, "");
2182 }
2183
2184 /* check for zero */
2185 return LLVMBuildSelect(ctx->builder,
2186 LLVMBuildICmp(ctx->builder, LLVMIntEQ, arg, zero, ""),
2187 LLVMConstInt(ctx->i32, -1, true), msb, "");
2188 }
2189
2190 LLVMValueRef ac_build_fmin(struct ac_llvm_context *ctx, LLVMValueRef a,
2191 LLVMValueRef b)
2192 {
2193 char name[64], type[64];
2194
2195 ac_build_type_name_for_intr(LLVMTypeOf(a), type, sizeof(type));
2196 snprintf(name, sizeof(name), "llvm.minnum.%s", type);
2197 LLVMValueRef args[2] = {a, b};
2198 return ac_build_intrinsic(ctx, name, LLVMTypeOf(a), args, 2,
2199 AC_FUNC_ATTR_READNONE);
2200 }
2201
2202 LLVMValueRef ac_build_fmax(struct ac_llvm_context *ctx, LLVMValueRef a,
2203 LLVMValueRef b)
2204 {
2205 char name[64], type[64];
2206
2207 ac_build_type_name_for_intr(LLVMTypeOf(a), type, sizeof(type));
2208 snprintf(name, sizeof(name), "llvm.maxnum.%s", type);
2209 LLVMValueRef args[2] = {a, b};
2210 return ac_build_intrinsic(ctx, name, LLVMTypeOf(a), args, 2,
2211 AC_FUNC_ATTR_READNONE);
2212 }
2213
2214 LLVMValueRef ac_build_imin(struct ac_llvm_context *ctx, LLVMValueRef a,
2215 LLVMValueRef b)
2216 {
2217 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntSLE, a, b, "");
2218 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2219 }
2220
2221 LLVMValueRef ac_build_imax(struct ac_llvm_context *ctx, LLVMValueRef a,
2222 LLVMValueRef b)
2223 {
2224 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, a, b, "");
2225 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2226 }
2227
2228 LLVMValueRef ac_build_umin(struct ac_llvm_context *ctx, LLVMValueRef a,
2229 LLVMValueRef b)
2230 {
2231 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntULE, a, b, "");
2232 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2233 }
2234
2235 LLVMValueRef ac_build_umax(struct ac_llvm_context *ctx, LLVMValueRef a,
2236 LLVMValueRef b)
2237 {
2238 LLVMValueRef cmp = LLVMBuildICmp(ctx->builder, LLVMIntUGE, a, b, "");
2239 return LLVMBuildSelect(ctx->builder, cmp, a, b, "");
2240 }
2241
2242 LLVMValueRef ac_build_clamp(struct ac_llvm_context *ctx, LLVMValueRef value)
2243 {
2244 LLVMTypeRef t = LLVMTypeOf(value);
2245 return ac_build_fmin(ctx, ac_build_fmax(ctx, value, LLVMConstReal(t, 0.0)),
2246 LLVMConstReal(t, 1.0));
2247 }
2248
2249 void ac_build_export(struct ac_llvm_context *ctx, struct ac_export_args *a)
2250 {
2251 LLVMValueRef args[9];
2252
2253 args[0] = LLVMConstInt(ctx->i32, a->target, 0);
2254 args[1] = LLVMConstInt(ctx->i32, a->enabled_channels, 0);
2255
2256 if (a->compr) {
2257 args[2] = LLVMBuildBitCast(ctx->builder, a->out[0],
2258 ctx->v2i16, "");
2259 args[3] = LLVMBuildBitCast(ctx->builder, a->out[1],
2260 ctx->v2i16, "");
2261 args[4] = LLVMConstInt(ctx->i1, a->done, 0);
2262 args[5] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
2263
2264 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.compr.v2i16",
2265 ctx->voidt, args, 6, 0);
2266 } else {
2267 args[2] = a->out[0];
2268 args[3] = a->out[1];
2269 args[4] = a->out[2];
2270 args[5] = a->out[3];
2271 args[6] = LLVMConstInt(ctx->i1, a->done, 0);
2272 args[7] = LLVMConstInt(ctx->i1, a->valid_mask, 0);
2273
2274 ac_build_intrinsic(ctx, "llvm.amdgcn.exp.f32",
2275 ctx->voidt, args, 8, 0);
2276 }
2277 }
2278
2279 void ac_build_export_null(struct ac_llvm_context *ctx)
2280 {
2281 struct ac_export_args args;
2282
2283 args.enabled_channels = 0x0; /* enabled channels */
2284 args.valid_mask = 1; /* whether the EXEC mask is valid */
2285 args.done = 1; /* DONE bit */
2286 args.target = V_008DFC_SQ_EXP_NULL;
2287 args.compr = 0; /* COMPR flag (0 = 32-bit export) */
2288 args.out[0] = LLVMGetUndef(ctx->f32); /* R */
2289 args.out[1] = LLVMGetUndef(ctx->f32); /* G */
2290 args.out[2] = LLVMGetUndef(ctx->f32); /* B */
2291 args.out[3] = LLVMGetUndef(ctx->f32); /* A */
2292
2293 ac_build_export(ctx, &args);
2294 }
2295
2296 static unsigned ac_num_coords(enum ac_image_dim dim)
2297 {
2298 switch (dim) {
2299 case ac_image_1d:
2300 return 1;
2301 case ac_image_2d:
2302 case ac_image_1darray:
2303 return 2;
2304 case ac_image_3d:
2305 case ac_image_cube:
2306 case ac_image_2darray:
2307 case ac_image_2dmsaa:
2308 return 3;
2309 case ac_image_2darraymsaa:
2310 return 4;
2311 default:
2312 unreachable("ac_num_coords: bad dim");
2313 }
2314 }
2315
2316 static unsigned ac_num_derivs(enum ac_image_dim dim)
2317 {
2318 switch (dim) {
2319 case ac_image_1d:
2320 case ac_image_1darray:
2321 return 2;
2322 case ac_image_2d:
2323 case ac_image_2darray:
2324 case ac_image_cube:
2325 return 4;
2326 case ac_image_3d:
2327 return 6;
2328 case ac_image_2dmsaa:
2329 case ac_image_2darraymsaa:
2330 default:
2331 unreachable("derivatives not supported");
2332 }
2333 }
2334
2335 static const char *get_atomic_name(enum ac_atomic_op op)
2336 {
2337 switch (op) {
2338 case ac_atomic_swap: return "swap";
2339 case ac_atomic_add: return "add";
2340 case ac_atomic_sub: return "sub";
2341 case ac_atomic_smin: return "smin";
2342 case ac_atomic_umin: return "umin";
2343 case ac_atomic_smax: return "smax";
2344 case ac_atomic_umax: return "umax";
2345 case ac_atomic_and: return "and";
2346 case ac_atomic_or: return "or";
2347 case ac_atomic_xor: return "xor";
2348 case ac_atomic_inc_wrap: return "inc";
2349 case ac_atomic_dec_wrap: return "dec";
2350 }
2351 unreachable("bad atomic op");
2352 }
2353
2354 LLVMValueRef ac_build_image_opcode(struct ac_llvm_context *ctx,
2355 struct ac_image_args *a)
2356 {
2357 const char *overload[3] = { "", "", "" };
2358 unsigned num_overloads = 0;
2359 LLVMValueRef args[18];
2360 unsigned num_args = 0;
2361 enum ac_image_dim dim = a->dim;
2362
2363 assert(!a->lod || a->lod == ctx->i32_0 || a->lod == ctx->f32_0 ||
2364 !a->level_zero);
2365 assert((a->opcode != ac_image_get_resinfo && a->opcode != ac_image_load_mip &&
2366 a->opcode != ac_image_store_mip) ||
2367 a->lod);
2368 assert(a->opcode == ac_image_sample || a->opcode == ac_image_gather4 ||
2369 (!a->compare && !a->offset));
2370 assert((a->opcode == ac_image_sample || a->opcode == ac_image_gather4 ||
2371 a->opcode == ac_image_get_lod) ||
2372 !a->bias);
2373 assert((a->bias ? 1 : 0) +
2374 (a->lod ? 1 : 0) +
2375 (a->level_zero ? 1 : 0) +
2376 (a->derivs[0] ? 1 : 0) <= 1);
2377 assert((a->min_lod ? 1 : 0) +
2378 (a->lod ? 1 : 0) +
2379 (a->level_zero ? 1 : 0) <= 1);
2380 assert(!a->d16 || (ctx->chip_class >= GFX8 &&
2381 a->opcode != ac_image_atomic &&
2382 a->opcode != ac_image_atomic_cmpswap &&
2383 a->opcode != ac_image_get_lod &&
2384 a->opcode != ac_image_get_resinfo));
2385
2386 if (a->opcode == ac_image_get_lod) {
2387 switch (dim) {
2388 case ac_image_1darray:
2389 dim = ac_image_1d;
2390 break;
2391 case ac_image_2darray:
2392 case ac_image_cube:
2393 dim = ac_image_2d;
2394 break;
2395 default:
2396 break;
2397 }
2398 }
2399
2400 bool sample = a->opcode == ac_image_sample ||
2401 a->opcode == ac_image_gather4 ||
2402 a->opcode == ac_image_get_lod;
2403 bool atomic = a->opcode == ac_image_atomic ||
2404 a->opcode == ac_image_atomic_cmpswap;
2405 bool load = a->opcode == ac_image_sample ||
2406 a->opcode == ac_image_gather4 ||
2407 a->opcode == ac_image_load ||
2408 a->opcode == ac_image_load_mip;
2409 LLVMTypeRef coord_type = sample ? ctx->f32 : ctx->i32;
2410
2411 if (atomic || a->opcode == ac_image_store || a->opcode == ac_image_store_mip) {
2412 args[num_args++] = a->data[0];
2413 if (a->opcode == ac_image_atomic_cmpswap)
2414 args[num_args++] = a->data[1];
2415 }
2416
2417 if (!atomic)
2418 args[num_args++] = LLVMConstInt(ctx->i32, a->dmask, false);
2419
2420 if (a->offset)
2421 args[num_args++] = ac_to_integer(ctx, a->offset);
2422 if (a->bias) {
2423 args[num_args++] = ac_to_float(ctx, a->bias);
2424 overload[num_overloads++] = ".f32";
2425 }
2426 if (a->compare)
2427 args[num_args++] = ac_to_float(ctx, a->compare);
2428 if (a->derivs[0]) {
2429 unsigned count = ac_num_derivs(dim);
2430 for (unsigned i = 0; i < count; ++i)
2431 args[num_args++] = ac_to_float(ctx, a->derivs[i]);
2432 overload[num_overloads++] = ".f32";
2433 }
2434 unsigned num_coords =
2435 a->opcode != ac_image_get_resinfo ? ac_num_coords(dim) : 0;
2436 for (unsigned i = 0; i < num_coords; ++i)
2437 args[num_args++] = LLVMBuildBitCast(ctx->builder, a->coords[i], coord_type, "");
2438 if (a->lod)
2439 args[num_args++] = LLVMBuildBitCast(ctx->builder, a->lod, coord_type, "");
2440 if (a->min_lod)
2441 args[num_args++] = LLVMBuildBitCast(ctx->builder, a->min_lod, coord_type, "");
2442
2443 overload[num_overloads++] = sample ? ".f32" : ".i32";
2444
2445 args[num_args++] = a->resource;
2446 if (sample) {
2447 args[num_args++] = a->sampler;
2448 args[num_args++] = LLVMConstInt(ctx->i1, a->unorm, false);
2449 }
2450
2451 args[num_args++] = ctx->i32_0; /* texfailctrl */
2452 args[num_args++] = LLVMConstInt(ctx->i32,
2453 load ? get_load_cache_policy(ctx, a->cache_policy) :
2454 a->cache_policy, false);
2455
2456 const char *name;
2457 const char *atomic_subop = "";
2458 switch (a->opcode) {
2459 case ac_image_sample: name = "sample"; break;
2460 case ac_image_gather4: name = "gather4"; break;
2461 case ac_image_load: name = "load"; break;
2462 case ac_image_load_mip: name = "load.mip"; break;
2463 case ac_image_store: name = "store"; break;
2464 case ac_image_store_mip: name = "store.mip"; break;
2465 case ac_image_atomic:
2466 name = "atomic.";
2467 atomic_subop = get_atomic_name(a->atomic);
2468 break;
2469 case ac_image_atomic_cmpswap:
2470 name = "atomic.";
2471 atomic_subop = "cmpswap";
2472 break;
2473 case ac_image_get_lod: name = "getlod"; break;
2474 case ac_image_get_resinfo: name = "getresinfo"; break;
2475 default: unreachable("invalid image opcode");
2476 }
2477
2478 const char *dimname;
2479 switch (dim) {
2480 case ac_image_1d: dimname = "1d"; break;
2481 case ac_image_2d: dimname = "2d"; break;
2482 case ac_image_3d: dimname = "3d"; break;
2483 case ac_image_cube: dimname = "cube"; break;
2484 case ac_image_1darray: dimname = "1darray"; break;
2485 case ac_image_2darray: dimname = "2darray"; break;
2486 case ac_image_2dmsaa: dimname = "2dmsaa"; break;
2487 case ac_image_2darraymsaa: dimname = "2darraymsaa"; break;
2488 default: unreachable("invalid dim");
2489 }
2490
2491 bool lod_suffix =
2492 a->lod && (a->opcode == ac_image_sample || a->opcode == ac_image_gather4);
2493 char intr_name[96];
2494 snprintf(intr_name, sizeof(intr_name),
2495 "llvm.amdgcn.image.%s%s" /* base name */
2496 "%s%s%s%s" /* sample/gather modifiers */
2497 ".%s.%s%s%s%s", /* dimension and type overloads */
2498 name, atomic_subop,
2499 a->compare ? ".c" : "",
2500 a->bias ? ".b" :
2501 lod_suffix ? ".l" :
2502 a->derivs[0] ? ".d" :
2503 a->level_zero ? ".lz" : "",
2504 a->min_lod ? ".cl" : "",
2505 a->offset ? ".o" : "",
2506 dimname,
2507 atomic ? "i32" : (a->d16 ? "v4f16" : "v4f32"),
2508 overload[0], overload[1], overload[2]);
2509
2510 LLVMTypeRef retty;
2511 if (atomic)
2512 retty = ctx->i32;
2513 else if (a->opcode == ac_image_store || a->opcode == ac_image_store_mip)
2514 retty = ctx->voidt;
2515 else
2516 retty = a->d16 ? ctx->v4f16 : ctx->v4f32;
2517
2518 LLVMValueRef result =
2519 ac_build_intrinsic(ctx, intr_name, retty, args, num_args,
2520 a->attributes);
2521 if (!sample && !atomic && retty != ctx->voidt)
2522 result = ac_to_integer(ctx, result);
2523
2524 return result;
2525 }
2526
2527 LLVMValueRef ac_build_image_get_sample_count(struct ac_llvm_context *ctx,
2528 LLVMValueRef rsrc)
2529 {
2530 LLVMValueRef samples;
2531
2532 /* Read the samples from the descriptor directly.
2533 * Hardware doesn't have any instruction for this.
2534 */
2535 samples = LLVMBuildExtractElement(ctx->builder, rsrc,
2536 LLVMConstInt(ctx->i32, 3, 0), "");
2537 samples = LLVMBuildLShr(ctx->builder, samples,
2538 LLVMConstInt(ctx->i32, 16, 0), "");
2539 samples = LLVMBuildAnd(ctx->builder, samples,
2540 LLVMConstInt(ctx->i32, 0xf, 0), "");
2541 samples = LLVMBuildShl(ctx->builder, ctx->i32_1,
2542 samples, "");
2543 return samples;
2544 }
2545
2546 LLVMValueRef ac_build_cvt_pkrtz_f16(struct ac_llvm_context *ctx,
2547 LLVMValueRef args[2])
2548 {
2549 return ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pkrtz", ctx->v2f16,
2550 args, 2, AC_FUNC_ATTR_READNONE);
2551 }
2552
2553 LLVMValueRef ac_build_cvt_pknorm_i16(struct ac_llvm_context *ctx,
2554 LLVMValueRef args[2])
2555 {
2556 LLVMValueRef res =
2557 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.i16",
2558 ctx->v2i16, args, 2,
2559 AC_FUNC_ATTR_READNONE);
2560 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2561 }
2562
2563 LLVMValueRef ac_build_cvt_pknorm_u16(struct ac_llvm_context *ctx,
2564 LLVMValueRef args[2])
2565 {
2566 LLVMValueRef res =
2567 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pknorm.u16",
2568 ctx->v2i16, args, 2,
2569 AC_FUNC_ATTR_READNONE);
2570 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2571 }
2572
2573 /* The 8-bit and 10-bit clamping is for HW workarounds. */
2574 LLVMValueRef ac_build_cvt_pk_i16(struct ac_llvm_context *ctx,
2575 LLVMValueRef args[2], unsigned bits, bool hi)
2576 {
2577 assert(bits == 8 || bits == 10 || bits == 16);
2578
2579 LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
2580 bits == 8 ? 127 : bits == 10 ? 511 : 32767, 0);
2581 LLVMValueRef min_rgb = LLVMConstInt(ctx->i32,
2582 bits == 8 ? -128 : bits == 10 ? -512 : -32768, 0);
2583 LLVMValueRef max_alpha =
2584 bits != 10 ? max_rgb : ctx->i32_1;
2585 LLVMValueRef min_alpha =
2586 bits != 10 ? min_rgb : LLVMConstInt(ctx->i32, -2, 0);
2587
2588 /* Clamp. */
2589 if (bits != 16) {
2590 for (int i = 0; i < 2; i++) {
2591 bool alpha = hi && i == 1;
2592 args[i] = ac_build_imin(ctx, args[i],
2593 alpha ? max_alpha : max_rgb);
2594 args[i] = ac_build_imax(ctx, args[i],
2595 alpha ? min_alpha : min_rgb);
2596 }
2597 }
2598
2599 LLVMValueRef res =
2600 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.i16",
2601 ctx->v2i16, args, 2,
2602 AC_FUNC_ATTR_READNONE);
2603 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2604 }
2605
2606 /* The 8-bit and 10-bit clamping is for HW workarounds. */
2607 LLVMValueRef ac_build_cvt_pk_u16(struct ac_llvm_context *ctx,
2608 LLVMValueRef args[2], unsigned bits, bool hi)
2609 {
2610 assert(bits == 8 || bits == 10 || bits == 16);
2611
2612 LLVMValueRef max_rgb = LLVMConstInt(ctx->i32,
2613 bits == 8 ? 255 : bits == 10 ? 1023 : 65535, 0);
2614 LLVMValueRef max_alpha =
2615 bits != 10 ? max_rgb : LLVMConstInt(ctx->i32, 3, 0);
2616
2617 /* Clamp. */
2618 if (bits != 16) {
2619 for (int i = 0; i < 2; i++) {
2620 bool alpha = hi && i == 1;
2621 args[i] = ac_build_umin(ctx, args[i],
2622 alpha ? max_alpha : max_rgb);
2623 }
2624 }
2625
2626 LLVMValueRef res =
2627 ac_build_intrinsic(ctx, "llvm.amdgcn.cvt.pk.u16",
2628 ctx->v2i16, args, 2,
2629 AC_FUNC_ATTR_READNONE);
2630 return LLVMBuildBitCast(ctx->builder, res, ctx->i32, "");
2631 }
2632
2633 LLVMValueRef ac_build_wqm_vote(struct ac_llvm_context *ctx, LLVMValueRef i1)
2634 {
2635 return ac_build_intrinsic(ctx, "llvm.amdgcn.wqm.vote", ctx->i1,
2636 &i1, 1, AC_FUNC_ATTR_READNONE);
2637 }
2638
2639 void ac_build_kill_if_false(struct ac_llvm_context *ctx, LLVMValueRef i1)
2640 {
2641 ac_build_intrinsic(ctx, "llvm.amdgcn.kill", ctx->voidt,
2642 &i1, 1, 0);
2643 }
2644
2645 LLVMValueRef ac_build_bfe(struct ac_llvm_context *ctx, LLVMValueRef input,
2646 LLVMValueRef offset, LLVMValueRef width,
2647 bool is_signed)
2648 {
2649 LLVMValueRef args[] = {
2650 input,
2651 offset,
2652 width,
2653 };
2654
2655 return ac_build_intrinsic(ctx, is_signed ? "llvm.amdgcn.sbfe.i32" :
2656 "llvm.amdgcn.ubfe.i32",
2657 ctx->i32, args, 3, AC_FUNC_ATTR_READNONE);
2658
2659 }
2660
2661 LLVMValueRef ac_build_imad(struct ac_llvm_context *ctx, LLVMValueRef s0,
2662 LLVMValueRef s1, LLVMValueRef s2)
2663 {
2664 return LLVMBuildAdd(ctx->builder,
2665 LLVMBuildMul(ctx->builder, s0, s1, ""), s2, "");
2666 }
2667
2668 LLVMValueRef ac_build_fmad(struct ac_llvm_context *ctx, LLVMValueRef s0,
2669 LLVMValueRef s1, LLVMValueRef s2)
2670 {
2671 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
2672 if (ctx->chip_class >= GFX10) {
2673 return ac_build_intrinsic(ctx, "llvm.fma.f32", ctx->f32,
2674 (LLVMValueRef []) {s0, s1, s2}, 3,
2675 AC_FUNC_ATTR_READNONE);
2676 }
2677
2678 return LLVMBuildFAdd(ctx->builder,
2679 LLVMBuildFMul(ctx->builder, s0, s1, ""), s2, "");
2680 }
2681
2682 void ac_build_waitcnt(struct ac_llvm_context *ctx, unsigned wait_flags)
2683 {
2684 if (!wait_flags)
2685 return;
2686
2687 unsigned lgkmcnt = 63;
2688 unsigned vmcnt = ctx->chip_class >= GFX9 ? 63 : 15;
2689 unsigned vscnt = 63;
2690
2691 if (wait_flags & AC_WAIT_LGKM)
2692 lgkmcnt = 0;
2693 if (wait_flags & AC_WAIT_VLOAD)
2694 vmcnt = 0;
2695
2696 if (wait_flags & AC_WAIT_VSTORE) {
2697 if (ctx->chip_class >= GFX10)
2698 vscnt = 0;
2699 else
2700 vmcnt = 0;
2701 }
2702
2703 /* There is no intrinsic for vscnt(0), so use a fence. */
2704 if ((wait_flags & AC_WAIT_LGKM &&
2705 wait_flags & AC_WAIT_VLOAD &&
2706 wait_flags & AC_WAIT_VSTORE) ||
2707 vscnt == 0) {
2708 LLVMBuildFence(ctx->builder, LLVMAtomicOrderingRelease, false, "");
2709 return;
2710 }
2711
2712 unsigned simm16 = (lgkmcnt << 8) |
2713 (7 << 4) | /* expcnt */
2714 (vmcnt & 0xf) |
2715 ((vmcnt >> 4) << 14);
2716
2717 LLVMValueRef args[1] = {
2718 LLVMConstInt(ctx->i32, simm16, false),
2719 };
2720 ac_build_intrinsic(ctx, "llvm.amdgcn.s.waitcnt",
2721 ctx->voidt, args, 1, 0);
2722 }
2723
2724 LLVMValueRef ac_build_fmed3(struct ac_llvm_context *ctx, LLVMValueRef src0,
2725 LLVMValueRef src1, LLVMValueRef src2,
2726 unsigned bitsize)
2727 {
2728 LLVMValueRef result;
2729
2730 if (bitsize == 64 || (bitsize == 16 && ctx->chip_class <= GFX8)) {
2731 /* Lower 64-bit fmed because LLVM doesn't expose an intrinsic,
2732 * or lower 16-bit fmed because it's only supported on GFX9+.
2733 */
2734 LLVMValueRef min1, min2, max1;
2735
2736 min1 = ac_build_fmin(ctx, src0, src1);
2737 max1 = ac_build_fmax(ctx, src0, src1);
2738 min2 = ac_build_fmin(ctx, max1, src2);
2739
2740 result = ac_build_fmax(ctx, min2, min1);
2741 } else {
2742 LLVMTypeRef type;
2743 char *intr;
2744
2745 if (bitsize == 16) {
2746 intr = "llvm.amdgcn.fmed3.f16";
2747 type = ctx->f16;
2748 } else {
2749 assert(bitsize == 32);
2750 intr = "llvm.amdgcn.fmed3.f32";
2751 type = ctx->f32;
2752 }
2753
2754 LLVMValueRef params[] = {
2755 src0,
2756 src1,
2757 src2,
2758 };
2759
2760 result = ac_build_intrinsic(ctx, intr, type, params, 3,
2761 AC_FUNC_ATTR_READNONE);
2762 }
2763
2764 if (ctx->chip_class < GFX9 && bitsize == 32) {
2765 /* Only pre-GFX9 chips do not flush denorms. */
2766 result = ac_build_canonicalize(ctx, result, bitsize);
2767 }
2768
2769 return result;
2770 }
2771
2772 LLVMValueRef ac_build_fract(struct ac_llvm_context *ctx, LLVMValueRef src0,
2773 unsigned bitsize)
2774 {
2775 LLVMTypeRef type;
2776 char *intr;
2777
2778 if (bitsize == 16) {
2779 intr = "llvm.amdgcn.fract.f16";
2780 type = ctx->f16;
2781 } else if (bitsize == 32) {
2782 intr = "llvm.amdgcn.fract.f32";
2783 type = ctx->f32;
2784 } else {
2785 intr = "llvm.amdgcn.fract.f64";
2786 type = ctx->f64;
2787 }
2788
2789 LLVMValueRef params[] = {
2790 src0,
2791 };
2792 return ac_build_intrinsic(ctx, intr, type, params, 1,
2793 AC_FUNC_ATTR_READNONE);
2794 }
2795
2796 LLVMValueRef ac_build_isign(struct ac_llvm_context *ctx, LLVMValueRef src0,
2797 unsigned bitsize)
2798 {
2799 LLVMTypeRef type = LLVMIntTypeInContext(ctx->context, bitsize);
2800 LLVMValueRef zero = LLVMConstInt(type, 0, false);
2801 LLVMValueRef one = LLVMConstInt(type, 1, false);
2802
2803 LLVMValueRef cmp, val;
2804 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGT, src0, zero, "");
2805 val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
2806 cmp = LLVMBuildICmp(ctx->builder, LLVMIntSGE, val, zero, "");
2807 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstInt(type, -1, true), "");
2808 return val;
2809 }
2810
2811 LLVMValueRef ac_build_fsign(struct ac_llvm_context *ctx, LLVMValueRef src0,
2812 unsigned bitsize)
2813 {
2814 LLVMValueRef cmp, val, zero, one;
2815 LLVMTypeRef type;
2816
2817 if (bitsize == 16) {
2818 type = ctx->f16;
2819 zero = ctx->f16_0;
2820 one = ctx->f16_1;
2821 } else if (bitsize == 32) {
2822 type = ctx->f32;
2823 zero = ctx->f32_0;
2824 one = ctx->f32_1;
2825 } else {
2826 type = ctx->f64;
2827 zero = ctx->f64_0;
2828 one = ctx->f64_1;
2829 }
2830
2831 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGT, src0, zero, "");
2832 val = LLVMBuildSelect(ctx->builder, cmp, one, src0, "");
2833 cmp = LLVMBuildFCmp(ctx->builder, LLVMRealOGE, val, zero, "");
2834 val = LLVMBuildSelect(ctx->builder, cmp, val, LLVMConstReal(type, -1.0), "");
2835 return val;
2836 }
2837
2838 LLVMValueRef ac_build_bit_count(struct ac_llvm_context *ctx, LLVMValueRef src0)
2839 {
2840 LLVMValueRef result;
2841 unsigned bitsize;
2842
2843 bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
2844
2845 switch (bitsize) {
2846 case 128:
2847 result = ac_build_intrinsic(ctx, "llvm.ctpop.i128", ctx->i128,
2848 (LLVMValueRef []) { src0 }, 1,
2849 AC_FUNC_ATTR_READNONE);
2850 result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
2851 break;
2852 case 64:
2853 result = ac_build_intrinsic(ctx, "llvm.ctpop.i64", ctx->i64,
2854 (LLVMValueRef []) { src0 }, 1,
2855 AC_FUNC_ATTR_READNONE);
2856
2857 result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
2858 break;
2859 case 32:
2860 result = ac_build_intrinsic(ctx, "llvm.ctpop.i32", ctx->i32,
2861 (LLVMValueRef []) { src0 }, 1,
2862 AC_FUNC_ATTR_READNONE);
2863 break;
2864 case 16:
2865 result = ac_build_intrinsic(ctx, "llvm.ctpop.i16", ctx->i16,
2866 (LLVMValueRef []) { src0 }, 1,
2867 AC_FUNC_ATTR_READNONE);
2868
2869 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2870 break;
2871 case 8:
2872 result = ac_build_intrinsic(ctx, "llvm.ctpop.i8", ctx->i8,
2873 (LLVMValueRef []) { src0 }, 1,
2874 AC_FUNC_ATTR_READNONE);
2875
2876 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2877 break;
2878 default:
2879 unreachable(!"invalid bitsize");
2880 break;
2881 }
2882
2883 return result;
2884 }
2885
2886 LLVMValueRef ac_build_bitfield_reverse(struct ac_llvm_context *ctx,
2887 LLVMValueRef src0)
2888 {
2889 LLVMValueRef result;
2890 unsigned bitsize;
2891
2892 bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
2893
2894 switch (bitsize) {
2895 case 64:
2896 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i64", ctx->i64,
2897 (LLVMValueRef []) { src0 }, 1,
2898 AC_FUNC_ATTR_READNONE);
2899
2900 result = LLVMBuildTrunc(ctx->builder, result, ctx->i32, "");
2901 break;
2902 case 32:
2903 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i32", ctx->i32,
2904 (LLVMValueRef []) { src0 }, 1,
2905 AC_FUNC_ATTR_READNONE);
2906 break;
2907 case 16:
2908 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i16", ctx->i16,
2909 (LLVMValueRef []) { src0 }, 1,
2910 AC_FUNC_ATTR_READNONE);
2911
2912 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2913 break;
2914 case 8:
2915 result = ac_build_intrinsic(ctx, "llvm.bitreverse.i8", ctx->i8,
2916 (LLVMValueRef []) { src0 }, 1,
2917 AC_FUNC_ATTR_READNONE);
2918
2919 result = LLVMBuildZExt(ctx->builder, result, ctx->i32, "");
2920 break;
2921 default:
2922 unreachable(!"invalid bitsize");
2923 break;
2924 }
2925
2926 return result;
2927 }
2928
2929 #define AC_EXP_TARGET 0
2930 #define AC_EXP_ENABLED_CHANNELS 1
2931 #define AC_EXP_OUT0 2
2932
2933 enum ac_ir_type {
2934 AC_IR_UNDEF,
2935 AC_IR_CONST,
2936 AC_IR_VALUE,
2937 };
2938
2939 struct ac_vs_exp_chan
2940 {
2941 LLVMValueRef value;
2942 float const_float;
2943 enum ac_ir_type type;
2944 };
2945
2946 struct ac_vs_exp_inst {
2947 unsigned offset;
2948 LLVMValueRef inst;
2949 struct ac_vs_exp_chan chan[4];
2950 };
2951
2952 struct ac_vs_exports {
2953 unsigned num;
2954 struct ac_vs_exp_inst exp[VARYING_SLOT_MAX];
2955 };
2956
2957 /* Return true if the PARAM export has been eliminated. */
2958 static bool ac_eliminate_const_output(uint8_t *vs_output_param_offset,
2959 uint32_t num_outputs,
2960 struct ac_vs_exp_inst *exp)
2961 {
2962 unsigned i, default_val; /* SPI_PS_INPUT_CNTL_i.DEFAULT_VAL */
2963 bool is_zero[4] = {}, is_one[4] = {};
2964
2965 for (i = 0; i < 4; i++) {
2966 /* It's a constant expression. Undef outputs are eliminated too. */
2967 if (exp->chan[i].type == AC_IR_UNDEF) {
2968 is_zero[i] = true;
2969 is_one[i] = true;
2970 } else if (exp->chan[i].type == AC_IR_CONST) {
2971 if (exp->chan[i].const_float == 0)
2972 is_zero[i] = true;
2973 else if (exp->chan[i].const_float == 1)
2974 is_one[i] = true;
2975 else
2976 return false; /* other constant */
2977 } else
2978 return false;
2979 }
2980
2981 /* Only certain combinations of 0 and 1 can be eliminated. */
2982 if (is_zero[0] && is_zero[1] && is_zero[2])
2983 default_val = is_zero[3] ? 0 : 1;
2984 else if (is_one[0] && is_one[1] && is_one[2])
2985 default_val = is_zero[3] ? 2 : 3;
2986 else
2987 return false;
2988
2989 /* The PARAM export can be represented as DEFAULT_VAL. Kill it. */
2990 LLVMInstructionEraseFromParent(exp->inst);
2991
2992 /* Change OFFSET to DEFAULT_VAL. */
2993 for (i = 0; i < num_outputs; i++) {
2994 if (vs_output_param_offset[i] == exp->offset) {
2995 vs_output_param_offset[i] =
2996 AC_EXP_PARAM_DEFAULT_VAL_0000 + default_val;
2997 break;
2998 }
2999 }
3000 return true;
3001 }
3002
3003 static bool ac_eliminate_duplicated_output(struct ac_llvm_context *ctx,
3004 uint8_t *vs_output_param_offset,
3005 uint32_t num_outputs,
3006 struct ac_vs_exports *processed,
3007 struct ac_vs_exp_inst *exp)
3008 {
3009 unsigned p, copy_back_channels = 0;
3010
3011 /* See if the output is already in the list of processed outputs.
3012 * The LLVMValueRef comparison relies on SSA.
3013 */
3014 for (p = 0; p < processed->num; p++) {
3015 bool different = false;
3016
3017 for (unsigned j = 0; j < 4; j++) {
3018 struct ac_vs_exp_chan *c1 = &processed->exp[p].chan[j];
3019 struct ac_vs_exp_chan *c2 = &exp->chan[j];
3020
3021 /* Treat undef as a match. */
3022 if (c2->type == AC_IR_UNDEF)
3023 continue;
3024
3025 /* If c1 is undef but c2 isn't, we can copy c2 to c1
3026 * and consider the instruction duplicated.
3027 */
3028 if (c1->type == AC_IR_UNDEF) {
3029 copy_back_channels |= 1 << j;
3030 continue;
3031 }
3032
3033 /* Test whether the channels are not equal. */
3034 if (c1->type != c2->type ||
3035 (c1->type == AC_IR_CONST &&
3036 c1->const_float != c2->const_float) ||
3037 (c1->type == AC_IR_VALUE &&
3038 c1->value != c2->value)) {
3039 different = true;
3040 break;
3041 }
3042 }
3043 if (!different)
3044 break;
3045
3046 copy_back_channels = 0;
3047 }
3048 if (p == processed->num)
3049 return false;
3050
3051 /* If a match was found, but the matching export has undef where the new
3052 * one has a normal value, copy the normal value to the undef channel.
3053 */
3054 struct ac_vs_exp_inst *match = &processed->exp[p];
3055
3056 /* Get current enabled channels mask. */
3057 LLVMValueRef arg = LLVMGetOperand(match->inst, AC_EXP_ENABLED_CHANNELS);
3058 unsigned enabled_channels = LLVMConstIntGetZExtValue(arg);
3059
3060 while (copy_back_channels) {
3061 unsigned chan = u_bit_scan(&copy_back_channels);
3062
3063 assert(match->chan[chan].type == AC_IR_UNDEF);
3064 LLVMSetOperand(match->inst, AC_EXP_OUT0 + chan,
3065 exp->chan[chan].value);
3066 match->chan[chan] = exp->chan[chan];
3067
3068 /* Update number of enabled channels because the original mask
3069 * is not always 0xf.
3070 */
3071 enabled_channels |= (1 << chan);
3072 LLVMSetOperand(match->inst, AC_EXP_ENABLED_CHANNELS,
3073 LLVMConstInt(ctx->i32, enabled_channels, 0));
3074 }
3075
3076 /* The PARAM export is duplicated. Kill it. */
3077 LLVMInstructionEraseFromParent(exp->inst);
3078
3079 /* Change OFFSET to the matching export. */
3080 for (unsigned i = 0; i < num_outputs; i++) {
3081 if (vs_output_param_offset[i] == exp->offset) {
3082 vs_output_param_offset[i] = match->offset;
3083 break;
3084 }
3085 }
3086 return true;
3087 }
3088
3089 void ac_optimize_vs_outputs(struct ac_llvm_context *ctx,
3090 LLVMValueRef main_fn,
3091 uint8_t *vs_output_param_offset,
3092 uint32_t num_outputs,
3093 uint32_t skip_output_mask,
3094 uint8_t *num_param_exports)
3095 {
3096 LLVMBasicBlockRef bb;
3097 bool removed_any = false;
3098 struct ac_vs_exports exports;
3099
3100 exports.num = 0;
3101
3102 /* Process all LLVM instructions. */
3103 bb = LLVMGetFirstBasicBlock(main_fn);
3104 while (bb) {
3105 LLVMValueRef inst = LLVMGetFirstInstruction(bb);
3106
3107 while (inst) {
3108 LLVMValueRef cur = inst;
3109 inst = LLVMGetNextInstruction(inst);
3110 struct ac_vs_exp_inst exp;
3111
3112 if (LLVMGetInstructionOpcode(cur) != LLVMCall)
3113 continue;
3114
3115 LLVMValueRef callee = ac_llvm_get_called_value(cur);
3116
3117 if (!ac_llvm_is_function(callee))
3118 continue;
3119
3120 const char *name = LLVMGetValueName(callee);
3121 unsigned num_args = LLVMCountParams(callee);
3122
3123 /* Check if this is an export instruction. */
3124 if ((num_args != 9 && num_args != 8) ||
3125 (strcmp(name, "llvm.SI.export") &&
3126 strcmp(name, "llvm.amdgcn.exp.f32")))
3127 continue;
3128
3129 LLVMValueRef arg = LLVMGetOperand(cur, AC_EXP_TARGET);
3130 unsigned target = LLVMConstIntGetZExtValue(arg);
3131
3132 if (target < V_008DFC_SQ_EXP_PARAM)
3133 continue;
3134
3135 target -= V_008DFC_SQ_EXP_PARAM;
3136
3137 /* Parse the instruction. */
3138 memset(&exp, 0, sizeof(exp));
3139 exp.offset = target;
3140 exp.inst = cur;
3141
3142 for (unsigned i = 0; i < 4; i++) {
3143 LLVMValueRef v = LLVMGetOperand(cur, AC_EXP_OUT0 + i);
3144
3145 exp.chan[i].value = v;
3146
3147 if (LLVMIsUndef(v)) {
3148 exp.chan[i].type = AC_IR_UNDEF;
3149 } else if (LLVMIsAConstantFP(v)) {
3150 LLVMBool loses_info;
3151 exp.chan[i].type = AC_IR_CONST;
3152 exp.chan[i].const_float =
3153 LLVMConstRealGetDouble(v, &loses_info);
3154 } else {
3155 exp.chan[i].type = AC_IR_VALUE;
3156 }
3157 }
3158
3159 /* Eliminate constant and duplicated PARAM exports. */
3160 if (!((1u << target) & skip_output_mask) &&
3161 (ac_eliminate_const_output(vs_output_param_offset,
3162 num_outputs, &exp) ||
3163 ac_eliminate_duplicated_output(ctx,
3164 vs_output_param_offset,
3165 num_outputs, &exports,
3166 &exp))) {
3167 removed_any = true;
3168 } else {
3169 exports.exp[exports.num++] = exp;
3170 }
3171 }
3172 bb = LLVMGetNextBasicBlock(bb);
3173 }
3174
3175 /* Remove holes in export memory due to removed PARAM exports.
3176 * This is done by renumbering all PARAM exports.
3177 */
3178 if (removed_any) {
3179 uint8_t old_offset[VARYING_SLOT_MAX];
3180 unsigned out, i;
3181
3182 /* Make a copy of the offsets. We need the old version while
3183 * we are modifying some of them. */
3184 memcpy(old_offset, vs_output_param_offset,
3185 sizeof(old_offset));
3186
3187 for (i = 0; i < exports.num; i++) {
3188 unsigned offset = exports.exp[i].offset;
3189
3190 /* Update vs_output_param_offset. Multiple outputs can
3191 * have the same offset.
3192 */
3193 for (out = 0; out < num_outputs; out++) {
3194 if (old_offset[out] == offset)
3195 vs_output_param_offset[out] = i;
3196 }
3197
3198 /* Change the PARAM offset in the instruction. */
3199 LLVMSetOperand(exports.exp[i].inst, AC_EXP_TARGET,
3200 LLVMConstInt(ctx->i32,
3201 V_008DFC_SQ_EXP_PARAM + i, 0));
3202 }
3203 *num_param_exports = exports.num;
3204 }
3205 }
3206
3207 void ac_init_exec_full_mask(struct ac_llvm_context *ctx)
3208 {
3209 LLVMValueRef full_mask = LLVMConstInt(ctx->i64, ~0ull, 0);
3210 ac_build_intrinsic(ctx,
3211 "llvm.amdgcn.init.exec", ctx->voidt,
3212 &full_mask, 1, AC_FUNC_ATTR_CONVERGENT);
3213 }
3214
3215 void ac_declare_lds_as_pointer(struct ac_llvm_context *ctx)
3216 {
3217 unsigned lds_size = ctx->chip_class >= GFX7 ? 65536 : 32768;
3218 ctx->lds = LLVMBuildIntToPtr(ctx->builder, ctx->i32_0,
3219 LLVMPointerType(LLVMArrayType(ctx->i32, lds_size / 4), AC_ADDR_SPACE_LDS),
3220 "lds");
3221 }
3222
3223 LLVMValueRef ac_lds_load(struct ac_llvm_context *ctx,
3224 LLVMValueRef dw_addr)
3225 {
3226 return LLVMBuildLoad(ctx->builder, ac_build_gep0(ctx, ctx->lds, dw_addr), "");
3227 }
3228
3229 void ac_lds_store(struct ac_llvm_context *ctx,
3230 LLVMValueRef dw_addr,
3231 LLVMValueRef value)
3232 {
3233 value = ac_to_integer(ctx, value);
3234 ac_build_indexed_store(ctx, ctx->lds,
3235 dw_addr, value);
3236 }
3237
3238 LLVMValueRef ac_find_lsb(struct ac_llvm_context *ctx,
3239 LLVMTypeRef dst_type,
3240 LLVMValueRef src0)
3241 {
3242 unsigned src0_bitsize = ac_get_elem_bits(ctx, LLVMTypeOf(src0));
3243 const char *intrin_name;
3244 LLVMTypeRef type;
3245 LLVMValueRef zero;
3246
3247 switch (src0_bitsize) {
3248 case 64:
3249 intrin_name = "llvm.cttz.i64";
3250 type = ctx->i64;
3251 zero = ctx->i64_0;
3252 break;
3253 case 32:
3254 intrin_name = "llvm.cttz.i32";
3255 type = ctx->i32;
3256 zero = ctx->i32_0;
3257 break;
3258 case 16:
3259 intrin_name = "llvm.cttz.i16";
3260 type = ctx->i16;
3261 zero = ctx->i16_0;
3262 break;
3263 case 8:
3264 intrin_name = "llvm.cttz.i8";
3265 type = ctx->i8;
3266 zero = ctx->i8_0;
3267 break;
3268 default:
3269 unreachable(!"invalid bitsize");
3270 }
3271
3272 LLVMValueRef params[2] = {
3273 src0,
3274
3275 /* The value of 1 means that ffs(x=0) = undef, so LLVM won't
3276 * add special code to check for x=0. The reason is that
3277 * the LLVM behavior for x=0 is different from what we
3278 * need here. However, LLVM also assumes that ffs(x) is
3279 * in [0, 31], but GLSL expects that ffs(0) = -1, so
3280 * a conditional assignment to handle 0 is still required.
3281 *
3282 * The hardware already implements the correct behavior.
3283 */
3284 ctx->i1true,
3285 };
3286
3287 LLVMValueRef lsb = ac_build_intrinsic(ctx, intrin_name, type,
3288 params, 2,
3289 AC_FUNC_ATTR_READNONE);
3290
3291 if (src0_bitsize == 64) {
3292 lsb = LLVMBuildTrunc(ctx->builder, lsb, ctx->i32, "");
3293 } else if (src0_bitsize < 32) {
3294 lsb = LLVMBuildSExt(ctx->builder, lsb, ctx->i32, "");
3295 }
3296
3297 /* TODO: We need an intrinsic to skip this conditional. */
3298 /* Check for zero: */
3299 return LLVMBuildSelect(ctx->builder, LLVMBuildICmp(ctx->builder,
3300 LLVMIntEQ, src0,
3301 zero, ""),
3302 LLVMConstInt(ctx->i32, -1, 0), lsb, "");
3303 }
3304
3305 LLVMTypeRef ac_array_in_const_addr_space(LLVMTypeRef elem_type)
3306 {
3307 return LLVMPointerType(elem_type, AC_ADDR_SPACE_CONST);
3308 }
3309
3310 LLVMTypeRef ac_array_in_const32_addr_space(LLVMTypeRef elem_type)
3311 {
3312 return LLVMPointerType(elem_type, AC_ADDR_SPACE_CONST_32BIT);
3313 }
3314
3315 static struct ac_llvm_flow *
3316 get_current_flow(struct ac_llvm_context *ctx)
3317 {
3318 if (ctx->flow->depth > 0)
3319 return &ctx->flow->stack[ctx->flow->depth - 1];
3320 return NULL;
3321 }
3322
3323 static struct ac_llvm_flow *
3324 get_innermost_loop(struct ac_llvm_context *ctx)
3325 {
3326 for (unsigned i = ctx->flow->depth; i > 0; --i) {
3327 if (ctx->flow->stack[i - 1].loop_entry_block)
3328 return &ctx->flow->stack[i - 1];
3329 }
3330 return NULL;
3331 }
3332
3333 static struct ac_llvm_flow *
3334 push_flow(struct ac_llvm_context *ctx)
3335 {
3336 struct ac_llvm_flow *flow;
3337
3338 if (ctx->flow->depth >= ctx->flow->depth_max) {
3339 unsigned new_max = MAX2(ctx->flow->depth << 1,
3340 AC_LLVM_INITIAL_CF_DEPTH);
3341
3342 ctx->flow->stack = realloc(ctx->flow->stack, new_max * sizeof(*ctx->flow->stack));
3343 ctx->flow->depth_max = new_max;
3344 }
3345
3346 flow = &ctx->flow->stack[ctx->flow->depth];
3347 ctx->flow->depth++;
3348
3349 flow->next_block = NULL;
3350 flow->loop_entry_block = NULL;
3351 return flow;
3352 }
3353
3354 static void set_basicblock_name(LLVMBasicBlockRef bb, const char *base,
3355 int label_id)
3356 {
3357 char buf[32];
3358 snprintf(buf, sizeof(buf), "%s%d", base, label_id);
3359 LLVMSetValueName(LLVMBasicBlockAsValue(bb), buf);
3360 }
3361
3362 /* Append a basic block at the level of the parent flow.
3363 */
3364 static LLVMBasicBlockRef append_basic_block(struct ac_llvm_context *ctx,
3365 const char *name)
3366 {
3367 assert(ctx->flow->depth >= 1);
3368
3369 if (ctx->flow->depth >= 2) {
3370 struct ac_llvm_flow *flow = &ctx->flow->stack[ctx->flow->depth - 2];
3371
3372 return LLVMInsertBasicBlockInContext(ctx->context,
3373 flow->next_block, name);
3374 }
3375
3376 LLVMValueRef main_fn =
3377 LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx->builder));
3378 return LLVMAppendBasicBlockInContext(ctx->context, main_fn, name);
3379 }
3380
3381 /* Emit a branch to the given default target for the current block if
3382 * applicable -- that is, if the current block does not already contain a
3383 * branch from a break or continue.
3384 */
3385 static void emit_default_branch(LLVMBuilderRef builder,
3386 LLVMBasicBlockRef target)
3387 {
3388 if (!LLVMGetBasicBlockTerminator(LLVMGetInsertBlock(builder)))
3389 LLVMBuildBr(builder, target);
3390 }
3391
3392 void ac_build_bgnloop(struct ac_llvm_context *ctx, int label_id)
3393 {
3394 struct ac_llvm_flow *flow = push_flow(ctx);
3395 flow->loop_entry_block = append_basic_block(ctx, "LOOP");
3396 flow->next_block = append_basic_block(ctx, "ENDLOOP");
3397 set_basicblock_name(flow->loop_entry_block, "loop", label_id);
3398 LLVMBuildBr(ctx->builder, flow->loop_entry_block);
3399 LLVMPositionBuilderAtEnd(ctx->builder, flow->loop_entry_block);
3400 }
3401
3402 void ac_build_break(struct ac_llvm_context *ctx)
3403 {
3404 struct ac_llvm_flow *flow = get_innermost_loop(ctx);
3405 LLVMBuildBr(ctx->builder, flow->next_block);
3406 }
3407
3408 void ac_build_continue(struct ac_llvm_context *ctx)
3409 {
3410 struct ac_llvm_flow *flow = get_innermost_loop(ctx);
3411 LLVMBuildBr(ctx->builder, flow->loop_entry_block);
3412 }
3413
3414 void ac_build_else(struct ac_llvm_context *ctx, int label_id)
3415 {
3416 struct ac_llvm_flow *current_branch = get_current_flow(ctx);
3417 LLVMBasicBlockRef endif_block;
3418
3419 assert(!current_branch->loop_entry_block);
3420
3421 endif_block = append_basic_block(ctx, "ENDIF");
3422 emit_default_branch(ctx->builder, endif_block);
3423
3424 LLVMPositionBuilderAtEnd(ctx->builder, current_branch->next_block);
3425 set_basicblock_name(current_branch->next_block, "else", label_id);
3426
3427 current_branch->next_block = endif_block;
3428 }
3429
3430 void ac_build_endif(struct ac_llvm_context *ctx, int label_id)
3431 {
3432 struct ac_llvm_flow *current_branch = get_current_flow(ctx);
3433
3434 assert(!current_branch->loop_entry_block);
3435
3436 emit_default_branch(ctx->builder, current_branch->next_block);
3437 LLVMPositionBuilderAtEnd(ctx->builder, current_branch->next_block);
3438 set_basicblock_name(current_branch->next_block, "endif", label_id);
3439
3440 ctx->flow->depth--;
3441 }
3442
3443 void ac_build_endloop(struct ac_llvm_context *ctx, int label_id)
3444 {
3445 struct ac_llvm_flow *current_loop = get_current_flow(ctx);
3446
3447 assert(current_loop->loop_entry_block);
3448
3449 emit_default_branch(ctx->builder, current_loop->loop_entry_block);
3450
3451 LLVMPositionBuilderAtEnd(ctx->builder, current_loop->next_block);
3452 set_basicblock_name(current_loop->next_block, "endloop", label_id);
3453 ctx->flow->depth--;
3454 }
3455
3456 void ac_build_ifcc(struct ac_llvm_context *ctx, LLVMValueRef cond, int label_id)
3457 {
3458 struct ac_llvm_flow *flow = push_flow(ctx);
3459 LLVMBasicBlockRef if_block;
3460
3461 if_block = append_basic_block(ctx, "IF");
3462 flow->next_block = append_basic_block(ctx, "ELSE");
3463 set_basicblock_name(if_block, "if", label_id);
3464 LLVMBuildCondBr(ctx->builder, cond, if_block, flow->next_block);
3465 LLVMPositionBuilderAtEnd(ctx->builder, if_block);
3466 }
3467
3468 void ac_build_if(struct ac_llvm_context *ctx, LLVMValueRef value,
3469 int label_id)
3470 {
3471 LLVMValueRef cond = LLVMBuildFCmp(ctx->builder, LLVMRealUNE,
3472 value, ctx->f32_0, "");
3473 ac_build_ifcc(ctx, cond, label_id);
3474 }
3475
3476 void ac_build_uif(struct ac_llvm_context *ctx, LLVMValueRef value,
3477 int label_id)
3478 {
3479 LLVMValueRef cond = LLVMBuildICmp(ctx->builder, LLVMIntNE,
3480 ac_to_integer(ctx, value),
3481 ctx->i32_0, "");
3482 ac_build_ifcc(ctx, cond, label_id);
3483 }
3484
3485 LLVMValueRef ac_build_alloca_undef(struct ac_llvm_context *ac, LLVMTypeRef type,
3486 const char *name)
3487 {
3488 LLVMBuilderRef builder = ac->builder;
3489 LLVMBasicBlockRef current_block = LLVMGetInsertBlock(builder);
3490 LLVMValueRef function = LLVMGetBasicBlockParent(current_block);
3491 LLVMBasicBlockRef first_block = LLVMGetEntryBasicBlock(function);
3492 LLVMValueRef first_instr = LLVMGetFirstInstruction(first_block);
3493 LLVMBuilderRef first_builder = LLVMCreateBuilderInContext(ac->context);
3494 LLVMValueRef res;
3495
3496 if (first_instr) {
3497 LLVMPositionBuilderBefore(first_builder, first_instr);
3498 } else {
3499 LLVMPositionBuilderAtEnd(first_builder, first_block);
3500 }
3501
3502 res = LLVMBuildAlloca(first_builder, type, name);
3503 LLVMDisposeBuilder(first_builder);
3504 return res;
3505 }
3506
3507 LLVMValueRef ac_build_alloca(struct ac_llvm_context *ac,
3508 LLVMTypeRef type, const char *name)
3509 {
3510 LLVMValueRef ptr = ac_build_alloca_undef(ac, type, name);
3511 LLVMBuildStore(ac->builder, LLVMConstNull(type), ptr);
3512 return ptr;
3513 }
3514
3515 LLVMValueRef ac_cast_ptr(struct ac_llvm_context *ctx, LLVMValueRef ptr,
3516 LLVMTypeRef type)
3517 {
3518 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3519 return LLVMBuildBitCast(ctx->builder, ptr,
3520 LLVMPointerType(type, addr_space), "");
3521 }
3522
3523 LLVMValueRef ac_trim_vector(struct ac_llvm_context *ctx, LLVMValueRef value,
3524 unsigned count)
3525 {
3526 unsigned num_components = ac_get_llvm_num_components(value);
3527 if (count == num_components)
3528 return value;
3529
3530 LLVMValueRef masks[MAX2(count, 2)];
3531 masks[0] = ctx->i32_0;
3532 masks[1] = ctx->i32_1;
3533 for (unsigned i = 2; i < count; i++)
3534 masks[i] = LLVMConstInt(ctx->i32, i, false);
3535
3536 if (count == 1)
3537 return LLVMBuildExtractElement(ctx->builder, value, masks[0],
3538 "");
3539
3540 LLVMValueRef swizzle = LLVMConstVector(masks, count);
3541 return LLVMBuildShuffleVector(ctx->builder, value, value, swizzle, "");
3542 }
3543
3544 LLVMValueRef ac_unpack_param(struct ac_llvm_context *ctx, LLVMValueRef param,
3545 unsigned rshift, unsigned bitwidth)
3546 {
3547 LLVMValueRef value = param;
3548 if (rshift)
3549 value = LLVMBuildLShr(ctx->builder, value,
3550 LLVMConstInt(ctx->i32, rshift, false), "");
3551
3552 if (rshift + bitwidth < 32) {
3553 unsigned mask = (1 << bitwidth) - 1;
3554 value = LLVMBuildAnd(ctx->builder, value,
3555 LLVMConstInt(ctx->i32, mask, false), "");
3556 }
3557 return value;
3558 }
3559
3560 /* Adjust the sample index according to FMASK.
3561 *
3562 * For uncompressed MSAA surfaces, FMASK should return 0x76543210,
3563 * which is the identity mapping. Each nibble says which physical sample
3564 * should be fetched to get that sample.
3565 *
3566 * For example, 0x11111100 means there are only 2 samples stored and
3567 * the second sample covers 3/4 of the pixel. When reading samples 0
3568 * and 1, return physical sample 0 (determined by the first two 0s
3569 * in FMASK), otherwise return physical sample 1.
3570 *
3571 * The sample index should be adjusted as follows:
3572 * addr[sample_index] = (fmask >> (addr[sample_index] * 4)) & 0xF;
3573 */
3574 void ac_apply_fmask_to_sample(struct ac_llvm_context *ac, LLVMValueRef fmask,
3575 LLVMValueRef *addr, bool is_array_tex)
3576 {
3577 struct ac_image_args fmask_load = {};
3578 fmask_load.opcode = ac_image_load;
3579 fmask_load.resource = fmask;
3580 fmask_load.dmask = 0xf;
3581 fmask_load.dim = is_array_tex ? ac_image_2darray : ac_image_2d;
3582 fmask_load.attributes = AC_FUNC_ATTR_READNONE;
3583
3584 fmask_load.coords[0] = addr[0];
3585 fmask_load.coords[1] = addr[1];
3586 if (is_array_tex)
3587 fmask_load.coords[2] = addr[2];
3588
3589 LLVMValueRef fmask_value = ac_build_image_opcode(ac, &fmask_load);
3590 fmask_value = LLVMBuildExtractElement(ac->builder, fmask_value,
3591 ac->i32_0, "");
3592
3593 /* Apply the formula. */
3594 unsigned sample_chan = is_array_tex ? 3 : 2;
3595 LLVMValueRef final_sample;
3596 final_sample = LLVMBuildMul(ac->builder, addr[sample_chan],
3597 LLVMConstInt(ac->i32, 4, 0), "");
3598 final_sample = LLVMBuildLShr(ac->builder, fmask_value, final_sample, "");
3599 /* Mask the sample index by 0x7, because 0x8 means an unknown value
3600 * with EQAA, so those will map to 0. */
3601 final_sample = LLVMBuildAnd(ac->builder, final_sample,
3602 LLVMConstInt(ac->i32, 0x7, 0), "");
3603
3604 /* Don't rewrite the sample index if WORD1.DATA_FORMAT of the FMASK
3605 * resource descriptor is 0 (invalid).
3606 */
3607 LLVMValueRef tmp;
3608 tmp = LLVMBuildBitCast(ac->builder, fmask, ac->v8i32, "");
3609 tmp = LLVMBuildExtractElement(ac->builder, tmp, ac->i32_1, "");
3610 tmp = LLVMBuildICmp(ac->builder, LLVMIntNE, tmp, ac->i32_0, "");
3611
3612 /* Replace the MSAA sample index. */
3613 addr[sample_chan] = LLVMBuildSelect(ac->builder, tmp, final_sample,
3614 addr[sample_chan], "");
3615 }
3616
3617 static LLVMValueRef
3618 _ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src,
3619 LLVMValueRef lane, bool with_opt_barrier)
3620 {
3621 LLVMTypeRef type = LLVMTypeOf(src);
3622 LLVMValueRef result;
3623
3624 if (with_opt_barrier)
3625 ac_build_optimization_barrier(ctx, &src);
3626
3627 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3628 if (lane)
3629 lane = LLVMBuildZExt(ctx->builder, lane, ctx->i32, "");
3630
3631 result = ac_build_intrinsic(ctx,
3632 lane == NULL ? "llvm.amdgcn.readfirstlane" : "llvm.amdgcn.readlane",
3633 ctx->i32, (LLVMValueRef []) { src, lane },
3634 lane == NULL ? 1 : 2,
3635 AC_FUNC_ATTR_READNONE |
3636 AC_FUNC_ATTR_CONVERGENT);
3637
3638 return LLVMBuildTrunc(ctx->builder, result, type, "");
3639 }
3640
3641 static LLVMValueRef
3642 ac_build_readlane_common(struct ac_llvm_context *ctx,
3643 LLVMValueRef src, LLVMValueRef lane,
3644 bool with_opt_barrier)
3645 {
3646 LLVMTypeRef src_type = LLVMTypeOf(src);
3647 src = ac_to_integer(ctx, src);
3648 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3649 LLVMValueRef ret;
3650
3651 if (bits > 32) {
3652 assert(bits % 32 == 0);
3653 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3654 LLVMValueRef src_vector =
3655 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3656 ret = LLVMGetUndef(vec_type);
3657 for (unsigned i = 0; i < bits / 32; i++) {
3658 LLVMValueRef ret_comp;
3659
3660 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3661 LLVMConstInt(ctx->i32, i, 0), "");
3662
3663 ret_comp = _ac_build_readlane(ctx, src, lane,
3664 with_opt_barrier);
3665
3666 ret = LLVMBuildInsertElement(ctx->builder, ret, ret_comp,
3667 LLVMConstInt(ctx->i32, i, 0), "");
3668 }
3669 } else {
3670 ret = _ac_build_readlane(ctx, src, lane, with_opt_barrier);
3671 }
3672
3673 if (LLVMGetTypeKind(src_type) == LLVMPointerTypeKind)
3674 return LLVMBuildIntToPtr(ctx->builder, ret, src_type, "");
3675 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3676 }
3677
3678 /**
3679 * Builds the "llvm.amdgcn.readlane" or "llvm.amdgcn.readfirstlane" intrinsic.
3680 *
3681 * The optimization barrier is not needed if the value is the same in all lanes
3682 * or if this is called in the outermost block.
3683 *
3684 * @param ctx
3685 * @param src
3686 * @param lane - id of the lane or NULL for the first active lane
3687 * @return value of the lane
3688 */
3689 LLVMValueRef ac_build_readlane_no_opt_barrier(struct ac_llvm_context *ctx,
3690 LLVMValueRef src, LLVMValueRef lane)
3691 {
3692 return ac_build_readlane_common(ctx, src, lane, false);
3693 }
3694
3695
3696 LLVMValueRef
3697 ac_build_readlane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef lane)
3698 {
3699 return ac_build_readlane_common(ctx, src, lane, true);
3700 }
3701
3702 LLVMValueRef
3703 ac_build_writelane(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef value, LLVMValueRef lane)
3704 {
3705 return ac_build_intrinsic(ctx, "llvm.amdgcn.writelane", ctx->i32,
3706 (LLVMValueRef []) {value, lane, src}, 3,
3707 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3708 }
3709
3710 LLVMValueRef
3711 ac_build_mbcnt(struct ac_llvm_context *ctx, LLVMValueRef mask)
3712 {
3713 if (ctx->wave_size == 32) {
3714 return ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.lo", ctx->i32,
3715 (LLVMValueRef []) { mask, ctx->i32_0 },
3716 2, AC_FUNC_ATTR_READNONE);
3717 }
3718 LLVMValueRef mask_vec = LLVMBuildBitCast(ctx->builder, mask, ctx->v2i32, "");
3719 LLVMValueRef mask_lo = LLVMBuildExtractElement(ctx->builder, mask_vec,
3720 ctx->i32_0, "");
3721 LLVMValueRef mask_hi = LLVMBuildExtractElement(ctx->builder, mask_vec,
3722 ctx->i32_1, "");
3723 LLVMValueRef val =
3724 ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.lo", ctx->i32,
3725 (LLVMValueRef []) { mask_lo, ctx->i32_0 },
3726 2, AC_FUNC_ATTR_READNONE);
3727 val = ac_build_intrinsic(ctx, "llvm.amdgcn.mbcnt.hi", ctx->i32,
3728 (LLVMValueRef []) { mask_hi, val },
3729 2, AC_FUNC_ATTR_READNONE);
3730 return val;
3731 }
3732
3733 enum dpp_ctrl {
3734 _dpp_quad_perm = 0x000,
3735 _dpp_row_sl = 0x100,
3736 _dpp_row_sr = 0x110,
3737 _dpp_row_rr = 0x120,
3738 dpp_wf_sl1 = 0x130,
3739 dpp_wf_rl1 = 0x134,
3740 dpp_wf_sr1 = 0x138,
3741 dpp_wf_rr1 = 0x13C,
3742 dpp_row_mirror = 0x140,
3743 dpp_row_half_mirror = 0x141,
3744 dpp_row_bcast15 = 0x142,
3745 dpp_row_bcast31 = 0x143
3746 };
3747
3748 static inline enum dpp_ctrl
3749 dpp_quad_perm(unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
3750 {
3751 assert(lane0 < 4 && lane1 < 4 && lane2 < 4 && lane3 < 4);
3752 return _dpp_quad_perm | lane0 | (lane1 << 2) | (lane2 << 4) | (lane3 << 6);
3753 }
3754
3755 static inline enum dpp_ctrl
3756 dpp_row_sl(unsigned amount)
3757 {
3758 assert(amount > 0 && amount < 16);
3759 return _dpp_row_sl | amount;
3760 }
3761
3762 static inline enum dpp_ctrl
3763 dpp_row_sr(unsigned amount)
3764 {
3765 assert(amount > 0 && amount < 16);
3766 return _dpp_row_sr | amount;
3767 }
3768
3769 static LLVMValueRef
3770 _ac_build_dpp(struct ac_llvm_context *ctx, LLVMValueRef old, LLVMValueRef src,
3771 enum dpp_ctrl dpp_ctrl, unsigned row_mask, unsigned bank_mask,
3772 bool bound_ctrl)
3773 {
3774 LLVMTypeRef type = LLVMTypeOf(src);
3775 LLVMValueRef res;
3776
3777 old = LLVMBuildZExt(ctx->builder, old, ctx->i32, "");
3778 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3779
3780 res = ac_build_intrinsic(ctx, "llvm.amdgcn.update.dpp.i32", ctx->i32,
3781 (LLVMValueRef[]) {
3782 old, src,
3783 LLVMConstInt(ctx->i32, dpp_ctrl, 0),
3784 LLVMConstInt(ctx->i32, row_mask, 0),
3785 LLVMConstInt(ctx->i32, bank_mask, 0),
3786 LLVMConstInt(ctx->i1, bound_ctrl, 0) },
3787 6, AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3788
3789 return LLVMBuildTrunc(ctx->builder, res, type, "");
3790 }
3791
3792 static LLVMValueRef
3793 ac_build_dpp(struct ac_llvm_context *ctx, LLVMValueRef old, LLVMValueRef src,
3794 enum dpp_ctrl dpp_ctrl, unsigned row_mask, unsigned bank_mask,
3795 bool bound_ctrl)
3796 {
3797 LLVMTypeRef src_type = LLVMTypeOf(src);
3798 src = ac_to_integer(ctx, src);
3799 old = ac_to_integer(ctx, old);
3800 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3801 LLVMValueRef ret;
3802 if (bits > 32) {
3803 assert(bits % 32 == 0);
3804 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3805 LLVMValueRef src_vector =
3806 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3807 LLVMValueRef old_vector =
3808 LLVMBuildBitCast(ctx->builder, old, vec_type, "");
3809 ret = LLVMGetUndef(vec_type);
3810 for (unsigned i = 0; i < bits / 32; i++) {
3811 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3812 LLVMConstInt(ctx->i32, i,
3813 0), "");
3814 old = LLVMBuildExtractElement(ctx->builder, old_vector,
3815 LLVMConstInt(ctx->i32, i,
3816 0), "");
3817 LLVMValueRef ret_comp = _ac_build_dpp(ctx, old, src,
3818 dpp_ctrl,
3819 row_mask,
3820 bank_mask,
3821 bound_ctrl);
3822 ret = LLVMBuildInsertElement(ctx->builder, ret,
3823 ret_comp,
3824 LLVMConstInt(ctx->i32, i,
3825 0), "");
3826 }
3827 } else {
3828 ret = _ac_build_dpp(ctx, old, src, dpp_ctrl, row_mask,
3829 bank_mask, bound_ctrl);
3830 }
3831 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3832 }
3833
3834 static LLVMValueRef
3835 _ac_build_permlane16(struct ac_llvm_context *ctx, LLVMValueRef src, uint64_t sel,
3836 bool exchange_rows, bool bound_ctrl)
3837 {
3838 LLVMTypeRef type = LLVMTypeOf(src);
3839 LLVMValueRef result;
3840
3841 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3842
3843 LLVMValueRef args[6] = {
3844 src,
3845 src,
3846 LLVMConstInt(ctx->i32, sel, false),
3847 LLVMConstInt(ctx->i32, sel >> 32, false),
3848 ctx->i1true, /* fi */
3849 bound_ctrl ? ctx->i1true : ctx->i1false,
3850 };
3851
3852 result = ac_build_intrinsic(ctx, exchange_rows ? "llvm.amdgcn.permlanex16"
3853 : "llvm.amdgcn.permlane16",
3854 ctx->i32, args, 6,
3855 AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3856
3857 return LLVMBuildTrunc(ctx->builder, result, type, "");
3858 }
3859
3860 static LLVMValueRef
3861 ac_build_permlane16(struct ac_llvm_context *ctx, LLVMValueRef src, uint64_t sel,
3862 bool exchange_rows, bool bound_ctrl)
3863 {
3864 LLVMTypeRef src_type = LLVMTypeOf(src);
3865 src = ac_to_integer(ctx, src);
3866 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3867 LLVMValueRef ret;
3868 if (bits > 32) {
3869 assert(bits % 32 == 0);
3870 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3871 LLVMValueRef src_vector =
3872 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3873 ret = LLVMGetUndef(vec_type);
3874 for (unsigned i = 0; i < bits / 32; i++) {
3875 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3876 LLVMConstInt(ctx->i32, i,
3877 0), "");
3878 LLVMValueRef ret_comp =
3879 _ac_build_permlane16(ctx, src, sel,
3880 exchange_rows,
3881 bound_ctrl);
3882 ret = LLVMBuildInsertElement(ctx->builder, ret,
3883 ret_comp,
3884 LLVMConstInt(ctx->i32, i,
3885 0), "");
3886 }
3887 } else {
3888 ret = _ac_build_permlane16(ctx, src, sel, exchange_rows,
3889 bound_ctrl);
3890 }
3891 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3892 }
3893
3894 static inline unsigned
3895 ds_pattern_bitmode(unsigned and_mask, unsigned or_mask, unsigned xor_mask)
3896 {
3897 assert(and_mask < 32 && or_mask < 32 && xor_mask < 32);
3898 return and_mask | (or_mask << 5) | (xor_mask << 10);
3899 }
3900
3901 static LLVMValueRef
3902 _ac_build_ds_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned mask)
3903 {
3904 LLVMTypeRef src_type = LLVMTypeOf(src);
3905 LLVMValueRef ret;
3906
3907 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3908
3909 ret = ac_build_intrinsic(ctx, "llvm.amdgcn.ds.swizzle", ctx->i32,
3910 (LLVMValueRef []) {
3911 src, LLVMConstInt(ctx->i32, mask, 0) },
3912 2, AC_FUNC_ATTR_READNONE | AC_FUNC_ATTR_CONVERGENT);
3913
3914 return LLVMBuildTrunc(ctx->builder, ret, src_type, "");
3915 }
3916
3917 LLVMValueRef
3918 ac_build_ds_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src, unsigned mask)
3919 {
3920 LLVMTypeRef src_type = LLVMTypeOf(src);
3921 src = ac_to_integer(ctx, src);
3922 unsigned bits = LLVMGetIntTypeWidth(LLVMTypeOf(src));
3923 LLVMValueRef ret;
3924 if (bits > 32) {
3925 assert(bits % 32 == 0);
3926 LLVMTypeRef vec_type = LLVMVectorType(ctx->i32, bits / 32);
3927 LLVMValueRef src_vector =
3928 LLVMBuildBitCast(ctx->builder, src, vec_type, "");
3929 ret = LLVMGetUndef(vec_type);
3930 for (unsigned i = 0; i < bits / 32; i++) {
3931 src = LLVMBuildExtractElement(ctx->builder, src_vector,
3932 LLVMConstInt(ctx->i32, i,
3933 0), "");
3934 LLVMValueRef ret_comp = _ac_build_ds_swizzle(ctx, src,
3935 mask);
3936 ret = LLVMBuildInsertElement(ctx->builder, ret,
3937 ret_comp,
3938 LLVMConstInt(ctx->i32, i,
3939 0), "");
3940 }
3941 } else {
3942 ret = _ac_build_ds_swizzle(ctx, src, mask);
3943 }
3944 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3945 }
3946
3947 static LLVMValueRef
3948 ac_build_wwm(struct ac_llvm_context *ctx, LLVMValueRef src)
3949 {
3950 LLVMTypeRef src_type = LLVMTypeOf(src);
3951 unsigned bitsize = ac_get_elem_bits(ctx, src_type);
3952 char name[32], type[8];
3953 LLVMValueRef ret;
3954
3955 src = ac_to_integer(ctx, src);
3956
3957 if (bitsize < 32)
3958 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3959
3960 ac_build_type_name_for_intr(LLVMTypeOf(src), type, sizeof(type));
3961 snprintf(name, sizeof(name), "llvm.amdgcn.wwm.%s", type);
3962 ret = ac_build_intrinsic(ctx, name, LLVMTypeOf(src),
3963 (LLVMValueRef []) { src }, 1,
3964 AC_FUNC_ATTR_READNONE);
3965
3966 if (bitsize < 32)
3967 ret = LLVMBuildTrunc(ctx->builder, ret,
3968 ac_to_integer_type(ctx, src_type), "");
3969
3970 return LLVMBuildBitCast(ctx->builder, ret, src_type, "");
3971 }
3972
3973 static LLVMValueRef
3974 ac_build_set_inactive(struct ac_llvm_context *ctx, LLVMValueRef src,
3975 LLVMValueRef inactive)
3976 {
3977 char name[33], type[8];
3978 LLVMTypeRef src_type = LLVMTypeOf(src);
3979 unsigned bitsize = ac_get_elem_bits(ctx, src_type);
3980 src = ac_to_integer(ctx, src);
3981 inactive = ac_to_integer(ctx, inactive);
3982
3983 if (bitsize < 32) {
3984 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
3985 inactive = LLVMBuildZExt(ctx->builder, inactive, ctx->i32, "");
3986 }
3987
3988 ac_build_type_name_for_intr(LLVMTypeOf(src), type, sizeof(type));
3989 snprintf(name, sizeof(name), "llvm.amdgcn.set.inactive.%s", type);
3990 LLVMValueRef ret =
3991 ac_build_intrinsic(ctx, name,
3992 LLVMTypeOf(src), (LLVMValueRef []) {
3993 src, inactive }, 2,
3994 AC_FUNC_ATTR_READNONE |
3995 AC_FUNC_ATTR_CONVERGENT);
3996 if (bitsize < 32)
3997 ret = LLVMBuildTrunc(ctx->builder, ret, src_type, "");
3998
3999 return ret;
4000 }
4001
4002 static LLVMValueRef
4003 get_reduction_identity(struct ac_llvm_context *ctx, nir_op op, unsigned type_size)
4004 {
4005 if (type_size == 1) {
4006 switch (op) {
4007 case nir_op_iadd: return ctx->i8_0;
4008 case nir_op_imul: return ctx->i8_1;
4009 case nir_op_imin: return LLVMConstInt(ctx->i8, INT8_MAX, 0);
4010 case nir_op_umin: return LLVMConstInt(ctx->i8, UINT8_MAX, 0);
4011 case nir_op_imax: return LLVMConstInt(ctx->i8, INT8_MIN, 0);
4012 case nir_op_umax: return ctx->i8_0;
4013 case nir_op_iand: return LLVMConstInt(ctx->i8, -1, 0);
4014 case nir_op_ior: return ctx->i8_0;
4015 case nir_op_ixor: return ctx->i8_0;
4016 default:
4017 unreachable("bad reduction intrinsic");
4018 }
4019 } else if (type_size == 2) {
4020 switch (op) {
4021 case nir_op_iadd: return ctx->i16_0;
4022 case nir_op_fadd: return ctx->f16_0;
4023 case nir_op_imul: return ctx->i16_1;
4024 case nir_op_fmul: return ctx->f16_1;
4025 case nir_op_imin: return LLVMConstInt(ctx->i16, INT16_MAX, 0);
4026 case nir_op_umin: return LLVMConstInt(ctx->i16, UINT16_MAX, 0);
4027 case nir_op_fmin: return LLVMConstReal(ctx->f16, INFINITY);
4028 case nir_op_imax: return LLVMConstInt(ctx->i16, INT16_MIN, 0);
4029 case nir_op_umax: return ctx->i16_0;
4030 case nir_op_fmax: return LLVMConstReal(ctx->f16, -INFINITY);
4031 case nir_op_iand: return LLVMConstInt(ctx->i16, -1, 0);
4032 case nir_op_ior: return ctx->i16_0;
4033 case nir_op_ixor: return ctx->i16_0;
4034 default:
4035 unreachable("bad reduction intrinsic");
4036 }
4037 } else if (type_size == 4) {
4038 switch (op) {
4039 case nir_op_iadd: return ctx->i32_0;
4040 case nir_op_fadd: return ctx->f32_0;
4041 case nir_op_imul: return ctx->i32_1;
4042 case nir_op_fmul: return ctx->f32_1;
4043 case nir_op_imin: return LLVMConstInt(ctx->i32, INT32_MAX, 0);
4044 case nir_op_umin: return LLVMConstInt(ctx->i32, UINT32_MAX, 0);
4045 case nir_op_fmin: return LLVMConstReal(ctx->f32, INFINITY);
4046 case nir_op_imax: return LLVMConstInt(ctx->i32, INT32_MIN, 0);
4047 case nir_op_umax: return ctx->i32_0;
4048 case nir_op_fmax: return LLVMConstReal(ctx->f32, -INFINITY);
4049 case nir_op_iand: return LLVMConstInt(ctx->i32, -1, 0);
4050 case nir_op_ior: return ctx->i32_0;
4051 case nir_op_ixor: return ctx->i32_0;
4052 default:
4053 unreachable("bad reduction intrinsic");
4054 }
4055 } else { /* type_size == 64bit */
4056 switch (op) {
4057 case nir_op_iadd: return ctx->i64_0;
4058 case nir_op_fadd: return ctx->f64_0;
4059 case nir_op_imul: return ctx->i64_1;
4060 case nir_op_fmul: return ctx->f64_1;
4061 case nir_op_imin: return LLVMConstInt(ctx->i64, INT64_MAX, 0);
4062 case nir_op_umin: return LLVMConstInt(ctx->i64, UINT64_MAX, 0);
4063 case nir_op_fmin: return LLVMConstReal(ctx->f64, INFINITY);
4064 case nir_op_imax: return LLVMConstInt(ctx->i64, INT64_MIN, 0);
4065 case nir_op_umax: return ctx->i64_0;
4066 case nir_op_fmax: return LLVMConstReal(ctx->f64, -INFINITY);
4067 case nir_op_iand: return LLVMConstInt(ctx->i64, -1, 0);
4068 case nir_op_ior: return ctx->i64_0;
4069 case nir_op_ixor: return ctx->i64_0;
4070 default:
4071 unreachable("bad reduction intrinsic");
4072 }
4073 }
4074 }
4075
4076 static LLVMValueRef
4077 ac_build_alu_op(struct ac_llvm_context *ctx, LLVMValueRef lhs, LLVMValueRef rhs, nir_op op)
4078 {
4079 bool _64bit = ac_get_type_size(LLVMTypeOf(lhs)) == 8;
4080 bool _32bit = ac_get_type_size(LLVMTypeOf(lhs)) == 4;
4081 switch (op) {
4082 case nir_op_iadd: return LLVMBuildAdd(ctx->builder, lhs, rhs, "");
4083 case nir_op_fadd: return LLVMBuildFAdd(ctx->builder, lhs, rhs, "");
4084 case nir_op_imul: return LLVMBuildMul(ctx->builder, lhs, rhs, "");
4085 case nir_op_fmul: return LLVMBuildFMul(ctx->builder, lhs, rhs, "");
4086 case nir_op_imin: return LLVMBuildSelect(ctx->builder,
4087 LLVMBuildICmp(ctx->builder, LLVMIntSLT, lhs, rhs, ""),
4088 lhs, rhs, "");
4089 case nir_op_umin: return LLVMBuildSelect(ctx->builder,
4090 LLVMBuildICmp(ctx->builder, LLVMIntULT, lhs, rhs, ""),
4091 lhs, rhs, "");
4092 case nir_op_fmin: return ac_build_intrinsic(ctx,
4093 _64bit ? "llvm.minnum.f64" : _32bit ? "llvm.minnum.f32" : "llvm.minnum.f16",
4094 _64bit ? ctx->f64 : _32bit ? ctx->f32 : ctx->f16,
4095 (LLVMValueRef[]){lhs, rhs}, 2, AC_FUNC_ATTR_READNONE);
4096 case nir_op_imax: return LLVMBuildSelect(ctx->builder,
4097 LLVMBuildICmp(ctx->builder, LLVMIntSGT, lhs, rhs, ""),
4098 lhs, rhs, "");
4099 case nir_op_umax: return LLVMBuildSelect(ctx->builder,
4100 LLVMBuildICmp(ctx->builder, LLVMIntUGT, lhs, rhs, ""),
4101 lhs, rhs, "");
4102 case nir_op_fmax: return ac_build_intrinsic(ctx,
4103 _64bit ? "llvm.maxnum.f64" : _32bit ? "llvm.maxnum.f32" : "llvm.maxnum.f16",
4104 _64bit ? ctx->f64 : _32bit ? ctx->f32 : ctx->f16,
4105 (LLVMValueRef[]){lhs, rhs}, 2, AC_FUNC_ATTR_READNONE);
4106 case nir_op_iand: return LLVMBuildAnd(ctx->builder, lhs, rhs, "");
4107 case nir_op_ior: return LLVMBuildOr(ctx->builder, lhs, rhs, "");
4108 case nir_op_ixor: return LLVMBuildXor(ctx->builder, lhs, rhs, "");
4109 default:
4110 unreachable("bad reduction intrinsic");
4111 }
4112 }
4113
4114 /**
4115 * \param src The value to shift.
4116 * \param identity The value to use the first lane.
4117 * \param maxprefix specifies that the result only needs to be correct for a
4118 * prefix of this many threads
4119 * \return src, shifted 1 lane up, and identity shifted into lane 0.
4120 */
4121 static LLVMValueRef
4122 ac_wavefront_shift_right_1(struct ac_llvm_context *ctx, LLVMValueRef src,
4123 LLVMValueRef identity, unsigned maxprefix)
4124 {
4125 if (ctx->chip_class >= GFX10) {
4126 /* wavefront shift_right by 1 on GFX10 (emulate dpp_wf_sr1) */
4127 LLVMValueRef active, tmp1, tmp2;
4128 LLVMValueRef tid = ac_get_thread_id(ctx);
4129
4130 tmp1 = ac_build_dpp(ctx, identity, src, dpp_row_sr(1), 0xf, 0xf, false);
4131
4132 tmp2 = ac_build_permlane16(ctx, src, (uint64_t)~0, true, false);
4133
4134 if (maxprefix > 32) {
4135 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid,
4136 LLVMConstInt(ctx->i32, 32, false), "");
4137
4138 tmp2 = LLVMBuildSelect(ctx->builder, active,
4139 ac_build_readlane(ctx, src,
4140 LLVMConstInt(ctx->i32, 31, false)),
4141 tmp2, "");
4142
4143 active = LLVMBuildOr(ctx->builder, active,
4144 LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4145 LLVMBuildAnd(ctx->builder, tid,
4146 LLVMConstInt(ctx->i32, 0x1f, false), ""),
4147 LLVMConstInt(ctx->i32, 0x10, false), ""), "");
4148 return LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4149 } else if (maxprefix > 16) {
4150 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid,
4151 LLVMConstInt(ctx->i32, 16, false), "");
4152
4153 return LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4154 }
4155 } else if (ctx->chip_class >= GFX8) {
4156 return ac_build_dpp(ctx, identity, src, dpp_wf_sr1, 0xf, 0xf, false);
4157 }
4158
4159 /* wavefront shift_right by 1 on SI/CI */
4160 LLVMValueRef active, tmp1, tmp2;
4161 LLVMValueRef tid = ac_get_thread_id(ctx);
4162 tmp1 = ac_build_ds_swizzle(ctx, src, (1 << 15) | dpp_quad_perm(0, 0, 1, 2));
4163 tmp2 = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x18, 0x03, 0x00));
4164 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4165 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 0x7, 0), ""),
4166 LLVMConstInt(ctx->i32, 0x4, 0), "");
4167 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4168 tmp2 = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x10, 0x07, 0x00));
4169 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4170 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 0xf, 0), ""),
4171 LLVMConstInt(ctx->i32, 0x8, 0), "");
4172 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4173 tmp2 = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x00, 0x0f, 0x00));
4174 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ,
4175 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 0x1f, 0), ""),
4176 LLVMConstInt(ctx->i32, 0x10, 0), "");
4177 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4178 tmp2 = ac_build_readlane(ctx, src, LLVMConstInt(ctx->i32, 31, 0));
4179 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid, LLVMConstInt(ctx->i32, 32, 0), "");
4180 tmp1 = LLVMBuildSelect(ctx->builder, active, tmp2, tmp1, "");
4181 active = LLVMBuildICmp(ctx->builder, LLVMIntEQ, tid, LLVMConstInt(ctx->i32, 0, 0), "");
4182 return LLVMBuildSelect(ctx->builder, active, identity, tmp1, "");
4183 }
4184
4185 /**
4186 * \param maxprefix specifies that the result only needs to be correct for a
4187 * prefix of this many threads
4188 */
4189 static LLVMValueRef
4190 ac_build_scan(struct ac_llvm_context *ctx, nir_op op, LLVMValueRef src, LLVMValueRef identity,
4191 unsigned maxprefix, bool inclusive)
4192 {
4193 LLVMValueRef result, tmp;
4194
4195 if (!inclusive)
4196 src = ac_wavefront_shift_right_1(ctx, src, identity, maxprefix);
4197
4198 result = src;
4199
4200 if (ctx->chip_class <= GFX7) {
4201 assert(maxprefix == 64);
4202 LLVMValueRef tid = ac_get_thread_id(ctx);
4203 LLVMValueRef active;
4204 tmp = ac_build_ds_swizzle(ctx, src, ds_pattern_bitmode(0x1e, 0x00, 0x00));
4205 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4206 LLVMBuildAnd(ctx->builder, tid, ctx->i32_1, ""),
4207 ctx->i32_0, "");
4208 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4209 result = ac_build_alu_op(ctx, result, tmp, op);
4210 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1c, 0x01, 0x00));
4211 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4212 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 2, 0), ""),
4213 ctx->i32_0, "");
4214 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4215 result = ac_build_alu_op(ctx, result, tmp, op);
4216 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x18, 0x03, 0x00));
4217 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4218 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 4, 0), ""),
4219 ctx->i32_0, "");
4220 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4221 result = ac_build_alu_op(ctx, result, tmp, op);
4222 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x10, 0x07, 0x00));
4223 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4224 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 8, 0), ""),
4225 ctx->i32_0, "");
4226 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4227 result = ac_build_alu_op(ctx, result, tmp, op);
4228 tmp = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x00, 0x0f, 0x00));
4229 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4230 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 16, 0), ""),
4231 ctx->i32_0, "");
4232 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4233 result = ac_build_alu_op(ctx, result, tmp, op);
4234 tmp = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 31, 0));
4235 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4236 LLVMBuildAnd(ctx->builder, tid, LLVMConstInt(ctx->i32, 32, 0), ""),
4237 ctx->i32_0, "");
4238 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4239 result = ac_build_alu_op(ctx, result, tmp, op);
4240 return result;
4241 }
4242
4243 if (maxprefix <= 1)
4244 return result;
4245 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(1), 0xf, 0xf, false);
4246 result = ac_build_alu_op(ctx, result, tmp, op);
4247 if (maxprefix <= 2)
4248 return result;
4249 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(2), 0xf, 0xf, false);
4250 result = ac_build_alu_op(ctx, result, tmp, op);
4251 if (maxprefix <= 3)
4252 return result;
4253 tmp = ac_build_dpp(ctx, identity, src, dpp_row_sr(3), 0xf, 0xf, false);
4254 result = ac_build_alu_op(ctx, result, tmp, op);
4255 if (maxprefix <= 4)
4256 return result;
4257 tmp = ac_build_dpp(ctx, identity, result, dpp_row_sr(4), 0xf, 0xe, false);
4258 result = ac_build_alu_op(ctx, result, tmp, op);
4259 if (maxprefix <= 8)
4260 return result;
4261 tmp = ac_build_dpp(ctx, identity, result, dpp_row_sr(8), 0xf, 0xc, false);
4262 result = ac_build_alu_op(ctx, result, tmp, op);
4263 if (maxprefix <= 16)
4264 return result;
4265
4266 if (ctx->chip_class >= GFX10) {
4267 LLVMValueRef tid = ac_get_thread_id(ctx);
4268 LLVMValueRef active;
4269
4270 tmp = ac_build_permlane16(ctx, result, ~(uint64_t)0, true, false);
4271
4272 active = LLVMBuildICmp(ctx->builder, LLVMIntNE,
4273 LLVMBuildAnd(ctx->builder, tid,
4274 LLVMConstInt(ctx->i32, 16, false), ""),
4275 ctx->i32_0, "");
4276
4277 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4278
4279 result = ac_build_alu_op(ctx, result, tmp, op);
4280
4281 if (maxprefix <= 32)
4282 return result;
4283
4284 tmp = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 31, false));
4285
4286 active = LLVMBuildICmp(ctx->builder, LLVMIntUGE, tid,
4287 LLVMConstInt(ctx->i32, 32, false), "");
4288
4289 tmp = LLVMBuildSelect(ctx->builder, active, tmp, identity, "");
4290
4291 result = ac_build_alu_op(ctx, result, tmp, op);
4292 return result;
4293 }
4294
4295 tmp = ac_build_dpp(ctx, identity, result, dpp_row_bcast15, 0xa, 0xf, false);
4296 result = ac_build_alu_op(ctx, result, tmp, op);
4297 if (maxprefix <= 32)
4298 return result;
4299 tmp = ac_build_dpp(ctx, identity, result, dpp_row_bcast31, 0xc, 0xf, false);
4300 result = ac_build_alu_op(ctx, result, tmp, op);
4301 return result;
4302 }
4303
4304 LLVMValueRef
4305 ac_build_inclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op)
4306 {
4307 LLVMValueRef result;
4308
4309 if (LLVMTypeOf(src) == ctx->i1 && op == nir_op_iadd) {
4310 LLVMBuilderRef builder = ctx->builder;
4311 src = LLVMBuildZExt(builder, src, ctx->i32, "");
4312 result = ac_build_ballot(ctx, src);
4313 result = ac_build_mbcnt(ctx, result);
4314 result = LLVMBuildAdd(builder, result, src, "");
4315 return result;
4316 }
4317
4318 ac_build_optimization_barrier(ctx, &src);
4319
4320 LLVMValueRef identity =
4321 get_reduction_identity(ctx, op, ac_get_type_size(LLVMTypeOf(src)));
4322 result = LLVMBuildBitCast(ctx->builder, ac_build_set_inactive(ctx, src, identity),
4323 LLVMTypeOf(identity), "");
4324 result = ac_build_scan(ctx, op, result, identity, ctx->wave_size, true);
4325
4326 return ac_build_wwm(ctx, result);
4327 }
4328
4329 LLVMValueRef
4330 ac_build_exclusive_scan(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op)
4331 {
4332 LLVMValueRef result;
4333
4334 if (LLVMTypeOf(src) == ctx->i1 && op == nir_op_iadd) {
4335 LLVMBuilderRef builder = ctx->builder;
4336 src = LLVMBuildZExt(builder, src, ctx->i32, "");
4337 result = ac_build_ballot(ctx, src);
4338 result = ac_build_mbcnt(ctx, result);
4339 return result;
4340 }
4341
4342 ac_build_optimization_barrier(ctx, &src);
4343
4344 LLVMValueRef identity =
4345 get_reduction_identity(ctx, op, ac_get_type_size(LLVMTypeOf(src)));
4346 result = LLVMBuildBitCast(ctx->builder, ac_build_set_inactive(ctx, src, identity),
4347 LLVMTypeOf(identity), "");
4348 result = ac_build_scan(ctx, op, result, identity, ctx->wave_size, false);
4349
4350 return ac_build_wwm(ctx, result);
4351 }
4352
4353 LLVMValueRef
4354 ac_build_reduce(struct ac_llvm_context *ctx, LLVMValueRef src, nir_op op, unsigned cluster_size)
4355 {
4356 if (cluster_size == 1) return src;
4357 ac_build_optimization_barrier(ctx, &src);
4358 LLVMValueRef result, swap;
4359 LLVMValueRef identity = get_reduction_identity(ctx, op,
4360 ac_get_type_size(LLVMTypeOf(src)));
4361 result = LLVMBuildBitCast(ctx->builder,
4362 ac_build_set_inactive(ctx, src, identity),
4363 LLVMTypeOf(identity), "");
4364 swap = ac_build_quad_swizzle(ctx, result, 1, 0, 3, 2);
4365 result = ac_build_alu_op(ctx, result, swap, op);
4366 if (cluster_size == 2) return ac_build_wwm(ctx, result);
4367
4368 swap = ac_build_quad_swizzle(ctx, result, 2, 3, 0, 1);
4369 result = ac_build_alu_op(ctx, result, swap, op);
4370 if (cluster_size == 4) return ac_build_wwm(ctx, result);
4371
4372 if (ctx->chip_class >= GFX8)
4373 swap = ac_build_dpp(ctx, identity, result, dpp_row_half_mirror, 0xf, 0xf, false);
4374 else
4375 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x04));
4376 result = ac_build_alu_op(ctx, result, swap, op);
4377 if (cluster_size == 8) return ac_build_wwm(ctx, result);
4378
4379 if (ctx->chip_class >= GFX8)
4380 swap = ac_build_dpp(ctx, identity, result, dpp_row_mirror, 0xf, 0xf, false);
4381 else
4382 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x08));
4383 result = ac_build_alu_op(ctx, result, swap, op);
4384 if (cluster_size == 16) return ac_build_wwm(ctx, result);
4385
4386 if (ctx->chip_class >= GFX10)
4387 swap = ac_build_permlane16(ctx, result, 0, true, false);
4388 else if (ctx->chip_class >= GFX8 && cluster_size != 32)
4389 swap = ac_build_dpp(ctx, identity, result, dpp_row_bcast15, 0xa, 0xf, false);
4390 else
4391 swap = ac_build_ds_swizzle(ctx, result, ds_pattern_bitmode(0x1f, 0, 0x10));
4392 result = ac_build_alu_op(ctx, result, swap, op);
4393 if (cluster_size == 32) return ac_build_wwm(ctx, result);
4394
4395 if (ctx->chip_class >= GFX8) {
4396 if (ctx->wave_size == 64) {
4397 if (ctx->chip_class >= GFX10)
4398 swap = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 31, false));
4399 else
4400 swap = ac_build_dpp(ctx, identity, result, dpp_row_bcast31, 0xc, 0xf, false);
4401 result = ac_build_alu_op(ctx, result, swap, op);
4402 result = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 63, 0));
4403 }
4404
4405 return ac_build_wwm(ctx, result);
4406 } else {
4407 swap = ac_build_readlane(ctx, result, ctx->i32_0);
4408 result = ac_build_readlane(ctx, result, LLVMConstInt(ctx->i32, 32, 0));
4409 result = ac_build_alu_op(ctx, result, swap, op);
4410 return ac_build_wwm(ctx, result);
4411 }
4412 }
4413
4414 /**
4415 * "Top half" of a scan that reduces per-wave values across an entire
4416 * workgroup.
4417 *
4418 * The source value must be present in the highest lane of the wave, and the
4419 * highest lane must be live.
4420 */
4421 void
4422 ac_build_wg_wavescan_top(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4423 {
4424 if (ws->maxwaves <= 1)
4425 return;
4426
4427 const LLVMValueRef last_lane = LLVMConstInt(ctx->i32, ctx->wave_size - 1, false);
4428 LLVMBuilderRef builder = ctx->builder;
4429 LLVMValueRef tid = ac_get_thread_id(ctx);
4430 LLVMValueRef tmp;
4431
4432 tmp = LLVMBuildICmp(builder, LLVMIntEQ, tid, last_lane, "");
4433 ac_build_ifcc(ctx, tmp, 1000);
4434 LLVMBuildStore(builder, ws->src, LLVMBuildGEP(builder, ws->scratch, &ws->waveidx, 1, ""));
4435 ac_build_endif(ctx, 1000);
4436 }
4437
4438 /**
4439 * "Bottom half" of a scan that reduces per-wave values across an entire
4440 * workgroup.
4441 *
4442 * The caller must place a barrier between the top and bottom halves.
4443 */
4444 void
4445 ac_build_wg_wavescan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4446 {
4447 const LLVMTypeRef type = LLVMTypeOf(ws->src);
4448 const LLVMValueRef identity =
4449 get_reduction_identity(ctx, ws->op, ac_get_type_size(type));
4450
4451 if (ws->maxwaves <= 1) {
4452 ws->result_reduce = ws->src;
4453 ws->result_inclusive = ws->src;
4454 ws->result_exclusive = identity;
4455 return;
4456 }
4457 assert(ws->maxwaves <= 32);
4458
4459 LLVMBuilderRef builder = ctx->builder;
4460 LLVMValueRef tid = ac_get_thread_id(ctx);
4461 LLVMBasicBlockRef bbs[2];
4462 LLVMValueRef phivalues_scan[2];
4463 LLVMValueRef tmp, tmp2;
4464
4465 bbs[0] = LLVMGetInsertBlock(builder);
4466 phivalues_scan[0] = LLVMGetUndef(type);
4467
4468 if (ws->enable_reduce)
4469 tmp = LLVMBuildICmp(builder, LLVMIntULT, tid, ws->numwaves, "");
4470 else if (ws->enable_inclusive)
4471 tmp = LLVMBuildICmp(builder, LLVMIntULE, tid, ws->waveidx, "");
4472 else
4473 tmp = LLVMBuildICmp(builder, LLVMIntULT, tid, ws->waveidx, "");
4474 ac_build_ifcc(ctx, tmp, 1001);
4475 {
4476 tmp = LLVMBuildLoad(builder, LLVMBuildGEP(builder, ws->scratch, &tid, 1, ""), "");
4477
4478 ac_build_optimization_barrier(ctx, &tmp);
4479
4480 bbs[1] = LLVMGetInsertBlock(builder);
4481 phivalues_scan[1] = ac_build_scan(ctx, ws->op, tmp, identity, ws->maxwaves, true);
4482 }
4483 ac_build_endif(ctx, 1001);
4484
4485 const LLVMValueRef scan = ac_build_phi(ctx, type, 2, phivalues_scan, bbs);
4486
4487 if (ws->enable_reduce) {
4488 tmp = LLVMBuildSub(builder, ws->numwaves, ctx->i32_1, "");
4489 ws->result_reduce = ac_build_readlane(ctx, scan, tmp);
4490 }
4491 if (ws->enable_inclusive)
4492 ws->result_inclusive = ac_build_readlane(ctx, scan, ws->waveidx);
4493 if (ws->enable_exclusive) {
4494 tmp = LLVMBuildSub(builder, ws->waveidx, ctx->i32_1, "");
4495 tmp = ac_build_readlane(ctx, scan, tmp);
4496 tmp2 = LLVMBuildICmp(builder, LLVMIntEQ, ws->waveidx, ctx->i32_0, "");
4497 ws->result_exclusive = LLVMBuildSelect(builder, tmp2, identity, tmp, "");
4498 }
4499 }
4500
4501 /**
4502 * Inclusive scan of a per-wave value across an entire workgroup.
4503 *
4504 * This implies an s_barrier instruction.
4505 *
4506 * Unlike ac_build_inclusive_scan, the caller \em must ensure that all threads
4507 * of the workgroup are live. (This requirement cannot easily be relaxed in a
4508 * useful manner because of the barrier in the algorithm.)
4509 */
4510 void
4511 ac_build_wg_wavescan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4512 {
4513 ac_build_wg_wavescan_top(ctx, ws);
4514 ac_build_s_barrier(ctx);
4515 ac_build_wg_wavescan_bottom(ctx, ws);
4516 }
4517
4518 /**
4519 * "Top half" of a scan that reduces per-thread values across an entire
4520 * workgroup.
4521 *
4522 * All lanes must be active when this code runs.
4523 */
4524 void
4525 ac_build_wg_scan_top(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4526 {
4527 if (ws->enable_exclusive) {
4528 ws->extra = ac_build_exclusive_scan(ctx, ws->src, ws->op);
4529 if (LLVMTypeOf(ws->src) == ctx->i1 && ws->op == nir_op_iadd)
4530 ws->src = LLVMBuildZExt(ctx->builder, ws->src, ctx->i32, "");
4531 ws->src = ac_build_alu_op(ctx, ws->extra, ws->src, ws->op);
4532 } else {
4533 ws->src = ac_build_inclusive_scan(ctx, ws->src, ws->op);
4534 }
4535
4536 bool enable_inclusive = ws->enable_inclusive;
4537 bool enable_exclusive = ws->enable_exclusive;
4538 ws->enable_inclusive = false;
4539 ws->enable_exclusive = ws->enable_exclusive || enable_inclusive;
4540 ac_build_wg_wavescan_top(ctx, ws);
4541 ws->enable_inclusive = enable_inclusive;
4542 ws->enable_exclusive = enable_exclusive;
4543 }
4544
4545 /**
4546 * "Bottom half" of a scan that reduces per-thread values across an entire
4547 * workgroup.
4548 *
4549 * The caller must place a barrier between the top and bottom halves.
4550 */
4551 void
4552 ac_build_wg_scan_bottom(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4553 {
4554 bool enable_inclusive = ws->enable_inclusive;
4555 bool enable_exclusive = ws->enable_exclusive;
4556 ws->enable_inclusive = false;
4557 ws->enable_exclusive = ws->enable_exclusive || enable_inclusive;
4558 ac_build_wg_wavescan_bottom(ctx, ws);
4559 ws->enable_inclusive = enable_inclusive;
4560 ws->enable_exclusive = enable_exclusive;
4561
4562 /* ws->result_reduce is already the correct value */
4563 if (ws->enable_inclusive)
4564 ws->result_inclusive = ac_build_alu_op(ctx, ws->result_inclusive, ws->src, ws->op);
4565 if (ws->enable_exclusive)
4566 ws->result_exclusive = ac_build_alu_op(ctx, ws->result_exclusive, ws->extra, ws->op);
4567 }
4568
4569 /**
4570 * A scan that reduces per-thread values across an entire workgroup.
4571 *
4572 * The caller must ensure that all lanes are active when this code runs
4573 * (WWM is insufficient!), because there is an implied barrier.
4574 */
4575 void
4576 ac_build_wg_scan(struct ac_llvm_context *ctx, struct ac_wg_scan *ws)
4577 {
4578 ac_build_wg_scan_top(ctx, ws);
4579 ac_build_s_barrier(ctx);
4580 ac_build_wg_scan_bottom(ctx, ws);
4581 }
4582
4583 LLVMValueRef
4584 ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src,
4585 unsigned lane0, unsigned lane1, unsigned lane2, unsigned lane3)
4586 {
4587 unsigned mask = dpp_quad_perm(lane0, lane1, lane2, lane3);
4588 if (ctx->chip_class >= GFX8) {
4589 return ac_build_dpp(ctx, src, src, mask, 0xf, 0xf, false);
4590 } else {
4591 return ac_build_ds_swizzle(ctx, src, (1 << 15) | mask);
4592 }
4593 }
4594
4595 LLVMValueRef
4596 ac_build_shuffle(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef index)
4597 {
4598 LLVMTypeRef type = LLVMTypeOf(src);
4599 LLVMValueRef result;
4600
4601 index = LLVMBuildMul(ctx->builder, index, LLVMConstInt(ctx->i32, 4, 0), "");
4602 src = LLVMBuildZExt(ctx->builder, src, ctx->i32, "");
4603
4604 result = ac_build_intrinsic(ctx, "llvm.amdgcn.ds.bpermute", ctx->i32,
4605 (LLVMValueRef []) {index, src}, 2,
4606 AC_FUNC_ATTR_READNONE |
4607 AC_FUNC_ATTR_CONVERGENT);
4608 return LLVMBuildTrunc(ctx->builder, result, type, "");
4609 }
4610
4611 LLVMValueRef
4612 ac_build_frexp_exp(struct ac_llvm_context *ctx, LLVMValueRef src0,
4613 unsigned bitsize)
4614 {
4615 LLVMTypeRef type;
4616 char *intr;
4617
4618 if (bitsize == 16) {
4619 intr = "llvm.amdgcn.frexp.exp.i16.f16";
4620 type = ctx->i16;
4621 } else if (bitsize == 32) {
4622 intr = "llvm.amdgcn.frexp.exp.i32.f32";
4623 type = ctx->i32;
4624 } else {
4625 intr = "llvm.amdgcn.frexp.exp.i32.f64";
4626 type = ctx->i32;
4627 }
4628
4629 LLVMValueRef params[] = {
4630 src0,
4631 };
4632 return ac_build_intrinsic(ctx, intr, type, params, 1,
4633 AC_FUNC_ATTR_READNONE);
4634 }
4635 LLVMValueRef
4636 ac_build_frexp_mant(struct ac_llvm_context *ctx, LLVMValueRef src0,
4637 unsigned bitsize)
4638 {
4639 LLVMTypeRef type;
4640 char *intr;
4641
4642 if (bitsize == 16) {
4643 intr = "llvm.amdgcn.frexp.mant.f16";
4644 type = ctx->f16;
4645 } else if (bitsize == 32) {
4646 intr = "llvm.amdgcn.frexp.mant.f32";
4647 type = ctx->f32;
4648 } else {
4649 intr = "llvm.amdgcn.frexp.mant.f64";
4650 type = ctx->f64;
4651 }
4652
4653 LLVMValueRef params[] = {
4654 src0,
4655 };
4656 return ac_build_intrinsic(ctx, intr, type, params, 1,
4657 AC_FUNC_ATTR_READNONE);
4658 }
4659
4660 LLVMValueRef
4661 ac_build_canonicalize(struct ac_llvm_context *ctx, LLVMValueRef src0,
4662 unsigned bitsize)
4663 {
4664 LLVMTypeRef type;
4665 char *intr;
4666
4667 if (bitsize == 16) {
4668 intr = "llvm.canonicalize.f16";
4669 type = ctx->f16;
4670 } else if (bitsize == 32) {
4671 intr = "llvm.canonicalize.f32";
4672 type = ctx->f32;
4673 } else {
4674 intr = "llvm.canonicalize.f64";
4675 type = ctx->f64;
4676 }
4677
4678 LLVMValueRef params[] = {
4679 src0,
4680 };
4681 return ac_build_intrinsic(ctx, intr, type, params, 1,
4682 AC_FUNC_ATTR_READNONE);
4683 }
4684
4685 /*
4686 * this takes an I,J coordinate pair,
4687 * and works out the X and Y derivatives.
4688 * it returns DDX(I), DDX(J), DDY(I), DDY(J).
4689 */
4690 LLVMValueRef
4691 ac_build_ddxy_interp(struct ac_llvm_context *ctx, LLVMValueRef interp_ij)
4692 {
4693 LLVMValueRef result[4], a;
4694 unsigned i;
4695
4696 for (i = 0; i < 2; i++) {
4697 a = LLVMBuildExtractElement(ctx->builder, interp_ij,
4698 LLVMConstInt(ctx->i32, i, false), "");
4699 result[i] = ac_build_ddxy(ctx, AC_TID_MASK_TOP_LEFT, 1, a);
4700 result[2+i] = ac_build_ddxy(ctx, AC_TID_MASK_TOP_LEFT, 2, a);
4701 }
4702 return ac_build_gather_values(ctx, result, 4);
4703 }
4704
4705 LLVMValueRef
4706 ac_build_load_helper_invocation(struct ac_llvm_context *ctx)
4707 {
4708 LLVMValueRef result = ac_build_intrinsic(ctx, "llvm.amdgcn.ps.live",
4709 ctx->i1, NULL, 0,
4710 AC_FUNC_ATTR_READNONE);
4711 result = LLVMBuildNot(ctx->builder, result, "");
4712 return LLVMBuildSExt(ctx->builder, result, ctx->i32, "");
4713 }
4714
4715 LLVMValueRef
4716 ac_build_is_helper_invocation(struct ac_llvm_context *ctx)
4717 {
4718 if (!ctx->postponed_kill)
4719 return ac_build_load_helper_invocation(ctx);
4720
4721 /* !(exact && postponed) */
4722 LLVMValueRef exact = ac_build_intrinsic(ctx, "llvm.amdgcn.ps.live",
4723 ctx->i1, NULL, 0,
4724 AC_FUNC_ATTR_READNONE);
4725
4726 LLVMValueRef postponed = LLVMBuildLoad(ctx->builder, ctx->postponed_kill, "");
4727 LLVMValueRef result = LLVMBuildAnd(ctx->builder, exact, postponed, "");
4728
4729 return LLVMBuildSelect(ctx->builder, result, ctx->i32_0,
4730 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false), "");
4731 }
4732
4733 LLVMValueRef ac_build_call(struct ac_llvm_context *ctx, LLVMValueRef func,
4734 LLVMValueRef *args, unsigned num_args)
4735 {
4736 LLVMValueRef ret = LLVMBuildCall(ctx->builder, func, args, num_args, "");
4737 LLVMSetInstructionCallConv(ret, LLVMGetFunctionCallConv(func));
4738 return ret;
4739 }
4740
4741 void
4742 ac_export_mrt_z(struct ac_llvm_context *ctx, LLVMValueRef depth,
4743 LLVMValueRef stencil, LLVMValueRef samplemask,
4744 struct ac_export_args *args)
4745 {
4746 unsigned mask = 0;
4747 unsigned format = ac_get_spi_shader_z_format(depth != NULL,
4748 stencil != NULL,
4749 samplemask != NULL);
4750
4751 assert(depth || stencil || samplemask);
4752
4753 memset(args, 0, sizeof(*args));
4754
4755 args->valid_mask = 1; /* whether the EXEC mask is valid */
4756 args->done = 1; /* DONE bit */
4757
4758 /* Specify the target we are exporting */
4759 args->target = V_008DFC_SQ_EXP_MRTZ;
4760
4761 args->compr = 0; /* COMP flag */
4762 args->out[0] = LLVMGetUndef(ctx->f32); /* R, depth */
4763 args->out[1] = LLVMGetUndef(ctx->f32); /* G, stencil test val[0:7], stencil op val[8:15] */
4764 args->out[2] = LLVMGetUndef(ctx->f32); /* B, sample mask */
4765 args->out[3] = LLVMGetUndef(ctx->f32); /* A, alpha to mask */
4766
4767 if (format == V_028710_SPI_SHADER_UINT16_ABGR) {
4768 assert(!depth);
4769 args->compr = 1; /* COMPR flag */
4770
4771 if (stencil) {
4772 /* Stencil should be in X[23:16]. */
4773 stencil = ac_to_integer(ctx, stencil);
4774 stencil = LLVMBuildShl(ctx->builder, stencil,
4775 LLVMConstInt(ctx->i32, 16, 0), "");
4776 args->out[0] = ac_to_float(ctx, stencil);
4777 mask |= 0x3;
4778 }
4779 if (samplemask) {
4780 /* SampleMask should be in Y[15:0]. */
4781 args->out[1] = samplemask;
4782 mask |= 0xc;
4783 }
4784 } else {
4785 if (depth) {
4786 args->out[0] = depth;
4787 mask |= 0x1;
4788 }
4789 if (stencil) {
4790 args->out[1] = stencil;
4791 mask |= 0x2;
4792 }
4793 if (samplemask) {
4794 args->out[2] = samplemask;
4795 mask |= 0x4;
4796 }
4797 }
4798
4799 /* GFX6 (except OLAND and HAINAN) has a bug that it only looks
4800 * at the X writemask component. */
4801 if (ctx->chip_class == GFX6 &&
4802 ctx->family != CHIP_OLAND &&
4803 ctx->family != CHIP_HAINAN)
4804 mask |= 0x1;
4805
4806 /* Specify which components to enable */
4807 args->enabled_channels = mask;
4808 }
4809
4810 /* Send GS Alloc Req message from the first wave of the group to SPI.
4811 * Message payload is:
4812 * - bits 0..10: vertices in group
4813 * - bits 12..22: primitives in group
4814 */
4815 void ac_build_sendmsg_gs_alloc_req(struct ac_llvm_context *ctx, LLVMValueRef wave_id,
4816 LLVMValueRef vtx_cnt, LLVMValueRef prim_cnt)
4817 {
4818 LLVMBuilderRef builder = ctx->builder;
4819 LLVMValueRef tmp;
4820 bool export_dummy_prim = false;
4821
4822 /* HW workaround for a GPU hang with 100% culling.
4823 * We always have to export at least 1 primitive.
4824 * Export a degenerate triangle using vertex 0 for all 3 vertices.
4825 */
4826 if (prim_cnt == ctx->i32_0 && ctx->chip_class == GFX10) {
4827 assert(vtx_cnt == ctx->i32_0);
4828 prim_cnt = ctx->i32_1;
4829 vtx_cnt = ctx->i32_1;
4830 export_dummy_prim = true;
4831 }
4832
4833 ac_build_ifcc(ctx, LLVMBuildICmp(builder, LLVMIntEQ, wave_id, ctx->i32_0, ""), 5020);
4834
4835 tmp = LLVMBuildShl(builder, prim_cnt, LLVMConstInt(ctx->i32, 12, false),"");
4836 tmp = LLVMBuildOr(builder, tmp, vtx_cnt, "");
4837 ac_build_sendmsg(ctx, AC_SENDMSG_GS_ALLOC_REQ, tmp);
4838
4839 if (export_dummy_prim) {
4840 struct ac_ngg_prim prim = {};
4841 /* The vertex indices are 0,0,0. */
4842 prim.passthrough = ctx->i32_0;
4843
4844 struct ac_export_args pos = {};
4845 pos.out[0] = pos.out[1] = pos.out[2] = pos.out[3] = ctx->f32_0;
4846 pos.target = V_008DFC_SQ_EXP_POS;
4847 pos.enabled_channels = 0xf;
4848 pos.done = true;
4849
4850 ac_build_ifcc(ctx, LLVMBuildICmp(builder, LLVMIntEQ, ac_get_thread_id(ctx),
4851 ctx->i32_0, ""), 5021);
4852 ac_build_export_prim(ctx, &prim);
4853 ac_build_export(ctx, &pos);
4854 ac_build_endif(ctx, 5021);
4855 }
4856
4857 ac_build_endif(ctx, 5020);
4858 }
4859
4860 LLVMValueRef ac_pack_prim_export(struct ac_llvm_context *ctx,
4861 const struct ac_ngg_prim *prim)
4862 {
4863 /* The prim export format is:
4864 * - bits 0..8: index 0
4865 * - bit 9: edge flag 0
4866 * - bits 10..18: index 1
4867 * - bit 19: edge flag 1
4868 * - bits 20..28: index 2
4869 * - bit 29: edge flag 2
4870 * - bit 31: null primitive (skip)
4871 */
4872 LLVMBuilderRef builder = ctx->builder;
4873 LLVMValueRef tmp = LLVMBuildZExt(builder, prim->isnull, ctx->i32, "");
4874 LLVMValueRef result = LLVMBuildShl(builder, tmp, LLVMConstInt(ctx->i32, 31, false), "");
4875
4876 for (unsigned i = 0; i < prim->num_vertices; ++i) {
4877 tmp = LLVMBuildShl(builder, prim->index[i],
4878 LLVMConstInt(ctx->i32, 10 * i, false), "");
4879 result = LLVMBuildOr(builder, result, tmp, "");
4880 tmp = LLVMBuildZExt(builder, prim->edgeflag[i], ctx->i32, "");
4881 tmp = LLVMBuildShl(builder, tmp,
4882 LLVMConstInt(ctx->i32, 10 * i + 9, false), "");
4883 result = LLVMBuildOr(builder, result, tmp, "");
4884 }
4885 return result;
4886 }
4887
4888 void ac_build_export_prim(struct ac_llvm_context *ctx,
4889 const struct ac_ngg_prim *prim)
4890 {
4891 struct ac_export_args args;
4892
4893 if (prim->passthrough) {
4894 args.out[0] = prim->passthrough;
4895 } else {
4896 args.out[0] = ac_pack_prim_export(ctx, prim);
4897 }
4898
4899 args.out[0] = LLVMBuildBitCast(ctx->builder, args.out[0], ctx->f32, "");
4900 args.out[1] = LLVMGetUndef(ctx->f32);
4901 args.out[2] = LLVMGetUndef(ctx->f32);
4902 args.out[3] = LLVMGetUndef(ctx->f32);
4903
4904 args.target = V_008DFC_SQ_EXP_PRIM;
4905 args.enabled_channels = 1;
4906 args.done = true;
4907 args.valid_mask = false;
4908 args.compr = false;
4909
4910 ac_build_export(ctx, &args);
4911 }
4912
4913 static LLVMTypeRef
4914 arg_llvm_type(enum ac_arg_type type, unsigned size, struct ac_llvm_context *ctx)
4915 {
4916 if (type == AC_ARG_FLOAT) {
4917 return size == 1 ? ctx->f32 : LLVMVectorType(ctx->f32, size);
4918 } else if (type == AC_ARG_INT) {
4919 return size == 1 ? ctx->i32 : LLVMVectorType(ctx->i32, size);
4920 } else {
4921 LLVMTypeRef ptr_type;
4922 switch (type) {
4923 case AC_ARG_CONST_PTR:
4924 ptr_type = ctx->i8;
4925 break;
4926 case AC_ARG_CONST_FLOAT_PTR:
4927 ptr_type = ctx->f32;
4928 break;
4929 case AC_ARG_CONST_PTR_PTR:
4930 ptr_type = ac_array_in_const32_addr_space(ctx->i8);
4931 break;
4932 case AC_ARG_CONST_DESC_PTR:
4933 ptr_type = ctx->v4i32;
4934 break;
4935 case AC_ARG_CONST_IMAGE_PTR:
4936 ptr_type = ctx->v8i32;
4937 break;
4938 default:
4939 unreachable("unknown arg type");
4940 }
4941 if (size == 1) {
4942 return ac_array_in_const32_addr_space(ptr_type);
4943 } else {
4944 assert(size == 2);
4945 return ac_array_in_const_addr_space(ptr_type);
4946 }
4947 }
4948 }
4949
4950 LLVMValueRef
4951 ac_build_main(const struct ac_shader_args *args,
4952 struct ac_llvm_context *ctx,
4953 enum ac_llvm_calling_convention convention,
4954 const char *name, LLVMTypeRef ret_type,
4955 LLVMModuleRef module)
4956 {
4957 LLVMTypeRef arg_types[AC_MAX_ARGS];
4958
4959 for (unsigned i = 0; i < args->arg_count; i++) {
4960 arg_types[i] = arg_llvm_type(args->args[i].type,
4961 args->args[i].size, ctx);
4962 }
4963
4964 LLVMTypeRef main_function_type =
4965 LLVMFunctionType(ret_type, arg_types, args->arg_count, 0);
4966
4967 LLVMValueRef main_function =
4968 LLVMAddFunction(module, name, main_function_type);
4969 LLVMBasicBlockRef main_function_body =
4970 LLVMAppendBasicBlockInContext(ctx->context, main_function, "main_body");
4971 LLVMPositionBuilderAtEnd(ctx->builder, main_function_body);
4972
4973 LLVMSetFunctionCallConv(main_function, convention);
4974 for (unsigned i = 0; i < args->arg_count; ++i) {
4975 LLVMValueRef P = LLVMGetParam(main_function, i);
4976
4977 if (args->args[i].file != AC_ARG_SGPR)
4978 continue;
4979
4980 ac_add_function_attr(ctx->context, main_function, i + 1, AC_FUNC_ATTR_INREG);
4981
4982 if (LLVMGetTypeKind(LLVMTypeOf(P)) == LLVMPointerTypeKind) {
4983 ac_add_function_attr(ctx->context, main_function, i + 1, AC_FUNC_ATTR_NOALIAS);
4984 ac_add_attr_dereferenceable(P, UINT64_MAX);
4985 }
4986 }
4987
4988 ctx->main_function = main_function;
4989
4990 if (LLVM_VERSION_MAJOR >= 11) {
4991 /* Enable denormals for FP16 and FP64: */
4992 LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math",
4993 "ieee,ieee");
4994 /* Disable denormals for FP32: */
4995 LLVMAddTargetDependentFunctionAttr(main_function, "denormal-fp-math-f32",
4996 "preserve-sign,preserve-sign");
4997 }
4998 return main_function;
4999 }
5000
5001 void ac_build_s_endpgm(struct ac_llvm_context *ctx)
5002 {
5003 LLVMTypeRef calltype = LLVMFunctionType(ctx->voidt, NULL, 0, false);
5004 LLVMValueRef code = LLVMConstInlineAsm(calltype, "s_endpgm", "", true, false);
5005 LLVMBuildCall(ctx->builder, code, NULL, 0, "");
5006 }
5007
5008 LLVMValueRef ac_prefix_bitcount(struct ac_llvm_context *ctx,
5009 LLVMValueRef mask, LLVMValueRef index)
5010 {
5011 LLVMBuilderRef builder = ctx->builder;
5012 LLVMTypeRef type = LLVMTypeOf(mask);
5013
5014 LLVMValueRef bit = LLVMBuildShl(builder, LLVMConstInt(type, 1, 0),
5015 LLVMBuildZExt(builder, index, type, ""), "");
5016 LLVMValueRef prefix_bits = LLVMBuildSub(builder, bit, LLVMConstInt(type, 1, 0), "");
5017 LLVMValueRef prefix_mask = LLVMBuildAnd(builder, mask, prefix_bits, "");
5018 return ac_build_bit_count(ctx, prefix_mask);
5019 }
5020
5021 /* Compute the prefix sum of the "mask" bit array with 128 elements (bits). */
5022 LLVMValueRef ac_prefix_bitcount_2x64(struct ac_llvm_context *ctx,
5023 LLVMValueRef mask[2], LLVMValueRef index)
5024 {
5025 LLVMBuilderRef builder = ctx->builder;
5026 #if 0
5027 /* Reference version using i128. */
5028 LLVMValueRef input_mask =
5029 LLVMBuildBitCast(builder, ac_build_gather_values(ctx, mask, 2), ctx->i128, "");
5030
5031 return ac_prefix_bitcount(ctx, input_mask, index);
5032 #else
5033 /* Optimized version using 2 64-bit masks. */
5034 LLVMValueRef is_hi, is_0, c64, c128, all_bits;
5035 LLVMValueRef prefix_mask[2], shift[2], mask_bcnt0, prefix_bcnt[2];
5036
5037 /* Compute the 128-bit prefix mask. */
5038 c64 = LLVMConstInt(ctx->i32, 64, 0);
5039 c128 = LLVMConstInt(ctx->i32, 128, 0);
5040 all_bits = LLVMConstInt(ctx->i64, UINT64_MAX, 0);
5041 /* The first index that can have non-zero high bits in the prefix mask is 65. */
5042 is_hi = LLVMBuildICmp(builder, LLVMIntUGT, index, c64, "");
5043 is_0 = LLVMBuildICmp(builder, LLVMIntEQ, index, ctx->i32_0, "");
5044 mask_bcnt0 = ac_build_bit_count(ctx, mask[0]);
5045
5046 for (unsigned i = 0; i < 2; i++) {
5047 shift[i] = LLVMBuildSub(builder, i ? c128 : c64, index, "");
5048 /* For i==0, index==0, the right shift by 64 doesn't give the desired result,
5049 * so we handle it by the is_0 select.
5050 * For i==1, index==64, same story, so we handle it by the last is_hi select.
5051 * For i==0, index==64, we shift by 0, which is what we want.
5052 */
5053 prefix_mask[i] = LLVMBuildLShr(builder, all_bits,
5054 LLVMBuildZExt(builder, shift[i], ctx->i64, ""), "");
5055 prefix_mask[i] = LLVMBuildAnd(builder, mask[i], prefix_mask[i], "");
5056 prefix_bcnt[i] = ac_build_bit_count(ctx, prefix_mask[i]);
5057 }
5058
5059 prefix_bcnt[0] = LLVMBuildSelect(builder, is_0, ctx->i32_0, prefix_bcnt[0], "");
5060 prefix_bcnt[0] = LLVMBuildSelect(builder, is_hi, mask_bcnt0, prefix_bcnt[0], "");
5061 prefix_bcnt[1] = LLVMBuildSelect(builder, is_hi, prefix_bcnt[1], ctx->i32_0, "");
5062
5063 return LLVMBuildAdd(builder, prefix_bcnt[0], prefix_bcnt[1], "");
5064 #endif
5065 }
5066
5067 /**
5068 * Convert triangle strip indices to triangle indices. This is used to decompose
5069 * triangle strips into triangles.
5070 */
5071 void ac_build_triangle_strip_indices_to_triangle(struct ac_llvm_context *ctx,
5072 LLVMValueRef is_odd,
5073 LLVMValueRef flatshade_first,
5074 LLVMValueRef index[3])
5075 {
5076 LLVMBuilderRef builder = ctx->builder;
5077 LLVMValueRef out[3];
5078
5079 /* We need to change the vertex order for odd triangles to get correct
5080 * front/back facing by swapping 2 vertex indices, but we also have to
5081 * keep the provoking vertex in the same place.
5082 *
5083 * If the first vertex is provoking, swap index 1 and 2.
5084 * If the last vertex is provoking, swap index 0 and 1.
5085 */
5086 out[0] = LLVMBuildSelect(builder, flatshade_first,
5087 index[0],
5088 LLVMBuildSelect(builder, is_odd,
5089 index[1], index[0], ""), "");
5090 out[1] = LLVMBuildSelect(builder, flatshade_first,
5091 LLVMBuildSelect(builder, is_odd,
5092 index[2], index[1], ""),
5093 LLVMBuildSelect(builder, is_odd,
5094 index[0], index[1], ""), "");
5095 out[2] = LLVMBuildSelect(builder, flatshade_first,
5096 LLVMBuildSelect(builder, is_odd,
5097 index[1], index[2], ""),
5098 index[2], "");
5099 memcpy(index, out, sizeof(out));
5100 }