src/amd/llvm/ac_llvm_util.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the
   6  * "Software"), to deal in the Software without restriction, including
   7  * without limitation the rights to use, copy, modify, merge, publish,
   8  * distribute, sub license, and/or sell copies of the Software, and to
   9  * permit persons to whom the Software is furnished to do so, subject to
  10  * the following conditions:
  11  *
  12  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  13  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  14  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  15  * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  16  * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  17  * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  18  * USE OR OTHER DEALINGS IN THE SOFTWARE.
  19  *
  20  * The above copyright notice and this permission notice (including the
  21  * next paragraph) shall be included in all copies or substantial portions
  22  * of the Software.
  23  *
  24  */
  25 /* based on pieces from si_pipe.c and radeon_llvm_emit.c */
  26 #include "ac_llvm_util.h"
  27 #include "ac_llvm_build.h"
  28 #include "util/bitscan.h"
  29 #include <llvm-c/Core.h>
  30 #include <llvm-c/Support.h>
  31 #include <llvm-c/Transforms/IPO.h>
  32 #include <llvm-c/Transforms/Scalar.h>
  33 #include <llvm-c/Transforms/Utils.h>
  34 #include "c11/threads.h"
  35 #include "gallivm/lp_bld_misc.h"
  36 #include "util/u_math.h"
  37
  38 #include <assert.h>
  39 #include <stdio.h>
  40 #include <string.h>
  41
  42 static void ac_init_llvm_target()
  43 {
  44         LLVMInitializeAMDGPUTargetInfo();
  45         LLVMInitializeAMDGPUTarget();
  46         LLVMInitializeAMDGPUTargetMC();
  47         LLVMInitializeAMDGPUAsmPrinter();
  48
  49         /* For inline assembly. */
  50         LLVMInitializeAMDGPUAsmParser();
  51
  52         /* For ACO disassembly. */
  53         LLVMInitializeAMDGPUDisassembler();
  54
  55         /* Workaround for bug in llvm 4.0 that causes image intrinsics
  56          * to disappear.
  57          * https://reviews.llvm.org/D26348
  58          *
  59          * "mesa" is the prefix for error messages.
  60          *
  61          * -global-isel-abort=2 is a no-op unless global isel has been enabled.
  62          * This option tells the backend to fall-back to SelectionDAG and print
  63          * a diagnostic message if global isel fails.
  64          */
  65         const char *argv[] = {
  66                 "mesa",
  67                 "-simplifycfg-sink-common=false",
  68                 "-global-isel-abort=2",
  69 #if LLVM_VERSION_MAJOR >= 10
  70                 /* Atomic optimizations require LLVM 10.0 for gfx10 support. */
  71                 "-amdgpu-atomic-optimizations=true",
  72 #endif
  73 #if LLVM_VERSION_MAJOR >= 11
  74                 /* This was disabled by default in: https://reviews.llvm.org/D77228 */
  75                 "-structurizecfg-skip-uniform-regions",
  76 #endif
  77         };
  78         LLVMParseCommandLineOptions(ARRAY_SIZE(argv), argv, NULL);
  79 }
  80
  81 PUBLIC void ac_init_llvm_once(void)
  82 {
  83         static once_flag ac_init_llvm_target_once_flag = ONCE_FLAG_INIT;
  84         call_once(&ac_init_llvm_target_once_flag, ac_init_llvm_target);
  85 }
  86
  87 static LLVMTargetRef ac_get_llvm_target(const char *triple)
  88 {
  89         LLVMTargetRef target = NULL;
  90         char *err_message = NULL;
  91
  92         if (LLVMGetTargetFromTriple(triple, &target, &err_message)) {
  93                 fprintf(stderr, "Cannot find target for triple %s ", triple);
  94                 if (err_message) {
  95                         fprintf(stderr, "%s\n", err_message);
  96                 }
  97                 LLVMDisposeMessage(err_message);
  98                 return NULL;
  99         }
 100         return target;
 101 }
 102
 103 const char *ac_get_llvm_processor_name(enum radeon_family family)
 104 {
 105         switch (family) {
 106         case CHIP_TAHITI:
 107                 return "tahiti";
 108         case CHIP_PITCAIRN:
 109                 return "pitcairn";
 110         case CHIP_VERDE:
 111                 return "verde";
 112         case CHIP_OLAND:
 113                 return "oland";
 114         case CHIP_HAINAN:
 115                 return "hainan";
 116         case CHIP_BONAIRE:
 117                 return "bonaire";
 118         case CHIP_KABINI:
 119                 return "kabini";
 120         case CHIP_KAVERI:
 121                 return "kaveri";
 122         case CHIP_HAWAII:
 123                 return "hawaii";
 124         case CHIP_TONGA:
 125                 return "tonga";
 126         case CHIP_ICELAND:
 127                 return "iceland";
 128         case CHIP_CARRIZO:
 129                 return "carrizo";
 130         case CHIP_FIJI:
 131                 return "fiji";
 132         case CHIP_STONEY:
 133                 return "stoney";
 134         case CHIP_POLARIS10:
 135                 return "polaris10";
 136         case CHIP_POLARIS11:
 137         case CHIP_POLARIS12:
 138         case CHIP_VEGAM:
 139                 return "polaris11";
 140         case CHIP_VEGA10:
 141                 return "gfx900";
 142         case CHIP_RAVEN:
 143                 return "gfx902";
 144         case CHIP_VEGA12:
 145                 return "gfx904";
 146         case CHIP_VEGA20:
 147                 return "gfx906";
 148         case CHIP_RAVEN2:
 149         case CHIP_RENOIR:
 150                 return "gfx909";
 151         case CHIP_ARCTURUS:
 152                 return "gfx908";
 153         case CHIP_NAVI10:
 154                 return "gfx1010";
 155         case CHIP_NAVI12:
 156                 return "gfx1011";
 157         case CHIP_NAVI14:
 158                 return "gfx1012";
 159         case CHIP_SIENNA_CICHLID:
 160         case CHIP_NAVY_FLOUNDER:
 161                 return "gfx1030";
 162         default:
 163                 return "";
 164         }
 165 }
 166
 167 static LLVMTargetMachineRef ac_create_target_machine(enum radeon_family family,
 168                                                      enum ac_target_machine_options tm_options,
 169                                                      LLVMCodeGenOptLevel level,
 170                                                      const char **out_triple)
 171 {
 172         assert(family >= CHIP_TAHITI);
 173         char features[256];
 174         const char *triple = (tm_options & AC_TM_SUPPORTS_SPILL) ? "amdgcn-mesa-mesa3d" : "amdgcn--";
 175         LLVMTargetRef target = ac_get_llvm_target(triple);
 176
 177         snprintf(features, sizeof(features),
 178                  "+DumpCode%s%s%s%s%s",
 179                  LLVM_VERSION_MAJOR >= 11 ? "" : ",-fp32-denormals,+fp64-denormals",
 180                  family >= CHIP_NAVI10 && !(tm_options & AC_TM_WAVE32) ?
 181                          ",+wavefrontsize64,-wavefrontsize32" : "",
 182                  family <= CHIP_NAVI14 && tm_options & AC_TM_FORCE_ENABLE_XNACK ? ",+xnack" : "",
 183                  family <= CHIP_NAVI14 && tm_options & AC_TM_FORCE_DISABLE_XNACK ? ",-xnack" : "",
 184                  tm_options & AC_TM_PROMOTE_ALLOCA_TO_SCRATCH ? ",-promote-alloca" : "");
 185
 186         LLVMTargetMachineRef tm = LLVMCreateTargetMachine(
 187                                      target,
 188                                      triple,
 189                                      ac_get_llvm_processor_name(family),
 190                                      features,
 191                                      level,
 192                                      LLVMRelocDefault,
 193                                      LLVMCodeModelDefault);
 194
 195         if (out_triple)
 196                 *out_triple = triple;
 197         if (tm_options & AC_TM_ENABLE_GLOBAL_ISEL)
 198                 ac_enable_global_isel(tm);
 199         return tm;
 200 }
 201
 202 static LLVMPassManagerRef ac_create_passmgr(LLVMTargetLibraryInfoRef target_library_info,
 203                                             bool check_ir)
 204 {
 205         LLVMPassManagerRef passmgr = LLVMCreatePassManager();
 206         if (!passmgr)
 207                 return NULL;
 208
 209         if (target_library_info)
 210                 LLVMAddTargetLibraryInfo(target_library_info,
 211                                          passmgr);
 212
 213         if (check_ir)
 214                 LLVMAddVerifierPass(passmgr);
 215         LLVMAddAlwaysInlinerPass(passmgr);
 216         /* Normally, the pass manager runs all passes on one function before
 217          * moving onto another. Adding a barrier no-op pass forces the pass
 218          * manager to run the inliner on all functions first, which makes sure
 219          * that the following passes are only run on the remaining non-inline
 220          * function, so it removes useless work done on dead inline functions.
 221          */
 222         ac_llvm_add_barrier_noop_pass(passmgr);
 223         /* This pass should eliminate all the load and store instructions. */
 224         LLVMAddPromoteMemoryToRegisterPass(passmgr);
 225         LLVMAddScalarReplAggregatesPass(passmgr);
 226         LLVMAddLICMPass(passmgr);
 227         LLVMAddAggressiveDCEPass(passmgr);
 228         LLVMAddCFGSimplificationPass(passmgr);
 229         /* This is recommended by the instruction combining pass. */
 230         LLVMAddEarlyCSEMemSSAPass(passmgr);
 231         LLVMAddInstructionCombiningPass(passmgr);
 232         return passmgr;
 233 }
 234
 235 static const char *attr_to_str(enum ac_func_attr attr)
 236 {
 237    switch (attr) {
 238    case AC_FUNC_ATTR_ALWAYSINLINE: return "alwaysinline";
 239    case AC_FUNC_ATTR_INREG: return "inreg";
 240    case AC_FUNC_ATTR_NOALIAS: return "noalias";
 241    case AC_FUNC_ATTR_NOUNWIND: return "nounwind";
 242    case AC_FUNC_ATTR_READNONE: return "readnone";
 243    case AC_FUNC_ATTR_READONLY: return "readonly";
 244    case AC_FUNC_ATTR_WRITEONLY: return "writeonly";
 245    case AC_FUNC_ATTR_INACCESSIBLE_MEM_ONLY: return "inaccessiblememonly";
 246    case AC_FUNC_ATTR_CONVERGENT: return "convergent";
 247    default:
 248            fprintf(stderr, "Unhandled function attribute: %x\n", attr);
 249            return 0;
 250    }
 251 }
 252
 253 void
 254 ac_add_function_attr(LLVMContextRef ctx, LLVMValueRef function,
 255                      int attr_idx, enum ac_func_attr attr)
 256 {
 257    const char *attr_name = attr_to_str(attr);
 258    unsigned kind_id = LLVMGetEnumAttributeKindForName(attr_name,
 259                                                       strlen(attr_name));
 260    LLVMAttributeRef llvm_attr = LLVMCreateEnumAttribute(ctx, kind_id, 0);
 261
 262    if (LLVMIsAFunction(function))
 263       LLVMAddAttributeAtIndex(function, attr_idx, llvm_attr);
 264    else
 265       LLVMAddCallSiteAttribute(function, attr_idx, llvm_attr);
 266 }
 267
 268 void ac_add_func_attributes(LLVMContextRef ctx, LLVMValueRef function,
 269                             unsigned attrib_mask)
 270 {
 271         attrib_mask |= AC_FUNC_ATTR_NOUNWIND;
 272         attrib_mask &= ~AC_FUNC_ATTR_LEGACY;
 273
 274         while (attrib_mask) {
 275                 enum ac_func_attr attr = 1u << u_bit_scan(&attrib_mask);
 276                 ac_add_function_attr(ctx, function, -1, attr);
 277         }
 278 }
 279
 280 void
 281 ac_dump_module(LLVMModuleRef module)
 282 {
 283         char *str = LLVMPrintModuleToString(module);
 284         fprintf(stderr, "%s", str);
 285         LLVMDisposeMessage(str);
 286 }
 287
 288 void
 289 ac_llvm_add_target_dep_function_attr(LLVMValueRef F,
 290                                      const char *name, unsigned value)
 291 {
 292         char str[16];
 293
 294         snprintf(str, sizeof(str), "0x%x", value);
 295         LLVMAddTargetDependentFunctionAttr(F, name, str);
 296 }
 297
 298 void ac_llvm_set_workgroup_size(LLVMValueRef F, unsigned size)
 299 {
 300         if (!size)
 301                 return;
 302
 303         char str[32];
 304         snprintf(str, sizeof(str), "%u,%u", size, size);
 305         LLVMAddTargetDependentFunctionAttr(F, "amdgpu-flat-work-group-size", str);
 306 }
 307
 308 unsigned
 309 ac_count_scratch_private_memory(LLVMValueRef function)
 310 {
 311         unsigned private_mem_vgprs = 0;
 312
 313         /* Process all LLVM instructions. */
 314         LLVMBasicBlockRef bb = LLVMGetFirstBasicBlock(function);
 315         while (bb) {
 316                 LLVMValueRef next = LLVMGetFirstInstruction(bb);
 317
 318                 while (next) {
 319                         LLVMValueRef inst = next;
 320                         next = LLVMGetNextInstruction(next);
 321
 322                         if (LLVMGetInstructionOpcode(inst) != LLVMAlloca)
 323                                 continue;
 324
 325                         LLVMTypeRef type = LLVMGetElementType(LLVMTypeOf(inst));
 326                         /* No idea why LLVM aligns allocas to 4 elements. */
 327                         unsigned alignment = LLVMGetAlignment(inst);
 328                         unsigned dw_size = align(ac_get_type_size(type) / 4, alignment);
 329                         private_mem_vgprs += dw_size;
 330                 }
 331                 bb = LLVMGetNextBasicBlock(bb);
 332         }
 333
 334         return private_mem_vgprs;
 335 }
 336
 337 bool
 338 ac_init_llvm_compiler(struct ac_llvm_compiler *compiler,
 339                       enum radeon_family family,
 340                       enum ac_target_machine_options tm_options)
 341 {
 342         const char *triple;
 343         memset(compiler, 0, sizeof(*compiler));
 344
 345         compiler->tm = ac_create_target_machine(family, tm_options,
 346                                                 LLVMCodeGenLevelDefault,
 347                                                 &triple);
 348         if (!compiler->tm)
 349                 return false;
 350
 351         if (tm_options & AC_TM_CREATE_LOW_OPT) {
 352                 compiler->low_opt_tm =
 353                         ac_create_target_machine(family, tm_options,
 354                                                  LLVMCodeGenLevelLess, NULL);
 355                 if (!compiler->low_opt_tm)
 356                         goto fail;
 357         }
 358
 359         if (family >= CHIP_NAVI10) {
 360                 assert(!(tm_options & AC_TM_CREATE_LOW_OPT));
 361                 compiler->tm_wave32 = ac_create_target_machine(family,
 362                                                                tm_options | AC_TM_WAVE32,
 363                                                                LLVMCodeGenLevelDefault,
 364                                                                NULL);
 365                 if (!compiler->tm_wave32)
 366                         goto fail;
 367         }
 368
 369         compiler->target_library_info =
 370                 ac_create_target_library_info(triple);
 371         if (!compiler->target_library_info)
 372                 goto fail;
 373
 374         compiler->passmgr = ac_create_passmgr(compiler->target_library_info,
 375                                               tm_options & AC_TM_CHECK_IR);
 376         if (!compiler->passmgr)
 377                 goto fail;
 378
 379         return true;
 380 fail:
 381         ac_destroy_llvm_compiler(compiler);
 382         return false;
 383 }
 384
 385 void
 386 ac_destroy_llvm_compiler(struct ac_llvm_compiler *compiler)
 387 {
 388         ac_destroy_llvm_passes(compiler->passes);
 389         ac_destroy_llvm_passes(compiler->passes_wave32);
 390         ac_destroy_llvm_passes(compiler->low_opt_passes);
 391
 392         if (compiler->passmgr)
 393                 LLVMDisposePassManager(compiler->passmgr);
 394         if (compiler->target_library_info)
 395                 ac_dispose_target_library_info(compiler->target_library_info);
 396         if (compiler->low_opt_tm)
 397                 LLVMDisposeTargetMachine(compiler->low_opt_tm);
 398         if (compiler->tm)
 399                 LLVMDisposeTargetMachine(compiler->tm);
 400         if (compiler->tm_wave32)
 401                 LLVMDisposeTargetMachine(compiler->tm_wave32);
 402 }