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ac/nir: use llvm.amdgcn.rcp for nir_op_frcp
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54
55 LLVMValueRef main_function;
56 LLVMBasicBlockRef continue_block;
57 LLVMBasicBlockRef break_block;
58
59 int num_locals;
60 LLVMValueRef *locals;
61 };
62
63 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
64 nir_deref_instr *deref_instr,
65 const nir_instr *instr,
66 bool image);
67
68 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
69 nir_deref_instr *deref_instr,
70 enum ac_descriptor_type desc_type,
71 const nir_instr *instr,
72 LLVMValueRef index,
73 bool image, bool write);
74
75 static void
76 build_store_values_extended(struct ac_llvm_context *ac,
77 LLVMValueRef *values,
78 unsigned value_count,
79 unsigned value_stride,
80 LLVMValueRef vec)
81 {
82 LLVMBuilderRef builder = ac->builder;
83 unsigned i;
84
85 for (i = 0; i < value_count; i++) {
86 LLVMValueRef ptr = values[i * value_stride];
87 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
88 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
89 LLVMBuildStore(builder, value, ptr);
90 }
91 }
92
93 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
94 const nir_ssa_def *def)
95 {
96 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
97 if (def->num_components > 1) {
98 type = LLVMVectorType(type, def->num_components);
99 }
100 return type;
101 }
102
103 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
104 {
105 assert(src.is_ssa);
106 return nir->ssa_defs[src.ssa->index];
107 }
108
109 static LLVMValueRef
110 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
111 {
112 LLVMValueRef ptr = get_src(ctx, src);
113 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
114 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
115
116 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
117
118 return LLVMBuildBitCast(ctx->ac.builder, ptr,
119 LLVMPointerType(type, addr_space), "");
120 }
121
122 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
123 const struct nir_block *b)
124 {
125 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
126 return (LLVMBasicBlockRef)entry->data;
127 }
128
129 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
130 nir_alu_src src,
131 unsigned num_components)
132 {
133 LLVMValueRef value = get_src(ctx, src.src);
134 bool need_swizzle = false;
135
136 assert(value);
137 unsigned src_components = ac_get_llvm_num_components(value);
138 for (unsigned i = 0; i < num_components; ++i) {
139 assert(src.swizzle[i] < src_components);
140 if (src.swizzle[i] != i)
141 need_swizzle = true;
142 }
143
144 if (need_swizzle || num_components != src_components) {
145 LLVMValueRef masks[] = {
146 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
147 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
150
151 if (src_components > 1 && num_components == 1) {
152 value = LLVMBuildExtractElement(ctx->ac.builder, value,
153 masks[0], "");
154 } else if (src_components == 1 && num_components > 1) {
155 LLVMValueRef values[] = {value, value, value, value};
156 value = ac_build_gather_values(&ctx->ac, values, num_components);
157 } else {
158 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
159 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
160 swizzle, "");
161 }
162 }
163 assert(!src.negate);
164 assert(!src.abs);
165 return value;
166 }
167
168 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
169 LLVMIntPredicate pred, LLVMValueRef src0,
170 LLVMValueRef src1)
171 {
172 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
173 return LLVMBuildSelect(ctx->builder, result,
174 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
175 ctx->i32_0, "");
176 }
177
178 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
179 LLVMRealPredicate pred, LLVMValueRef src0,
180 LLVMValueRef src1)
181 {
182 LLVMValueRef result;
183 src0 = ac_to_float(ctx, src0);
184 src1 = ac_to_float(ctx, src1);
185 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
186 return LLVMBuildSelect(ctx->builder, result,
187 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
188 ctx->i32_0, "");
189 }
190
191 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
192 const char *intrin,
193 LLVMTypeRef result_type,
194 LLVMValueRef src0)
195 {
196 char name[64];
197 LLVMValueRef params[] = {
198 ac_to_float(ctx, src0),
199 };
200
201 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
202 ac_get_elem_bits(ctx, result_type));
203 assert(length < sizeof(name));
204 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
205 }
206
207 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
208 const char *intrin,
209 LLVMTypeRef result_type,
210 LLVMValueRef src0, LLVMValueRef src1)
211 {
212 char name[64];
213 LLVMValueRef params[] = {
214 ac_to_float(ctx, src0),
215 ac_to_float(ctx, src1),
216 };
217
218 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
219 ac_get_elem_bits(ctx, result_type));
220 assert(length < sizeof(name));
221 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
222 }
223
224 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
225 const char *intrin,
226 LLVMTypeRef result_type,
227 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
228 {
229 char name[64];
230 LLVMValueRef params[] = {
231 ac_to_float(ctx, src0),
232 ac_to_float(ctx, src1),
233 ac_to_float(ctx, src2),
234 };
235
236 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
237 ac_get_elem_bits(ctx, result_type));
238 assert(length < sizeof(name));
239 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
240 }
241
242 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
243 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
244 {
245 LLVMTypeRef src1_type = LLVMTypeOf(src1);
246 LLVMTypeRef src2_type = LLVMTypeOf(src2);
247
248 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
249
250 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
251 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
252 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
253 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
254 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
255 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
256 }
257
258 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
259 ctx->i32_0, "");
260 return LLVMBuildSelect(ctx->builder, v,
261 ac_to_integer_or_pointer(ctx, src1),
262 ac_to_integer_or_pointer(ctx, src2), "");
263 }
264
265 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
266 LLVMValueRef src0)
267 {
268 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
269 }
270
271 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
272 const char *intrin,
273 LLVMValueRef src0, LLVMValueRef src1)
274 {
275 LLVMTypeRef ret_type;
276 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
277 LLVMValueRef res;
278 LLVMValueRef params[] = { src0, src1 };
279 ret_type = LLVMStructTypeInContext(ctx->context, types,
280 2, true);
281
282 res = ac_build_intrinsic(ctx, intrin, ret_type,
283 params, 2, AC_FUNC_ATTR_READNONE);
284
285 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
286 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
287 return res;
288 }
289
290 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
291 LLVMValueRef src0,
292 unsigned bitsize)
293 {
294 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
295 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
296 "");
297 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
298
299 switch (bitsize) {
300 case 16:
301 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
302 case 32:
303 return result;
304 case 64:
305 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
306 default:
307 unreachable("Unsupported bit size.");
308 }
309 }
310
311 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
312 LLVMValueRef src0)
313 {
314 src0 = ac_to_float(ctx, src0);
315 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
316 return LLVMBuildSExt(ctx->builder,
317 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
318 ctx->i32, "");
319 }
320
321 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
322 LLVMValueRef src0,
323 unsigned bitsize)
324 {
325 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
326
327 switch (bitsize) {
328 case 8:
329 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
330 case 16:
331 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
332 case 32:
333 return result;
334 case 64:
335 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
336 default:
337 unreachable("Unsupported bit size.");
338 }
339 }
340
341 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
342 LLVMValueRef src0)
343 {
344 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
345 return LLVMBuildSExt(ctx->builder,
346 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
347 ctx->i32, "");
348 }
349
350 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
351 LLVMValueRef src0)
352 {
353 LLVMValueRef result;
354 LLVMValueRef cond = NULL;
355
356 src0 = ac_to_float(ctx, src0);
357 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
358
359 if (ctx->chip_class >= GFX8) {
360 LLVMValueRef args[2];
361 /* Check if the result is a denormal - and flush to 0 if so. */
362 args[0] = result;
363 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
364 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
365 }
366
367 /* need to convert back up to f32 */
368 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
369
370 if (ctx->chip_class >= GFX8)
371 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
372 else {
373 /* for GFX6-GFX7 */
374 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
375 * so compare the result and flush to 0 if it's smaller.
376 */
377 LLVMValueRef temp, cond2;
378 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
379 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
380 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
381 temp, "");
382 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
383 temp, ctx->f32_0, "");
384 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
385 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
386 }
387 return result;
388 }
389
390 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
391 LLVMValueRef src0, LLVMValueRef src1)
392 {
393 LLVMValueRef dst64, result;
394 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
395 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
396
397 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
398 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
399 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
400 return result;
401 }
402
403 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
404 LLVMValueRef src0, LLVMValueRef src1)
405 {
406 LLVMValueRef dst64, result;
407 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
408 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
409
410 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
411 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
412 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
413 return result;
414 }
415
416 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
417 LLVMValueRef bits, LLVMValueRef offset)
418 {
419 /* mask = ((1 << bits) - 1) << offset */
420 return LLVMBuildShl(ctx->builder,
421 LLVMBuildSub(ctx->builder,
422 LLVMBuildShl(ctx->builder,
423 ctx->i32_1,
424 bits, ""),
425 ctx->i32_1, ""),
426 offset, "");
427 }
428
429 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
430 LLVMValueRef mask, LLVMValueRef insert,
431 LLVMValueRef base)
432 {
433 /* Calculate:
434 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
435 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
436 */
437 return LLVMBuildXor(ctx->builder, base,
438 LLVMBuildAnd(ctx->builder, mask,
439 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
440 }
441
442 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
443 LLVMValueRef src0,
444 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
445 LLVMValueRef args[2]))
446 {
447 LLVMValueRef comp[2];
448
449 src0 = ac_to_float(ctx, src0);
450 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
451 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
452
453 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
454 }
455
456 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
457 LLVMValueRef src0)
458 {
459 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
460 LLVMValueRef temps[2], val;
461 int i;
462
463 for (i = 0; i < 2; i++) {
464 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
465 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
466 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
467 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
468 }
469 return ac_build_gather_values(ctx, temps, 2);
470 }
471
472 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
473 nir_op op,
474 LLVMValueRef src0)
475 {
476 unsigned mask;
477 int idx;
478 LLVMValueRef result;
479
480 if (op == nir_op_fddx_fine)
481 mask = AC_TID_MASK_LEFT;
482 else if (op == nir_op_fddy_fine)
483 mask = AC_TID_MASK_TOP;
484 else
485 mask = AC_TID_MASK_TOP_LEFT;
486
487 /* for DDX we want to next X pixel, DDY next Y pixel. */
488 if (op == nir_op_fddx_fine ||
489 op == nir_op_fddx_coarse ||
490 op == nir_op_fddx)
491 idx = 1;
492 else
493 idx = 2;
494
495 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
496 return result;
497 }
498
499 struct waterfall_context {
500 LLVMBasicBlockRef phi_bb[2];
501 bool use_waterfall;
502 };
503
504 /* To deal with divergent descriptors we can create a loop that handles all
505 * lanes with the same descriptor on a given iteration (henceforth a
506 * waterfall loop).
507 *
508 * These helper create the begin and end of the loop leaving the caller
509 * to implement the body.
510 *
511 * params:
512 * - ctx is the usal nir context
513 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
514 * - value is the possibly divergent value for which we built the loop
515 * - divergent is whether value is actually divergent. If false we just pass
516 * things through.
517 */
518 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
519 struct waterfall_context *wctx,
520 LLVMValueRef value, bool divergent)
521 {
522 /* If the app claims the value is divergent but it is constant we can
523 * end up with a dynamic index of NULL. */
524 if (!value)
525 divergent = false;
526
527 wctx->use_waterfall = divergent;
528 if (!divergent)
529 return value;
530
531 ac_build_bgnloop(&ctx->ac, 6000);
532
533 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
534
535 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
536 scalar_value, "uniform_active");
537
538 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
539 ac_build_ifcc(&ctx->ac, active, 6001);
540
541 return scalar_value;
542 }
543
544 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
545 struct waterfall_context *wctx,
546 LLVMValueRef value)
547 {
548 LLVMValueRef ret = NULL;
549 LLVMValueRef phi_src[2];
550 LLVMValueRef cc_phi_src[2] = {
551 LLVMConstInt(ctx->ac.i32, 0, false),
552 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
553 };
554
555 if (!wctx->use_waterfall)
556 return value;
557
558 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
559
560 ac_build_endif(&ctx->ac, 6001);
561
562 if (value) {
563 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
564 phi_src[1] = value;
565
566 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
567 }
568
569 /*
570 * By using the optimization barrier on the exit decision, we decouple
571 * the operations from the break, and hence avoid LLVM hoisting the
572 * opteration into the break block.
573 */
574 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
575 ac_build_optimization_barrier(&ctx->ac, &cc);
576
577 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
578 ac_build_ifcc(&ctx->ac, active, 6002);
579 ac_build_break(&ctx->ac);
580 ac_build_endif(&ctx->ac, 6002);
581
582 ac_build_endloop(&ctx->ac, 6000);
583 return ret;
584 }
585
586 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
587 {
588 LLVMValueRef src[4], result = NULL;
589 unsigned num_components = instr->dest.dest.ssa.num_components;
590 unsigned src_components;
591 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
592
593 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
594 switch (instr->op) {
595 case nir_op_vec2:
596 case nir_op_vec3:
597 case nir_op_vec4:
598 src_components = 1;
599 break;
600 case nir_op_pack_half_2x16:
601 case nir_op_pack_snorm_2x16:
602 case nir_op_pack_unorm_2x16:
603 src_components = 2;
604 break;
605 case nir_op_unpack_half_2x16:
606 src_components = 1;
607 break;
608 case nir_op_cube_face_coord:
609 case nir_op_cube_face_index:
610 src_components = 3;
611 break;
612 default:
613 src_components = num_components;
614 break;
615 }
616 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
617 src[i] = get_alu_src(ctx, instr->src[i], src_components);
618
619 switch (instr->op) {
620 case nir_op_mov:
621 result = src[0];
622 break;
623 case nir_op_fneg:
624 src[0] = ac_to_float(&ctx->ac, src[0]);
625 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
626 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
627 /* fneg will be optimized by backend compiler with sign
628 * bit removed via XOR. This is probably a LLVM bug.
629 */
630 result = ac_build_canonicalize(&ctx->ac, result,
631 instr->dest.dest.ssa.bit_size);
632 }
633 break;
634 case nir_op_ineg:
635 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
636 break;
637 case nir_op_inot:
638 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
639 break;
640 case nir_op_iadd:
641 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
642 break;
643 case nir_op_fadd:
644 src[0] = ac_to_float(&ctx->ac, src[0]);
645 src[1] = ac_to_float(&ctx->ac, src[1]);
646 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_fsub:
649 src[0] = ac_to_float(&ctx->ac, src[0]);
650 src[1] = ac_to_float(&ctx->ac, src[1]);
651 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
652 break;
653 case nir_op_isub:
654 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
655 break;
656 case nir_op_imul:
657 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
658 break;
659 case nir_op_imod:
660 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
661 break;
662 case nir_op_umod:
663 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
664 break;
665 case nir_op_fmod:
666 /* lower_fmod only lower 16-bit and 32-bit fmod */
667 assert(instr->dest.dest.ssa.bit_size == 64);
668 src[0] = ac_to_float(&ctx->ac, src[0]);
669 src[1] = ac_to_float(&ctx->ac, src[1]);
670 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
671 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
672 ac_to_float_type(&ctx->ac, def_type), result);
673 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
674 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
675 break;
676 case nir_op_irem:
677 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
678 break;
679 case nir_op_idiv:
680 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
681 break;
682 case nir_op_udiv:
683 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
684 break;
685 case nir_op_fmul:
686 src[0] = ac_to_float(&ctx->ac, src[0]);
687 src[1] = ac_to_float(&ctx->ac, src[1]);
688 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
689 break;
690 case nir_op_frcp:
691 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
692 ac_to_float_type(&ctx->ac, def_type), src[0]);
693 break;
694 case nir_op_iand:
695 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
696 break;
697 case nir_op_ior:
698 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
699 break;
700 case nir_op_ixor:
701 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
702 break;
703 case nir_op_ishl:
704 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
705 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
706 LLVMTypeOf(src[0]), "");
707 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
708 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
709 LLVMTypeOf(src[0]), "");
710 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
711 break;
712 case nir_op_ishr:
713 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
714 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
715 LLVMTypeOf(src[0]), "");
716 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
717 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
718 LLVMTypeOf(src[0]), "");
719 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
720 break;
721 case nir_op_ushr:
722 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
723 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
724 LLVMTypeOf(src[0]), "");
725 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
726 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
727 LLVMTypeOf(src[0]), "");
728 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
729 break;
730 case nir_op_ilt32:
731 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
732 break;
733 case nir_op_ine32:
734 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
735 break;
736 case nir_op_ieq32:
737 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
738 break;
739 case nir_op_ige32:
740 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
741 break;
742 case nir_op_ult32:
743 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
744 break;
745 case nir_op_uge32:
746 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
747 break;
748 case nir_op_feq32:
749 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
750 break;
751 case nir_op_fne32:
752 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
753 break;
754 case nir_op_flt32:
755 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
756 break;
757 case nir_op_fge32:
758 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
759 break;
760 case nir_op_fabs:
761 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
762 ac_to_float_type(&ctx->ac, def_type), src[0]);
763 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
764 /* fabs will be optimized by backend compiler with sign
765 * bit removed via AND.
766 */
767 result = ac_build_canonicalize(&ctx->ac, result,
768 instr->dest.dest.ssa.bit_size);
769 }
770 break;
771 case nir_op_iabs:
772 result = emit_iabs(&ctx->ac, src[0]);
773 break;
774 case nir_op_imax:
775 result = ac_build_imax(&ctx->ac, src[0], src[1]);
776 break;
777 case nir_op_imin:
778 result = ac_build_imin(&ctx->ac, src[0], src[1]);
779 break;
780 case nir_op_umax:
781 result = ac_build_umax(&ctx->ac, src[0], src[1]);
782 break;
783 case nir_op_umin:
784 result = ac_build_umin(&ctx->ac, src[0], src[1]);
785 break;
786 case nir_op_isign:
787 result = ac_build_isign(&ctx->ac, src[0],
788 instr->dest.dest.ssa.bit_size);
789 break;
790 case nir_op_fsign:
791 src[0] = ac_to_float(&ctx->ac, src[0]);
792 result = ac_build_fsign(&ctx->ac, src[0],
793 instr->dest.dest.ssa.bit_size);
794 break;
795 case nir_op_ffloor:
796 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
797 ac_to_float_type(&ctx->ac, def_type), src[0]);
798 break;
799 case nir_op_ftrunc:
800 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
801 ac_to_float_type(&ctx->ac, def_type), src[0]);
802 break;
803 case nir_op_fceil:
804 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
805 ac_to_float_type(&ctx->ac, def_type), src[0]);
806 break;
807 case nir_op_fround_even:
808 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
809 ac_to_float_type(&ctx->ac, def_type),src[0]);
810 break;
811 case nir_op_ffract:
812 src[0] = ac_to_float(&ctx->ac, src[0]);
813 result = ac_build_fract(&ctx->ac, src[0],
814 instr->dest.dest.ssa.bit_size);
815 break;
816 case nir_op_fsin:
817 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
818 ac_to_float_type(&ctx->ac, def_type), src[0]);
819 break;
820 case nir_op_fcos:
821 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
822 ac_to_float_type(&ctx->ac, def_type), src[0]);
823 break;
824 case nir_op_fsqrt:
825 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
826 ac_to_float_type(&ctx->ac, def_type), src[0]);
827 break;
828 case nir_op_fexp2:
829 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
830 ac_to_float_type(&ctx->ac, def_type), src[0]);
831 break;
832 case nir_op_flog2:
833 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
834 ac_to_float_type(&ctx->ac, def_type), src[0]);
835 break;
836 case nir_op_frsq:
837 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
838 ac_to_float_type(&ctx->ac, def_type), src[0]);
839 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
840 break;
841 case nir_op_frexp_exp:
842 src[0] = ac_to_float(&ctx->ac, src[0]);
843 result = ac_build_frexp_exp(&ctx->ac, src[0],
844 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
845 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
846 result = LLVMBuildSExt(ctx->ac.builder, result,
847 ctx->ac.i32, "");
848 break;
849 case nir_op_frexp_sig:
850 src[0] = ac_to_float(&ctx->ac, src[0]);
851 result = ac_build_frexp_mant(&ctx->ac, src[0],
852 instr->dest.dest.ssa.bit_size);
853 break;
854 case nir_op_fpow:
855 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
856 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
857 break;
858 case nir_op_fmax:
859 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
860 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
861 if (ctx->ac.chip_class < GFX9 &&
862 instr->dest.dest.ssa.bit_size == 32) {
863 /* Only pre-GFX9 chips do not flush denorms. */
864 result = ac_build_canonicalize(&ctx->ac, result,
865 instr->dest.dest.ssa.bit_size);
866 }
867 break;
868 case nir_op_fmin:
869 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
870 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
871 if (ctx->ac.chip_class < GFX9 &&
872 instr->dest.dest.ssa.bit_size == 32) {
873 /* Only pre-GFX9 chips do not flush denorms. */
874 result = ac_build_canonicalize(&ctx->ac, result,
875 instr->dest.dest.ssa.bit_size);
876 }
877 break;
878 case nir_op_ffma:
879 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
880 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
881 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
882 break;
883 case nir_op_ldexp:
884 src[0] = ac_to_float(&ctx->ac, src[0]);
885 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
886 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
887 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
888 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
889 else
890 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
891 break;
892 case nir_op_bfm:
893 result = emit_bfm(&ctx->ac, src[0], src[1]);
894 break;
895 case nir_op_bitfield_select:
896 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
897 break;
898 case nir_op_ubfe:
899 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
900 break;
901 case nir_op_ibfe:
902 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
903 break;
904 case nir_op_bitfield_reverse:
905 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
906 break;
907 case nir_op_bit_count:
908 result = ac_build_bit_count(&ctx->ac, src[0]);
909 break;
910 case nir_op_vec2:
911 case nir_op_vec3:
912 case nir_op_vec4:
913 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
914 src[i] = ac_to_integer(&ctx->ac, src[i]);
915 result = ac_build_gather_values(&ctx->ac, src, num_components);
916 break;
917 case nir_op_f2i8:
918 case nir_op_f2i16:
919 case nir_op_f2i32:
920 case nir_op_f2i64:
921 src[0] = ac_to_float(&ctx->ac, src[0]);
922 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
923 break;
924 case nir_op_f2u8:
925 case nir_op_f2u16:
926 case nir_op_f2u32:
927 case nir_op_f2u64:
928 src[0] = ac_to_float(&ctx->ac, src[0]);
929 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
930 break;
931 case nir_op_i2f16:
932 case nir_op_i2f32:
933 case nir_op_i2f64:
934 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
935 break;
936 case nir_op_u2f16:
937 case nir_op_u2f32:
938 case nir_op_u2f64:
939 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
940 break;
941 case nir_op_f2f16_rtz:
942 src[0] = ac_to_float(&ctx->ac, src[0]);
943 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
944 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
945 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
946 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
947 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
948 break;
949 case nir_op_f2f16_rtne:
950 case nir_op_f2f16:
951 case nir_op_f2f32:
952 case nir_op_f2f64:
953 src[0] = ac_to_float(&ctx->ac, src[0]);
954 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
955 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
956 else
957 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
958 break;
959 case nir_op_u2u8:
960 case nir_op_u2u16:
961 case nir_op_u2u32:
962 case nir_op_u2u64:
963 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
964 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
965 else
966 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
967 break;
968 case nir_op_i2i8:
969 case nir_op_i2i16:
970 case nir_op_i2i32:
971 case nir_op_i2i64:
972 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
973 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
974 else
975 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
976 break;
977 case nir_op_b32csel:
978 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
979 break;
980 case nir_op_find_lsb:
981 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
982 break;
983 case nir_op_ufind_msb:
984 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
985 break;
986 case nir_op_ifind_msb:
987 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
988 break;
989 case nir_op_uadd_carry:
990 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
991 break;
992 case nir_op_usub_borrow:
993 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
994 break;
995 case nir_op_b2f16:
996 case nir_op_b2f32:
997 case nir_op_b2f64:
998 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
999 break;
1000 case nir_op_f2b32:
1001 result = emit_f2b(&ctx->ac, src[0]);
1002 break;
1003 case nir_op_b2i8:
1004 case nir_op_b2i16:
1005 case nir_op_b2i32:
1006 case nir_op_b2i64:
1007 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1008 break;
1009 case nir_op_i2b32:
1010 result = emit_i2b(&ctx->ac, src[0]);
1011 break;
1012 case nir_op_fquantize2f16:
1013 result = emit_f2f16(&ctx->ac, src[0]);
1014 break;
1015 case nir_op_umul_high:
1016 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1017 break;
1018 case nir_op_imul_high:
1019 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1020 break;
1021 case nir_op_pack_half_2x16:
1022 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1023 break;
1024 case nir_op_pack_snorm_2x16:
1025 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1026 break;
1027 case nir_op_pack_unorm_2x16:
1028 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1029 break;
1030 case nir_op_unpack_half_2x16:
1031 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1032 break;
1033 case nir_op_fddx:
1034 case nir_op_fddy:
1035 case nir_op_fddx_fine:
1036 case nir_op_fddy_fine:
1037 case nir_op_fddx_coarse:
1038 case nir_op_fddy_coarse:
1039 result = emit_ddxy(ctx, instr->op, src[0]);
1040 break;
1041
1042 case nir_op_unpack_64_2x32_split_x: {
1043 assert(ac_get_llvm_num_components(src[0]) == 1);
1044 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1045 ctx->ac.v2i32,
1046 "");
1047 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1048 ctx->ac.i32_0, "");
1049 break;
1050 }
1051
1052 case nir_op_unpack_64_2x32_split_y: {
1053 assert(ac_get_llvm_num_components(src[0]) == 1);
1054 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1055 ctx->ac.v2i32,
1056 "");
1057 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1058 ctx->ac.i32_1, "");
1059 break;
1060 }
1061
1062 case nir_op_pack_64_2x32_split: {
1063 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1064 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1065 break;
1066 }
1067
1068 case nir_op_pack_32_2x16_split: {
1069 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1070 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1071 break;
1072 }
1073
1074 case nir_op_unpack_32_2x16_split_x: {
1075 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1076 ctx->ac.v2i16,
1077 "");
1078 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1079 ctx->ac.i32_0, "");
1080 break;
1081 }
1082
1083 case nir_op_unpack_32_2x16_split_y: {
1084 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1085 ctx->ac.v2i16,
1086 "");
1087 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1088 ctx->ac.i32_1, "");
1089 break;
1090 }
1091
1092 case nir_op_cube_face_coord: {
1093 src[0] = ac_to_float(&ctx->ac, src[0]);
1094 LLVMValueRef results[2];
1095 LLVMValueRef in[3];
1096 for (unsigned chan = 0; chan < 3; chan++)
1097 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1098 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1099 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1100 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1101 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1102 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1103 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1104 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1105 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1106 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1107 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1108 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1109 result = ac_build_gather_values(&ctx->ac, results, 2);
1110 break;
1111 }
1112
1113 case nir_op_cube_face_index: {
1114 src[0] = ac_to_float(&ctx->ac, src[0]);
1115 LLVMValueRef in[3];
1116 for (unsigned chan = 0; chan < 3; chan++)
1117 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1118 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1119 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1120 break;
1121 }
1122
1123 case nir_op_fmin3:
1124 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1125 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1126 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1127 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1128 break;
1129 case nir_op_umin3:
1130 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1131 result = ac_build_umin(&ctx->ac, result, src[2]);
1132 break;
1133 case nir_op_imin3:
1134 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1135 result = ac_build_imin(&ctx->ac, result, src[2]);
1136 break;
1137 case nir_op_fmax3:
1138 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1139 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1140 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1141 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1142 break;
1143 case nir_op_umax3:
1144 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1145 result = ac_build_umax(&ctx->ac, result, src[2]);
1146 break;
1147 case nir_op_imax3:
1148 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1149 result = ac_build_imax(&ctx->ac, result, src[2]);
1150 break;
1151 case nir_op_fmed3: {
1152 src[0] = ac_to_float(&ctx->ac, src[0]);
1153 src[1] = ac_to_float(&ctx->ac, src[1]);
1154 src[2] = ac_to_float(&ctx->ac, src[2]);
1155 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1156 instr->dest.dest.ssa.bit_size);
1157 break;
1158 }
1159 case nir_op_imed3: {
1160 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1161 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1162 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1163 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1164 break;
1165 }
1166 case nir_op_umed3: {
1167 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1168 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1169 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1170 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1171 break;
1172 }
1173
1174 default:
1175 fprintf(stderr, "Unknown NIR alu instr: ");
1176 nir_print_instr(&instr->instr, stderr);
1177 fprintf(stderr, "\n");
1178 abort();
1179 }
1180
1181 if (result) {
1182 assert(instr->dest.dest.is_ssa);
1183 result = ac_to_integer_or_pointer(&ctx->ac, result);
1184 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1185 }
1186 }
1187
1188 static void visit_load_const(struct ac_nir_context *ctx,
1189 const nir_load_const_instr *instr)
1190 {
1191 LLVMValueRef values[4], value = NULL;
1192 LLVMTypeRef element_type =
1193 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1194
1195 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1196 switch (instr->def.bit_size) {
1197 case 8:
1198 values[i] = LLVMConstInt(element_type,
1199 instr->value[i].u8, false);
1200 break;
1201 case 16:
1202 values[i] = LLVMConstInt(element_type,
1203 instr->value[i].u16, false);
1204 break;
1205 case 32:
1206 values[i] = LLVMConstInt(element_type,
1207 instr->value[i].u32, false);
1208 break;
1209 case 64:
1210 values[i] = LLVMConstInt(element_type,
1211 instr->value[i].u64, false);
1212 break;
1213 default:
1214 fprintf(stderr,
1215 "unsupported nir load_const bit_size: %d\n",
1216 instr->def.bit_size);
1217 abort();
1218 }
1219 }
1220 if (instr->def.num_components > 1) {
1221 value = LLVMConstVector(values, instr->def.num_components);
1222 } else
1223 value = values[0];
1224
1225 ctx->ssa_defs[instr->def.index] = value;
1226 }
1227
1228 static LLVMValueRef
1229 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1230 {
1231 LLVMValueRef size =
1232 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1233 LLVMConstInt(ctx->ac.i32, 2, false), "");
1234
1235 /* GFX8 only */
1236 if (ctx->ac.chip_class == GFX8 && in_elements) {
1237 /* On GFX8, the descriptor contains the size in bytes,
1238 * but TXQ must return the size in elements.
1239 * The stride is always non-zero for resources using TXQ.
1240 */
1241 LLVMValueRef stride =
1242 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1243 ctx->ac.i32_1, "");
1244 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1245 LLVMConstInt(ctx->ac.i32, 16, false), "");
1246 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1247 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1248
1249 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1250 }
1251 return size;
1252 }
1253
1254 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1255 * incorrectly forces nearest filtering if the texture format is integer.
1256 * The only effect it has on Gather4, which always returns 4 texels for
1257 * bilinear filtering, is that the final coordinates are off by 0.5 of
1258 * the texel size.
1259 *
1260 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1261 * or (0.5 / size) from the normalized coordinates.
1262 *
1263 * However, cube textures with 8_8_8_8 data formats require a different
1264 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1265 * precision in 32-bit data formats, so it needs to be applied dynamically at
1266 * runtime. In this case, return an i1 value that indicates whether the
1267 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1268 */
1269 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1270 nir_variable *var,
1271 struct ac_image_args *args,
1272 const nir_tex_instr *instr)
1273 {
1274 const struct glsl_type *type = glsl_without_array(var->type);
1275 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1276 LLVMValueRef wa_8888 = NULL;
1277 LLVMValueRef half_texel[2];
1278 LLVMValueRef result;
1279
1280 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1281
1282 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1283 LLVMValueRef formats;
1284 LLVMValueRef data_format;
1285 LLVMValueRef wa_formats;
1286
1287 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1288
1289 data_format = LLVMBuildLShr(ctx->builder, formats,
1290 LLVMConstInt(ctx->i32, 20, false), "");
1291 data_format = LLVMBuildAnd(ctx->builder, data_format,
1292 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1293 wa_8888 = LLVMBuildICmp(
1294 ctx->builder, LLVMIntEQ, data_format,
1295 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1296 "");
1297
1298 uint32_t wa_num_format =
1299 stype == GLSL_TYPE_UINT ?
1300 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1301 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1302 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1303 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1304 "");
1305 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1306 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1307
1308 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1309 args->resource = LLVMBuildInsertElement(
1310 ctx->builder, args->resource, formats, ctx->i32_1, "");
1311 }
1312
1313 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1314 assert(!wa_8888);
1315 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1316 } else {
1317 struct ac_image_args resinfo = {};
1318 LLVMBasicBlockRef bbs[2];
1319
1320 LLVMValueRef unnorm = NULL;
1321 LLVMValueRef default_offset = ctx->f32_0;
1322 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1323 !instr->is_array) {
1324 /* In vulkan, whether the sampler uses unnormalized
1325 * coordinates or not is a dynamic property of the
1326 * sampler. Hence, to figure out whether or not we
1327 * need to divide by the texture size, we need to test
1328 * the sampler at runtime. This tests the bit set by
1329 * radv_init_sampler().
1330 */
1331 LLVMValueRef sampler0 =
1332 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1333 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1334 LLVMConstInt(ctx->i32, 15, false), "");
1335 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1336 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1337 default_offset = LLVMConstReal(ctx->f32, -0.5);
1338 }
1339
1340 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1341 if (wa_8888 || unnorm) {
1342 assert(!(wa_8888 && unnorm));
1343 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1344 /* Skip the texture size query entirely if we don't need it. */
1345 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1346 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1347 }
1348
1349 /* Query the texture size. */
1350 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1351 resinfo.opcode = ac_image_get_resinfo;
1352 resinfo.dmask = 0xf;
1353 resinfo.lod = ctx->i32_0;
1354 resinfo.resource = args->resource;
1355 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1356 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1357
1358 /* Compute -0.5 / size. */
1359 for (unsigned c = 0; c < 2; c++) {
1360 half_texel[c] =
1361 LLVMBuildExtractElement(ctx->builder, size,
1362 LLVMConstInt(ctx->i32, c, 0), "");
1363 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1364 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1365 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1366 LLVMConstReal(ctx->f32, -0.5), "");
1367 }
1368
1369 if (wa_8888 || unnorm) {
1370 ac_build_endif(ctx, 2000);
1371
1372 for (unsigned c = 0; c < 2; c++) {
1373 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1374 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1375 values, bbs);
1376 }
1377 }
1378 }
1379
1380 for (unsigned c = 0; c < 2; c++) {
1381 LLVMValueRef tmp;
1382 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1383 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1384 }
1385
1386 args->attributes = AC_FUNC_ATTR_READNONE;
1387 result = ac_build_image_opcode(ctx, args);
1388
1389 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1390 LLVMValueRef tmp, tmp2;
1391
1392 /* if the cube workaround is in place, f2i the result. */
1393 for (unsigned c = 0; c < 4; c++) {
1394 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1395 if (stype == GLSL_TYPE_UINT)
1396 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1397 else
1398 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1399 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1400 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1401 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1402 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1403 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1404 }
1405 }
1406 return result;
1407 }
1408
1409 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1410 {
1411 nir_deref_instr *texture_deref_instr = NULL;
1412
1413 for (unsigned i = 0; i < instr->num_srcs; i++) {
1414 switch (instr->src[i].src_type) {
1415 case nir_tex_src_texture_deref:
1416 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1417 break;
1418 default:
1419 break;
1420 }
1421 }
1422 return texture_deref_instr;
1423 }
1424
1425 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1426 const nir_tex_instr *instr,
1427 struct ac_image_args *args)
1428 {
1429 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1430 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1431
1432 return ac_build_buffer_load_format(&ctx->ac,
1433 args->resource,
1434 args->coords[0],
1435 ctx->ac.i32_0,
1436 util_last_bit(mask),
1437 0, true);
1438 }
1439
1440 args->opcode = ac_image_sample;
1441
1442 switch (instr->op) {
1443 case nir_texop_txf:
1444 case nir_texop_txf_ms:
1445 case nir_texop_samples_identical:
1446 args->opcode = args->level_zero ||
1447 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1448 ac_image_load : ac_image_load_mip;
1449 args->level_zero = false;
1450 break;
1451 case nir_texop_txs:
1452 case nir_texop_query_levels:
1453 args->opcode = ac_image_get_resinfo;
1454 if (!args->lod)
1455 args->lod = ctx->ac.i32_0;
1456 args->level_zero = false;
1457 break;
1458 case nir_texop_tex:
1459 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1460 assert(!args->lod);
1461 args->level_zero = true;
1462 }
1463 break;
1464 case nir_texop_tg4:
1465 args->opcode = ac_image_gather4;
1466 args->level_zero = true;
1467 break;
1468 case nir_texop_lod:
1469 args->opcode = ac_image_get_lod;
1470 break;
1471 case nir_texop_fragment_fetch:
1472 case nir_texop_fragment_mask_fetch:
1473 args->opcode = ac_image_load;
1474 args->level_zero = false;
1475 break;
1476 default:
1477 break;
1478 }
1479
1480 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1481 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1482 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1483 const struct glsl_type *type = glsl_without_array(var->type);
1484 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1485 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1486 return lower_gather4_integer(&ctx->ac, var, args, instr);
1487 }
1488 }
1489
1490 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1491 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1492 if ((args->dim == ac_image_2darray ||
1493 args->dim == ac_image_2d) && !args->coords[1]) {
1494 args->coords[1] = ctx->ac.i32_0;
1495 }
1496 }
1497
1498 args->attributes = AC_FUNC_ATTR_READNONE;
1499 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1500 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1501 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1502 /* Prevent texture instructions with implicit derivatives from being
1503 * sinked into branches. */
1504 switch (instr->op) {
1505 case nir_texop_tex:
1506 case nir_texop_txb:
1507 case nir_texop_lod:
1508 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1509 break;
1510 default:
1511 break;
1512 }
1513 }
1514
1515 return ac_build_image_opcode(&ctx->ac, args);
1516 }
1517
1518 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1519 nir_intrinsic_instr *instr)
1520 {
1521 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1522 LLVMValueRef index = get_src(ctx, instr->src[1]);
1523
1524 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1525 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1526 return result;
1527 }
1528
1529 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1530 nir_intrinsic_instr *instr)
1531 {
1532 LLVMValueRef ptr, addr;
1533 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1534 unsigned index = nir_intrinsic_base(instr);
1535
1536 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1537 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1538
1539 /* Load constant values from user SGPRS when possible, otherwise
1540 * fallback to the default path that loads directly from memory.
1541 */
1542 if (LLVMIsConstant(src0) &&
1543 instr->dest.ssa.bit_size == 32) {
1544 unsigned count = instr->dest.ssa.num_components;
1545 unsigned offset = index;
1546
1547 offset += LLVMConstIntGetZExtValue(src0);
1548 offset /= 4;
1549
1550 offset -= ctx->args->base_inline_push_consts;
1551
1552 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1553 if (offset + count <= num_inline_push_consts) {
1554 LLVMValueRef push_constants[num_inline_push_consts];
1555 for (unsigned i = 0; i < num_inline_push_consts; i++)
1556 push_constants[i] = ac_get_arg(&ctx->ac,
1557 ctx->args->inline_push_consts[i]);
1558 return ac_build_gather_values(&ctx->ac,
1559 push_constants + offset,
1560 count);
1561 }
1562 }
1563
1564 ptr = LLVMBuildGEP(ctx->ac.builder,
1565 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1566
1567 if (instr->dest.ssa.bit_size == 8) {
1568 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1569 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1570 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1571 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1572
1573 LLVMValueRef params[3];
1574 if (load_dwords > 1) {
1575 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1576 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1577 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1578 } else {
1579 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1580 params[0] = ctx->ac.i32_0;
1581 params[1] = res;
1582 }
1583 params[2] = addr;
1584 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1585
1586 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1587 if (instr->dest.ssa.num_components > 1)
1588 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1589 return res;
1590 } else if (instr->dest.ssa.bit_size == 16) {
1591 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1592 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1593 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1594 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1595 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1596 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1597 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1598 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1599 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1600 LLVMConstInt(ctx->ac.i32, 4, false)};
1601 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1602 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1603 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1604 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1605 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1606 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1607 }
1608
1609 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1610
1611 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1612 }
1613
1614 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1615 const nir_intrinsic_instr *instr)
1616 {
1617 LLVMValueRef index = get_src(ctx, instr->src[0]);
1618
1619 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1620 }
1621
1622 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1623 {
1624 uint32_t new_mask = 0;
1625 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1626 if (mask & (1u << i))
1627 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1628 return new_mask;
1629 }
1630
1631 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1632 unsigned start, unsigned count)
1633 {
1634 LLVMValueRef mask[] = {
1635 ctx->i32_0, ctx->i32_1,
1636 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1637
1638 unsigned src_elements = ac_get_llvm_num_components(src);
1639
1640 if (count == src_elements) {
1641 assert(start == 0);
1642 return src;
1643 } else if (count == 1) {
1644 assert(start < src_elements);
1645 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1646 } else {
1647 assert(start + count <= src_elements);
1648 assert(count <= 4);
1649 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1650 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1651 }
1652 }
1653
1654 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1655 enum gl_access_qualifier access,
1656 bool may_store_unaligned,
1657 bool writeonly_memory)
1658 {
1659 unsigned cache_policy = 0;
1660
1661 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1662 * store opcodes not aligned to a dword are affected. The only way to
1663 * get unaligned stores is through shader images.
1664 */
1665 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1666 /* If this is write-only, don't keep data in L1 to prevent
1667 * evicting L1 cache lines that may be needed by other
1668 * instructions.
1669 */
1670 writeonly_memory ||
1671 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1672 cache_policy |= ac_glc;
1673 }
1674
1675 if (access & ACCESS_STREAM_CACHE_POLICY)
1676 cache_policy |= ac_slc;
1677
1678 return cache_policy;
1679 }
1680
1681 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1682 struct waterfall_context *wctx,
1683 const nir_intrinsic_instr *instr,
1684 nir_src src)
1685 {
1686 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1687 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1688 }
1689
1690 static void visit_store_ssbo(struct ac_nir_context *ctx,
1691 nir_intrinsic_instr *instr)
1692 {
1693 if (ctx->ac.postponed_kill) {
1694 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1695 ctx->ac.postponed_kill, "");
1696 ac_build_ifcc(&ctx->ac, cond, 7000);
1697 }
1698
1699 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1700 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1701 unsigned writemask = nir_intrinsic_write_mask(instr);
1702 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1703 bool writeonly_memory = access & ACCESS_NON_READABLE;
1704 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1705
1706 struct waterfall_context wctx;
1707 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1708
1709 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1710 LLVMValueRef base_data = src_data;
1711 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1712 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1713
1714 while (writemask) {
1715 int start, count;
1716 LLVMValueRef data, offset;
1717 LLVMTypeRef data_type;
1718
1719 u_bit_scan_consecutive_range(&writemask, &start, &count);
1720
1721 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1722 * writes into a 2-element and a 1-element write. */
1723 if (count == 3 &&
1724 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1725 writemask |= 1 << (start + 2);
1726 count = 2;
1727 }
1728 int num_bytes = count * elem_size_bytes; /* count in bytes */
1729
1730 /* we can only store 4 DWords at the same time.
1731 * can only happen for 64 Bit vectors. */
1732 if (num_bytes > 16) {
1733 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1734 count = 2;
1735 num_bytes = 16;
1736 }
1737
1738 /* check alignment of 16 Bit stores */
1739 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1740 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1741 count = 1;
1742 num_bytes = 2;
1743 }
1744 data = extract_vector_range(&ctx->ac, base_data, start, count);
1745
1746 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1747 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1748
1749 if (num_bytes == 1) {
1750 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1751 offset, ctx->ac.i32_0,
1752 cache_policy);
1753 } else if (num_bytes == 2) {
1754 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1755 offset, ctx->ac.i32_0,
1756 cache_policy);
1757 } else {
1758 int num_channels = num_bytes / 4;
1759
1760 switch (num_bytes) {
1761 case 16: /* v4f32 */
1762 data_type = ctx->ac.v4f32;
1763 break;
1764 case 12: /* v3f32 */
1765 data_type = ctx->ac.v3f32;
1766 break;
1767 case 8: /* v2f32 */
1768 data_type = ctx->ac.v2f32;
1769 break;
1770 case 4: /* f32 */
1771 data_type = ctx->ac.f32;
1772 break;
1773 default:
1774 unreachable("Malformed vector store.");
1775 }
1776 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1777
1778 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1779 num_channels, offset,
1780 ctx->ac.i32_0, 0,
1781 cache_policy);
1782 }
1783 }
1784
1785 exit_waterfall(ctx, &wctx, NULL);
1786
1787 if (ctx->ac.postponed_kill)
1788 ac_build_endif(&ctx->ac, 7000);
1789 }
1790
1791 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1792 LLVMValueRef descriptor,
1793 LLVMValueRef offset,
1794 LLVMValueRef compare,
1795 LLVMValueRef exchange)
1796 {
1797 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1798 if (ctx->abi->robust_buffer_access) {
1799 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1800
1801 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1802 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1803
1804 ac_build_ifcc(&ctx->ac, cond, -1);
1805
1806 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1807 }
1808
1809 LLVMValueRef ptr_parts[2] = {
1810 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1811 LLVMBuildAnd(ctx->ac.builder,
1812 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1813 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1814 };
1815
1816 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1817 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1818
1819 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1820
1821 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1822 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1823 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1824 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1825
1826 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1827 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1828
1829 if (ctx->abi->robust_buffer_access) {
1830 ac_build_endif(&ctx->ac, -1);
1831
1832 LLVMBasicBlockRef incoming_blocks[2] = {
1833 start_block,
1834 then_block,
1835 };
1836
1837 LLVMValueRef incoming_values[2] = {
1838 LLVMConstInt(ctx->ac.i64, 0, 0),
1839 result,
1840 };
1841 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1842 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1843 return ret;
1844 } else {
1845 return result;
1846 }
1847 }
1848
1849 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1850 nir_intrinsic_instr *instr)
1851 {
1852 if (ctx->ac.postponed_kill) {
1853 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1854 ctx->ac.postponed_kill, "");
1855 ac_build_ifcc(&ctx->ac, cond, 7001);
1856 }
1857
1858 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1859 const char *op;
1860 char name[64], type[8];
1861 LLVMValueRef params[6], descriptor;
1862 LLVMValueRef result;
1863 int arg_count = 0;
1864
1865 struct waterfall_context wctx;
1866 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1867
1868 switch (instr->intrinsic) {
1869 case nir_intrinsic_ssbo_atomic_add:
1870 op = "add";
1871 break;
1872 case nir_intrinsic_ssbo_atomic_imin:
1873 op = "smin";
1874 break;
1875 case nir_intrinsic_ssbo_atomic_umin:
1876 op = "umin";
1877 break;
1878 case nir_intrinsic_ssbo_atomic_imax:
1879 op = "smax";
1880 break;
1881 case nir_intrinsic_ssbo_atomic_umax:
1882 op = "umax";
1883 break;
1884 case nir_intrinsic_ssbo_atomic_and:
1885 op = "and";
1886 break;
1887 case nir_intrinsic_ssbo_atomic_or:
1888 op = "or";
1889 break;
1890 case nir_intrinsic_ssbo_atomic_xor:
1891 op = "xor";
1892 break;
1893 case nir_intrinsic_ssbo_atomic_exchange:
1894 op = "swap";
1895 break;
1896 case nir_intrinsic_ssbo_atomic_comp_swap:
1897 op = "cmpswap";
1898 break;
1899 default:
1900 abort();
1901 }
1902
1903 descriptor = ctx->abi->load_ssbo(ctx->abi,
1904 rsrc_base,
1905 true);
1906
1907 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1908 return_type == ctx->ac.i64) {
1909 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1910 get_src(ctx, instr->src[1]),
1911 get_src(ctx, instr->src[2]),
1912 get_src(ctx, instr->src[3]));
1913 } else {
1914 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1915 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1916 }
1917 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1918 params[arg_count++] = descriptor;
1919
1920 if (LLVM_VERSION_MAJOR >= 9) {
1921 /* XXX: The new raw/struct atomic intrinsics are buggy with
1922 * LLVM 8, see r358579.
1923 */
1924 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1925 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1926 params[arg_count++] = ctx->ac.i32_0; /* slc */
1927
1928 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1929 snprintf(name, sizeof(name),
1930 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1931 } else {
1932 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1933 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1934 params[arg_count++] = ctx->ac.i1false; /* slc */
1935
1936 assert(return_type == ctx->ac.i32);
1937 snprintf(name, sizeof(name),
1938 "llvm.amdgcn.buffer.atomic.%s", op);
1939 }
1940
1941 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1942 arg_count, 0);
1943 }
1944
1945 result = exit_waterfall(ctx, &wctx, result);
1946 if (ctx->ac.postponed_kill)
1947 ac_build_endif(&ctx->ac, 7001);
1948 return result;
1949 }
1950
1951 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1952 nir_intrinsic_instr *instr)
1953 {
1954 struct waterfall_context wctx;
1955 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1956
1957 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1958 int num_components = instr->num_components;
1959 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1960 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1961
1962 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1963 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1964 LLVMValueRef vindex = ctx->ac.i32_0;
1965
1966 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1967 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1968
1969 LLVMValueRef results[4];
1970 for (int i = 0; i < num_components;) {
1971 int num_elems = num_components - i;
1972 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1973 num_elems = 1;
1974 if (num_elems * elem_size_bytes > 16)
1975 num_elems = 16 / elem_size_bytes;
1976 int load_bytes = num_elems * elem_size_bytes;
1977
1978 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1979
1980 LLVMValueRef ret;
1981
1982 if (load_bytes == 1) {
1983 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1984 rsrc,
1985 offset,
1986 ctx->ac.i32_0,
1987 immoffset,
1988 cache_policy);
1989 } else if (load_bytes == 2) {
1990 ret = ac_build_tbuffer_load_short(&ctx->ac,
1991 rsrc,
1992 offset,
1993 ctx->ac.i32_0,
1994 immoffset,
1995 cache_policy);
1996 } else {
1997 int num_channels = util_next_power_of_two(load_bytes) / 4;
1998 bool can_speculate = access & ACCESS_CAN_REORDER;
1999
2000 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2001 vindex, offset, immoffset, 0,
2002 cache_policy, can_speculate, false);
2003 }
2004
2005 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2006 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2007 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2008
2009 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2010 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2011
2012 for (unsigned j = 0; j < num_elems; j++) {
2013 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2014 }
2015 i += num_elems;
2016 }
2017
2018 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2019 return exit_waterfall(ctx, &wctx, ret);
2020 }
2021
2022 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2023 struct waterfall_context *wctx,
2024 const nir_intrinsic_instr *instr)
2025 {
2026 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2027 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2028 }
2029
2030 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2031 nir_intrinsic_instr *instr)
2032 {
2033 struct waterfall_context wctx;
2034 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2035
2036 LLVMValueRef ret;
2037 LLVMValueRef rsrc = rsrc_base;
2038 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2039 int num_components = instr->num_components;
2040
2041 if (ctx->abi->load_ubo)
2042 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2043
2044 if (instr->dest.ssa.bit_size == 64)
2045 num_components *= 2;
2046
2047 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2048 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2049 LLVMValueRef results[num_components];
2050 for (unsigned i = 0; i < num_components; ++i) {
2051 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2052 load_bytes * i, 0);
2053
2054 if (load_bytes == 1) {
2055 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2056 rsrc,
2057 offset,
2058 ctx->ac.i32_0,
2059 immoffset,
2060 0);
2061 } else {
2062 assert(load_bytes == 2);
2063 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2064 rsrc,
2065 offset,
2066 ctx->ac.i32_0,
2067 immoffset,
2068 0);
2069 }
2070 }
2071 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2072 } else {
2073 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2074 NULL, 0, 0, true, true);
2075
2076 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2077 }
2078
2079 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2080 get_def_type(ctx, &instr->dest.ssa), "");
2081
2082 return exit_waterfall(ctx, &wctx, ret);
2083 }
2084
2085 static void
2086 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2087 bool vs_in, unsigned *vertex_index_out,
2088 LLVMValueRef *vertex_index_ref,
2089 unsigned *const_out, LLVMValueRef *indir_out)
2090 {
2091 nir_variable *var = nir_deref_instr_get_variable(instr);
2092 nir_deref_path path;
2093 unsigned idx_lvl = 1;
2094
2095 nir_deref_path_init(&path, instr, NULL);
2096
2097 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2098 if (vertex_index_ref) {
2099 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2100 if (vertex_index_out)
2101 *vertex_index_out = 0;
2102 } else {
2103 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2104 }
2105 ++idx_lvl;
2106 }
2107
2108 uint32_t const_offset = 0;
2109 LLVMValueRef offset = NULL;
2110
2111 if (var->data.compact) {
2112 assert(instr->deref_type == nir_deref_type_array);
2113 const_offset = nir_src_as_uint(instr->arr.index);
2114 goto out;
2115 }
2116
2117 for (; path.path[idx_lvl]; ++idx_lvl) {
2118 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2119 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2120 unsigned index = path.path[idx_lvl]->strct.index;
2121
2122 for (unsigned i = 0; i < index; i++) {
2123 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2124 const_offset += glsl_count_attribute_slots(ft, vs_in);
2125 }
2126 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2127 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2128 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2129 const_offset += size *
2130 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2131 } else {
2132 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2133 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2134 if (offset)
2135 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2136 else
2137 offset = array_off;
2138 }
2139 } else
2140 unreachable("Uhandled deref type in get_deref_instr_offset");
2141 }
2142
2143 out:
2144 nir_deref_path_finish(&path);
2145
2146 if (const_offset && offset)
2147 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2148 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2149 "");
2150
2151 *const_out = const_offset;
2152 *indir_out = offset;
2153 }
2154
2155 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2156 nir_intrinsic_instr *instr,
2157 bool load_inputs)
2158 {
2159 LLVMValueRef result;
2160 LLVMValueRef vertex_index = NULL;
2161 LLVMValueRef indir_index = NULL;
2162 unsigned const_index = 0;
2163
2164 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2165
2166 unsigned location = var->data.location;
2167 unsigned driver_location = var->data.driver_location;
2168 const bool is_patch = var->data.patch ||
2169 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2170 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2171 const bool is_compact = var->data.compact;
2172
2173 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2174 false, NULL, is_patch ? NULL : &vertex_index,
2175 &const_index, &indir_index);
2176
2177 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2178
2179 LLVMTypeRef src_component_type;
2180 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2181 src_component_type = LLVMGetElementType(dest_type);
2182 else
2183 src_component_type = dest_type;
2184
2185 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2186 vertex_index, indir_index,
2187 const_index, location, driver_location,
2188 var->data.location_frac,
2189 instr->num_components,
2190 is_patch, is_compact, load_inputs);
2191 if (instr->dest.ssa.bit_size == 16) {
2192 result = ac_to_integer(&ctx->ac, result);
2193 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2194 }
2195 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2196 }
2197
2198 static unsigned
2199 type_scalar_size_bytes(const struct glsl_type *type)
2200 {
2201 assert(glsl_type_is_vector_or_scalar(type) ||
2202 glsl_type_is_matrix(type));
2203 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2204 }
2205
2206 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2207 nir_intrinsic_instr *instr)
2208 {
2209 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2210 nir_variable *var = nir_deref_instr_get_variable(deref);
2211
2212 LLVMValueRef values[8];
2213 int idx = 0;
2214 int ve = instr->dest.ssa.num_components;
2215 unsigned comp = 0;
2216 LLVMValueRef indir_index;
2217 LLVMValueRef ret;
2218 unsigned const_index;
2219 unsigned stride = 4;
2220 int mode = deref->mode;
2221
2222 if (var) {
2223 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2224 var->data.mode == nir_var_shader_in;
2225 idx = var->data.driver_location;
2226 comp = var->data.location_frac;
2227 mode = var->data.mode;
2228
2229 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2230 &const_index, &indir_index);
2231
2232 if (var->data.compact) {
2233 stride = 1;
2234 const_index += comp;
2235 comp = 0;
2236 }
2237 }
2238
2239 if (instr->dest.ssa.bit_size == 64 &&
2240 (deref->mode == nir_var_shader_in ||
2241 deref->mode == nir_var_shader_out ||
2242 deref->mode == nir_var_function_temp))
2243 ve *= 2;
2244
2245 switch (mode) {
2246 case nir_var_shader_in:
2247 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2248 ctx->stage == MESA_SHADER_TESS_EVAL) {
2249 return load_tess_varyings(ctx, instr, true);
2250 }
2251
2252 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2253 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2254 LLVMValueRef indir_index;
2255 unsigned const_index, vertex_index;
2256 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2257 &const_index, &indir_index);
2258 assert(indir_index == NULL);
2259
2260 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2261 var->data.driver_location,
2262 var->data.location_frac,
2263 instr->num_components, vertex_index, const_index, type);
2264 }
2265
2266 for (unsigned chan = comp; chan < ve + comp; chan++) {
2267 if (indir_index) {
2268 unsigned count = glsl_count_attribute_slots(
2269 var->type,
2270 ctx->stage == MESA_SHADER_VERTEX);
2271 count -= chan / 4;
2272 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2273 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2274 stride, false, true);
2275
2276 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2277 tmp_vec,
2278 indir_index, "");
2279 } else
2280 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2281 }
2282 break;
2283 case nir_var_function_temp:
2284 for (unsigned chan = 0; chan < ve; chan++) {
2285 if (indir_index) {
2286 unsigned count = glsl_count_attribute_slots(
2287 var->type, false);
2288 count -= chan / 4;
2289 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2290 &ctx->ac, ctx->locals + idx + chan, count,
2291 stride, true, true);
2292
2293 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2294 tmp_vec,
2295 indir_index, "");
2296 } else {
2297 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2298 }
2299 }
2300 break;
2301 case nir_var_shader_out:
2302 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2303 return load_tess_varyings(ctx, instr, false);
2304 }
2305
2306 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2307 var->data.fb_fetch_output &&
2308 ctx->abi->emit_fbfetch)
2309 return ctx->abi->emit_fbfetch(ctx->abi);
2310
2311 for (unsigned chan = comp; chan < ve + comp; chan++) {
2312 if (indir_index) {
2313 unsigned count = glsl_count_attribute_slots(
2314 var->type, false);
2315 count -= chan / 4;
2316 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2317 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2318 stride, true, true);
2319
2320 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2321 tmp_vec,
2322 indir_index, "");
2323 } else {
2324 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2325 ctx->abi->outputs[idx + chan + const_index * stride],
2326 "");
2327 }
2328 }
2329 break;
2330 case nir_var_mem_global: {
2331 LLVMValueRef address = get_src(ctx, instr->src[0]);
2332 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2333 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2334 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2335
2336 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2337 if (stride != natural_stride) {
2338 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2339 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2340 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2341
2342 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2343 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2344 values[i] = LLVMBuildLoad(ctx->ac.builder,
2345 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2346 }
2347 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2348 } else {
2349 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2350 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2351 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2352 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2353 return val;
2354 }
2355 }
2356 default:
2357 unreachable("unhandle variable mode");
2358 }
2359 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2360 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2361 }
2362
2363 static void
2364 visit_store_var(struct ac_nir_context *ctx,
2365 nir_intrinsic_instr *instr)
2366 {
2367 if (ctx->ac.postponed_kill) {
2368 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2369 ctx->ac.postponed_kill, "");
2370 ac_build_ifcc(&ctx->ac, cond, 7002);
2371 }
2372
2373 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2374 nir_variable *var = nir_deref_instr_get_variable(deref);
2375
2376 LLVMValueRef temp_ptr, value;
2377 int idx = 0;
2378 unsigned comp = 0;
2379 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2380 int writemask = instr->const_index[0];
2381 LLVMValueRef indir_index;
2382 unsigned const_index;
2383
2384 if (var) {
2385 get_deref_offset(ctx, deref, false,
2386 NULL, NULL, &const_index, &indir_index);
2387 idx = var->data.driver_location;
2388 comp = var->data.location_frac;
2389
2390 if (var->data.compact) {
2391 const_index += comp;
2392 comp = 0;
2393 }
2394 }
2395
2396 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2397 (deref->mode == nir_var_shader_out ||
2398 deref->mode == nir_var_function_temp)) {
2399
2400 src = LLVMBuildBitCast(ctx->ac.builder, src,
2401 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2402 "");
2403
2404 writemask = widen_mask(writemask, 2);
2405 }
2406
2407 writemask = writemask << comp;
2408
2409 switch (deref->mode) {
2410 case nir_var_shader_out:
2411
2412 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2413 LLVMValueRef vertex_index = NULL;
2414 LLVMValueRef indir_index = NULL;
2415 unsigned const_index = 0;
2416 const bool is_patch = var->data.patch ||
2417 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2418 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2419
2420 get_deref_offset(ctx, deref, false, NULL,
2421 is_patch ? NULL : &vertex_index,
2422 &const_index, &indir_index);
2423
2424 ctx->abi->store_tcs_outputs(ctx->abi, var,
2425 vertex_index, indir_index,
2426 const_index, src, writemask);
2427 break;
2428 }
2429
2430 for (unsigned chan = 0; chan < 8; chan++) {
2431 int stride = 4;
2432 if (!(writemask & (1 << chan)))
2433 continue;
2434
2435 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2436
2437 if (var->data.compact)
2438 stride = 1;
2439 if (indir_index) {
2440 unsigned count = glsl_count_attribute_slots(
2441 var->type, false);
2442 count -= chan / 4;
2443 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2444 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2445 stride, true, true);
2446
2447 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2448 value, indir_index, "");
2449 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2450 count, stride, tmp_vec);
2451
2452 } else {
2453 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2454
2455 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2456 }
2457 }
2458 break;
2459 case nir_var_function_temp:
2460 for (unsigned chan = 0; chan < 8; chan++) {
2461 if (!(writemask & (1 << chan)))
2462 continue;
2463
2464 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2465 if (indir_index) {
2466 unsigned count = glsl_count_attribute_slots(
2467 var->type, false);
2468 count -= chan / 4;
2469 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2470 &ctx->ac, ctx->locals + idx + chan, count,
2471 4, true, true);
2472
2473 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2474 value, indir_index, "");
2475 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2476 count, 4, tmp_vec);
2477 } else {
2478 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2479
2480 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2481 }
2482 }
2483 break;
2484
2485 case nir_var_mem_global: {
2486 int writemask = instr->const_index[0];
2487 LLVMValueRef address = get_src(ctx, instr->src[0]);
2488 LLVMValueRef val = get_src(ctx, instr->src[1]);
2489
2490 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2491 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2492 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2493
2494 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2495 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2496 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2497
2498 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2499 stride == natural_stride) {
2500 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2501 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2502 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2503
2504 val = LLVMBuildBitCast(ctx->ac.builder, val,
2505 LLVMGetElementType(LLVMTypeOf(address)), "");
2506 LLVMBuildStore(ctx->ac.builder, val, address);
2507 } else {
2508 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2509 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2510 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2511 for (unsigned chan = 0; chan < 4; chan++) {
2512 if (!(writemask & (1 << chan)))
2513 continue;
2514
2515 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2516
2517 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2518 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2519 chan);
2520 src = LLVMBuildBitCast(ctx->ac.builder, src,
2521 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2522 LLVMBuildStore(ctx->ac.builder, src, ptr);
2523 }
2524 }
2525 break;
2526 }
2527 default:
2528 abort();
2529 break;
2530 }
2531
2532 if (ctx->ac.postponed_kill)
2533 ac_build_endif(&ctx->ac, 7002);
2534 }
2535
2536 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2537 {
2538 switch (dim) {
2539 case GLSL_SAMPLER_DIM_BUF:
2540 return 1;
2541 case GLSL_SAMPLER_DIM_1D:
2542 return array ? 2 : 1;
2543 case GLSL_SAMPLER_DIM_2D:
2544 return array ? 3 : 2;
2545 case GLSL_SAMPLER_DIM_MS:
2546 return array ? 4 : 3;
2547 case GLSL_SAMPLER_DIM_3D:
2548 case GLSL_SAMPLER_DIM_CUBE:
2549 return 3;
2550 case GLSL_SAMPLER_DIM_RECT:
2551 case GLSL_SAMPLER_DIM_SUBPASS:
2552 return 2;
2553 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2554 return 3;
2555 default:
2556 break;
2557 }
2558 return 0;
2559 }
2560
2561 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2562 LLVMValueRef coord_x, LLVMValueRef coord_y,
2563 LLVMValueRef coord_z,
2564 LLVMValueRef sample_index,
2565 LLVMValueRef fmask_desc_ptr)
2566 {
2567 unsigned sample_chan = coord_z ? 3 : 2;
2568 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2569 addr[sample_chan] = sample_index;
2570
2571 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2572 return addr[sample_chan];
2573 }
2574
2575 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2576 {
2577 assert(instr->src[0].is_ssa);
2578 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2579 }
2580
2581 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2582 const nir_intrinsic_instr *instr,
2583 LLVMValueRef dynamic_index,
2584 enum ac_descriptor_type desc_type,
2585 bool write)
2586 {
2587 nir_deref_instr *deref_instr =
2588 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2589 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2590
2591 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2592 }
2593
2594 static void get_image_coords(struct ac_nir_context *ctx,
2595 const nir_intrinsic_instr *instr,
2596 LLVMValueRef dynamic_desc_index,
2597 struct ac_image_args *args,
2598 enum glsl_sampler_dim dim,
2599 bool is_array)
2600 {
2601 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2602 LLVMValueRef masks[] = {
2603 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2604 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2605 };
2606 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2607
2608 int count;
2609 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2610 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2611 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2612 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2613 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2614 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2615 count = image_type_to_components_count(dim, is_array);
2616
2617 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2618 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2619 LLVMValueRef fmask_load_address[3];
2620
2621 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2622 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2623 if (is_array)
2624 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2625 else
2626 fmask_load_address[2] = NULL;
2627
2628 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2629 fmask_load_address[0],
2630 fmask_load_address[1],
2631 fmask_load_address[2],
2632 sample_index,
2633 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2634 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2635 }
2636 if (count == 1 && !gfx9_1d) {
2637 if (instr->src[1].ssa->num_components)
2638 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2639 else
2640 args->coords[0] = src0;
2641 } else {
2642 int chan;
2643 if (is_ms)
2644 count--;
2645 for (chan = 0; chan < count; ++chan) {
2646 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2647 }
2648
2649 if (gfx9_1d) {
2650 if (is_array) {
2651 args->coords[2] = args->coords[1];
2652 args->coords[1] = ctx->ac.i32_0;
2653 } else
2654 args->coords[1] = ctx->ac.i32_0;
2655 count++;
2656 }
2657 if (ctx->ac.chip_class == GFX9 &&
2658 dim == GLSL_SAMPLER_DIM_2D &&
2659 !is_array) {
2660 /* The hw can't bind a slice of a 3D image as a 2D
2661 * image, because it ignores BASE_ARRAY if the target
2662 * is 3D. The workaround is to read BASE_ARRAY and set
2663 * it as the 3rd address operand for all 2D images.
2664 */
2665 LLVMValueRef first_layer, const5, mask;
2666
2667 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2668 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2669 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2670 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2671
2672 args->coords[count] = first_layer;
2673 count++;
2674 }
2675
2676
2677 if (is_ms) {
2678 args->coords[count] = sample_index;
2679 count++;
2680 }
2681 }
2682 }
2683
2684 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2685 const nir_intrinsic_instr *instr,
2686 LLVMValueRef dynamic_index,
2687 bool write, bool atomic)
2688 {
2689 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2690 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2691 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2692 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2693 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2694
2695 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2696 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2697 elem_count, stride, "");
2698
2699 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2700 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2701 }
2702 return rsrc;
2703 }
2704
2705 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2706 struct waterfall_context *wctx,
2707 const nir_intrinsic_instr *instr)
2708 {
2709 nir_deref_instr *deref_instr = NULL;
2710
2711 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2712 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2713
2714 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2715 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2716 }
2717
2718 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2719 const nir_intrinsic_instr *instr,
2720 bool bindless)
2721 {
2722 LLVMValueRef res;
2723
2724 enum glsl_sampler_dim dim;
2725 enum gl_access_qualifier access;
2726 bool is_array;
2727 if (bindless) {
2728 dim = nir_intrinsic_image_dim(instr);
2729 access = nir_intrinsic_access(instr);
2730 is_array = nir_intrinsic_image_array(instr);
2731 } else {
2732 const nir_deref_instr *image_deref = get_image_deref(instr);
2733 const struct glsl_type *type = image_deref->type;
2734 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2735 dim = glsl_get_sampler_dim(type);
2736 access = var->data.access;
2737 is_array = glsl_sampler_type_is_array(type);
2738 }
2739
2740 struct waterfall_context wctx;
2741 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2742
2743 struct ac_image_args args = {};
2744
2745 args.cache_policy = get_cache_policy(ctx, access, false, false);
2746
2747 if (dim == GLSL_SAMPLER_DIM_BUF) {
2748 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2749 unsigned num_channels = util_last_bit(mask);
2750 LLVMValueRef rsrc, vindex;
2751
2752 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2753 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2754 ctx->ac.i32_0, "");
2755
2756 bool can_speculate = access & ACCESS_CAN_REORDER;
2757 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2758 ctx->ac.i32_0, num_channels,
2759 args.cache_policy,
2760 can_speculate);
2761 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2762
2763 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2764 res = ac_to_integer(&ctx->ac, res);
2765 } else {
2766 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2767
2768 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2769 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2770 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2771 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2772 if (!level_zero)
2773 args.lod = get_src(ctx, instr->src[3]);
2774 args.dmask = 15;
2775 args.attributes = AC_FUNC_ATTR_READONLY;
2776
2777 res = ac_build_image_opcode(&ctx->ac, &args);
2778 }
2779 return exit_waterfall(ctx, &wctx, res);
2780 }
2781
2782 static void visit_image_store(struct ac_nir_context *ctx,
2783 const nir_intrinsic_instr *instr,
2784 bool bindless)
2785 {
2786 if (ctx->ac.postponed_kill) {
2787 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2788 ctx->ac.postponed_kill, "");
2789 ac_build_ifcc(&ctx->ac, cond, 7003);
2790 }
2791
2792 enum glsl_sampler_dim dim;
2793 enum gl_access_qualifier access;
2794 bool is_array;
2795
2796 if (bindless) {
2797 dim = nir_intrinsic_image_dim(instr);
2798 access = nir_intrinsic_access(instr);
2799 is_array = nir_intrinsic_image_array(instr);
2800 } else {
2801 const nir_deref_instr *image_deref = get_image_deref(instr);
2802 const struct glsl_type *type = image_deref->type;
2803 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2804 dim = glsl_get_sampler_dim(type);
2805 access = var->data.access;
2806 is_array = glsl_sampler_type_is_array(type);
2807 }
2808
2809 struct waterfall_context wctx;
2810 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2811
2812 bool writeonly_memory = access & ACCESS_NON_READABLE;
2813 struct ac_image_args args = {};
2814
2815 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2816
2817 if (dim == GLSL_SAMPLER_DIM_BUF) {
2818 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2819 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2820 unsigned src_channels = ac_get_llvm_num_components(src);
2821 LLVMValueRef vindex;
2822
2823 if (src_channels == 3)
2824 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2825
2826 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2827 get_src(ctx, instr->src[1]),
2828 ctx->ac.i32_0, "");
2829
2830 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2831 ctx->ac.i32_0, src_channels,
2832 args.cache_policy);
2833 } else {
2834 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2835
2836 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2837 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2838 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2839 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2840 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2841 if (!level_zero)
2842 args.lod = get_src(ctx, instr->src[4]);
2843 args.dmask = 15;
2844
2845 ac_build_image_opcode(&ctx->ac, &args);
2846 }
2847
2848 exit_waterfall(ctx, &wctx, NULL);
2849 if (ctx->ac.postponed_kill)
2850 ac_build_endif(&ctx->ac, 7003);
2851 }
2852
2853 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2854 const nir_intrinsic_instr *instr,
2855 bool bindless)
2856 {
2857 if (ctx->ac.postponed_kill) {
2858 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2859 ctx->ac.postponed_kill, "");
2860 ac_build_ifcc(&ctx->ac, cond, 7004);
2861 }
2862
2863 LLVMValueRef params[7];
2864 int param_count = 0;
2865
2866 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2867 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2868 const char *atomic_name;
2869 char intrinsic_name[64];
2870 enum ac_atomic_op atomic_subop;
2871 ASSERTED int length;
2872
2873 enum glsl_sampler_dim dim;
2874 bool is_array;
2875 if (bindless) {
2876 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2877 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2878 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2879 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2880 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2881 assert(format == GL_R32UI || format == GL_R32I);
2882 }
2883 dim = nir_intrinsic_image_dim(instr);
2884 is_array = nir_intrinsic_image_array(instr);
2885 } else {
2886 const struct glsl_type *type = get_image_deref(instr)->type;
2887 dim = glsl_get_sampler_dim(type);
2888 is_array = glsl_sampler_type_is_array(type);
2889 }
2890
2891 struct waterfall_context wctx;
2892 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2893
2894 switch (instr->intrinsic) {
2895 case nir_intrinsic_bindless_image_atomic_add:
2896 case nir_intrinsic_image_deref_atomic_add:
2897 atomic_name = "add";
2898 atomic_subop = ac_atomic_add;
2899 break;
2900 case nir_intrinsic_bindless_image_atomic_imin:
2901 case nir_intrinsic_image_deref_atomic_imin:
2902 atomic_name = "smin";
2903 atomic_subop = ac_atomic_smin;
2904 break;
2905 case nir_intrinsic_bindless_image_atomic_umin:
2906 case nir_intrinsic_image_deref_atomic_umin:
2907 atomic_name = "umin";
2908 atomic_subop = ac_atomic_umin;
2909 break;
2910 case nir_intrinsic_bindless_image_atomic_imax:
2911 case nir_intrinsic_image_deref_atomic_imax:
2912 atomic_name = "smax";
2913 atomic_subop = ac_atomic_smax;
2914 break;
2915 case nir_intrinsic_bindless_image_atomic_umax:
2916 case nir_intrinsic_image_deref_atomic_umax:
2917 atomic_name = "umax";
2918 atomic_subop = ac_atomic_umax;
2919 break;
2920 case nir_intrinsic_bindless_image_atomic_and:
2921 case nir_intrinsic_image_deref_atomic_and:
2922 atomic_name = "and";
2923 atomic_subop = ac_atomic_and;
2924 break;
2925 case nir_intrinsic_bindless_image_atomic_or:
2926 case nir_intrinsic_image_deref_atomic_or:
2927 atomic_name = "or";
2928 atomic_subop = ac_atomic_or;
2929 break;
2930 case nir_intrinsic_bindless_image_atomic_xor:
2931 case nir_intrinsic_image_deref_atomic_xor:
2932 atomic_name = "xor";
2933 atomic_subop = ac_atomic_xor;
2934 break;
2935 case nir_intrinsic_bindless_image_atomic_exchange:
2936 case nir_intrinsic_image_deref_atomic_exchange:
2937 atomic_name = "swap";
2938 atomic_subop = ac_atomic_swap;
2939 break;
2940 case nir_intrinsic_bindless_image_atomic_comp_swap:
2941 case nir_intrinsic_image_deref_atomic_comp_swap:
2942 atomic_name = "cmpswap";
2943 atomic_subop = 0; /* not used */
2944 break;
2945 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2946 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2947 atomic_name = "inc";
2948 atomic_subop = ac_atomic_inc_wrap;
2949 /* ATOMIC_INC instruction does:
2950 * value = (value + 1) % (data + 1)
2951 * but we want:
2952 * value = (value + 1) % data
2953 * So replace 'data' by 'data - 1'.
2954 */
2955 ctx->ssa_defs[instr->src[3].ssa->index] =
2956 LLVMBuildSub(ctx->ac.builder,
2957 ctx->ssa_defs[instr->src[3].ssa->index],
2958 ctx->ac.i32_1, "");
2959 break;
2960 }
2961 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2962 case nir_intrinsic_image_deref_atomic_dec_wrap:
2963 atomic_name = "dec";
2964 atomic_subop = ac_atomic_dec_wrap;
2965 break;
2966 default:
2967 abort();
2968 }
2969
2970 if (cmpswap)
2971 params[param_count++] = get_src(ctx, instr->src[4]);
2972 params[param_count++] = get_src(ctx, instr->src[3]);
2973
2974 LLVMValueRef result;
2975 if (dim == GLSL_SAMPLER_DIM_BUF) {
2976 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
2977 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2978 ctx->ac.i32_0, ""); /* vindex */
2979 params[param_count++] = ctx->ac.i32_0; /* voffset */
2980 if (LLVM_VERSION_MAJOR >= 9) {
2981 /* XXX: The new raw/struct atomic intrinsics are buggy
2982 * with LLVM 8, see r358579.
2983 */
2984 params[param_count++] = ctx->ac.i32_0; /* soffset */
2985 params[param_count++] = ctx->ac.i32_0; /* slc */
2986
2987 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2988 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2989 } else {
2990 params[param_count++] = ctx->ac.i1false; /* slc */
2991
2992 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2993 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2994 }
2995
2996 assert(length < sizeof(intrinsic_name));
2997 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2998 params, param_count, 0);
2999 } else {
3000 struct ac_image_args args = {};
3001 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3002 args.atomic = atomic_subop;
3003 args.data[0] = params[0];
3004 if (cmpswap)
3005 args.data[1] = params[1];
3006 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3007 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3008 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3009
3010 result = ac_build_image_opcode(&ctx->ac, &args);
3011 }
3012
3013 result = exit_waterfall(ctx, &wctx, result);
3014 if (ctx->ac.postponed_kill)
3015 ac_build_endif(&ctx->ac, 7004);
3016 return result;
3017 }
3018
3019 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3020 nir_intrinsic_instr *instr)
3021 {
3022 struct waterfall_context wctx;
3023 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3024 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3025
3026 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3027
3028 return exit_waterfall(ctx, &wctx, ret);
3029 }
3030
3031 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3032 const nir_intrinsic_instr *instr,
3033 bool bindless)
3034 {
3035 LLVMValueRef res;
3036
3037 enum glsl_sampler_dim dim;
3038 bool is_array;
3039 if (bindless) {
3040 dim = nir_intrinsic_image_dim(instr);
3041 is_array = nir_intrinsic_image_array(instr);
3042 } else {
3043 const struct glsl_type *type = get_image_deref(instr)->type;
3044 dim = glsl_get_sampler_dim(type);
3045 is_array = glsl_sampler_type_is_array(type);
3046 }
3047
3048 struct waterfall_context wctx;
3049 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3050
3051 if (dim == GLSL_SAMPLER_DIM_BUF) {
3052 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3053 } else {
3054
3055 struct ac_image_args args = { 0 };
3056
3057 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3058 args.dmask = 0xf;
3059 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3060 args.opcode = ac_image_get_resinfo;
3061 args.lod = ctx->ac.i32_0;
3062 args.attributes = AC_FUNC_ATTR_READNONE;
3063
3064 res = ac_build_image_opcode(&ctx->ac, &args);
3065
3066 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3067
3068 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3069 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3070 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3071 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3072 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3073 }
3074
3075 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3076 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3077 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3078 ctx->ac.i32_1, "");
3079 }
3080 }
3081 return exit_waterfall(ctx, &wctx, res);
3082 }
3083
3084 static void emit_membar(struct ac_llvm_context *ac,
3085 const nir_intrinsic_instr *instr)
3086 {
3087 unsigned wait_flags = 0;
3088
3089 switch (instr->intrinsic) {
3090 case nir_intrinsic_memory_barrier:
3091 case nir_intrinsic_group_memory_barrier:
3092 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3093 break;
3094 case nir_intrinsic_memory_barrier_buffer:
3095 case nir_intrinsic_memory_barrier_image:
3096 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3097 break;
3098 case nir_intrinsic_memory_barrier_shared:
3099 wait_flags = AC_WAIT_LGKM;
3100 break;
3101 default:
3102 break;
3103 }
3104
3105 ac_build_waitcnt(ac, wait_flags);
3106 }
3107
3108 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3109 {
3110 /* GFX6 only (thanks to a hw bug workaround):
3111 * The real barrier instruction isn’t needed, because an entire patch
3112 * always fits into a single wave.
3113 */
3114 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3115 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3116 return;
3117 }
3118 ac_build_s_barrier(ac);
3119 }
3120
3121 static void emit_discard(struct ac_nir_context *ctx,
3122 const nir_intrinsic_instr *instr)
3123 {
3124 LLVMValueRef cond;
3125
3126 if (instr->intrinsic == nir_intrinsic_discard_if) {
3127 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3128 get_src(ctx, instr->src[0]),
3129 ctx->ac.i32_0, "");
3130 } else {
3131 assert(instr->intrinsic == nir_intrinsic_discard);
3132 cond = ctx->ac.i1false;
3133 }
3134
3135 ac_build_kill_if_false(&ctx->ac, cond);
3136 }
3137
3138 static void emit_demote(struct ac_nir_context *ctx,
3139 const nir_intrinsic_instr *instr)
3140 {
3141 LLVMValueRef cond;
3142
3143 if (instr->intrinsic == nir_intrinsic_demote_if) {
3144 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3145 get_src(ctx, instr->src[0]),
3146 ctx->ac.i32_0, "");
3147 } else {
3148 assert(instr->intrinsic == nir_intrinsic_demote);
3149 cond = ctx->ac.i1false;
3150 }
3151
3152 /* Kill immediately while maintaining WQM. */
3153 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3154
3155 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3156 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3157 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3158 return;
3159 }
3160
3161 static LLVMValueRef
3162 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3163 {
3164 LLVMValueRef result;
3165 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3166 result = LLVMBuildAnd(ctx->ac.builder,
3167 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3168 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3169
3170 if (ctx->ac.wave_size == 32)
3171 result = LLVMBuildLShr(ctx->ac.builder, result,
3172 LLVMConstInt(ctx->ac.i32, 1, false), "");
3173
3174 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3175 }
3176
3177 static LLVMValueRef
3178 visit_load_subgroup_id(struct ac_nir_context *ctx)
3179 {
3180 if (ctx->stage == MESA_SHADER_COMPUTE) {
3181 LLVMValueRef result;
3182 result = LLVMBuildAnd(ctx->ac.builder,
3183 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3184 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3185 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3186 } else {
3187 return LLVMConstInt(ctx->ac.i32, 0, false);
3188 }
3189 }
3190
3191 static LLVMValueRef
3192 visit_load_num_subgroups(struct ac_nir_context *ctx)
3193 {
3194 if (ctx->stage == MESA_SHADER_COMPUTE) {
3195 return LLVMBuildAnd(ctx->ac.builder,
3196 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3197 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3198 } else {
3199 return LLVMConstInt(ctx->ac.i32, 1, false);
3200 }
3201 }
3202
3203 static LLVMValueRef
3204 visit_first_invocation(struct ac_nir_context *ctx)
3205 {
3206 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3207 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3208
3209 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3210 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3211 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3212 ctx->ac.iN_wavemask, args, 2,
3213 AC_FUNC_ATTR_NOUNWIND |
3214 AC_FUNC_ATTR_READNONE);
3215
3216 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3217 }
3218
3219 static LLVMValueRef
3220 visit_load_shared(struct ac_nir_context *ctx,
3221 const nir_intrinsic_instr *instr)
3222 {
3223 LLVMValueRef values[4], derived_ptr, index, ret;
3224
3225 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3226 instr->dest.ssa.bit_size);
3227
3228 for (int chan = 0; chan < instr->num_components; chan++) {
3229 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3230 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3231 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3232 }
3233
3234 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3235 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3236 }
3237
3238 static void
3239 visit_store_shared(struct ac_nir_context *ctx,
3240 const nir_intrinsic_instr *instr)
3241 {
3242 LLVMValueRef derived_ptr, data,index;
3243 LLVMBuilderRef builder = ctx->ac.builder;
3244
3245 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3246 instr->src[0].ssa->bit_size);
3247 LLVMValueRef src = get_src(ctx, instr->src[0]);
3248
3249 int writemask = nir_intrinsic_write_mask(instr);
3250 for (int chan = 0; chan < 4; chan++) {
3251 if (!(writemask & (1 << chan))) {
3252 continue;
3253 }
3254 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3255 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3256 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3257 LLVMBuildStore(builder, data, derived_ptr);
3258 }
3259 }
3260
3261 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3262 const nir_intrinsic_instr *instr,
3263 LLVMValueRef ptr, int src_idx)
3264 {
3265 if (ctx->ac.postponed_kill) {
3266 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3267 ctx->ac.postponed_kill, "");
3268 ac_build_ifcc(&ctx->ac, cond, 7005);
3269 }
3270
3271 LLVMValueRef result;
3272 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3273
3274 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3275
3276 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3277 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3278 if (deref->mode == nir_var_mem_global) {
3279 /* use "singlethread" sync scope to implement relaxed ordering */
3280 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3281
3282 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3283 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3284 }
3285 }
3286
3287 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3288 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3289 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3290 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3291 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3292 } else {
3293 LLVMAtomicRMWBinOp op;
3294 switch (instr->intrinsic) {
3295 case nir_intrinsic_shared_atomic_add:
3296 case nir_intrinsic_deref_atomic_add:
3297 op = LLVMAtomicRMWBinOpAdd;
3298 break;
3299 case nir_intrinsic_shared_atomic_umin:
3300 case nir_intrinsic_deref_atomic_umin:
3301 op = LLVMAtomicRMWBinOpUMin;
3302 break;
3303 case nir_intrinsic_shared_atomic_umax:
3304 case nir_intrinsic_deref_atomic_umax:
3305 op = LLVMAtomicRMWBinOpUMax;
3306 break;
3307 case nir_intrinsic_shared_atomic_imin:
3308 case nir_intrinsic_deref_atomic_imin:
3309 op = LLVMAtomicRMWBinOpMin;
3310 break;
3311 case nir_intrinsic_shared_atomic_imax:
3312 case nir_intrinsic_deref_atomic_imax:
3313 op = LLVMAtomicRMWBinOpMax;
3314 break;
3315 case nir_intrinsic_shared_atomic_and:
3316 case nir_intrinsic_deref_atomic_and:
3317 op = LLVMAtomicRMWBinOpAnd;
3318 break;
3319 case nir_intrinsic_shared_atomic_or:
3320 case nir_intrinsic_deref_atomic_or:
3321 op = LLVMAtomicRMWBinOpOr;
3322 break;
3323 case nir_intrinsic_shared_atomic_xor:
3324 case nir_intrinsic_deref_atomic_xor:
3325 op = LLVMAtomicRMWBinOpXor;
3326 break;
3327 case nir_intrinsic_shared_atomic_exchange:
3328 case nir_intrinsic_deref_atomic_exchange:
3329 op = LLVMAtomicRMWBinOpXchg;
3330 break;
3331 default:
3332 return NULL;
3333 }
3334
3335 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3336 }
3337
3338 if (ctx->ac.postponed_kill)
3339 ac_build_endif(&ctx->ac, 7005);
3340 return result;
3341 }
3342
3343 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3344 {
3345 LLVMValueRef values[2];
3346 LLVMValueRef pos[2];
3347
3348 pos[0] = ac_to_float(&ctx->ac,
3349 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3350 pos[1] = ac_to_float(&ctx->ac,
3351 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3352
3353 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3354 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3355 return ac_build_gather_values(&ctx->ac, values, 2);
3356 }
3357
3358 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3359 enum glsl_interp_mode interp, unsigned location)
3360 {
3361 switch (interp) {
3362 case INTERP_MODE_FLAT:
3363 default:
3364 return NULL;
3365 case INTERP_MODE_SMOOTH:
3366 case INTERP_MODE_NONE:
3367 if (location == INTERP_CENTER)
3368 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3369 else if (location == INTERP_CENTROID)
3370 return ctx->abi->persp_centroid;
3371 else if (location == INTERP_SAMPLE)
3372 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3373 break;
3374 case INTERP_MODE_NOPERSPECTIVE:
3375 if (location == INTERP_CENTER)
3376 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3377 else if (location == INTERP_CENTROID)
3378 return ctx->abi->linear_centroid;
3379 else if (location == INTERP_SAMPLE)
3380 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3381 break;
3382 }
3383 return NULL;
3384 }
3385
3386 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3387 unsigned mode)
3388 {
3389 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3390 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3391 }
3392
3393 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3394 unsigned mode,
3395 LLVMValueRef offset)
3396 {
3397 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3398 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3399 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3400
3401 LLVMValueRef ij_out[2];
3402 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3403
3404 /*
3405 * take the I then J parameters, and the DDX/Y for it, and
3406 * calculate the IJ inputs for the interpolator.
3407 * temp1 = ddx * offset/sample.x + I;
3408 * interp_param.I = ddy * offset/sample.y + temp1;
3409 * temp1 = ddx * offset/sample.x + J;
3410 * interp_param.J = ddy * offset/sample.y + temp1;
3411 */
3412 for (unsigned i = 0; i < 2; i++) {
3413 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3414 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3415 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3416 ddxy_out, ix_ll, "");
3417 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3418 ddxy_out, iy_ll, "");
3419 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3420 interp_param, ix_ll, "");
3421 LLVMValueRef temp1, temp2;
3422
3423 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3424 ctx->ac.f32, "");
3425
3426 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3427 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3428
3429 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3430 temp2, ctx->ac.i32, "");
3431 }
3432 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3433 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3434 }
3435
3436 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3437 unsigned mode)
3438 {
3439 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3440 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3441 }
3442
3443 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3444 unsigned mode,
3445 LLVMValueRef sample_id)
3446 {
3447 if (ctx->abi->interp_at_sample_force_center)
3448 return barycentric_center(ctx, mode);
3449
3450 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3451
3452 /* fetch sample ID */
3453 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3454
3455 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3456 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3457 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3458 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3459 LLVMValueRef coords[] = { src_c0, src_c1 };
3460 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3461
3462 return barycentric_offset(ctx, mode, offset);
3463 }
3464
3465
3466 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3467 unsigned mode)
3468 {
3469 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3470 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3471 }
3472
3473 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3474 {
3475 return LLVMBuildBitCast(ctx->ac.builder,
3476 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3477 ctx->ac.v3i32, "");
3478 }
3479
3480 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3481 LLVMValueRef interp_param,
3482 unsigned index, unsigned comp_start,
3483 unsigned num_components,
3484 unsigned bitsize)
3485 {
3486 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3487
3488 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3489 interp_param, ctx->ac.v2f32, "");
3490 LLVMValueRef i = LLVMBuildExtractElement(
3491 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3492 LLVMValueRef j = LLVMBuildExtractElement(
3493 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3494
3495 LLVMValueRef values[4];
3496 assert(bitsize == 16 || bitsize == 32);
3497 for (unsigned comp = 0; comp < num_components; comp++) {
3498 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3499 if (bitsize == 16) {
3500 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3501 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3502 } else {
3503 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3504 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3505 }
3506 }
3507
3508 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3509 }
3510
3511 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3512 nir_intrinsic_instr *instr)
3513 {
3514 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3515
3516 /* We only lower inputs for fragment shaders ATM */
3517 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3518 assert(offset);
3519 assert(offset[0].i32 == 0);
3520
3521 unsigned component = nir_intrinsic_component(instr);
3522 unsigned index = nir_intrinsic_base(instr);
3523 unsigned vertex_id = 2; /* P0 */
3524
3525 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3526 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3527
3528 switch (src0[0].i32) {
3529 case 0:
3530 vertex_id = 2;
3531 break;
3532 case 1:
3533 vertex_id = 0;
3534 break;
3535 case 2:
3536 vertex_id = 1;
3537 break;
3538 default:
3539 unreachable("Invalid vertex index");
3540 }
3541 }
3542
3543 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3544 LLVMValueRef values[8];
3545
3546 /* Each component of a 64-bit value takes up two GL-level channels. */
3547 unsigned num_components = instr->dest.ssa.num_components;
3548 unsigned bit_size = instr->dest.ssa.bit_size;
3549 unsigned channels =
3550 bit_size == 64 ? num_components * 2 : num_components;
3551
3552 for (unsigned chan = 0; chan < channels; chan++) {
3553 if (component + chan > 4)
3554 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3555 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3556 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3557 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3558 llvm_chan,
3559 attr_number,
3560 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3561 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3562 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3563 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3564 }
3565
3566 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3567 if (bit_size == 64) {
3568 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3569 LLVMVectorType(ctx->ac.i64, num_components);
3570 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3571 }
3572 return result;
3573 }
3574
3575 static void visit_intrinsic(struct ac_nir_context *ctx,
3576 nir_intrinsic_instr *instr)
3577 {
3578 LLVMValueRef result = NULL;
3579
3580 switch (instr->intrinsic) {
3581 case nir_intrinsic_ballot:
3582 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3583 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3584 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3585 break;
3586 case nir_intrinsic_read_invocation:
3587 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3588 get_src(ctx, instr->src[1]));
3589 break;
3590 case nir_intrinsic_read_first_invocation:
3591 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3592 break;
3593 case nir_intrinsic_load_subgroup_invocation:
3594 result = ac_get_thread_id(&ctx->ac);
3595 break;
3596 case nir_intrinsic_load_work_group_id: {
3597 LLVMValueRef values[3];
3598
3599 for (int i = 0; i < 3; i++) {
3600 values[i] = ctx->args->workgroup_ids[i].used ?
3601 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3602 }
3603
3604 result = ac_build_gather_values(&ctx->ac, values, 3);
3605 break;
3606 }
3607 case nir_intrinsic_load_base_vertex:
3608 case nir_intrinsic_load_first_vertex:
3609 result = ctx->abi->load_base_vertex(ctx->abi);
3610 break;
3611 case nir_intrinsic_load_local_group_size:
3612 result = ctx->abi->load_local_group_size(ctx->abi);
3613 break;
3614 case nir_intrinsic_load_vertex_id:
3615 result = LLVMBuildAdd(ctx->ac.builder,
3616 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3617 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3618 break;
3619 case nir_intrinsic_load_vertex_id_zero_base: {
3620 result = ctx->abi->vertex_id;
3621 break;
3622 }
3623 case nir_intrinsic_load_local_invocation_id: {
3624 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3625 break;
3626 }
3627 case nir_intrinsic_load_base_instance:
3628 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3629 break;
3630 case nir_intrinsic_load_draw_id:
3631 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3632 break;
3633 case nir_intrinsic_load_view_index:
3634 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3635 break;
3636 case nir_intrinsic_load_invocation_id:
3637 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3638 result = ac_unpack_param(&ctx->ac,
3639 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3640 8, 5);
3641 } else {
3642 if (ctx->ac.chip_class >= GFX10) {
3643 result = LLVMBuildAnd(ctx->ac.builder,
3644 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3645 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3646 } else {
3647 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3648 }
3649 }
3650 break;
3651 case nir_intrinsic_load_primitive_id:
3652 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3653 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3654 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3655 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3656 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3657 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3658 } else
3659 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3660 break;
3661 case nir_intrinsic_load_sample_id:
3662 result = ac_unpack_param(&ctx->ac,
3663 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3664 8, 4);
3665 break;
3666 case nir_intrinsic_load_sample_pos:
3667 result = load_sample_pos(ctx);
3668 break;
3669 case nir_intrinsic_load_sample_mask_in:
3670 result = ctx->abi->load_sample_mask_in(ctx->abi);
3671 break;
3672 case nir_intrinsic_load_frag_coord: {
3673 LLVMValueRef values[4] = {
3674 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3675 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3676 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3677 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3678 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3679 };
3680 result = ac_to_integer(&ctx->ac,
3681 ac_build_gather_values(&ctx->ac, values, 4));
3682 break;
3683 }
3684 case nir_intrinsic_load_layer_id:
3685 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3686 break;
3687 case nir_intrinsic_load_front_face:
3688 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3689 break;
3690 case nir_intrinsic_load_helper_invocation:
3691 result = ac_build_load_helper_invocation(&ctx->ac);
3692 break;
3693 case nir_intrinsic_is_helper_invocation:
3694 result = ac_build_is_helper_invocation(&ctx->ac);
3695 break;
3696 case nir_intrinsic_load_color0:
3697 result = ctx->abi->color0;
3698 break;
3699 case nir_intrinsic_load_color1:
3700 result = ctx->abi->color1;
3701 break;
3702 case nir_intrinsic_load_user_data_amd:
3703 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3704 result = ctx->abi->user_data;
3705 break;
3706 case nir_intrinsic_load_instance_id:
3707 result = ctx->abi->instance_id;
3708 break;
3709 case nir_intrinsic_load_num_work_groups:
3710 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3711 break;
3712 case nir_intrinsic_load_local_invocation_index:
3713 result = visit_load_local_invocation_index(ctx);
3714 break;
3715 case nir_intrinsic_load_subgroup_id:
3716 result = visit_load_subgroup_id(ctx);
3717 break;
3718 case nir_intrinsic_load_num_subgroups:
3719 result = visit_load_num_subgroups(ctx);
3720 break;
3721 case nir_intrinsic_first_invocation:
3722 result = visit_first_invocation(ctx);
3723 break;
3724 case nir_intrinsic_load_push_constant:
3725 result = visit_load_push_constant(ctx, instr);
3726 break;
3727 case nir_intrinsic_vulkan_resource_index: {
3728 LLVMValueRef index = get_src(ctx, instr->src[0]);
3729 unsigned desc_set = nir_intrinsic_desc_set(instr);
3730 unsigned binding = nir_intrinsic_binding(instr);
3731
3732 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3733 binding);
3734 break;
3735 }
3736 case nir_intrinsic_vulkan_resource_reindex:
3737 result = visit_vulkan_resource_reindex(ctx, instr);
3738 break;
3739 case nir_intrinsic_store_ssbo:
3740 visit_store_ssbo(ctx, instr);
3741 break;
3742 case nir_intrinsic_load_ssbo:
3743 result = visit_load_buffer(ctx, instr);
3744 break;
3745 case nir_intrinsic_ssbo_atomic_add:
3746 case nir_intrinsic_ssbo_atomic_imin:
3747 case nir_intrinsic_ssbo_atomic_umin:
3748 case nir_intrinsic_ssbo_atomic_imax:
3749 case nir_intrinsic_ssbo_atomic_umax:
3750 case nir_intrinsic_ssbo_atomic_and:
3751 case nir_intrinsic_ssbo_atomic_or:
3752 case nir_intrinsic_ssbo_atomic_xor:
3753 case nir_intrinsic_ssbo_atomic_exchange:
3754 case nir_intrinsic_ssbo_atomic_comp_swap:
3755 result = visit_atomic_ssbo(ctx, instr);
3756 break;
3757 case nir_intrinsic_load_ubo:
3758 result = visit_load_ubo_buffer(ctx, instr);
3759 break;
3760 case nir_intrinsic_get_buffer_size:
3761 result = visit_get_buffer_size(ctx, instr);
3762 break;
3763 case nir_intrinsic_load_deref:
3764 result = visit_load_var(ctx, instr);
3765 break;
3766 case nir_intrinsic_store_deref:
3767 visit_store_var(ctx, instr);
3768 break;
3769 case nir_intrinsic_load_shared:
3770 result = visit_load_shared(ctx, instr);
3771 break;
3772 case nir_intrinsic_store_shared:
3773 visit_store_shared(ctx, instr);
3774 break;
3775 case nir_intrinsic_bindless_image_samples:
3776 case nir_intrinsic_image_deref_samples:
3777 result = visit_image_samples(ctx, instr);
3778 break;
3779 case nir_intrinsic_bindless_image_load:
3780 result = visit_image_load(ctx, instr, true);
3781 break;
3782 case nir_intrinsic_image_deref_load:
3783 result = visit_image_load(ctx, instr, false);
3784 break;
3785 case nir_intrinsic_bindless_image_store:
3786 visit_image_store(ctx, instr, true);
3787 break;
3788 case nir_intrinsic_image_deref_store:
3789 visit_image_store(ctx, instr, false);
3790 break;
3791 case nir_intrinsic_bindless_image_atomic_add:
3792 case nir_intrinsic_bindless_image_atomic_imin:
3793 case nir_intrinsic_bindless_image_atomic_umin:
3794 case nir_intrinsic_bindless_image_atomic_imax:
3795 case nir_intrinsic_bindless_image_atomic_umax:
3796 case nir_intrinsic_bindless_image_atomic_and:
3797 case nir_intrinsic_bindless_image_atomic_or:
3798 case nir_intrinsic_bindless_image_atomic_xor:
3799 case nir_intrinsic_bindless_image_atomic_exchange:
3800 case nir_intrinsic_bindless_image_atomic_comp_swap:
3801 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3802 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3803 result = visit_image_atomic(ctx, instr, true);
3804 break;
3805 case nir_intrinsic_image_deref_atomic_add:
3806 case nir_intrinsic_image_deref_atomic_imin:
3807 case nir_intrinsic_image_deref_atomic_umin:
3808 case nir_intrinsic_image_deref_atomic_imax:
3809 case nir_intrinsic_image_deref_atomic_umax:
3810 case nir_intrinsic_image_deref_atomic_and:
3811 case nir_intrinsic_image_deref_atomic_or:
3812 case nir_intrinsic_image_deref_atomic_xor:
3813 case nir_intrinsic_image_deref_atomic_exchange:
3814 case nir_intrinsic_image_deref_atomic_comp_swap:
3815 case nir_intrinsic_image_deref_atomic_inc_wrap:
3816 case nir_intrinsic_image_deref_atomic_dec_wrap:
3817 result = visit_image_atomic(ctx, instr, false);
3818 break;
3819 case nir_intrinsic_bindless_image_size:
3820 result = visit_image_size(ctx, instr, true);
3821 break;
3822 case nir_intrinsic_image_deref_size:
3823 result = visit_image_size(ctx, instr, false);
3824 break;
3825 case nir_intrinsic_shader_clock:
3826 result = ac_build_shader_clock(&ctx->ac);
3827 break;
3828 case nir_intrinsic_discard:
3829 case nir_intrinsic_discard_if:
3830 emit_discard(ctx, instr);
3831 break;
3832 case nir_intrinsic_demote:
3833 case nir_intrinsic_demote_if:
3834 emit_demote(ctx, instr);
3835 break;
3836 case nir_intrinsic_memory_barrier:
3837 case nir_intrinsic_group_memory_barrier:
3838 case nir_intrinsic_memory_barrier_buffer:
3839 case nir_intrinsic_memory_barrier_image:
3840 case nir_intrinsic_memory_barrier_shared:
3841 emit_membar(&ctx->ac, instr);
3842 break;
3843 case nir_intrinsic_memory_barrier_tcs_patch:
3844 break;
3845 case nir_intrinsic_control_barrier:
3846 ac_emit_barrier(&ctx->ac, ctx->stage);
3847 break;
3848 case nir_intrinsic_shared_atomic_add:
3849 case nir_intrinsic_shared_atomic_imin:
3850 case nir_intrinsic_shared_atomic_umin:
3851 case nir_intrinsic_shared_atomic_imax:
3852 case nir_intrinsic_shared_atomic_umax:
3853 case nir_intrinsic_shared_atomic_and:
3854 case nir_intrinsic_shared_atomic_or:
3855 case nir_intrinsic_shared_atomic_xor:
3856 case nir_intrinsic_shared_atomic_exchange:
3857 case nir_intrinsic_shared_atomic_comp_swap: {
3858 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3859 instr->src[1].ssa->bit_size);
3860 result = visit_var_atomic(ctx, instr, ptr, 1);
3861 break;
3862 }
3863 case nir_intrinsic_deref_atomic_add:
3864 case nir_intrinsic_deref_atomic_imin:
3865 case nir_intrinsic_deref_atomic_umin:
3866 case nir_intrinsic_deref_atomic_imax:
3867 case nir_intrinsic_deref_atomic_umax:
3868 case nir_intrinsic_deref_atomic_and:
3869 case nir_intrinsic_deref_atomic_or:
3870 case nir_intrinsic_deref_atomic_xor:
3871 case nir_intrinsic_deref_atomic_exchange:
3872 case nir_intrinsic_deref_atomic_comp_swap: {
3873 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3874 result = visit_var_atomic(ctx, instr, ptr, 1);
3875 break;
3876 }
3877 case nir_intrinsic_load_barycentric_pixel:
3878 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3879 break;
3880 case nir_intrinsic_load_barycentric_centroid:
3881 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3882 break;
3883 case nir_intrinsic_load_barycentric_sample:
3884 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3885 break;
3886 case nir_intrinsic_load_barycentric_model:
3887 result = barycentric_model(ctx);
3888 break;
3889 case nir_intrinsic_load_barycentric_at_offset: {
3890 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3891 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3892 break;
3893 }
3894 case nir_intrinsic_load_barycentric_at_sample: {
3895 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3896 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3897 break;
3898 }
3899 case nir_intrinsic_load_interpolated_input: {
3900 /* We assume any indirect loads have been lowered away */
3901 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3902 assert(offset);
3903 assert(offset[0].i32 == 0);
3904
3905 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3906 unsigned index = nir_intrinsic_base(instr);
3907 unsigned component = nir_intrinsic_component(instr);
3908 result = load_interpolated_input(ctx, interp_param, index,
3909 component,
3910 instr->dest.ssa.num_components,
3911 instr->dest.ssa.bit_size);
3912 break;
3913 }
3914 case nir_intrinsic_load_input:
3915 case nir_intrinsic_load_input_vertex:
3916 result = load_input(ctx, instr);
3917 break;
3918 case nir_intrinsic_emit_vertex:
3919 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3920 break;
3921 case nir_intrinsic_end_primitive:
3922 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3923 break;
3924 case nir_intrinsic_load_tess_coord:
3925 result = ctx->abi->load_tess_coord(ctx->abi);
3926 break;
3927 case nir_intrinsic_load_tess_level_outer:
3928 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3929 break;
3930 case nir_intrinsic_load_tess_level_inner:
3931 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3932 break;
3933 case nir_intrinsic_load_tess_level_outer_default:
3934 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3935 break;
3936 case nir_intrinsic_load_tess_level_inner_default:
3937 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3938 break;
3939 case nir_intrinsic_load_patch_vertices_in:
3940 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3941 break;
3942 case nir_intrinsic_vote_all: {
3943 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3944 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3945 break;
3946 }
3947 case nir_intrinsic_vote_any: {
3948 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3949 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3950 break;
3951 }
3952 case nir_intrinsic_shuffle:
3953 if (ctx->ac.chip_class == GFX8 ||
3954 ctx->ac.chip_class == GFX9 ||
3955 (ctx->ac.chip_class == GFX10 && ctx->ac.wave_size == 32)) {
3956 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3957 get_src(ctx, instr->src[1]));
3958 } else {
3959 LLVMValueRef src = get_src(ctx, instr->src[0]);
3960 LLVMValueRef index = get_src(ctx, instr->src[1]);
3961 LLVMTypeRef type = LLVMTypeOf(src);
3962 struct waterfall_context wctx;
3963 LLVMValueRef index_val;
3964
3965 index_val = enter_waterfall(ctx, &wctx, index, true);
3966
3967 src = LLVMBuildZExt(ctx->ac.builder, src,
3968 ctx->ac.i32, "");
3969
3970 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
3971 ctx->ac.i32,
3972 (LLVMValueRef []) { src, index_val }, 2,
3973 AC_FUNC_ATTR_READNONE |
3974 AC_FUNC_ATTR_CONVERGENT);
3975
3976 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
3977
3978 result = exit_waterfall(ctx, &wctx, result);
3979 }
3980 break;
3981 case nir_intrinsic_reduce:
3982 result = ac_build_reduce(&ctx->ac,
3983 get_src(ctx, instr->src[0]),
3984 instr->const_index[0],
3985 instr->const_index[1]);
3986 break;
3987 case nir_intrinsic_inclusive_scan:
3988 result = ac_build_inclusive_scan(&ctx->ac,
3989 get_src(ctx, instr->src[0]),
3990 instr->const_index[0]);
3991 break;
3992 case nir_intrinsic_exclusive_scan:
3993 result = ac_build_exclusive_scan(&ctx->ac,
3994 get_src(ctx, instr->src[0]),
3995 instr->const_index[0]);
3996 break;
3997 case nir_intrinsic_quad_broadcast: {
3998 unsigned lane = nir_src_as_uint(instr->src[1]);
3999 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4000 lane, lane, lane, lane);
4001 break;
4002 }
4003 case nir_intrinsic_quad_swap_horizontal:
4004 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4005 break;
4006 case nir_intrinsic_quad_swap_vertical:
4007 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4008 break;
4009 case nir_intrinsic_quad_swap_diagonal:
4010 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4011 break;
4012 case nir_intrinsic_quad_swizzle_amd: {
4013 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4014 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4015 mask & 0x3, (mask >> 2) & 0x3,
4016 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4017 break;
4018 }
4019 case nir_intrinsic_masked_swizzle_amd: {
4020 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4021 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4022 break;
4023 }
4024 case nir_intrinsic_write_invocation_amd:
4025 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4026 get_src(ctx, instr->src[1]),
4027 get_src(ctx, instr->src[2]));
4028 break;
4029 case nir_intrinsic_mbcnt_amd:
4030 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4031 break;
4032 case nir_intrinsic_load_scratch: {
4033 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4034 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4035 offset);
4036 LLVMTypeRef comp_type =
4037 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4038 LLVMTypeRef vec_type =
4039 instr->dest.ssa.num_components == 1 ? comp_type :
4040 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4041 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4042 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4043 LLVMPointerType(vec_type, addr_space), "");
4044 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4045 break;
4046 }
4047 case nir_intrinsic_store_scratch: {
4048 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4049 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4050 offset);
4051 LLVMTypeRef comp_type =
4052 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4053 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4054 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4055 LLVMPointerType(comp_type, addr_space), "");
4056 LLVMValueRef src = get_src(ctx, instr->src[0]);
4057 unsigned wrmask = nir_intrinsic_write_mask(instr);
4058 while (wrmask) {
4059 int start, count;
4060 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4061
4062 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4063 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4064 LLVMTypeRef vec_type =
4065 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4066 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4067 offset_ptr,
4068 LLVMPointerType(vec_type, addr_space),
4069 "");
4070 LLVMValueRef offset_src =
4071 ac_extract_components(&ctx->ac, src, start, count);
4072 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4073 }
4074 break;
4075 }
4076 case nir_intrinsic_load_constant: {
4077 unsigned base = nir_intrinsic_base(instr);
4078 unsigned range = nir_intrinsic_range(instr);
4079
4080 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4081 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4082 LLVMConstInt(ctx->ac.i32, base, false), "");
4083
4084 /* Clamp the offset to avoid out-of-bound access because global
4085 * instructions can't handle them.
4086 */
4087 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4088 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4089 offset, size, "");
4090 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4091
4092 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4093 offset);
4094 LLVMTypeRef comp_type =
4095 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4096 LLVMTypeRef vec_type =
4097 instr->dest.ssa.num_components == 1 ? comp_type :
4098 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4099 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4100 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4101 LLVMPointerType(vec_type, addr_space), "");
4102 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4103 break;
4104 }
4105 default:
4106 fprintf(stderr, "Unknown intrinsic: ");
4107 nir_print_instr(&instr->instr, stderr);
4108 fprintf(stderr, "\n");
4109 break;
4110 }
4111 if (result) {
4112 ctx->ssa_defs[instr->dest.ssa.index] = result;
4113 }
4114 }
4115
4116 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4117 unsigned base_index,
4118 unsigned constant_index,
4119 LLVMValueRef dynamic_index)
4120 {
4121 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4122 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4123 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4124
4125 /* Bindless uniforms are 64bit so multiple index by 8 */
4126 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4127 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4128
4129 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4130
4131 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4132 NULL, 0, 0, true, true);
4133
4134 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4135 }
4136
4137 struct sampler_desc_address {
4138 unsigned descriptor_set;
4139 unsigned base_index; /* binding in vulkan */
4140 unsigned constant_index;
4141 LLVMValueRef dynamic_index;
4142 bool image;
4143 bool bindless;
4144 };
4145
4146 static struct sampler_desc_address
4147 get_sampler_desc_internal(struct ac_nir_context *ctx,
4148 nir_deref_instr *deref_instr,
4149 const nir_instr *instr,
4150 bool image)
4151 {
4152 LLVMValueRef index = NULL;
4153 unsigned constant_index = 0;
4154 unsigned descriptor_set;
4155 unsigned base_index;
4156 bool bindless = false;
4157
4158 if (!deref_instr) {
4159 descriptor_set = 0;
4160 if (image) {
4161 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4162 base_index = 0;
4163 bindless = true;
4164 index = get_src(ctx, img_instr->src[0]);
4165 } else {
4166 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4167 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4168 nir_tex_src_sampler_handle);
4169 if (sampSrcIdx != -1) {
4170 base_index = 0;
4171 bindless = true;
4172 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4173 } else {
4174 assert(tex_instr && !image);
4175 base_index = tex_instr->sampler_index;
4176 }
4177 }
4178 } else {
4179 while(deref_instr->deref_type != nir_deref_type_var) {
4180 if (deref_instr->deref_type == nir_deref_type_array) {
4181 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4182 if (!array_size)
4183 array_size = 1;
4184
4185 if (nir_src_is_const(deref_instr->arr.index)) {
4186 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4187 } else {
4188 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4189
4190 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4191 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4192
4193 if (!index)
4194 index = indirect;
4195 else
4196 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4197 }
4198
4199 deref_instr = nir_src_as_deref(deref_instr->parent);
4200 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4201 unsigned sidx = deref_instr->strct.index;
4202 deref_instr = nir_src_as_deref(deref_instr->parent);
4203 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4204 } else {
4205 unreachable("Unsupported deref type");
4206 }
4207 }
4208 descriptor_set = deref_instr->var->data.descriptor_set;
4209
4210 if (deref_instr->var->data.bindless) {
4211 /* For now just assert on unhandled variable types */
4212 assert(deref_instr->var->data.mode == nir_var_uniform);
4213
4214 base_index = deref_instr->var->data.driver_location;
4215 bindless = true;
4216
4217 index = index ? index : ctx->ac.i32_0;
4218 index = get_bindless_index_from_uniform(ctx, base_index,
4219 constant_index, index);
4220 } else
4221 base_index = deref_instr->var->data.binding;
4222 }
4223 return (struct sampler_desc_address) {
4224 .descriptor_set = descriptor_set,
4225 .base_index = base_index,
4226 .constant_index = constant_index,
4227 .dynamic_index = index,
4228 .image = image,
4229 .bindless = bindless,
4230 };
4231 }
4232
4233 /* Extract any possibly divergent index into a separate value that can be fed
4234 * into get_sampler_desc with the same arguments. */
4235 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4236 nir_deref_instr *deref_instr,
4237 const nir_instr *instr,
4238 bool image)
4239 {
4240 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4241 return addr.dynamic_index;
4242 }
4243
4244 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4245 nir_deref_instr *deref_instr,
4246 enum ac_descriptor_type desc_type,
4247 const nir_instr *instr,
4248 LLVMValueRef index,
4249 bool image, bool write)
4250 {
4251 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4252 return ctx->abi->load_sampler_desc(ctx->abi,
4253 addr.descriptor_set,
4254 addr.base_index,
4255 addr.constant_index, index,
4256 desc_type, addr.image, write, addr.bindless);
4257 }
4258
4259 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4260 *
4261 * GFX6-GFX7:
4262 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4263 * filtering manually. The driver sets img7 to a mask clearing
4264 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4265 * s_and_b32 samp0, samp0, img7
4266 *
4267 * GFX8:
4268 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4269 */
4270 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4271 LLVMValueRef res, LLVMValueRef samp)
4272 {
4273 LLVMBuilderRef builder = ctx->ac.builder;
4274 LLVMValueRef img7, samp0;
4275
4276 if (ctx->ac.chip_class >= GFX8)
4277 return samp;
4278
4279 img7 = LLVMBuildExtractElement(builder, res,
4280 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4281 samp0 = LLVMBuildExtractElement(builder, samp,
4282 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4283 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4284 return LLVMBuildInsertElement(builder, samp, samp0,
4285 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4286 }
4287
4288 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4289 nir_tex_instr *instr,
4290 struct waterfall_context *wctx,
4291 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4292 LLVMValueRef *fmask_ptr)
4293 {
4294 nir_deref_instr *texture_deref_instr = NULL;
4295 nir_deref_instr *sampler_deref_instr = NULL;
4296 int plane = -1;
4297
4298 for (unsigned i = 0; i < instr->num_srcs; i++) {
4299 switch (instr->src[i].src_type) {
4300 case nir_tex_src_texture_deref:
4301 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4302 break;
4303 case nir_tex_src_sampler_deref:
4304 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4305 break;
4306 case nir_tex_src_plane:
4307 plane = nir_src_as_int(instr->src[i].src);
4308 break;
4309 default:
4310 break;
4311 }
4312 }
4313
4314 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4315 &instr->instr, false);
4316 if (!sampler_deref_instr)
4317 sampler_deref_instr = texture_deref_instr;
4318
4319 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4320 &instr->instr, false);
4321 if (instr->texture_non_uniform)
4322 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4323
4324 if (instr->sampler_non_uniform)
4325 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4326
4327 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4328
4329 if (plane >= 0) {
4330 assert(instr->op != nir_texop_txf_ms &&
4331 instr->op != nir_texop_samples_identical);
4332 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4333
4334 main_descriptor = AC_DESC_PLANE_0 + plane;
4335 }
4336
4337 if (instr->op == nir_texop_fragment_mask_fetch) {
4338 /* The fragment mask is fetched from the compressed
4339 * multisampled surface.
4340 */
4341 main_descriptor = AC_DESC_FMASK;
4342 }
4343
4344 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4345 texture_dynamic_index, false, false);
4346
4347 if (samp_ptr) {
4348 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4349 sampler_dynamic_index, false, false);
4350 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4351 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4352 }
4353 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4354 instr->op == nir_texop_samples_identical))
4355 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4356 &instr->instr, texture_dynamic_index, false, false);
4357 }
4358
4359 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4360 LLVMValueRef coord)
4361 {
4362 coord = ac_to_float(ctx, coord);
4363 coord = ac_build_round(ctx, coord);
4364 coord = ac_to_integer(ctx, coord);
4365 return coord;
4366 }
4367
4368 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4369 {
4370 LLVMValueRef result = NULL;
4371 struct ac_image_args args = { 0 };
4372 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4373 LLVMValueRef ddx = NULL, ddy = NULL;
4374 unsigned offset_src = 0;
4375 struct waterfall_context wctx[2] = {{{0}}};
4376
4377 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4378
4379 for (unsigned i = 0; i < instr->num_srcs; i++) {
4380 switch (instr->src[i].src_type) {
4381 case nir_tex_src_coord: {
4382 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4383 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4384 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4385 break;
4386 }
4387 case nir_tex_src_projector:
4388 break;
4389 case nir_tex_src_comparator:
4390 if (instr->is_shadow) {
4391 args.compare = get_src(ctx, instr->src[i].src);
4392 args.compare = ac_to_float(&ctx->ac, args.compare);
4393 }
4394 break;
4395 case nir_tex_src_offset:
4396 args.offset = get_src(ctx, instr->src[i].src);
4397 offset_src = i;
4398 break;
4399 case nir_tex_src_bias:
4400 if (instr->op == nir_texop_txb)
4401 args.bias = get_src(ctx, instr->src[i].src);
4402 break;
4403 case nir_tex_src_lod: {
4404 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4405 args.level_zero = true;
4406 else
4407 args.lod = get_src(ctx, instr->src[i].src);
4408 break;
4409 }
4410 case nir_tex_src_ms_index:
4411 sample_index = get_src(ctx, instr->src[i].src);
4412 break;
4413 case nir_tex_src_ms_mcs:
4414 break;
4415 case nir_tex_src_ddx:
4416 ddx = get_src(ctx, instr->src[i].src);
4417 break;
4418 case nir_tex_src_ddy:
4419 ddy = get_src(ctx, instr->src[i].src);
4420 break;
4421 case nir_tex_src_texture_offset:
4422 case nir_tex_src_sampler_offset:
4423 case nir_tex_src_plane:
4424 default:
4425 break;
4426 }
4427 }
4428
4429 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4430 result = get_buffer_size(ctx, args.resource, true);
4431 goto write_result;
4432 }
4433
4434 if (instr->op == nir_texop_texture_samples) {
4435 LLVMValueRef res, samples, is_msaa;
4436 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4437 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4438 LLVMConstInt(ctx->ac.i32, 3, false), "");
4439 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4440 LLVMConstInt(ctx->ac.i32, 28, false), "");
4441 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4442 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4443 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4444 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4445
4446 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4447 LLVMConstInt(ctx->ac.i32, 16, false), "");
4448 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4449 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4450 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4451 samples, "");
4452 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4453 ctx->ac.i32_1, "");
4454 result = samples;
4455 goto write_result;
4456 }
4457
4458 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4459 LLVMValueRef offset[3], pack;
4460 for (unsigned chan = 0; chan < 3; ++chan)
4461 offset[chan] = ctx->ac.i32_0;
4462
4463 unsigned num_components = ac_get_llvm_num_components(args.offset);
4464 for (unsigned chan = 0; chan < num_components; chan++) {
4465 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4466 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4467 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4468 if (chan)
4469 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4470 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4471 }
4472 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4473 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4474 args.offset = pack;
4475 }
4476
4477 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4478 * OpenGL 4.5 spec says:
4479 *
4480 * "If the texture’s internal format indicates a fixed-point
4481 * depth texture, then D_t and D_ref are clamped to the
4482 * range [0, 1]; otherwise no clamping is performed."
4483 *
4484 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4485 * so the depth comparison value isn't clamped for Z16 and
4486 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4487 * an explicitly clamped 32-bit float format.
4488 */
4489 if (args.compare &&
4490 ctx->ac.chip_class >= GFX8 &&
4491 ctx->ac.chip_class <= GFX9 &&
4492 ctx->abi->clamp_shadow_reference) {
4493 LLVMValueRef upgraded, clamped;
4494
4495 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4496 LLVMConstInt(ctx->ac.i32, 3, false), "");
4497 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4498 LLVMConstInt(ctx->ac.i32, 29, false), "");
4499 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4500 clamped = ac_build_clamp(&ctx->ac, args.compare);
4501 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4502 args.compare, "");
4503 }
4504
4505 /* pack derivatives */
4506 if (ddx || ddy) {
4507 int num_src_deriv_channels, num_dest_deriv_channels;
4508 switch (instr->sampler_dim) {
4509 case GLSL_SAMPLER_DIM_3D:
4510 case GLSL_SAMPLER_DIM_CUBE:
4511 num_src_deriv_channels = 3;
4512 num_dest_deriv_channels = 3;
4513 break;
4514 case GLSL_SAMPLER_DIM_2D:
4515 default:
4516 num_src_deriv_channels = 2;
4517 num_dest_deriv_channels = 2;
4518 break;
4519 case GLSL_SAMPLER_DIM_1D:
4520 num_src_deriv_channels = 1;
4521 if (ctx->ac.chip_class == GFX9) {
4522 num_dest_deriv_channels = 2;
4523 } else {
4524 num_dest_deriv_channels = 1;
4525 }
4526 break;
4527 }
4528
4529 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4530 args.derivs[i] = ac_to_float(&ctx->ac,
4531 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4532 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4533 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4534 }
4535 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4536 args.derivs[i] = ctx->ac.f32_0;
4537 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4538 }
4539 }
4540
4541 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4542 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4543 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4544 if (instr->coord_components == 3)
4545 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4546 ac_prepare_cube_coords(&ctx->ac,
4547 instr->op == nir_texop_txd, instr->is_array,
4548 instr->op == nir_texop_lod, args.coords, args.derivs);
4549 }
4550
4551 /* Texture coordinates fixups */
4552 if (instr->coord_components > 1 &&
4553 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4554 instr->is_array &&
4555 instr->op != nir_texop_txf) {
4556 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4557 }
4558
4559 if (instr->coord_components > 2 &&
4560 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4561 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4562 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4563 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4564 instr->is_array &&
4565 instr->op != nir_texop_txf &&
4566 instr->op != nir_texop_txf_ms &&
4567 instr->op != nir_texop_fragment_fetch &&
4568 instr->op != nir_texop_fragment_mask_fetch) {
4569 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4570 }
4571
4572 if (ctx->ac.chip_class == GFX9 &&
4573 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4574 instr->op != nir_texop_lod) {
4575 LLVMValueRef filler;
4576 if (instr->op == nir_texop_txf)
4577 filler = ctx->ac.i32_0;
4578 else
4579 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4580
4581 if (instr->is_array)
4582 args.coords[2] = args.coords[1];
4583 args.coords[1] = filler;
4584 }
4585
4586 /* Pack sample index */
4587 if (sample_index && (instr->op == nir_texop_txf_ms ||
4588 instr->op == nir_texop_fragment_fetch))
4589 args.coords[instr->coord_components] = sample_index;
4590
4591 if (instr->op == nir_texop_samples_identical) {
4592 struct ac_image_args txf_args = { 0 };
4593 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4594
4595 txf_args.dmask = 0xf;
4596 txf_args.resource = fmask_ptr;
4597 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4598 result = build_tex_intrinsic(ctx, instr, &txf_args);
4599
4600 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4601 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4602 goto write_result;
4603 }
4604
4605 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4606 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4607 instr->op != nir_texop_txs &&
4608 instr->op != nir_texop_fragment_fetch &&
4609 instr->op != nir_texop_fragment_mask_fetch) {
4610 unsigned sample_chan = instr->is_array ? 3 : 2;
4611 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4612 &ctx->ac, args.coords[0], args.coords[1],
4613 instr->is_array ? args.coords[2] : NULL,
4614 args.coords[sample_chan], fmask_ptr);
4615 }
4616
4617 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4618 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4619 num_offsets = MIN2(num_offsets, instr->coord_components);
4620 for (unsigned i = 0; i < num_offsets; ++i) {
4621 args.coords[i] = LLVMBuildAdd(
4622 ctx->ac.builder, args.coords[i],
4623 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4624 }
4625 args.offset = NULL;
4626 }
4627
4628 /* DMASK was repurposed for GATHER4. 4 components are always
4629 * returned and DMASK works like a swizzle - it selects
4630 * the component to fetch. The only valid DMASK values are
4631 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4632 * (red,red,red,red) etc.) The ISA document doesn't mention
4633 * this.
4634 */
4635 args.dmask = 0xf;
4636 if (instr->op == nir_texop_tg4) {
4637 if (instr->is_shadow)
4638 args.dmask = 1;
4639 else
4640 args.dmask = 1 << instr->component;
4641 }
4642
4643 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4644 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4645 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4646 }
4647
4648 /* Adjust the number of coordinates because we only need (x,y) for 2D
4649 * multisampled images and (x,y,layer) for 2D multisampled layered
4650 * images or for multisampled input attachments.
4651 */
4652 if (instr->op == nir_texop_fragment_mask_fetch) {
4653 if (args.dim == ac_image_2dmsaa) {
4654 args.dim = ac_image_2d;
4655 } else {
4656 assert(args.dim == ac_image_2darraymsaa);
4657 args.dim = ac_image_2darray;
4658 }
4659 }
4660
4661 result = build_tex_intrinsic(ctx, instr, &args);
4662
4663 if (instr->op == nir_texop_query_levels)
4664 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4665 else if (instr->is_shadow && instr->is_new_style_shadow &&
4666 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4667 instr->op != nir_texop_tg4)
4668 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4669 else if (instr->op == nir_texop_txs &&
4670 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4671 instr->is_array) {
4672 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4673 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4674 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4675 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4676 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4677 } else if (ctx->ac.chip_class == GFX9 &&
4678 instr->op == nir_texop_txs &&
4679 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4680 instr->is_array) {
4681 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4682 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4683 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4684 ctx->ac.i32_1, "");
4685 } else if (instr->dest.ssa.num_components != 4)
4686 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4687
4688 write_result:
4689 if (result) {
4690 assert(instr->dest.is_ssa);
4691 result = ac_to_integer(&ctx->ac, result);
4692
4693 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4694 result = exit_waterfall(ctx, wctx + i, result);
4695 }
4696
4697 ctx->ssa_defs[instr->dest.ssa.index] = result;
4698 }
4699 }
4700
4701 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4702 {
4703 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4704 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4705
4706 ctx->ssa_defs[instr->dest.ssa.index] = result;
4707 _mesa_hash_table_insert(ctx->phis, instr, result);
4708 }
4709
4710 static void visit_post_phi(struct ac_nir_context *ctx,
4711 nir_phi_instr *instr,
4712 LLVMValueRef llvm_phi)
4713 {
4714 nir_foreach_phi_src(src, instr) {
4715 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4716 LLVMValueRef llvm_src = get_src(ctx, src->src);
4717
4718 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4719 }
4720 }
4721
4722 static void phi_post_pass(struct ac_nir_context *ctx)
4723 {
4724 hash_table_foreach(ctx->phis, entry) {
4725 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4726 (LLVMValueRef)entry->data);
4727 }
4728 }
4729
4730
4731 static void visit_ssa_undef(struct ac_nir_context *ctx,
4732 const nir_ssa_undef_instr *instr)
4733 {
4734 unsigned num_components = instr->def.num_components;
4735 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4736 LLVMValueRef undef;
4737
4738 if (num_components == 1)
4739 undef = LLVMGetUndef(type);
4740 else {
4741 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4742 }
4743 ctx->ssa_defs[instr->def.index] = undef;
4744 }
4745
4746 static void visit_jump(struct ac_llvm_context *ctx,
4747 const nir_jump_instr *instr)
4748 {
4749 switch (instr->type) {
4750 case nir_jump_break:
4751 ac_build_break(ctx);
4752 break;
4753 case nir_jump_continue:
4754 ac_build_continue(ctx);
4755 break;
4756 default:
4757 fprintf(stderr, "Unknown NIR jump instr: ");
4758 nir_print_instr(&instr->instr, stderr);
4759 fprintf(stderr, "\n");
4760 abort();
4761 }
4762 }
4763
4764 static LLVMTypeRef
4765 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4766 enum glsl_base_type type)
4767 {
4768 switch (type) {
4769 case GLSL_TYPE_INT:
4770 case GLSL_TYPE_UINT:
4771 case GLSL_TYPE_BOOL:
4772 case GLSL_TYPE_SUBROUTINE:
4773 return ac->i32;
4774 case GLSL_TYPE_INT8:
4775 case GLSL_TYPE_UINT8:
4776 return ac->i8;
4777 case GLSL_TYPE_INT16:
4778 case GLSL_TYPE_UINT16:
4779 return ac->i16;
4780 case GLSL_TYPE_FLOAT:
4781 return ac->f32;
4782 case GLSL_TYPE_FLOAT16:
4783 return ac->f16;
4784 case GLSL_TYPE_INT64:
4785 case GLSL_TYPE_UINT64:
4786 return ac->i64;
4787 case GLSL_TYPE_DOUBLE:
4788 return ac->f64;
4789 default:
4790 unreachable("unknown GLSL type");
4791 }
4792 }
4793
4794 static LLVMTypeRef
4795 glsl_to_llvm_type(struct ac_llvm_context *ac,
4796 const struct glsl_type *type)
4797 {
4798 if (glsl_type_is_scalar(type)) {
4799 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4800 }
4801
4802 if (glsl_type_is_vector(type)) {
4803 return LLVMVectorType(
4804 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4805 glsl_get_vector_elements(type));
4806 }
4807
4808 if (glsl_type_is_matrix(type)) {
4809 return LLVMArrayType(
4810 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4811 glsl_get_matrix_columns(type));
4812 }
4813
4814 if (glsl_type_is_array(type)) {
4815 return LLVMArrayType(
4816 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4817 glsl_get_length(type));
4818 }
4819
4820 assert(glsl_type_is_struct_or_ifc(type));
4821
4822 LLVMTypeRef member_types[glsl_get_length(type)];
4823
4824 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4825 member_types[i] =
4826 glsl_to_llvm_type(ac,
4827 glsl_get_struct_field(type, i));
4828 }
4829
4830 return LLVMStructTypeInContext(ac->context, member_types,
4831 glsl_get_length(type), false);
4832 }
4833
4834 static void visit_deref(struct ac_nir_context *ctx,
4835 nir_deref_instr *instr)
4836 {
4837 if (instr->mode != nir_var_mem_shared &&
4838 instr->mode != nir_var_mem_global)
4839 return;
4840
4841 LLVMValueRef result = NULL;
4842 switch(instr->deref_type) {
4843 case nir_deref_type_var: {
4844 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4845 result = entry->data;
4846 break;
4847 }
4848 case nir_deref_type_struct:
4849 if (instr->mode == nir_var_mem_global) {
4850 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4851 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4852 instr->strct.index);
4853 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4854 LLVMConstInt(ctx->ac.i32, offset, 0));
4855 } else {
4856 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4857 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4858 }
4859 break;
4860 case nir_deref_type_array:
4861 if (instr->mode == nir_var_mem_global) {
4862 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4863 unsigned stride = glsl_get_explicit_stride(parent->type);
4864
4865 if ((glsl_type_is_matrix(parent->type) &&
4866 glsl_matrix_type_is_row_major(parent->type)) ||
4867 (glsl_type_is_vector(parent->type) && stride == 0))
4868 stride = type_scalar_size_bytes(parent->type);
4869
4870 assert(stride > 0);
4871 LLVMValueRef index = get_src(ctx, instr->arr.index);
4872 if (LLVMTypeOf(index) != ctx->ac.i64)
4873 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4874
4875 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4876
4877 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4878 } else {
4879 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4880 get_src(ctx, instr->arr.index));
4881 }
4882 break;
4883 case nir_deref_type_ptr_as_array:
4884 if (instr->mode == nir_var_mem_global) {
4885 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4886
4887 LLVMValueRef index = get_src(ctx, instr->arr.index);
4888 if (LLVMTypeOf(index) != ctx->ac.i64)
4889 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4890
4891 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4892
4893 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4894 } else {
4895 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4896 get_src(ctx, instr->arr.index));
4897 }
4898 break;
4899 case nir_deref_type_cast: {
4900 result = get_src(ctx, instr->parent);
4901
4902 /* We can't use the structs from LLVM because the shader
4903 * specifies its own offsets. */
4904 LLVMTypeRef pointee_type = ctx->ac.i8;
4905 if (instr->mode == nir_var_mem_shared)
4906 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4907
4908 unsigned address_space;
4909
4910 switch(instr->mode) {
4911 case nir_var_mem_shared:
4912 address_space = AC_ADDR_SPACE_LDS;
4913 break;
4914 case nir_var_mem_global:
4915 address_space = AC_ADDR_SPACE_GLOBAL;
4916 break;
4917 default:
4918 unreachable("Unhandled address space");
4919 }
4920
4921 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4922
4923 if (LLVMTypeOf(result) != type) {
4924 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4925 result = LLVMBuildBitCast(ctx->ac.builder, result,
4926 type, "");
4927 } else {
4928 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4929 type, "");
4930 }
4931 }
4932 break;
4933 }
4934 default:
4935 unreachable("Unhandled deref_instr deref type");
4936 }
4937
4938 ctx->ssa_defs[instr->dest.ssa.index] = result;
4939 }
4940
4941 static void visit_cf_list(struct ac_nir_context *ctx,
4942 struct exec_list *list);
4943
4944 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4945 {
4946 nir_foreach_instr(instr, block)
4947 {
4948 switch (instr->type) {
4949 case nir_instr_type_alu:
4950 visit_alu(ctx, nir_instr_as_alu(instr));
4951 break;
4952 case nir_instr_type_load_const:
4953 visit_load_const(ctx, nir_instr_as_load_const(instr));
4954 break;
4955 case nir_instr_type_intrinsic:
4956 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4957 break;
4958 case nir_instr_type_tex:
4959 visit_tex(ctx, nir_instr_as_tex(instr));
4960 break;
4961 case nir_instr_type_phi:
4962 visit_phi(ctx, nir_instr_as_phi(instr));
4963 break;
4964 case nir_instr_type_ssa_undef:
4965 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4966 break;
4967 case nir_instr_type_jump:
4968 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4969 break;
4970 case nir_instr_type_deref:
4971 visit_deref(ctx, nir_instr_as_deref(instr));
4972 break;
4973 default:
4974 fprintf(stderr, "Unknown NIR instr type: ");
4975 nir_print_instr(instr, stderr);
4976 fprintf(stderr, "\n");
4977 abort();
4978 }
4979 }
4980
4981 _mesa_hash_table_insert(ctx->defs, block,
4982 LLVMGetInsertBlock(ctx->ac.builder));
4983 }
4984
4985 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4986 {
4987 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4988
4989 nir_block *then_block =
4990 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4991
4992 ac_build_uif(&ctx->ac, value, then_block->index);
4993
4994 visit_cf_list(ctx, &if_stmt->then_list);
4995
4996 if (!exec_list_is_empty(&if_stmt->else_list)) {
4997 nir_block *else_block =
4998 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4999
5000 ac_build_else(&ctx->ac, else_block->index);
5001 visit_cf_list(ctx, &if_stmt->else_list);
5002 }
5003
5004 ac_build_endif(&ctx->ac, then_block->index);
5005 }
5006
5007 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5008 {
5009 nir_block *first_loop_block =
5010 (nir_block *) exec_list_get_head(&loop->body);
5011
5012 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5013
5014 visit_cf_list(ctx, &loop->body);
5015
5016 ac_build_endloop(&ctx->ac, first_loop_block->index);
5017 }
5018
5019 static void visit_cf_list(struct ac_nir_context *ctx,
5020 struct exec_list *list)
5021 {
5022 foreach_list_typed(nir_cf_node, node, node, list)
5023 {
5024 switch (node->type) {
5025 case nir_cf_node_block:
5026 visit_block(ctx, nir_cf_node_as_block(node));
5027 break;
5028
5029 case nir_cf_node_if:
5030 visit_if(ctx, nir_cf_node_as_if(node));
5031 break;
5032
5033 case nir_cf_node_loop:
5034 visit_loop(ctx, nir_cf_node_as_loop(node));
5035 break;
5036
5037 default:
5038 assert(0);
5039 }
5040 }
5041 }
5042
5043 void
5044 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5045 struct ac_shader_abi *abi,
5046 struct nir_shader *nir,
5047 struct nir_variable *variable,
5048 gl_shader_stage stage)
5049 {
5050 unsigned output_loc = variable->data.driver_location / 4;
5051 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5052
5053 /* tess ctrl has it's own load/store paths for outputs */
5054 if (stage == MESA_SHADER_TESS_CTRL)
5055 return;
5056
5057 if (stage == MESA_SHADER_VERTEX ||
5058 stage == MESA_SHADER_TESS_EVAL ||
5059 stage == MESA_SHADER_GEOMETRY) {
5060 int idx = variable->data.location + variable->data.index;
5061 if (idx == VARYING_SLOT_CLIP_DIST0) {
5062 int length = nir->info.clip_distance_array_size +
5063 nir->info.cull_distance_array_size;
5064
5065 if (length > 4)
5066 attrib_count = 2;
5067 else
5068 attrib_count = 1;
5069 }
5070 }
5071
5072 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5073 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5074 for (unsigned i = 0; i < attrib_count; ++i) {
5075 for (unsigned chan = 0; chan < 4; chan++) {
5076 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5077 ac_build_alloca_undef(ctx, type, "");
5078 }
5079 }
5080 }
5081
5082 static void
5083 setup_locals(struct ac_nir_context *ctx,
5084 struct nir_function *func)
5085 {
5086 int i, j;
5087 ctx->num_locals = 0;
5088 nir_foreach_variable(variable, &func->impl->locals) {
5089 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5090 variable->data.driver_location = ctx->num_locals * 4;
5091 variable->data.location_frac = 0;
5092 ctx->num_locals += attrib_count;
5093 }
5094 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5095 if (!ctx->locals)
5096 return;
5097
5098 for (i = 0; i < ctx->num_locals; i++) {
5099 for (j = 0; j < 4; j++) {
5100 ctx->locals[i * 4 + j] =
5101 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5102 }
5103 }
5104 }
5105
5106 static void
5107 setup_scratch(struct ac_nir_context *ctx,
5108 struct nir_shader *shader)
5109 {
5110 if (shader->scratch_size == 0)
5111 return;
5112
5113 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5114 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5115 "scratch");
5116 }
5117
5118 static void
5119 setup_constant_data(struct ac_nir_context *ctx,
5120 struct nir_shader *shader)
5121 {
5122 if (!shader->constant_data)
5123 return;
5124
5125 LLVMValueRef data =
5126 LLVMConstStringInContext(ctx->ac.context,
5127 shader->constant_data,
5128 shader->constant_data_size,
5129 true);
5130 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5131
5132 /* We want to put the constant data in the CONST address space so that
5133 * we can use scalar loads. However, LLVM versions before 10 put these
5134 * variables in the same section as the code, which is unacceptable
5135 * for RadeonSI as it needs to relocate all the data sections after
5136 * the code sections. See https://reviews.llvm.org/D65813.
5137 */
5138 unsigned address_space =
5139 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5140
5141 LLVMValueRef global =
5142 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5143 "const_data",
5144 address_space);
5145
5146 LLVMSetInitializer(global, data);
5147 LLVMSetGlobalConstant(global, true);
5148 LLVMSetVisibility(global, LLVMHiddenVisibility);
5149 ctx->constant_data = global;
5150 }
5151
5152 static void
5153 setup_shared(struct ac_nir_context *ctx,
5154 struct nir_shader *nir)
5155 {
5156 if (ctx->ac.lds)
5157 return;
5158
5159 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5160 nir->info.cs.shared_size);
5161
5162 LLVMValueRef lds =
5163 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5164 "compute_lds",
5165 AC_ADDR_SPACE_LDS);
5166 LLVMSetAlignment(lds, 64 * 1024);
5167
5168 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5169 LLVMPointerType(ctx->ac.i8,
5170 AC_ADDR_SPACE_LDS), "");
5171 }
5172
5173 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5174 const struct ac_shader_args *args, struct nir_shader *nir)
5175 {
5176 struct ac_nir_context ctx = {};
5177 struct nir_function *func;
5178
5179 ctx.ac = *ac;
5180 ctx.abi = abi;
5181 ctx.args = args;
5182
5183 ctx.stage = nir->info.stage;
5184 ctx.info = &nir->info;
5185
5186 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5187
5188 nir_foreach_variable(variable, &nir->outputs)
5189 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5190 ctx.stage);
5191
5192 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5193 _mesa_key_pointer_equal);
5194 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5195 _mesa_key_pointer_equal);
5196 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5197 _mesa_key_pointer_equal);
5198
5199 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5200
5201 nir_index_ssa_defs(func->impl);
5202 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5203
5204 setup_locals(&ctx, func);
5205 setup_scratch(&ctx, nir);
5206 setup_constant_data(&ctx, nir);
5207
5208 if (gl_shader_stage_is_compute(nir->info.stage))
5209 setup_shared(&ctx, nir);
5210
5211 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5212 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5213 /* true = don't kill. */
5214 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5215 }
5216
5217 visit_cf_list(&ctx, &func->impl->body);
5218 phi_post_pass(&ctx);
5219
5220 if (ctx.ac.postponed_kill)
5221 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5222 ctx.ac.postponed_kill, ""));
5223
5224 if (!gl_shader_stage_is_compute(nir->info.stage))
5225 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5226 ctx.abi->outputs);
5227
5228 free(ctx.locals);
5229 free(ctx.ssa_defs);
5230 ralloc_free(ctx.defs);
5231 ralloc_free(ctx.phis);
5232 ralloc_free(ctx.vars);
5233 }
5234
5235 bool
5236 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5237 {
5238 bool progress = false;
5239
5240 /* Lower large variables to scratch first so that we won't bloat the
5241 * shader by generating large if ladders for them. We later lower
5242 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5243 */
5244 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5245 nir_var_function_temp,
5246 256,
5247 glsl_get_natural_size_align_bytes);
5248
5249 /* While it would be nice not to have this flag, we are constrained
5250 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5251 */
5252 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5253
5254 /* TODO: Indirect indexing of GS inputs is unimplemented.
5255 *
5256 * TCS and TES load inputs directly from LDS or offchip memory, so
5257 * indirect indexing is trivial.
5258 */
5259 nir_variable_mode indirect_mask = 0;
5260 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5261 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5262 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5263 !llvm_has_working_vgpr_indexing)) {
5264 indirect_mask |= nir_var_shader_in;
5265 }
5266 if (!llvm_has_working_vgpr_indexing &&
5267 nir->info.stage != MESA_SHADER_TESS_CTRL)
5268 indirect_mask |= nir_var_shader_out;
5269
5270 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5271 * smart enough to handle indirects without causing excess spilling
5272 * causing the gpu to hang.
5273 *
5274 * See the following thread for more details of the problem:
5275 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5276 */
5277 indirect_mask |= nir_var_function_temp;
5278
5279 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5280 return progress;
5281 }
5282
5283 static unsigned
5284 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5285 {
5286 if (intrin->intrinsic != nir_intrinsic_store_deref)
5287 return 0;
5288
5289 nir_variable *var =
5290 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5291
5292 if (var->data.mode != nir_var_shader_out)
5293 return 0;
5294
5295 unsigned writemask = 0;
5296 const int location = var->data.location;
5297 unsigned first_component = var->data.location_frac;
5298 unsigned num_comps = intrin->dest.ssa.num_components;
5299
5300 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5301 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5302 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5303 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5304
5305 return writemask;
5306 }
5307
5308 static void
5309 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5310 unsigned *cond_block_tf_writemask,
5311 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5312 {
5313 switch (cf_node->type) {
5314 case nir_cf_node_block: {
5315 nir_block *block = nir_cf_node_as_block(cf_node);
5316 nir_foreach_instr(instr, block) {
5317 if (instr->type != nir_instr_type_intrinsic)
5318 continue;
5319
5320 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5321 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5322
5323 /* If we find a barrier in nested control flow put this in the
5324 * too hard basket. In GLSL this is not possible but it is in
5325 * SPIR-V.
5326 */
5327 if (is_nested_cf) {
5328 *tessfactors_are_def_in_all_invocs = false;
5329 return;
5330 }
5331
5332 /* The following case must be prevented:
5333 * gl_TessLevelInner = ...;
5334 * barrier();
5335 * if (gl_InvocationID == 1)
5336 * gl_TessLevelInner = ...;
5337 *
5338 * If you consider disjoint code segments separated by barriers, each
5339 * such segment that writes tess factor channels should write the same
5340 * channels in all codepaths within that segment.
5341 */
5342 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5343 /* Accumulate the result: */
5344 *tessfactors_are_def_in_all_invocs &=
5345 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5346
5347 /* Analyze the next code segment from scratch. */
5348 *upper_block_tf_writemask = 0;
5349 *cond_block_tf_writemask = 0;
5350 }
5351 } else
5352 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5353 }
5354
5355 break;
5356 }
5357 case nir_cf_node_if: {
5358 unsigned then_tessfactor_writemask = 0;
5359 unsigned else_tessfactor_writemask = 0;
5360
5361 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5362 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5363 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5364 cond_block_tf_writemask,
5365 tessfactors_are_def_in_all_invocs, true);
5366 }
5367
5368 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5369 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5370 cond_block_tf_writemask,
5371 tessfactors_are_def_in_all_invocs, true);
5372 }
5373
5374 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5375 /* If both statements write the same tess factor channels,
5376 * we can say that the upper block writes them too.
5377 */
5378 *upper_block_tf_writemask |= then_tessfactor_writemask &
5379 else_tessfactor_writemask;
5380 *cond_block_tf_writemask |= then_tessfactor_writemask |
5381 else_tessfactor_writemask;
5382 }
5383
5384 break;
5385 }
5386 case nir_cf_node_loop: {
5387 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5388 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5389 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5390 cond_block_tf_writemask,
5391 tessfactors_are_def_in_all_invocs, true);
5392 }
5393
5394 break;
5395 }
5396 default:
5397 unreachable("unknown cf node type");
5398 }
5399 }
5400
5401 bool
5402 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5403 {
5404 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5405
5406 /* The pass works as follows:
5407 * If all codepaths write tess factors, we can say that all
5408 * invocations define tess factors.
5409 *
5410 * Each tess factor channel is tracked separately.
5411 */
5412 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5413 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5414
5415 /* Initial value = true. Here the pass will accumulate results from
5416 * multiple segments surrounded by barriers. If tess factors aren't
5417 * written at all, it's a shader bug and we don't care if this will be
5418 * true.
5419 */
5420 bool tessfactors_are_def_in_all_invocs = true;
5421
5422 nir_foreach_function(function, nir) {
5423 if (function->impl) {
5424 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5425 scan_tess_ctrl(node, &main_block_tf_writemask,
5426 &cond_block_tf_writemask,
5427 &tessfactors_are_def_in_all_invocs,
5428 false);
5429 }
5430 }
5431 }
5432
5433 /* Accumulate the result for the last code segment separated by a
5434 * barrier.
5435 */
5436 if (main_block_tf_writemask || cond_block_tf_writemask) {
5437 tessfactors_are_def_in_all_invocs &=
5438 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5439 }
5440
5441 return tessfactors_are_def_in_all_invocs;
5442 }