24be5ca866e1e2981212f341e4f479ff351e1b78
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
174 return LLVMBuildSelect(ctx->builder, result,
175 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
176 ctx->i32_0, "");
177 }
178
179 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
180 LLVMRealPredicate pred, LLVMValueRef src0,
181 LLVMValueRef src1)
182 {
183 LLVMValueRef result;
184 src0 = ac_to_float(ctx, src0);
185 src1 = ac_to_float(ctx, src1);
186 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
187 return LLVMBuildSelect(ctx->builder, result,
188 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
189 ctx->i32_0, "");
190 }
191
192 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
193 const char *intrin,
194 LLVMTypeRef result_type,
195 LLVMValueRef src0)
196 {
197 char name[64], type[64];
198 LLVMValueRef params[] = {
199 ac_to_float(ctx, src0),
200 };
201
202 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
203 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
204 assert(length < sizeof(name));
205 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
206 }
207
208 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
209 const char *intrin,
210 LLVMTypeRef result_type,
211 LLVMValueRef src0, LLVMValueRef src1)
212 {
213 char name[64], type[64];
214 LLVMValueRef params[] = {
215 ac_to_float(ctx, src0),
216 ac_to_float(ctx, src1),
217 };
218
219 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
220 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
221 assert(length < sizeof(name));
222 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
223 }
224
225 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
226 const char *intrin,
227 LLVMTypeRef result_type,
228 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
229 {
230 char name[64], type[64];
231 LLVMValueRef params[] = {
232 ac_to_float(ctx, src0),
233 ac_to_float(ctx, src1),
234 ac_to_float(ctx, src2),
235 };
236
237 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
238 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
239 assert(length < sizeof(name));
240 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
241 }
242
243 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
244 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
245 {
246 LLVMTypeRef src1_type = LLVMTypeOf(src1);
247 LLVMTypeRef src2_type = LLVMTypeOf(src2);
248
249 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
250
251 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
252 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
253 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
254 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
255 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
256 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
257 }
258
259 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
260 ctx->i32_0, "");
261 return LLVMBuildSelect(ctx->builder, v,
262 ac_to_integer_or_pointer(ctx, src1),
263 ac_to_integer_or_pointer(ctx, src2), "");
264 }
265
266 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
267 LLVMValueRef src0)
268 {
269 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
270 }
271
272 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
273 const char *intrin,
274 LLVMValueRef src0, LLVMValueRef src1)
275 {
276 LLVMTypeRef ret_type;
277 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
278 LLVMValueRef res;
279 LLVMValueRef params[] = { src0, src1 };
280 ret_type = LLVMStructTypeInContext(ctx->context, types,
281 2, true);
282
283 res = ac_build_intrinsic(ctx, intrin, ret_type,
284 params, 2, AC_FUNC_ATTR_READNONE);
285
286 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
287 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
288 return res;
289 }
290
291 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
292 LLVMValueRef src0,
293 unsigned bitsize)
294 {
295 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
296 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
297 "");
298 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
299
300 switch (bitsize) {
301 case 16:
302 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
303 case 32:
304 return result;
305 case 64:
306 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
307 default:
308 unreachable("Unsupported bit size.");
309 }
310 }
311
312 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
313 LLVMValueRef src0)
314 {
315 src0 = ac_to_float(ctx, src0);
316 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
317 return LLVMBuildSExt(ctx->builder,
318 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
319 ctx->i32, "");
320 }
321
322 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
323 LLVMValueRef src0,
324 unsigned bitsize)
325 {
326 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
327
328 switch (bitsize) {
329 case 8:
330 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
331 case 16:
332 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
333 case 32:
334 return result;
335 case 64:
336 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
337 default:
338 unreachable("Unsupported bit size.");
339 }
340 }
341
342 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
343 LLVMValueRef src0)
344 {
345 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
346 return LLVMBuildSExt(ctx->builder,
347 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
348 ctx->i32, "");
349 }
350
351 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
352 LLVMValueRef src0)
353 {
354 LLVMValueRef result;
355 LLVMValueRef cond = NULL;
356
357 src0 = ac_to_float(ctx, src0);
358 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
359
360 if (ctx->chip_class >= GFX8) {
361 LLVMValueRef args[2];
362 /* Check if the result is a denormal - and flush to 0 if so. */
363 args[0] = result;
364 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
365 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
366 }
367
368 /* need to convert back up to f32 */
369 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
370
371 if (ctx->chip_class >= GFX8)
372 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
373 else {
374 /* for GFX6-GFX7 */
375 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
376 * so compare the result and flush to 0 if it's smaller.
377 */
378 LLVMValueRef temp, cond2;
379 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
380 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
381 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
382 temp, "");
383 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
384 temp, ctx->f32_0, "");
385 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
386 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
387 }
388 return result;
389 }
390
391 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
392 LLVMValueRef src0, LLVMValueRef src1)
393 {
394 LLVMValueRef dst64, result;
395 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
396 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
397
398 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
399 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
400 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
401 return result;
402 }
403
404 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
405 LLVMValueRef src0, LLVMValueRef src1)
406 {
407 LLVMValueRef dst64, result;
408 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
409 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
410
411 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
412 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
413 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
414 return result;
415 }
416
417 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
418 LLVMValueRef bits, LLVMValueRef offset)
419 {
420 /* mask = ((1 << bits) - 1) << offset */
421 return LLVMBuildShl(ctx->builder,
422 LLVMBuildSub(ctx->builder,
423 LLVMBuildShl(ctx->builder,
424 ctx->i32_1,
425 bits, ""),
426 ctx->i32_1, ""),
427 offset, "");
428 }
429
430 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
431 LLVMValueRef mask, LLVMValueRef insert,
432 LLVMValueRef base)
433 {
434 /* Calculate:
435 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
436 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
437 */
438 return LLVMBuildXor(ctx->builder, base,
439 LLVMBuildAnd(ctx->builder, mask,
440 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
441 }
442
443 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
444 LLVMValueRef src0,
445 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
446 LLVMValueRef args[2]))
447 {
448 LLVMValueRef comp[2];
449
450 src0 = ac_to_float(ctx, src0);
451 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
452 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
453
454 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
455 }
456
457 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
458 LLVMValueRef src0)
459 {
460 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
461 LLVMValueRef temps[2], val;
462 int i;
463
464 for (i = 0; i < 2; i++) {
465 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
466 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
467 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
468 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
469 }
470 return ac_build_gather_values(ctx, temps, 2);
471 }
472
473 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
474 nir_op op,
475 LLVMValueRef src0)
476 {
477 unsigned mask;
478 int idx;
479 LLVMValueRef result;
480
481 if (op == nir_op_fddx_fine)
482 mask = AC_TID_MASK_LEFT;
483 else if (op == nir_op_fddy_fine)
484 mask = AC_TID_MASK_TOP;
485 else
486 mask = AC_TID_MASK_TOP_LEFT;
487
488 /* for DDX we want to next X pixel, DDY next Y pixel. */
489 if (op == nir_op_fddx_fine ||
490 op == nir_op_fddx_coarse ||
491 op == nir_op_fddx)
492 idx = 1;
493 else
494 idx = 2;
495
496 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
497 return result;
498 }
499
500 struct waterfall_context {
501 LLVMBasicBlockRef phi_bb[2];
502 bool use_waterfall;
503 };
504
505 /* To deal with divergent descriptors we can create a loop that handles all
506 * lanes with the same descriptor on a given iteration (henceforth a
507 * waterfall loop).
508 *
509 * These helper create the begin and end of the loop leaving the caller
510 * to implement the body.
511 *
512 * params:
513 * - ctx is the usal nir context
514 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
515 * - value is the possibly divergent value for which we built the loop
516 * - divergent is whether value is actually divergent. If false we just pass
517 * things through.
518 */
519 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
520 struct waterfall_context *wctx,
521 LLVMValueRef value, bool divergent)
522 {
523 /* If the app claims the value is divergent but it is constant we can
524 * end up with a dynamic index of NULL. */
525 if (!value)
526 divergent = false;
527
528 wctx->use_waterfall = divergent;
529 if (!divergent)
530 return value;
531
532 ac_build_bgnloop(&ctx->ac, 6000);
533
534 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
535
536 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
537 scalar_value, "uniform_active");
538
539 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
540 ac_build_ifcc(&ctx->ac, active, 6001);
541
542 return scalar_value;
543 }
544
545 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
546 struct waterfall_context *wctx,
547 LLVMValueRef value)
548 {
549 LLVMValueRef ret = NULL;
550 LLVMValueRef phi_src[2];
551 LLVMValueRef cc_phi_src[2] = {
552 LLVMConstInt(ctx->ac.i32, 0, false),
553 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
554 };
555
556 if (!wctx->use_waterfall)
557 return value;
558
559 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
560
561 ac_build_endif(&ctx->ac, 6001);
562
563 if (value) {
564 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
565 phi_src[1] = value;
566
567 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
568 }
569
570 /*
571 * By using the optimization barrier on the exit decision, we decouple
572 * the operations from the break, and hence avoid LLVM hoisting the
573 * opteration into the break block.
574 */
575 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
576 ac_build_optimization_barrier(&ctx->ac, &cc);
577
578 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
579 ac_build_ifcc(&ctx->ac, active, 6002);
580 ac_build_break(&ctx->ac);
581 ac_build_endif(&ctx->ac, 6002);
582
583 ac_build_endloop(&ctx->ac, 6000);
584 return ret;
585 }
586
587 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
588 {
589 LLVMValueRef src[4], result = NULL;
590 unsigned num_components = instr->dest.dest.ssa.num_components;
591 unsigned src_components;
592 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
593 bool saved_inexact = false;
594
595 if (instr->exact)
596 saved_inexact = ac_disable_inexact_math(ctx->ac.builder);
597
598 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
599 switch (instr->op) {
600 case nir_op_vec2:
601 case nir_op_vec3:
602 case nir_op_vec4:
603 src_components = 1;
604 break;
605 case nir_op_pack_half_2x16:
606 case nir_op_pack_snorm_2x16:
607 case nir_op_pack_unorm_2x16:
608 src_components = 2;
609 break;
610 case nir_op_unpack_half_2x16:
611 src_components = 1;
612 break;
613 case nir_op_cube_face_coord:
614 case nir_op_cube_face_index:
615 src_components = 3;
616 break;
617 default:
618 src_components = num_components;
619 break;
620 }
621 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
622 src[i] = get_alu_src(ctx, instr->src[i], src_components);
623
624 switch (instr->op) {
625 case nir_op_mov:
626 result = src[0];
627 break;
628 case nir_op_fneg:
629 src[0] = ac_to_float(&ctx->ac, src[0]);
630 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
631 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
632 /* fneg will be optimized by backend compiler with sign
633 * bit removed via XOR. This is probably a LLVM bug.
634 */
635 result = ac_build_canonicalize(&ctx->ac, result,
636 instr->dest.dest.ssa.bit_size);
637 }
638 break;
639 case nir_op_ineg:
640 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
641 break;
642 case nir_op_inot:
643 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
644 break;
645 case nir_op_iadd:
646 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_fadd:
649 src[0] = ac_to_float(&ctx->ac, src[0]);
650 src[1] = ac_to_float(&ctx->ac, src[1]);
651 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
652 break;
653 case nir_op_fsub:
654 src[0] = ac_to_float(&ctx->ac, src[0]);
655 src[1] = ac_to_float(&ctx->ac, src[1]);
656 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
657 break;
658 case nir_op_isub:
659 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
660 break;
661 case nir_op_imul:
662 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_imod:
665 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
666 break;
667 case nir_op_umod:
668 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
669 break;
670 case nir_op_fmod:
671 /* lower_fmod only lower 16-bit and 32-bit fmod */
672 assert(instr->dest.dest.ssa.bit_size == 64);
673 src[0] = ac_to_float(&ctx->ac, src[0]);
674 src[1] = ac_to_float(&ctx->ac, src[1]);
675 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
676 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
677 ac_to_float_type(&ctx->ac, def_type), result);
678 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
679 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
680 break;
681 case nir_op_irem:
682 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
683 break;
684 case nir_op_idiv:
685 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
686 break;
687 case nir_op_udiv:
688 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
689 break;
690 case nir_op_fmul:
691 src[0] = ac_to_float(&ctx->ac, src[0]);
692 src[1] = ac_to_float(&ctx->ac, src[1]);
693 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_frcp:
696 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
697 ac_to_float_type(&ctx->ac, def_type), src[0]);
698 break;
699 case nir_op_iand:
700 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
701 break;
702 case nir_op_ior:
703 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
704 break;
705 case nir_op_ixor:
706 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
707 break;
708 case nir_op_ishl:
709 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
710 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
711 LLVMTypeOf(src[0]), "");
712 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
713 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
714 LLVMTypeOf(src[0]), "");
715 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
716 break;
717 case nir_op_ishr:
718 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
719 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
720 LLVMTypeOf(src[0]), "");
721 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
722 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
723 LLVMTypeOf(src[0]), "");
724 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
725 break;
726 case nir_op_ushr:
727 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
728 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
729 LLVMTypeOf(src[0]), "");
730 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
731 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
732 LLVMTypeOf(src[0]), "");
733 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
734 break;
735 case nir_op_ilt32:
736 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
737 break;
738 case nir_op_ine32:
739 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
740 break;
741 case nir_op_ieq32:
742 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
743 break;
744 case nir_op_ige32:
745 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
746 break;
747 case nir_op_ult32:
748 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
749 break;
750 case nir_op_uge32:
751 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
752 break;
753 case nir_op_feq32:
754 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
755 break;
756 case nir_op_fne32:
757 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
758 break;
759 case nir_op_flt32:
760 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
761 break;
762 case nir_op_fge32:
763 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
764 break;
765 case nir_op_fabs:
766 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
767 ac_to_float_type(&ctx->ac, def_type), src[0]);
768 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
769 /* fabs will be optimized by backend compiler with sign
770 * bit removed via AND.
771 */
772 result = ac_build_canonicalize(&ctx->ac, result,
773 instr->dest.dest.ssa.bit_size);
774 }
775 break;
776 case nir_op_iabs:
777 result = emit_iabs(&ctx->ac, src[0]);
778 break;
779 case nir_op_imax:
780 result = ac_build_imax(&ctx->ac, src[0], src[1]);
781 break;
782 case nir_op_imin:
783 result = ac_build_imin(&ctx->ac, src[0], src[1]);
784 break;
785 case nir_op_umax:
786 result = ac_build_umax(&ctx->ac, src[0], src[1]);
787 break;
788 case nir_op_umin:
789 result = ac_build_umin(&ctx->ac, src[0], src[1]);
790 break;
791 case nir_op_isign:
792 result = ac_build_isign(&ctx->ac, src[0],
793 instr->dest.dest.ssa.bit_size);
794 break;
795 case nir_op_fsign:
796 src[0] = ac_to_float(&ctx->ac, src[0]);
797 result = ac_build_fsign(&ctx->ac, src[0],
798 instr->dest.dest.ssa.bit_size);
799 break;
800 case nir_op_ffloor:
801 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
802 ac_to_float_type(&ctx->ac, def_type), src[0]);
803 break;
804 case nir_op_ftrunc:
805 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
806 ac_to_float_type(&ctx->ac, def_type), src[0]);
807 break;
808 case nir_op_fceil:
809 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
810 ac_to_float_type(&ctx->ac, def_type), src[0]);
811 break;
812 case nir_op_fround_even:
813 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
814 ac_to_float_type(&ctx->ac, def_type),src[0]);
815 break;
816 case nir_op_ffract:
817 src[0] = ac_to_float(&ctx->ac, src[0]);
818 result = ac_build_fract(&ctx->ac, src[0],
819 instr->dest.dest.ssa.bit_size);
820 break;
821 case nir_op_fsin:
822 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
823 ac_to_float_type(&ctx->ac, def_type), src[0]);
824 break;
825 case nir_op_fcos:
826 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
827 ac_to_float_type(&ctx->ac, def_type), src[0]);
828 break;
829 case nir_op_fsqrt:
830 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
831 ac_to_float_type(&ctx->ac, def_type), src[0]);
832 break;
833 case nir_op_fexp2:
834 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
835 ac_to_float_type(&ctx->ac, def_type), src[0]);
836 break;
837 case nir_op_flog2:
838 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
839 ac_to_float_type(&ctx->ac, def_type), src[0]);
840 break;
841 case nir_op_frsq:
842 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
843 ac_to_float_type(&ctx->ac, def_type), src[0]);
844 break;
845 case nir_op_frexp_exp:
846 src[0] = ac_to_float(&ctx->ac, src[0]);
847 result = ac_build_frexp_exp(&ctx->ac, src[0],
848 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
849 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
850 result = LLVMBuildSExt(ctx->ac.builder, result,
851 ctx->ac.i32, "");
852 break;
853 case nir_op_frexp_sig:
854 src[0] = ac_to_float(&ctx->ac, src[0]);
855 result = ac_build_frexp_mant(&ctx->ac, src[0],
856 instr->dest.dest.ssa.bit_size);
857 break;
858 case nir_op_fpow:
859 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
860 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
861 break;
862 case nir_op_fmax:
863 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
864 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
865 if (ctx->ac.chip_class < GFX9 &&
866 instr->dest.dest.ssa.bit_size == 32) {
867 /* Only pre-GFX9 chips do not flush denorms. */
868 result = ac_build_canonicalize(&ctx->ac, result,
869 instr->dest.dest.ssa.bit_size);
870 }
871 break;
872 case nir_op_fmin:
873 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
874 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
875 if (ctx->ac.chip_class < GFX9 &&
876 instr->dest.dest.ssa.bit_size == 32) {
877 /* Only pre-GFX9 chips do not flush denorms. */
878 result = ac_build_canonicalize(&ctx->ac, result,
879 instr->dest.dest.ssa.bit_size);
880 }
881 break;
882 case nir_op_ffma:
883 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
884 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
885 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
886 break;
887 case nir_op_ldexp:
888 src[0] = ac_to_float(&ctx->ac, src[0]);
889 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
890 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
891 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
892 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
893 else
894 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
895 break;
896 case nir_op_bfm:
897 result = emit_bfm(&ctx->ac, src[0], src[1]);
898 break;
899 case nir_op_bitfield_select:
900 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
901 break;
902 case nir_op_ubfe:
903 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
904 break;
905 case nir_op_ibfe:
906 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
907 break;
908 case nir_op_bitfield_reverse:
909 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
910 break;
911 case nir_op_bit_count:
912 result = ac_build_bit_count(&ctx->ac, src[0]);
913 break;
914 case nir_op_vec2:
915 case nir_op_vec3:
916 case nir_op_vec4:
917 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
918 src[i] = ac_to_integer(&ctx->ac, src[i]);
919 result = ac_build_gather_values(&ctx->ac, src, num_components);
920 break;
921 case nir_op_f2i8:
922 case nir_op_f2i16:
923 case nir_op_f2i32:
924 case nir_op_f2i64:
925 src[0] = ac_to_float(&ctx->ac, src[0]);
926 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
927 break;
928 case nir_op_f2u8:
929 case nir_op_f2u16:
930 case nir_op_f2u32:
931 case nir_op_f2u64:
932 src[0] = ac_to_float(&ctx->ac, src[0]);
933 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
934 break;
935 case nir_op_i2f16:
936 case nir_op_i2f32:
937 case nir_op_i2f64:
938 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
939 break;
940 case nir_op_u2f16:
941 case nir_op_u2f32:
942 case nir_op_u2f64:
943 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
944 break;
945 case nir_op_f2f16_rtz:
946 src[0] = ac_to_float(&ctx->ac, src[0]);
947 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
948 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
949 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
950 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
951 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
952 break;
953 case nir_op_f2f16_rtne:
954 case nir_op_f2f16:
955 case nir_op_f2f32:
956 case nir_op_f2f64:
957 src[0] = ac_to_float(&ctx->ac, src[0]);
958 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
959 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
960 else
961 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
962 break;
963 case nir_op_u2u8:
964 case nir_op_u2u16:
965 case nir_op_u2u32:
966 case nir_op_u2u64:
967 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
968 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
969 else
970 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
971 break;
972 case nir_op_i2i8:
973 case nir_op_i2i16:
974 case nir_op_i2i32:
975 case nir_op_i2i64:
976 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
977 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
978 else
979 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
980 break;
981 case nir_op_b32csel:
982 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
983 break;
984 case nir_op_find_lsb:
985 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
986 break;
987 case nir_op_ufind_msb:
988 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
989 break;
990 case nir_op_ifind_msb:
991 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
992 break;
993 case nir_op_uadd_carry:
994 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
995 break;
996 case nir_op_usub_borrow:
997 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
998 break;
999 case nir_op_b2f16:
1000 case nir_op_b2f32:
1001 case nir_op_b2f64:
1002 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1003 break;
1004 case nir_op_f2b32:
1005 result = emit_f2b(&ctx->ac, src[0]);
1006 break;
1007 case nir_op_b2i8:
1008 case nir_op_b2i16:
1009 case nir_op_b2i32:
1010 case nir_op_b2i64:
1011 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1012 break;
1013 case nir_op_i2b32:
1014 result = emit_i2b(&ctx->ac, src[0]);
1015 break;
1016 case nir_op_fquantize2f16:
1017 result = emit_f2f16(&ctx->ac, src[0]);
1018 break;
1019 case nir_op_umul_high:
1020 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1021 break;
1022 case nir_op_imul_high:
1023 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1024 break;
1025 case nir_op_pack_half_2x16:
1026 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1027 break;
1028 case nir_op_pack_snorm_2x16:
1029 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1030 break;
1031 case nir_op_pack_unorm_2x16:
1032 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1033 break;
1034 case nir_op_unpack_half_2x16:
1035 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1036 break;
1037 case nir_op_fddx:
1038 case nir_op_fddy:
1039 case nir_op_fddx_fine:
1040 case nir_op_fddy_fine:
1041 case nir_op_fddx_coarse:
1042 case nir_op_fddy_coarse:
1043 result = emit_ddxy(ctx, instr->op, src[0]);
1044 break;
1045
1046 case nir_op_unpack_64_2x32_split_x: {
1047 assert(ac_get_llvm_num_components(src[0]) == 1);
1048 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1049 ctx->ac.v2i32,
1050 "");
1051 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1052 ctx->ac.i32_0, "");
1053 break;
1054 }
1055
1056 case nir_op_unpack_64_2x32_split_y: {
1057 assert(ac_get_llvm_num_components(src[0]) == 1);
1058 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1059 ctx->ac.v2i32,
1060 "");
1061 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1062 ctx->ac.i32_1, "");
1063 break;
1064 }
1065
1066 case nir_op_pack_64_2x32_split: {
1067 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1068 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1069 break;
1070 }
1071
1072 case nir_op_pack_32_2x16_split: {
1073 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1074 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1075 break;
1076 }
1077
1078 case nir_op_unpack_32_2x16_split_x: {
1079 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1080 ctx->ac.v2i16,
1081 "");
1082 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1083 ctx->ac.i32_0, "");
1084 break;
1085 }
1086
1087 case nir_op_unpack_32_2x16_split_y: {
1088 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1089 ctx->ac.v2i16,
1090 "");
1091 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1092 ctx->ac.i32_1, "");
1093 break;
1094 }
1095
1096 case nir_op_cube_face_coord: {
1097 src[0] = ac_to_float(&ctx->ac, src[0]);
1098 LLVMValueRef results[2];
1099 LLVMValueRef in[3];
1100 for (unsigned chan = 0; chan < 3; chan++)
1101 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1102 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1103 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1104 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1105 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1106 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1107 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1108 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1109 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1110 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1111 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1112 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1113 result = ac_build_gather_values(&ctx->ac, results, 2);
1114 break;
1115 }
1116
1117 case nir_op_cube_face_index: {
1118 src[0] = ac_to_float(&ctx->ac, src[0]);
1119 LLVMValueRef in[3];
1120 for (unsigned chan = 0; chan < 3; chan++)
1121 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1122 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1123 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1124 break;
1125 }
1126
1127 case nir_op_fmin3:
1128 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1129 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1130 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1131 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1132 break;
1133 case nir_op_umin3:
1134 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1135 result = ac_build_umin(&ctx->ac, result, src[2]);
1136 break;
1137 case nir_op_imin3:
1138 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1139 result = ac_build_imin(&ctx->ac, result, src[2]);
1140 break;
1141 case nir_op_fmax3:
1142 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1143 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1144 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1145 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1146 break;
1147 case nir_op_umax3:
1148 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1149 result = ac_build_umax(&ctx->ac, result, src[2]);
1150 break;
1151 case nir_op_imax3:
1152 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1153 result = ac_build_imax(&ctx->ac, result, src[2]);
1154 break;
1155 case nir_op_fmed3: {
1156 src[0] = ac_to_float(&ctx->ac, src[0]);
1157 src[1] = ac_to_float(&ctx->ac, src[1]);
1158 src[2] = ac_to_float(&ctx->ac, src[2]);
1159 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1160 instr->dest.dest.ssa.bit_size);
1161 break;
1162 }
1163 case nir_op_imed3: {
1164 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1165 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1166 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1167 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1168 break;
1169 }
1170 case nir_op_umed3: {
1171 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1172 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1173 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1174 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1175 break;
1176 }
1177
1178 default:
1179 fprintf(stderr, "Unknown NIR alu instr: ");
1180 nir_print_instr(&instr->instr, stderr);
1181 fprintf(stderr, "\n");
1182 abort();
1183 }
1184
1185 if (result) {
1186 assert(instr->dest.dest.is_ssa);
1187 result = ac_to_integer_or_pointer(&ctx->ac, result);
1188 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1189 }
1190
1191 if (instr->exact)
1192 ac_restore_inexact_math(ctx->ac.builder, saved_inexact);
1193 }
1194
1195 static void visit_load_const(struct ac_nir_context *ctx,
1196 const nir_load_const_instr *instr)
1197 {
1198 LLVMValueRef values[4], value = NULL;
1199 LLVMTypeRef element_type =
1200 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1201
1202 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1203 switch (instr->def.bit_size) {
1204 case 8:
1205 values[i] = LLVMConstInt(element_type,
1206 instr->value[i].u8, false);
1207 break;
1208 case 16:
1209 values[i] = LLVMConstInt(element_type,
1210 instr->value[i].u16, false);
1211 break;
1212 case 32:
1213 values[i] = LLVMConstInt(element_type,
1214 instr->value[i].u32, false);
1215 break;
1216 case 64:
1217 values[i] = LLVMConstInt(element_type,
1218 instr->value[i].u64, false);
1219 break;
1220 default:
1221 fprintf(stderr,
1222 "unsupported nir load_const bit_size: %d\n",
1223 instr->def.bit_size);
1224 abort();
1225 }
1226 }
1227 if (instr->def.num_components > 1) {
1228 value = LLVMConstVector(values, instr->def.num_components);
1229 } else
1230 value = values[0];
1231
1232 ctx->ssa_defs[instr->def.index] = value;
1233 }
1234
1235 static LLVMValueRef
1236 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1237 {
1238 LLVMValueRef size =
1239 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1240 LLVMConstInt(ctx->ac.i32, 2, false), "");
1241
1242 /* GFX8 only */
1243 if (ctx->ac.chip_class == GFX8 && in_elements) {
1244 /* On GFX8, the descriptor contains the size in bytes,
1245 * but TXQ must return the size in elements.
1246 * The stride is always non-zero for resources using TXQ.
1247 */
1248 LLVMValueRef stride =
1249 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1250 ctx->ac.i32_1, "");
1251 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1252 LLVMConstInt(ctx->ac.i32, 16, false), "");
1253 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1254 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1255
1256 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1257 }
1258 return size;
1259 }
1260
1261 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1262 * incorrectly forces nearest filtering if the texture format is integer.
1263 * The only effect it has on Gather4, which always returns 4 texels for
1264 * bilinear filtering, is that the final coordinates are off by 0.5 of
1265 * the texel size.
1266 *
1267 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1268 * or (0.5 / size) from the normalized coordinates.
1269 *
1270 * However, cube textures with 8_8_8_8 data formats require a different
1271 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1272 * precision in 32-bit data formats, so it needs to be applied dynamically at
1273 * runtime. In this case, return an i1 value that indicates whether the
1274 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1275 */
1276 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1277 nir_variable *var,
1278 struct ac_image_args *args,
1279 const nir_tex_instr *instr)
1280 {
1281 const struct glsl_type *type = glsl_without_array(var->type);
1282 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1283 LLVMValueRef wa_8888 = NULL;
1284 LLVMValueRef half_texel[2];
1285 LLVMValueRef result;
1286
1287 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1288
1289 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1290 LLVMValueRef formats;
1291 LLVMValueRef data_format;
1292 LLVMValueRef wa_formats;
1293
1294 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1295
1296 data_format = LLVMBuildLShr(ctx->builder, formats,
1297 LLVMConstInt(ctx->i32, 20, false), "");
1298 data_format = LLVMBuildAnd(ctx->builder, data_format,
1299 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1300 wa_8888 = LLVMBuildICmp(
1301 ctx->builder, LLVMIntEQ, data_format,
1302 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1303 "");
1304
1305 uint32_t wa_num_format =
1306 stype == GLSL_TYPE_UINT ?
1307 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1308 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1309 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1310 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1311 "");
1312 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1313 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1314
1315 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1316 args->resource = LLVMBuildInsertElement(
1317 ctx->builder, args->resource, formats, ctx->i32_1, "");
1318 }
1319
1320 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1321 assert(!wa_8888);
1322 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1323 } else {
1324 struct ac_image_args resinfo = {};
1325 LLVMBasicBlockRef bbs[2];
1326
1327 LLVMValueRef unnorm = NULL;
1328 LLVMValueRef default_offset = ctx->f32_0;
1329 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1330 !instr->is_array) {
1331 /* In vulkan, whether the sampler uses unnormalized
1332 * coordinates or not is a dynamic property of the
1333 * sampler. Hence, to figure out whether or not we
1334 * need to divide by the texture size, we need to test
1335 * the sampler at runtime. This tests the bit set by
1336 * radv_init_sampler().
1337 */
1338 LLVMValueRef sampler0 =
1339 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1340 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1341 LLVMConstInt(ctx->i32, 15, false), "");
1342 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1343 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1344 default_offset = LLVMConstReal(ctx->f32, -0.5);
1345 }
1346
1347 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1348 if (wa_8888 || unnorm) {
1349 assert(!(wa_8888 && unnorm));
1350 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1351 /* Skip the texture size query entirely if we don't need it. */
1352 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1353 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1354 }
1355
1356 /* Query the texture size. */
1357 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1358 resinfo.opcode = ac_image_get_resinfo;
1359 resinfo.dmask = 0xf;
1360 resinfo.lod = ctx->i32_0;
1361 resinfo.resource = args->resource;
1362 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1363 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1364
1365 /* Compute -0.5 / size. */
1366 for (unsigned c = 0; c < 2; c++) {
1367 half_texel[c] =
1368 LLVMBuildExtractElement(ctx->builder, size,
1369 LLVMConstInt(ctx->i32, c, 0), "");
1370 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1371 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1372 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1373 LLVMConstReal(ctx->f32, -0.5), "");
1374 }
1375
1376 if (wa_8888 || unnorm) {
1377 ac_build_endif(ctx, 2000);
1378
1379 for (unsigned c = 0; c < 2; c++) {
1380 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1381 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1382 values, bbs);
1383 }
1384 }
1385 }
1386
1387 for (unsigned c = 0; c < 2; c++) {
1388 LLVMValueRef tmp;
1389 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1390 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1391 }
1392
1393 args->attributes = AC_FUNC_ATTR_READNONE;
1394 result = ac_build_image_opcode(ctx, args);
1395
1396 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1397 LLVMValueRef tmp, tmp2;
1398
1399 /* if the cube workaround is in place, f2i the result. */
1400 for (unsigned c = 0; c < 4; c++) {
1401 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1402 if (stype == GLSL_TYPE_UINT)
1403 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1404 else
1405 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1406 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1407 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1408 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1409 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1410 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1411 }
1412 }
1413 return result;
1414 }
1415
1416 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1417 {
1418 nir_deref_instr *texture_deref_instr = NULL;
1419
1420 for (unsigned i = 0; i < instr->num_srcs; i++) {
1421 switch (instr->src[i].src_type) {
1422 case nir_tex_src_texture_deref:
1423 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1424 break;
1425 default:
1426 break;
1427 }
1428 }
1429 return texture_deref_instr;
1430 }
1431
1432 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1433 const nir_tex_instr *instr,
1434 struct ac_image_args *args)
1435 {
1436 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1437 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1438
1439 assert(instr->dest.is_ssa);
1440 return ac_build_buffer_load_format(&ctx->ac,
1441 args->resource,
1442 args->coords[0],
1443 ctx->ac.i32_0,
1444 util_last_bit(mask),
1445 0, true,
1446 instr->dest.ssa.bit_size == 16);
1447 }
1448
1449 args->opcode = ac_image_sample;
1450
1451 switch (instr->op) {
1452 case nir_texop_txf:
1453 case nir_texop_txf_ms:
1454 case nir_texop_samples_identical:
1455 args->opcode = args->level_zero ||
1456 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1457 ac_image_load : ac_image_load_mip;
1458 args->level_zero = false;
1459 break;
1460 case nir_texop_txs:
1461 case nir_texop_query_levels:
1462 args->opcode = ac_image_get_resinfo;
1463 if (!args->lod)
1464 args->lod = ctx->ac.i32_0;
1465 args->level_zero = false;
1466 break;
1467 case nir_texop_tex:
1468 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1469 assert(!args->lod);
1470 args->level_zero = true;
1471 }
1472 break;
1473 case nir_texop_tg4:
1474 args->opcode = ac_image_gather4;
1475 if (!args->lod && !args->bias)
1476 args->level_zero = true;
1477 break;
1478 case nir_texop_lod:
1479 args->opcode = ac_image_get_lod;
1480 break;
1481 case nir_texop_fragment_fetch:
1482 case nir_texop_fragment_mask_fetch:
1483 args->opcode = ac_image_load;
1484 args->level_zero = false;
1485 break;
1486 default:
1487 break;
1488 }
1489
1490 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1491 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1492 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1493 const struct glsl_type *type = glsl_without_array(var->type);
1494 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1495 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1496 return lower_gather4_integer(&ctx->ac, var, args, instr);
1497 }
1498 }
1499
1500 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1501 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1502 if ((args->dim == ac_image_2darray ||
1503 args->dim == ac_image_2d) && !args->coords[1]) {
1504 args->coords[1] = ctx->ac.i32_0;
1505 }
1506 }
1507
1508 args->attributes = AC_FUNC_ATTR_READNONE;
1509 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1510 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1511 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1512 /* Prevent texture instructions with implicit derivatives from being
1513 * sinked into branches. */
1514 switch (instr->op) {
1515 case nir_texop_tex:
1516 case nir_texop_txb:
1517 case nir_texop_lod:
1518 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1519 break;
1520 default:
1521 break;
1522 }
1523 }
1524
1525 return ac_build_image_opcode(&ctx->ac, args);
1526 }
1527
1528 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1529 nir_intrinsic_instr *instr)
1530 {
1531 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1532 LLVMValueRef index = get_src(ctx, instr->src[1]);
1533
1534 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1535 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1536 return result;
1537 }
1538
1539 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1540 nir_intrinsic_instr *instr)
1541 {
1542 LLVMValueRef ptr, addr;
1543 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1544 unsigned index = nir_intrinsic_base(instr);
1545
1546 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1547 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1548
1549 /* Load constant values from user SGPRS when possible, otherwise
1550 * fallback to the default path that loads directly from memory.
1551 */
1552 if (LLVMIsConstant(src0) &&
1553 instr->dest.ssa.bit_size == 32) {
1554 unsigned count = instr->dest.ssa.num_components;
1555 unsigned offset = index;
1556
1557 offset += LLVMConstIntGetZExtValue(src0);
1558 offset /= 4;
1559
1560 offset -= ctx->args->base_inline_push_consts;
1561
1562 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1563 if (offset + count <= num_inline_push_consts) {
1564 LLVMValueRef push_constants[num_inline_push_consts];
1565 for (unsigned i = 0; i < num_inline_push_consts; i++)
1566 push_constants[i] = ac_get_arg(&ctx->ac,
1567 ctx->args->inline_push_consts[i]);
1568 return ac_build_gather_values(&ctx->ac,
1569 push_constants + offset,
1570 count);
1571 }
1572 }
1573
1574 ptr = LLVMBuildGEP(ctx->ac.builder,
1575 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1576
1577 if (instr->dest.ssa.bit_size == 8) {
1578 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1579 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1580 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1581 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1582
1583 LLVMValueRef params[3];
1584 if (load_dwords > 1) {
1585 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1586 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1587 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1588 } else {
1589 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1590 params[0] = ctx->ac.i32_0;
1591 params[1] = res;
1592 }
1593 params[2] = addr;
1594 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1595
1596 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1597 if (instr->dest.ssa.num_components > 1)
1598 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1599 return res;
1600 } else if (instr->dest.ssa.bit_size == 16) {
1601 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1602 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1603 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1604 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1605 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1606 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1607 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1608 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1609 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1610 LLVMConstInt(ctx->ac.i32, 4, false)};
1611 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1612 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1613 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1614 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1615 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1616 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1617 }
1618
1619 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1620
1621 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1622 }
1623
1624 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1625 const nir_intrinsic_instr *instr)
1626 {
1627 LLVMValueRef index = get_src(ctx, instr->src[0]);
1628
1629 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1630 }
1631
1632 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1633 {
1634 uint32_t new_mask = 0;
1635 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1636 if (mask & (1u << i))
1637 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1638 return new_mask;
1639 }
1640
1641 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1642 unsigned start, unsigned count)
1643 {
1644 LLVMValueRef mask[] = {
1645 ctx->i32_0, ctx->i32_1,
1646 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1647
1648 unsigned src_elements = ac_get_llvm_num_components(src);
1649
1650 if (count == src_elements) {
1651 assert(start == 0);
1652 return src;
1653 } else if (count == 1) {
1654 assert(start < src_elements);
1655 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1656 } else {
1657 assert(start + count <= src_elements);
1658 assert(count <= 4);
1659 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1660 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1661 }
1662 }
1663
1664 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1665 enum gl_access_qualifier access,
1666 bool may_store_unaligned,
1667 bool writeonly_memory)
1668 {
1669 unsigned cache_policy = 0;
1670
1671 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1672 * store opcodes not aligned to a dword are affected. The only way to
1673 * get unaligned stores is through shader images.
1674 */
1675 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1676 /* If this is write-only, don't keep data in L1 to prevent
1677 * evicting L1 cache lines that may be needed by other
1678 * instructions.
1679 */
1680 writeonly_memory ||
1681 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1682 cache_policy |= ac_glc;
1683 }
1684
1685 if (access & ACCESS_STREAM_CACHE_POLICY)
1686 cache_policy |= ac_slc | ac_glc;
1687
1688 return cache_policy;
1689 }
1690
1691 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1692 struct waterfall_context *wctx,
1693 const nir_intrinsic_instr *instr,
1694 nir_src src)
1695 {
1696 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1697 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1698 }
1699
1700 static void visit_store_ssbo(struct ac_nir_context *ctx,
1701 nir_intrinsic_instr *instr)
1702 {
1703 if (ctx->ac.postponed_kill) {
1704 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1705 ctx->ac.postponed_kill, "");
1706 ac_build_ifcc(&ctx->ac, cond, 7000);
1707 }
1708
1709 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1710 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1711 unsigned writemask = nir_intrinsic_write_mask(instr);
1712 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1713 bool writeonly_memory = access & ACCESS_NON_READABLE;
1714 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1715
1716 struct waterfall_context wctx;
1717 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1718
1719 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1720 LLVMValueRef base_data = src_data;
1721 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1722 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1723
1724 while (writemask) {
1725 int start, count;
1726 LLVMValueRef data, offset;
1727 LLVMTypeRef data_type;
1728
1729 u_bit_scan_consecutive_range(&writemask, &start, &count);
1730
1731 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1732 * writes into a 2-element and a 1-element write. */
1733 if (count == 3 &&
1734 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1735 writemask |= 1 << (start + 2);
1736 count = 2;
1737 }
1738 int num_bytes = count * elem_size_bytes; /* count in bytes */
1739
1740 /* we can only store 4 DWords at the same time.
1741 * can only happen for 64 Bit vectors. */
1742 if (num_bytes > 16) {
1743 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1744 count = 2;
1745 num_bytes = 16;
1746 }
1747
1748 /* check alignment of 16 Bit stores */
1749 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1750 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1751 count = 1;
1752 num_bytes = 2;
1753 }
1754
1755 /* Due to alignment issues, split stores of 8-bit/16-bit
1756 * vectors.
1757 */
1758 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1759 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1760 count = 1;
1761 num_bytes = elem_size_bytes;
1762 }
1763
1764 data = extract_vector_range(&ctx->ac, base_data, start, count);
1765
1766 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1767 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1768
1769 if (num_bytes == 1) {
1770 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1771 offset, ctx->ac.i32_0,
1772 cache_policy);
1773 } else if (num_bytes == 2) {
1774 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1775 offset, ctx->ac.i32_0,
1776 cache_policy);
1777 } else {
1778 int num_channels = num_bytes / 4;
1779
1780 switch (num_bytes) {
1781 case 16: /* v4f32 */
1782 data_type = ctx->ac.v4f32;
1783 break;
1784 case 12: /* v3f32 */
1785 data_type = ctx->ac.v3f32;
1786 break;
1787 case 8: /* v2f32 */
1788 data_type = ctx->ac.v2f32;
1789 break;
1790 case 4: /* f32 */
1791 data_type = ctx->ac.f32;
1792 break;
1793 default:
1794 unreachable("Malformed vector store.");
1795 }
1796 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1797
1798 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1799 num_channels, offset,
1800 ctx->ac.i32_0, 0,
1801 cache_policy);
1802 }
1803 }
1804
1805 exit_waterfall(ctx, &wctx, NULL);
1806
1807 if (ctx->ac.postponed_kill)
1808 ac_build_endif(&ctx->ac, 7000);
1809 }
1810
1811 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1812 LLVMValueRef descriptor,
1813 LLVMValueRef offset,
1814 LLVMValueRef compare,
1815 LLVMValueRef exchange)
1816 {
1817 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1818 if (ctx->abi->robust_buffer_access) {
1819 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1820
1821 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1822 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1823
1824 ac_build_ifcc(&ctx->ac, cond, -1);
1825
1826 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1827 }
1828
1829 LLVMValueRef ptr_parts[2] = {
1830 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1831 LLVMBuildAnd(ctx->ac.builder,
1832 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1833 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1834 };
1835
1836 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1837 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1838
1839 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1840
1841 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1842 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1843 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1844 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1845
1846 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1847 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1848
1849 if (ctx->abi->robust_buffer_access) {
1850 ac_build_endif(&ctx->ac, -1);
1851
1852 LLVMBasicBlockRef incoming_blocks[2] = {
1853 start_block,
1854 then_block,
1855 };
1856
1857 LLVMValueRef incoming_values[2] = {
1858 LLVMConstInt(ctx->ac.i64, 0, 0),
1859 result,
1860 };
1861 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1862 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1863 return ret;
1864 } else {
1865 return result;
1866 }
1867 }
1868
1869 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1870 nir_intrinsic_instr *instr)
1871 {
1872 if (ctx->ac.postponed_kill) {
1873 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1874 ctx->ac.postponed_kill, "");
1875 ac_build_ifcc(&ctx->ac, cond, 7001);
1876 }
1877
1878 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1879 const char *op;
1880 char name[64], type[8];
1881 LLVMValueRef params[6], descriptor;
1882 LLVMValueRef result;
1883 int arg_count = 0;
1884
1885 struct waterfall_context wctx;
1886 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1887
1888 switch (instr->intrinsic) {
1889 case nir_intrinsic_ssbo_atomic_add:
1890 op = "add";
1891 break;
1892 case nir_intrinsic_ssbo_atomic_imin:
1893 op = "smin";
1894 break;
1895 case nir_intrinsic_ssbo_atomic_umin:
1896 op = "umin";
1897 break;
1898 case nir_intrinsic_ssbo_atomic_imax:
1899 op = "smax";
1900 break;
1901 case nir_intrinsic_ssbo_atomic_umax:
1902 op = "umax";
1903 break;
1904 case nir_intrinsic_ssbo_atomic_and:
1905 op = "and";
1906 break;
1907 case nir_intrinsic_ssbo_atomic_or:
1908 op = "or";
1909 break;
1910 case nir_intrinsic_ssbo_atomic_xor:
1911 op = "xor";
1912 break;
1913 case nir_intrinsic_ssbo_atomic_exchange:
1914 op = "swap";
1915 break;
1916 case nir_intrinsic_ssbo_atomic_comp_swap:
1917 op = "cmpswap";
1918 break;
1919 default:
1920 abort();
1921 }
1922
1923 descriptor = ctx->abi->load_ssbo(ctx->abi,
1924 rsrc_base,
1925 true);
1926
1927 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1928 return_type == ctx->ac.i64) {
1929 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1930 get_src(ctx, instr->src[1]),
1931 get_src(ctx, instr->src[2]),
1932 get_src(ctx, instr->src[3]));
1933 } else {
1934 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1935 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1936 }
1937 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1938 params[arg_count++] = descriptor;
1939
1940 if (LLVM_VERSION_MAJOR >= 9) {
1941 /* XXX: The new raw/struct atomic intrinsics are buggy with
1942 * LLVM 8, see r358579.
1943 */
1944 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1945 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1946 params[arg_count++] = ctx->ac.i32_0; /* slc */
1947
1948 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1949 snprintf(name, sizeof(name),
1950 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1951 } else {
1952 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1953 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1954 params[arg_count++] = ctx->ac.i1false; /* slc */
1955
1956 assert(return_type == ctx->ac.i32);
1957 snprintf(name, sizeof(name),
1958 "llvm.amdgcn.buffer.atomic.%s", op);
1959 }
1960
1961 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1962 arg_count, 0);
1963 }
1964
1965 result = exit_waterfall(ctx, &wctx, result);
1966 if (ctx->ac.postponed_kill)
1967 ac_build_endif(&ctx->ac, 7001);
1968 return result;
1969 }
1970
1971 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1972 nir_intrinsic_instr *instr)
1973 {
1974 struct waterfall_context wctx;
1975 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1976
1977 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1978 int num_components = instr->num_components;
1979 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1980 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1981
1982 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1983 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1984 LLVMValueRef vindex = ctx->ac.i32_0;
1985
1986 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1987 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1988
1989 LLVMValueRef results[4];
1990 for (int i = 0; i < num_components;) {
1991 int num_elems = num_components - i;
1992 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1993 num_elems = 1;
1994 if (num_elems * elem_size_bytes > 16)
1995 num_elems = 16 / elem_size_bytes;
1996 int load_bytes = num_elems * elem_size_bytes;
1997
1998 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1999
2000 LLVMValueRef ret;
2001
2002 if (load_bytes == 1) {
2003 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2004 rsrc,
2005 offset,
2006 ctx->ac.i32_0,
2007 immoffset,
2008 cache_policy);
2009 } else if (load_bytes == 2) {
2010 ret = ac_build_tbuffer_load_short(&ctx->ac,
2011 rsrc,
2012 offset,
2013 ctx->ac.i32_0,
2014 immoffset,
2015 cache_policy);
2016 } else {
2017 int num_channels = util_next_power_of_two(load_bytes) / 4;
2018 bool can_speculate = access & ACCESS_CAN_REORDER;
2019
2020 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2021 vindex, offset, immoffset, 0,
2022 cache_policy, can_speculate, false);
2023 }
2024
2025 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2026 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2027 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2028
2029 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2030 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2031
2032 for (unsigned j = 0; j < num_elems; j++) {
2033 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2034 }
2035 i += num_elems;
2036 }
2037
2038 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2039 return exit_waterfall(ctx, &wctx, ret);
2040 }
2041
2042 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2043 struct waterfall_context *wctx,
2044 const nir_intrinsic_instr *instr)
2045 {
2046 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2047 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2048 }
2049
2050 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2051 nir_intrinsic_instr *instr)
2052 {
2053 struct waterfall_context wctx;
2054 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2055
2056 LLVMValueRef ret;
2057 LLVMValueRef rsrc = rsrc_base;
2058 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2059 int num_components = instr->num_components;
2060
2061 if (ctx->abi->load_ubo)
2062 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2063
2064 if (instr->dest.ssa.bit_size == 64)
2065 num_components *= 2;
2066
2067 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2068 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2069 LLVMValueRef results[num_components];
2070 for (unsigned i = 0; i < num_components; ++i) {
2071 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2072 load_bytes * i, 0);
2073
2074 if (load_bytes == 1) {
2075 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2076 rsrc,
2077 offset,
2078 ctx->ac.i32_0,
2079 immoffset,
2080 0);
2081 } else {
2082 assert(load_bytes == 2);
2083 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2084 rsrc,
2085 offset,
2086 ctx->ac.i32_0,
2087 immoffset,
2088 0);
2089 }
2090 }
2091 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2092 } else {
2093 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2094 NULL, 0, 0, true, true);
2095
2096 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2097 }
2098
2099 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2100 get_def_type(ctx, &instr->dest.ssa), "");
2101
2102 return exit_waterfall(ctx, &wctx, ret);
2103 }
2104
2105 static void
2106 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2107 bool vs_in, unsigned *vertex_index_out,
2108 LLVMValueRef *vertex_index_ref,
2109 unsigned *const_out, LLVMValueRef *indir_out)
2110 {
2111 nir_variable *var = nir_deref_instr_get_variable(instr);
2112 nir_deref_path path;
2113 unsigned idx_lvl = 1;
2114
2115 nir_deref_path_init(&path, instr, NULL);
2116
2117 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2118 if (vertex_index_ref) {
2119 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2120 if (vertex_index_out)
2121 *vertex_index_out = 0;
2122 } else {
2123 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2124 }
2125 ++idx_lvl;
2126 }
2127
2128 uint32_t const_offset = 0;
2129 LLVMValueRef offset = NULL;
2130
2131 if (var->data.compact) {
2132 assert(instr->deref_type == nir_deref_type_array);
2133 const_offset = nir_src_as_uint(instr->arr.index);
2134 goto out;
2135 }
2136
2137 for (; path.path[idx_lvl]; ++idx_lvl) {
2138 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2139 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2140 unsigned index = path.path[idx_lvl]->strct.index;
2141
2142 for (unsigned i = 0; i < index; i++) {
2143 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2144 const_offset += glsl_count_attribute_slots(ft, vs_in);
2145 }
2146 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2147 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2148 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2149 const_offset += size *
2150 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2151 } else {
2152 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2153 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2154 if (offset)
2155 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2156 else
2157 offset = array_off;
2158 }
2159 } else
2160 unreachable("Uhandled deref type in get_deref_instr_offset");
2161 }
2162
2163 out:
2164 nir_deref_path_finish(&path);
2165
2166 if (const_offset && offset)
2167 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2168 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2169 "");
2170
2171 *const_out = const_offset;
2172 *indir_out = offset;
2173 }
2174
2175 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2176 nir_intrinsic_instr *instr,
2177 bool load_inputs)
2178 {
2179 LLVMValueRef result;
2180 LLVMValueRef vertex_index = NULL;
2181 LLVMValueRef indir_index = NULL;
2182 unsigned const_index = 0;
2183
2184 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2185
2186 unsigned location = var->data.location;
2187 unsigned driver_location = var->data.driver_location;
2188 const bool is_patch = var->data.patch ||
2189 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2190 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2191 const bool is_compact = var->data.compact;
2192
2193 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2194 false, NULL, is_patch ? NULL : &vertex_index,
2195 &const_index, &indir_index);
2196
2197 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2198
2199 LLVMTypeRef src_component_type;
2200 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2201 src_component_type = LLVMGetElementType(dest_type);
2202 else
2203 src_component_type = dest_type;
2204
2205 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2206 vertex_index, indir_index,
2207 const_index, location, driver_location,
2208 var->data.location_frac,
2209 instr->num_components,
2210 is_patch, is_compact, load_inputs);
2211 if (instr->dest.ssa.bit_size == 16) {
2212 result = ac_to_integer(&ctx->ac, result);
2213 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2214 }
2215 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2216 }
2217
2218 static unsigned
2219 type_scalar_size_bytes(const struct glsl_type *type)
2220 {
2221 assert(glsl_type_is_vector_or_scalar(type) ||
2222 glsl_type_is_matrix(type));
2223 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2224 }
2225
2226 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2227 nir_intrinsic_instr *instr)
2228 {
2229 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2230 nir_variable *var = nir_deref_instr_get_variable(deref);
2231
2232 LLVMValueRef values[8];
2233 int idx = 0;
2234 int ve = instr->dest.ssa.num_components;
2235 unsigned comp = 0;
2236 LLVMValueRef indir_index;
2237 LLVMValueRef ret;
2238 unsigned const_index;
2239 unsigned stride = 4;
2240 int mode = deref->mode;
2241
2242 if (var) {
2243 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2244 var->data.mode == nir_var_shader_in;
2245 idx = var->data.driver_location;
2246 comp = var->data.location_frac;
2247 mode = var->data.mode;
2248
2249 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2250 &const_index, &indir_index);
2251
2252 if (var->data.compact) {
2253 stride = 1;
2254 const_index += comp;
2255 comp = 0;
2256 }
2257 }
2258
2259 if (instr->dest.ssa.bit_size == 64 &&
2260 (deref->mode == nir_var_shader_in ||
2261 deref->mode == nir_var_shader_out ||
2262 deref->mode == nir_var_function_temp))
2263 ve *= 2;
2264
2265 switch (mode) {
2266 case nir_var_shader_in:
2267 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2268 ctx->stage == MESA_SHADER_TESS_EVAL) {
2269 return load_tess_varyings(ctx, instr, true);
2270 }
2271
2272 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2273 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2274 LLVMValueRef indir_index;
2275 unsigned const_index, vertex_index;
2276 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2277 &const_index, &indir_index);
2278 assert(indir_index == NULL);
2279
2280 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2281 var->data.driver_location,
2282 var->data.location_frac,
2283 instr->num_components, vertex_index, const_index, type);
2284 }
2285
2286 for (unsigned chan = comp; chan < ve + comp; chan++) {
2287 if (indir_index) {
2288 unsigned count = glsl_count_attribute_slots(
2289 var->type,
2290 ctx->stage == MESA_SHADER_VERTEX);
2291 count -= chan / 4;
2292 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2293 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2294 stride, false, true);
2295
2296 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2297 tmp_vec,
2298 indir_index, "");
2299 } else
2300 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2301 }
2302 break;
2303 case nir_var_function_temp:
2304 for (unsigned chan = 0; chan < ve; chan++) {
2305 if (indir_index) {
2306 unsigned count = glsl_count_attribute_slots(
2307 var->type, false);
2308 count -= chan / 4;
2309 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2310 &ctx->ac, ctx->locals + idx + chan, count,
2311 stride, true, true);
2312
2313 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2314 tmp_vec,
2315 indir_index, "");
2316 } else {
2317 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2318 }
2319 }
2320 break;
2321 case nir_var_shader_out:
2322 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2323 return load_tess_varyings(ctx, instr, false);
2324 }
2325
2326 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2327 var->data.fb_fetch_output &&
2328 ctx->abi->emit_fbfetch)
2329 return ctx->abi->emit_fbfetch(ctx->abi);
2330
2331 for (unsigned chan = comp; chan < ve + comp; chan++) {
2332 if (indir_index) {
2333 unsigned count = glsl_count_attribute_slots(
2334 var->type, false);
2335 count -= chan / 4;
2336 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2337 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2338 stride, true, true);
2339
2340 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2341 tmp_vec,
2342 indir_index, "");
2343 } else {
2344 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2345 ctx->abi->outputs[idx + chan + const_index * stride],
2346 "");
2347 }
2348 }
2349 break;
2350 case nir_var_mem_global: {
2351 LLVMValueRef address = get_src(ctx, instr->src[0]);
2352 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2353 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2354 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2355 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2356 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2357 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2358
2359 if (stride != natural_stride || split_loads) {
2360 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2361 result_type = LLVMGetElementType(result_type);
2362
2363 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2364 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2365 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2366
2367 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2368 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2369 values[i] = LLVMBuildLoad(ctx->ac.builder,
2370 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2371 }
2372 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2373 } else {
2374 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2375 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2376 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2377 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2378 return val;
2379 }
2380 }
2381 default:
2382 unreachable("unhandle variable mode");
2383 }
2384 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2385 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2386 }
2387
2388 static void
2389 visit_store_var(struct ac_nir_context *ctx,
2390 nir_intrinsic_instr *instr)
2391 {
2392 if (ctx->ac.postponed_kill) {
2393 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2394 ctx->ac.postponed_kill, "");
2395 ac_build_ifcc(&ctx->ac, cond, 7002);
2396 }
2397
2398 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2399 nir_variable *var = nir_deref_instr_get_variable(deref);
2400
2401 LLVMValueRef temp_ptr, value;
2402 int idx = 0;
2403 unsigned comp = 0;
2404 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2405 int writemask = instr->const_index[0];
2406 LLVMValueRef indir_index;
2407 unsigned const_index;
2408
2409 if (var) {
2410 get_deref_offset(ctx, deref, false,
2411 NULL, NULL, &const_index, &indir_index);
2412 idx = var->data.driver_location;
2413 comp = var->data.location_frac;
2414
2415 if (var->data.compact) {
2416 const_index += comp;
2417 comp = 0;
2418 }
2419 }
2420
2421 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2422 (deref->mode == nir_var_shader_out ||
2423 deref->mode == nir_var_function_temp)) {
2424
2425 src = LLVMBuildBitCast(ctx->ac.builder, src,
2426 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2427 "");
2428
2429 writemask = widen_mask(writemask, 2);
2430 }
2431
2432 writemask = writemask << comp;
2433
2434 switch (deref->mode) {
2435 case nir_var_shader_out:
2436
2437 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2438 LLVMValueRef vertex_index = NULL;
2439 LLVMValueRef indir_index = NULL;
2440 unsigned const_index = 0;
2441 const bool is_patch = var->data.patch ||
2442 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2443 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2444
2445 get_deref_offset(ctx, deref, false, NULL,
2446 is_patch ? NULL : &vertex_index,
2447 &const_index, &indir_index);
2448
2449 ctx->abi->store_tcs_outputs(ctx->abi, var,
2450 vertex_index, indir_index,
2451 const_index, src, writemask);
2452 break;
2453 }
2454
2455 for (unsigned chan = 0; chan < 8; chan++) {
2456 int stride = 4;
2457 if (!(writemask & (1 << chan)))
2458 continue;
2459
2460 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2461
2462 if (var->data.compact)
2463 stride = 1;
2464 if (indir_index) {
2465 unsigned count = glsl_count_attribute_slots(
2466 var->type, false);
2467 count -= chan / 4;
2468 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2469 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2470 stride, true, true);
2471
2472 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2473 value, indir_index, "");
2474 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2475 count, stride, tmp_vec);
2476
2477 } else {
2478 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2479
2480 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2481 }
2482 }
2483 break;
2484 case nir_var_function_temp:
2485 for (unsigned chan = 0; chan < 8; chan++) {
2486 if (!(writemask & (1 << chan)))
2487 continue;
2488
2489 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2490 if (indir_index) {
2491 unsigned count = glsl_count_attribute_slots(
2492 var->type, false);
2493 count -= chan / 4;
2494 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2495 &ctx->ac, ctx->locals + idx + chan, count,
2496 4, true, true);
2497
2498 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2499 value, indir_index, "");
2500 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2501 count, 4, tmp_vec);
2502 } else {
2503 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2504
2505 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2506 }
2507 }
2508 break;
2509
2510 case nir_var_mem_global: {
2511 int writemask = instr->const_index[0];
2512 LLVMValueRef address = get_src(ctx, instr->src[0]);
2513 LLVMValueRef val = get_src(ctx, instr->src[1]);
2514
2515 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2516 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2517 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2518 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2519 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2520
2521 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2522 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2523 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2524
2525 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2526 stride == natural_stride && !split_stores) {
2527 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2528 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2529 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2530
2531 val = LLVMBuildBitCast(ctx->ac.builder, val,
2532 LLVMGetElementType(LLVMTypeOf(address)), "");
2533 LLVMBuildStore(ctx->ac.builder, val, address);
2534 } else {
2535 LLVMTypeRef val_type = LLVMTypeOf(val);
2536 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2537 val_type = LLVMGetElementType(val_type);
2538
2539 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2540 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2541 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2542 for (unsigned chan = 0; chan < 4; chan++) {
2543 if (!(writemask & (1 << chan)))
2544 continue;
2545
2546 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2547
2548 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2549 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2550 chan);
2551 src = LLVMBuildBitCast(ctx->ac.builder, src,
2552 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2553 LLVMBuildStore(ctx->ac.builder, src, ptr);
2554 }
2555 }
2556 break;
2557 }
2558 default:
2559 abort();
2560 break;
2561 }
2562
2563 if (ctx->ac.postponed_kill)
2564 ac_build_endif(&ctx->ac, 7002);
2565 }
2566
2567 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2568 {
2569 switch (dim) {
2570 case GLSL_SAMPLER_DIM_BUF:
2571 return 1;
2572 case GLSL_SAMPLER_DIM_1D:
2573 return array ? 2 : 1;
2574 case GLSL_SAMPLER_DIM_2D:
2575 return array ? 3 : 2;
2576 case GLSL_SAMPLER_DIM_MS:
2577 return array ? 4 : 3;
2578 case GLSL_SAMPLER_DIM_3D:
2579 case GLSL_SAMPLER_DIM_CUBE:
2580 return 3;
2581 case GLSL_SAMPLER_DIM_RECT:
2582 case GLSL_SAMPLER_DIM_SUBPASS:
2583 return 2;
2584 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2585 return 3;
2586 default:
2587 break;
2588 }
2589 return 0;
2590 }
2591
2592 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2593 LLVMValueRef coord_x, LLVMValueRef coord_y,
2594 LLVMValueRef coord_z,
2595 LLVMValueRef sample_index,
2596 LLVMValueRef fmask_desc_ptr)
2597 {
2598 unsigned sample_chan = coord_z ? 3 : 2;
2599 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2600 addr[sample_chan] = sample_index;
2601
2602 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2603 return addr[sample_chan];
2604 }
2605
2606 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2607 {
2608 assert(instr->src[0].is_ssa);
2609 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2610 }
2611
2612 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2613 const nir_intrinsic_instr *instr,
2614 LLVMValueRef dynamic_index,
2615 enum ac_descriptor_type desc_type,
2616 bool write)
2617 {
2618 nir_deref_instr *deref_instr =
2619 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2620 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2621
2622 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2623 }
2624
2625 static void get_image_coords(struct ac_nir_context *ctx,
2626 const nir_intrinsic_instr *instr,
2627 LLVMValueRef dynamic_desc_index,
2628 struct ac_image_args *args,
2629 enum glsl_sampler_dim dim,
2630 bool is_array)
2631 {
2632 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2633 LLVMValueRef masks[] = {
2634 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2635 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2636 };
2637 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2638
2639 int count;
2640 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2641 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2642 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2643 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2644 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2645 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2646 count = image_type_to_components_count(dim, is_array);
2647
2648 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2649 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2650 LLVMValueRef fmask_load_address[3];
2651
2652 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2653 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2654 if (is_array)
2655 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2656 else
2657 fmask_load_address[2] = NULL;
2658
2659 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2660 fmask_load_address[0],
2661 fmask_load_address[1],
2662 fmask_load_address[2],
2663 sample_index,
2664 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2665 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2666 }
2667 if (count == 1 && !gfx9_1d) {
2668 if (instr->src[1].ssa->num_components)
2669 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2670 else
2671 args->coords[0] = src0;
2672 } else {
2673 int chan;
2674 if (is_ms)
2675 count--;
2676 for (chan = 0; chan < count; ++chan) {
2677 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2678 }
2679
2680 if (gfx9_1d) {
2681 if (is_array) {
2682 args->coords[2] = args->coords[1];
2683 args->coords[1] = ctx->ac.i32_0;
2684 } else
2685 args->coords[1] = ctx->ac.i32_0;
2686 count++;
2687 }
2688 if (ctx->ac.chip_class == GFX9 &&
2689 dim == GLSL_SAMPLER_DIM_2D &&
2690 !is_array) {
2691 /* The hw can't bind a slice of a 3D image as a 2D
2692 * image, because it ignores BASE_ARRAY if the target
2693 * is 3D. The workaround is to read BASE_ARRAY and set
2694 * it as the 3rd address operand for all 2D images.
2695 */
2696 LLVMValueRef first_layer, const5, mask;
2697
2698 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2699 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2700 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2701 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2702
2703 args->coords[count] = first_layer;
2704 count++;
2705 }
2706
2707
2708 if (is_ms) {
2709 args->coords[count] = sample_index;
2710 count++;
2711 }
2712 }
2713 }
2714
2715 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2716 const nir_intrinsic_instr *instr,
2717 LLVMValueRef dynamic_index,
2718 bool write, bool atomic)
2719 {
2720 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2721 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2722 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2723 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2724 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2725
2726 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2727 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2728 elem_count, stride, "");
2729
2730 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2731 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2732 }
2733 return rsrc;
2734 }
2735
2736 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2737 struct waterfall_context *wctx,
2738 const nir_intrinsic_instr *instr)
2739 {
2740 nir_deref_instr *deref_instr = NULL;
2741
2742 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2743 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2744
2745 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2746 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2747 }
2748
2749 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2750 const nir_intrinsic_instr *instr,
2751 bool bindless)
2752 {
2753 LLVMValueRef res;
2754
2755 enum glsl_sampler_dim dim;
2756 enum gl_access_qualifier access;
2757 bool is_array;
2758 if (bindless) {
2759 dim = nir_intrinsic_image_dim(instr);
2760 access = nir_intrinsic_access(instr);
2761 is_array = nir_intrinsic_image_array(instr);
2762 } else {
2763 const nir_deref_instr *image_deref = get_image_deref(instr);
2764 const struct glsl_type *type = image_deref->type;
2765 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2766 dim = glsl_get_sampler_dim(type);
2767 access = var->data.access;
2768 is_array = glsl_sampler_type_is_array(type);
2769 }
2770
2771 struct waterfall_context wctx;
2772 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2773
2774 struct ac_image_args args = {};
2775
2776 args.cache_policy = get_cache_policy(ctx, access, false, false);
2777
2778 if (dim == GLSL_SAMPLER_DIM_BUF) {
2779 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2780 unsigned num_channels = util_last_bit(mask);
2781 LLVMValueRef rsrc, vindex;
2782
2783 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2784 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2785 ctx->ac.i32_0, "");
2786
2787 assert(instr->dest.is_ssa);
2788 bool can_speculate = access & ACCESS_CAN_REORDER;
2789 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2790 ctx->ac.i32_0, num_channels,
2791 args.cache_policy,
2792 can_speculate,
2793 instr->dest.ssa.bit_size == 16);
2794 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2795
2796 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2797 res = ac_to_integer(&ctx->ac, res);
2798 } else {
2799 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2800
2801 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2802 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2803 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2804 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2805 if (!level_zero)
2806 args.lod = get_src(ctx, instr->src[3]);
2807 args.dmask = 15;
2808 args.attributes = AC_FUNC_ATTR_READONLY;
2809
2810 assert(instr->dest.is_ssa);
2811 args.d16 = instr->dest.ssa.bit_size == 16;
2812
2813 res = ac_build_image_opcode(&ctx->ac, &args);
2814 }
2815 return exit_waterfall(ctx, &wctx, res);
2816 }
2817
2818 static void visit_image_store(struct ac_nir_context *ctx,
2819 const nir_intrinsic_instr *instr,
2820 bool bindless)
2821 {
2822 if (ctx->ac.postponed_kill) {
2823 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2824 ctx->ac.postponed_kill, "");
2825 ac_build_ifcc(&ctx->ac, cond, 7003);
2826 }
2827
2828 enum glsl_sampler_dim dim;
2829 enum gl_access_qualifier access;
2830 bool is_array;
2831
2832 if (bindless) {
2833 dim = nir_intrinsic_image_dim(instr);
2834 access = nir_intrinsic_access(instr);
2835 is_array = nir_intrinsic_image_array(instr);
2836 } else {
2837 const nir_deref_instr *image_deref = get_image_deref(instr);
2838 const struct glsl_type *type = image_deref->type;
2839 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2840 dim = glsl_get_sampler_dim(type);
2841 access = var->data.access;
2842 is_array = glsl_sampler_type_is_array(type);
2843 }
2844
2845 struct waterfall_context wctx;
2846 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2847
2848 bool writeonly_memory = access & ACCESS_NON_READABLE;
2849 struct ac_image_args args = {};
2850
2851 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2852
2853 if (dim == GLSL_SAMPLER_DIM_BUF) {
2854 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2855 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2856 unsigned src_channels = ac_get_llvm_num_components(src);
2857 LLVMValueRef vindex;
2858
2859 if (src_channels == 3)
2860 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2861
2862 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2863 get_src(ctx, instr->src[1]),
2864 ctx->ac.i32_0, "");
2865
2866 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2867 ctx->ac.i32_0, args.cache_policy);
2868 } else {
2869 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2870
2871 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2872 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2873 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2874 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2875 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2876 if (!level_zero)
2877 args.lod = get_src(ctx, instr->src[4]);
2878 args.dmask = 15;
2879 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2880
2881 ac_build_image_opcode(&ctx->ac, &args);
2882 }
2883
2884 exit_waterfall(ctx, &wctx, NULL);
2885 if (ctx->ac.postponed_kill)
2886 ac_build_endif(&ctx->ac, 7003);
2887 }
2888
2889 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2890 const nir_intrinsic_instr *instr,
2891 bool bindless)
2892 {
2893 if (ctx->ac.postponed_kill) {
2894 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2895 ctx->ac.postponed_kill, "");
2896 ac_build_ifcc(&ctx->ac, cond, 7004);
2897 }
2898
2899 LLVMValueRef params[7];
2900 int param_count = 0;
2901
2902 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2903 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2904 const char *atomic_name;
2905 char intrinsic_name[64];
2906 enum ac_atomic_op atomic_subop;
2907 ASSERTED int length;
2908
2909 enum glsl_sampler_dim dim;
2910 bool is_array;
2911 if (bindless) {
2912 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2913 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2914 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2915 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2916 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2917 assert(format == GL_R32UI || format == GL_R32I);
2918 }
2919 dim = nir_intrinsic_image_dim(instr);
2920 is_array = nir_intrinsic_image_array(instr);
2921 } else {
2922 const struct glsl_type *type = get_image_deref(instr)->type;
2923 dim = glsl_get_sampler_dim(type);
2924 is_array = glsl_sampler_type_is_array(type);
2925 }
2926
2927 struct waterfall_context wctx;
2928 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2929
2930 switch (instr->intrinsic) {
2931 case nir_intrinsic_bindless_image_atomic_add:
2932 case nir_intrinsic_image_deref_atomic_add:
2933 atomic_name = "add";
2934 atomic_subop = ac_atomic_add;
2935 break;
2936 case nir_intrinsic_bindless_image_atomic_imin:
2937 case nir_intrinsic_image_deref_atomic_imin:
2938 atomic_name = "smin";
2939 atomic_subop = ac_atomic_smin;
2940 break;
2941 case nir_intrinsic_bindless_image_atomic_umin:
2942 case nir_intrinsic_image_deref_atomic_umin:
2943 atomic_name = "umin";
2944 atomic_subop = ac_atomic_umin;
2945 break;
2946 case nir_intrinsic_bindless_image_atomic_imax:
2947 case nir_intrinsic_image_deref_atomic_imax:
2948 atomic_name = "smax";
2949 atomic_subop = ac_atomic_smax;
2950 break;
2951 case nir_intrinsic_bindless_image_atomic_umax:
2952 case nir_intrinsic_image_deref_atomic_umax:
2953 atomic_name = "umax";
2954 atomic_subop = ac_atomic_umax;
2955 break;
2956 case nir_intrinsic_bindless_image_atomic_and:
2957 case nir_intrinsic_image_deref_atomic_and:
2958 atomic_name = "and";
2959 atomic_subop = ac_atomic_and;
2960 break;
2961 case nir_intrinsic_bindless_image_atomic_or:
2962 case nir_intrinsic_image_deref_atomic_or:
2963 atomic_name = "or";
2964 atomic_subop = ac_atomic_or;
2965 break;
2966 case nir_intrinsic_bindless_image_atomic_xor:
2967 case nir_intrinsic_image_deref_atomic_xor:
2968 atomic_name = "xor";
2969 atomic_subop = ac_atomic_xor;
2970 break;
2971 case nir_intrinsic_bindless_image_atomic_exchange:
2972 case nir_intrinsic_image_deref_atomic_exchange:
2973 atomic_name = "swap";
2974 atomic_subop = ac_atomic_swap;
2975 break;
2976 case nir_intrinsic_bindless_image_atomic_comp_swap:
2977 case nir_intrinsic_image_deref_atomic_comp_swap:
2978 atomic_name = "cmpswap";
2979 atomic_subop = 0; /* not used */
2980 break;
2981 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2982 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2983 atomic_name = "inc";
2984 atomic_subop = ac_atomic_inc_wrap;
2985 /* ATOMIC_INC instruction does:
2986 * value = (value + 1) % (data + 1)
2987 * but we want:
2988 * value = (value + 1) % data
2989 * So replace 'data' by 'data - 1'.
2990 */
2991 ctx->ssa_defs[instr->src[3].ssa->index] =
2992 LLVMBuildSub(ctx->ac.builder,
2993 ctx->ssa_defs[instr->src[3].ssa->index],
2994 ctx->ac.i32_1, "");
2995 break;
2996 }
2997 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2998 case nir_intrinsic_image_deref_atomic_dec_wrap:
2999 atomic_name = "dec";
3000 atomic_subop = ac_atomic_dec_wrap;
3001 break;
3002 default:
3003 abort();
3004 }
3005
3006 if (cmpswap)
3007 params[param_count++] = get_src(ctx, instr->src[4]);
3008 params[param_count++] = get_src(ctx, instr->src[3]);
3009
3010 LLVMValueRef result;
3011 if (dim == GLSL_SAMPLER_DIM_BUF) {
3012 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3013 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3014 ctx->ac.i32_0, ""); /* vindex */
3015 params[param_count++] = ctx->ac.i32_0; /* voffset */
3016 if (LLVM_VERSION_MAJOR >= 9) {
3017 /* XXX: The new raw/struct atomic intrinsics are buggy
3018 * with LLVM 8, see r358579.
3019 */
3020 params[param_count++] = ctx->ac.i32_0; /* soffset */
3021 params[param_count++] = ctx->ac.i32_0; /* slc */
3022
3023 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3024 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3025 } else {
3026 params[param_count++] = ctx->ac.i1false; /* slc */
3027
3028 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3029 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3030 }
3031
3032 assert(length < sizeof(intrinsic_name));
3033 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3034 params, param_count, 0);
3035 } else {
3036 struct ac_image_args args = {};
3037 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3038 args.atomic = atomic_subop;
3039 args.data[0] = params[0];
3040 if (cmpswap)
3041 args.data[1] = params[1];
3042 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3043 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3044 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3045
3046 result = ac_build_image_opcode(&ctx->ac, &args);
3047 }
3048
3049 result = exit_waterfall(ctx, &wctx, result);
3050 if (ctx->ac.postponed_kill)
3051 ac_build_endif(&ctx->ac, 7004);
3052 return result;
3053 }
3054
3055 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3056 nir_intrinsic_instr *instr)
3057 {
3058 struct waterfall_context wctx;
3059 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3060 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3061
3062 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3063
3064 return exit_waterfall(ctx, &wctx, ret);
3065 }
3066
3067 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3068 const nir_intrinsic_instr *instr,
3069 bool bindless)
3070 {
3071 LLVMValueRef res;
3072
3073 enum glsl_sampler_dim dim;
3074 bool is_array;
3075 if (bindless) {
3076 dim = nir_intrinsic_image_dim(instr);
3077 is_array = nir_intrinsic_image_array(instr);
3078 } else {
3079 const struct glsl_type *type = get_image_deref(instr)->type;
3080 dim = glsl_get_sampler_dim(type);
3081 is_array = glsl_sampler_type_is_array(type);
3082 }
3083
3084 struct waterfall_context wctx;
3085 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3086
3087 if (dim == GLSL_SAMPLER_DIM_BUF) {
3088 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3089 } else {
3090
3091 struct ac_image_args args = { 0 };
3092
3093 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3094 args.dmask = 0xf;
3095 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3096 args.opcode = ac_image_get_resinfo;
3097 args.lod = ctx->ac.i32_0;
3098 args.attributes = AC_FUNC_ATTR_READNONE;
3099
3100 res = ac_build_image_opcode(&ctx->ac, &args);
3101
3102 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3103
3104 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3105 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3106 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3107 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3108 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3109 }
3110
3111 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3112 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3113 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3114 ctx->ac.i32_1, "");
3115 }
3116 }
3117 return exit_waterfall(ctx, &wctx, res);
3118 }
3119
3120 static void emit_membar(struct ac_llvm_context *ac,
3121 const nir_intrinsic_instr *instr)
3122 {
3123 unsigned wait_flags = 0;
3124
3125 switch (instr->intrinsic) {
3126 case nir_intrinsic_memory_barrier:
3127 case nir_intrinsic_group_memory_barrier:
3128 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3129 break;
3130 case nir_intrinsic_memory_barrier_buffer:
3131 case nir_intrinsic_memory_barrier_image:
3132 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3133 break;
3134 case nir_intrinsic_memory_barrier_shared:
3135 wait_flags = AC_WAIT_LGKM;
3136 break;
3137 default:
3138 break;
3139 }
3140
3141 ac_build_waitcnt(ac, wait_flags);
3142 }
3143
3144 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3145 {
3146 /* GFX6 only (thanks to a hw bug workaround):
3147 * The real barrier instruction isn’t needed, because an entire patch
3148 * always fits into a single wave.
3149 */
3150 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3151 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3152 return;
3153 }
3154 ac_build_s_barrier(ac);
3155 }
3156
3157 static void emit_discard(struct ac_nir_context *ctx,
3158 const nir_intrinsic_instr *instr)
3159 {
3160 LLVMValueRef cond;
3161
3162 if (instr->intrinsic == nir_intrinsic_discard_if) {
3163 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3164 get_src(ctx, instr->src[0]),
3165 ctx->ac.i32_0, "");
3166 } else {
3167 assert(instr->intrinsic == nir_intrinsic_discard);
3168 cond = ctx->ac.i1false;
3169 }
3170
3171 ac_build_kill_if_false(&ctx->ac, cond);
3172 }
3173
3174 static void emit_demote(struct ac_nir_context *ctx,
3175 const nir_intrinsic_instr *instr)
3176 {
3177 LLVMValueRef cond;
3178
3179 if (instr->intrinsic == nir_intrinsic_demote_if) {
3180 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3181 get_src(ctx, instr->src[0]),
3182 ctx->ac.i32_0, "");
3183 } else {
3184 assert(instr->intrinsic == nir_intrinsic_demote);
3185 cond = ctx->ac.i1false;
3186 }
3187
3188 /* Kill immediately while maintaining WQM. */
3189 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3190
3191 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3192 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3193 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3194 return;
3195 }
3196
3197 static LLVMValueRef
3198 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3199 {
3200 LLVMValueRef result;
3201 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3202 result = LLVMBuildAnd(ctx->ac.builder,
3203 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3204 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3205
3206 if (ctx->ac.wave_size == 32)
3207 result = LLVMBuildLShr(ctx->ac.builder, result,
3208 LLVMConstInt(ctx->ac.i32, 1, false), "");
3209
3210 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3211 }
3212
3213 static LLVMValueRef
3214 visit_load_subgroup_id(struct ac_nir_context *ctx)
3215 {
3216 if (ctx->stage == MESA_SHADER_COMPUTE) {
3217 LLVMValueRef result;
3218 result = LLVMBuildAnd(ctx->ac.builder,
3219 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3220 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3221 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3222 } else {
3223 return LLVMConstInt(ctx->ac.i32, 0, false);
3224 }
3225 }
3226
3227 static LLVMValueRef
3228 visit_load_num_subgroups(struct ac_nir_context *ctx)
3229 {
3230 if (ctx->stage == MESA_SHADER_COMPUTE) {
3231 return LLVMBuildAnd(ctx->ac.builder,
3232 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3233 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3234 } else {
3235 return LLVMConstInt(ctx->ac.i32, 1, false);
3236 }
3237 }
3238
3239 static LLVMValueRef
3240 visit_first_invocation(struct ac_nir_context *ctx)
3241 {
3242 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3243 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3244
3245 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3246 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3247 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3248 ctx->ac.iN_wavemask, args, 2,
3249 AC_FUNC_ATTR_NOUNWIND |
3250 AC_FUNC_ATTR_READNONE);
3251
3252 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3253 }
3254
3255 static LLVMValueRef
3256 visit_load_shared(struct ac_nir_context *ctx,
3257 const nir_intrinsic_instr *instr)
3258 {
3259 LLVMValueRef values[4], derived_ptr, index, ret;
3260
3261 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3262 instr->dest.ssa.bit_size);
3263
3264 for (int chan = 0; chan < instr->num_components; chan++) {
3265 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3266 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3267 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3268 }
3269
3270 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3271 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3272 }
3273
3274 static void
3275 visit_store_shared(struct ac_nir_context *ctx,
3276 const nir_intrinsic_instr *instr)
3277 {
3278 LLVMValueRef derived_ptr, data,index;
3279 LLVMBuilderRef builder = ctx->ac.builder;
3280
3281 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3282 instr->src[0].ssa->bit_size);
3283 LLVMValueRef src = get_src(ctx, instr->src[0]);
3284
3285 int writemask = nir_intrinsic_write_mask(instr);
3286 for (int chan = 0; chan < 4; chan++) {
3287 if (!(writemask & (1 << chan))) {
3288 continue;
3289 }
3290 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3291 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3292 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3293 LLVMBuildStore(builder, data, derived_ptr);
3294 }
3295 }
3296
3297 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3298 const nir_intrinsic_instr *instr,
3299 LLVMValueRef ptr, int src_idx)
3300 {
3301 if (ctx->ac.postponed_kill) {
3302 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3303 ctx->ac.postponed_kill, "");
3304 ac_build_ifcc(&ctx->ac, cond, 7005);
3305 }
3306
3307 LLVMValueRef result;
3308 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3309
3310 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3311
3312 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3313 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3314 if (deref->mode == nir_var_mem_global) {
3315 /* use "singlethread" sync scope to implement relaxed ordering */
3316 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3317
3318 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3319 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3320 }
3321 }
3322
3323 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3324 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3325 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3326 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3327 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3328 } else {
3329 LLVMAtomicRMWBinOp op;
3330 switch (instr->intrinsic) {
3331 case nir_intrinsic_shared_atomic_add:
3332 case nir_intrinsic_deref_atomic_add:
3333 op = LLVMAtomicRMWBinOpAdd;
3334 break;
3335 case nir_intrinsic_shared_atomic_umin:
3336 case nir_intrinsic_deref_atomic_umin:
3337 op = LLVMAtomicRMWBinOpUMin;
3338 break;
3339 case nir_intrinsic_shared_atomic_umax:
3340 case nir_intrinsic_deref_atomic_umax:
3341 op = LLVMAtomicRMWBinOpUMax;
3342 break;
3343 case nir_intrinsic_shared_atomic_imin:
3344 case nir_intrinsic_deref_atomic_imin:
3345 op = LLVMAtomicRMWBinOpMin;
3346 break;
3347 case nir_intrinsic_shared_atomic_imax:
3348 case nir_intrinsic_deref_atomic_imax:
3349 op = LLVMAtomicRMWBinOpMax;
3350 break;
3351 case nir_intrinsic_shared_atomic_and:
3352 case nir_intrinsic_deref_atomic_and:
3353 op = LLVMAtomicRMWBinOpAnd;
3354 break;
3355 case nir_intrinsic_shared_atomic_or:
3356 case nir_intrinsic_deref_atomic_or:
3357 op = LLVMAtomicRMWBinOpOr;
3358 break;
3359 case nir_intrinsic_shared_atomic_xor:
3360 case nir_intrinsic_deref_atomic_xor:
3361 op = LLVMAtomicRMWBinOpXor;
3362 break;
3363 case nir_intrinsic_shared_atomic_exchange:
3364 case nir_intrinsic_deref_atomic_exchange:
3365 op = LLVMAtomicRMWBinOpXchg;
3366 break;
3367 default:
3368 return NULL;
3369 }
3370
3371 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3372 }
3373
3374 if (ctx->ac.postponed_kill)
3375 ac_build_endif(&ctx->ac, 7005);
3376 return result;
3377 }
3378
3379 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3380 {
3381 LLVMValueRef values[2];
3382 LLVMValueRef pos[2];
3383
3384 pos[0] = ac_to_float(&ctx->ac,
3385 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3386 pos[1] = ac_to_float(&ctx->ac,
3387 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3388
3389 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3390 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3391 return ac_build_gather_values(&ctx->ac, values, 2);
3392 }
3393
3394 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3395 enum glsl_interp_mode interp, unsigned location)
3396 {
3397 switch (interp) {
3398 case INTERP_MODE_FLAT:
3399 default:
3400 return NULL;
3401 case INTERP_MODE_SMOOTH:
3402 case INTERP_MODE_NONE:
3403 if (location == INTERP_CENTER)
3404 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3405 else if (location == INTERP_CENTROID)
3406 return ctx->abi->persp_centroid;
3407 else if (location == INTERP_SAMPLE)
3408 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3409 break;
3410 case INTERP_MODE_NOPERSPECTIVE:
3411 if (location == INTERP_CENTER)
3412 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3413 else if (location == INTERP_CENTROID)
3414 return ctx->abi->linear_centroid;
3415 else if (location == INTERP_SAMPLE)
3416 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3417 break;
3418 }
3419 return NULL;
3420 }
3421
3422 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3423 unsigned mode)
3424 {
3425 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3426 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3427 }
3428
3429 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3430 unsigned mode,
3431 LLVMValueRef offset)
3432 {
3433 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3434 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3435 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3436
3437 LLVMValueRef ij_out[2];
3438 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3439
3440 /*
3441 * take the I then J parameters, and the DDX/Y for it, and
3442 * calculate the IJ inputs for the interpolator.
3443 * temp1 = ddx * offset/sample.x + I;
3444 * interp_param.I = ddy * offset/sample.y + temp1;
3445 * temp1 = ddx * offset/sample.x + J;
3446 * interp_param.J = ddy * offset/sample.y + temp1;
3447 */
3448 for (unsigned i = 0; i < 2; i++) {
3449 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3450 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3451 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3452 ddxy_out, ix_ll, "");
3453 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3454 ddxy_out, iy_ll, "");
3455 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3456 interp_param, ix_ll, "");
3457 LLVMValueRef temp1, temp2;
3458
3459 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3460 ctx->ac.f32, "");
3461
3462 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3463 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3464
3465 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3466 temp2, ctx->ac.i32, "");
3467 }
3468 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3469 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3470 }
3471
3472 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3473 unsigned mode)
3474 {
3475 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3476 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3477 }
3478
3479 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3480 unsigned mode,
3481 LLVMValueRef sample_id)
3482 {
3483 if (ctx->abi->interp_at_sample_force_center)
3484 return barycentric_center(ctx, mode);
3485
3486 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3487
3488 /* fetch sample ID */
3489 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3490
3491 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3492 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3493 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3494 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3495 LLVMValueRef coords[] = { src_c0, src_c1 };
3496 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3497
3498 return barycentric_offset(ctx, mode, offset);
3499 }
3500
3501
3502 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3503 unsigned mode)
3504 {
3505 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3506 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3507 }
3508
3509 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3510 {
3511 return LLVMBuildBitCast(ctx->ac.builder,
3512 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3513 ctx->ac.v3i32, "");
3514 }
3515
3516 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3517 LLVMValueRef interp_param,
3518 unsigned index, unsigned comp_start,
3519 unsigned num_components,
3520 unsigned bitsize)
3521 {
3522 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3523 LLVMValueRef interp_param_f;
3524
3525 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3526 interp_param, ctx->ac.v2f32, "");
3527 LLVMValueRef i = LLVMBuildExtractElement(
3528 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3529 LLVMValueRef j = LLVMBuildExtractElement(
3530 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3531
3532 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3533 if (ctx->verified_interp &&
3534 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3535 LLVMValueRef args[2];
3536 args[0] = i;
3537 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3538 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3539 args, 2, AC_FUNC_ATTR_READNONE);
3540 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3541 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3542 }
3543
3544 LLVMValueRef values[4];
3545 assert(bitsize == 16 || bitsize == 32);
3546 for (unsigned comp = 0; comp < num_components; comp++) {
3547 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3548 if (bitsize == 16) {
3549 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3550 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3551 } else {
3552 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3553 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3554 }
3555 }
3556
3557 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3558 }
3559
3560 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3561 nir_intrinsic_instr *instr)
3562 {
3563 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3564
3565 /* We only lower inputs for fragment shaders ATM */
3566 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3567 assert(offset);
3568 assert(offset[0].i32 == 0);
3569
3570 unsigned component = nir_intrinsic_component(instr);
3571 unsigned index = nir_intrinsic_base(instr);
3572 unsigned vertex_id = 2; /* P0 */
3573
3574 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3575 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3576
3577 switch (src0[0].i32) {
3578 case 0:
3579 vertex_id = 2;
3580 break;
3581 case 1:
3582 vertex_id = 0;
3583 break;
3584 case 2:
3585 vertex_id = 1;
3586 break;
3587 default:
3588 unreachable("Invalid vertex index");
3589 }
3590 }
3591
3592 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3593 LLVMValueRef values[8];
3594
3595 /* Each component of a 64-bit value takes up two GL-level channels. */
3596 unsigned num_components = instr->dest.ssa.num_components;
3597 unsigned bit_size = instr->dest.ssa.bit_size;
3598 unsigned channels =
3599 bit_size == 64 ? num_components * 2 : num_components;
3600
3601 for (unsigned chan = 0; chan < channels; chan++) {
3602 if (component + chan > 4)
3603 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3604 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3605 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3606 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3607 llvm_chan,
3608 attr_number,
3609 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3610 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3611 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3612 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3613 }
3614
3615 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3616 if (bit_size == 64) {
3617 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3618 LLVMVectorType(ctx->ac.i64, num_components);
3619 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3620 }
3621 return result;
3622 }
3623
3624 static void visit_intrinsic(struct ac_nir_context *ctx,
3625 nir_intrinsic_instr *instr)
3626 {
3627 LLVMValueRef result = NULL;
3628
3629 switch (instr->intrinsic) {
3630 case nir_intrinsic_ballot:
3631 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3632 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3633 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3634 break;
3635 case nir_intrinsic_read_invocation:
3636 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3637 get_src(ctx, instr->src[1]));
3638 break;
3639 case nir_intrinsic_read_first_invocation:
3640 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3641 break;
3642 case nir_intrinsic_load_subgroup_invocation:
3643 result = ac_get_thread_id(&ctx->ac);
3644 break;
3645 case nir_intrinsic_load_work_group_id: {
3646 LLVMValueRef values[3];
3647
3648 for (int i = 0; i < 3; i++) {
3649 values[i] = ctx->args->workgroup_ids[i].used ?
3650 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3651 }
3652
3653 result = ac_build_gather_values(&ctx->ac, values, 3);
3654 break;
3655 }
3656 case nir_intrinsic_load_base_vertex:
3657 case nir_intrinsic_load_first_vertex:
3658 result = ctx->abi->load_base_vertex(ctx->abi);
3659 break;
3660 case nir_intrinsic_load_local_group_size:
3661 result = ctx->abi->load_local_group_size(ctx->abi);
3662 break;
3663 case nir_intrinsic_load_vertex_id:
3664 result = LLVMBuildAdd(ctx->ac.builder,
3665 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3666 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3667 break;
3668 case nir_intrinsic_load_vertex_id_zero_base: {
3669 result = ctx->abi->vertex_id;
3670 break;
3671 }
3672 case nir_intrinsic_load_local_invocation_id: {
3673 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3674 break;
3675 }
3676 case nir_intrinsic_load_base_instance:
3677 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3678 break;
3679 case nir_intrinsic_load_draw_id:
3680 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3681 break;
3682 case nir_intrinsic_load_view_index:
3683 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3684 break;
3685 case nir_intrinsic_load_invocation_id:
3686 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3687 result = ac_unpack_param(&ctx->ac,
3688 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3689 8, 5);
3690 } else {
3691 if (ctx->ac.chip_class >= GFX10) {
3692 result = LLVMBuildAnd(ctx->ac.builder,
3693 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3694 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3695 } else {
3696 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3697 }
3698 }
3699 break;
3700 case nir_intrinsic_load_primitive_id:
3701 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3702 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3703 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3704 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3705 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3706 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3707 } else
3708 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3709 break;
3710 case nir_intrinsic_load_sample_id:
3711 result = ac_unpack_param(&ctx->ac,
3712 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3713 8, 4);
3714 break;
3715 case nir_intrinsic_load_sample_pos:
3716 result = load_sample_pos(ctx);
3717 break;
3718 case nir_intrinsic_load_sample_mask_in:
3719 result = ctx->abi->load_sample_mask_in(ctx->abi);
3720 break;
3721 case nir_intrinsic_load_frag_coord: {
3722 LLVMValueRef values[4] = {
3723 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3724 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3725 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3726 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3727 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3728 };
3729 result = ac_to_integer(&ctx->ac,
3730 ac_build_gather_values(&ctx->ac, values, 4));
3731 break;
3732 }
3733 case nir_intrinsic_load_layer_id:
3734 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3735 break;
3736 case nir_intrinsic_load_front_face:
3737 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3738 break;
3739 case nir_intrinsic_load_helper_invocation:
3740 result = ac_build_load_helper_invocation(&ctx->ac);
3741 break;
3742 case nir_intrinsic_is_helper_invocation:
3743 result = ac_build_is_helper_invocation(&ctx->ac);
3744 break;
3745 case nir_intrinsic_load_color0:
3746 result = ctx->abi->color0;
3747 break;
3748 case nir_intrinsic_load_color1:
3749 result = ctx->abi->color1;
3750 break;
3751 case nir_intrinsic_load_user_data_amd:
3752 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3753 result = ctx->abi->user_data;
3754 break;
3755 case nir_intrinsic_load_instance_id:
3756 result = ctx->abi->instance_id;
3757 break;
3758 case nir_intrinsic_load_num_work_groups:
3759 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3760 break;
3761 case nir_intrinsic_load_local_invocation_index:
3762 result = visit_load_local_invocation_index(ctx);
3763 break;
3764 case nir_intrinsic_load_subgroup_id:
3765 result = visit_load_subgroup_id(ctx);
3766 break;
3767 case nir_intrinsic_load_num_subgroups:
3768 result = visit_load_num_subgroups(ctx);
3769 break;
3770 case nir_intrinsic_first_invocation:
3771 result = visit_first_invocation(ctx);
3772 break;
3773 case nir_intrinsic_load_push_constant:
3774 result = visit_load_push_constant(ctx, instr);
3775 break;
3776 case nir_intrinsic_vulkan_resource_index: {
3777 LLVMValueRef index = get_src(ctx, instr->src[0]);
3778 unsigned desc_set = nir_intrinsic_desc_set(instr);
3779 unsigned binding = nir_intrinsic_binding(instr);
3780
3781 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3782 binding);
3783 break;
3784 }
3785 case nir_intrinsic_vulkan_resource_reindex:
3786 result = visit_vulkan_resource_reindex(ctx, instr);
3787 break;
3788 case nir_intrinsic_store_ssbo:
3789 visit_store_ssbo(ctx, instr);
3790 break;
3791 case nir_intrinsic_load_ssbo:
3792 result = visit_load_buffer(ctx, instr);
3793 break;
3794 case nir_intrinsic_ssbo_atomic_add:
3795 case nir_intrinsic_ssbo_atomic_imin:
3796 case nir_intrinsic_ssbo_atomic_umin:
3797 case nir_intrinsic_ssbo_atomic_imax:
3798 case nir_intrinsic_ssbo_atomic_umax:
3799 case nir_intrinsic_ssbo_atomic_and:
3800 case nir_intrinsic_ssbo_atomic_or:
3801 case nir_intrinsic_ssbo_atomic_xor:
3802 case nir_intrinsic_ssbo_atomic_exchange:
3803 case nir_intrinsic_ssbo_atomic_comp_swap:
3804 result = visit_atomic_ssbo(ctx, instr);
3805 break;
3806 case nir_intrinsic_load_ubo:
3807 result = visit_load_ubo_buffer(ctx, instr);
3808 break;
3809 case nir_intrinsic_get_buffer_size:
3810 result = visit_get_buffer_size(ctx, instr);
3811 break;
3812 case nir_intrinsic_load_deref:
3813 result = visit_load_var(ctx, instr);
3814 break;
3815 case nir_intrinsic_store_deref:
3816 visit_store_var(ctx, instr);
3817 break;
3818 case nir_intrinsic_load_shared:
3819 result = visit_load_shared(ctx, instr);
3820 break;
3821 case nir_intrinsic_store_shared:
3822 visit_store_shared(ctx, instr);
3823 break;
3824 case nir_intrinsic_bindless_image_samples:
3825 case nir_intrinsic_image_deref_samples:
3826 result = visit_image_samples(ctx, instr);
3827 break;
3828 case nir_intrinsic_bindless_image_load:
3829 result = visit_image_load(ctx, instr, true);
3830 break;
3831 case nir_intrinsic_image_deref_load:
3832 result = visit_image_load(ctx, instr, false);
3833 break;
3834 case nir_intrinsic_bindless_image_store:
3835 visit_image_store(ctx, instr, true);
3836 break;
3837 case nir_intrinsic_image_deref_store:
3838 visit_image_store(ctx, instr, false);
3839 break;
3840 case nir_intrinsic_bindless_image_atomic_add:
3841 case nir_intrinsic_bindless_image_atomic_imin:
3842 case nir_intrinsic_bindless_image_atomic_umin:
3843 case nir_intrinsic_bindless_image_atomic_imax:
3844 case nir_intrinsic_bindless_image_atomic_umax:
3845 case nir_intrinsic_bindless_image_atomic_and:
3846 case nir_intrinsic_bindless_image_atomic_or:
3847 case nir_intrinsic_bindless_image_atomic_xor:
3848 case nir_intrinsic_bindless_image_atomic_exchange:
3849 case nir_intrinsic_bindless_image_atomic_comp_swap:
3850 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3851 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3852 result = visit_image_atomic(ctx, instr, true);
3853 break;
3854 case nir_intrinsic_image_deref_atomic_add:
3855 case nir_intrinsic_image_deref_atomic_imin:
3856 case nir_intrinsic_image_deref_atomic_umin:
3857 case nir_intrinsic_image_deref_atomic_imax:
3858 case nir_intrinsic_image_deref_atomic_umax:
3859 case nir_intrinsic_image_deref_atomic_and:
3860 case nir_intrinsic_image_deref_atomic_or:
3861 case nir_intrinsic_image_deref_atomic_xor:
3862 case nir_intrinsic_image_deref_atomic_exchange:
3863 case nir_intrinsic_image_deref_atomic_comp_swap:
3864 case nir_intrinsic_image_deref_atomic_inc_wrap:
3865 case nir_intrinsic_image_deref_atomic_dec_wrap:
3866 result = visit_image_atomic(ctx, instr, false);
3867 break;
3868 case nir_intrinsic_bindless_image_size:
3869 result = visit_image_size(ctx, instr, true);
3870 break;
3871 case nir_intrinsic_image_deref_size:
3872 result = visit_image_size(ctx, instr, false);
3873 break;
3874 case nir_intrinsic_shader_clock:
3875 result = ac_build_shader_clock(&ctx->ac,
3876 nir_intrinsic_memory_scope(instr));
3877 break;
3878 case nir_intrinsic_discard:
3879 case nir_intrinsic_discard_if:
3880 emit_discard(ctx, instr);
3881 break;
3882 case nir_intrinsic_demote:
3883 case nir_intrinsic_demote_if:
3884 emit_demote(ctx, instr);
3885 break;
3886 case nir_intrinsic_memory_barrier:
3887 case nir_intrinsic_group_memory_barrier:
3888 case nir_intrinsic_memory_barrier_buffer:
3889 case nir_intrinsic_memory_barrier_image:
3890 case nir_intrinsic_memory_barrier_shared:
3891 emit_membar(&ctx->ac, instr);
3892 break;
3893 case nir_intrinsic_memory_barrier_tcs_patch:
3894 break;
3895 case nir_intrinsic_control_barrier:
3896 ac_emit_barrier(&ctx->ac, ctx->stage);
3897 break;
3898 case nir_intrinsic_shared_atomic_add:
3899 case nir_intrinsic_shared_atomic_imin:
3900 case nir_intrinsic_shared_atomic_umin:
3901 case nir_intrinsic_shared_atomic_imax:
3902 case nir_intrinsic_shared_atomic_umax:
3903 case nir_intrinsic_shared_atomic_and:
3904 case nir_intrinsic_shared_atomic_or:
3905 case nir_intrinsic_shared_atomic_xor:
3906 case nir_intrinsic_shared_atomic_exchange:
3907 case nir_intrinsic_shared_atomic_comp_swap: {
3908 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3909 instr->src[1].ssa->bit_size);
3910 result = visit_var_atomic(ctx, instr, ptr, 1);
3911 break;
3912 }
3913 case nir_intrinsic_deref_atomic_add:
3914 case nir_intrinsic_deref_atomic_imin:
3915 case nir_intrinsic_deref_atomic_umin:
3916 case nir_intrinsic_deref_atomic_imax:
3917 case nir_intrinsic_deref_atomic_umax:
3918 case nir_intrinsic_deref_atomic_and:
3919 case nir_intrinsic_deref_atomic_or:
3920 case nir_intrinsic_deref_atomic_xor:
3921 case nir_intrinsic_deref_atomic_exchange:
3922 case nir_intrinsic_deref_atomic_comp_swap: {
3923 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3924 result = visit_var_atomic(ctx, instr, ptr, 1);
3925 break;
3926 }
3927 case nir_intrinsic_load_barycentric_pixel:
3928 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3929 break;
3930 case nir_intrinsic_load_barycentric_centroid:
3931 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3932 break;
3933 case nir_intrinsic_load_barycentric_sample:
3934 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3935 break;
3936 case nir_intrinsic_load_barycentric_model:
3937 result = barycentric_model(ctx);
3938 break;
3939 case nir_intrinsic_load_barycentric_at_offset: {
3940 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3941 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3942 break;
3943 }
3944 case nir_intrinsic_load_barycentric_at_sample: {
3945 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3946 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3947 break;
3948 }
3949 case nir_intrinsic_load_interpolated_input: {
3950 /* We assume any indirect loads have been lowered away */
3951 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3952 assert(offset);
3953 assert(offset[0].i32 == 0);
3954
3955 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3956 unsigned index = nir_intrinsic_base(instr);
3957 unsigned component = nir_intrinsic_component(instr);
3958 result = load_interpolated_input(ctx, interp_param, index,
3959 component,
3960 instr->dest.ssa.num_components,
3961 instr->dest.ssa.bit_size);
3962 break;
3963 }
3964 case nir_intrinsic_load_input:
3965 case nir_intrinsic_load_input_vertex:
3966 result = load_input(ctx, instr);
3967 break;
3968 case nir_intrinsic_emit_vertex:
3969 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3970 break;
3971 case nir_intrinsic_emit_vertex_with_counter: {
3972 unsigned stream = nir_intrinsic_stream_id(instr);
3973 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
3974 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
3975 next_vertex,
3976 ctx->abi->outputs);
3977 break;
3978 }
3979 case nir_intrinsic_end_primitive:
3980 case nir_intrinsic_end_primitive_with_counter:
3981 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3982 break;
3983 case nir_intrinsic_load_tess_coord:
3984 result = ctx->abi->load_tess_coord(ctx->abi);
3985 break;
3986 case nir_intrinsic_load_tess_level_outer:
3987 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3988 break;
3989 case nir_intrinsic_load_tess_level_inner:
3990 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3991 break;
3992 case nir_intrinsic_load_tess_level_outer_default:
3993 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3994 break;
3995 case nir_intrinsic_load_tess_level_inner_default:
3996 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3997 break;
3998 case nir_intrinsic_load_patch_vertices_in:
3999 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4000 break;
4001 case nir_intrinsic_vote_all: {
4002 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4003 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4004 break;
4005 }
4006 case nir_intrinsic_vote_any: {
4007 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4008 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4009 break;
4010 }
4011 case nir_intrinsic_shuffle:
4012 if (ctx->ac.chip_class == GFX8 ||
4013 ctx->ac.chip_class == GFX9 ||
4014 (ctx->ac.chip_class == GFX10 && ctx->ac.wave_size == 32)) {
4015 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4016 get_src(ctx, instr->src[1]));
4017 } else {
4018 LLVMValueRef src = get_src(ctx, instr->src[0]);
4019 LLVMValueRef index = get_src(ctx, instr->src[1]);
4020 LLVMTypeRef type = LLVMTypeOf(src);
4021 struct waterfall_context wctx;
4022 LLVMValueRef index_val;
4023
4024 index_val = enter_waterfall(ctx, &wctx, index, true);
4025
4026 src = LLVMBuildZExt(ctx->ac.builder, src,
4027 ctx->ac.i32, "");
4028
4029 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4030 ctx->ac.i32,
4031 (LLVMValueRef []) { src, index_val }, 2,
4032 AC_FUNC_ATTR_READNONE |
4033 AC_FUNC_ATTR_CONVERGENT);
4034
4035 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4036
4037 result = exit_waterfall(ctx, &wctx, result);
4038 }
4039 break;
4040 case nir_intrinsic_reduce:
4041 result = ac_build_reduce(&ctx->ac,
4042 get_src(ctx, instr->src[0]),
4043 instr->const_index[0],
4044 instr->const_index[1]);
4045 break;
4046 case nir_intrinsic_inclusive_scan:
4047 result = ac_build_inclusive_scan(&ctx->ac,
4048 get_src(ctx, instr->src[0]),
4049 instr->const_index[0]);
4050 break;
4051 case nir_intrinsic_exclusive_scan:
4052 result = ac_build_exclusive_scan(&ctx->ac,
4053 get_src(ctx, instr->src[0]),
4054 instr->const_index[0]);
4055 break;
4056 case nir_intrinsic_quad_broadcast: {
4057 unsigned lane = nir_src_as_uint(instr->src[1]);
4058 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4059 lane, lane, lane, lane);
4060 break;
4061 }
4062 case nir_intrinsic_quad_swap_horizontal:
4063 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4064 break;
4065 case nir_intrinsic_quad_swap_vertical:
4066 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4067 break;
4068 case nir_intrinsic_quad_swap_diagonal:
4069 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4070 break;
4071 case nir_intrinsic_quad_swizzle_amd: {
4072 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4073 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4074 mask & 0x3, (mask >> 2) & 0x3,
4075 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4076 break;
4077 }
4078 case nir_intrinsic_masked_swizzle_amd: {
4079 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4080 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4081 break;
4082 }
4083 case nir_intrinsic_write_invocation_amd:
4084 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4085 get_src(ctx, instr->src[1]),
4086 get_src(ctx, instr->src[2]));
4087 break;
4088 case nir_intrinsic_mbcnt_amd:
4089 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4090 break;
4091 case nir_intrinsic_load_scratch: {
4092 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4093 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4094 offset);
4095 LLVMTypeRef comp_type =
4096 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4097 LLVMTypeRef vec_type =
4098 instr->dest.ssa.num_components == 1 ? comp_type :
4099 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4100 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4101 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4102 LLVMPointerType(vec_type, addr_space), "");
4103 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4104 break;
4105 }
4106 case nir_intrinsic_store_scratch: {
4107 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4108 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4109 offset);
4110 LLVMTypeRef comp_type =
4111 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4112 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4113 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4114 LLVMPointerType(comp_type, addr_space), "");
4115 LLVMValueRef src = get_src(ctx, instr->src[0]);
4116 unsigned wrmask = nir_intrinsic_write_mask(instr);
4117 while (wrmask) {
4118 int start, count;
4119 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4120
4121 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4122 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4123 LLVMTypeRef vec_type =
4124 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4125 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4126 offset_ptr,
4127 LLVMPointerType(vec_type, addr_space),
4128 "");
4129 LLVMValueRef offset_src =
4130 ac_extract_components(&ctx->ac, src, start, count);
4131 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4132 }
4133 break;
4134 }
4135 case nir_intrinsic_load_constant: {
4136 unsigned base = nir_intrinsic_base(instr);
4137 unsigned range = nir_intrinsic_range(instr);
4138
4139 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4140 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4141 LLVMConstInt(ctx->ac.i32, base, false), "");
4142
4143 /* Clamp the offset to avoid out-of-bound access because global
4144 * instructions can't handle them.
4145 */
4146 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4147 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4148 offset, size, "");
4149 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4150
4151 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4152 offset);
4153 LLVMTypeRef comp_type =
4154 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4155 LLVMTypeRef vec_type =
4156 instr->dest.ssa.num_components == 1 ? comp_type :
4157 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4158 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4159 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4160 LLVMPointerType(vec_type, addr_space), "");
4161 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4162 break;
4163 }
4164 default:
4165 fprintf(stderr, "Unknown intrinsic: ");
4166 nir_print_instr(&instr->instr, stderr);
4167 fprintf(stderr, "\n");
4168 break;
4169 }
4170 if (result) {
4171 ctx->ssa_defs[instr->dest.ssa.index] = result;
4172 }
4173 }
4174
4175 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4176 unsigned base_index,
4177 unsigned constant_index,
4178 LLVMValueRef dynamic_index)
4179 {
4180 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4181 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4182 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4183
4184 /* Bindless uniforms are 64bit so multiple index by 8 */
4185 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4186 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4187
4188 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4189
4190 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4191 NULL, 0, 0, true, true);
4192
4193 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4194 }
4195
4196 struct sampler_desc_address {
4197 unsigned descriptor_set;
4198 unsigned base_index; /* binding in vulkan */
4199 unsigned constant_index;
4200 LLVMValueRef dynamic_index;
4201 bool image;
4202 bool bindless;
4203 };
4204
4205 static struct sampler_desc_address
4206 get_sampler_desc_internal(struct ac_nir_context *ctx,
4207 nir_deref_instr *deref_instr,
4208 const nir_instr *instr,
4209 bool image)
4210 {
4211 LLVMValueRef index = NULL;
4212 unsigned constant_index = 0;
4213 unsigned descriptor_set;
4214 unsigned base_index;
4215 bool bindless = false;
4216
4217 if (!deref_instr) {
4218 descriptor_set = 0;
4219 if (image) {
4220 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4221 base_index = 0;
4222 bindless = true;
4223 index = get_src(ctx, img_instr->src[0]);
4224 } else {
4225 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4226 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4227 nir_tex_src_sampler_handle);
4228 if (sampSrcIdx != -1) {
4229 base_index = 0;
4230 bindless = true;
4231 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4232 } else {
4233 assert(tex_instr && !image);
4234 base_index = tex_instr->sampler_index;
4235 }
4236 }
4237 } else {
4238 while(deref_instr->deref_type != nir_deref_type_var) {
4239 if (deref_instr->deref_type == nir_deref_type_array) {
4240 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4241 if (!array_size)
4242 array_size = 1;
4243
4244 if (nir_src_is_const(deref_instr->arr.index)) {
4245 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4246 } else {
4247 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4248
4249 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4250 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4251
4252 if (!index)
4253 index = indirect;
4254 else
4255 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4256 }
4257
4258 deref_instr = nir_src_as_deref(deref_instr->parent);
4259 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4260 unsigned sidx = deref_instr->strct.index;
4261 deref_instr = nir_src_as_deref(deref_instr->parent);
4262 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4263 } else {
4264 unreachable("Unsupported deref type");
4265 }
4266 }
4267 descriptor_set = deref_instr->var->data.descriptor_set;
4268
4269 if (deref_instr->var->data.bindless) {
4270 /* For now just assert on unhandled variable types */
4271 assert(deref_instr->var->data.mode == nir_var_uniform);
4272
4273 base_index = deref_instr->var->data.driver_location;
4274 bindless = true;
4275
4276 index = index ? index : ctx->ac.i32_0;
4277 index = get_bindless_index_from_uniform(ctx, base_index,
4278 constant_index, index);
4279 } else
4280 base_index = deref_instr->var->data.binding;
4281 }
4282 return (struct sampler_desc_address) {
4283 .descriptor_set = descriptor_set,
4284 .base_index = base_index,
4285 .constant_index = constant_index,
4286 .dynamic_index = index,
4287 .image = image,
4288 .bindless = bindless,
4289 };
4290 }
4291
4292 /* Extract any possibly divergent index into a separate value that can be fed
4293 * into get_sampler_desc with the same arguments. */
4294 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4295 nir_deref_instr *deref_instr,
4296 const nir_instr *instr,
4297 bool image)
4298 {
4299 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4300 return addr.dynamic_index;
4301 }
4302
4303 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4304 nir_deref_instr *deref_instr,
4305 enum ac_descriptor_type desc_type,
4306 const nir_instr *instr,
4307 LLVMValueRef index,
4308 bool image, bool write)
4309 {
4310 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4311 return ctx->abi->load_sampler_desc(ctx->abi,
4312 addr.descriptor_set,
4313 addr.base_index,
4314 addr.constant_index, index,
4315 desc_type, addr.image, write, addr.bindless);
4316 }
4317
4318 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4319 *
4320 * GFX6-GFX7:
4321 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4322 * filtering manually. The driver sets img7 to a mask clearing
4323 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4324 * s_and_b32 samp0, samp0, img7
4325 *
4326 * GFX8:
4327 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4328 */
4329 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4330 LLVMValueRef res, LLVMValueRef samp)
4331 {
4332 LLVMBuilderRef builder = ctx->ac.builder;
4333 LLVMValueRef img7, samp0;
4334
4335 if (ctx->ac.chip_class >= GFX8)
4336 return samp;
4337
4338 img7 = LLVMBuildExtractElement(builder, res,
4339 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4340 samp0 = LLVMBuildExtractElement(builder, samp,
4341 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4342 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4343 return LLVMBuildInsertElement(builder, samp, samp0,
4344 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4345 }
4346
4347 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4348 nir_tex_instr *instr,
4349 struct waterfall_context *wctx,
4350 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4351 LLVMValueRef *fmask_ptr)
4352 {
4353 nir_deref_instr *texture_deref_instr = NULL;
4354 nir_deref_instr *sampler_deref_instr = NULL;
4355 int plane = -1;
4356
4357 for (unsigned i = 0; i < instr->num_srcs; i++) {
4358 switch (instr->src[i].src_type) {
4359 case nir_tex_src_texture_deref:
4360 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4361 break;
4362 case nir_tex_src_sampler_deref:
4363 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4364 break;
4365 case nir_tex_src_plane:
4366 plane = nir_src_as_int(instr->src[i].src);
4367 break;
4368 default:
4369 break;
4370 }
4371 }
4372
4373 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4374 &instr->instr, false);
4375 if (!sampler_deref_instr)
4376 sampler_deref_instr = texture_deref_instr;
4377
4378 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4379 &instr->instr, false);
4380 if (instr->texture_non_uniform)
4381 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4382
4383 if (instr->sampler_non_uniform)
4384 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4385
4386 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4387
4388 if (plane >= 0) {
4389 assert(instr->op != nir_texop_txf_ms &&
4390 instr->op != nir_texop_samples_identical);
4391 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4392
4393 main_descriptor = AC_DESC_PLANE_0 + plane;
4394 }
4395
4396 if (instr->op == nir_texop_fragment_mask_fetch) {
4397 /* The fragment mask is fetched from the compressed
4398 * multisampled surface.
4399 */
4400 main_descriptor = AC_DESC_FMASK;
4401 }
4402
4403 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4404 texture_dynamic_index, false, false);
4405
4406 if (samp_ptr) {
4407 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4408 sampler_dynamic_index, false, false);
4409 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4410 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4411 }
4412 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4413 instr->op == nir_texop_samples_identical))
4414 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4415 &instr->instr, texture_dynamic_index, false, false);
4416 }
4417
4418 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4419 LLVMValueRef coord)
4420 {
4421 coord = ac_to_float(ctx, coord);
4422 coord = ac_build_round(ctx, coord);
4423 coord = ac_to_integer(ctx, coord);
4424 return coord;
4425 }
4426
4427 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4428 {
4429 LLVMValueRef result = NULL;
4430 struct ac_image_args args = { 0 };
4431 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4432 LLVMValueRef ddx = NULL, ddy = NULL;
4433 unsigned offset_src = 0;
4434 struct waterfall_context wctx[2] = {{{0}}};
4435
4436 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4437
4438 for (unsigned i = 0; i < instr->num_srcs; i++) {
4439 switch (instr->src[i].src_type) {
4440 case nir_tex_src_coord: {
4441 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4442 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4443 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4444 break;
4445 }
4446 case nir_tex_src_projector:
4447 break;
4448 case nir_tex_src_comparator:
4449 if (instr->is_shadow) {
4450 args.compare = get_src(ctx, instr->src[i].src);
4451 args.compare = ac_to_float(&ctx->ac, args.compare);
4452 }
4453 break;
4454 case nir_tex_src_offset:
4455 args.offset = get_src(ctx, instr->src[i].src);
4456 offset_src = i;
4457 break;
4458 case nir_tex_src_bias:
4459 args.bias = get_src(ctx, instr->src[i].src);
4460 break;
4461 case nir_tex_src_lod: {
4462 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4463 args.level_zero = true;
4464 else
4465 args.lod = get_src(ctx, instr->src[i].src);
4466 break;
4467 }
4468 case nir_tex_src_ms_index:
4469 sample_index = get_src(ctx, instr->src[i].src);
4470 break;
4471 case nir_tex_src_ms_mcs:
4472 break;
4473 case nir_tex_src_ddx:
4474 ddx = get_src(ctx, instr->src[i].src);
4475 break;
4476 case nir_tex_src_ddy:
4477 ddy = get_src(ctx, instr->src[i].src);
4478 break;
4479 case nir_tex_src_min_lod:
4480 args.min_lod = get_src(ctx, instr->src[i].src);
4481 break;
4482 case nir_tex_src_texture_offset:
4483 case nir_tex_src_sampler_offset:
4484 case nir_tex_src_plane:
4485 default:
4486 break;
4487 }
4488 }
4489
4490 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4491 result = get_buffer_size(ctx, args.resource, true);
4492 goto write_result;
4493 }
4494
4495 if (instr->op == nir_texop_texture_samples) {
4496 LLVMValueRef res, samples, is_msaa;
4497 LLVMValueRef default_sample;
4498
4499 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4500 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4501 LLVMConstInt(ctx->ac.i32, 3, false), "");
4502 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4503 LLVMConstInt(ctx->ac.i32, 28, false), "");
4504 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4505 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4506 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4507 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4508
4509 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4510 LLVMConstInt(ctx->ac.i32, 16, false), "");
4511 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4512 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4513 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4514 samples, "");
4515
4516 if (ctx->abi->robust_buffer_access) {
4517 LLVMValueRef dword1, is_null_descriptor;
4518
4519 /* Extract the second dword of the descriptor, if it's
4520 * all zero, then it's a null descriptor.
4521 */
4522 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4523 LLVMConstInt(ctx->ac.i32, 1, false), "");
4524 is_null_descriptor =
4525 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4526 LLVMConstInt(ctx->ac.i32, 0, false), "");
4527 default_sample =
4528 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4529 ctx->ac.i32_0, ctx->ac.i32_1, "");
4530 } else {
4531 default_sample = ctx->ac.i32_1;
4532 }
4533
4534 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4535 default_sample, "");
4536 result = samples;
4537 goto write_result;
4538 }
4539
4540 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4541 LLVMValueRef offset[3], pack;
4542 for (unsigned chan = 0; chan < 3; ++chan)
4543 offset[chan] = ctx->ac.i32_0;
4544
4545 unsigned num_components = ac_get_llvm_num_components(args.offset);
4546 for (unsigned chan = 0; chan < num_components; chan++) {
4547 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4548 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4549 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4550 if (chan)
4551 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4552 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4553 }
4554 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4555 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4556 args.offset = pack;
4557 }
4558
4559 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4560 * OpenGL 4.5 spec says:
4561 *
4562 * "If the texture’s internal format indicates a fixed-point
4563 * depth texture, then D_t and D_ref are clamped to the
4564 * range [0, 1]; otherwise no clamping is performed."
4565 *
4566 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4567 * so the depth comparison value isn't clamped for Z16 and
4568 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4569 * an explicitly clamped 32-bit float format.
4570 */
4571 if (args.compare &&
4572 ctx->ac.chip_class >= GFX8 &&
4573 ctx->ac.chip_class <= GFX9 &&
4574 ctx->abi->clamp_shadow_reference) {
4575 LLVMValueRef upgraded, clamped;
4576
4577 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4578 LLVMConstInt(ctx->ac.i32, 3, false), "");
4579 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4580 LLVMConstInt(ctx->ac.i32, 29, false), "");
4581 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4582 clamped = ac_build_clamp(&ctx->ac, args.compare);
4583 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4584 args.compare, "");
4585 }
4586
4587 /* pack derivatives */
4588 if (ddx || ddy) {
4589 int num_src_deriv_channels, num_dest_deriv_channels;
4590 switch (instr->sampler_dim) {
4591 case GLSL_SAMPLER_DIM_3D:
4592 case GLSL_SAMPLER_DIM_CUBE:
4593 num_src_deriv_channels = 3;
4594 num_dest_deriv_channels = 3;
4595 break;
4596 case GLSL_SAMPLER_DIM_2D:
4597 default:
4598 num_src_deriv_channels = 2;
4599 num_dest_deriv_channels = 2;
4600 break;
4601 case GLSL_SAMPLER_DIM_1D:
4602 num_src_deriv_channels = 1;
4603 if (ctx->ac.chip_class == GFX9) {
4604 num_dest_deriv_channels = 2;
4605 } else {
4606 num_dest_deriv_channels = 1;
4607 }
4608 break;
4609 }
4610
4611 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4612 args.derivs[i] = ac_to_float(&ctx->ac,
4613 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4614 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4615 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4616 }
4617 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4618 args.derivs[i] = ctx->ac.f32_0;
4619 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4620 }
4621 }
4622
4623 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4624 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4625 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4626 if (instr->coord_components == 3)
4627 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4628 ac_prepare_cube_coords(&ctx->ac,
4629 instr->op == nir_texop_txd, instr->is_array,
4630 instr->op == nir_texop_lod, args.coords, args.derivs);
4631 }
4632
4633 /* Texture coordinates fixups */
4634 if (instr->coord_components > 1 &&
4635 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4636 instr->is_array &&
4637 instr->op != nir_texop_txf) {
4638 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4639 }
4640
4641 if (instr->coord_components > 2 &&
4642 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4643 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4644 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4645 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4646 instr->is_array &&
4647 instr->op != nir_texop_txf &&
4648 instr->op != nir_texop_txf_ms &&
4649 instr->op != nir_texop_fragment_fetch &&
4650 instr->op != nir_texop_fragment_mask_fetch) {
4651 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4652 }
4653
4654 if (ctx->ac.chip_class == GFX9 &&
4655 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4656 instr->op != nir_texop_lod) {
4657 LLVMValueRef filler;
4658 if (instr->op == nir_texop_txf)
4659 filler = ctx->ac.i32_0;
4660 else
4661 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4662
4663 if (instr->is_array)
4664 args.coords[2] = args.coords[1];
4665 args.coords[1] = filler;
4666 }
4667
4668 /* Pack sample index */
4669 if (sample_index && (instr->op == nir_texop_txf_ms ||
4670 instr->op == nir_texop_fragment_fetch))
4671 args.coords[instr->coord_components] = sample_index;
4672
4673 if (instr->op == nir_texop_samples_identical) {
4674 struct ac_image_args txf_args = { 0 };
4675 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4676
4677 txf_args.dmask = 0xf;
4678 txf_args.resource = fmask_ptr;
4679 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4680 result = build_tex_intrinsic(ctx, instr, &txf_args);
4681
4682 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4683 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4684 goto write_result;
4685 }
4686
4687 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4688 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4689 instr->op != nir_texop_txs &&
4690 instr->op != nir_texop_fragment_fetch &&
4691 instr->op != nir_texop_fragment_mask_fetch) {
4692 unsigned sample_chan = instr->is_array ? 3 : 2;
4693 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4694 &ctx->ac, args.coords[0], args.coords[1],
4695 instr->is_array ? args.coords[2] : NULL,
4696 args.coords[sample_chan], fmask_ptr);
4697 }
4698
4699 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4700 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4701 num_offsets = MIN2(num_offsets, instr->coord_components);
4702 for (unsigned i = 0; i < num_offsets; ++i) {
4703 args.coords[i] = LLVMBuildAdd(
4704 ctx->ac.builder, args.coords[i],
4705 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4706 }
4707 args.offset = NULL;
4708 }
4709
4710 /* DMASK was repurposed for GATHER4. 4 components are always
4711 * returned and DMASK works like a swizzle - it selects
4712 * the component to fetch. The only valid DMASK values are
4713 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4714 * (red,red,red,red) etc.) The ISA document doesn't mention
4715 * this.
4716 */
4717 args.dmask = 0xf;
4718 if (instr->op == nir_texop_tg4) {
4719 if (instr->is_shadow)
4720 args.dmask = 1;
4721 else
4722 args.dmask = 1 << instr->component;
4723 }
4724
4725 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4726 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4727 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4728 }
4729
4730 /* Adjust the number of coordinates because we only need (x,y) for 2D
4731 * multisampled images and (x,y,layer) for 2D multisampled layered
4732 * images or for multisampled input attachments.
4733 */
4734 if (instr->op == nir_texop_fragment_mask_fetch) {
4735 if (args.dim == ac_image_2dmsaa) {
4736 args.dim = ac_image_2d;
4737 } else {
4738 assert(args.dim == ac_image_2darraymsaa);
4739 args.dim = ac_image_2darray;
4740 }
4741 }
4742
4743 assert(instr->dest.is_ssa);
4744 args.d16 = instr->dest.ssa.bit_size == 16;
4745
4746 result = build_tex_intrinsic(ctx, instr, &args);
4747
4748 if (instr->op == nir_texop_query_levels)
4749 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4750 else if (instr->is_shadow && instr->is_new_style_shadow &&
4751 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4752 instr->op != nir_texop_tg4)
4753 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4754 else if (instr->op == nir_texop_txs &&
4755 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4756 instr->is_array) {
4757 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4758 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4759 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4760 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4761 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4762 } else if (ctx->ac.chip_class == GFX9 &&
4763 instr->op == nir_texop_txs &&
4764 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4765 instr->is_array) {
4766 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4767 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4768 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4769 ctx->ac.i32_1, "");
4770 } else if (instr->dest.ssa.num_components != 4)
4771 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4772
4773 write_result:
4774 if (result) {
4775 assert(instr->dest.is_ssa);
4776 result = ac_to_integer(&ctx->ac, result);
4777
4778 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4779 result = exit_waterfall(ctx, wctx + i, result);
4780 }
4781
4782 ctx->ssa_defs[instr->dest.ssa.index] = result;
4783 }
4784 }
4785
4786 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4787 {
4788 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4789 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4790
4791 ctx->ssa_defs[instr->dest.ssa.index] = result;
4792 _mesa_hash_table_insert(ctx->phis, instr, result);
4793 }
4794
4795 static void visit_post_phi(struct ac_nir_context *ctx,
4796 nir_phi_instr *instr,
4797 LLVMValueRef llvm_phi)
4798 {
4799 nir_foreach_phi_src(src, instr) {
4800 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4801 LLVMValueRef llvm_src = get_src(ctx, src->src);
4802
4803 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4804 }
4805 }
4806
4807 static void phi_post_pass(struct ac_nir_context *ctx)
4808 {
4809 hash_table_foreach(ctx->phis, entry) {
4810 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4811 (LLVMValueRef)entry->data);
4812 }
4813 }
4814
4815
4816 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4817 nir_foreach_use(use_src, def) {
4818 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4819 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
4820 if (instr->intrinsic == nir_intrinsic_store_deref)
4821 return true;
4822 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
4823 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
4824 if (instr->op == nir_op_vec4 &&
4825 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
4826 return true;
4827 }
4828 }
4829 }
4830 return false;
4831 }
4832
4833 static void visit_ssa_undef(struct ac_nir_context *ctx,
4834 const nir_ssa_undef_instr *instr)
4835 {
4836 unsigned num_components = instr->def.num_components;
4837 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4838
4839 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
4840 LLVMValueRef undef;
4841
4842 if (num_components == 1)
4843 undef = LLVMGetUndef(type);
4844 else {
4845 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4846 }
4847 ctx->ssa_defs[instr->def.index] = undef;
4848 } else {
4849 LLVMValueRef zero = LLVMConstInt(type, 0, false);
4850 if (num_components > 1) {
4851 zero = ac_build_gather_values_extended(
4852 &ctx->ac, &zero, 4, 0, false, false);
4853 }
4854 ctx->ssa_defs[instr->def.index] = zero;
4855 }
4856 }
4857
4858 static void visit_jump(struct ac_llvm_context *ctx,
4859 const nir_jump_instr *instr)
4860 {
4861 switch (instr->type) {
4862 case nir_jump_break:
4863 ac_build_break(ctx);
4864 break;
4865 case nir_jump_continue:
4866 ac_build_continue(ctx);
4867 break;
4868 default:
4869 fprintf(stderr, "Unknown NIR jump instr: ");
4870 nir_print_instr(&instr->instr, stderr);
4871 fprintf(stderr, "\n");
4872 abort();
4873 }
4874 }
4875
4876 static LLVMTypeRef
4877 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4878 enum glsl_base_type type)
4879 {
4880 switch (type) {
4881 case GLSL_TYPE_INT:
4882 case GLSL_TYPE_UINT:
4883 case GLSL_TYPE_BOOL:
4884 case GLSL_TYPE_SUBROUTINE:
4885 return ac->i32;
4886 case GLSL_TYPE_INT8:
4887 case GLSL_TYPE_UINT8:
4888 return ac->i8;
4889 case GLSL_TYPE_INT16:
4890 case GLSL_TYPE_UINT16:
4891 return ac->i16;
4892 case GLSL_TYPE_FLOAT:
4893 return ac->f32;
4894 case GLSL_TYPE_FLOAT16:
4895 return ac->f16;
4896 case GLSL_TYPE_INT64:
4897 case GLSL_TYPE_UINT64:
4898 return ac->i64;
4899 case GLSL_TYPE_DOUBLE:
4900 return ac->f64;
4901 default:
4902 unreachable("unknown GLSL type");
4903 }
4904 }
4905
4906 static LLVMTypeRef
4907 glsl_to_llvm_type(struct ac_llvm_context *ac,
4908 const struct glsl_type *type)
4909 {
4910 if (glsl_type_is_scalar(type)) {
4911 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4912 }
4913
4914 if (glsl_type_is_vector(type)) {
4915 return LLVMVectorType(
4916 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4917 glsl_get_vector_elements(type));
4918 }
4919
4920 if (glsl_type_is_matrix(type)) {
4921 return LLVMArrayType(
4922 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4923 glsl_get_matrix_columns(type));
4924 }
4925
4926 if (glsl_type_is_array(type)) {
4927 return LLVMArrayType(
4928 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4929 glsl_get_length(type));
4930 }
4931
4932 assert(glsl_type_is_struct_or_ifc(type));
4933
4934 LLVMTypeRef member_types[glsl_get_length(type)];
4935
4936 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4937 member_types[i] =
4938 glsl_to_llvm_type(ac,
4939 glsl_get_struct_field(type, i));
4940 }
4941
4942 return LLVMStructTypeInContext(ac->context, member_types,
4943 glsl_get_length(type), false);
4944 }
4945
4946 static void visit_deref(struct ac_nir_context *ctx,
4947 nir_deref_instr *instr)
4948 {
4949 if (instr->mode != nir_var_mem_shared &&
4950 instr->mode != nir_var_mem_global)
4951 return;
4952
4953 LLVMValueRef result = NULL;
4954 switch(instr->deref_type) {
4955 case nir_deref_type_var: {
4956 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4957 result = entry->data;
4958 break;
4959 }
4960 case nir_deref_type_struct:
4961 if (instr->mode == nir_var_mem_global) {
4962 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4963 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4964 instr->strct.index);
4965 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4966 LLVMConstInt(ctx->ac.i32, offset, 0));
4967 } else {
4968 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4969 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4970 }
4971 break;
4972 case nir_deref_type_array:
4973 if (instr->mode == nir_var_mem_global) {
4974 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4975 unsigned stride = glsl_get_explicit_stride(parent->type);
4976
4977 if ((glsl_type_is_matrix(parent->type) &&
4978 glsl_matrix_type_is_row_major(parent->type)) ||
4979 (glsl_type_is_vector(parent->type) && stride == 0))
4980 stride = type_scalar_size_bytes(parent->type);
4981
4982 assert(stride > 0);
4983 LLVMValueRef index = get_src(ctx, instr->arr.index);
4984 if (LLVMTypeOf(index) != ctx->ac.i64)
4985 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4986
4987 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4988
4989 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4990 } else {
4991 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4992 get_src(ctx, instr->arr.index));
4993 }
4994 break;
4995 case nir_deref_type_ptr_as_array:
4996 if (instr->mode == nir_var_mem_global) {
4997 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4998
4999 LLVMValueRef index = get_src(ctx, instr->arr.index);
5000 if (LLVMTypeOf(index) != ctx->ac.i64)
5001 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5002
5003 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5004
5005 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5006 } else {
5007 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5008 get_src(ctx, instr->arr.index));
5009 }
5010 break;
5011 case nir_deref_type_cast: {
5012 result = get_src(ctx, instr->parent);
5013
5014 /* We can't use the structs from LLVM because the shader
5015 * specifies its own offsets. */
5016 LLVMTypeRef pointee_type = ctx->ac.i8;
5017 if (instr->mode == nir_var_mem_shared)
5018 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5019
5020 unsigned address_space;
5021
5022 switch(instr->mode) {
5023 case nir_var_mem_shared:
5024 address_space = AC_ADDR_SPACE_LDS;
5025 break;
5026 case nir_var_mem_global:
5027 address_space = AC_ADDR_SPACE_GLOBAL;
5028 break;
5029 default:
5030 unreachable("Unhandled address space");
5031 }
5032
5033 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5034
5035 if (LLVMTypeOf(result) != type) {
5036 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5037 result = LLVMBuildBitCast(ctx->ac.builder, result,
5038 type, "");
5039 } else {
5040 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5041 type, "");
5042 }
5043 }
5044 break;
5045 }
5046 default:
5047 unreachable("Unhandled deref_instr deref type");
5048 }
5049
5050 ctx->ssa_defs[instr->dest.ssa.index] = result;
5051 }
5052
5053 static void visit_cf_list(struct ac_nir_context *ctx,
5054 struct exec_list *list);
5055
5056 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5057 {
5058 nir_foreach_instr(instr, block)
5059 {
5060 switch (instr->type) {
5061 case nir_instr_type_alu:
5062 visit_alu(ctx, nir_instr_as_alu(instr));
5063 break;
5064 case nir_instr_type_load_const:
5065 visit_load_const(ctx, nir_instr_as_load_const(instr));
5066 break;
5067 case nir_instr_type_intrinsic:
5068 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5069 break;
5070 case nir_instr_type_tex:
5071 visit_tex(ctx, nir_instr_as_tex(instr));
5072 break;
5073 case nir_instr_type_phi:
5074 visit_phi(ctx, nir_instr_as_phi(instr));
5075 break;
5076 case nir_instr_type_ssa_undef:
5077 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5078 break;
5079 case nir_instr_type_jump:
5080 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5081 break;
5082 case nir_instr_type_deref:
5083 visit_deref(ctx, nir_instr_as_deref(instr));
5084 break;
5085 default:
5086 fprintf(stderr, "Unknown NIR instr type: ");
5087 nir_print_instr(instr, stderr);
5088 fprintf(stderr, "\n");
5089 abort();
5090 }
5091 }
5092
5093 _mesa_hash_table_insert(ctx->defs, block,
5094 LLVMGetInsertBlock(ctx->ac.builder));
5095 }
5096
5097 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5098 {
5099 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5100
5101 nir_block *then_block =
5102 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5103
5104 ac_build_uif(&ctx->ac, value, then_block->index);
5105
5106 visit_cf_list(ctx, &if_stmt->then_list);
5107
5108 if (!exec_list_is_empty(&if_stmt->else_list)) {
5109 nir_block *else_block =
5110 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5111
5112 ac_build_else(&ctx->ac, else_block->index);
5113 visit_cf_list(ctx, &if_stmt->else_list);
5114 }
5115
5116 ac_build_endif(&ctx->ac, then_block->index);
5117 }
5118
5119 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5120 {
5121 nir_block *first_loop_block =
5122 (nir_block *) exec_list_get_head(&loop->body);
5123
5124 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5125
5126 visit_cf_list(ctx, &loop->body);
5127
5128 ac_build_endloop(&ctx->ac, first_loop_block->index);
5129 }
5130
5131 static void visit_cf_list(struct ac_nir_context *ctx,
5132 struct exec_list *list)
5133 {
5134 foreach_list_typed(nir_cf_node, node, node, list)
5135 {
5136 switch (node->type) {
5137 case nir_cf_node_block:
5138 visit_block(ctx, nir_cf_node_as_block(node));
5139 break;
5140
5141 case nir_cf_node_if:
5142 visit_if(ctx, nir_cf_node_as_if(node));
5143 break;
5144
5145 case nir_cf_node_loop:
5146 visit_loop(ctx, nir_cf_node_as_loop(node));
5147 break;
5148
5149 default:
5150 assert(0);
5151 }
5152 }
5153 }
5154
5155 void
5156 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5157 struct ac_shader_abi *abi,
5158 struct nir_shader *nir,
5159 struct nir_variable *variable,
5160 gl_shader_stage stage)
5161 {
5162 unsigned output_loc = variable->data.driver_location / 4;
5163 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5164
5165 /* tess ctrl has it's own load/store paths for outputs */
5166 if (stage == MESA_SHADER_TESS_CTRL)
5167 return;
5168
5169 if (stage == MESA_SHADER_VERTEX ||
5170 stage == MESA_SHADER_TESS_EVAL ||
5171 stage == MESA_SHADER_GEOMETRY) {
5172 int idx = variable->data.location + variable->data.index;
5173 if (idx == VARYING_SLOT_CLIP_DIST0) {
5174 int length = nir->info.clip_distance_array_size +
5175 nir->info.cull_distance_array_size;
5176
5177 if (length > 4)
5178 attrib_count = 2;
5179 else
5180 attrib_count = 1;
5181 }
5182 }
5183
5184 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5185 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5186 for (unsigned i = 0; i < attrib_count; ++i) {
5187 for (unsigned chan = 0; chan < 4; chan++) {
5188 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5189 ac_build_alloca_undef(ctx, type, "");
5190 }
5191 }
5192 }
5193
5194 static void
5195 setup_locals(struct ac_nir_context *ctx,
5196 struct nir_function *func)
5197 {
5198 int i, j;
5199 ctx->num_locals = 0;
5200 nir_foreach_variable(variable, &func->impl->locals) {
5201 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5202 variable->data.driver_location = ctx->num_locals * 4;
5203 variable->data.location_frac = 0;
5204 ctx->num_locals += attrib_count;
5205 }
5206 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5207 if (!ctx->locals)
5208 return;
5209
5210 for (i = 0; i < ctx->num_locals; i++) {
5211 for (j = 0; j < 4; j++) {
5212 ctx->locals[i * 4 + j] =
5213 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5214 }
5215 }
5216 }
5217
5218 static void
5219 setup_scratch(struct ac_nir_context *ctx,
5220 struct nir_shader *shader)
5221 {
5222 if (shader->scratch_size == 0)
5223 return;
5224
5225 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5226 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5227 "scratch");
5228 }
5229
5230 static void
5231 setup_constant_data(struct ac_nir_context *ctx,
5232 struct nir_shader *shader)
5233 {
5234 if (!shader->constant_data)
5235 return;
5236
5237 LLVMValueRef data =
5238 LLVMConstStringInContext(ctx->ac.context,
5239 shader->constant_data,
5240 shader->constant_data_size,
5241 true);
5242 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5243
5244 /* We want to put the constant data in the CONST address space so that
5245 * we can use scalar loads. However, LLVM versions before 10 put these
5246 * variables in the same section as the code, which is unacceptable
5247 * for RadeonSI as it needs to relocate all the data sections after
5248 * the code sections. See https://reviews.llvm.org/D65813.
5249 */
5250 unsigned address_space =
5251 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5252
5253 LLVMValueRef global =
5254 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5255 "const_data",
5256 address_space);
5257
5258 LLVMSetInitializer(global, data);
5259 LLVMSetGlobalConstant(global, true);
5260 LLVMSetVisibility(global, LLVMHiddenVisibility);
5261 ctx->constant_data = global;
5262 }
5263
5264 static void
5265 setup_shared(struct ac_nir_context *ctx,
5266 struct nir_shader *nir)
5267 {
5268 if (ctx->ac.lds)
5269 return;
5270
5271 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5272 nir->info.cs.shared_size);
5273
5274 LLVMValueRef lds =
5275 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5276 "compute_lds",
5277 AC_ADDR_SPACE_LDS);
5278 LLVMSetAlignment(lds, 64 * 1024);
5279
5280 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5281 LLVMPointerType(ctx->ac.i8,
5282 AC_ADDR_SPACE_LDS), "");
5283 }
5284
5285 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5286 const struct ac_shader_args *args, struct nir_shader *nir)
5287 {
5288 struct ac_nir_context ctx = {};
5289 struct nir_function *func;
5290
5291 ctx.ac = *ac;
5292 ctx.abi = abi;
5293 ctx.args = args;
5294
5295 ctx.stage = nir->info.stage;
5296 ctx.info = &nir->info;
5297
5298 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5299
5300 nir_foreach_variable(variable, &nir->outputs)
5301 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5302 ctx.stage);
5303
5304 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5305 _mesa_key_pointer_equal);
5306 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5307 _mesa_key_pointer_equal);
5308 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5309 _mesa_key_pointer_equal);
5310
5311 if (ctx.abi->kill_ps_if_inf_interp)
5312 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5313 _mesa_key_pointer_equal);
5314
5315 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5316
5317 nir_index_ssa_defs(func->impl);
5318 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5319
5320 setup_locals(&ctx, func);
5321 setup_scratch(&ctx, nir);
5322 setup_constant_data(&ctx, nir);
5323
5324 if (gl_shader_stage_is_compute(nir->info.stage))
5325 setup_shared(&ctx, nir);
5326
5327 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5328 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5329 /* true = don't kill. */
5330 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5331 }
5332
5333 visit_cf_list(&ctx, &func->impl->body);
5334 phi_post_pass(&ctx);
5335
5336 if (ctx.ac.postponed_kill)
5337 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5338 ctx.ac.postponed_kill, ""));
5339
5340 if (!gl_shader_stage_is_compute(nir->info.stage))
5341 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5342 ctx.abi->outputs);
5343
5344 free(ctx.locals);
5345 free(ctx.ssa_defs);
5346 ralloc_free(ctx.defs);
5347 ralloc_free(ctx.phis);
5348 ralloc_free(ctx.vars);
5349 if (ctx.abi->kill_ps_if_inf_interp)
5350 ralloc_free(ctx.verified_interp);
5351 }
5352
5353 bool
5354 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5355 {
5356 bool progress = false;
5357
5358 /* Lower large variables to scratch first so that we won't bloat the
5359 * shader by generating large if ladders for them. We later lower
5360 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5361 */
5362 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5363 nir_var_function_temp,
5364 256,
5365 glsl_get_natural_size_align_bytes);
5366
5367 /* While it would be nice not to have this flag, we are constrained
5368 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5369 */
5370 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5371
5372 /* TODO: Indirect indexing of GS inputs is unimplemented.
5373 *
5374 * TCS and TES load inputs directly from LDS or offchip memory, so
5375 * indirect indexing is trivial.
5376 */
5377 nir_variable_mode indirect_mask = 0;
5378 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5379 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5380 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5381 !llvm_has_working_vgpr_indexing)) {
5382 indirect_mask |= nir_var_shader_in;
5383 }
5384 if (!llvm_has_working_vgpr_indexing &&
5385 nir->info.stage != MESA_SHADER_TESS_CTRL)
5386 indirect_mask |= nir_var_shader_out;
5387
5388 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5389 * smart enough to handle indirects without causing excess spilling
5390 * causing the gpu to hang.
5391 *
5392 * See the following thread for more details of the problem:
5393 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5394 */
5395 indirect_mask |= nir_var_function_temp;
5396
5397 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5398 return progress;
5399 }
5400
5401 static unsigned
5402 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5403 {
5404 if (intrin->intrinsic != nir_intrinsic_store_deref)
5405 return 0;
5406
5407 nir_variable *var =
5408 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5409
5410 if (var->data.mode != nir_var_shader_out)
5411 return 0;
5412
5413 unsigned writemask = 0;
5414 const int location = var->data.location;
5415 unsigned first_component = var->data.location_frac;
5416 unsigned num_comps = intrin->dest.ssa.num_components;
5417
5418 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5419 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5420 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5421 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5422
5423 return writemask;
5424 }
5425
5426 static void
5427 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5428 unsigned *cond_block_tf_writemask,
5429 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5430 {
5431 switch (cf_node->type) {
5432 case nir_cf_node_block: {
5433 nir_block *block = nir_cf_node_as_block(cf_node);
5434 nir_foreach_instr(instr, block) {
5435 if (instr->type != nir_instr_type_intrinsic)
5436 continue;
5437
5438 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5439 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5440
5441 /* If we find a barrier in nested control flow put this in the
5442 * too hard basket. In GLSL this is not possible but it is in
5443 * SPIR-V.
5444 */
5445 if (is_nested_cf) {
5446 *tessfactors_are_def_in_all_invocs = false;
5447 return;
5448 }
5449
5450 /* The following case must be prevented:
5451 * gl_TessLevelInner = ...;
5452 * barrier();
5453 * if (gl_InvocationID == 1)
5454 * gl_TessLevelInner = ...;
5455 *
5456 * If you consider disjoint code segments separated by barriers, each
5457 * such segment that writes tess factor channels should write the same
5458 * channels in all codepaths within that segment.
5459 */
5460 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5461 /* Accumulate the result: */
5462 *tessfactors_are_def_in_all_invocs &=
5463 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5464
5465 /* Analyze the next code segment from scratch. */
5466 *upper_block_tf_writemask = 0;
5467 *cond_block_tf_writemask = 0;
5468 }
5469 } else
5470 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5471 }
5472
5473 break;
5474 }
5475 case nir_cf_node_if: {
5476 unsigned then_tessfactor_writemask = 0;
5477 unsigned else_tessfactor_writemask = 0;
5478
5479 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5480 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5481 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5482 cond_block_tf_writemask,
5483 tessfactors_are_def_in_all_invocs, true);
5484 }
5485
5486 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5487 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5488 cond_block_tf_writemask,
5489 tessfactors_are_def_in_all_invocs, true);
5490 }
5491
5492 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5493 /* If both statements write the same tess factor channels,
5494 * we can say that the upper block writes them too.
5495 */
5496 *upper_block_tf_writemask |= then_tessfactor_writemask &
5497 else_tessfactor_writemask;
5498 *cond_block_tf_writemask |= then_tessfactor_writemask |
5499 else_tessfactor_writemask;
5500 }
5501
5502 break;
5503 }
5504 case nir_cf_node_loop: {
5505 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5506 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5507 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5508 cond_block_tf_writemask,
5509 tessfactors_are_def_in_all_invocs, true);
5510 }
5511
5512 break;
5513 }
5514 default:
5515 unreachable("unknown cf node type");
5516 }
5517 }
5518
5519 bool
5520 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5521 {
5522 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5523
5524 /* The pass works as follows:
5525 * If all codepaths write tess factors, we can say that all
5526 * invocations define tess factors.
5527 *
5528 * Each tess factor channel is tracked separately.
5529 */
5530 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5531 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5532
5533 /* Initial value = true. Here the pass will accumulate results from
5534 * multiple segments surrounded by barriers. If tess factors aren't
5535 * written at all, it's a shader bug and we don't care if this will be
5536 * true.
5537 */
5538 bool tessfactors_are_def_in_all_invocs = true;
5539
5540 nir_foreach_function(function, nir) {
5541 if (function->impl) {
5542 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5543 scan_tess_ctrl(node, &main_block_tf_writemask,
5544 &cond_block_tf_writemask,
5545 &tessfactors_are_def_in_all_invocs,
5546 false);
5547 }
5548 }
5549 }
5550
5551 /* Accumulate the result for the last code segment separated by a
5552 * barrier.
5553 */
5554 if (main_block_tf_writemask || cond_block_tf_writemask) {
5555 tessfactors_are_def_in_all_invocs &=
5556 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5557 }
5558
5559 return tessfactors_are_def_in_all_invocs;
5560 }