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ac/llvm: fix bcsel for v2*16
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_1f_param_scalar(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0)
223 {
224 if (LLVMGetTypeKind(result_type) != LLVMVectorTypeKind)
225 return emit_intrin_1f_param(ctx, intrin, result_type, src0);
226
227 LLVMTypeRef elem_type = LLVMGetElementType(result_type);
228 LLVMValueRef ret = LLVMGetUndef(result_type);
229
230 /* Scalarize the intrinsic, because vectors are not supported. */
231 for (unsigned i = 0; i < LLVMGetVectorSize(result_type); i++) {
232 char name[64], type[64];
233 LLVMValueRef params[] = {
234 ac_to_float(ctx, ac_llvm_extract_elem(ctx, src0, i)),
235 };
236
237 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
238 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
239 assert(length < sizeof(name));
240 ret = LLVMBuildInsertElement(ctx->builder, ret,
241 ac_build_intrinsic(ctx, name, elem_type, params,
242 1, AC_FUNC_ATTR_READNONE),
243 LLVMConstInt(ctx->i32, i, 0), "");
244 }
245 return ret;
246 }
247
248 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
249 const char *intrin,
250 LLVMTypeRef result_type,
251 LLVMValueRef src0, LLVMValueRef src1)
252 {
253 char name[64], type[64];
254 LLVMValueRef params[] = {
255 ac_to_float(ctx, src0),
256 ac_to_float(ctx, src1),
257 };
258
259 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
260 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
261 assert(length < sizeof(name));
262 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
263 }
264
265 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
266 const char *intrin,
267 LLVMTypeRef result_type,
268 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
269 {
270 char name[64], type[64];
271 LLVMValueRef params[] = {
272 ac_to_float(ctx, src0),
273 ac_to_float(ctx, src1),
274 ac_to_float(ctx, src2),
275 };
276
277 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
278 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
279 assert(length < sizeof(name));
280 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
281 }
282
283 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
284 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
285 {
286 LLVMTypeRef src1_type = LLVMTypeOf(src1);
287 LLVMTypeRef src2_type = LLVMTypeOf(src2);
288
289 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
290 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
291 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
292 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
293 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
294 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
295 }
296
297 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
298 LLVMConstNull(LLVMTypeOf(src0)), "");
299 return LLVMBuildSelect(ctx->builder, v,
300 ac_to_integer_or_pointer(ctx, src1),
301 ac_to_integer_or_pointer(ctx, src2), "");
302 }
303
304 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
305 LLVMValueRef src0)
306 {
307 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
308 }
309
310 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
311 const char *intrin,
312 LLVMValueRef src0, LLVMValueRef src1)
313 {
314 LLVMTypeRef ret_type;
315 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
316 LLVMValueRef res;
317 LLVMValueRef params[] = { src0, src1 };
318 ret_type = LLVMStructTypeInContext(ctx->context, types,
319 2, true);
320
321 res = ac_build_intrinsic(ctx, intrin, ret_type,
322 params, 2, AC_FUNC_ATTR_READNONE);
323
324 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
325 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
326 return res;
327 }
328
329 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
330 LLVMValueRef src0,
331 unsigned bitsize)
332 {
333 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
334 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
335 "");
336 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
337
338 switch (bitsize) {
339 case 16:
340 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
341 case 32:
342 return result;
343 case 64:
344 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
345 default:
346 unreachable("Unsupported bit size.");
347 }
348 }
349
350 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
351 LLVMValueRef src0)
352 {
353 src0 = ac_to_float(ctx, src0);
354 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
355 return LLVMBuildSExt(ctx->builder,
356 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
357 ctx->i32, "");
358 }
359
360 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
361 LLVMValueRef src0,
362 unsigned bitsize)
363 {
364 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
365
366 switch (bitsize) {
367 case 8:
368 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
369 case 16:
370 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
371 case 32:
372 return result;
373 case 64:
374 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
375 default:
376 unreachable("Unsupported bit size.");
377 }
378 }
379
380 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
381 LLVMValueRef src0)
382 {
383 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
384 return LLVMBuildSExt(ctx->builder,
385 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
386 ctx->i32, "");
387 }
388
389 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
390 LLVMValueRef src0)
391 {
392 LLVMValueRef result;
393 LLVMValueRef cond = NULL;
394
395 src0 = ac_to_float(ctx, src0);
396 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
397
398 if (ctx->chip_class >= GFX8) {
399 LLVMValueRef args[2];
400 /* Check if the result is a denormal - and flush to 0 if so. */
401 args[0] = result;
402 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
403 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
404 }
405
406 /* need to convert back up to f32 */
407 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
408
409 if (ctx->chip_class >= GFX8)
410 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
411 else {
412 /* for GFX6-GFX7 */
413 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
414 * so compare the result and flush to 0 if it's smaller.
415 */
416 LLVMValueRef temp, cond2;
417 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
418 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
419 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
420 temp, "");
421 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
422 temp, ctx->f32_0, "");
423 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
424 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
425 }
426 return result;
427 }
428
429 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
430 LLVMValueRef src0, LLVMValueRef src1)
431 {
432 LLVMValueRef dst64, result;
433 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
434 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
435
436 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
437 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
438 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
439 return result;
440 }
441
442 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
443 LLVMValueRef src0, LLVMValueRef src1)
444 {
445 LLVMValueRef dst64, result;
446 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
447 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
448
449 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
450 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
451 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
452 return result;
453 }
454
455 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
456 LLVMValueRef bits, LLVMValueRef offset)
457 {
458 /* mask = ((1 << bits) - 1) << offset */
459 return LLVMBuildShl(ctx->builder,
460 LLVMBuildSub(ctx->builder,
461 LLVMBuildShl(ctx->builder,
462 ctx->i32_1,
463 bits, ""),
464 ctx->i32_1, ""),
465 offset, "");
466 }
467
468 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
469 LLVMValueRef mask, LLVMValueRef insert,
470 LLVMValueRef base)
471 {
472 /* Calculate:
473 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
474 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
475 */
476 return LLVMBuildXor(ctx->builder, base,
477 LLVMBuildAnd(ctx->builder, mask,
478 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
479 }
480
481 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
482 LLVMValueRef src0,
483 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
484 LLVMValueRef args[2]))
485 {
486 LLVMValueRef comp[2];
487
488 src0 = ac_to_float(ctx, src0);
489 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
490 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
491
492 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
493 }
494
495 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
496 LLVMValueRef src0)
497 {
498 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
499 LLVMValueRef temps[2], val;
500 int i;
501
502 for (i = 0; i < 2; i++) {
503 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
504 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
505 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
506 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
507 }
508 return ac_build_gather_values(ctx, temps, 2);
509 }
510
511 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
512 nir_op op,
513 LLVMValueRef src0)
514 {
515 unsigned mask;
516 int idx;
517 LLVMValueRef result;
518
519 if (op == nir_op_fddx_fine)
520 mask = AC_TID_MASK_LEFT;
521 else if (op == nir_op_fddy_fine)
522 mask = AC_TID_MASK_TOP;
523 else
524 mask = AC_TID_MASK_TOP_LEFT;
525
526 /* for DDX we want to next X pixel, DDY next Y pixel. */
527 if (op == nir_op_fddx_fine ||
528 op == nir_op_fddx_coarse ||
529 op == nir_op_fddx)
530 idx = 1;
531 else
532 idx = 2;
533
534 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
535 return result;
536 }
537
538 struct waterfall_context {
539 LLVMBasicBlockRef phi_bb[2];
540 bool use_waterfall;
541 };
542
543 /* To deal with divergent descriptors we can create a loop that handles all
544 * lanes with the same descriptor on a given iteration (henceforth a
545 * waterfall loop).
546 *
547 * These helper create the begin and end of the loop leaving the caller
548 * to implement the body.
549 *
550 * params:
551 * - ctx is the usal nir context
552 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
553 * - value is the possibly divergent value for which we built the loop
554 * - divergent is whether value is actually divergent. If false we just pass
555 * things through.
556 */
557 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
558 struct waterfall_context *wctx,
559 LLVMValueRef value, bool divergent)
560 {
561 /* If the app claims the value is divergent but it is constant we can
562 * end up with a dynamic index of NULL. */
563 if (!value)
564 divergent = false;
565
566 wctx->use_waterfall = divergent;
567 if (!divergent)
568 return value;
569
570 ac_build_bgnloop(&ctx->ac, 6000);
571
572 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
573
574 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
575 scalar_value, "uniform_active");
576
577 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
578 ac_build_ifcc(&ctx->ac, active, 6001);
579
580 return scalar_value;
581 }
582
583 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
584 struct waterfall_context *wctx,
585 LLVMValueRef value)
586 {
587 LLVMValueRef ret = NULL;
588 LLVMValueRef phi_src[2];
589 LLVMValueRef cc_phi_src[2] = {
590 LLVMConstInt(ctx->ac.i32, 0, false),
591 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
592 };
593
594 if (!wctx->use_waterfall)
595 return value;
596
597 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
598
599 ac_build_endif(&ctx->ac, 6001);
600
601 if (value) {
602 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
603 phi_src[1] = value;
604
605 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
606 }
607
608 /*
609 * By using the optimization barrier on the exit decision, we decouple
610 * the operations from the break, and hence avoid LLVM hoisting the
611 * opteration into the break block.
612 */
613 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
614 ac_build_optimization_barrier(&ctx->ac, &cc);
615
616 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
617 ac_build_ifcc(&ctx->ac, active, 6002);
618 ac_build_break(&ctx->ac);
619 ac_build_endif(&ctx->ac, 6002);
620
621 ac_build_endloop(&ctx->ac, 6000);
622 return ret;
623 }
624
625 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
626 {
627 LLVMValueRef src[4], result = NULL;
628 unsigned num_components = instr->dest.dest.ssa.num_components;
629 unsigned src_components;
630 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
631
632 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
633 switch (instr->op) {
634 case nir_op_vec2:
635 case nir_op_vec3:
636 case nir_op_vec4:
637 src_components = 1;
638 break;
639 case nir_op_pack_half_2x16:
640 case nir_op_pack_snorm_2x16:
641 case nir_op_pack_unorm_2x16:
642 src_components = 2;
643 break;
644 case nir_op_unpack_half_2x16:
645 src_components = 1;
646 break;
647 case nir_op_cube_face_coord:
648 case nir_op_cube_face_index:
649 src_components = 3;
650 break;
651 default:
652 src_components = num_components;
653 break;
654 }
655 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
656 src[i] = get_alu_src(ctx, instr->src[i], src_components);
657
658 switch (instr->op) {
659 case nir_op_mov:
660 result = src[0];
661 break;
662 case nir_op_fneg:
663 src[0] = ac_to_float(&ctx->ac, src[0]);
664 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
665 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
666 /* fneg will be optimized by backend compiler with sign
667 * bit removed via XOR. This is probably a LLVM bug.
668 */
669 result = ac_build_canonicalize(&ctx->ac, result,
670 instr->dest.dest.ssa.bit_size);
671 }
672 break;
673 case nir_op_ineg:
674 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
675 break;
676 case nir_op_inot:
677 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
678 break;
679 case nir_op_iadd:
680 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
681 break;
682 case nir_op_fadd:
683 src[0] = ac_to_float(&ctx->ac, src[0]);
684 src[1] = ac_to_float(&ctx->ac, src[1]);
685 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
686 break;
687 case nir_op_fsub:
688 src[0] = ac_to_float(&ctx->ac, src[0]);
689 src[1] = ac_to_float(&ctx->ac, src[1]);
690 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
691 break;
692 case nir_op_isub:
693 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_imul:
696 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
697 break;
698 case nir_op_imod:
699 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
700 break;
701 case nir_op_umod:
702 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
703 break;
704 case nir_op_fmod:
705 /* lower_fmod only lower 16-bit and 32-bit fmod */
706 assert(instr->dest.dest.ssa.bit_size == 64);
707 src[0] = ac_to_float(&ctx->ac, src[0]);
708 src[1] = ac_to_float(&ctx->ac, src[1]);
709 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
710 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
711 ac_to_float_type(&ctx->ac, def_type), result);
712 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
713 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
714 break;
715 case nir_op_irem:
716 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
717 break;
718 case nir_op_idiv:
719 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
720 break;
721 case nir_op_udiv:
722 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
723 break;
724 case nir_op_fmul:
725 src[0] = ac_to_float(&ctx->ac, src[0]);
726 src[1] = ac_to_float(&ctx->ac, src[1]);
727 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
728 break;
729 case nir_op_frcp:
730 /* For doubles, we need precise division to pass GLCTS. */
731 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
732 ac_get_type_size(def_type) == 8) {
733 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
734 ac_to_float(&ctx->ac, src[0]), "");
735 } else {
736 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.rcp",
737 ac_to_float_type(&ctx->ac, def_type), src[0]);
738 }
739 if (ctx->abi->clamp_div_by_zero)
740 result = ac_build_fmin(&ctx->ac, result,
741 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
742 break;
743 case nir_op_iand:
744 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
745 break;
746 case nir_op_ior:
747 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
748 break;
749 case nir_op_ixor:
750 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
751 break;
752 case nir_op_ishl:
753 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
754 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
755 LLVMTypeOf(src[0]), "");
756 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
757 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
758 LLVMTypeOf(src[0]), "");
759 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
760 break;
761 case nir_op_ishr:
762 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
763 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
764 LLVMTypeOf(src[0]), "");
765 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
766 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
767 LLVMTypeOf(src[0]), "");
768 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
769 break;
770 case nir_op_ushr:
771 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
772 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
773 LLVMTypeOf(src[0]), "");
774 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
775 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
776 LLVMTypeOf(src[0]), "");
777 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
778 break;
779 case nir_op_ilt32:
780 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
781 break;
782 case nir_op_ine32:
783 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
784 break;
785 case nir_op_ieq32:
786 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
787 break;
788 case nir_op_ige32:
789 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
790 break;
791 case nir_op_ult32:
792 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
793 break;
794 case nir_op_uge32:
795 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
796 break;
797 case nir_op_feq32:
798 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
799 break;
800 case nir_op_fneu32:
801 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
802 break;
803 case nir_op_flt32:
804 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
805 break;
806 case nir_op_fge32:
807 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
808 break;
809 case nir_op_fabs:
810 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
811 ac_to_float_type(&ctx->ac, def_type), src[0]);
812 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
813 /* fabs will be optimized by backend compiler with sign
814 * bit removed via AND.
815 */
816 result = ac_build_canonicalize(&ctx->ac, result,
817 instr->dest.dest.ssa.bit_size);
818 }
819 break;
820 case nir_op_iabs:
821 result = emit_iabs(&ctx->ac, src[0]);
822 break;
823 case nir_op_imax:
824 result = ac_build_imax(&ctx->ac, src[0], src[1]);
825 break;
826 case nir_op_imin:
827 result = ac_build_imin(&ctx->ac, src[0], src[1]);
828 break;
829 case nir_op_umax:
830 result = ac_build_umax(&ctx->ac, src[0], src[1]);
831 break;
832 case nir_op_umin:
833 result = ac_build_umin(&ctx->ac, src[0], src[1]);
834 break;
835 case nir_op_isign:
836 result = ac_build_isign(&ctx->ac, src[0],
837 instr->dest.dest.ssa.bit_size);
838 break;
839 case nir_op_fsign:
840 src[0] = ac_to_float(&ctx->ac, src[0]);
841 result = ac_build_fsign(&ctx->ac, src[0],
842 instr->dest.dest.ssa.bit_size);
843 break;
844 case nir_op_ffloor:
845 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
846 ac_to_float_type(&ctx->ac, def_type), src[0]);
847 break;
848 case nir_op_ftrunc:
849 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
850 ac_to_float_type(&ctx->ac, def_type), src[0]);
851 break;
852 case nir_op_fceil:
853 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
854 ac_to_float_type(&ctx->ac, def_type), src[0]);
855 break;
856 case nir_op_fround_even:
857 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
858 ac_to_float_type(&ctx->ac, def_type),src[0]);
859 break;
860 case nir_op_ffract:
861 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.fract",
862 ac_to_float_type(&ctx->ac, def_type), src[0]);
863 break;
864 case nir_op_fsin:
865 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
866 ac_to_float_type(&ctx->ac, def_type), src[0]);
867 break;
868 case nir_op_fcos:
869 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
870 ac_to_float_type(&ctx->ac, def_type), src[0]);
871 break;
872 case nir_op_fsqrt:
873 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
874 ac_to_float_type(&ctx->ac, def_type), src[0]);
875 break;
876 case nir_op_fexp2:
877 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
878 ac_to_float_type(&ctx->ac, def_type), src[0]);
879 break;
880 case nir_op_flog2:
881 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
882 ac_to_float_type(&ctx->ac, def_type), src[0]);
883 break;
884 case nir_op_frsq:
885 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.rsq",
886 ac_to_float_type(&ctx->ac, def_type), src[0]);
887 if (ctx->abi->clamp_div_by_zero)
888 result = ac_build_fmin(&ctx->ac, result,
889 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
890 break;
891 case nir_op_frexp_exp:
892 src[0] = ac_to_float(&ctx->ac, src[0]);
893 result = ac_build_frexp_exp(&ctx->ac, src[0],
894 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
895 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
896 result = LLVMBuildSExt(ctx->ac.builder, result,
897 ctx->ac.i32, "");
898 break;
899 case nir_op_frexp_sig:
900 src[0] = ac_to_float(&ctx->ac, src[0]);
901 result = ac_build_frexp_mant(&ctx->ac, src[0],
902 instr->dest.dest.ssa.bit_size);
903 break;
904 case nir_op_fpow:
905 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
906 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
907 break;
908 case nir_op_fmax:
909 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
910 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
911 if (ctx->ac.chip_class < GFX9 &&
912 instr->dest.dest.ssa.bit_size == 32) {
913 /* Only pre-GFX9 chips do not flush denorms. */
914 result = ac_build_canonicalize(&ctx->ac, result,
915 instr->dest.dest.ssa.bit_size);
916 }
917 break;
918 case nir_op_fmin:
919 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
920 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
921 if (ctx->ac.chip_class < GFX9 &&
922 instr->dest.dest.ssa.bit_size == 32) {
923 /* Only pre-GFX9 chips do not flush denorms. */
924 result = ac_build_canonicalize(&ctx->ac, result,
925 instr->dest.dest.ssa.bit_size);
926 }
927 break;
928 case nir_op_ffma:
929 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
930 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
931 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
932 break;
933 case nir_op_ldexp:
934 src[0] = ac_to_float(&ctx->ac, src[0]);
935 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
936 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
937 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
938 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
939 else
940 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
941 break;
942 case nir_op_bfm:
943 result = emit_bfm(&ctx->ac, src[0], src[1]);
944 break;
945 case nir_op_bitfield_select:
946 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
947 break;
948 case nir_op_ubfe:
949 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
950 break;
951 case nir_op_ibfe:
952 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
953 break;
954 case nir_op_bitfield_reverse:
955 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
956 break;
957 case nir_op_bit_count:
958 result = ac_build_bit_count(&ctx->ac, src[0]);
959 break;
960 case nir_op_vec2:
961 case nir_op_vec3:
962 case nir_op_vec4:
963 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
964 src[i] = ac_to_integer(&ctx->ac, src[i]);
965 result = ac_build_gather_values(&ctx->ac, src, num_components);
966 break;
967 case nir_op_f2i8:
968 case nir_op_f2i16:
969 case nir_op_f2i32:
970 case nir_op_f2i64:
971 src[0] = ac_to_float(&ctx->ac, src[0]);
972 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
973 break;
974 case nir_op_f2u8:
975 case nir_op_f2u16:
976 case nir_op_f2u32:
977 case nir_op_f2u64:
978 src[0] = ac_to_float(&ctx->ac, src[0]);
979 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
980 break;
981 case nir_op_i2f16:
982 case nir_op_i2f32:
983 case nir_op_i2f64:
984 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
985 break;
986 case nir_op_u2f16:
987 case nir_op_u2f32:
988 case nir_op_u2f64:
989 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
990 break;
991 case nir_op_f2f16_rtz:
992 case nir_op_f2f16:
993 case nir_op_f2fmp:
994 src[0] = ac_to_float(&ctx->ac, src[0]);
995
996 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
997 * all f32->f16 conversions have to round towards zero, because both scalar
998 * and vec2 down-conversions have to round equally.
999 */
1000 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
1001 instr->op == nir_op_f2f16_rtz) {
1002 src[0] = ac_to_float(&ctx->ac, src[0]);
1003
1004 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
1005 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
1006
1007 /* Fast path conversion. This only works if NIR is vectorized
1008 * to vec2 16.
1009 */
1010 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
1011 LLVMValueRef args[] = {
1012 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
1013 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
1014 };
1015 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
1016 break;
1017 }
1018
1019 assert(ac_get_llvm_num_components(src[0]) == 1);
1020 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
1021 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
1022 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
1023 } else {
1024 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1025 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1026 else
1027 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1028 }
1029 break;
1030 case nir_op_f2f16_rtne:
1031 case nir_op_f2f32:
1032 case nir_op_f2f64:
1033 src[0] = ac_to_float(&ctx->ac, src[0]);
1034 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1035 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1036 else
1037 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1038 break;
1039 case nir_op_u2u8:
1040 case nir_op_u2u16:
1041 case nir_op_u2ump:
1042 case nir_op_u2u32:
1043 case nir_op_u2u64:
1044 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1045 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1046 else
1047 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1048 break;
1049 case nir_op_i2i8:
1050 case nir_op_i2i16:
1051 case nir_op_i2imp:
1052 case nir_op_i2i32:
1053 case nir_op_i2i64:
1054 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1055 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1056 else
1057 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1058 break;
1059 case nir_op_b32csel:
1060 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1061 break;
1062 case nir_op_find_lsb:
1063 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1064 break;
1065 case nir_op_ufind_msb:
1066 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1067 break;
1068 case nir_op_ifind_msb:
1069 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1070 break;
1071 case nir_op_uadd_carry:
1072 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1073 break;
1074 case nir_op_usub_borrow:
1075 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1076 break;
1077 case nir_op_b2f16:
1078 case nir_op_b2f32:
1079 case nir_op_b2f64:
1080 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1081 break;
1082 case nir_op_f2b32:
1083 result = emit_f2b(&ctx->ac, src[0]);
1084 break;
1085 case nir_op_b2i8:
1086 case nir_op_b2i16:
1087 case nir_op_b2i32:
1088 case nir_op_b2i64:
1089 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1090 break;
1091 case nir_op_i2b32:
1092 result = emit_i2b(&ctx->ac, src[0]);
1093 break;
1094 case nir_op_fquantize2f16:
1095 result = emit_f2f16(&ctx->ac, src[0]);
1096 break;
1097 case nir_op_umul_high:
1098 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1099 break;
1100 case nir_op_imul_high:
1101 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1102 break;
1103 case nir_op_pack_half_2x16:
1104 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1105 break;
1106 case nir_op_pack_snorm_2x16:
1107 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1108 break;
1109 case nir_op_pack_unorm_2x16:
1110 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1111 break;
1112 case nir_op_unpack_half_2x16:
1113 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1114 break;
1115 case nir_op_fddx:
1116 case nir_op_fddy:
1117 case nir_op_fddx_fine:
1118 case nir_op_fddy_fine:
1119 case nir_op_fddx_coarse:
1120 case nir_op_fddy_coarse:
1121 result = emit_ddxy(ctx, instr->op, src[0]);
1122 break;
1123
1124 case nir_op_unpack_64_2x32_split_x: {
1125 assert(ac_get_llvm_num_components(src[0]) == 1);
1126 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1127 ctx->ac.v2i32,
1128 "");
1129 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1130 ctx->ac.i32_0, "");
1131 break;
1132 }
1133
1134 case nir_op_unpack_64_2x32_split_y: {
1135 assert(ac_get_llvm_num_components(src[0]) == 1);
1136 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1137 ctx->ac.v2i32,
1138 "");
1139 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1140 ctx->ac.i32_1, "");
1141 break;
1142 }
1143
1144 case nir_op_pack_64_2x32_split: {
1145 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1146 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1147 break;
1148 }
1149
1150 case nir_op_pack_32_2x16_split: {
1151 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1152 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1153 break;
1154 }
1155
1156 case nir_op_unpack_32_2x16_split_x: {
1157 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1158 ctx->ac.v2i16,
1159 "");
1160 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1161 ctx->ac.i32_0, "");
1162 break;
1163 }
1164
1165 case nir_op_unpack_32_2x16_split_y: {
1166 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1167 ctx->ac.v2i16,
1168 "");
1169 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1170 ctx->ac.i32_1, "");
1171 break;
1172 }
1173
1174 case nir_op_cube_face_coord: {
1175 src[0] = ac_to_float(&ctx->ac, src[0]);
1176 LLVMValueRef results[2];
1177 LLVMValueRef in[3];
1178 for (unsigned chan = 0; chan < 3; chan++)
1179 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1180 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1181 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1182 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1183 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1184 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1185 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1186 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1187 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1188 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1189 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1190 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1191 result = ac_build_gather_values(&ctx->ac, results, 2);
1192 break;
1193 }
1194
1195 case nir_op_cube_face_index: {
1196 src[0] = ac_to_float(&ctx->ac, src[0]);
1197 LLVMValueRef in[3];
1198 for (unsigned chan = 0; chan < 3; chan++)
1199 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1200 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1201 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1202 break;
1203 }
1204
1205 default:
1206 fprintf(stderr, "Unknown NIR alu instr: ");
1207 nir_print_instr(&instr->instr, stderr);
1208 fprintf(stderr, "\n");
1209 abort();
1210 }
1211
1212 if (result) {
1213 assert(instr->dest.dest.is_ssa);
1214 result = ac_to_integer_or_pointer(&ctx->ac, result);
1215 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1216 }
1217 }
1218
1219 static void visit_load_const(struct ac_nir_context *ctx,
1220 const nir_load_const_instr *instr)
1221 {
1222 LLVMValueRef values[4], value = NULL;
1223 LLVMTypeRef element_type =
1224 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1225
1226 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1227 switch (instr->def.bit_size) {
1228 case 8:
1229 values[i] = LLVMConstInt(element_type,
1230 instr->value[i].u8, false);
1231 break;
1232 case 16:
1233 values[i] = LLVMConstInt(element_type,
1234 instr->value[i].u16, false);
1235 break;
1236 case 32:
1237 values[i] = LLVMConstInt(element_type,
1238 instr->value[i].u32, false);
1239 break;
1240 case 64:
1241 values[i] = LLVMConstInt(element_type,
1242 instr->value[i].u64, false);
1243 break;
1244 default:
1245 fprintf(stderr,
1246 "unsupported nir load_const bit_size: %d\n",
1247 instr->def.bit_size);
1248 abort();
1249 }
1250 }
1251 if (instr->def.num_components > 1) {
1252 value = LLVMConstVector(values, instr->def.num_components);
1253 } else
1254 value = values[0];
1255
1256 ctx->ssa_defs[instr->def.index] = value;
1257 }
1258
1259 static LLVMValueRef
1260 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1261 {
1262 LLVMValueRef size =
1263 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1264 LLVMConstInt(ctx->ac.i32, 2, false), "");
1265
1266 /* GFX8 only */
1267 if (ctx->ac.chip_class == GFX8 && in_elements) {
1268 /* On GFX8, the descriptor contains the size in bytes,
1269 * but TXQ must return the size in elements.
1270 * The stride is always non-zero for resources using TXQ.
1271 */
1272 LLVMValueRef stride =
1273 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1274 ctx->ac.i32_1, "");
1275 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1276 LLVMConstInt(ctx->ac.i32, 16, false), "");
1277 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1278 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1279
1280 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1281 }
1282 return size;
1283 }
1284
1285 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1286 * incorrectly forces nearest filtering if the texture format is integer.
1287 * The only effect it has on Gather4, which always returns 4 texels for
1288 * bilinear filtering, is that the final coordinates are off by 0.5 of
1289 * the texel size.
1290 *
1291 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1292 * or (0.5 / size) from the normalized coordinates.
1293 *
1294 * However, cube textures with 8_8_8_8 data formats require a different
1295 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1296 * precision in 32-bit data formats, so it needs to be applied dynamically at
1297 * runtime. In this case, return an i1 value that indicates whether the
1298 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1299 */
1300 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1301 nir_variable *var,
1302 struct ac_image_args *args,
1303 const nir_tex_instr *instr)
1304 {
1305 const struct glsl_type *type = glsl_without_array(var->type);
1306 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1307 LLVMValueRef wa_8888 = NULL;
1308 LLVMValueRef half_texel[2];
1309 LLVMValueRef result;
1310
1311 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1312
1313 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1314 LLVMValueRef formats;
1315 LLVMValueRef data_format;
1316 LLVMValueRef wa_formats;
1317
1318 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1319
1320 data_format = LLVMBuildLShr(ctx->builder, formats,
1321 LLVMConstInt(ctx->i32, 20, false), "");
1322 data_format = LLVMBuildAnd(ctx->builder, data_format,
1323 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1324 wa_8888 = LLVMBuildICmp(
1325 ctx->builder, LLVMIntEQ, data_format,
1326 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1327 "");
1328
1329 uint32_t wa_num_format =
1330 stype == GLSL_TYPE_UINT ?
1331 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1332 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1333 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1334 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1335 "");
1336 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1337 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1338
1339 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1340 args->resource = LLVMBuildInsertElement(
1341 ctx->builder, args->resource, formats, ctx->i32_1, "");
1342 }
1343
1344 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1345 assert(!wa_8888);
1346 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1347 } else {
1348 struct ac_image_args resinfo = {};
1349 LLVMBasicBlockRef bbs[2];
1350
1351 LLVMValueRef unnorm = NULL;
1352 LLVMValueRef default_offset = ctx->f32_0;
1353 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1354 !instr->is_array) {
1355 /* In vulkan, whether the sampler uses unnormalized
1356 * coordinates or not is a dynamic property of the
1357 * sampler. Hence, to figure out whether or not we
1358 * need to divide by the texture size, we need to test
1359 * the sampler at runtime. This tests the bit set by
1360 * radv_init_sampler().
1361 */
1362 LLVMValueRef sampler0 =
1363 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1364 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1365 LLVMConstInt(ctx->i32, 15, false), "");
1366 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1367 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1368 default_offset = LLVMConstReal(ctx->f32, -0.5);
1369 }
1370
1371 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1372 if (wa_8888 || unnorm) {
1373 assert(!(wa_8888 && unnorm));
1374 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1375 /* Skip the texture size query entirely if we don't need it. */
1376 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1377 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1378 }
1379
1380 /* Query the texture size. */
1381 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1382 resinfo.opcode = ac_image_get_resinfo;
1383 resinfo.dmask = 0xf;
1384 resinfo.lod = ctx->i32_0;
1385 resinfo.resource = args->resource;
1386 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1387 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1388
1389 /* Compute -0.5 / size. */
1390 for (unsigned c = 0; c < 2; c++) {
1391 half_texel[c] =
1392 LLVMBuildExtractElement(ctx->builder, size,
1393 LLVMConstInt(ctx->i32, c, 0), "");
1394 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1395 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1396 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1397 LLVMConstReal(ctx->f32, -0.5), "");
1398 }
1399
1400 if (wa_8888 || unnorm) {
1401 ac_build_endif(ctx, 2000);
1402
1403 for (unsigned c = 0; c < 2; c++) {
1404 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1405 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1406 values, bbs);
1407 }
1408 }
1409 }
1410
1411 for (unsigned c = 0; c < 2; c++) {
1412 LLVMValueRef tmp;
1413 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1414 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1415 }
1416
1417 args->attributes = AC_FUNC_ATTR_READNONE;
1418 result = ac_build_image_opcode(ctx, args);
1419
1420 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1421 LLVMValueRef tmp, tmp2;
1422
1423 /* if the cube workaround is in place, f2i the result. */
1424 for (unsigned c = 0; c < 4; c++) {
1425 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1426 if (stype == GLSL_TYPE_UINT)
1427 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1428 else
1429 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1430 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1431 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1432 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1433 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1434 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1435 }
1436 }
1437 return result;
1438 }
1439
1440 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1441 {
1442 nir_deref_instr *texture_deref_instr = NULL;
1443
1444 for (unsigned i = 0; i < instr->num_srcs; i++) {
1445 switch (instr->src[i].src_type) {
1446 case nir_tex_src_texture_deref:
1447 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1448 break;
1449 default:
1450 break;
1451 }
1452 }
1453 return texture_deref_instr;
1454 }
1455
1456 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1457 const nir_tex_instr *instr,
1458 struct ac_image_args *args)
1459 {
1460 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1461 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1462
1463 assert(instr->dest.is_ssa);
1464 return ac_build_buffer_load_format(&ctx->ac,
1465 args->resource,
1466 args->coords[0],
1467 ctx->ac.i32_0,
1468 util_last_bit(mask),
1469 0, true,
1470 instr->dest.ssa.bit_size == 16);
1471 }
1472
1473 args->opcode = ac_image_sample;
1474
1475 switch (instr->op) {
1476 case nir_texop_txf:
1477 case nir_texop_txf_ms:
1478 case nir_texop_samples_identical:
1479 args->opcode = args->level_zero ||
1480 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1481 ac_image_load : ac_image_load_mip;
1482 args->level_zero = false;
1483 break;
1484 case nir_texop_txs:
1485 case nir_texop_query_levels:
1486 args->opcode = ac_image_get_resinfo;
1487 if (!args->lod)
1488 args->lod = ctx->ac.i32_0;
1489 args->level_zero = false;
1490 break;
1491 case nir_texop_tex:
1492 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1493 assert(!args->lod);
1494 args->level_zero = true;
1495 }
1496 break;
1497 case nir_texop_tg4:
1498 args->opcode = ac_image_gather4;
1499 if (!args->lod && !args->bias)
1500 args->level_zero = true;
1501 break;
1502 case nir_texop_lod:
1503 args->opcode = ac_image_get_lod;
1504 break;
1505 case nir_texop_fragment_fetch:
1506 case nir_texop_fragment_mask_fetch:
1507 args->opcode = ac_image_load;
1508 args->level_zero = false;
1509 break;
1510 default:
1511 break;
1512 }
1513
1514 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1515 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1516 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1517 const struct glsl_type *type = glsl_without_array(var->type);
1518 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1519 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1520 return lower_gather4_integer(&ctx->ac, var, args, instr);
1521 }
1522 }
1523
1524 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1525 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1526 if ((args->dim == ac_image_2darray ||
1527 args->dim == ac_image_2d) && !args->coords[1]) {
1528 args->coords[1] = ctx->ac.i32_0;
1529 }
1530 }
1531
1532 args->attributes = AC_FUNC_ATTR_READNONE;
1533 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1534 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1535 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1536 /* Prevent texture instructions with implicit derivatives from being
1537 * sinked into branches. */
1538 switch (instr->op) {
1539 case nir_texop_tex:
1540 case nir_texop_txb:
1541 case nir_texop_lod:
1542 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1543 break;
1544 default:
1545 break;
1546 }
1547 }
1548
1549 return ac_build_image_opcode(&ctx->ac, args);
1550 }
1551
1552 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1553 nir_intrinsic_instr *instr)
1554 {
1555 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1556 LLVMValueRef index = get_src(ctx, instr->src[1]);
1557
1558 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1559 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1560 return result;
1561 }
1562
1563 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1564 nir_intrinsic_instr *instr)
1565 {
1566 LLVMValueRef ptr, addr;
1567 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1568 unsigned index = nir_intrinsic_base(instr);
1569
1570 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1571 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1572
1573 /* Load constant values from user SGPRS when possible, otherwise
1574 * fallback to the default path that loads directly from memory.
1575 */
1576 if (LLVMIsConstant(src0) &&
1577 instr->dest.ssa.bit_size == 32) {
1578 unsigned count = instr->dest.ssa.num_components;
1579 unsigned offset = index;
1580
1581 offset += LLVMConstIntGetZExtValue(src0);
1582 offset /= 4;
1583
1584 offset -= ctx->args->base_inline_push_consts;
1585
1586 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1587 if (offset + count <= num_inline_push_consts) {
1588 LLVMValueRef push_constants[num_inline_push_consts];
1589 for (unsigned i = 0; i < num_inline_push_consts; i++)
1590 push_constants[i] = ac_get_arg(&ctx->ac,
1591 ctx->args->inline_push_consts[i]);
1592 return ac_build_gather_values(&ctx->ac,
1593 push_constants + offset,
1594 count);
1595 }
1596 }
1597
1598 ptr = LLVMBuildGEP(ctx->ac.builder,
1599 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1600
1601 if (instr->dest.ssa.bit_size == 8) {
1602 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1603 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1604 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1605 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1606
1607 LLVMValueRef params[3];
1608 if (load_dwords > 1) {
1609 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1610 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1611 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1612 } else {
1613 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1614 params[0] = ctx->ac.i32_0;
1615 params[1] = res;
1616 }
1617 params[2] = addr;
1618 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1619
1620 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1621 if (instr->dest.ssa.num_components > 1)
1622 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1623 return res;
1624 } else if (instr->dest.ssa.bit_size == 16) {
1625 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1626 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1627 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1628 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1629 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1630 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1631 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1632 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1633 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1634 LLVMConstInt(ctx->ac.i32, 4, false)};
1635 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1636 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1637 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1638 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1639 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1640 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1641 }
1642
1643 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1644
1645 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1646 }
1647
1648 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1649 const nir_intrinsic_instr *instr)
1650 {
1651 LLVMValueRef index = get_src(ctx, instr->src[0]);
1652
1653 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1654 }
1655
1656 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1657 {
1658 uint32_t new_mask = 0;
1659 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1660 if (mask & (1u << i))
1661 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1662 return new_mask;
1663 }
1664
1665 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1666 unsigned start, unsigned count)
1667 {
1668 LLVMValueRef mask[] = {
1669 ctx->i32_0, ctx->i32_1,
1670 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1671
1672 unsigned src_elements = ac_get_llvm_num_components(src);
1673
1674 if (count == src_elements) {
1675 assert(start == 0);
1676 return src;
1677 } else if (count == 1) {
1678 assert(start < src_elements);
1679 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1680 } else {
1681 assert(start + count <= src_elements);
1682 assert(count <= 4);
1683 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1684 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1685 }
1686 }
1687
1688 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1689 enum gl_access_qualifier access,
1690 bool may_store_unaligned,
1691 bool writeonly_memory)
1692 {
1693 unsigned cache_policy = 0;
1694
1695 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1696 * store opcodes not aligned to a dword are affected. The only way to
1697 * get unaligned stores is through shader images.
1698 */
1699 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1700 /* If this is write-only, don't keep data in L1 to prevent
1701 * evicting L1 cache lines that may be needed by other
1702 * instructions.
1703 */
1704 writeonly_memory ||
1705 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1706 cache_policy |= ac_glc;
1707 }
1708
1709 if (access & ACCESS_STREAM_CACHE_POLICY)
1710 cache_policy |= ac_slc | ac_glc;
1711
1712 return cache_policy;
1713 }
1714
1715 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1716 struct waterfall_context *wctx,
1717 const nir_intrinsic_instr *instr,
1718 nir_src src)
1719 {
1720 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1721 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1722 }
1723
1724 static void visit_store_ssbo(struct ac_nir_context *ctx,
1725 nir_intrinsic_instr *instr)
1726 {
1727 if (ctx->ac.postponed_kill) {
1728 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1729 ctx->ac.postponed_kill, "");
1730 ac_build_ifcc(&ctx->ac, cond, 7000);
1731 }
1732
1733 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1734 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1735 unsigned writemask = nir_intrinsic_write_mask(instr);
1736 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1737 bool writeonly_memory = access & ACCESS_NON_READABLE;
1738 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1739
1740 struct waterfall_context wctx;
1741 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1742
1743 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1744 LLVMValueRef base_data = src_data;
1745 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1746 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1747
1748 while (writemask) {
1749 int start, count;
1750 LLVMValueRef data, offset;
1751 LLVMTypeRef data_type;
1752
1753 u_bit_scan_consecutive_range(&writemask, &start, &count);
1754
1755 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1756 * writes into a 2-element and a 1-element write. */
1757 if (count == 3 &&
1758 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1759 writemask |= 1 << (start + 2);
1760 count = 2;
1761 }
1762 int num_bytes = count * elem_size_bytes; /* count in bytes */
1763
1764 /* we can only store 4 DWords at the same time.
1765 * can only happen for 64 Bit vectors. */
1766 if (num_bytes > 16) {
1767 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1768 count = 2;
1769 num_bytes = 16;
1770 }
1771
1772 /* check alignment of 16 Bit stores */
1773 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1774 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1775 count = 1;
1776 num_bytes = 2;
1777 }
1778
1779 /* Due to alignment issues, split stores of 8-bit/16-bit
1780 * vectors.
1781 */
1782 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1783 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1784 count = 1;
1785 num_bytes = elem_size_bytes;
1786 }
1787
1788 data = extract_vector_range(&ctx->ac, base_data, start, count);
1789
1790 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1791 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1792
1793 if (num_bytes == 1) {
1794 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1795 offset, ctx->ac.i32_0,
1796 cache_policy);
1797 } else if (num_bytes == 2) {
1798 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1799 offset, ctx->ac.i32_0,
1800 cache_policy);
1801 } else {
1802 int num_channels = num_bytes / 4;
1803
1804 switch (num_bytes) {
1805 case 16: /* v4f32 */
1806 data_type = ctx->ac.v4f32;
1807 break;
1808 case 12: /* v3f32 */
1809 data_type = ctx->ac.v3f32;
1810 break;
1811 case 8: /* v2f32 */
1812 data_type = ctx->ac.v2f32;
1813 break;
1814 case 4: /* f32 */
1815 data_type = ctx->ac.f32;
1816 break;
1817 default:
1818 unreachable("Malformed vector store.");
1819 }
1820 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1821
1822 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1823 num_channels, offset,
1824 ctx->ac.i32_0, 0,
1825 cache_policy);
1826 }
1827 }
1828
1829 exit_waterfall(ctx, &wctx, NULL);
1830
1831 if (ctx->ac.postponed_kill)
1832 ac_build_endif(&ctx->ac, 7000);
1833 }
1834
1835 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1836 LLVMValueRef descriptor,
1837 LLVMValueRef offset,
1838 LLVMValueRef compare,
1839 LLVMValueRef exchange)
1840 {
1841 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1842 if (ctx->abi->robust_buffer_access) {
1843 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1844
1845 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1846 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1847
1848 ac_build_ifcc(&ctx->ac, cond, -1);
1849
1850 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1851 }
1852
1853 LLVMValueRef ptr_parts[2] = {
1854 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1855 LLVMBuildAnd(ctx->ac.builder,
1856 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1857 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1858 };
1859
1860 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1861 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1862
1863 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1864
1865 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1866 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1867 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1868 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1869
1870 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1871 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1872
1873 if (ctx->abi->robust_buffer_access) {
1874 ac_build_endif(&ctx->ac, -1);
1875
1876 LLVMBasicBlockRef incoming_blocks[2] = {
1877 start_block,
1878 then_block,
1879 };
1880
1881 LLVMValueRef incoming_values[2] = {
1882 LLVMConstInt(ctx->ac.i64, 0, 0),
1883 result,
1884 };
1885 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1886 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1887 return ret;
1888 } else {
1889 return result;
1890 }
1891 }
1892
1893 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1894 nir_intrinsic_instr *instr)
1895 {
1896 if (ctx->ac.postponed_kill) {
1897 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1898 ctx->ac.postponed_kill, "");
1899 ac_build_ifcc(&ctx->ac, cond, 7001);
1900 }
1901
1902 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1903 const char *op;
1904 char name[64], type[8];
1905 LLVMValueRef params[6], descriptor;
1906 LLVMValueRef result;
1907 int arg_count = 0;
1908
1909 struct waterfall_context wctx;
1910 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1911
1912 switch (instr->intrinsic) {
1913 case nir_intrinsic_ssbo_atomic_add:
1914 op = "add";
1915 break;
1916 case nir_intrinsic_ssbo_atomic_imin:
1917 op = "smin";
1918 break;
1919 case nir_intrinsic_ssbo_atomic_umin:
1920 op = "umin";
1921 break;
1922 case nir_intrinsic_ssbo_atomic_imax:
1923 op = "smax";
1924 break;
1925 case nir_intrinsic_ssbo_atomic_umax:
1926 op = "umax";
1927 break;
1928 case nir_intrinsic_ssbo_atomic_and:
1929 op = "and";
1930 break;
1931 case nir_intrinsic_ssbo_atomic_or:
1932 op = "or";
1933 break;
1934 case nir_intrinsic_ssbo_atomic_xor:
1935 op = "xor";
1936 break;
1937 case nir_intrinsic_ssbo_atomic_exchange:
1938 op = "swap";
1939 break;
1940 case nir_intrinsic_ssbo_atomic_comp_swap:
1941 op = "cmpswap";
1942 break;
1943 default:
1944 abort();
1945 }
1946
1947 descriptor = ctx->abi->load_ssbo(ctx->abi,
1948 rsrc_base,
1949 true);
1950
1951 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1952 return_type == ctx->ac.i64) {
1953 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1954 get_src(ctx, instr->src[1]),
1955 get_src(ctx, instr->src[2]),
1956 get_src(ctx, instr->src[3]));
1957 } else {
1958 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1959 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1960 }
1961 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1962 params[arg_count++] = descriptor;
1963
1964 if (LLVM_VERSION_MAJOR >= 9) {
1965 /* XXX: The new raw/struct atomic intrinsics are buggy with
1966 * LLVM 8, see r358579.
1967 */
1968 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1969 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1970 params[arg_count++] = ctx->ac.i32_0; /* slc */
1971
1972 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1973 snprintf(name, sizeof(name),
1974 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1975 } else {
1976 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1977 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1978 params[arg_count++] = ctx->ac.i1false; /* slc */
1979
1980 assert(return_type == ctx->ac.i32);
1981 snprintf(name, sizeof(name),
1982 "llvm.amdgcn.buffer.atomic.%s", op);
1983 }
1984
1985 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1986 arg_count, 0);
1987 }
1988
1989 result = exit_waterfall(ctx, &wctx, result);
1990 if (ctx->ac.postponed_kill)
1991 ac_build_endif(&ctx->ac, 7001);
1992 return result;
1993 }
1994
1995 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1996 nir_intrinsic_instr *instr)
1997 {
1998 struct waterfall_context wctx;
1999 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
2000
2001 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
2002 int num_components = instr->num_components;
2003 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2004 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
2005
2006 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2007 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
2008 LLVMValueRef vindex = ctx->ac.i32_0;
2009
2010 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
2011 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
2012
2013 LLVMValueRef results[4];
2014 for (int i = 0; i < num_components;) {
2015 int num_elems = num_components - i;
2016 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
2017 num_elems = 1;
2018 if (num_elems * elem_size_bytes > 16)
2019 num_elems = 16 / elem_size_bytes;
2020 int load_bytes = num_elems * elem_size_bytes;
2021
2022 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2023
2024 LLVMValueRef ret;
2025
2026 if (load_bytes == 1) {
2027 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2028 rsrc,
2029 offset,
2030 ctx->ac.i32_0,
2031 immoffset,
2032 cache_policy);
2033 } else if (load_bytes == 2) {
2034 ret = ac_build_tbuffer_load_short(&ctx->ac,
2035 rsrc,
2036 offset,
2037 ctx->ac.i32_0,
2038 immoffset,
2039 cache_policy);
2040 } else {
2041 int num_channels = util_next_power_of_two(load_bytes) / 4;
2042 bool can_speculate = access & ACCESS_CAN_REORDER;
2043
2044 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2045 vindex, offset, immoffset, 0,
2046 cache_policy, can_speculate, false);
2047 }
2048
2049 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2050 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2051 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2052
2053 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2054 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2055
2056 for (unsigned j = 0; j < num_elems; j++) {
2057 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2058 }
2059 i += num_elems;
2060 }
2061
2062 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2063 return exit_waterfall(ctx, &wctx, ret);
2064 }
2065
2066 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2067 struct waterfall_context *wctx,
2068 const nir_intrinsic_instr *instr)
2069 {
2070 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2071 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2072 }
2073
2074 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2075 nir_intrinsic_instr *instr)
2076 {
2077 struct waterfall_context wctx;
2078 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2079
2080 LLVMValueRef ret;
2081 LLVMValueRef rsrc = rsrc_base;
2082 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2083 int num_components = instr->num_components;
2084
2085 if (ctx->abi->load_ubo)
2086 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2087
2088 if (instr->dest.ssa.bit_size == 64)
2089 num_components *= 2;
2090
2091 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2092 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2093 LLVMValueRef results[num_components];
2094 for (unsigned i = 0; i < num_components; ++i) {
2095 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2096 load_bytes * i, 0);
2097
2098 if (load_bytes == 1) {
2099 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2100 rsrc,
2101 offset,
2102 ctx->ac.i32_0,
2103 immoffset,
2104 0);
2105 } else {
2106 assert(load_bytes == 2);
2107 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2108 rsrc,
2109 offset,
2110 ctx->ac.i32_0,
2111 immoffset,
2112 0);
2113 }
2114 }
2115 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2116 } else {
2117 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2118 NULL, 0, 0, true, true);
2119
2120 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2121 }
2122
2123 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2124 get_def_type(ctx, &instr->dest.ssa), "");
2125
2126 return exit_waterfall(ctx, &wctx, ret);
2127 }
2128
2129 static void
2130 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2131 bool vs_in, unsigned *vertex_index_out,
2132 LLVMValueRef *vertex_index_ref,
2133 unsigned *const_out, LLVMValueRef *indir_out)
2134 {
2135 nir_variable *var = nir_deref_instr_get_variable(instr);
2136 nir_deref_path path;
2137 unsigned idx_lvl = 1;
2138
2139 nir_deref_path_init(&path, instr, NULL);
2140
2141 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2142 if (vertex_index_ref) {
2143 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2144 if (vertex_index_out)
2145 *vertex_index_out = 0;
2146 } else {
2147 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2148 }
2149 ++idx_lvl;
2150 }
2151
2152 uint32_t const_offset = 0;
2153 LLVMValueRef offset = NULL;
2154
2155 if (var->data.compact) {
2156 assert(instr->deref_type == nir_deref_type_array);
2157 const_offset = nir_src_as_uint(instr->arr.index);
2158 goto out;
2159 }
2160
2161 for (; path.path[idx_lvl]; ++idx_lvl) {
2162 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2163 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2164 unsigned index = path.path[idx_lvl]->strct.index;
2165
2166 for (unsigned i = 0; i < index; i++) {
2167 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2168 const_offset += glsl_count_attribute_slots(ft, vs_in);
2169 }
2170 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2171 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2172 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2173 const_offset += size *
2174 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2175 } else {
2176 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2177 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2178 if (offset)
2179 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2180 else
2181 offset = array_off;
2182 }
2183 } else
2184 unreachable("Uhandled deref type in get_deref_instr_offset");
2185 }
2186
2187 out:
2188 nir_deref_path_finish(&path);
2189
2190 if (const_offset && offset)
2191 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2192 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2193 "");
2194
2195 *const_out = const_offset;
2196 *indir_out = offset;
2197 }
2198
2199 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2200 nir_intrinsic_instr *instr,
2201 bool load_inputs)
2202 {
2203 LLVMValueRef result;
2204 LLVMValueRef vertex_index = NULL;
2205 LLVMValueRef indir_index = NULL;
2206 unsigned const_index = 0;
2207
2208 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2209
2210 unsigned location = var->data.location;
2211 unsigned driver_location = var->data.driver_location;
2212 const bool is_patch = var->data.patch ||
2213 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2214 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2215 const bool is_compact = var->data.compact;
2216
2217 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2218 false, NULL, is_patch ? NULL : &vertex_index,
2219 &const_index, &indir_index);
2220
2221 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2222
2223 LLVMTypeRef src_component_type;
2224 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2225 src_component_type = LLVMGetElementType(dest_type);
2226 else
2227 src_component_type = dest_type;
2228
2229 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2230 vertex_index, indir_index,
2231 const_index, location, driver_location,
2232 var->data.location_frac,
2233 instr->num_components,
2234 is_patch, is_compact, load_inputs);
2235 if (instr->dest.ssa.bit_size == 16) {
2236 result = ac_to_integer(&ctx->ac, result);
2237 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2238 }
2239 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2240 }
2241
2242 static unsigned
2243 type_scalar_size_bytes(const struct glsl_type *type)
2244 {
2245 assert(glsl_type_is_vector_or_scalar(type) ||
2246 glsl_type_is_matrix(type));
2247 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2248 }
2249
2250 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2251 nir_intrinsic_instr *instr)
2252 {
2253 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2254 nir_variable *var = nir_deref_instr_get_variable(deref);
2255
2256 LLVMValueRef values[8];
2257 int idx = 0;
2258 int ve = instr->dest.ssa.num_components;
2259 unsigned comp = 0;
2260 LLVMValueRef indir_index;
2261 LLVMValueRef ret;
2262 unsigned const_index;
2263 unsigned stride = 4;
2264 int mode = deref->mode;
2265
2266 if (var) {
2267 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2268 var->data.mode == nir_var_shader_in;
2269 idx = var->data.driver_location;
2270 comp = var->data.location_frac;
2271 mode = var->data.mode;
2272
2273 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2274 &const_index, &indir_index);
2275
2276 if (var->data.compact) {
2277 stride = 1;
2278 const_index += comp;
2279 comp = 0;
2280 }
2281 }
2282
2283 if (instr->dest.ssa.bit_size == 64 &&
2284 (deref->mode == nir_var_shader_in ||
2285 deref->mode == nir_var_shader_out ||
2286 deref->mode == nir_var_function_temp))
2287 ve *= 2;
2288
2289 switch (mode) {
2290 case nir_var_shader_in:
2291 /* TODO: remove this after RADV switches to lowered IO */
2292 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2293 ctx->stage == MESA_SHADER_TESS_EVAL) {
2294 return load_tess_varyings(ctx, instr, true);
2295 }
2296
2297 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2298 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2299 LLVMValueRef indir_index;
2300 unsigned const_index, vertex_index;
2301 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2302 &const_index, &indir_index);
2303 assert(indir_index == NULL);
2304
2305 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2306 var->data.driver_location,
2307 var->data.location_frac,
2308 instr->num_components, vertex_index, const_index, type);
2309 }
2310
2311 for (unsigned chan = comp; chan < ve + comp; chan++) {
2312 if (indir_index) {
2313 unsigned count = glsl_count_attribute_slots(
2314 var->type,
2315 ctx->stage == MESA_SHADER_VERTEX);
2316 count -= chan / 4;
2317 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2318 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2319 stride, false, true);
2320
2321 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2322 tmp_vec,
2323 indir_index, "");
2324 } else
2325 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2326 }
2327 break;
2328 case nir_var_function_temp:
2329 for (unsigned chan = 0; chan < ve; chan++) {
2330 if (indir_index) {
2331 unsigned count = glsl_count_attribute_slots(
2332 var->type, false);
2333 count -= chan / 4;
2334 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2335 &ctx->ac, ctx->locals + idx + chan, count,
2336 stride, true, true);
2337
2338 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2339 tmp_vec,
2340 indir_index, "");
2341 } else {
2342 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2343 }
2344 }
2345 break;
2346 case nir_var_shader_out:
2347 /* TODO: remove this after RADV switches to lowered IO */
2348 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2349 return load_tess_varyings(ctx, instr, false);
2350 }
2351
2352 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2353 var->data.fb_fetch_output &&
2354 ctx->abi->emit_fbfetch)
2355 return ctx->abi->emit_fbfetch(ctx->abi);
2356
2357 for (unsigned chan = comp; chan < ve + comp; chan++) {
2358 if (indir_index) {
2359 unsigned count = glsl_count_attribute_slots(
2360 var->type, false);
2361 count -= chan / 4;
2362 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2363 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2364 stride, true, true);
2365
2366 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2367 tmp_vec,
2368 indir_index, "");
2369 } else {
2370 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2371 ctx->abi->outputs[idx + chan + const_index * stride],
2372 "");
2373 }
2374 }
2375 break;
2376 case nir_var_mem_global: {
2377 LLVMValueRef address = get_src(ctx, instr->src[0]);
2378 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2379 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2380 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2381 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2382 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2383 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2384
2385 if (stride != natural_stride || split_loads) {
2386 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2387 result_type = LLVMGetElementType(result_type);
2388
2389 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2390 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2391 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2392
2393 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2394 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2395 values[i] = LLVMBuildLoad(ctx->ac.builder,
2396 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2397
2398 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2399 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2400 }
2401 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2402 } else {
2403 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2404 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2405 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2406 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2407
2408 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2409 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2410 return val;
2411 }
2412 }
2413 default:
2414 unreachable("unhandle variable mode");
2415 }
2416 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2417 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2418 }
2419
2420 static void
2421 visit_store_var(struct ac_nir_context *ctx,
2422 nir_intrinsic_instr *instr)
2423 {
2424 if (ctx->ac.postponed_kill) {
2425 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2426 ctx->ac.postponed_kill, "");
2427 ac_build_ifcc(&ctx->ac, cond, 7002);
2428 }
2429
2430 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2431 nir_variable *var = nir_deref_instr_get_variable(deref);
2432
2433 LLVMValueRef temp_ptr, value;
2434 int idx = 0;
2435 unsigned comp = 0;
2436 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2437 int writemask = instr->const_index[0];
2438 LLVMValueRef indir_index;
2439 unsigned const_index;
2440
2441 if (var) {
2442 get_deref_offset(ctx, deref, false,
2443 NULL, NULL, &const_index, &indir_index);
2444 idx = var->data.driver_location;
2445 comp = var->data.location_frac;
2446
2447 if (var->data.compact) {
2448 const_index += comp;
2449 comp = 0;
2450 }
2451 }
2452
2453 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2454 (deref->mode == nir_var_shader_out ||
2455 deref->mode == nir_var_function_temp)) {
2456
2457 src = LLVMBuildBitCast(ctx->ac.builder, src,
2458 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2459 "");
2460
2461 writemask = widen_mask(writemask, 2);
2462 }
2463
2464 writemask = writemask << comp;
2465
2466 switch (deref->mode) {
2467 case nir_var_shader_out:
2468 /* TODO: remove this after RADV switches to lowered IO */
2469 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2470 LLVMValueRef vertex_index = NULL;
2471 LLVMValueRef indir_index = NULL;
2472 unsigned const_index = 0;
2473 const bool is_patch = var->data.patch ||
2474 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2475 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2476
2477 get_deref_offset(ctx, deref, false, NULL,
2478 is_patch ? NULL : &vertex_index,
2479 &const_index, &indir_index);
2480
2481 ctx->abi->store_tcs_outputs(ctx->abi, var,
2482 vertex_index, indir_index,
2483 const_index, src, writemask,
2484 var->data.location_frac,
2485 var->data.driver_location);
2486 break;
2487 }
2488
2489 for (unsigned chan = 0; chan < 8; chan++) {
2490 int stride = 4;
2491 if (!(writemask & (1 << chan)))
2492 continue;
2493
2494 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2495
2496 if (var->data.compact)
2497 stride = 1;
2498 if (indir_index) {
2499 unsigned count = glsl_count_attribute_slots(
2500 var->type, false);
2501 count -= chan / 4;
2502 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2503 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2504 stride, true, true);
2505
2506 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2507 value, indir_index, "");
2508 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2509 count, stride, tmp_vec);
2510
2511 } else {
2512 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2513
2514 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2515 }
2516 }
2517 break;
2518 case nir_var_function_temp:
2519 for (unsigned chan = 0; chan < 8; chan++) {
2520 if (!(writemask & (1 << chan)))
2521 continue;
2522
2523 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2524 if (indir_index) {
2525 unsigned count = glsl_count_attribute_slots(
2526 var->type, false);
2527 count -= chan / 4;
2528 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2529 &ctx->ac, ctx->locals + idx + chan, count,
2530 4, true, true);
2531
2532 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2533 value, indir_index, "");
2534 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2535 count, 4, tmp_vec);
2536 } else {
2537 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2538
2539 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2540 }
2541 }
2542 break;
2543
2544 case nir_var_mem_global: {
2545 int writemask = instr->const_index[0];
2546 LLVMValueRef address = get_src(ctx, instr->src[0]);
2547 LLVMValueRef val = get_src(ctx, instr->src[1]);
2548
2549 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2550 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2551 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2552 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2553 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2554
2555 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2556 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2557 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2558
2559 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2560 stride == natural_stride && !split_stores) {
2561 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2562 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2563 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2564
2565 val = LLVMBuildBitCast(ctx->ac.builder, val,
2566 LLVMGetElementType(LLVMTypeOf(address)), "");
2567 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2568
2569 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2570 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2571 } else {
2572 LLVMTypeRef val_type = LLVMTypeOf(val);
2573 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2574 val_type = LLVMGetElementType(val_type);
2575
2576 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2577 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2578 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2579 for (unsigned chan = 0; chan < 4; chan++) {
2580 if (!(writemask & (1 << chan)))
2581 continue;
2582
2583 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2584
2585 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2586 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2587 chan);
2588 src = LLVMBuildBitCast(ctx->ac.builder, src,
2589 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2590 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2591
2592 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2593 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2594 }
2595 }
2596 break;
2597 }
2598 default:
2599 abort();
2600 break;
2601 }
2602
2603 if (ctx->ac.postponed_kill)
2604 ac_build_endif(&ctx->ac, 7002);
2605 }
2606
2607 static void
2608 visit_store_output(struct ac_nir_context *ctx, nir_intrinsic_instr *instr)
2609 {
2610 if (ctx->ac.postponed_kill) {
2611 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2612 ctx->ac.postponed_kill, "");
2613 ac_build_ifcc(&ctx->ac, cond, 7002);
2614 }
2615
2616 unsigned base = nir_intrinsic_base(instr);
2617 unsigned writemask = nir_intrinsic_write_mask(instr);
2618 unsigned component = nir_intrinsic_component(instr);
2619 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
2620 nir_src offset = *nir_get_io_offset_src(instr);
2621 LLVMValueRef indir_index = NULL;
2622
2623 if (nir_src_is_const(offset))
2624 assert(nir_src_as_uint(offset) == 0);
2625 else
2626 indir_index = get_src(ctx, offset);
2627
2628 switch (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src))) {
2629 case 32:
2630 break;
2631 case 64:
2632 writemask = widen_mask(writemask, 2);
2633 src = LLVMBuildBitCast(ctx->ac.builder, src,
2634 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2635 "");
2636 break;
2637 default:
2638 unreachable("unhandled store_output bit size");
2639 return;
2640 }
2641
2642 writemask <<= component;
2643
2644 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2645 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
2646 LLVMValueRef vertex_index =
2647 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
2648
2649 ctx->abi->store_tcs_outputs(ctx->abi, NULL,
2650 vertex_index, indir_index,
2651 0, src, writemask,
2652 component, base * 4);
2653 return;
2654 }
2655
2656 /* No indirect indexing is allowed after this point. */
2657 assert(!indir_index);
2658
2659 for (unsigned chan = 0; chan < 8; chan++) {
2660 if (!(writemask & (1 << chan)))
2661 continue;
2662
2663 LLVMValueRef value = ac_llvm_extract_elem(&ctx->ac, src, chan - component);
2664 LLVMBuildStore(ctx->ac.builder, value,
2665 ctx->abi->outputs[base * 4 + chan]);
2666 }
2667
2668 if (ctx->ac.postponed_kill)
2669 ac_build_endif(&ctx->ac, 7002);
2670 }
2671
2672 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2673 {
2674 switch (dim) {
2675 case GLSL_SAMPLER_DIM_BUF:
2676 return 1;
2677 case GLSL_SAMPLER_DIM_1D:
2678 return array ? 2 : 1;
2679 case GLSL_SAMPLER_DIM_2D:
2680 return array ? 3 : 2;
2681 case GLSL_SAMPLER_DIM_MS:
2682 return array ? 4 : 3;
2683 case GLSL_SAMPLER_DIM_3D:
2684 case GLSL_SAMPLER_DIM_CUBE:
2685 return 3;
2686 case GLSL_SAMPLER_DIM_RECT:
2687 case GLSL_SAMPLER_DIM_SUBPASS:
2688 return 2;
2689 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2690 return 3;
2691 default:
2692 break;
2693 }
2694 return 0;
2695 }
2696
2697 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2698 LLVMValueRef coord_x, LLVMValueRef coord_y,
2699 LLVMValueRef coord_z,
2700 LLVMValueRef sample_index,
2701 LLVMValueRef fmask_desc_ptr)
2702 {
2703 unsigned sample_chan = coord_z ? 3 : 2;
2704 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2705 addr[sample_chan] = sample_index;
2706
2707 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2708 return addr[sample_chan];
2709 }
2710
2711 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2712 {
2713 assert(instr->src[0].is_ssa);
2714 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2715 }
2716
2717 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2718 const nir_intrinsic_instr *instr,
2719 LLVMValueRef dynamic_index,
2720 enum ac_descriptor_type desc_type,
2721 bool write)
2722 {
2723 nir_deref_instr *deref_instr =
2724 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2725 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2726
2727 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2728 }
2729
2730 static void get_image_coords(struct ac_nir_context *ctx,
2731 const nir_intrinsic_instr *instr,
2732 LLVMValueRef dynamic_desc_index,
2733 struct ac_image_args *args,
2734 enum glsl_sampler_dim dim,
2735 bool is_array)
2736 {
2737 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2738 LLVMValueRef masks[] = {
2739 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2740 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2741 };
2742 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2743
2744 int count;
2745 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2746 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2747 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2748 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2749 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2750 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2751 count = image_type_to_components_count(dim, is_array);
2752
2753 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2754 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2755 LLVMValueRef fmask_load_address[3];
2756
2757 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2758 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2759 if (is_array)
2760 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2761 else
2762 fmask_load_address[2] = NULL;
2763
2764 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2765 fmask_load_address[0],
2766 fmask_load_address[1],
2767 fmask_load_address[2],
2768 sample_index,
2769 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2770 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2771 }
2772 if (count == 1 && !gfx9_1d) {
2773 if (instr->src[1].ssa->num_components)
2774 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2775 else
2776 args->coords[0] = src0;
2777 } else {
2778 int chan;
2779 if (is_ms)
2780 count--;
2781 for (chan = 0; chan < count; ++chan) {
2782 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2783 }
2784
2785 if (gfx9_1d) {
2786 if (is_array) {
2787 args->coords[2] = args->coords[1];
2788 args->coords[1] = ctx->ac.i32_0;
2789 } else
2790 args->coords[1] = ctx->ac.i32_0;
2791 count++;
2792 }
2793 if (ctx->ac.chip_class == GFX9 &&
2794 dim == GLSL_SAMPLER_DIM_2D &&
2795 !is_array) {
2796 /* The hw can't bind a slice of a 3D image as a 2D
2797 * image, because it ignores BASE_ARRAY if the target
2798 * is 3D. The workaround is to read BASE_ARRAY and set
2799 * it as the 3rd address operand for all 2D images.
2800 */
2801 LLVMValueRef first_layer, const5, mask;
2802
2803 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2804 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2805 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2806 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2807
2808 args->coords[count] = first_layer;
2809 count++;
2810 }
2811
2812
2813 if (is_ms) {
2814 args->coords[count] = sample_index;
2815 count++;
2816 }
2817 }
2818 }
2819
2820 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2821 const nir_intrinsic_instr *instr,
2822 LLVMValueRef dynamic_index,
2823 bool write, bool atomic)
2824 {
2825 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2826 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2827 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2828 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2829 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2830
2831 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2832 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2833 elem_count, stride, "");
2834
2835 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2836 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2837 }
2838 return rsrc;
2839 }
2840
2841 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2842 struct waterfall_context *wctx,
2843 const nir_intrinsic_instr *instr)
2844 {
2845 nir_deref_instr *deref_instr = NULL;
2846
2847 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2848 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2849
2850 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2851 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2852 }
2853
2854 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2855 const nir_intrinsic_instr *instr,
2856 bool bindless)
2857 {
2858 LLVMValueRef res;
2859
2860 enum glsl_sampler_dim dim;
2861 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2862 bool is_array;
2863 if (bindless) {
2864 dim = nir_intrinsic_image_dim(instr);
2865 is_array = nir_intrinsic_image_array(instr);
2866 } else {
2867 const nir_deref_instr *image_deref = get_image_deref(instr);
2868 const struct glsl_type *type = image_deref->type;
2869 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2870 dim = glsl_get_sampler_dim(type);
2871 access |= var->data.access;
2872 is_array = glsl_sampler_type_is_array(type);
2873 }
2874
2875 struct waterfall_context wctx;
2876 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2877
2878 struct ac_image_args args = {};
2879
2880 args.cache_policy = get_cache_policy(ctx, access, false, false);
2881
2882 if (dim == GLSL_SAMPLER_DIM_BUF) {
2883 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2884 unsigned num_channels = util_last_bit(mask);
2885 LLVMValueRef rsrc, vindex;
2886
2887 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2888 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2889 ctx->ac.i32_0, "");
2890
2891 assert(instr->dest.is_ssa);
2892 bool can_speculate = access & ACCESS_CAN_REORDER;
2893 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2894 ctx->ac.i32_0, num_channels,
2895 args.cache_policy,
2896 can_speculate,
2897 instr->dest.ssa.bit_size == 16);
2898 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2899
2900 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2901 res = ac_to_integer(&ctx->ac, res);
2902 } else {
2903 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2904
2905 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2906 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2907 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2908 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2909 if (!level_zero)
2910 args.lod = get_src(ctx, instr->src[3]);
2911 args.dmask = 15;
2912 args.attributes = AC_FUNC_ATTR_READONLY;
2913
2914 assert(instr->dest.is_ssa);
2915 args.d16 = instr->dest.ssa.bit_size == 16;
2916
2917 res = ac_build_image_opcode(&ctx->ac, &args);
2918 }
2919 return exit_waterfall(ctx, &wctx, res);
2920 }
2921
2922 static void visit_image_store(struct ac_nir_context *ctx,
2923 const nir_intrinsic_instr *instr,
2924 bool bindless)
2925 {
2926 if (ctx->ac.postponed_kill) {
2927 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2928 ctx->ac.postponed_kill, "");
2929 ac_build_ifcc(&ctx->ac, cond, 7003);
2930 }
2931
2932 enum glsl_sampler_dim dim;
2933 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2934 bool is_array;
2935
2936 if (bindless) {
2937 dim = nir_intrinsic_image_dim(instr);
2938 is_array = nir_intrinsic_image_array(instr);
2939 } else {
2940 const nir_deref_instr *image_deref = get_image_deref(instr);
2941 const struct glsl_type *type = image_deref->type;
2942 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2943 dim = glsl_get_sampler_dim(type);
2944 access |= var->data.access;
2945 is_array = glsl_sampler_type_is_array(type);
2946 }
2947
2948 struct waterfall_context wctx;
2949 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2950
2951 bool writeonly_memory = access & ACCESS_NON_READABLE;
2952 struct ac_image_args args = {};
2953
2954 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2955
2956 if (dim == GLSL_SAMPLER_DIM_BUF) {
2957 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2958 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2959 unsigned src_channels = ac_get_llvm_num_components(src);
2960 LLVMValueRef vindex;
2961
2962 if (src_channels == 3)
2963 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2964
2965 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2966 get_src(ctx, instr->src[1]),
2967 ctx->ac.i32_0, "");
2968
2969 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2970 ctx->ac.i32_0, args.cache_policy);
2971 } else {
2972 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2973
2974 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2975 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2976 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2977 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2978 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2979 if (!level_zero)
2980 args.lod = get_src(ctx, instr->src[4]);
2981 args.dmask = 15;
2982 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2983
2984 ac_build_image_opcode(&ctx->ac, &args);
2985 }
2986
2987 exit_waterfall(ctx, &wctx, NULL);
2988 if (ctx->ac.postponed_kill)
2989 ac_build_endif(&ctx->ac, 7003);
2990 }
2991
2992 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2993 const nir_intrinsic_instr *instr,
2994 bool bindless)
2995 {
2996 if (ctx->ac.postponed_kill) {
2997 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2998 ctx->ac.postponed_kill, "");
2999 ac_build_ifcc(&ctx->ac, cond, 7004);
3000 }
3001
3002 LLVMValueRef params[7];
3003 int param_count = 0;
3004
3005 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
3006 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
3007 const char *atomic_name;
3008 char intrinsic_name[64];
3009 enum ac_atomic_op atomic_subop;
3010 ASSERTED int length;
3011
3012 enum glsl_sampler_dim dim;
3013 bool is_array;
3014 if (bindless) {
3015 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
3016 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
3017 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
3018 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
3019 ASSERTED const GLenum format = nir_intrinsic_format(instr);
3020 assert(format == GL_R32UI || format == GL_R32I);
3021 }
3022 dim = nir_intrinsic_image_dim(instr);
3023 is_array = nir_intrinsic_image_array(instr);
3024 } else {
3025 const struct glsl_type *type = get_image_deref(instr)->type;
3026 dim = glsl_get_sampler_dim(type);
3027 is_array = glsl_sampler_type_is_array(type);
3028 }
3029
3030 struct waterfall_context wctx;
3031 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3032
3033 switch (instr->intrinsic) {
3034 case nir_intrinsic_bindless_image_atomic_add:
3035 case nir_intrinsic_image_deref_atomic_add:
3036 atomic_name = "add";
3037 atomic_subop = ac_atomic_add;
3038 break;
3039 case nir_intrinsic_bindless_image_atomic_imin:
3040 case nir_intrinsic_image_deref_atomic_imin:
3041 atomic_name = "smin";
3042 atomic_subop = ac_atomic_smin;
3043 break;
3044 case nir_intrinsic_bindless_image_atomic_umin:
3045 case nir_intrinsic_image_deref_atomic_umin:
3046 atomic_name = "umin";
3047 atomic_subop = ac_atomic_umin;
3048 break;
3049 case nir_intrinsic_bindless_image_atomic_imax:
3050 case nir_intrinsic_image_deref_atomic_imax:
3051 atomic_name = "smax";
3052 atomic_subop = ac_atomic_smax;
3053 break;
3054 case nir_intrinsic_bindless_image_atomic_umax:
3055 case nir_intrinsic_image_deref_atomic_umax:
3056 atomic_name = "umax";
3057 atomic_subop = ac_atomic_umax;
3058 break;
3059 case nir_intrinsic_bindless_image_atomic_and:
3060 case nir_intrinsic_image_deref_atomic_and:
3061 atomic_name = "and";
3062 atomic_subop = ac_atomic_and;
3063 break;
3064 case nir_intrinsic_bindless_image_atomic_or:
3065 case nir_intrinsic_image_deref_atomic_or:
3066 atomic_name = "or";
3067 atomic_subop = ac_atomic_or;
3068 break;
3069 case nir_intrinsic_bindless_image_atomic_xor:
3070 case nir_intrinsic_image_deref_atomic_xor:
3071 atomic_name = "xor";
3072 atomic_subop = ac_atomic_xor;
3073 break;
3074 case nir_intrinsic_bindless_image_atomic_exchange:
3075 case nir_intrinsic_image_deref_atomic_exchange:
3076 atomic_name = "swap";
3077 atomic_subop = ac_atomic_swap;
3078 break;
3079 case nir_intrinsic_bindless_image_atomic_comp_swap:
3080 case nir_intrinsic_image_deref_atomic_comp_swap:
3081 atomic_name = "cmpswap";
3082 atomic_subop = 0; /* not used */
3083 break;
3084 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3085 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3086 atomic_name = "inc";
3087 atomic_subop = ac_atomic_inc_wrap;
3088 break;
3089 }
3090 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3091 case nir_intrinsic_image_deref_atomic_dec_wrap:
3092 atomic_name = "dec";
3093 atomic_subop = ac_atomic_dec_wrap;
3094 break;
3095 default:
3096 abort();
3097 }
3098
3099 if (cmpswap)
3100 params[param_count++] = get_src(ctx, instr->src[4]);
3101 params[param_count++] = get_src(ctx, instr->src[3]);
3102
3103 LLVMValueRef result;
3104 if (dim == GLSL_SAMPLER_DIM_BUF) {
3105 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3106 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3107 ctx->ac.i32_0, ""); /* vindex */
3108 params[param_count++] = ctx->ac.i32_0; /* voffset */
3109 if (LLVM_VERSION_MAJOR >= 9) {
3110 /* XXX: The new raw/struct atomic intrinsics are buggy
3111 * with LLVM 8, see r358579.
3112 */
3113 params[param_count++] = ctx->ac.i32_0; /* soffset */
3114 params[param_count++] = ctx->ac.i32_0; /* slc */
3115
3116 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3117 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3118 } else {
3119 params[param_count++] = ctx->ac.i1false; /* slc */
3120
3121 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3122 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3123 }
3124
3125 assert(length < sizeof(intrinsic_name));
3126 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3127 params, param_count, 0);
3128 } else {
3129 struct ac_image_args args = {};
3130 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3131 args.atomic = atomic_subop;
3132 args.data[0] = params[0];
3133 if (cmpswap)
3134 args.data[1] = params[1];
3135 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3136 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3137 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3138
3139 result = ac_build_image_opcode(&ctx->ac, &args);
3140 }
3141
3142 result = exit_waterfall(ctx, &wctx, result);
3143 if (ctx->ac.postponed_kill)
3144 ac_build_endif(&ctx->ac, 7004);
3145 return result;
3146 }
3147
3148 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3149 nir_intrinsic_instr *instr)
3150 {
3151 struct waterfall_context wctx;
3152 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3153 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3154
3155 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3156
3157 return exit_waterfall(ctx, &wctx, ret);
3158 }
3159
3160 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3161 const nir_intrinsic_instr *instr,
3162 bool bindless)
3163 {
3164 LLVMValueRef res;
3165
3166 enum glsl_sampler_dim dim;
3167 bool is_array;
3168 if (bindless) {
3169 dim = nir_intrinsic_image_dim(instr);
3170 is_array = nir_intrinsic_image_array(instr);
3171 } else {
3172 const struct glsl_type *type = get_image_deref(instr)->type;
3173 dim = glsl_get_sampler_dim(type);
3174 is_array = glsl_sampler_type_is_array(type);
3175 }
3176
3177 struct waterfall_context wctx;
3178 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3179
3180 if (dim == GLSL_SAMPLER_DIM_BUF) {
3181 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3182 } else {
3183
3184 struct ac_image_args args = { 0 };
3185
3186 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3187 args.dmask = 0xf;
3188 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3189 args.opcode = ac_image_get_resinfo;
3190 assert(nir_src_as_uint(instr->src[1]) == 0);
3191 args.lod = ctx->ac.i32_0;
3192 args.attributes = AC_FUNC_ATTR_READNONE;
3193
3194 res = ac_build_image_opcode(&ctx->ac, &args);
3195
3196 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3197
3198 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3199 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3200 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3201 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3202 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3203 }
3204
3205 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3206 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3207 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3208 ctx->ac.i32_1, "");
3209 }
3210 }
3211 return exit_waterfall(ctx, &wctx, res);
3212 }
3213
3214 static void emit_membar(struct ac_llvm_context *ac,
3215 const nir_intrinsic_instr *instr)
3216 {
3217 unsigned wait_flags = 0;
3218
3219 switch (instr->intrinsic) {
3220 case nir_intrinsic_memory_barrier:
3221 case nir_intrinsic_group_memory_barrier:
3222 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3223 break;
3224 case nir_intrinsic_memory_barrier_buffer:
3225 case nir_intrinsic_memory_barrier_image:
3226 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3227 break;
3228 case nir_intrinsic_memory_barrier_shared:
3229 wait_flags = AC_WAIT_LGKM;
3230 break;
3231 default:
3232 break;
3233 }
3234
3235 ac_build_waitcnt(ac, wait_flags);
3236 }
3237
3238 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3239 {
3240 /* GFX6 only (thanks to a hw bug workaround):
3241 * The real barrier instruction isn’t needed, because an entire patch
3242 * always fits into a single wave.
3243 */
3244 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3245 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3246 return;
3247 }
3248 ac_build_s_barrier(ac);
3249 }
3250
3251 static void emit_discard(struct ac_nir_context *ctx,
3252 const nir_intrinsic_instr *instr)
3253 {
3254 LLVMValueRef cond;
3255
3256 if (instr->intrinsic == nir_intrinsic_discard_if) {
3257 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3258 get_src(ctx, instr->src[0]),
3259 ctx->ac.i32_0, "");
3260 } else {
3261 assert(instr->intrinsic == nir_intrinsic_discard);
3262 cond = ctx->ac.i1false;
3263 }
3264
3265 ac_build_kill_if_false(&ctx->ac, cond);
3266 }
3267
3268 static void emit_demote(struct ac_nir_context *ctx,
3269 const nir_intrinsic_instr *instr)
3270 {
3271 LLVMValueRef cond;
3272
3273 if (instr->intrinsic == nir_intrinsic_demote_if) {
3274 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3275 get_src(ctx, instr->src[0]),
3276 ctx->ac.i32_0, "");
3277 } else {
3278 assert(instr->intrinsic == nir_intrinsic_demote);
3279 cond = ctx->ac.i1false;
3280 }
3281
3282 /* Kill immediately while maintaining WQM. */
3283 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3284
3285 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3286 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3287 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3288 return;
3289 }
3290
3291 static LLVMValueRef
3292 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3293 {
3294 LLVMValueRef result;
3295 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3296 result = LLVMBuildAnd(ctx->ac.builder,
3297 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3298 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3299
3300 if (ctx->ac.wave_size == 32)
3301 result = LLVMBuildLShr(ctx->ac.builder, result,
3302 LLVMConstInt(ctx->ac.i32, 1, false), "");
3303
3304 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3305 }
3306
3307 static LLVMValueRef
3308 visit_load_subgroup_id(struct ac_nir_context *ctx)
3309 {
3310 if (ctx->stage == MESA_SHADER_COMPUTE) {
3311 LLVMValueRef result;
3312 result = LLVMBuildAnd(ctx->ac.builder,
3313 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3314 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3315 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3316 } else {
3317 return LLVMConstInt(ctx->ac.i32, 0, false);
3318 }
3319 }
3320
3321 static LLVMValueRef
3322 visit_load_num_subgroups(struct ac_nir_context *ctx)
3323 {
3324 if (ctx->stage == MESA_SHADER_COMPUTE) {
3325 return LLVMBuildAnd(ctx->ac.builder,
3326 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3327 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3328 } else {
3329 return LLVMConstInt(ctx->ac.i32, 1, false);
3330 }
3331 }
3332
3333 static LLVMValueRef
3334 visit_first_invocation(struct ac_nir_context *ctx)
3335 {
3336 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3337 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3338
3339 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3340 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3341 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3342 ctx->ac.iN_wavemask, args, 2,
3343 AC_FUNC_ATTR_NOUNWIND |
3344 AC_FUNC_ATTR_READNONE);
3345
3346 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3347 }
3348
3349 static LLVMValueRef
3350 visit_load_shared(struct ac_nir_context *ctx,
3351 const nir_intrinsic_instr *instr)
3352 {
3353 LLVMValueRef values[4], derived_ptr, index, ret;
3354
3355 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3356 instr->dest.ssa.bit_size);
3357
3358 for (int chan = 0; chan < instr->num_components; chan++) {
3359 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3360 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3361 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3362 }
3363
3364 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3365 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3366 }
3367
3368 static void
3369 visit_store_shared(struct ac_nir_context *ctx,
3370 const nir_intrinsic_instr *instr)
3371 {
3372 LLVMValueRef derived_ptr, data,index;
3373 LLVMBuilderRef builder = ctx->ac.builder;
3374
3375 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3376 instr->src[0].ssa->bit_size);
3377 LLVMValueRef src = get_src(ctx, instr->src[0]);
3378
3379 int writemask = nir_intrinsic_write_mask(instr);
3380 for (int chan = 0; chan < 4; chan++) {
3381 if (!(writemask & (1 << chan))) {
3382 continue;
3383 }
3384 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3385 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3386 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3387 LLVMBuildStore(builder, data, derived_ptr);
3388 }
3389 }
3390
3391 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3392 const nir_intrinsic_instr *instr,
3393 LLVMValueRef ptr, int src_idx)
3394 {
3395 if (ctx->ac.postponed_kill) {
3396 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3397 ctx->ac.postponed_kill, "");
3398 ac_build_ifcc(&ctx->ac, cond, 7005);
3399 }
3400
3401 LLVMValueRef result;
3402 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3403
3404 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3405
3406 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3407 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3408 if (deref->mode == nir_var_mem_global) {
3409 /* use "singlethread" sync scope to implement relaxed ordering */
3410 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3411
3412 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3413 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3414 }
3415 }
3416
3417 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3418 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3419 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3420 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3421 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3422 } else {
3423 LLVMAtomicRMWBinOp op;
3424 switch (instr->intrinsic) {
3425 case nir_intrinsic_shared_atomic_add:
3426 case nir_intrinsic_deref_atomic_add:
3427 op = LLVMAtomicRMWBinOpAdd;
3428 break;
3429 case nir_intrinsic_shared_atomic_umin:
3430 case nir_intrinsic_deref_atomic_umin:
3431 op = LLVMAtomicRMWBinOpUMin;
3432 break;
3433 case nir_intrinsic_shared_atomic_umax:
3434 case nir_intrinsic_deref_atomic_umax:
3435 op = LLVMAtomicRMWBinOpUMax;
3436 break;
3437 case nir_intrinsic_shared_atomic_imin:
3438 case nir_intrinsic_deref_atomic_imin:
3439 op = LLVMAtomicRMWBinOpMin;
3440 break;
3441 case nir_intrinsic_shared_atomic_imax:
3442 case nir_intrinsic_deref_atomic_imax:
3443 op = LLVMAtomicRMWBinOpMax;
3444 break;
3445 case nir_intrinsic_shared_atomic_and:
3446 case nir_intrinsic_deref_atomic_and:
3447 op = LLVMAtomicRMWBinOpAnd;
3448 break;
3449 case nir_intrinsic_shared_atomic_or:
3450 case nir_intrinsic_deref_atomic_or:
3451 op = LLVMAtomicRMWBinOpOr;
3452 break;
3453 case nir_intrinsic_shared_atomic_xor:
3454 case nir_intrinsic_deref_atomic_xor:
3455 op = LLVMAtomicRMWBinOpXor;
3456 break;
3457 case nir_intrinsic_shared_atomic_exchange:
3458 case nir_intrinsic_deref_atomic_exchange:
3459 op = LLVMAtomicRMWBinOpXchg;
3460 break;
3461 #if LLVM_VERSION_MAJOR >= 10
3462 case nir_intrinsic_shared_atomic_fadd:
3463 case nir_intrinsic_deref_atomic_fadd:
3464 op = LLVMAtomicRMWBinOpFAdd;
3465 break;
3466 #endif
3467 default:
3468 return NULL;
3469 }
3470
3471 LLVMValueRef val;
3472
3473 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3474 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3475 val = ac_to_float(&ctx->ac, src);
3476 } else {
3477 val = ac_to_integer(&ctx->ac, src);
3478 }
3479
3480 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3481 }
3482
3483 if (ctx->ac.postponed_kill)
3484 ac_build_endif(&ctx->ac, 7005);
3485 return result;
3486 }
3487
3488 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3489 {
3490 LLVMValueRef values[2];
3491 LLVMValueRef pos[2];
3492
3493 pos[0] = ac_to_float(&ctx->ac,
3494 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3495 pos[1] = ac_to_float(&ctx->ac,
3496 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3497
3498 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3499 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3500 return ac_build_gather_values(&ctx->ac, values, 2);
3501 }
3502
3503 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3504 enum glsl_interp_mode interp, unsigned location)
3505 {
3506 switch (interp) {
3507 case INTERP_MODE_FLAT:
3508 default:
3509 return NULL;
3510 case INTERP_MODE_SMOOTH:
3511 case INTERP_MODE_NONE:
3512 if (location == INTERP_CENTER)
3513 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3514 else if (location == INTERP_CENTROID)
3515 return ctx->abi->persp_centroid;
3516 else if (location == INTERP_SAMPLE)
3517 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3518 break;
3519 case INTERP_MODE_NOPERSPECTIVE:
3520 if (location == INTERP_CENTER)
3521 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3522 else if (location == INTERP_CENTROID)
3523 return ctx->abi->linear_centroid;
3524 else if (location == INTERP_SAMPLE)
3525 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3526 break;
3527 }
3528 return NULL;
3529 }
3530
3531 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3532 unsigned mode)
3533 {
3534 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3535 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3536 }
3537
3538 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3539 unsigned mode,
3540 LLVMValueRef offset)
3541 {
3542 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3543 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3544 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3545
3546 LLVMValueRef ij_out[2];
3547 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3548
3549 /*
3550 * take the I then J parameters, and the DDX/Y for it, and
3551 * calculate the IJ inputs for the interpolator.
3552 * temp1 = ddx * offset/sample.x + I;
3553 * interp_param.I = ddy * offset/sample.y + temp1;
3554 * temp1 = ddx * offset/sample.x + J;
3555 * interp_param.J = ddy * offset/sample.y + temp1;
3556 */
3557 for (unsigned i = 0; i < 2; i++) {
3558 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3559 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3560 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3561 ddxy_out, ix_ll, "");
3562 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3563 ddxy_out, iy_ll, "");
3564 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3565 interp_param, ix_ll, "");
3566 LLVMValueRef temp1, temp2;
3567
3568 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3569 ctx->ac.f32, "");
3570
3571 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3572 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3573
3574 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3575 temp2, ctx->ac.i32, "");
3576 }
3577 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3578 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3579 }
3580
3581 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3582 unsigned mode)
3583 {
3584 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3585 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3586 }
3587
3588 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3589 unsigned mode,
3590 LLVMValueRef sample_id)
3591 {
3592 if (ctx->abi->interp_at_sample_force_center)
3593 return barycentric_center(ctx, mode);
3594
3595 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3596
3597 /* fetch sample ID */
3598 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3599
3600 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3601 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3602 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3603 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3604 LLVMValueRef coords[] = { src_c0, src_c1 };
3605 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3606
3607 return barycentric_offset(ctx, mode, offset);
3608 }
3609
3610
3611 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3612 unsigned mode)
3613 {
3614 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3615 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3616 }
3617
3618 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3619 {
3620 return LLVMBuildBitCast(ctx->ac.builder,
3621 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3622 ctx->ac.v3i32, "");
3623 }
3624
3625 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3626 LLVMValueRef interp_param,
3627 unsigned index, unsigned comp_start,
3628 unsigned num_components,
3629 unsigned bitsize)
3630 {
3631 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3632 LLVMValueRef interp_param_f;
3633
3634 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3635 interp_param, ctx->ac.v2f32, "");
3636 LLVMValueRef i = LLVMBuildExtractElement(
3637 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3638 LLVMValueRef j = LLVMBuildExtractElement(
3639 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3640
3641 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3642 if (ctx->verified_interp &&
3643 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3644 LLVMValueRef args[2];
3645 args[0] = i;
3646 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3647 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3648 args, 2, AC_FUNC_ATTR_READNONE);
3649 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3650 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3651 }
3652
3653 LLVMValueRef values[4];
3654 assert(bitsize == 16 || bitsize == 32);
3655 for (unsigned comp = 0; comp < num_components; comp++) {
3656 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3657 if (bitsize == 16) {
3658 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3659 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3660 } else {
3661 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3662 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3663 }
3664 }
3665
3666 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3667 }
3668
3669 static LLVMValueRef visit_load(struct ac_nir_context *ctx,
3670 nir_intrinsic_instr *instr, bool is_output)
3671 {
3672 LLVMValueRef values[8];
3673 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
3674 LLVMTypeRef component_type;
3675 unsigned base = nir_intrinsic_base(instr);
3676 unsigned component = nir_intrinsic_component(instr);
3677 unsigned count = instr->dest.ssa.num_components *
3678 (instr->dest.ssa.bit_size == 64 ? 2 : 1);
3679 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
3680 LLVMValueRef vertex_index =
3681 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
3682 nir_src offset = *nir_get_io_offset_src(instr);
3683 LLVMValueRef indir_index = NULL;
3684
3685 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
3686 component_type = LLVMGetElementType(dest_type);
3687 else
3688 component_type = dest_type;
3689
3690 if (nir_src_is_const(offset))
3691 assert(nir_src_as_uint(offset) == 0);
3692 else
3693 indir_index = get_src(ctx, offset);
3694
3695 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
3696 (ctx->stage == MESA_SHADER_TESS_EVAL && !is_output)) {
3697 LLVMValueRef result =
3698 ctx->abi->load_tess_varyings(ctx->abi, component_type,
3699 vertex_index, indir_index,
3700 0, 0, base * 4,
3701 component,
3702 instr->num_components,
3703 false, false, !is_output);
3704 if (instr->dest.ssa.bit_size == 16) {
3705 result = ac_to_integer(&ctx->ac, result);
3706 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
3707 }
3708 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3709 }
3710
3711 /* No indirect indexing is allowed after this point. */
3712 assert(!indir_index);
3713
3714 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3715 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3716 assert(nir_src_is_const(*vertex_index_src));
3717
3718 return ctx->abi->load_inputs(ctx->abi, 0, base * 4, component,
3719 instr->num_components,
3720 nir_src_as_uint(*vertex_index_src),
3721 0, type);
3722 }
3723
3724 if (ctx->stage == MESA_SHADER_FRAGMENT && is_output &&
3725 nir_intrinsic_io_semantics(instr).fb_fetch_output)
3726 return ctx->abi->emit_fbfetch(ctx->abi);
3727
3728 /* Other non-fragment cases have inputs and outputs in temporaries. */
3729 if (ctx->stage != MESA_SHADER_FRAGMENT) {
3730 for (unsigned chan = component; chan < count + component; chan++) {
3731 if (is_output) {
3732 values[chan] = LLVMBuildLoad(ctx->ac.builder,
3733 ctx->abi->outputs[base * 4 + chan], "");
3734 } else {
3735 values[chan] = ctx->abi->inputs[base * 4 + chan];
3736 if (!values[chan])
3737 values[chan] = LLVMGetUndef(ctx->ac.i32);
3738 }
3739 }
3740 LLVMValueRef result = ac_build_varying_gather_values(&ctx->ac, values, count, component);
3741 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3742 }
3743
3744 /* Fragment shader inputs. */
3745 unsigned vertex_id = 2; /* P0 */
3746
3747 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3748 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3749
3750 switch (src0[0].i32) {
3751 case 0:
3752 vertex_id = 2;
3753 break;
3754 case 1:
3755 vertex_id = 0;
3756 break;
3757 case 2:
3758 vertex_id = 1;
3759 break;
3760 default:
3761 unreachable("Invalid vertex index");
3762 }
3763 }
3764
3765 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, base, false);
3766
3767 for (unsigned chan = 0; chan < count; chan++) {
3768 if (component + chan > 4)
3769 attr_number = LLVMConstInt(ctx->ac.i32, base + 1, false);
3770 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3771 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3772 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3773 llvm_chan,
3774 attr_number,
3775 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3776 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3777 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3778 instr->dest.ssa.bit_size == 16 ? ctx->ac.i16
3779 : ctx->ac.i32, "");
3780 }
3781
3782 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, count);
3783 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3784 }
3785
3786 static void visit_intrinsic(struct ac_nir_context *ctx,
3787 nir_intrinsic_instr *instr)
3788 {
3789 LLVMValueRef result = NULL;
3790
3791 switch (instr->intrinsic) {
3792 case nir_intrinsic_ballot:
3793 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3794 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3795 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3796 break;
3797 case nir_intrinsic_read_invocation:
3798 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3799 get_src(ctx, instr->src[1]));
3800 break;
3801 case nir_intrinsic_read_first_invocation:
3802 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3803 break;
3804 case nir_intrinsic_load_subgroup_invocation:
3805 result = ac_get_thread_id(&ctx->ac);
3806 break;
3807 case nir_intrinsic_load_work_group_id: {
3808 LLVMValueRef values[3];
3809
3810 for (int i = 0; i < 3; i++) {
3811 values[i] = ctx->args->workgroup_ids[i].used ?
3812 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3813 }
3814
3815 result = ac_build_gather_values(&ctx->ac, values, 3);
3816 break;
3817 }
3818 case nir_intrinsic_load_base_vertex:
3819 case nir_intrinsic_load_first_vertex:
3820 result = ctx->abi->load_base_vertex(ctx->abi);
3821 break;
3822 case nir_intrinsic_load_local_group_size:
3823 result = ctx->abi->load_local_group_size(ctx->abi);
3824 break;
3825 case nir_intrinsic_load_vertex_id:
3826 result = LLVMBuildAdd(ctx->ac.builder,
3827 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3828 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3829 break;
3830 case nir_intrinsic_load_vertex_id_zero_base: {
3831 result = ctx->abi->vertex_id;
3832 break;
3833 }
3834 case nir_intrinsic_load_local_invocation_id: {
3835 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3836 break;
3837 }
3838 case nir_intrinsic_load_base_instance:
3839 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3840 break;
3841 case nir_intrinsic_load_draw_id:
3842 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3843 break;
3844 case nir_intrinsic_load_view_index:
3845 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3846 break;
3847 case nir_intrinsic_load_invocation_id:
3848 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3849 result = ac_unpack_param(&ctx->ac,
3850 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3851 8, 5);
3852 } else {
3853 if (ctx->ac.chip_class >= GFX10) {
3854 result = LLVMBuildAnd(ctx->ac.builder,
3855 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3856 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3857 } else {
3858 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3859 }
3860 }
3861 break;
3862 case nir_intrinsic_load_primitive_id:
3863 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3864 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3865 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3866 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3867 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3868 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3869 } else
3870 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3871 break;
3872 case nir_intrinsic_load_sample_id:
3873 result = ac_unpack_param(&ctx->ac,
3874 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3875 8, 4);
3876 break;
3877 case nir_intrinsic_load_sample_pos:
3878 result = load_sample_pos(ctx);
3879 break;
3880 case nir_intrinsic_load_sample_mask_in:
3881 result = ctx->abi->load_sample_mask_in(ctx->abi);
3882 break;
3883 case nir_intrinsic_load_frag_coord: {
3884 LLVMValueRef values[4] = {
3885 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3886 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3887 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3888 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3889 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3890 };
3891 result = ac_to_integer(&ctx->ac,
3892 ac_build_gather_values(&ctx->ac, values, 4));
3893 break;
3894 }
3895 case nir_intrinsic_load_layer_id:
3896 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3897 break;
3898 case nir_intrinsic_load_front_face:
3899 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3900 break;
3901 case nir_intrinsic_load_helper_invocation:
3902 result = ac_build_load_helper_invocation(&ctx->ac);
3903 break;
3904 case nir_intrinsic_is_helper_invocation:
3905 result = ac_build_is_helper_invocation(&ctx->ac);
3906 break;
3907 case nir_intrinsic_load_color0:
3908 result = ctx->abi->color0;
3909 break;
3910 case nir_intrinsic_load_color1:
3911 result = ctx->abi->color1;
3912 break;
3913 case nir_intrinsic_load_user_data_amd:
3914 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3915 result = ctx->abi->user_data;
3916 break;
3917 case nir_intrinsic_load_instance_id:
3918 result = ctx->abi->instance_id;
3919 break;
3920 case nir_intrinsic_load_num_work_groups:
3921 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3922 break;
3923 case nir_intrinsic_load_local_invocation_index:
3924 result = visit_load_local_invocation_index(ctx);
3925 break;
3926 case nir_intrinsic_load_subgroup_id:
3927 result = visit_load_subgroup_id(ctx);
3928 break;
3929 case nir_intrinsic_load_num_subgroups:
3930 result = visit_load_num_subgroups(ctx);
3931 break;
3932 case nir_intrinsic_first_invocation:
3933 result = visit_first_invocation(ctx);
3934 break;
3935 case nir_intrinsic_load_push_constant:
3936 result = visit_load_push_constant(ctx, instr);
3937 break;
3938 case nir_intrinsic_vulkan_resource_index: {
3939 LLVMValueRef index = get_src(ctx, instr->src[0]);
3940 unsigned desc_set = nir_intrinsic_desc_set(instr);
3941 unsigned binding = nir_intrinsic_binding(instr);
3942
3943 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3944 binding);
3945 break;
3946 }
3947 case nir_intrinsic_vulkan_resource_reindex:
3948 result = visit_vulkan_resource_reindex(ctx, instr);
3949 break;
3950 case nir_intrinsic_store_ssbo:
3951 visit_store_ssbo(ctx, instr);
3952 break;
3953 case nir_intrinsic_load_ssbo:
3954 result = visit_load_buffer(ctx, instr);
3955 break;
3956 case nir_intrinsic_ssbo_atomic_add:
3957 case nir_intrinsic_ssbo_atomic_imin:
3958 case nir_intrinsic_ssbo_atomic_umin:
3959 case nir_intrinsic_ssbo_atomic_imax:
3960 case nir_intrinsic_ssbo_atomic_umax:
3961 case nir_intrinsic_ssbo_atomic_and:
3962 case nir_intrinsic_ssbo_atomic_or:
3963 case nir_intrinsic_ssbo_atomic_xor:
3964 case nir_intrinsic_ssbo_atomic_exchange:
3965 case nir_intrinsic_ssbo_atomic_comp_swap:
3966 result = visit_atomic_ssbo(ctx, instr);
3967 break;
3968 case nir_intrinsic_load_ubo:
3969 result = visit_load_ubo_buffer(ctx, instr);
3970 break;
3971 case nir_intrinsic_get_buffer_size:
3972 result = visit_get_buffer_size(ctx, instr);
3973 break;
3974 case nir_intrinsic_load_deref:
3975 result = visit_load_var(ctx, instr);
3976 break;
3977 case nir_intrinsic_store_deref:
3978 visit_store_var(ctx, instr);
3979 break;
3980 case nir_intrinsic_load_input:
3981 case nir_intrinsic_load_input_vertex:
3982 case nir_intrinsic_load_per_vertex_input:
3983 result = visit_load(ctx, instr, false);
3984 break;
3985 case nir_intrinsic_load_output:
3986 case nir_intrinsic_load_per_vertex_output:
3987 result = visit_load(ctx, instr, true);
3988 break;
3989 case nir_intrinsic_store_output:
3990 case nir_intrinsic_store_per_vertex_output:
3991 visit_store_output(ctx, instr);
3992 break;
3993 case nir_intrinsic_load_shared:
3994 result = visit_load_shared(ctx, instr);
3995 break;
3996 case nir_intrinsic_store_shared:
3997 visit_store_shared(ctx, instr);
3998 break;
3999 case nir_intrinsic_bindless_image_samples:
4000 case nir_intrinsic_image_deref_samples:
4001 result = visit_image_samples(ctx, instr);
4002 break;
4003 case nir_intrinsic_bindless_image_load:
4004 result = visit_image_load(ctx, instr, true);
4005 break;
4006 case nir_intrinsic_image_deref_load:
4007 result = visit_image_load(ctx, instr, false);
4008 break;
4009 case nir_intrinsic_bindless_image_store:
4010 visit_image_store(ctx, instr, true);
4011 break;
4012 case nir_intrinsic_image_deref_store:
4013 visit_image_store(ctx, instr, false);
4014 break;
4015 case nir_intrinsic_bindless_image_atomic_add:
4016 case nir_intrinsic_bindless_image_atomic_imin:
4017 case nir_intrinsic_bindless_image_atomic_umin:
4018 case nir_intrinsic_bindless_image_atomic_imax:
4019 case nir_intrinsic_bindless_image_atomic_umax:
4020 case nir_intrinsic_bindless_image_atomic_and:
4021 case nir_intrinsic_bindless_image_atomic_or:
4022 case nir_intrinsic_bindless_image_atomic_xor:
4023 case nir_intrinsic_bindless_image_atomic_exchange:
4024 case nir_intrinsic_bindless_image_atomic_comp_swap:
4025 case nir_intrinsic_bindless_image_atomic_inc_wrap:
4026 case nir_intrinsic_bindless_image_atomic_dec_wrap:
4027 result = visit_image_atomic(ctx, instr, true);
4028 break;
4029 case nir_intrinsic_image_deref_atomic_add:
4030 case nir_intrinsic_image_deref_atomic_imin:
4031 case nir_intrinsic_image_deref_atomic_umin:
4032 case nir_intrinsic_image_deref_atomic_imax:
4033 case nir_intrinsic_image_deref_atomic_umax:
4034 case nir_intrinsic_image_deref_atomic_and:
4035 case nir_intrinsic_image_deref_atomic_or:
4036 case nir_intrinsic_image_deref_atomic_xor:
4037 case nir_intrinsic_image_deref_atomic_exchange:
4038 case nir_intrinsic_image_deref_atomic_comp_swap:
4039 case nir_intrinsic_image_deref_atomic_inc_wrap:
4040 case nir_intrinsic_image_deref_atomic_dec_wrap:
4041 result = visit_image_atomic(ctx, instr, false);
4042 break;
4043 case nir_intrinsic_bindless_image_size:
4044 result = visit_image_size(ctx, instr, true);
4045 break;
4046 case nir_intrinsic_image_deref_size:
4047 result = visit_image_size(ctx, instr, false);
4048 break;
4049 case nir_intrinsic_shader_clock:
4050 result = ac_build_shader_clock(&ctx->ac,
4051 nir_intrinsic_memory_scope(instr));
4052 break;
4053 case nir_intrinsic_discard:
4054 case nir_intrinsic_discard_if:
4055 emit_discard(ctx, instr);
4056 break;
4057 case nir_intrinsic_demote:
4058 case nir_intrinsic_demote_if:
4059 emit_demote(ctx, instr);
4060 break;
4061 case nir_intrinsic_memory_barrier:
4062 case nir_intrinsic_group_memory_barrier:
4063 case nir_intrinsic_memory_barrier_buffer:
4064 case nir_intrinsic_memory_barrier_image:
4065 case nir_intrinsic_memory_barrier_shared:
4066 emit_membar(&ctx->ac, instr);
4067 break;
4068 case nir_intrinsic_scoped_barrier: {
4069 assert(!(nir_intrinsic_memory_semantics(instr) &
4070 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
4071
4072 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
4073
4074 unsigned wait_flags = 0;
4075 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
4076 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
4077 if (modes & nir_var_mem_shared)
4078 wait_flags |= AC_WAIT_LGKM;
4079
4080 if (wait_flags)
4081 ac_build_waitcnt(&ctx->ac, wait_flags);
4082
4083 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
4084 ac_emit_barrier(&ctx->ac, ctx->stage);
4085 break;
4086 }
4087 case nir_intrinsic_memory_barrier_tcs_patch:
4088 break;
4089 case nir_intrinsic_control_barrier:
4090 ac_emit_barrier(&ctx->ac, ctx->stage);
4091 break;
4092 case nir_intrinsic_shared_atomic_add:
4093 case nir_intrinsic_shared_atomic_imin:
4094 case nir_intrinsic_shared_atomic_umin:
4095 case nir_intrinsic_shared_atomic_imax:
4096 case nir_intrinsic_shared_atomic_umax:
4097 case nir_intrinsic_shared_atomic_and:
4098 case nir_intrinsic_shared_atomic_or:
4099 case nir_intrinsic_shared_atomic_xor:
4100 case nir_intrinsic_shared_atomic_exchange:
4101 case nir_intrinsic_shared_atomic_comp_swap:
4102 case nir_intrinsic_shared_atomic_fadd: {
4103 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
4104 instr->src[1].ssa->bit_size);
4105 result = visit_var_atomic(ctx, instr, ptr, 1);
4106 break;
4107 }
4108 case nir_intrinsic_deref_atomic_add:
4109 case nir_intrinsic_deref_atomic_imin:
4110 case nir_intrinsic_deref_atomic_umin:
4111 case nir_intrinsic_deref_atomic_imax:
4112 case nir_intrinsic_deref_atomic_umax:
4113 case nir_intrinsic_deref_atomic_and:
4114 case nir_intrinsic_deref_atomic_or:
4115 case nir_intrinsic_deref_atomic_xor:
4116 case nir_intrinsic_deref_atomic_exchange:
4117 case nir_intrinsic_deref_atomic_comp_swap:
4118 case nir_intrinsic_deref_atomic_fadd: {
4119 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
4120 result = visit_var_atomic(ctx, instr, ptr, 1);
4121 break;
4122 }
4123 case nir_intrinsic_load_barycentric_pixel:
4124 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
4125 break;
4126 case nir_intrinsic_load_barycentric_centroid:
4127 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
4128 break;
4129 case nir_intrinsic_load_barycentric_sample:
4130 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
4131 break;
4132 case nir_intrinsic_load_barycentric_model:
4133 result = barycentric_model(ctx);
4134 break;
4135 case nir_intrinsic_load_barycentric_at_offset: {
4136 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
4137 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
4138 break;
4139 }
4140 case nir_intrinsic_load_barycentric_at_sample: {
4141 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
4142 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
4143 break;
4144 }
4145 case nir_intrinsic_load_interpolated_input: {
4146 /* We assume any indirect loads have been lowered away */
4147 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
4148 assert(offset);
4149 assert(offset[0].i32 == 0);
4150
4151 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
4152 unsigned index = nir_intrinsic_base(instr);
4153 unsigned component = nir_intrinsic_component(instr);
4154 result = load_interpolated_input(ctx, interp_param, index,
4155 component,
4156 instr->dest.ssa.num_components,
4157 instr->dest.ssa.bit_size);
4158 break;
4159 }
4160 case nir_intrinsic_emit_vertex:
4161 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4162 break;
4163 case nir_intrinsic_emit_vertex_with_counter: {
4164 unsigned stream = nir_intrinsic_stream_id(instr);
4165 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4166 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4167 next_vertex,
4168 ctx->abi->outputs);
4169 break;
4170 }
4171 case nir_intrinsic_end_primitive:
4172 case nir_intrinsic_end_primitive_with_counter:
4173 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4174 break;
4175 case nir_intrinsic_load_tess_coord:
4176 result = ctx->abi->load_tess_coord(ctx->abi);
4177 break;
4178 case nir_intrinsic_load_tess_level_outer:
4179 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4180 break;
4181 case nir_intrinsic_load_tess_level_inner:
4182 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4183 break;
4184 case nir_intrinsic_load_tess_level_outer_default:
4185 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4186 break;
4187 case nir_intrinsic_load_tess_level_inner_default:
4188 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4189 break;
4190 case nir_intrinsic_load_patch_vertices_in:
4191 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4192 break;
4193 case nir_intrinsic_vote_all: {
4194 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4195 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4196 break;
4197 }
4198 case nir_intrinsic_vote_any: {
4199 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4200 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4201 break;
4202 }
4203 case nir_intrinsic_shuffle:
4204 if (ctx->ac.chip_class == GFX8 ||
4205 ctx->ac.chip_class == GFX9 ||
4206 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4207 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4208 get_src(ctx, instr->src[1]));
4209 } else {
4210 LLVMValueRef src = get_src(ctx, instr->src[0]);
4211 LLVMValueRef index = get_src(ctx, instr->src[1]);
4212 LLVMTypeRef type = LLVMTypeOf(src);
4213 struct waterfall_context wctx;
4214 LLVMValueRef index_val;
4215
4216 index_val = enter_waterfall(ctx, &wctx, index, true);
4217
4218 src = LLVMBuildZExt(ctx->ac.builder, src,
4219 ctx->ac.i32, "");
4220
4221 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4222 ctx->ac.i32,
4223 (LLVMValueRef []) { src, index_val }, 2,
4224 AC_FUNC_ATTR_READNONE |
4225 AC_FUNC_ATTR_CONVERGENT);
4226
4227 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4228
4229 result = exit_waterfall(ctx, &wctx, result);
4230 }
4231 break;
4232 case nir_intrinsic_reduce:
4233 result = ac_build_reduce(&ctx->ac,
4234 get_src(ctx, instr->src[0]),
4235 instr->const_index[0],
4236 instr->const_index[1]);
4237 break;
4238 case nir_intrinsic_inclusive_scan:
4239 result = ac_build_inclusive_scan(&ctx->ac,
4240 get_src(ctx, instr->src[0]),
4241 instr->const_index[0]);
4242 break;
4243 case nir_intrinsic_exclusive_scan:
4244 result = ac_build_exclusive_scan(&ctx->ac,
4245 get_src(ctx, instr->src[0]),
4246 instr->const_index[0]);
4247 break;
4248 case nir_intrinsic_quad_broadcast: {
4249 unsigned lane = nir_src_as_uint(instr->src[1]);
4250 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4251 lane, lane, lane, lane);
4252 break;
4253 }
4254 case nir_intrinsic_quad_swap_horizontal:
4255 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4256 break;
4257 case nir_intrinsic_quad_swap_vertical:
4258 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4259 break;
4260 case nir_intrinsic_quad_swap_diagonal:
4261 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4262 break;
4263 case nir_intrinsic_quad_swizzle_amd: {
4264 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4265 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4266 mask & 0x3, (mask >> 2) & 0x3,
4267 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4268 break;
4269 }
4270 case nir_intrinsic_masked_swizzle_amd: {
4271 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4272 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4273 break;
4274 }
4275 case nir_intrinsic_write_invocation_amd:
4276 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4277 get_src(ctx, instr->src[1]),
4278 get_src(ctx, instr->src[2]));
4279 break;
4280 case nir_intrinsic_mbcnt_amd:
4281 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4282 break;
4283 case nir_intrinsic_load_scratch: {
4284 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4285 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4286 offset);
4287 LLVMTypeRef comp_type =
4288 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4289 LLVMTypeRef vec_type =
4290 instr->dest.ssa.num_components == 1 ? comp_type :
4291 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4292 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4293 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4294 LLVMPointerType(vec_type, addr_space), "");
4295 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4296 break;
4297 }
4298 case nir_intrinsic_store_scratch: {
4299 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4300 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4301 offset);
4302 LLVMTypeRef comp_type =
4303 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4304 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4305 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4306 LLVMPointerType(comp_type, addr_space), "");
4307 LLVMValueRef src = get_src(ctx, instr->src[0]);
4308 unsigned wrmask = nir_intrinsic_write_mask(instr);
4309 while (wrmask) {
4310 int start, count;
4311 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4312
4313 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4314 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4315 LLVMTypeRef vec_type =
4316 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4317 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4318 offset_ptr,
4319 LLVMPointerType(vec_type, addr_space),
4320 "");
4321 LLVMValueRef offset_src =
4322 ac_extract_components(&ctx->ac, src, start, count);
4323 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4324 }
4325 break;
4326 }
4327 case nir_intrinsic_load_constant: {
4328 unsigned base = nir_intrinsic_base(instr);
4329 unsigned range = nir_intrinsic_range(instr);
4330
4331 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4332 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4333 LLVMConstInt(ctx->ac.i32, base, false), "");
4334
4335 /* Clamp the offset to avoid out-of-bound access because global
4336 * instructions can't handle them.
4337 */
4338 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4339 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4340 offset, size, "");
4341 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4342
4343 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4344 offset);
4345 LLVMTypeRef comp_type =
4346 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4347 LLVMTypeRef vec_type =
4348 instr->dest.ssa.num_components == 1 ? comp_type :
4349 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4350 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4351 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4352 LLVMPointerType(vec_type, addr_space), "");
4353 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4354 break;
4355 }
4356 default:
4357 fprintf(stderr, "Unknown intrinsic: ");
4358 nir_print_instr(&instr->instr, stderr);
4359 fprintf(stderr, "\n");
4360 break;
4361 }
4362 if (result) {
4363 ctx->ssa_defs[instr->dest.ssa.index] = result;
4364 }
4365 }
4366
4367 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4368 unsigned base_index,
4369 unsigned constant_index,
4370 LLVMValueRef dynamic_index)
4371 {
4372 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4373 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4374 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4375
4376 /* Bindless uniforms are 64bit so multiple index by 8 */
4377 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4378 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4379
4380 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4381
4382 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4383 NULL, 0, 0, true, true);
4384
4385 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4386 }
4387
4388 struct sampler_desc_address {
4389 unsigned descriptor_set;
4390 unsigned base_index; /* binding in vulkan */
4391 unsigned constant_index;
4392 LLVMValueRef dynamic_index;
4393 bool image;
4394 bool bindless;
4395 };
4396
4397 static struct sampler_desc_address
4398 get_sampler_desc_internal(struct ac_nir_context *ctx,
4399 nir_deref_instr *deref_instr,
4400 const nir_instr *instr,
4401 bool image)
4402 {
4403 LLVMValueRef index = NULL;
4404 unsigned constant_index = 0;
4405 unsigned descriptor_set;
4406 unsigned base_index;
4407 bool bindless = false;
4408
4409 if (!deref_instr) {
4410 descriptor_set = 0;
4411 if (image) {
4412 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4413 base_index = 0;
4414 bindless = true;
4415 index = get_src(ctx, img_instr->src[0]);
4416 } else {
4417 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4418 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4419 nir_tex_src_sampler_handle);
4420 if (sampSrcIdx != -1) {
4421 base_index = 0;
4422 bindless = true;
4423 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4424 } else {
4425 assert(tex_instr && !image);
4426 base_index = tex_instr->sampler_index;
4427 }
4428 }
4429 } else {
4430 while(deref_instr->deref_type != nir_deref_type_var) {
4431 if (deref_instr->deref_type == nir_deref_type_array) {
4432 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4433 if (!array_size)
4434 array_size = 1;
4435
4436 if (nir_src_is_const(deref_instr->arr.index)) {
4437 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4438 } else {
4439 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4440
4441 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4442 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4443
4444 if (!index)
4445 index = indirect;
4446 else
4447 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4448 }
4449
4450 deref_instr = nir_src_as_deref(deref_instr->parent);
4451 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4452 unsigned sidx = deref_instr->strct.index;
4453 deref_instr = nir_src_as_deref(deref_instr->parent);
4454 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4455 } else {
4456 unreachable("Unsupported deref type");
4457 }
4458 }
4459 descriptor_set = deref_instr->var->data.descriptor_set;
4460
4461 if (deref_instr->var->data.bindless) {
4462 /* For now just assert on unhandled variable types */
4463 assert(deref_instr->var->data.mode == nir_var_uniform);
4464
4465 base_index = deref_instr->var->data.driver_location;
4466 bindless = true;
4467
4468 index = index ? index : ctx->ac.i32_0;
4469 index = get_bindless_index_from_uniform(ctx, base_index,
4470 constant_index, index);
4471 } else
4472 base_index = deref_instr->var->data.binding;
4473 }
4474 return (struct sampler_desc_address) {
4475 .descriptor_set = descriptor_set,
4476 .base_index = base_index,
4477 .constant_index = constant_index,
4478 .dynamic_index = index,
4479 .image = image,
4480 .bindless = bindless,
4481 };
4482 }
4483
4484 /* Extract any possibly divergent index into a separate value that can be fed
4485 * into get_sampler_desc with the same arguments. */
4486 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4487 nir_deref_instr *deref_instr,
4488 const nir_instr *instr,
4489 bool image)
4490 {
4491 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4492 return addr.dynamic_index;
4493 }
4494
4495 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4496 nir_deref_instr *deref_instr,
4497 enum ac_descriptor_type desc_type,
4498 const nir_instr *instr,
4499 LLVMValueRef index,
4500 bool image, bool write)
4501 {
4502 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4503 return ctx->abi->load_sampler_desc(ctx->abi,
4504 addr.descriptor_set,
4505 addr.base_index,
4506 addr.constant_index, index,
4507 desc_type, addr.image, write, addr.bindless);
4508 }
4509
4510 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4511 *
4512 * GFX6-GFX7:
4513 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4514 * filtering manually. The driver sets img7 to a mask clearing
4515 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4516 * s_and_b32 samp0, samp0, img7
4517 *
4518 * GFX8:
4519 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4520 */
4521 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4522 LLVMValueRef res, LLVMValueRef samp)
4523 {
4524 LLVMBuilderRef builder = ctx->ac.builder;
4525 LLVMValueRef img7, samp0;
4526
4527 if (ctx->ac.chip_class >= GFX8)
4528 return samp;
4529
4530 img7 = LLVMBuildExtractElement(builder, res,
4531 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4532 samp0 = LLVMBuildExtractElement(builder, samp,
4533 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4534 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4535 return LLVMBuildInsertElement(builder, samp, samp0,
4536 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4537 }
4538
4539 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4540 nir_tex_instr *instr,
4541 struct waterfall_context *wctx,
4542 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4543 LLVMValueRef *fmask_ptr)
4544 {
4545 nir_deref_instr *texture_deref_instr = NULL;
4546 nir_deref_instr *sampler_deref_instr = NULL;
4547 int plane = -1;
4548
4549 for (unsigned i = 0; i < instr->num_srcs; i++) {
4550 switch (instr->src[i].src_type) {
4551 case nir_tex_src_texture_deref:
4552 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4553 break;
4554 case nir_tex_src_sampler_deref:
4555 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4556 break;
4557 case nir_tex_src_plane:
4558 plane = nir_src_as_int(instr->src[i].src);
4559 break;
4560 default:
4561 break;
4562 }
4563 }
4564
4565 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4566 &instr->instr, false);
4567 if (!sampler_deref_instr)
4568 sampler_deref_instr = texture_deref_instr;
4569
4570 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4571 &instr->instr, false);
4572 if (instr->texture_non_uniform)
4573 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4574
4575 if (instr->sampler_non_uniform)
4576 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4577
4578 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4579
4580 if (plane >= 0) {
4581 assert(instr->op != nir_texop_txf_ms &&
4582 instr->op != nir_texop_samples_identical);
4583 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4584
4585 main_descriptor = AC_DESC_PLANE_0 + plane;
4586 }
4587
4588 if (instr->op == nir_texop_fragment_mask_fetch) {
4589 /* The fragment mask is fetched from the compressed
4590 * multisampled surface.
4591 */
4592 main_descriptor = AC_DESC_FMASK;
4593 }
4594
4595 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4596 texture_dynamic_index, false, false);
4597
4598 if (samp_ptr) {
4599 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4600 sampler_dynamic_index, false, false);
4601 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4602 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4603 }
4604 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4605 instr->op == nir_texop_samples_identical))
4606 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4607 &instr->instr, texture_dynamic_index, false, false);
4608 }
4609
4610 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4611 LLVMValueRef coord)
4612 {
4613 coord = ac_to_float(ctx, coord);
4614 coord = ac_build_round(ctx, coord);
4615 coord = ac_to_integer(ctx, coord);
4616 return coord;
4617 }
4618
4619 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4620 {
4621 LLVMValueRef result = NULL;
4622 struct ac_image_args args = { 0 };
4623 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4624 LLVMValueRef ddx = NULL, ddy = NULL;
4625 unsigned offset_src = 0;
4626 struct waterfall_context wctx[2] = {{{0}}};
4627
4628 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4629
4630 for (unsigned i = 0; i < instr->num_srcs; i++) {
4631 switch (instr->src[i].src_type) {
4632 case nir_tex_src_coord: {
4633 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4634 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4635 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4636 break;
4637 }
4638 case nir_tex_src_projector:
4639 break;
4640 case nir_tex_src_comparator:
4641 if (instr->is_shadow) {
4642 args.compare = get_src(ctx, instr->src[i].src);
4643 args.compare = ac_to_float(&ctx->ac, args.compare);
4644 }
4645 break;
4646 case nir_tex_src_offset:
4647 args.offset = get_src(ctx, instr->src[i].src);
4648 offset_src = i;
4649 break;
4650 case nir_tex_src_bias:
4651 args.bias = get_src(ctx, instr->src[i].src);
4652 break;
4653 case nir_tex_src_lod: {
4654 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4655 args.level_zero = true;
4656 else
4657 args.lod = get_src(ctx, instr->src[i].src);
4658 break;
4659 }
4660 case nir_tex_src_ms_index:
4661 sample_index = get_src(ctx, instr->src[i].src);
4662 break;
4663 case nir_tex_src_ms_mcs:
4664 break;
4665 case nir_tex_src_ddx:
4666 ddx = get_src(ctx, instr->src[i].src);
4667 break;
4668 case nir_tex_src_ddy:
4669 ddy = get_src(ctx, instr->src[i].src);
4670 break;
4671 case nir_tex_src_min_lod:
4672 args.min_lod = get_src(ctx, instr->src[i].src);
4673 break;
4674 case nir_tex_src_texture_offset:
4675 case nir_tex_src_sampler_offset:
4676 case nir_tex_src_plane:
4677 default:
4678 break;
4679 }
4680 }
4681
4682 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4683 result = get_buffer_size(ctx, args.resource, true);
4684 goto write_result;
4685 }
4686
4687 if (instr->op == nir_texop_texture_samples) {
4688 LLVMValueRef res, samples, is_msaa;
4689 LLVMValueRef default_sample;
4690
4691 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4692 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4693 LLVMConstInt(ctx->ac.i32, 3, false), "");
4694 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4695 LLVMConstInt(ctx->ac.i32, 28, false), "");
4696 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4697 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4698 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4699 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4700
4701 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4702 LLVMConstInt(ctx->ac.i32, 16, false), "");
4703 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4704 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4705 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4706 samples, "");
4707
4708 if (ctx->abi->robust_buffer_access) {
4709 LLVMValueRef dword1, is_null_descriptor;
4710
4711 /* Extract the second dword of the descriptor, if it's
4712 * all zero, then it's a null descriptor.
4713 */
4714 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4715 LLVMConstInt(ctx->ac.i32, 1, false), "");
4716 is_null_descriptor =
4717 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4718 LLVMConstInt(ctx->ac.i32, 0, false), "");
4719 default_sample =
4720 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4721 ctx->ac.i32_0, ctx->ac.i32_1, "");
4722 } else {
4723 default_sample = ctx->ac.i32_1;
4724 }
4725
4726 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4727 default_sample, "");
4728 result = samples;
4729 goto write_result;
4730 }
4731
4732 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4733 LLVMValueRef offset[3], pack;
4734 for (unsigned chan = 0; chan < 3; ++chan)
4735 offset[chan] = ctx->ac.i32_0;
4736
4737 unsigned num_components = ac_get_llvm_num_components(args.offset);
4738 for (unsigned chan = 0; chan < num_components; chan++) {
4739 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4740 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4741 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4742 if (chan)
4743 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4744 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4745 }
4746 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4747 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4748 args.offset = pack;
4749 }
4750
4751 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4752 * OpenGL 4.5 spec says:
4753 *
4754 * "If the texture’s internal format indicates a fixed-point
4755 * depth texture, then D_t and D_ref are clamped to the
4756 * range [0, 1]; otherwise no clamping is performed."
4757 *
4758 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4759 * so the depth comparison value isn't clamped for Z16 and
4760 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4761 * an explicitly clamped 32-bit float format.
4762 */
4763 if (args.compare &&
4764 ctx->ac.chip_class >= GFX8 &&
4765 ctx->ac.chip_class <= GFX9 &&
4766 ctx->abi->clamp_shadow_reference) {
4767 LLVMValueRef upgraded, clamped;
4768
4769 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4770 LLVMConstInt(ctx->ac.i32, 3, false), "");
4771 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4772 LLVMConstInt(ctx->ac.i32, 29, false), "");
4773 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4774 clamped = ac_build_clamp(&ctx->ac, args.compare);
4775 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4776 args.compare, "");
4777 }
4778
4779 /* pack derivatives */
4780 if (ddx || ddy) {
4781 int num_src_deriv_channels, num_dest_deriv_channels;
4782 switch (instr->sampler_dim) {
4783 case GLSL_SAMPLER_DIM_3D:
4784 case GLSL_SAMPLER_DIM_CUBE:
4785 num_src_deriv_channels = 3;
4786 num_dest_deriv_channels = 3;
4787 break;
4788 case GLSL_SAMPLER_DIM_2D:
4789 default:
4790 num_src_deriv_channels = 2;
4791 num_dest_deriv_channels = 2;
4792 break;
4793 case GLSL_SAMPLER_DIM_1D:
4794 num_src_deriv_channels = 1;
4795 if (ctx->ac.chip_class == GFX9) {
4796 num_dest_deriv_channels = 2;
4797 } else {
4798 num_dest_deriv_channels = 1;
4799 }
4800 break;
4801 }
4802
4803 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4804 args.derivs[i] = ac_to_float(&ctx->ac,
4805 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4806 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4807 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4808 }
4809 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4810 args.derivs[i] = ctx->ac.f32_0;
4811 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4812 }
4813 }
4814
4815 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4816 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4817 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4818 if (instr->coord_components == 3)
4819 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4820 ac_prepare_cube_coords(&ctx->ac,
4821 instr->op == nir_texop_txd, instr->is_array,
4822 instr->op == nir_texop_lod, args.coords, args.derivs);
4823 }
4824
4825 /* Texture coordinates fixups */
4826 if (instr->coord_components > 1 &&
4827 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4828 instr->is_array &&
4829 instr->op != nir_texop_txf) {
4830 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4831 }
4832
4833 if (instr->coord_components > 2 &&
4834 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4835 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4836 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4837 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4838 instr->is_array &&
4839 instr->op != nir_texop_txf &&
4840 instr->op != nir_texop_txf_ms &&
4841 instr->op != nir_texop_fragment_fetch &&
4842 instr->op != nir_texop_fragment_mask_fetch) {
4843 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4844 }
4845
4846 if (ctx->ac.chip_class == GFX9 &&
4847 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4848 instr->op != nir_texop_lod) {
4849 LLVMValueRef filler;
4850 if (instr->op == nir_texop_txf)
4851 filler = ctx->ac.i32_0;
4852 else
4853 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4854
4855 if (instr->is_array)
4856 args.coords[2] = args.coords[1];
4857 args.coords[1] = filler;
4858 }
4859
4860 /* Pack sample index */
4861 if (sample_index && (instr->op == nir_texop_txf_ms ||
4862 instr->op == nir_texop_fragment_fetch))
4863 args.coords[instr->coord_components] = sample_index;
4864
4865 if (instr->op == nir_texop_samples_identical) {
4866 struct ac_image_args txf_args = { 0 };
4867 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4868
4869 txf_args.dmask = 0xf;
4870 txf_args.resource = fmask_ptr;
4871 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4872 result = build_tex_intrinsic(ctx, instr, &txf_args);
4873
4874 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4875 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4876 goto write_result;
4877 }
4878
4879 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4880 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4881 instr->op != nir_texop_txs &&
4882 instr->op != nir_texop_fragment_fetch &&
4883 instr->op != nir_texop_fragment_mask_fetch) {
4884 unsigned sample_chan = instr->is_array ? 3 : 2;
4885 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4886 &ctx->ac, args.coords[0], args.coords[1],
4887 instr->is_array ? args.coords[2] : NULL,
4888 args.coords[sample_chan], fmask_ptr);
4889 }
4890
4891 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4892 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4893 num_offsets = MIN2(num_offsets, instr->coord_components);
4894 for (unsigned i = 0; i < num_offsets; ++i) {
4895 args.coords[i] = LLVMBuildAdd(
4896 ctx->ac.builder, args.coords[i],
4897 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4898 }
4899 args.offset = NULL;
4900 }
4901
4902 /* DMASK was repurposed for GATHER4. 4 components are always
4903 * returned and DMASK works like a swizzle - it selects
4904 * the component to fetch. The only valid DMASK values are
4905 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4906 * (red,red,red,red) etc.) The ISA document doesn't mention
4907 * this.
4908 */
4909 args.dmask = 0xf;
4910 if (instr->op == nir_texop_tg4) {
4911 if (instr->is_shadow)
4912 args.dmask = 1;
4913 else
4914 args.dmask = 1 << instr->component;
4915 }
4916
4917 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4918 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4919 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4920 }
4921
4922 /* Adjust the number of coordinates because we only need (x,y) for 2D
4923 * multisampled images and (x,y,layer) for 2D multisampled layered
4924 * images or for multisampled input attachments.
4925 */
4926 if (instr->op == nir_texop_fragment_mask_fetch) {
4927 if (args.dim == ac_image_2dmsaa) {
4928 args.dim = ac_image_2d;
4929 } else {
4930 assert(args.dim == ac_image_2darraymsaa);
4931 args.dim = ac_image_2darray;
4932 }
4933 }
4934
4935 assert(instr->dest.is_ssa);
4936 args.d16 = instr->dest.ssa.bit_size == 16;
4937
4938 result = build_tex_intrinsic(ctx, instr, &args);
4939
4940 if (instr->op == nir_texop_query_levels)
4941 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4942 else if (instr->is_shadow && instr->is_new_style_shadow &&
4943 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4944 instr->op != nir_texop_tg4)
4945 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4946 else if (instr->op == nir_texop_txs &&
4947 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4948 instr->is_array) {
4949 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4950 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4951 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4952 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4953 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4954 } else if (ctx->ac.chip_class == GFX9 &&
4955 instr->op == nir_texop_txs &&
4956 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4957 instr->is_array) {
4958 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4959 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4960 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4961 ctx->ac.i32_1, "");
4962 } else if (instr->dest.ssa.num_components != 4)
4963 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4964
4965 write_result:
4966 if (result) {
4967 assert(instr->dest.is_ssa);
4968 result = ac_to_integer(&ctx->ac, result);
4969
4970 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4971 result = exit_waterfall(ctx, wctx + i, result);
4972 }
4973
4974 ctx->ssa_defs[instr->dest.ssa.index] = result;
4975 }
4976 }
4977
4978 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4979 {
4980 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4981 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4982
4983 ctx->ssa_defs[instr->dest.ssa.index] = result;
4984 _mesa_hash_table_insert(ctx->phis, instr, result);
4985 }
4986
4987 static void visit_post_phi(struct ac_nir_context *ctx,
4988 nir_phi_instr *instr,
4989 LLVMValueRef llvm_phi)
4990 {
4991 nir_foreach_phi_src(src, instr) {
4992 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4993 LLVMValueRef llvm_src = get_src(ctx, src->src);
4994
4995 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4996 }
4997 }
4998
4999 static void phi_post_pass(struct ac_nir_context *ctx)
5000 {
5001 hash_table_foreach(ctx->phis, entry) {
5002 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
5003 (LLVMValueRef)entry->data);
5004 }
5005 }
5006
5007
5008 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
5009 nir_foreach_use(use_src, def) {
5010 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
5011 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
5012 if (instr->intrinsic == nir_intrinsic_store_deref)
5013 return true;
5014 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
5015 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
5016 if (instr->op == nir_op_vec4 &&
5017 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
5018 return true;
5019 }
5020 }
5021 }
5022 return false;
5023 }
5024
5025 static void visit_ssa_undef(struct ac_nir_context *ctx,
5026 const nir_ssa_undef_instr *instr)
5027 {
5028 unsigned num_components = instr->def.num_components;
5029 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
5030
5031 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
5032 LLVMValueRef undef;
5033
5034 if (num_components == 1)
5035 undef = LLVMGetUndef(type);
5036 else {
5037 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
5038 }
5039 ctx->ssa_defs[instr->def.index] = undef;
5040 } else {
5041 LLVMValueRef zero = LLVMConstInt(type, 0, false);
5042 if (num_components > 1) {
5043 zero = ac_build_gather_values_extended(
5044 &ctx->ac, &zero, 4, 0, false, false);
5045 }
5046 ctx->ssa_defs[instr->def.index] = zero;
5047 }
5048 }
5049
5050 static void visit_jump(struct ac_llvm_context *ctx,
5051 const nir_jump_instr *instr)
5052 {
5053 switch (instr->type) {
5054 case nir_jump_break:
5055 ac_build_break(ctx);
5056 break;
5057 case nir_jump_continue:
5058 ac_build_continue(ctx);
5059 break;
5060 default:
5061 fprintf(stderr, "Unknown NIR jump instr: ");
5062 nir_print_instr(&instr->instr, stderr);
5063 fprintf(stderr, "\n");
5064 abort();
5065 }
5066 }
5067
5068 static LLVMTypeRef
5069 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
5070 enum glsl_base_type type)
5071 {
5072 switch (type) {
5073 case GLSL_TYPE_INT:
5074 case GLSL_TYPE_UINT:
5075 case GLSL_TYPE_BOOL:
5076 case GLSL_TYPE_SUBROUTINE:
5077 return ac->i32;
5078 case GLSL_TYPE_INT8:
5079 case GLSL_TYPE_UINT8:
5080 return ac->i8;
5081 case GLSL_TYPE_INT16:
5082 case GLSL_TYPE_UINT16:
5083 return ac->i16;
5084 case GLSL_TYPE_FLOAT:
5085 return ac->f32;
5086 case GLSL_TYPE_FLOAT16:
5087 return ac->f16;
5088 case GLSL_TYPE_INT64:
5089 case GLSL_TYPE_UINT64:
5090 return ac->i64;
5091 case GLSL_TYPE_DOUBLE:
5092 return ac->f64;
5093 default:
5094 unreachable("unknown GLSL type");
5095 }
5096 }
5097
5098 static LLVMTypeRef
5099 glsl_to_llvm_type(struct ac_llvm_context *ac,
5100 const struct glsl_type *type)
5101 {
5102 if (glsl_type_is_scalar(type)) {
5103 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
5104 }
5105
5106 if (glsl_type_is_vector(type)) {
5107 return LLVMVectorType(
5108 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
5109 glsl_get_vector_elements(type));
5110 }
5111
5112 if (glsl_type_is_matrix(type)) {
5113 return LLVMArrayType(
5114 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
5115 glsl_get_matrix_columns(type));
5116 }
5117
5118 if (glsl_type_is_array(type)) {
5119 return LLVMArrayType(
5120 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
5121 glsl_get_length(type));
5122 }
5123
5124 assert(glsl_type_is_struct_or_ifc(type));
5125
5126 LLVMTypeRef member_types[glsl_get_length(type)];
5127
5128 for (unsigned i = 0; i < glsl_get_length(type); i++) {
5129 member_types[i] =
5130 glsl_to_llvm_type(ac,
5131 glsl_get_struct_field(type, i));
5132 }
5133
5134 return LLVMStructTypeInContext(ac->context, member_types,
5135 glsl_get_length(type), false);
5136 }
5137
5138 static void visit_deref(struct ac_nir_context *ctx,
5139 nir_deref_instr *instr)
5140 {
5141 if (instr->mode != nir_var_mem_shared &&
5142 instr->mode != nir_var_mem_global)
5143 return;
5144
5145 LLVMValueRef result = NULL;
5146 switch(instr->deref_type) {
5147 case nir_deref_type_var: {
5148 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
5149 result = entry->data;
5150 break;
5151 }
5152 case nir_deref_type_struct:
5153 if (instr->mode == nir_var_mem_global) {
5154 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5155 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5156 instr->strct.index);
5157 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5158 LLVMConstInt(ctx->ac.i32, offset, 0));
5159 } else {
5160 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5161 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5162 }
5163 break;
5164 case nir_deref_type_array:
5165 if (instr->mode == nir_var_mem_global) {
5166 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5167 unsigned stride = glsl_get_explicit_stride(parent->type);
5168
5169 if ((glsl_type_is_matrix(parent->type) &&
5170 glsl_matrix_type_is_row_major(parent->type)) ||
5171 (glsl_type_is_vector(parent->type) && stride == 0))
5172 stride = type_scalar_size_bytes(parent->type);
5173
5174 assert(stride > 0);
5175 LLVMValueRef index = get_src(ctx, instr->arr.index);
5176 if (LLVMTypeOf(index) != ctx->ac.i64)
5177 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5178
5179 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5180
5181 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5182 } else {
5183 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5184 get_src(ctx, instr->arr.index));
5185 }
5186 break;
5187 case nir_deref_type_ptr_as_array:
5188 if (instr->mode == nir_var_mem_global) {
5189 unsigned stride = nir_deref_instr_array_stride(instr);
5190
5191 LLVMValueRef index = get_src(ctx, instr->arr.index);
5192 if (LLVMTypeOf(index) != ctx->ac.i64)
5193 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5194
5195 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5196
5197 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5198 } else {
5199 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5200 get_src(ctx, instr->arr.index));
5201 }
5202 break;
5203 case nir_deref_type_cast: {
5204 result = get_src(ctx, instr->parent);
5205
5206 /* We can't use the structs from LLVM because the shader
5207 * specifies its own offsets. */
5208 LLVMTypeRef pointee_type = ctx->ac.i8;
5209 if (instr->mode == nir_var_mem_shared)
5210 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5211
5212 unsigned address_space;
5213
5214 switch(instr->mode) {
5215 case nir_var_mem_shared:
5216 address_space = AC_ADDR_SPACE_LDS;
5217 break;
5218 case nir_var_mem_global:
5219 address_space = AC_ADDR_SPACE_GLOBAL;
5220 break;
5221 default:
5222 unreachable("Unhandled address space");
5223 }
5224
5225 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5226
5227 if (LLVMTypeOf(result) != type) {
5228 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5229 result = LLVMBuildBitCast(ctx->ac.builder, result,
5230 type, "");
5231 } else {
5232 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5233 type, "");
5234 }
5235 }
5236 break;
5237 }
5238 default:
5239 unreachable("Unhandled deref_instr deref type");
5240 }
5241
5242 ctx->ssa_defs[instr->dest.ssa.index] = result;
5243 }
5244
5245 static void visit_cf_list(struct ac_nir_context *ctx,
5246 struct exec_list *list);
5247
5248 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5249 {
5250 nir_foreach_instr(instr, block)
5251 {
5252 switch (instr->type) {
5253 case nir_instr_type_alu:
5254 visit_alu(ctx, nir_instr_as_alu(instr));
5255 break;
5256 case nir_instr_type_load_const:
5257 visit_load_const(ctx, nir_instr_as_load_const(instr));
5258 break;
5259 case nir_instr_type_intrinsic:
5260 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5261 break;
5262 case nir_instr_type_tex:
5263 visit_tex(ctx, nir_instr_as_tex(instr));
5264 break;
5265 case nir_instr_type_phi:
5266 visit_phi(ctx, nir_instr_as_phi(instr));
5267 break;
5268 case nir_instr_type_ssa_undef:
5269 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5270 break;
5271 case nir_instr_type_jump:
5272 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5273 break;
5274 case nir_instr_type_deref:
5275 visit_deref(ctx, nir_instr_as_deref(instr));
5276 break;
5277 default:
5278 fprintf(stderr, "Unknown NIR instr type: ");
5279 nir_print_instr(instr, stderr);
5280 fprintf(stderr, "\n");
5281 abort();
5282 }
5283 }
5284
5285 _mesa_hash_table_insert(ctx->defs, block,
5286 LLVMGetInsertBlock(ctx->ac.builder));
5287 }
5288
5289 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5290 {
5291 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5292
5293 nir_block *then_block =
5294 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5295
5296 ac_build_uif(&ctx->ac, value, then_block->index);
5297
5298 visit_cf_list(ctx, &if_stmt->then_list);
5299
5300 if (!exec_list_is_empty(&if_stmt->else_list)) {
5301 nir_block *else_block =
5302 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5303
5304 ac_build_else(&ctx->ac, else_block->index);
5305 visit_cf_list(ctx, &if_stmt->else_list);
5306 }
5307
5308 ac_build_endif(&ctx->ac, then_block->index);
5309 }
5310
5311 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5312 {
5313 nir_block *first_loop_block =
5314 (nir_block *) exec_list_get_head(&loop->body);
5315
5316 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5317
5318 visit_cf_list(ctx, &loop->body);
5319
5320 ac_build_endloop(&ctx->ac, first_loop_block->index);
5321 }
5322
5323 static void visit_cf_list(struct ac_nir_context *ctx,
5324 struct exec_list *list)
5325 {
5326 foreach_list_typed(nir_cf_node, node, node, list)
5327 {
5328 switch (node->type) {
5329 case nir_cf_node_block:
5330 visit_block(ctx, nir_cf_node_as_block(node));
5331 break;
5332
5333 case nir_cf_node_if:
5334 visit_if(ctx, nir_cf_node_as_if(node));
5335 break;
5336
5337 case nir_cf_node_loop:
5338 visit_loop(ctx, nir_cf_node_as_loop(node));
5339 break;
5340
5341 default:
5342 assert(0);
5343 }
5344 }
5345 }
5346
5347 void
5348 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5349 struct ac_shader_abi *abi,
5350 struct nir_shader *nir,
5351 struct nir_variable *variable,
5352 gl_shader_stage stage)
5353 {
5354 unsigned output_loc = variable->data.driver_location / 4;
5355 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5356
5357 /* tess ctrl has it's own load/store paths for outputs */
5358 if (stage == MESA_SHADER_TESS_CTRL)
5359 return;
5360
5361 if (stage == MESA_SHADER_VERTEX ||
5362 stage == MESA_SHADER_TESS_EVAL ||
5363 stage == MESA_SHADER_GEOMETRY) {
5364 int idx = variable->data.location + variable->data.index;
5365 if (idx == VARYING_SLOT_CLIP_DIST0) {
5366 int length = nir->info.clip_distance_array_size +
5367 nir->info.cull_distance_array_size;
5368
5369 if (length > 4)
5370 attrib_count = 2;
5371 else
5372 attrib_count = 1;
5373 }
5374 }
5375
5376 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5377 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5378 for (unsigned i = 0; i < attrib_count; ++i) {
5379 for (unsigned chan = 0; chan < 4; chan++) {
5380 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5381 ac_build_alloca_undef(ctx, type, "");
5382 }
5383 }
5384 }
5385
5386 static void
5387 setup_locals(struct ac_nir_context *ctx,
5388 struct nir_function *func)
5389 {
5390 int i, j;
5391 ctx->num_locals = 0;
5392 nir_foreach_function_temp_variable(variable, func->impl) {
5393 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5394 variable->data.driver_location = ctx->num_locals * 4;
5395 variable->data.location_frac = 0;
5396 ctx->num_locals += attrib_count;
5397 }
5398 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5399 if (!ctx->locals)
5400 return;
5401
5402 for (i = 0; i < ctx->num_locals; i++) {
5403 for (j = 0; j < 4; j++) {
5404 ctx->locals[i * 4 + j] =
5405 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5406 }
5407 }
5408 }
5409
5410 static void
5411 setup_scratch(struct ac_nir_context *ctx,
5412 struct nir_shader *shader)
5413 {
5414 if (shader->scratch_size == 0)
5415 return;
5416
5417 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5418 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5419 "scratch");
5420 }
5421
5422 static void
5423 setup_constant_data(struct ac_nir_context *ctx,
5424 struct nir_shader *shader)
5425 {
5426 if (!shader->constant_data)
5427 return;
5428
5429 LLVMValueRef data =
5430 LLVMConstStringInContext(ctx->ac.context,
5431 shader->constant_data,
5432 shader->constant_data_size,
5433 true);
5434 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5435
5436 /* We want to put the constant data in the CONST address space so that
5437 * we can use scalar loads. However, LLVM versions before 10 put these
5438 * variables in the same section as the code, which is unacceptable
5439 * for RadeonSI as it needs to relocate all the data sections after
5440 * the code sections. See https://reviews.llvm.org/D65813.
5441 */
5442 unsigned address_space =
5443 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5444
5445 LLVMValueRef global =
5446 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5447 "const_data",
5448 address_space);
5449
5450 LLVMSetInitializer(global, data);
5451 LLVMSetGlobalConstant(global, true);
5452 LLVMSetVisibility(global, LLVMHiddenVisibility);
5453 ctx->constant_data = global;
5454 }
5455
5456 static void
5457 setup_shared(struct ac_nir_context *ctx,
5458 struct nir_shader *nir)
5459 {
5460 if (ctx->ac.lds)
5461 return;
5462
5463 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5464 nir->info.cs.shared_size);
5465
5466 LLVMValueRef lds =
5467 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5468 "compute_lds",
5469 AC_ADDR_SPACE_LDS);
5470 LLVMSetAlignment(lds, 64 * 1024);
5471
5472 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5473 LLVMPointerType(ctx->ac.i8,
5474 AC_ADDR_SPACE_LDS), "");
5475 }
5476
5477 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5478 const struct ac_shader_args *args, struct nir_shader *nir)
5479 {
5480 struct ac_nir_context ctx = {};
5481 struct nir_function *func;
5482
5483 ctx.ac = *ac;
5484 ctx.abi = abi;
5485 ctx.args = args;
5486
5487 ctx.stage = nir->info.stage;
5488 ctx.info = &nir->info;
5489
5490 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5491
5492 /* TODO: remove this after RADV switches to lowered IO */
5493 if (!nir->info.io_lowered) {
5494 nir_foreach_shader_out_variable(variable, nir) {
5495 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5496 ctx.stage);
5497 }
5498 }
5499
5500 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5501 _mesa_key_pointer_equal);
5502 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5503 _mesa_key_pointer_equal);
5504 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5505 _mesa_key_pointer_equal);
5506
5507 if (ctx.abi->kill_ps_if_inf_interp)
5508 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5509 _mesa_key_pointer_equal);
5510
5511 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5512
5513 nir_index_ssa_defs(func->impl);
5514 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5515
5516 setup_locals(&ctx, func);
5517 setup_scratch(&ctx, nir);
5518 setup_constant_data(&ctx, nir);
5519
5520 if (gl_shader_stage_is_compute(nir->info.stage))
5521 setup_shared(&ctx, nir);
5522
5523 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5524 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5525 /* true = don't kill. */
5526 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5527 }
5528
5529 visit_cf_list(&ctx, &func->impl->body);
5530 phi_post_pass(&ctx);
5531
5532 if (ctx.ac.postponed_kill)
5533 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5534 ctx.ac.postponed_kill, ""));
5535
5536 if (!gl_shader_stage_is_compute(nir->info.stage))
5537 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5538 ctx.abi->outputs);
5539
5540 free(ctx.locals);
5541 free(ctx.ssa_defs);
5542 ralloc_free(ctx.defs);
5543 ralloc_free(ctx.phis);
5544 ralloc_free(ctx.vars);
5545 if (ctx.abi->kill_ps_if_inf_interp)
5546 ralloc_free(ctx.verified_interp);
5547 }
5548
5549 bool
5550 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5551 {
5552 bool progress = false;
5553
5554 /* Lower large variables to scratch first so that we won't bloat the
5555 * shader by generating large if ladders for them. We later lower
5556 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5557 */
5558 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5559 nir_var_function_temp,
5560 256,
5561 glsl_get_natural_size_align_bytes);
5562
5563 /* While it would be nice not to have this flag, we are constrained
5564 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5565 */
5566 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5567
5568 /* TODO: Indirect indexing of GS inputs is unimplemented.
5569 *
5570 * TCS and TES load inputs directly from LDS or offchip memory, so
5571 * indirect indexing is trivial.
5572 */
5573 nir_variable_mode indirect_mask = 0;
5574 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5575 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5576 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5577 !llvm_has_working_vgpr_indexing)) {
5578 indirect_mask |= nir_var_shader_in;
5579 }
5580 if (!llvm_has_working_vgpr_indexing &&
5581 nir->info.stage != MESA_SHADER_TESS_CTRL)
5582 indirect_mask |= nir_var_shader_out;
5583
5584 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5585 * smart enough to handle indirects without causing excess spilling
5586 * causing the gpu to hang.
5587 *
5588 * See the following thread for more details of the problem:
5589 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5590 */
5591 indirect_mask |= nir_var_function_temp;
5592
5593 progress |= nir_lower_indirect_derefs(nir, indirect_mask, UINT32_MAX);
5594 return progress;
5595 }
5596
5597 static unsigned
5598 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5599 {
5600 if (intrin->intrinsic != nir_intrinsic_store_output)
5601 return 0;
5602
5603 unsigned writemask = nir_intrinsic_write_mask(intrin) <<
5604 nir_intrinsic_component(intrin);
5605 unsigned location = nir_intrinsic_io_semantics(intrin).location;
5606
5607 if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5608 return writemask << 4;
5609 else if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5610 return writemask;
5611
5612 return 0;
5613 }
5614
5615 static void
5616 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5617 unsigned *cond_block_tf_writemask,
5618 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5619 {
5620 switch (cf_node->type) {
5621 case nir_cf_node_block: {
5622 nir_block *block = nir_cf_node_as_block(cf_node);
5623 nir_foreach_instr(instr, block) {
5624 if (instr->type != nir_instr_type_intrinsic)
5625 continue;
5626
5627 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5628 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5629
5630 /* If we find a barrier in nested control flow put this in the
5631 * too hard basket. In GLSL this is not possible but it is in
5632 * SPIR-V.
5633 */
5634 if (is_nested_cf) {
5635 *tessfactors_are_def_in_all_invocs = false;
5636 return;
5637 }
5638
5639 /* The following case must be prevented:
5640 * gl_TessLevelInner = ...;
5641 * barrier();
5642 * if (gl_InvocationID == 1)
5643 * gl_TessLevelInner = ...;
5644 *
5645 * If you consider disjoint code segments separated by barriers, each
5646 * such segment that writes tess factor channels should write the same
5647 * channels in all codepaths within that segment.
5648 */
5649 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5650 /* Accumulate the result: */
5651 *tessfactors_are_def_in_all_invocs &=
5652 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5653
5654 /* Analyze the next code segment from scratch. */
5655 *upper_block_tf_writemask = 0;
5656 *cond_block_tf_writemask = 0;
5657 }
5658 } else
5659 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5660 }
5661
5662 break;
5663 }
5664 case nir_cf_node_if: {
5665 unsigned then_tessfactor_writemask = 0;
5666 unsigned else_tessfactor_writemask = 0;
5667
5668 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5669 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5670 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5671 cond_block_tf_writemask,
5672 tessfactors_are_def_in_all_invocs, true);
5673 }
5674
5675 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5676 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5677 cond_block_tf_writemask,
5678 tessfactors_are_def_in_all_invocs, true);
5679 }
5680
5681 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5682 /* If both statements write the same tess factor channels,
5683 * we can say that the upper block writes them too.
5684 */
5685 *upper_block_tf_writemask |= then_tessfactor_writemask &
5686 else_tessfactor_writemask;
5687 *cond_block_tf_writemask |= then_tessfactor_writemask |
5688 else_tessfactor_writemask;
5689 }
5690
5691 break;
5692 }
5693 case nir_cf_node_loop: {
5694 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5695 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5696 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5697 cond_block_tf_writemask,
5698 tessfactors_are_def_in_all_invocs, true);
5699 }
5700
5701 break;
5702 }
5703 default:
5704 unreachable("unknown cf node type");
5705 }
5706 }
5707
5708 bool
5709 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5710 {
5711 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5712
5713 /* The pass works as follows:
5714 * If all codepaths write tess factors, we can say that all
5715 * invocations define tess factors.
5716 *
5717 * Each tess factor channel is tracked separately.
5718 */
5719 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5720 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5721
5722 /* Initial value = true. Here the pass will accumulate results from
5723 * multiple segments surrounded by barriers. If tess factors aren't
5724 * written at all, it's a shader bug and we don't care if this will be
5725 * true.
5726 */
5727 bool tessfactors_are_def_in_all_invocs = true;
5728
5729 nir_foreach_function(function, nir) {
5730 if (function->impl) {
5731 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5732 scan_tess_ctrl(node, &main_block_tf_writemask,
5733 &cond_block_tf_writemask,
5734 &tessfactors_are_def_in_all_invocs,
5735 false);
5736 }
5737 }
5738 }
5739
5740 /* Accumulate the result for the last code segment separated by a
5741 * barrier.
5742 */
5743 if (main_block_tf_writemask || cond_block_tf_writemask) {
5744 tessfactors_are_def_in_all_invocs &=
5745 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5746 }
5747
5748 return tessfactors_are_def_in_all_invocs;
5749 }