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aco: use nir_intrinsic_has_access
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0, LLVMValueRef src1)
223 {
224 char name[64], type[64];
225 LLVMValueRef params[] = {
226 ac_to_float(ctx, src0),
227 ac_to_float(ctx, src1),
228 };
229
230 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
231 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
237 const char *intrin,
238 LLVMTypeRef result_type,
239 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
240 {
241 char name[64], type[64];
242 LLVMValueRef params[] = {
243 ac_to_float(ctx, src0),
244 ac_to_float(ctx, src1),
245 ac_to_float(ctx, src2),
246 };
247
248 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
249 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
250 assert(length < sizeof(name));
251 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
252 }
253
254 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
255 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
256 {
257 LLVMTypeRef src1_type = LLVMTypeOf(src1);
258 LLVMTypeRef src2_type = LLVMTypeOf(src2);
259
260 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
261
262 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
263 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
264 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
265 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
266 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
267 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
268 }
269
270 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
271 ctx->i32_0, "");
272 return LLVMBuildSelect(ctx->builder, v,
273 ac_to_integer_or_pointer(ctx, src1),
274 ac_to_integer_or_pointer(ctx, src2), "");
275 }
276
277 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
278 LLVMValueRef src0)
279 {
280 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
281 }
282
283 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
284 const char *intrin,
285 LLVMValueRef src0, LLVMValueRef src1)
286 {
287 LLVMTypeRef ret_type;
288 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
289 LLVMValueRef res;
290 LLVMValueRef params[] = { src0, src1 };
291 ret_type = LLVMStructTypeInContext(ctx->context, types,
292 2, true);
293
294 res = ac_build_intrinsic(ctx, intrin, ret_type,
295 params, 2, AC_FUNC_ATTR_READNONE);
296
297 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
298 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
299 return res;
300 }
301
302 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
303 LLVMValueRef src0,
304 unsigned bitsize)
305 {
306 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
307 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
308 "");
309 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
310
311 switch (bitsize) {
312 case 16:
313 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
314 case 32:
315 return result;
316 case 64:
317 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
318 default:
319 unreachable("Unsupported bit size.");
320 }
321 }
322
323 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
324 LLVMValueRef src0)
325 {
326 src0 = ac_to_float(ctx, src0);
327 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
328 return LLVMBuildSExt(ctx->builder,
329 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
330 ctx->i32, "");
331 }
332
333 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
334 LLVMValueRef src0,
335 unsigned bitsize)
336 {
337 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
338
339 switch (bitsize) {
340 case 8:
341 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
342 case 16:
343 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
344 case 32:
345 return result;
346 case 64:
347 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
348 default:
349 unreachable("Unsupported bit size.");
350 }
351 }
352
353 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
354 LLVMValueRef src0)
355 {
356 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
357 return LLVMBuildSExt(ctx->builder,
358 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
359 ctx->i32, "");
360 }
361
362 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
363 LLVMValueRef src0)
364 {
365 LLVMValueRef result;
366 LLVMValueRef cond = NULL;
367
368 src0 = ac_to_float(ctx, src0);
369 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
370
371 if (ctx->chip_class >= GFX8) {
372 LLVMValueRef args[2];
373 /* Check if the result is a denormal - and flush to 0 if so. */
374 args[0] = result;
375 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
376 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
377 }
378
379 /* need to convert back up to f32 */
380 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
381
382 if (ctx->chip_class >= GFX8)
383 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
384 else {
385 /* for GFX6-GFX7 */
386 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
387 * so compare the result and flush to 0 if it's smaller.
388 */
389 LLVMValueRef temp, cond2;
390 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
391 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
392 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
393 temp, "");
394 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
395 temp, ctx->f32_0, "");
396 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
397 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
398 }
399 return result;
400 }
401
402 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
403 LLVMValueRef src0, LLVMValueRef src1)
404 {
405 LLVMValueRef dst64, result;
406 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
407 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
408
409 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
410 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
411 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
412 return result;
413 }
414
415 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
416 LLVMValueRef src0, LLVMValueRef src1)
417 {
418 LLVMValueRef dst64, result;
419 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
420 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
421
422 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
423 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
424 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
425 return result;
426 }
427
428 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
429 LLVMValueRef bits, LLVMValueRef offset)
430 {
431 /* mask = ((1 << bits) - 1) << offset */
432 return LLVMBuildShl(ctx->builder,
433 LLVMBuildSub(ctx->builder,
434 LLVMBuildShl(ctx->builder,
435 ctx->i32_1,
436 bits, ""),
437 ctx->i32_1, ""),
438 offset, "");
439 }
440
441 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
442 LLVMValueRef mask, LLVMValueRef insert,
443 LLVMValueRef base)
444 {
445 /* Calculate:
446 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
447 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
448 */
449 return LLVMBuildXor(ctx->builder, base,
450 LLVMBuildAnd(ctx->builder, mask,
451 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
452 }
453
454 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
455 LLVMValueRef src0,
456 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
457 LLVMValueRef args[2]))
458 {
459 LLVMValueRef comp[2];
460
461 src0 = ac_to_float(ctx, src0);
462 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
463 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
464
465 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
466 }
467
468 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
469 LLVMValueRef src0)
470 {
471 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
472 LLVMValueRef temps[2], val;
473 int i;
474
475 for (i = 0; i < 2; i++) {
476 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
477 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
478 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
479 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
480 }
481 return ac_build_gather_values(ctx, temps, 2);
482 }
483
484 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
485 nir_op op,
486 LLVMValueRef src0)
487 {
488 unsigned mask;
489 int idx;
490 LLVMValueRef result;
491
492 if (op == nir_op_fddx_fine)
493 mask = AC_TID_MASK_LEFT;
494 else if (op == nir_op_fddy_fine)
495 mask = AC_TID_MASK_TOP;
496 else
497 mask = AC_TID_MASK_TOP_LEFT;
498
499 /* for DDX we want to next X pixel, DDY next Y pixel. */
500 if (op == nir_op_fddx_fine ||
501 op == nir_op_fddx_coarse ||
502 op == nir_op_fddx)
503 idx = 1;
504 else
505 idx = 2;
506
507 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
508 return result;
509 }
510
511 struct waterfall_context {
512 LLVMBasicBlockRef phi_bb[2];
513 bool use_waterfall;
514 };
515
516 /* To deal with divergent descriptors we can create a loop that handles all
517 * lanes with the same descriptor on a given iteration (henceforth a
518 * waterfall loop).
519 *
520 * These helper create the begin and end of the loop leaving the caller
521 * to implement the body.
522 *
523 * params:
524 * - ctx is the usal nir context
525 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
526 * - value is the possibly divergent value for which we built the loop
527 * - divergent is whether value is actually divergent. If false we just pass
528 * things through.
529 */
530 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
531 struct waterfall_context *wctx,
532 LLVMValueRef value, bool divergent)
533 {
534 /* If the app claims the value is divergent but it is constant we can
535 * end up with a dynamic index of NULL. */
536 if (!value)
537 divergent = false;
538
539 wctx->use_waterfall = divergent;
540 if (!divergent)
541 return value;
542
543 ac_build_bgnloop(&ctx->ac, 6000);
544
545 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
546
547 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
548 scalar_value, "uniform_active");
549
550 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
551 ac_build_ifcc(&ctx->ac, active, 6001);
552
553 return scalar_value;
554 }
555
556 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
557 struct waterfall_context *wctx,
558 LLVMValueRef value)
559 {
560 LLVMValueRef ret = NULL;
561 LLVMValueRef phi_src[2];
562 LLVMValueRef cc_phi_src[2] = {
563 LLVMConstInt(ctx->ac.i32, 0, false),
564 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
565 };
566
567 if (!wctx->use_waterfall)
568 return value;
569
570 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
571
572 ac_build_endif(&ctx->ac, 6001);
573
574 if (value) {
575 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
576 phi_src[1] = value;
577
578 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
579 }
580
581 /*
582 * By using the optimization barrier on the exit decision, we decouple
583 * the operations from the break, and hence avoid LLVM hoisting the
584 * opteration into the break block.
585 */
586 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
587 ac_build_optimization_barrier(&ctx->ac, &cc);
588
589 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
590 ac_build_ifcc(&ctx->ac, active, 6002);
591 ac_build_break(&ctx->ac);
592 ac_build_endif(&ctx->ac, 6002);
593
594 ac_build_endloop(&ctx->ac, 6000);
595 return ret;
596 }
597
598 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
599 {
600 LLVMValueRef src[4], result = NULL;
601 unsigned num_components = instr->dest.dest.ssa.num_components;
602 unsigned src_components;
603 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
604 bool saved_inexact = false;
605
606 if (instr->exact)
607 saved_inexact = ac_disable_inexact_math(ctx->ac.builder);
608
609 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
610 switch (instr->op) {
611 case nir_op_vec2:
612 case nir_op_vec3:
613 case nir_op_vec4:
614 src_components = 1;
615 break;
616 case nir_op_pack_half_2x16:
617 case nir_op_pack_snorm_2x16:
618 case nir_op_pack_unorm_2x16:
619 src_components = 2;
620 break;
621 case nir_op_unpack_half_2x16:
622 src_components = 1;
623 break;
624 case nir_op_cube_face_coord:
625 case nir_op_cube_face_index:
626 src_components = 3;
627 break;
628 default:
629 src_components = num_components;
630 break;
631 }
632 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
633 src[i] = get_alu_src(ctx, instr->src[i], src_components);
634
635 switch (instr->op) {
636 case nir_op_mov:
637 result = src[0];
638 break;
639 case nir_op_fneg:
640 src[0] = ac_to_float(&ctx->ac, src[0]);
641 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
642 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
643 /* fneg will be optimized by backend compiler with sign
644 * bit removed via XOR. This is probably a LLVM bug.
645 */
646 result = ac_build_canonicalize(&ctx->ac, result,
647 instr->dest.dest.ssa.bit_size);
648 }
649 break;
650 case nir_op_ineg:
651 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
652 break;
653 case nir_op_inot:
654 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
655 break;
656 case nir_op_iadd:
657 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
658 break;
659 case nir_op_fadd:
660 src[0] = ac_to_float(&ctx->ac, src[0]);
661 src[1] = ac_to_float(&ctx->ac, src[1]);
662 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_fsub:
665 src[0] = ac_to_float(&ctx->ac, src[0]);
666 src[1] = ac_to_float(&ctx->ac, src[1]);
667 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
668 break;
669 case nir_op_isub:
670 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_imul:
673 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
674 break;
675 case nir_op_imod:
676 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
677 break;
678 case nir_op_umod:
679 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
680 break;
681 case nir_op_fmod:
682 /* lower_fmod only lower 16-bit and 32-bit fmod */
683 assert(instr->dest.dest.ssa.bit_size == 64);
684 src[0] = ac_to_float(&ctx->ac, src[0]);
685 src[1] = ac_to_float(&ctx->ac, src[1]);
686 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
687 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
688 ac_to_float_type(&ctx->ac, def_type), result);
689 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
690 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
691 break;
692 case nir_op_irem:
693 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_idiv:
696 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
697 break;
698 case nir_op_udiv:
699 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
700 break;
701 case nir_op_fmul:
702 src[0] = ac_to_float(&ctx->ac, src[0]);
703 src[1] = ac_to_float(&ctx->ac, src[1]);
704 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
705 break;
706 case nir_op_frcp:
707 /* For doubles, we need precise division to pass GLCTS. */
708 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
709 ac_get_type_size(def_type) == 8) {
710 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
711 ac_to_float(&ctx->ac, src[0]), "");
712 } else {
713 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
714 ac_to_float_type(&ctx->ac, def_type), src[0]);
715 }
716 break;
717 case nir_op_iand:
718 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
719 break;
720 case nir_op_ior:
721 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
722 break;
723 case nir_op_ixor:
724 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
725 break;
726 case nir_op_ishl:
727 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
728 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
729 LLVMTypeOf(src[0]), "");
730 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
731 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
732 LLVMTypeOf(src[0]), "");
733 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
734 break;
735 case nir_op_ishr:
736 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
737 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
738 LLVMTypeOf(src[0]), "");
739 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
740 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
741 LLVMTypeOf(src[0]), "");
742 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
743 break;
744 case nir_op_ushr:
745 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
746 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
747 LLVMTypeOf(src[0]), "");
748 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
749 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
750 LLVMTypeOf(src[0]), "");
751 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
752 break;
753 case nir_op_ilt32:
754 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
755 break;
756 case nir_op_ine32:
757 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
758 break;
759 case nir_op_ieq32:
760 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
761 break;
762 case nir_op_ige32:
763 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
764 break;
765 case nir_op_ult32:
766 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
767 break;
768 case nir_op_uge32:
769 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
770 break;
771 case nir_op_feq32:
772 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
773 break;
774 case nir_op_fne32:
775 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
776 break;
777 case nir_op_flt32:
778 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
779 break;
780 case nir_op_fge32:
781 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
782 break;
783 case nir_op_fabs:
784 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
785 ac_to_float_type(&ctx->ac, def_type), src[0]);
786 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
787 /* fabs will be optimized by backend compiler with sign
788 * bit removed via AND.
789 */
790 result = ac_build_canonicalize(&ctx->ac, result,
791 instr->dest.dest.ssa.bit_size);
792 }
793 break;
794 case nir_op_iabs:
795 result = emit_iabs(&ctx->ac, src[0]);
796 break;
797 case nir_op_imax:
798 result = ac_build_imax(&ctx->ac, src[0], src[1]);
799 break;
800 case nir_op_imin:
801 result = ac_build_imin(&ctx->ac, src[0], src[1]);
802 break;
803 case nir_op_umax:
804 result = ac_build_umax(&ctx->ac, src[0], src[1]);
805 break;
806 case nir_op_umin:
807 result = ac_build_umin(&ctx->ac, src[0], src[1]);
808 break;
809 case nir_op_isign:
810 result = ac_build_isign(&ctx->ac, src[0],
811 instr->dest.dest.ssa.bit_size);
812 break;
813 case nir_op_fsign:
814 src[0] = ac_to_float(&ctx->ac, src[0]);
815 result = ac_build_fsign(&ctx->ac, src[0],
816 instr->dest.dest.ssa.bit_size);
817 break;
818 case nir_op_ffloor:
819 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
820 ac_to_float_type(&ctx->ac, def_type), src[0]);
821 break;
822 case nir_op_ftrunc:
823 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
824 ac_to_float_type(&ctx->ac, def_type), src[0]);
825 break;
826 case nir_op_fceil:
827 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
828 ac_to_float_type(&ctx->ac, def_type), src[0]);
829 break;
830 case nir_op_fround_even:
831 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
832 ac_to_float_type(&ctx->ac, def_type),src[0]);
833 break;
834 case nir_op_ffract:
835 src[0] = ac_to_float(&ctx->ac, src[0]);
836 result = ac_build_fract(&ctx->ac, src[0],
837 instr->dest.dest.ssa.bit_size);
838 break;
839 case nir_op_fsin:
840 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
841 ac_to_float_type(&ctx->ac, def_type), src[0]);
842 break;
843 case nir_op_fcos:
844 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
845 ac_to_float_type(&ctx->ac, def_type), src[0]);
846 break;
847 case nir_op_fsqrt:
848 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
849 ac_to_float_type(&ctx->ac, def_type), src[0]);
850 break;
851 case nir_op_fexp2:
852 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
853 ac_to_float_type(&ctx->ac, def_type), src[0]);
854 break;
855 case nir_op_flog2:
856 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
857 ac_to_float_type(&ctx->ac, def_type), src[0]);
858 break;
859 case nir_op_frsq:
860 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
861 ac_to_float_type(&ctx->ac, def_type), src[0]);
862 break;
863 case nir_op_frexp_exp:
864 src[0] = ac_to_float(&ctx->ac, src[0]);
865 result = ac_build_frexp_exp(&ctx->ac, src[0],
866 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
867 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
868 result = LLVMBuildSExt(ctx->ac.builder, result,
869 ctx->ac.i32, "");
870 break;
871 case nir_op_frexp_sig:
872 src[0] = ac_to_float(&ctx->ac, src[0]);
873 result = ac_build_frexp_mant(&ctx->ac, src[0],
874 instr->dest.dest.ssa.bit_size);
875 break;
876 case nir_op_fpow:
877 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
878 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
879 break;
880 case nir_op_fmax:
881 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
882 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
883 if (ctx->ac.chip_class < GFX9 &&
884 instr->dest.dest.ssa.bit_size == 32) {
885 /* Only pre-GFX9 chips do not flush denorms. */
886 result = ac_build_canonicalize(&ctx->ac, result,
887 instr->dest.dest.ssa.bit_size);
888 }
889 break;
890 case nir_op_fmin:
891 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
892 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
893 if (ctx->ac.chip_class < GFX9 &&
894 instr->dest.dest.ssa.bit_size == 32) {
895 /* Only pre-GFX9 chips do not flush denorms. */
896 result = ac_build_canonicalize(&ctx->ac, result,
897 instr->dest.dest.ssa.bit_size);
898 }
899 break;
900 case nir_op_ffma:
901 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
902 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
903 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
904 break;
905 case nir_op_ldexp:
906 src[0] = ac_to_float(&ctx->ac, src[0]);
907 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
908 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
909 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
910 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
911 else
912 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
913 break;
914 case nir_op_bfm:
915 result = emit_bfm(&ctx->ac, src[0], src[1]);
916 break;
917 case nir_op_bitfield_select:
918 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
919 break;
920 case nir_op_ubfe:
921 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
922 break;
923 case nir_op_ibfe:
924 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
925 break;
926 case nir_op_bitfield_reverse:
927 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
928 break;
929 case nir_op_bit_count:
930 result = ac_build_bit_count(&ctx->ac, src[0]);
931 break;
932 case nir_op_vec2:
933 case nir_op_vec3:
934 case nir_op_vec4:
935 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
936 src[i] = ac_to_integer(&ctx->ac, src[i]);
937 result = ac_build_gather_values(&ctx->ac, src, num_components);
938 break;
939 case nir_op_f2i8:
940 case nir_op_f2i16:
941 case nir_op_f2i32:
942 case nir_op_f2i64:
943 src[0] = ac_to_float(&ctx->ac, src[0]);
944 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
945 break;
946 case nir_op_f2u8:
947 case nir_op_f2u16:
948 case nir_op_f2u32:
949 case nir_op_f2u64:
950 src[0] = ac_to_float(&ctx->ac, src[0]);
951 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
952 break;
953 case nir_op_i2f16:
954 case nir_op_i2f32:
955 case nir_op_i2f64:
956 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
957 break;
958 case nir_op_u2f16:
959 case nir_op_u2f32:
960 case nir_op_u2f64:
961 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
962 break;
963 case nir_op_f2f16_rtz:
964 case nir_op_f2f16:
965 case nir_op_f2fmp:
966 src[0] = ac_to_float(&ctx->ac, src[0]);
967
968 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
969 * all f32->f16 conversions have to round towards zero, because both scalar
970 * and vec2 down-conversions have to round equally.
971 */
972 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
973 instr->op == nir_op_f2f16_rtz) {
974 src[0] = ac_to_float(&ctx->ac, src[0]);
975
976 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
977 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
978
979 /* Fast path conversion. This only works if NIR is vectorized
980 * to vec2 16.
981 */
982 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
983 LLVMValueRef args[] = {
984 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
985 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
986 };
987 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
988 break;
989 }
990
991 assert(ac_get_llvm_num_components(src[0]) == 1);
992 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
993 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
994 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
995 } else {
996 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
997 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
998 else
999 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1000 }
1001 break;
1002 case nir_op_f2f16_rtne:
1003 case nir_op_f2f32:
1004 case nir_op_f2f64:
1005 src[0] = ac_to_float(&ctx->ac, src[0]);
1006 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1007 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1008 else
1009 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1010 break;
1011 case nir_op_u2u8:
1012 case nir_op_u2u16:
1013 case nir_op_u2ump:
1014 case nir_op_u2u32:
1015 case nir_op_u2u64:
1016 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1017 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1018 else
1019 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1020 break;
1021 case nir_op_i2i8:
1022 case nir_op_i2i16:
1023 case nir_op_i2imp:
1024 case nir_op_i2i32:
1025 case nir_op_i2i64:
1026 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1027 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1028 else
1029 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1030 break;
1031 case nir_op_b32csel:
1032 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1033 break;
1034 case nir_op_find_lsb:
1035 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1036 break;
1037 case nir_op_ufind_msb:
1038 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1039 break;
1040 case nir_op_ifind_msb:
1041 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1042 break;
1043 case nir_op_uadd_carry:
1044 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1045 break;
1046 case nir_op_usub_borrow:
1047 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1048 break;
1049 case nir_op_b2f16:
1050 case nir_op_b2f32:
1051 case nir_op_b2f64:
1052 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1053 break;
1054 case nir_op_f2b32:
1055 result = emit_f2b(&ctx->ac, src[0]);
1056 break;
1057 case nir_op_b2i8:
1058 case nir_op_b2i16:
1059 case nir_op_b2i32:
1060 case nir_op_b2i64:
1061 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1062 break;
1063 case nir_op_i2b32:
1064 result = emit_i2b(&ctx->ac, src[0]);
1065 break;
1066 case nir_op_fquantize2f16:
1067 result = emit_f2f16(&ctx->ac, src[0]);
1068 break;
1069 case nir_op_umul_high:
1070 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1071 break;
1072 case nir_op_imul_high:
1073 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1074 break;
1075 case nir_op_pack_half_2x16:
1076 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1077 break;
1078 case nir_op_pack_snorm_2x16:
1079 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1080 break;
1081 case nir_op_pack_unorm_2x16:
1082 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1083 break;
1084 case nir_op_unpack_half_2x16:
1085 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1086 break;
1087 case nir_op_fddx:
1088 case nir_op_fddy:
1089 case nir_op_fddx_fine:
1090 case nir_op_fddy_fine:
1091 case nir_op_fddx_coarse:
1092 case nir_op_fddy_coarse:
1093 result = emit_ddxy(ctx, instr->op, src[0]);
1094 break;
1095
1096 case nir_op_unpack_64_2x32_split_x: {
1097 assert(ac_get_llvm_num_components(src[0]) == 1);
1098 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1099 ctx->ac.v2i32,
1100 "");
1101 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1102 ctx->ac.i32_0, "");
1103 break;
1104 }
1105
1106 case nir_op_unpack_64_2x32_split_y: {
1107 assert(ac_get_llvm_num_components(src[0]) == 1);
1108 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1109 ctx->ac.v2i32,
1110 "");
1111 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1112 ctx->ac.i32_1, "");
1113 break;
1114 }
1115
1116 case nir_op_pack_64_2x32_split: {
1117 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1118 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1119 break;
1120 }
1121
1122 case nir_op_pack_32_2x16_split: {
1123 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1124 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1125 break;
1126 }
1127
1128 case nir_op_unpack_32_2x16_split_x: {
1129 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1130 ctx->ac.v2i16,
1131 "");
1132 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1133 ctx->ac.i32_0, "");
1134 break;
1135 }
1136
1137 case nir_op_unpack_32_2x16_split_y: {
1138 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1139 ctx->ac.v2i16,
1140 "");
1141 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1142 ctx->ac.i32_1, "");
1143 break;
1144 }
1145
1146 case nir_op_cube_face_coord: {
1147 src[0] = ac_to_float(&ctx->ac, src[0]);
1148 LLVMValueRef results[2];
1149 LLVMValueRef in[3];
1150 for (unsigned chan = 0; chan < 3; chan++)
1151 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1152 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1153 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1154 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1155 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1156 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1157 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1158 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1159 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1160 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1161 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1162 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1163 result = ac_build_gather_values(&ctx->ac, results, 2);
1164 break;
1165 }
1166
1167 case nir_op_cube_face_index: {
1168 src[0] = ac_to_float(&ctx->ac, src[0]);
1169 LLVMValueRef in[3];
1170 for (unsigned chan = 0; chan < 3; chan++)
1171 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1172 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1173 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1174 break;
1175 }
1176
1177 case nir_op_fmin3:
1178 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1179 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1180 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1181 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1182 break;
1183 case nir_op_umin3:
1184 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1185 result = ac_build_umin(&ctx->ac, result, src[2]);
1186 break;
1187 case nir_op_imin3:
1188 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1189 result = ac_build_imin(&ctx->ac, result, src[2]);
1190 break;
1191 case nir_op_fmax3:
1192 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1193 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1194 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1195 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1196 break;
1197 case nir_op_umax3:
1198 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1199 result = ac_build_umax(&ctx->ac, result, src[2]);
1200 break;
1201 case nir_op_imax3:
1202 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1203 result = ac_build_imax(&ctx->ac, result, src[2]);
1204 break;
1205 case nir_op_fmed3: {
1206 src[0] = ac_to_float(&ctx->ac, src[0]);
1207 src[1] = ac_to_float(&ctx->ac, src[1]);
1208 src[2] = ac_to_float(&ctx->ac, src[2]);
1209 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1210 instr->dest.dest.ssa.bit_size);
1211 break;
1212 }
1213 case nir_op_imed3: {
1214 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1215 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1216 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1217 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1218 break;
1219 }
1220 case nir_op_umed3: {
1221 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1222 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1223 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1224 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1225 break;
1226 }
1227
1228 default:
1229 fprintf(stderr, "Unknown NIR alu instr: ");
1230 nir_print_instr(&instr->instr, stderr);
1231 fprintf(stderr, "\n");
1232 abort();
1233 }
1234
1235 if (result) {
1236 assert(instr->dest.dest.is_ssa);
1237 result = ac_to_integer_or_pointer(&ctx->ac, result);
1238 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1239 }
1240
1241 if (instr->exact)
1242 ac_restore_inexact_math(ctx->ac.builder, saved_inexact);
1243 }
1244
1245 static void visit_load_const(struct ac_nir_context *ctx,
1246 const nir_load_const_instr *instr)
1247 {
1248 LLVMValueRef values[4], value = NULL;
1249 LLVMTypeRef element_type =
1250 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1251
1252 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1253 switch (instr->def.bit_size) {
1254 case 8:
1255 values[i] = LLVMConstInt(element_type,
1256 instr->value[i].u8, false);
1257 break;
1258 case 16:
1259 values[i] = LLVMConstInt(element_type,
1260 instr->value[i].u16, false);
1261 break;
1262 case 32:
1263 values[i] = LLVMConstInt(element_type,
1264 instr->value[i].u32, false);
1265 break;
1266 case 64:
1267 values[i] = LLVMConstInt(element_type,
1268 instr->value[i].u64, false);
1269 break;
1270 default:
1271 fprintf(stderr,
1272 "unsupported nir load_const bit_size: %d\n",
1273 instr->def.bit_size);
1274 abort();
1275 }
1276 }
1277 if (instr->def.num_components > 1) {
1278 value = LLVMConstVector(values, instr->def.num_components);
1279 } else
1280 value = values[0];
1281
1282 ctx->ssa_defs[instr->def.index] = value;
1283 }
1284
1285 static LLVMValueRef
1286 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1287 {
1288 LLVMValueRef size =
1289 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1290 LLVMConstInt(ctx->ac.i32, 2, false), "");
1291
1292 /* GFX8 only */
1293 if (ctx->ac.chip_class == GFX8 && in_elements) {
1294 /* On GFX8, the descriptor contains the size in bytes,
1295 * but TXQ must return the size in elements.
1296 * The stride is always non-zero for resources using TXQ.
1297 */
1298 LLVMValueRef stride =
1299 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1300 ctx->ac.i32_1, "");
1301 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1302 LLVMConstInt(ctx->ac.i32, 16, false), "");
1303 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1304 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1305
1306 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1307 }
1308 return size;
1309 }
1310
1311 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1312 * incorrectly forces nearest filtering if the texture format is integer.
1313 * The only effect it has on Gather4, which always returns 4 texels for
1314 * bilinear filtering, is that the final coordinates are off by 0.5 of
1315 * the texel size.
1316 *
1317 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1318 * or (0.5 / size) from the normalized coordinates.
1319 *
1320 * However, cube textures with 8_8_8_8 data formats require a different
1321 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1322 * precision in 32-bit data formats, so it needs to be applied dynamically at
1323 * runtime. In this case, return an i1 value that indicates whether the
1324 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1325 */
1326 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1327 nir_variable *var,
1328 struct ac_image_args *args,
1329 const nir_tex_instr *instr)
1330 {
1331 const struct glsl_type *type = glsl_without_array(var->type);
1332 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1333 LLVMValueRef wa_8888 = NULL;
1334 LLVMValueRef half_texel[2];
1335 LLVMValueRef result;
1336
1337 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1338
1339 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1340 LLVMValueRef formats;
1341 LLVMValueRef data_format;
1342 LLVMValueRef wa_formats;
1343
1344 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1345
1346 data_format = LLVMBuildLShr(ctx->builder, formats,
1347 LLVMConstInt(ctx->i32, 20, false), "");
1348 data_format = LLVMBuildAnd(ctx->builder, data_format,
1349 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1350 wa_8888 = LLVMBuildICmp(
1351 ctx->builder, LLVMIntEQ, data_format,
1352 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1353 "");
1354
1355 uint32_t wa_num_format =
1356 stype == GLSL_TYPE_UINT ?
1357 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1358 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1359 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1360 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1361 "");
1362 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1363 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1364
1365 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1366 args->resource = LLVMBuildInsertElement(
1367 ctx->builder, args->resource, formats, ctx->i32_1, "");
1368 }
1369
1370 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1371 assert(!wa_8888);
1372 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1373 } else {
1374 struct ac_image_args resinfo = {};
1375 LLVMBasicBlockRef bbs[2];
1376
1377 LLVMValueRef unnorm = NULL;
1378 LLVMValueRef default_offset = ctx->f32_0;
1379 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1380 !instr->is_array) {
1381 /* In vulkan, whether the sampler uses unnormalized
1382 * coordinates or not is a dynamic property of the
1383 * sampler. Hence, to figure out whether or not we
1384 * need to divide by the texture size, we need to test
1385 * the sampler at runtime. This tests the bit set by
1386 * radv_init_sampler().
1387 */
1388 LLVMValueRef sampler0 =
1389 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1390 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1391 LLVMConstInt(ctx->i32, 15, false), "");
1392 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1393 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1394 default_offset = LLVMConstReal(ctx->f32, -0.5);
1395 }
1396
1397 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1398 if (wa_8888 || unnorm) {
1399 assert(!(wa_8888 && unnorm));
1400 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1401 /* Skip the texture size query entirely if we don't need it. */
1402 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1403 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1404 }
1405
1406 /* Query the texture size. */
1407 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1408 resinfo.opcode = ac_image_get_resinfo;
1409 resinfo.dmask = 0xf;
1410 resinfo.lod = ctx->i32_0;
1411 resinfo.resource = args->resource;
1412 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1413 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1414
1415 /* Compute -0.5 / size. */
1416 for (unsigned c = 0; c < 2; c++) {
1417 half_texel[c] =
1418 LLVMBuildExtractElement(ctx->builder, size,
1419 LLVMConstInt(ctx->i32, c, 0), "");
1420 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1421 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1422 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1423 LLVMConstReal(ctx->f32, -0.5), "");
1424 }
1425
1426 if (wa_8888 || unnorm) {
1427 ac_build_endif(ctx, 2000);
1428
1429 for (unsigned c = 0; c < 2; c++) {
1430 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1431 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1432 values, bbs);
1433 }
1434 }
1435 }
1436
1437 for (unsigned c = 0; c < 2; c++) {
1438 LLVMValueRef tmp;
1439 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1440 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1441 }
1442
1443 args->attributes = AC_FUNC_ATTR_READNONE;
1444 result = ac_build_image_opcode(ctx, args);
1445
1446 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1447 LLVMValueRef tmp, tmp2;
1448
1449 /* if the cube workaround is in place, f2i the result. */
1450 for (unsigned c = 0; c < 4; c++) {
1451 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1452 if (stype == GLSL_TYPE_UINT)
1453 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1454 else
1455 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1456 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1457 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1458 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1459 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1460 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1461 }
1462 }
1463 return result;
1464 }
1465
1466 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1467 {
1468 nir_deref_instr *texture_deref_instr = NULL;
1469
1470 for (unsigned i = 0; i < instr->num_srcs; i++) {
1471 switch (instr->src[i].src_type) {
1472 case nir_tex_src_texture_deref:
1473 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1474 break;
1475 default:
1476 break;
1477 }
1478 }
1479 return texture_deref_instr;
1480 }
1481
1482 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1483 const nir_tex_instr *instr,
1484 struct ac_image_args *args)
1485 {
1486 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1487 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1488
1489 assert(instr->dest.is_ssa);
1490 return ac_build_buffer_load_format(&ctx->ac,
1491 args->resource,
1492 args->coords[0],
1493 ctx->ac.i32_0,
1494 util_last_bit(mask),
1495 0, true,
1496 instr->dest.ssa.bit_size == 16);
1497 }
1498
1499 args->opcode = ac_image_sample;
1500
1501 switch (instr->op) {
1502 case nir_texop_txf:
1503 case nir_texop_txf_ms:
1504 case nir_texop_samples_identical:
1505 args->opcode = args->level_zero ||
1506 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1507 ac_image_load : ac_image_load_mip;
1508 args->level_zero = false;
1509 break;
1510 case nir_texop_txs:
1511 case nir_texop_query_levels:
1512 args->opcode = ac_image_get_resinfo;
1513 if (!args->lod)
1514 args->lod = ctx->ac.i32_0;
1515 args->level_zero = false;
1516 break;
1517 case nir_texop_tex:
1518 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1519 assert(!args->lod);
1520 args->level_zero = true;
1521 }
1522 break;
1523 case nir_texop_tg4:
1524 args->opcode = ac_image_gather4;
1525 if (!args->lod && !args->bias)
1526 args->level_zero = true;
1527 break;
1528 case nir_texop_lod:
1529 args->opcode = ac_image_get_lod;
1530 break;
1531 case nir_texop_fragment_fetch:
1532 case nir_texop_fragment_mask_fetch:
1533 args->opcode = ac_image_load;
1534 args->level_zero = false;
1535 break;
1536 default:
1537 break;
1538 }
1539
1540 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1541 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1542 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1543 const struct glsl_type *type = glsl_without_array(var->type);
1544 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1545 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1546 return lower_gather4_integer(&ctx->ac, var, args, instr);
1547 }
1548 }
1549
1550 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1551 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1552 if ((args->dim == ac_image_2darray ||
1553 args->dim == ac_image_2d) && !args->coords[1]) {
1554 args->coords[1] = ctx->ac.i32_0;
1555 }
1556 }
1557
1558 args->attributes = AC_FUNC_ATTR_READNONE;
1559 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1560 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1561 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1562 /* Prevent texture instructions with implicit derivatives from being
1563 * sinked into branches. */
1564 switch (instr->op) {
1565 case nir_texop_tex:
1566 case nir_texop_txb:
1567 case nir_texop_lod:
1568 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1569 break;
1570 default:
1571 break;
1572 }
1573 }
1574
1575 return ac_build_image_opcode(&ctx->ac, args);
1576 }
1577
1578 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1579 nir_intrinsic_instr *instr)
1580 {
1581 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1582 LLVMValueRef index = get_src(ctx, instr->src[1]);
1583
1584 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1585 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1586 return result;
1587 }
1588
1589 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1590 nir_intrinsic_instr *instr)
1591 {
1592 LLVMValueRef ptr, addr;
1593 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1594 unsigned index = nir_intrinsic_base(instr);
1595
1596 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1597 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1598
1599 /* Load constant values from user SGPRS when possible, otherwise
1600 * fallback to the default path that loads directly from memory.
1601 */
1602 if (LLVMIsConstant(src0) &&
1603 instr->dest.ssa.bit_size == 32) {
1604 unsigned count = instr->dest.ssa.num_components;
1605 unsigned offset = index;
1606
1607 offset += LLVMConstIntGetZExtValue(src0);
1608 offset /= 4;
1609
1610 offset -= ctx->args->base_inline_push_consts;
1611
1612 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1613 if (offset + count <= num_inline_push_consts) {
1614 LLVMValueRef push_constants[num_inline_push_consts];
1615 for (unsigned i = 0; i < num_inline_push_consts; i++)
1616 push_constants[i] = ac_get_arg(&ctx->ac,
1617 ctx->args->inline_push_consts[i]);
1618 return ac_build_gather_values(&ctx->ac,
1619 push_constants + offset,
1620 count);
1621 }
1622 }
1623
1624 ptr = LLVMBuildGEP(ctx->ac.builder,
1625 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1626
1627 if (instr->dest.ssa.bit_size == 8) {
1628 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1629 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1630 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1631 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1632
1633 LLVMValueRef params[3];
1634 if (load_dwords > 1) {
1635 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1636 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1637 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1638 } else {
1639 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1640 params[0] = ctx->ac.i32_0;
1641 params[1] = res;
1642 }
1643 params[2] = addr;
1644 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1645
1646 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1647 if (instr->dest.ssa.num_components > 1)
1648 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1649 return res;
1650 } else if (instr->dest.ssa.bit_size == 16) {
1651 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1652 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1653 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1654 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1655 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1656 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1657 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1658 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1659 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1660 LLVMConstInt(ctx->ac.i32, 4, false)};
1661 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1662 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1663 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1664 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1665 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1666 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1667 }
1668
1669 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1670
1671 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1672 }
1673
1674 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1675 const nir_intrinsic_instr *instr)
1676 {
1677 LLVMValueRef index = get_src(ctx, instr->src[0]);
1678
1679 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1680 }
1681
1682 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1683 {
1684 uint32_t new_mask = 0;
1685 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1686 if (mask & (1u << i))
1687 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1688 return new_mask;
1689 }
1690
1691 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1692 unsigned start, unsigned count)
1693 {
1694 LLVMValueRef mask[] = {
1695 ctx->i32_0, ctx->i32_1,
1696 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1697
1698 unsigned src_elements = ac_get_llvm_num_components(src);
1699
1700 if (count == src_elements) {
1701 assert(start == 0);
1702 return src;
1703 } else if (count == 1) {
1704 assert(start < src_elements);
1705 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1706 } else {
1707 assert(start + count <= src_elements);
1708 assert(count <= 4);
1709 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1710 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1711 }
1712 }
1713
1714 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1715 enum gl_access_qualifier access,
1716 bool may_store_unaligned,
1717 bool writeonly_memory)
1718 {
1719 unsigned cache_policy = 0;
1720
1721 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1722 * store opcodes not aligned to a dword are affected. The only way to
1723 * get unaligned stores is through shader images.
1724 */
1725 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1726 /* If this is write-only, don't keep data in L1 to prevent
1727 * evicting L1 cache lines that may be needed by other
1728 * instructions.
1729 */
1730 writeonly_memory ||
1731 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1732 cache_policy |= ac_glc;
1733 }
1734
1735 if (access & ACCESS_STREAM_CACHE_POLICY)
1736 cache_policy |= ac_slc | ac_glc;
1737
1738 return cache_policy;
1739 }
1740
1741 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1742 struct waterfall_context *wctx,
1743 const nir_intrinsic_instr *instr,
1744 nir_src src)
1745 {
1746 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1747 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1748 }
1749
1750 static void visit_store_ssbo(struct ac_nir_context *ctx,
1751 nir_intrinsic_instr *instr)
1752 {
1753 if (ctx->ac.postponed_kill) {
1754 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1755 ctx->ac.postponed_kill, "");
1756 ac_build_ifcc(&ctx->ac, cond, 7000);
1757 }
1758
1759 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1760 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1761 unsigned writemask = nir_intrinsic_write_mask(instr);
1762 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1763 bool writeonly_memory = access & ACCESS_NON_READABLE;
1764 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1765
1766 struct waterfall_context wctx;
1767 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1768
1769 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1770 LLVMValueRef base_data = src_data;
1771 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1772 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1773
1774 while (writemask) {
1775 int start, count;
1776 LLVMValueRef data, offset;
1777 LLVMTypeRef data_type;
1778
1779 u_bit_scan_consecutive_range(&writemask, &start, &count);
1780
1781 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1782 * writes into a 2-element and a 1-element write. */
1783 if (count == 3 &&
1784 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1785 writemask |= 1 << (start + 2);
1786 count = 2;
1787 }
1788 int num_bytes = count * elem_size_bytes; /* count in bytes */
1789
1790 /* we can only store 4 DWords at the same time.
1791 * can only happen for 64 Bit vectors. */
1792 if (num_bytes > 16) {
1793 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1794 count = 2;
1795 num_bytes = 16;
1796 }
1797
1798 /* check alignment of 16 Bit stores */
1799 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1800 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1801 count = 1;
1802 num_bytes = 2;
1803 }
1804
1805 /* Due to alignment issues, split stores of 8-bit/16-bit
1806 * vectors.
1807 */
1808 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1809 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1810 count = 1;
1811 num_bytes = elem_size_bytes;
1812 }
1813
1814 data = extract_vector_range(&ctx->ac, base_data, start, count);
1815
1816 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1817 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1818
1819 if (num_bytes == 1) {
1820 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1821 offset, ctx->ac.i32_0,
1822 cache_policy);
1823 } else if (num_bytes == 2) {
1824 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1825 offset, ctx->ac.i32_0,
1826 cache_policy);
1827 } else {
1828 int num_channels = num_bytes / 4;
1829
1830 switch (num_bytes) {
1831 case 16: /* v4f32 */
1832 data_type = ctx->ac.v4f32;
1833 break;
1834 case 12: /* v3f32 */
1835 data_type = ctx->ac.v3f32;
1836 break;
1837 case 8: /* v2f32 */
1838 data_type = ctx->ac.v2f32;
1839 break;
1840 case 4: /* f32 */
1841 data_type = ctx->ac.f32;
1842 break;
1843 default:
1844 unreachable("Malformed vector store.");
1845 }
1846 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1847
1848 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1849 num_channels, offset,
1850 ctx->ac.i32_0, 0,
1851 cache_policy);
1852 }
1853 }
1854
1855 exit_waterfall(ctx, &wctx, NULL);
1856
1857 if (ctx->ac.postponed_kill)
1858 ac_build_endif(&ctx->ac, 7000);
1859 }
1860
1861 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1862 LLVMValueRef descriptor,
1863 LLVMValueRef offset,
1864 LLVMValueRef compare,
1865 LLVMValueRef exchange)
1866 {
1867 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1868 if (ctx->abi->robust_buffer_access) {
1869 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1870
1871 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1872 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1873
1874 ac_build_ifcc(&ctx->ac, cond, -1);
1875
1876 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1877 }
1878
1879 LLVMValueRef ptr_parts[2] = {
1880 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1881 LLVMBuildAnd(ctx->ac.builder,
1882 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1883 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1884 };
1885
1886 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1887 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1888
1889 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1890
1891 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1892 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1893 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1894 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1895
1896 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1897 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1898
1899 if (ctx->abi->robust_buffer_access) {
1900 ac_build_endif(&ctx->ac, -1);
1901
1902 LLVMBasicBlockRef incoming_blocks[2] = {
1903 start_block,
1904 then_block,
1905 };
1906
1907 LLVMValueRef incoming_values[2] = {
1908 LLVMConstInt(ctx->ac.i64, 0, 0),
1909 result,
1910 };
1911 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1912 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1913 return ret;
1914 } else {
1915 return result;
1916 }
1917 }
1918
1919 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1920 nir_intrinsic_instr *instr)
1921 {
1922 if (ctx->ac.postponed_kill) {
1923 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1924 ctx->ac.postponed_kill, "");
1925 ac_build_ifcc(&ctx->ac, cond, 7001);
1926 }
1927
1928 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1929 const char *op;
1930 char name[64], type[8];
1931 LLVMValueRef params[6], descriptor;
1932 LLVMValueRef result;
1933 int arg_count = 0;
1934
1935 struct waterfall_context wctx;
1936 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1937
1938 switch (instr->intrinsic) {
1939 case nir_intrinsic_ssbo_atomic_add:
1940 op = "add";
1941 break;
1942 case nir_intrinsic_ssbo_atomic_imin:
1943 op = "smin";
1944 break;
1945 case nir_intrinsic_ssbo_atomic_umin:
1946 op = "umin";
1947 break;
1948 case nir_intrinsic_ssbo_atomic_imax:
1949 op = "smax";
1950 break;
1951 case nir_intrinsic_ssbo_atomic_umax:
1952 op = "umax";
1953 break;
1954 case nir_intrinsic_ssbo_atomic_and:
1955 op = "and";
1956 break;
1957 case nir_intrinsic_ssbo_atomic_or:
1958 op = "or";
1959 break;
1960 case nir_intrinsic_ssbo_atomic_xor:
1961 op = "xor";
1962 break;
1963 case nir_intrinsic_ssbo_atomic_exchange:
1964 op = "swap";
1965 break;
1966 case nir_intrinsic_ssbo_atomic_comp_swap:
1967 op = "cmpswap";
1968 break;
1969 default:
1970 abort();
1971 }
1972
1973 descriptor = ctx->abi->load_ssbo(ctx->abi,
1974 rsrc_base,
1975 true);
1976
1977 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1978 return_type == ctx->ac.i64) {
1979 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1980 get_src(ctx, instr->src[1]),
1981 get_src(ctx, instr->src[2]),
1982 get_src(ctx, instr->src[3]));
1983 } else {
1984 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1985 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1986 }
1987 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1988 params[arg_count++] = descriptor;
1989
1990 if (LLVM_VERSION_MAJOR >= 9) {
1991 /* XXX: The new raw/struct atomic intrinsics are buggy with
1992 * LLVM 8, see r358579.
1993 */
1994 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1995 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1996 params[arg_count++] = ctx->ac.i32_0; /* slc */
1997
1998 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1999 snprintf(name, sizeof(name),
2000 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
2001 } else {
2002 params[arg_count++] = ctx->ac.i32_0; /* vindex */
2003 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
2004 params[arg_count++] = ctx->ac.i1false; /* slc */
2005
2006 assert(return_type == ctx->ac.i32);
2007 snprintf(name, sizeof(name),
2008 "llvm.amdgcn.buffer.atomic.%s", op);
2009 }
2010
2011 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
2012 arg_count, 0);
2013 }
2014
2015 result = exit_waterfall(ctx, &wctx, result);
2016 if (ctx->ac.postponed_kill)
2017 ac_build_endif(&ctx->ac, 7001);
2018 return result;
2019 }
2020
2021 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
2022 nir_intrinsic_instr *instr)
2023 {
2024 struct waterfall_context wctx;
2025 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
2026
2027 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
2028 int num_components = instr->num_components;
2029 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2030 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
2031
2032 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2033 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
2034 LLVMValueRef vindex = ctx->ac.i32_0;
2035
2036 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
2037 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
2038
2039 LLVMValueRef results[4];
2040 for (int i = 0; i < num_components;) {
2041 int num_elems = num_components - i;
2042 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
2043 num_elems = 1;
2044 if (num_elems * elem_size_bytes > 16)
2045 num_elems = 16 / elem_size_bytes;
2046 int load_bytes = num_elems * elem_size_bytes;
2047
2048 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2049
2050 LLVMValueRef ret;
2051
2052 if (load_bytes == 1) {
2053 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2054 rsrc,
2055 offset,
2056 ctx->ac.i32_0,
2057 immoffset,
2058 cache_policy);
2059 } else if (load_bytes == 2) {
2060 ret = ac_build_tbuffer_load_short(&ctx->ac,
2061 rsrc,
2062 offset,
2063 ctx->ac.i32_0,
2064 immoffset,
2065 cache_policy);
2066 } else {
2067 int num_channels = util_next_power_of_two(load_bytes) / 4;
2068 bool can_speculate = access & ACCESS_CAN_REORDER;
2069
2070 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2071 vindex, offset, immoffset, 0,
2072 cache_policy, can_speculate, false);
2073 }
2074
2075 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2076 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2077 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2078
2079 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2080 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2081
2082 for (unsigned j = 0; j < num_elems; j++) {
2083 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2084 }
2085 i += num_elems;
2086 }
2087
2088 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2089 return exit_waterfall(ctx, &wctx, ret);
2090 }
2091
2092 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2093 struct waterfall_context *wctx,
2094 const nir_intrinsic_instr *instr)
2095 {
2096 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2097 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2098 }
2099
2100 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2101 nir_intrinsic_instr *instr)
2102 {
2103 struct waterfall_context wctx;
2104 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2105
2106 LLVMValueRef ret;
2107 LLVMValueRef rsrc = rsrc_base;
2108 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2109 int num_components = instr->num_components;
2110
2111 if (ctx->abi->load_ubo)
2112 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2113
2114 if (instr->dest.ssa.bit_size == 64)
2115 num_components *= 2;
2116
2117 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2118 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2119 LLVMValueRef results[num_components];
2120 for (unsigned i = 0; i < num_components; ++i) {
2121 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2122 load_bytes * i, 0);
2123
2124 if (load_bytes == 1) {
2125 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2126 rsrc,
2127 offset,
2128 ctx->ac.i32_0,
2129 immoffset,
2130 0);
2131 } else {
2132 assert(load_bytes == 2);
2133 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2134 rsrc,
2135 offset,
2136 ctx->ac.i32_0,
2137 immoffset,
2138 0);
2139 }
2140 }
2141 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2142 } else {
2143 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2144 NULL, 0, 0, true, true);
2145
2146 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2147 }
2148
2149 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2150 get_def_type(ctx, &instr->dest.ssa), "");
2151
2152 return exit_waterfall(ctx, &wctx, ret);
2153 }
2154
2155 static void
2156 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2157 bool vs_in, unsigned *vertex_index_out,
2158 LLVMValueRef *vertex_index_ref,
2159 unsigned *const_out, LLVMValueRef *indir_out)
2160 {
2161 nir_variable *var = nir_deref_instr_get_variable(instr);
2162 nir_deref_path path;
2163 unsigned idx_lvl = 1;
2164
2165 nir_deref_path_init(&path, instr, NULL);
2166
2167 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2168 if (vertex_index_ref) {
2169 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2170 if (vertex_index_out)
2171 *vertex_index_out = 0;
2172 } else {
2173 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2174 }
2175 ++idx_lvl;
2176 }
2177
2178 uint32_t const_offset = 0;
2179 LLVMValueRef offset = NULL;
2180
2181 if (var->data.compact) {
2182 assert(instr->deref_type == nir_deref_type_array);
2183 const_offset = nir_src_as_uint(instr->arr.index);
2184 goto out;
2185 }
2186
2187 for (; path.path[idx_lvl]; ++idx_lvl) {
2188 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2189 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2190 unsigned index = path.path[idx_lvl]->strct.index;
2191
2192 for (unsigned i = 0; i < index; i++) {
2193 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2194 const_offset += glsl_count_attribute_slots(ft, vs_in);
2195 }
2196 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2197 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2198 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2199 const_offset += size *
2200 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2201 } else {
2202 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2203 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2204 if (offset)
2205 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2206 else
2207 offset = array_off;
2208 }
2209 } else
2210 unreachable("Uhandled deref type in get_deref_instr_offset");
2211 }
2212
2213 out:
2214 nir_deref_path_finish(&path);
2215
2216 if (const_offset && offset)
2217 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2218 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2219 "");
2220
2221 *const_out = const_offset;
2222 *indir_out = offset;
2223 }
2224
2225 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2226 nir_intrinsic_instr *instr,
2227 bool load_inputs)
2228 {
2229 LLVMValueRef result;
2230 LLVMValueRef vertex_index = NULL;
2231 LLVMValueRef indir_index = NULL;
2232 unsigned const_index = 0;
2233
2234 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2235
2236 unsigned location = var->data.location;
2237 unsigned driver_location = var->data.driver_location;
2238 const bool is_patch = var->data.patch ||
2239 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2240 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2241 const bool is_compact = var->data.compact;
2242
2243 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2244 false, NULL, is_patch ? NULL : &vertex_index,
2245 &const_index, &indir_index);
2246
2247 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2248
2249 LLVMTypeRef src_component_type;
2250 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2251 src_component_type = LLVMGetElementType(dest_type);
2252 else
2253 src_component_type = dest_type;
2254
2255 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2256 vertex_index, indir_index,
2257 const_index, location, driver_location,
2258 var->data.location_frac,
2259 instr->num_components,
2260 is_patch, is_compact, load_inputs);
2261 if (instr->dest.ssa.bit_size == 16) {
2262 result = ac_to_integer(&ctx->ac, result);
2263 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2264 }
2265 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2266 }
2267
2268 static unsigned
2269 type_scalar_size_bytes(const struct glsl_type *type)
2270 {
2271 assert(glsl_type_is_vector_or_scalar(type) ||
2272 glsl_type_is_matrix(type));
2273 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2274 }
2275
2276 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2277 nir_intrinsic_instr *instr)
2278 {
2279 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2280 nir_variable *var = nir_deref_instr_get_variable(deref);
2281
2282 LLVMValueRef values[8];
2283 int idx = 0;
2284 int ve = instr->dest.ssa.num_components;
2285 unsigned comp = 0;
2286 LLVMValueRef indir_index;
2287 LLVMValueRef ret;
2288 unsigned const_index;
2289 unsigned stride = 4;
2290 int mode = deref->mode;
2291
2292 if (var) {
2293 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2294 var->data.mode == nir_var_shader_in;
2295 idx = var->data.driver_location;
2296 comp = var->data.location_frac;
2297 mode = var->data.mode;
2298
2299 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2300 &const_index, &indir_index);
2301
2302 if (var->data.compact) {
2303 stride = 1;
2304 const_index += comp;
2305 comp = 0;
2306 }
2307 }
2308
2309 if (instr->dest.ssa.bit_size == 64 &&
2310 (deref->mode == nir_var_shader_in ||
2311 deref->mode == nir_var_shader_out ||
2312 deref->mode == nir_var_function_temp))
2313 ve *= 2;
2314
2315 switch (mode) {
2316 case nir_var_shader_in:
2317 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2318 ctx->stage == MESA_SHADER_TESS_EVAL) {
2319 return load_tess_varyings(ctx, instr, true);
2320 }
2321
2322 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2323 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2324 LLVMValueRef indir_index;
2325 unsigned const_index, vertex_index;
2326 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2327 &const_index, &indir_index);
2328 assert(indir_index == NULL);
2329
2330 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2331 var->data.driver_location,
2332 var->data.location_frac,
2333 instr->num_components, vertex_index, const_index, type);
2334 }
2335
2336 for (unsigned chan = comp; chan < ve + comp; chan++) {
2337 if (indir_index) {
2338 unsigned count = glsl_count_attribute_slots(
2339 var->type,
2340 ctx->stage == MESA_SHADER_VERTEX);
2341 count -= chan / 4;
2342 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2343 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2344 stride, false, true);
2345
2346 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2347 tmp_vec,
2348 indir_index, "");
2349 } else
2350 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2351 }
2352 break;
2353 case nir_var_function_temp:
2354 for (unsigned chan = 0; chan < ve; chan++) {
2355 if (indir_index) {
2356 unsigned count = glsl_count_attribute_slots(
2357 var->type, false);
2358 count -= chan / 4;
2359 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2360 &ctx->ac, ctx->locals + idx + chan, count,
2361 stride, true, true);
2362
2363 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2364 tmp_vec,
2365 indir_index, "");
2366 } else {
2367 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2368 }
2369 }
2370 break;
2371 case nir_var_shader_out:
2372 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2373 return load_tess_varyings(ctx, instr, false);
2374 }
2375
2376 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2377 var->data.fb_fetch_output &&
2378 ctx->abi->emit_fbfetch)
2379 return ctx->abi->emit_fbfetch(ctx->abi);
2380
2381 for (unsigned chan = comp; chan < ve + comp; chan++) {
2382 if (indir_index) {
2383 unsigned count = glsl_count_attribute_slots(
2384 var->type, false);
2385 count -= chan / 4;
2386 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2387 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2388 stride, true, true);
2389
2390 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2391 tmp_vec,
2392 indir_index, "");
2393 } else {
2394 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2395 ctx->abi->outputs[idx + chan + const_index * stride],
2396 "");
2397 }
2398 }
2399 break;
2400 case nir_var_mem_global: {
2401 LLVMValueRef address = get_src(ctx, instr->src[0]);
2402 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2403 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2404 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2405 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2406 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2407 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2408
2409 if (stride != natural_stride || split_loads) {
2410 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2411 result_type = LLVMGetElementType(result_type);
2412
2413 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2414 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2415 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2416
2417 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2418 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2419 values[i] = LLVMBuildLoad(ctx->ac.builder,
2420 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2421
2422 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2423 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2424 }
2425 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2426 } else {
2427 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2428 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2429 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2430 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2431
2432 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2433 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2434 return val;
2435 }
2436 }
2437 default:
2438 unreachable("unhandle variable mode");
2439 }
2440 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2441 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2442 }
2443
2444 static void
2445 visit_store_var(struct ac_nir_context *ctx,
2446 nir_intrinsic_instr *instr)
2447 {
2448 if (ctx->ac.postponed_kill) {
2449 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2450 ctx->ac.postponed_kill, "");
2451 ac_build_ifcc(&ctx->ac, cond, 7002);
2452 }
2453
2454 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2455 nir_variable *var = nir_deref_instr_get_variable(deref);
2456
2457 LLVMValueRef temp_ptr, value;
2458 int idx = 0;
2459 unsigned comp = 0;
2460 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2461 int writemask = instr->const_index[0];
2462 LLVMValueRef indir_index;
2463 unsigned const_index;
2464
2465 if (var) {
2466 get_deref_offset(ctx, deref, false,
2467 NULL, NULL, &const_index, &indir_index);
2468 idx = var->data.driver_location;
2469 comp = var->data.location_frac;
2470
2471 if (var->data.compact) {
2472 const_index += comp;
2473 comp = 0;
2474 }
2475 }
2476
2477 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2478 (deref->mode == nir_var_shader_out ||
2479 deref->mode == nir_var_function_temp)) {
2480
2481 src = LLVMBuildBitCast(ctx->ac.builder, src,
2482 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2483 "");
2484
2485 writemask = widen_mask(writemask, 2);
2486 }
2487
2488 writemask = writemask << comp;
2489
2490 switch (deref->mode) {
2491 case nir_var_shader_out:
2492
2493 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2494 LLVMValueRef vertex_index = NULL;
2495 LLVMValueRef indir_index = NULL;
2496 unsigned const_index = 0;
2497 const bool is_patch = var->data.patch ||
2498 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2499 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2500
2501 get_deref_offset(ctx, deref, false, NULL,
2502 is_patch ? NULL : &vertex_index,
2503 &const_index, &indir_index);
2504
2505 ctx->abi->store_tcs_outputs(ctx->abi, var,
2506 vertex_index, indir_index,
2507 const_index, src, writemask);
2508 break;
2509 }
2510
2511 for (unsigned chan = 0; chan < 8; chan++) {
2512 int stride = 4;
2513 if (!(writemask & (1 << chan)))
2514 continue;
2515
2516 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2517
2518 if (var->data.compact)
2519 stride = 1;
2520 if (indir_index) {
2521 unsigned count = glsl_count_attribute_slots(
2522 var->type, false);
2523 count -= chan / 4;
2524 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2525 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2526 stride, true, true);
2527
2528 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2529 value, indir_index, "");
2530 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2531 count, stride, tmp_vec);
2532
2533 } else {
2534 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2535
2536 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2537 }
2538 }
2539 break;
2540 case nir_var_function_temp:
2541 for (unsigned chan = 0; chan < 8; chan++) {
2542 if (!(writemask & (1 << chan)))
2543 continue;
2544
2545 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2546 if (indir_index) {
2547 unsigned count = glsl_count_attribute_slots(
2548 var->type, false);
2549 count -= chan / 4;
2550 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2551 &ctx->ac, ctx->locals + idx + chan, count,
2552 4, true, true);
2553
2554 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2555 value, indir_index, "");
2556 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2557 count, 4, tmp_vec);
2558 } else {
2559 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2560
2561 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2562 }
2563 }
2564 break;
2565
2566 case nir_var_mem_global: {
2567 int writemask = instr->const_index[0];
2568 LLVMValueRef address = get_src(ctx, instr->src[0]);
2569 LLVMValueRef val = get_src(ctx, instr->src[1]);
2570
2571 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2572 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2573 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2574 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2575 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2576
2577 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2578 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2579 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2580
2581 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2582 stride == natural_stride && !split_stores) {
2583 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2584 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2585 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2586
2587 val = LLVMBuildBitCast(ctx->ac.builder, val,
2588 LLVMGetElementType(LLVMTypeOf(address)), "");
2589 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2590
2591 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2592 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2593 } else {
2594 LLVMTypeRef val_type = LLVMTypeOf(val);
2595 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2596 val_type = LLVMGetElementType(val_type);
2597
2598 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2599 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2600 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2601 for (unsigned chan = 0; chan < 4; chan++) {
2602 if (!(writemask & (1 << chan)))
2603 continue;
2604
2605 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2606
2607 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2608 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2609 chan);
2610 src = LLVMBuildBitCast(ctx->ac.builder, src,
2611 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2612 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2613
2614 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2615 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2616 }
2617 }
2618 break;
2619 }
2620 default:
2621 abort();
2622 break;
2623 }
2624
2625 if (ctx->ac.postponed_kill)
2626 ac_build_endif(&ctx->ac, 7002);
2627 }
2628
2629 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2630 {
2631 switch (dim) {
2632 case GLSL_SAMPLER_DIM_BUF:
2633 return 1;
2634 case GLSL_SAMPLER_DIM_1D:
2635 return array ? 2 : 1;
2636 case GLSL_SAMPLER_DIM_2D:
2637 return array ? 3 : 2;
2638 case GLSL_SAMPLER_DIM_MS:
2639 return array ? 4 : 3;
2640 case GLSL_SAMPLER_DIM_3D:
2641 case GLSL_SAMPLER_DIM_CUBE:
2642 return 3;
2643 case GLSL_SAMPLER_DIM_RECT:
2644 case GLSL_SAMPLER_DIM_SUBPASS:
2645 return 2;
2646 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2647 return 3;
2648 default:
2649 break;
2650 }
2651 return 0;
2652 }
2653
2654 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2655 LLVMValueRef coord_x, LLVMValueRef coord_y,
2656 LLVMValueRef coord_z,
2657 LLVMValueRef sample_index,
2658 LLVMValueRef fmask_desc_ptr)
2659 {
2660 unsigned sample_chan = coord_z ? 3 : 2;
2661 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2662 addr[sample_chan] = sample_index;
2663
2664 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2665 return addr[sample_chan];
2666 }
2667
2668 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2669 {
2670 assert(instr->src[0].is_ssa);
2671 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2672 }
2673
2674 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2675 const nir_intrinsic_instr *instr,
2676 LLVMValueRef dynamic_index,
2677 enum ac_descriptor_type desc_type,
2678 bool write)
2679 {
2680 nir_deref_instr *deref_instr =
2681 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2682 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2683
2684 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2685 }
2686
2687 static void get_image_coords(struct ac_nir_context *ctx,
2688 const nir_intrinsic_instr *instr,
2689 LLVMValueRef dynamic_desc_index,
2690 struct ac_image_args *args,
2691 enum glsl_sampler_dim dim,
2692 bool is_array)
2693 {
2694 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2695 LLVMValueRef masks[] = {
2696 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2697 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2698 };
2699 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2700
2701 int count;
2702 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2703 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2704 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2705 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2706 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2707 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2708 count = image_type_to_components_count(dim, is_array);
2709
2710 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2711 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2712 LLVMValueRef fmask_load_address[3];
2713
2714 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2715 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2716 if (is_array)
2717 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2718 else
2719 fmask_load_address[2] = NULL;
2720
2721 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2722 fmask_load_address[0],
2723 fmask_load_address[1],
2724 fmask_load_address[2],
2725 sample_index,
2726 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2727 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2728 }
2729 if (count == 1 && !gfx9_1d) {
2730 if (instr->src[1].ssa->num_components)
2731 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2732 else
2733 args->coords[0] = src0;
2734 } else {
2735 int chan;
2736 if (is_ms)
2737 count--;
2738 for (chan = 0; chan < count; ++chan) {
2739 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2740 }
2741
2742 if (gfx9_1d) {
2743 if (is_array) {
2744 args->coords[2] = args->coords[1];
2745 args->coords[1] = ctx->ac.i32_0;
2746 } else
2747 args->coords[1] = ctx->ac.i32_0;
2748 count++;
2749 }
2750 if (ctx->ac.chip_class == GFX9 &&
2751 dim == GLSL_SAMPLER_DIM_2D &&
2752 !is_array) {
2753 /* The hw can't bind a slice of a 3D image as a 2D
2754 * image, because it ignores BASE_ARRAY if the target
2755 * is 3D. The workaround is to read BASE_ARRAY and set
2756 * it as the 3rd address operand for all 2D images.
2757 */
2758 LLVMValueRef first_layer, const5, mask;
2759
2760 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2761 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2762 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2763 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2764
2765 args->coords[count] = first_layer;
2766 count++;
2767 }
2768
2769
2770 if (is_ms) {
2771 args->coords[count] = sample_index;
2772 count++;
2773 }
2774 }
2775 }
2776
2777 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2778 const nir_intrinsic_instr *instr,
2779 LLVMValueRef dynamic_index,
2780 bool write, bool atomic)
2781 {
2782 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2783 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2784 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2785 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2786 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2787
2788 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2789 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2790 elem_count, stride, "");
2791
2792 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2793 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2794 }
2795 return rsrc;
2796 }
2797
2798 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2799 struct waterfall_context *wctx,
2800 const nir_intrinsic_instr *instr)
2801 {
2802 nir_deref_instr *deref_instr = NULL;
2803
2804 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2805 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2806
2807 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2808 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2809 }
2810
2811 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2812 const nir_intrinsic_instr *instr,
2813 bool bindless)
2814 {
2815 LLVMValueRef res;
2816
2817 enum glsl_sampler_dim dim;
2818 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2819 bool is_array;
2820 if (bindless) {
2821 dim = nir_intrinsic_image_dim(instr);
2822 is_array = nir_intrinsic_image_array(instr);
2823 } else {
2824 const nir_deref_instr *image_deref = get_image_deref(instr);
2825 const struct glsl_type *type = image_deref->type;
2826 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2827 dim = glsl_get_sampler_dim(type);
2828 access |= var->data.access;
2829 is_array = glsl_sampler_type_is_array(type);
2830 }
2831
2832 struct waterfall_context wctx;
2833 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2834
2835 struct ac_image_args args = {};
2836
2837 args.cache_policy = get_cache_policy(ctx, access, false, false);
2838
2839 if (dim == GLSL_SAMPLER_DIM_BUF) {
2840 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2841 unsigned num_channels = util_last_bit(mask);
2842 LLVMValueRef rsrc, vindex;
2843
2844 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2845 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2846 ctx->ac.i32_0, "");
2847
2848 assert(instr->dest.is_ssa);
2849 bool can_speculate = access & ACCESS_CAN_REORDER;
2850 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2851 ctx->ac.i32_0, num_channels,
2852 args.cache_policy,
2853 can_speculate,
2854 instr->dest.ssa.bit_size == 16);
2855 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2856
2857 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2858 res = ac_to_integer(&ctx->ac, res);
2859 } else {
2860 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2861
2862 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2863 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2864 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2865 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2866 if (!level_zero)
2867 args.lod = get_src(ctx, instr->src[3]);
2868 args.dmask = 15;
2869 args.attributes = AC_FUNC_ATTR_READONLY;
2870
2871 assert(instr->dest.is_ssa);
2872 args.d16 = instr->dest.ssa.bit_size == 16;
2873
2874 res = ac_build_image_opcode(&ctx->ac, &args);
2875 }
2876 return exit_waterfall(ctx, &wctx, res);
2877 }
2878
2879 static void visit_image_store(struct ac_nir_context *ctx,
2880 const nir_intrinsic_instr *instr,
2881 bool bindless)
2882 {
2883 if (ctx->ac.postponed_kill) {
2884 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2885 ctx->ac.postponed_kill, "");
2886 ac_build_ifcc(&ctx->ac, cond, 7003);
2887 }
2888
2889 enum glsl_sampler_dim dim;
2890 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2891 bool is_array;
2892
2893 if (bindless) {
2894 dim = nir_intrinsic_image_dim(instr);
2895 is_array = nir_intrinsic_image_array(instr);
2896 } else {
2897 const nir_deref_instr *image_deref = get_image_deref(instr);
2898 const struct glsl_type *type = image_deref->type;
2899 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2900 dim = glsl_get_sampler_dim(type);
2901 access |= var->data.access;
2902 is_array = glsl_sampler_type_is_array(type);
2903 }
2904
2905 struct waterfall_context wctx;
2906 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2907
2908 bool writeonly_memory = access & ACCESS_NON_READABLE;
2909 struct ac_image_args args = {};
2910
2911 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2912
2913 if (dim == GLSL_SAMPLER_DIM_BUF) {
2914 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2915 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2916 unsigned src_channels = ac_get_llvm_num_components(src);
2917 LLVMValueRef vindex;
2918
2919 if (src_channels == 3)
2920 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2921
2922 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2923 get_src(ctx, instr->src[1]),
2924 ctx->ac.i32_0, "");
2925
2926 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2927 ctx->ac.i32_0, args.cache_policy);
2928 } else {
2929 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2930
2931 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2932 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2933 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2934 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2935 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2936 if (!level_zero)
2937 args.lod = get_src(ctx, instr->src[4]);
2938 args.dmask = 15;
2939 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2940
2941 ac_build_image_opcode(&ctx->ac, &args);
2942 }
2943
2944 exit_waterfall(ctx, &wctx, NULL);
2945 if (ctx->ac.postponed_kill)
2946 ac_build_endif(&ctx->ac, 7003);
2947 }
2948
2949 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2950 const nir_intrinsic_instr *instr,
2951 bool bindless)
2952 {
2953 if (ctx->ac.postponed_kill) {
2954 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2955 ctx->ac.postponed_kill, "");
2956 ac_build_ifcc(&ctx->ac, cond, 7004);
2957 }
2958
2959 LLVMValueRef params[7];
2960 int param_count = 0;
2961
2962 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2963 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2964 const char *atomic_name;
2965 char intrinsic_name[64];
2966 enum ac_atomic_op atomic_subop;
2967 ASSERTED int length;
2968
2969 enum glsl_sampler_dim dim;
2970 bool is_array;
2971 if (bindless) {
2972 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2973 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2974 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2975 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2976 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2977 assert(format == GL_R32UI || format == GL_R32I);
2978 }
2979 dim = nir_intrinsic_image_dim(instr);
2980 is_array = nir_intrinsic_image_array(instr);
2981 } else {
2982 const struct glsl_type *type = get_image_deref(instr)->type;
2983 dim = glsl_get_sampler_dim(type);
2984 is_array = glsl_sampler_type_is_array(type);
2985 }
2986
2987 struct waterfall_context wctx;
2988 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2989
2990 switch (instr->intrinsic) {
2991 case nir_intrinsic_bindless_image_atomic_add:
2992 case nir_intrinsic_image_deref_atomic_add:
2993 atomic_name = "add";
2994 atomic_subop = ac_atomic_add;
2995 break;
2996 case nir_intrinsic_bindless_image_atomic_imin:
2997 case nir_intrinsic_image_deref_atomic_imin:
2998 atomic_name = "smin";
2999 atomic_subop = ac_atomic_smin;
3000 break;
3001 case nir_intrinsic_bindless_image_atomic_umin:
3002 case nir_intrinsic_image_deref_atomic_umin:
3003 atomic_name = "umin";
3004 atomic_subop = ac_atomic_umin;
3005 break;
3006 case nir_intrinsic_bindless_image_atomic_imax:
3007 case nir_intrinsic_image_deref_atomic_imax:
3008 atomic_name = "smax";
3009 atomic_subop = ac_atomic_smax;
3010 break;
3011 case nir_intrinsic_bindless_image_atomic_umax:
3012 case nir_intrinsic_image_deref_atomic_umax:
3013 atomic_name = "umax";
3014 atomic_subop = ac_atomic_umax;
3015 break;
3016 case nir_intrinsic_bindless_image_atomic_and:
3017 case nir_intrinsic_image_deref_atomic_and:
3018 atomic_name = "and";
3019 atomic_subop = ac_atomic_and;
3020 break;
3021 case nir_intrinsic_bindless_image_atomic_or:
3022 case nir_intrinsic_image_deref_atomic_or:
3023 atomic_name = "or";
3024 atomic_subop = ac_atomic_or;
3025 break;
3026 case nir_intrinsic_bindless_image_atomic_xor:
3027 case nir_intrinsic_image_deref_atomic_xor:
3028 atomic_name = "xor";
3029 atomic_subop = ac_atomic_xor;
3030 break;
3031 case nir_intrinsic_bindless_image_atomic_exchange:
3032 case nir_intrinsic_image_deref_atomic_exchange:
3033 atomic_name = "swap";
3034 atomic_subop = ac_atomic_swap;
3035 break;
3036 case nir_intrinsic_bindless_image_atomic_comp_swap:
3037 case nir_intrinsic_image_deref_atomic_comp_swap:
3038 atomic_name = "cmpswap";
3039 atomic_subop = 0; /* not used */
3040 break;
3041 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3042 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3043 atomic_name = "inc";
3044 atomic_subop = ac_atomic_inc_wrap;
3045 break;
3046 }
3047 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3048 case nir_intrinsic_image_deref_atomic_dec_wrap:
3049 atomic_name = "dec";
3050 atomic_subop = ac_atomic_dec_wrap;
3051 break;
3052 default:
3053 abort();
3054 }
3055
3056 if (cmpswap)
3057 params[param_count++] = get_src(ctx, instr->src[4]);
3058 params[param_count++] = get_src(ctx, instr->src[3]);
3059
3060 LLVMValueRef result;
3061 if (dim == GLSL_SAMPLER_DIM_BUF) {
3062 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3063 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3064 ctx->ac.i32_0, ""); /* vindex */
3065 params[param_count++] = ctx->ac.i32_0; /* voffset */
3066 if (LLVM_VERSION_MAJOR >= 9) {
3067 /* XXX: The new raw/struct atomic intrinsics are buggy
3068 * with LLVM 8, see r358579.
3069 */
3070 params[param_count++] = ctx->ac.i32_0; /* soffset */
3071 params[param_count++] = ctx->ac.i32_0; /* slc */
3072
3073 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3074 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3075 } else {
3076 params[param_count++] = ctx->ac.i1false; /* slc */
3077
3078 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3079 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3080 }
3081
3082 assert(length < sizeof(intrinsic_name));
3083 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3084 params, param_count, 0);
3085 } else {
3086 struct ac_image_args args = {};
3087 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3088 args.atomic = atomic_subop;
3089 args.data[0] = params[0];
3090 if (cmpswap)
3091 args.data[1] = params[1];
3092 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3093 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3094 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3095
3096 result = ac_build_image_opcode(&ctx->ac, &args);
3097 }
3098
3099 result = exit_waterfall(ctx, &wctx, result);
3100 if (ctx->ac.postponed_kill)
3101 ac_build_endif(&ctx->ac, 7004);
3102 return result;
3103 }
3104
3105 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3106 nir_intrinsic_instr *instr)
3107 {
3108 struct waterfall_context wctx;
3109 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3110 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3111
3112 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3113
3114 return exit_waterfall(ctx, &wctx, ret);
3115 }
3116
3117 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3118 const nir_intrinsic_instr *instr,
3119 bool bindless)
3120 {
3121 LLVMValueRef res;
3122
3123 enum glsl_sampler_dim dim;
3124 bool is_array;
3125 if (bindless) {
3126 dim = nir_intrinsic_image_dim(instr);
3127 is_array = nir_intrinsic_image_array(instr);
3128 } else {
3129 const struct glsl_type *type = get_image_deref(instr)->type;
3130 dim = glsl_get_sampler_dim(type);
3131 is_array = glsl_sampler_type_is_array(type);
3132 }
3133
3134 struct waterfall_context wctx;
3135 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3136
3137 if (dim == GLSL_SAMPLER_DIM_BUF) {
3138 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3139 } else {
3140
3141 struct ac_image_args args = { 0 };
3142
3143 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3144 args.dmask = 0xf;
3145 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3146 args.opcode = ac_image_get_resinfo;
3147 assert(nir_src_as_uint(instr->src[1]) == 0);
3148 args.lod = ctx->ac.i32_0;
3149 args.attributes = AC_FUNC_ATTR_READNONE;
3150
3151 res = ac_build_image_opcode(&ctx->ac, &args);
3152
3153 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3154
3155 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3156 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3157 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3158 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3159 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3160 }
3161
3162 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3163 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3164 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3165 ctx->ac.i32_1, "");
3166 }
3167 }
3168 return exit_waterfall(ctx, &wctx, res);
3169 }
3170
3171 static void emit_membar(struct ac_llvm_context *ac,
3172 const nir_intrinsic_instr *instr)
3173 {
3174 unsigned wait_flags = 0;
3175
3176 switch (instr->intrinsic) {
3177 case nir_intrinsic_memory_barrier:
3178 case nir_intrinsic_group_memory_barrier:
3179 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3180 break;
3181 case nir_intrinsic_memory_barrier_buffer:
3182 case nir_intrinsic_memory_barrier_image:
3183 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3184 break;
3185 case nir_intrinsic_memory_barrier_shared:
3186 wait_flags = AC_WAIT_LGKM;
3187 break;
3188 default:
3189 break;
3190 }
3191
3192 ac_build_waitcnt(ac, wait_flags);
3193 }
3194
3195 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3196 {
3197 /* GFX6 only (thanks to a hw bug workaround):
3198 * The real barrier instruction isn’t needed, because an entire patch
3199 * always fits into a single wave.
3200 */
3201 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3202 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3203 return;
3204 }
3205 ac_build_s_barrier(ac);
3206 }
3207
3208 static void emit_discard(struct ac_nir_context *ctx,
3209 const nir_intrinsic_instr *instr)
3210 {
3211 LLVMValueRef cond;
3212
3213 if (instr->intrinsic == nir_intrinsic_discard_if) {
3214 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3215 get_src(ctx, instr->src[0]),
3216 ctx->ac.i32_0, "");
3217 } else {
3218 assert(instr->intrinsic == nir_intrinsic_discard);
3219 cond = ctx->ac.i1false;
3220 }
3221
3222 ac_build_kill_if_false(&ctx->ac, cond);
3223 }
3224
3225 static void emit_demote(struct ac_nir_context *ctx,
3226 const nir_intrinsic_instr *instr)
3227 {
3228 LLVMValueRef cond;
3229
3230 if (instr->intrinsic == nir_intrinsic_demote_if) {
3231 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3232 get_src(ctx, instr->src[0]),
3233 ctx->ac.i32_0, "");
3234 } else {
3235 assert(instr->intrinsic == nir_intrinsic_demote);
3236 cond = ctx->ac.i1false;
3237 }
3238
3239 /* Kill immediately while maintaining WQM. */
3240 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3241
3242 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3243 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3244 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3245 return;
3246 }
3247
3248 static LLVMValueRef
3249 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3250 {
3251 LLVMValueRef result;
3252 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3253 result = LLVMBuildAnd(ctx->ac.builder,
3254 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3255 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3256
3257 if (ctx->ac.wave_size == 32)
3258 result = LLVMBuildLShr(ctx->ac.builder, result,
3259 LLVMConstInt(ctx->ac.i32, 1, false), "");
3260
3261 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3262 }
3263
3264 static LLVMValueRef
3265 visit_load_subgroup_id(struct ac_nir_context *ctx)
3266 {
3267 if (ctx->stage == MESA_SHADER_COMPUTE) {
3268 LLVMValueRef result;
3269 result = LLVMBuildAnd(ctx->ac.builder,
3270 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3271 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3272 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3273 } else {
3274 return LLVMConstInt(ctx->ac.i32, 0, false);
3275 }
3276 }
3277
3278 static LLVMValueRef
3279 visit_load_num_subgroups(struct ac_nir_context *ctx)
3280 {
3281 if (ctx->stage == MESA_SHADER_COMPUTE) {
3282 return LLVMBuildAnd(ctx->ac.builder,
3283 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3284 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3285 } else {
3286 return LLVMConstInt(ctx->ac.i32, 1, false);
3287 }
3288 }
3289
3290 static LLVMValueRef
3291 visit_first_invocation(struct ac_nir_context *ctx)
3292 {
3293 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3294 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3295
3296 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3297 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3298 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3299 ctx->ac.iN_wavemask, args, 2,
3300 AC_FUNC_ATTR_NOUNWIND |
3301 AC_FUNC_ATTR_READNONE);
3302
3303 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3304 }
3305
3306 static LLVMValueRef
3307 visit_load_shared(struct ac_nir_context *ctx,
3308 const nir_intrinsic_instr *instr)
3309 {
3310 LLVMValueRef values[4], derived_ptr, index, ret;
3311
3312 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3313 instr->dest.ssa.bit_size);
3314
3315 for (int chan = 0; chan < instr->num_components; chan++) {
3316 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3317 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3318 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3319 }
3320
3321 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3322 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3323 }
3324
3325 static void
3326 visit_store_shared(struct ac_nir_context *ctx,
3327 const nir_intrinsic_instr *instr)
3328 {
3329 LLVMValueRef derived_ptr, data,index;
3330 LLVMBuilderRef builder = ctx->ac.builder;
3331
3332 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3333 instr->src[0].ssa->bit_size);
3334 LLVMValueRef src = get_src(ctx, instr->src[0]);
3335
3336 int writemask = nir_intrinsic_write_mask(instr);
3337 for (int chan = 0; chan < 4; chan++) {
3338 if (!(writemask & (1 << chan))) {
3339 continue;
3340 }
3341 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3342 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3343 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3344 LLVMBuildStore(builder, data, derived_ptr);
3345 }
3346 }
3347
3348 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3349 const nir_intrinsic_instr *instr,
3350 LLVMValueRef ptr, int src_idx)
3351 {
3352 if (ctx->ac.postponed_kill) {
3353 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3354 ctx->ac.postponed_kill, "");
3355 ac_build_ifcc(&ctx->ac, cond, 7005);
3356 }
3357
3358 LLVMValueRef result;
3359 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3360
3361 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3362
3363 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3364 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3365 if (deref->mode == nir_var_mem_global) {
3366 /* use "singlethread" sync scope to implement relaxed ordering */
3367 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3368
3369 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3370 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3371 }
3372 }
3373
3374 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3375 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3376 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3377 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3378 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3379 } else {
3380 LLVMAtomicRMWBinOp op;
3381 switch (instr->intrinsic) {
3382 case nir_intrinsic_shared_atomic_add:
3383 case nir_intrinsic_deref_atomic_add:
3384 op = LLVMAtomicRMWBinOpAdd;
3385 break;
3386 case nir_intrinsic_shared_atomic_umin:
3387 case nir_intrinsic_deref_atomic_umin:
3388 op = LLVMAtomicRMWBinOpUMin;
3389 break;
3390 case nir_intrinsic_shared_atomic_umax:
3391 case nir_intrinsic_deref_atomic_umax:
3392 op = LLVMAtomicRMWBinOpUMax;
3393 break;
3394 case nir_intrinsic_shared_atomic_imin:
3395 case nir_intrinsic_deref_atomic_imin:
3396 op = LLVMAtomicRMWBinOpMin;
3397 break;
3398 case nir_intrinsic_shared_atomic_imax:
3399 case nir_intrinsic_deref_atomic_imax:
3400 op = LLVMAtomicRMWBinOpMax;
3401 break;
3402 case nir_intrinsic_shared_atomic_and:
3403 case nir_intrinsic_deref_atomic_and:
3404 op = LLVMAtomicRMWBinOpAnd;
3405 break;
3406 case nir_intrinsic_shared_atomic_or:
3407 case nir_intrinsic_deref_atomic_or:
3408 op = LLVMAtomicRMWBinOpOr;
3409 break;
3410 case nir_intrinsic_shared_atomic_xor:
3411 case nir_intrinsic_deref_atomic_xor:
3412 op = LLVMAtomicRMWBinOpXor;
3413 break;
3414 case nir_intrinsic_shared_atomic_exchange:
3415 case nir_intrinsic_deref_atomic_exchange:
3416 op = LLVMAtomicRMWBinOpXchg;
3417 break;
3418 #if LLVM_VERSION_MAJOR >= 10
3419 case nir_intrinsic_shared_atomic_fadd:
3420 case nir_intrinsic_deref_atomic_fadd:
3421 op = LLVMAtomicRMWBinOpFAdd;
3422 break;
3423 #endif
3424 default:
3425 return NULL;
3426 }
3427
3428 LLVMValueRef val;
3429
3430 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3431 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3432 val = ac_to_float(&ctx->ac, src);
3433 } else {
3434 val = ac_to_integer(&ctx->ac, src);
3435 }
3436
3437 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3438 }
3439
3440 if (ctx->ac.postponed_kill)
3441 ac_build_endif(&ctx->ac, 7005);
3442 return result;
3443 }
3444
3445 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3446 {
3447 LLVMValueRef values[2];
3448 LLVMValueRef pos[2];
3449
3450 pos[0] = ac_to_float(&ctx->ac,
3451 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3452 pos[1] = ac_to_float(&ctx->ac,
3453 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3454
3455 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3456 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3457 return ac_build_gather_values(&ctx->ac, values, 2);
3458 }
3459
3460 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3461 enum glsl_interp_mode interp, unsigned location)
3462 {
3463 switch (interp) {
3464 case INTERP_MODE_FLAT:
3465 default:
3466 return NULL;
3467 case INTERP_MODE_SMOOTH:
3468 case INTERP_MODE_NONE:
3469 if (location == INTERP_CENTER)
3470 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3471 else if (location == INTERP_CENTROID)
3472 return ctx->abi->persp_centroid;
3473 else if (location == INTERP_SAMPLE)
3474 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3475 break;
3476 case INTERP_MODE_NOPERSPECTIVE:
3477 if (location == INTERP_CENTER)
3478 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3479 else if (location == INTERP_CENTROID)
3480 return ctx->abi->linear_centroid;
3481 else if (location == INTERP_SAMPLE)
3482 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3483 break;
3484 }
3485 return NULL;
3486 }
3487
3488 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3489 unsigned mode)
3490 {
3491 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3492 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3493 }
3494
3495 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3496 unsigned mode,
3497 LLVMValueRef offset)
3498 {
3499 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3500 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3501 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3502
3503 LLVMValueRef ij_out[2];
3504 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3505
3506 /*
3507 * take the I then J parameters, and the DDX/Y for it, and
3508 * calculate the IJ inputs for the interpolator.
3509 * temp1 = ddx * offset/sample.x + I;
3510 * interp_param.I = ddy * offset/sample.y + temp1;
3511 * temp1 = ddx * offset/sample.x + J;
3512 * interp_param.J = ddy * offset/sample.y + temp1;
3513 */
3514 for (unsigned i = 0; i < 2; i++) {
3515 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3516 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3517 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3518 ddxy_out, ix_ll, "");
3519 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3520 ddxy_out, iy_ll, "");
3521 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3522 interp_param, ix_ll, "");
3523 LLVMValueRef temp1, temp2;
3524
3525 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3526 ctx->ac.f32, "");
3527
3528 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3529 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3530
3531 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3532 temp2, ctx->ac.i32, "");
3533 }
3534 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3535 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3536 }
3537
3538 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3539 unsigned mode)
3540 {
3541 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3542 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3543 }
3544
3545 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3546 unsigned mode,
3547 LLVMValueRef sample_id)
3548 {
3549 if (ctx->abi->interp_at_sample_force_center)
3550 return barycentric_center(ctx, mode);
3551
3552 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3553
3554 /* fetch sample ID */
3555 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3556
3557 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3558 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3559 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3560 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3561 LLVMValueRef coords[] = { src_c0, src_c1 };
3562 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3563
3564 return barycentric_offset(ctx, mode, offset);
3565 }
3566
3567
3568 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3569 unsigned mode)
3570 {
3571 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3572 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3573 }
3574
3575 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3576 {
3577 return LLVMBuildBitCast(ctx->ac.builder,
3578 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3579 ctx->ac.v3i32, "");
3580 }
3581
3582 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3583 LLVMValueRef interp_param,
3584 unsigned index, unsigned comp_start,
3585 unsigned num_components,
3586 unsigned bitsize)
3587 {
3588 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3589 LLVMValueRef interp_param_f;
3590
3591 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3592 interp_param, ctx->ac.v2f32, "");
3593 LLVMValueRef i = LLVMBuildExtractElement(
3594 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3595 LLVMValueRef j = LLVMBuildExtractElement(
3596 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3597
3598 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3599 if (ctx->verified_interp &&
3600 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3601 LLVMValueRef args[2];
3602 args[0] = i;
3603 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3604 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3605 args, 2, AC_FUNC_ATTR_READNONE);
3606 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3607 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3608 }
3609
3610 LLVMValueRef values[4];
3611 assert(bitsize == 16 || bitsize == 32);
3612 for (unsigned comp = 0; comp < num_components; comp++) {
3613 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3614 if (bitsize == 16) {
3615 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3616 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3617 } else {
3618 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3619 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3620 }
3621 }
3622
3623 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3624 }
3625
3626 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3627 nir_intrinsic_instr *instr)
3628 {
3629 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3630
3631 /* We only lower inputs for fragment shaders ATM */
3632 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3633 assert(offset);
3634 assert(offset[0].i32 == 0);
3635
3636 unsigned component = nir_intrinsic_component(instr);
3637 unsigned index = nir_intrinsic_base(instr);
3638 unsigned vertex_id = 2; /* P0 */
3639
3640 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3641 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3642
3643 switch (src0[0].i32) {
3644 case 0:
3645 vertex_id = 2;
3646 break;
3647 case 1:
3648 vertex_id = 0;
3649 break;
3650 case 2:
3651 vertex_id = 1;
3652 break;
3653 default:
3654 unreachable("Invalid vertex index");
3655 }
3656 }
3657
3658 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3659 LLVMValueRef values[8];
3660
3661 /* Each component of a 64-bit value takes up two GL-level channels. */
3662 unsigned num_components = instr->dest.ssa.num_components;
3663 unsigned bit_size = instr->dest.ssa.bit_size;
3664 unsigned channels =
3665 bit_size == 64 ? num_components * 2 : num_components;
3666
3667 for (unsigned chan = 0; chan < channels; chan++) {
3668 if (component + chan > 4)
3669 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3670 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3671 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3672 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3673 llvm_chan,
3674 attr_number,
3675 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3676 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3677 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3678 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3679 }
3680
3681 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3682 if (bit_size == 64) {
3683 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3684 LLVMVectorType(ctx->ac.i64, num_components);
3685 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3686 }
3687 return result;
3688 }
3689
3690 static void visit_intrinsic(struct ac_nir_context *ctx,
3691 nir_intrinsic_instr *instr)
3692 {
3693 LLVMValueRef result = NULL;
3694
3695 switch (instr->intrinsic) {
3696 case nir_intrinsic_ballot:
3697 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3698 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3699 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3700 break;
3701 case nir_intrinsic_read_invocation:
3702 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3703 get_src(ctx, instr->src[1]));
3704 break;
3705 case nir_intrinsic_read_first_invocation:
3706 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3707 break;
3708 case nir_intrinsic_load_subgroup_invocation:
3709 result = ac_get_thread_id(&ctx->ac);
3710 break;
3711 case nir_intrinsic_load_work_group_id: {
3712 LLVMValueRef values[3];
3713
3714 for (int i = 0; i < 3; i++) {
3715 values[i] = ctx->args->workgroup_ids[i].used ?
3716 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3717 }
3718
3719 result = ac_build_gather_values(&ctx->ac, values, 3);
3720 break;
3721 }
3722 case nir_intrinsic_load_base_vertex:
3723 case nir_intrinsic_load_first_vertex:
3724 result = ctx->abi->load_base_vertex(ctx->abi);
3725 break;
3726 case nir_intrinsic_load_local_group_size:
3727 result = ctx->abi->load_local_group_size(ctx->abi);
3728 break;
3729 case nir_intrinsic_load_vertex_id:
3730 result = LLVMBuildAdd(ctx->ac.builder,
3731 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3732 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3733 break;
3734 case nir_intrinsic_load_vertex_id_zero_base: {
3735 result = ctx->abi->vertex_id;
3736 break;
3737 }
3738 case nir_intrinsic_load_local_invocation_id: {
3739 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3740 break;
3741 }
3742 case nir_intrinsic_load_base_instance:
3743 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3744 break;
3745 case nir_intrinsic_load_draw_id:
3746 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3747 break;
3748 case nir_intrinsic_load_view_index:
3749 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3750 break;
3751 case nir_intrinsic_load_invocation_id:
3752 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3753 result = ac_unpack_param(&ctx->ac,
3754 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3755 8, 5);
3756 } else {
3757 if (ctx->ac.chip_class >= GFX10) {
3758 result = LLVMBuildAnd(ctx->ac.builder,
3759 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3760 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3761 } else {
3762 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3763 }
3764 }
3765 break;
3766 case nir_intrinsic_load_primitive_id:
3767 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3768 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3769 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3770 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3771 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3772 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3773 } else
3774 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3775 break;
3776 case nir_intrinsic_load_sample_id:
3777 result = ac_unpack_param(&ctx->ac,
3778 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3779 8, 4);
3780 break;
3781 case nir_intrinsic_load_sample_pos:
3782 result = load_sample_pos(ctx);
3783 break;
3784 case nir_intrinsic_load_sample_mask_in:
3785 result = ctx->abi->load_sample_mask_in(ctx->abi);
3786 break;
3787 case nir_intrinsic_load_frag_coord: {
3788 LLVMValueRef values[4] = {
3789 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3790 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3791 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3792 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3793 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3794 };
3795 result = ac_to_integer(&ctx->ac,
3796 ac_build_gather_values(&ctx->ac, values, 4));
3797 break;
3798 }
3799 case nir_intrinsic_load_layer_id:
3800 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3801 break;
3802 case nir_intrinsic_load_front_face:
3803 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3804 break;
3805 case nir_intrinsic_load_helper_invocation:
3806 result = ac_build_load_helper_invocation(&ctx->ac);
3807 break;
3808 case nir_intrinsic_is_helper_invocation:
3809 result = ac_build_is_helper_invocation(&ctx->ac);
3810 break;
3811 case nir_intrinsic_load_color0:
3812 result = ctx->abi->color0;
3813 break;
3814 case nir_intrinsic_load_color1:
3815 result = ctx->abi->color1;
3816 break;
3817 case nir_intrinsic_load_user_data_amd:
3818 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3819 result = ctx->abi->user_data;
3820 break;
3821 case nir_intrinsic_load_instance_id:
3822 result = ctx->abi->instance_id;
3823 break;
3824 case nir_intrinsic_load_num_work_groups:
3825 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3826 break;
3827 case nir_intrinsic_load_local_invocation_index:
3828 result = visit_load_local_invocation_index(ctx);
3829 break;
3830 case nir_intrinsic_load_subgroup_id:
3831 result = visit_load_subgroup_id(ctx);
3832 break;
3833 case nir_intrinsic_load_num_subgroups:
3834 result = visit_load_num_subgroups(ctx);
3835 break;
3836 case nir_intrinsic_first_invocation:
3837 result = visit_first_invocation(ctx);
3838 break;
3839 case nir_intrinsic_load_push_constant:
3840 result = visit_load_push_constant(ctx, instr);
3841 break;
3842 case nir_intrinsic_vulkan_resource_index: {
3843 LLVMValueRef index = get_src(ctx, instr->src[0]);
3844 unsigned desc_set = nir_intrinsic_desc_set(instr);
3845 unsigned binding = nir_intrinsic_binding(instr);
3846
3847 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3848 binding);
3849 break;
3850 }
3851 case nir_intrinsic_vulkan_resource_reindex:
3852 result = visit_vulkan_resource_reindex(ctx, instr);
3853 break;
3854 case nir_intrinsic_store_ssbo:
3855 visit_store_ssbo(ctx, instr);
3856 break;
3857 case nir_intrinsic_load_ssbo:
3858 result = visit_load_buffer(ctx, instr);
3859 break;
3860 case nir_intrinsic_ssbo_atomic_add:
3861 case nir_intrinsic_ssbo_atomic_imin:
3862 case nir_intrinsic_ssbo_atomic_umin:
3863 case nir_intrinsic_ssbo_atomic_imax:
3864 case nir_intrinsic_ssbo_atomic_umax:
3865 case nir_intrinsic_ssbo_atomic_and:
3866 case nir_intrinsic_ssbo_atomic_or:
3867 case nir_intrinsic_ssbo_atomic_xor:
3868 case nir_intrinsic_ssbo_atomic_exchange:
3869 case nir_intrinsic_ssbo_atomic_comp_swap:
3870 result = visit_atomic_ssbo(ctx, instr);
3871 break;
3872 case nir_intrinsic_load_ubo:
3873 result = visit_load_ubo_buffer(ctx, instr);
3874 break;
3875 case nir_intrinsic_get_buffer_size:
3876 result = visit_get_buffer_size(ctx, instr);
3877 break;
3878 case nir_intrinsic_load_deref:
3879 result = visit_load_var(ctx, instr);
3880 break;
3881 case nir_intrinsic_store_deref:
3882 visit_store_var(ctx, instr);
3883 break;
3884 case nir_intrinsic_load_shared:
3885 result = visit_load_shared(ctx, instr);
3886 break;
3887 case nir_intrinsic_store_shared:
3888 visit_store_shared(ctx, instr);
3889 break;
3890 case nir_intrinsic_bindless_image_samples:
3891 case nir_intrinsic_image_deref_samples:
3892 result = visit_image_samples(ctx, instr);
3893 break;
3894 case nir_intrinsic_bindless_image_load:
3895 result = visit_image_load(ctx, instr, true);
3896 break;
3897 case nir_intrinsic_image_deref_load:
3898 result = visit_image_load(ctx, instr, false);
3899 break;
3900 case nir_intrinsic_bindless_image_store:
3901 visit_image_store(ctx, instr, true);
3902 break;
3903 case nir_intrinsic_image_deref_store:
3904 visit_image_store(ctx, instr, false);
3905 break;
3906 case nir_intrinsic_bindless_image_atomic_add:
3907 case nir_intrinsic_bindless_image_atomic_imin:
3908 case nir_intrinsic_bindless_image_atomic_umin:
3909 case nir_intrinsic_bindless_image_atomic_imax:
3910 case nir_intrinsic_bindless_image_atomic_umax:
3911 case nir_intrinsic_bindless_image_atomic_and:
3912 case nir_intrinsic_bindless_image_atomic_or:
3913 case nir_intrinsic_bindless_image_atomic_xor:
3914 case nir_intrinsic_bindless_image_atomic_exchange:
3915 case nir_intrinsic_bindless_image_atomic_comp_swap:
3916 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3917 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3918 result = visit_image_atomic(ctx, instr, true);
3919 break;
3920 case nir_intrinsic_image_deref_atomic_add:
3921 case nir_intrinsic_image_deref_atomic_imin:
3922 case nir_intrinsic_image_deref_atomic_umin:
3923 case nir_intrinsic_image_deref_atomic_imax:
3924 case nir_intrinsic_image_deref_atomic_umax:
3925 case nir_intrinsic_image_deref_atomic_and:
3926 case nir_intrinsic_image_deref_atomic_or:
3927 case nir_intrinsic_image_deref_atomic_xor:
3928 case nir_intrinsic_image_deref_atomic_exchange:
3929 case nir_intrinsic_image_deref_atomic_comp_swap:
3930 case nir_intrinsic_image_deref_atomic_inc_wrap:
3931 case nir_intrinsic_image_deref_atomic_dec_wrap:
3932 result = visit_image_atomic(ctx, instr, false);
3933 break;
3934 case nir_intrinsic_bindless_image_size:
3935 result = visit_image_size(ctx, instr, true);
3936 break;
3937 case nir_intrinsic_image_deref_size:
3938 result = visit_image_size(ctx, instr, false);
3939 break;
3940 case nir_intrinsic_shader_clock:
3941 result = ac_build_shader_clock(&ctx->ac,
3942 nir_intrinsic_memory_scope(instr));
3943 break;
3944 case nir_intrinsic_discard:
3945 case nir_intrinsic_discard_if:
3946 emit_discard(ctx, instr);
3947 break;
3948 case nir_intrinsic_demote:
3949 case nir_intrinsic_demote_if:
3950 emit_demote(ctx, instr);
3951 break;
3952 case nir_intrinsic_memory_barrier:
3953 case nir_intrinsic_group_memory_barrier:
3954 case nir_intrinsic_memory_barrier_buffer:
3955 case nir_intrinsic_memory_barrier_image:
3956 case nir_intrinsic_memory_barrier_shared:
3957 emit_membar(&ctx->ac, instr);
3958 break;
3959 case nir_intrinsic_scoped_barrier: {
3960 assert(!(nir_intrinsic_memory_semantics(instr) &
3961 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
3962
3963 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
3964
3965 unsigned wait_flags = 0;
3966 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
3967 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3968 if (modes & nir_var_mem_shared)
3969 wait_flags |= AC_WAIT_LGKM;
3970
3971 if (wait_flags)
3972 ac_build_waitcnt(&ctx->ac, wait_flags);
3973
3974 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
3975 ac_emit_barrier(&ctx->ac, ctx->stage);
3976 break;
3977 }
3978 case nir_intrinsic_memory_barrier_tcs_patch:
3979 break;
3980 case nir_intrinsic_control_barrier:
3981 ac_emit_barrier(&ctx->ac, ctx->stage);
3982 break;
3983 case nir_intrinsic_shared_atomic_add:
3984 case nir_intrinsic_shared_atomic_imin:
3985 case nir_intrinsic_shared_atomic_umin:
3986 case nir_intrinsic_shared_atomic_imax:
3987 case nir_intrinsic_shared_atomic_umax:
3988 case nir_intrinsic_shared_atomic_and:
3989 case nir_intrinsic_shared_atomic_or:
3990 case nir_intrinsic_shared_atomic_xor:
3991 case nir_intrinsic_shared_atomic_exchange:
3992 case nir_intrinsic_shared_atomic_comp_swap:
3993 case nir_intrinsic_shared_atomic_fadd: {
3994 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3995 instr->src[1].ssa->bit_size);
3996 result = visit_var_atomic(ctx, instr, ptr, 1);
3997 break;
3998 }
3999 case nir_intrinsic_deref_atomic_add:
4000 case nir_intrinsic_deref_atomic_imin:
4001 case nir_intrinsic_deref_atomic_umin:
4002 case nir_intrinsic_deref_atomic_imax:
4003 case nir_intrinsic_deref_atomic_umax:
4004 case nir_intrinsic_deref_atomic_and:
4005 case nir_intrinsic_deref_atomic_or:
4006 case nir_intrinsic_deref_atomic_xor:
4007 case nir_intrinsic_deref_atomic_exchange:
4008 case nir_intrinsic_deref_atomic_comp_swap:
4009 case nir_intrinsic_deref_atomic_fadd: {
4010 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
4011 result = visit_var_atomic(ctx, instr, ptr, 1);
4012 break;
4013 }
4014 case nir_intrinsic_load_barycentric_pixel:
4015 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
4016 break;
4017 case nir_intrinsic_load_barycentric_centroid:
4018 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
4019 break;
4020 case nir_intrinsic_load_barycentric_sample:
4021 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
4022 break;
4023 case nir_intrinsic_load_barycentric_model:
4024 result = barycentric_model(ctx);
4025 break;
4026 case nir_intrinsic_load_barycentric_at_offset: {
4027 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
4028 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
4029 break;
4030 }
4031 case nir_intrinsic_load_barycentric_at_sample: {
4032 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
4033 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
4034 break;
4035 }
4036 case nir_intrinsic_load_interpolated_input: {
4037 /* We assume any indirect loads have been lowered away */
4038 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
4039 assert(offset);
4040 assert(offset[0].i32 == 0);
4041
4042 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
4043 unsigned index = nir_intrinsic_base(instr);
4044 unsigned component = nir_intrinsic_component(instr);
4045 result = load_interpolated_input(ctx, interp_param, index,
4046 component,
4047 instr->dest.ssa.num_components,
4048 instr->dest.ssa.bit_size);
4049 break;
4050 }
4051 case nir_intrinsic_load_input:
4052 case nir_intrinsic_load_input_vertex:
4053 result = load_input(ctx, instr);
4054 break;
4055 case nir_intrinsic_emit_vertex:
4056 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4057 break;
4058 case nir_intrinsic_emit_vertex_with_counter: {
4059 unsigned stream = nir_intrinsic_stream_id(instr);
4060 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4061 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4062 next_vertex,
4063 ctx->abi->outputs);
4064 break;
4065 }
4066 case nir_intrinsic_end_primitive:
4067 case nir_intrinsic_end_primitive_with_counter:
4068 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4069 break;
4070 case nir_intrinsic_load_tess_coord:
4071 result = ctx->abi->load_tess_coord(ctx->abi);
4072 break;
4073 case nir_intrinsic_load_tess_level_outer:
4074 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4075 break;
4076 case nir_intrinsic_load_tess_level_inner:
4077 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4078 break;
4079 case nir_intrinsic_load_tess_level_outer_default:
4080 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4081 break;
4082 case nir_intrinsic_load_tess_level_inner_default:
4083 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4084 break;
4085 case nir_intrinsic_load_patch_vertices_in:
4086 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4087 break;
4088 case nir_intrinsic_vote_all: {
4089 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4090 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4091 break;
4092 }
4093 case nir_intrinsic_vote_any: {
4094 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4095 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4096 break;
4097 }
4098 case nir_intrinsic_shuffle:
4099 if (ctx->ac.chip_class == GFX8 ||
4100 ctx->ac.chip_class == GFX9 ||
4101 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4102 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4103 get_src(ctx, instr->src[1]));
4104 } else {
4105 LLVMValueRef src = get_src(ctx, instr->src[0]);
4106 LLVMValueRef index = get_src(ctx, instr->src[1]);
4107 LLVMTypeRef type = LLVMTypeOf(src);
4108 struct waterfall_context wctx;
4109 LLVMValueRef index_val;
4110
4111 index_val = enter_waterfall(ctx, &wctx, index, true);
4112
4113 src = LLVMBuildZExt(ctx->ac.builder, src,
4114 ctx->ac.i32, "");
4115
4116 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4117 ctx->ac.i32,
4118 (LLVMValueRef []) { src, index_val }, 2,
4119 AC_FUNC_ATTR_READNONE |
4120 AC_FUNC_ATTR_CONVERGENT);
4121
4122 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4123
4124 result = exit_waterfall(ctx, &wctx, result);
4125 }
4126 break;
4127 case nir_intrinsic_reduce:
4128 result = ac_build_reduce(&ctx->ac,
4129 get_src(ctx, instr->src[0]),
4130 instr->const_index[0],
4131 instr->const_index[1]);
4132 break;
4133 case nir_intrinsic_inclusive_scan:
4134 result = ac_build_inclusive_scan(&ctx->ac,
4135 get_src(ctx, instr->src[0]),
4136 instr->const_index[0]);
4137 break;
4138 case nir_intrinsic_exclusive_scan:
4139 result = ac_build_exclusive_scan(&ctx->ac,
4140 get_src(ctx, instr->src[0]),
4141 instr->const_index[0]);
4142 break;
4143 case nir_intrinsic_quad_broadcast: {
4144 unsigned lane = nir_src_as_uint(instr->src[1]);
4145 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4146 lane, lane, lane, lane);
4147 break;
4148 }
4149 case nir_intrinsic_quad_swap_horizontal:
4150 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4151 break;
4152 case nir_intrinsic_quad_swap_vertical:
4153 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4154 break;
4155 case nir_intrinsic_quad_swap_diagonal:
4156 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4157 break;
4158 case nir_intrinsic_quad_swizzle_amd: {
4159 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4160 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4161 mask & 0x3, (mask >> 2) & 0x3,
4162 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4163 break;
4164 }
4165 case nir_intrinsic_masked_swizzle_amd: {
4166 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4167 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4168 break;
4169 }
4170 case nir_intrinsic_write_invocation_amd:
4171 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4172 get_src(ctx, instr->src[1]),
4173 get_src(ctx, instr->src[2]));
4174 break;
4175 case nir_intrinsic_mbcnt_amd:
4176 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4177 break;
4178 case nir_intrinsic_load_scratch: {
4179 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4180 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4181 offset);
4182 LLVMTypeRef comp_type =
4183 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4184 LLVMTypeRef vec_type =
4185 instr->dest.ssa.num_components == 1 ? comp_type :
4186 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4187 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4188 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4189 LLVMPointerType(vec_type, addr_space), "");
4190 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4191 break;
4192 }
4193 case nir_intrinsic_store_scratch: {
4194 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4195 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4196 offset);
4197 LLVMTypeRef comp_type =
4198 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4199 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4200 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4201 LLVMPointerType(comp_type, addr_space), "");
4202 LLVMValueRef src = get_src(ctx, instr->src[0]);
4203 unsigned wrmask = nir_intrinsic_write_mask(instr);
4204 while (wrmask) {
4205 int start, count;
4206 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4207
4208 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4209 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4210 LLVMTypeRef vec_type =
4211 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4212 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4213 offset_ptr,
4214 LLVMPointerType(vec_type, addr_space),
4215 "");
4216 LLVMValueRef offset_src =
4217 ac_extract_components(&ctx->ac, src, start, count);
4218 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4219 }
4220 break;
4221 }
4222 case nir_intrinsic_load_constant: {
4223 unsigned base = nir_intrinsic_base(instr);
4224 unsigned range = nir_intrinsic_range(instr);
4225
4226 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4227 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4228 LLVMConstInt(ctx->ac.i32, base, false), "");
4229
4230 /* Clamp the offset to avoid out-of-bound access because global
4231 * instructions can't handle them.
4232 */
4233 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4234 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4235 offset, size, "");
4236 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4237
4238 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4239 offset);
4240 LLVMTypeRef comp_type =
4241 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4242 LLVMTypeRef vec_type =
4243 instr->dest.ssa.num_components == 1 ? comp_type :
4244 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4245 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4246 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4247 LLVMPointerType(vec_type, addr_space), "");
4248 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4249 break;
4250 }
4251 default:
4252 fprintf(stderr, "Unknown intrinsic: ");
4253 nir_print_instr(&instr->instr, stderr);
4254 fprintf(stderr, "\n");
4255 break;
4256 }
4257 if (result) {
4258 ctx->ssa_defs[instr->dest.ssa.index] = result;
4259 }
4260 }
4261
4262 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4263 unsigned base_index,
4264 unsigned constant_index,
4265 LLVMValueRef dynamic_index)
4266 {
4267 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4268 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4269 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4270
4271 /* Bindless uniforms are 64bit so multiple index by 8 */
4272 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4273 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4274
4275 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4276
4277 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4278 NULL, 0, 0, true, true);
4279
4280 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4281 }
4282
4283 struct sampler_desc_address {
4284 unsigned descriptor_set;
4285 unsigned base_index; /* binding in vulkan */
4286 unsigned constant_index;
4287 LLVMValueRef dynamic_index;
4288 bool image;
4289 bool bindless;
4290 };
4291
4292 static struct sampler_desc_address
4293 get_sampler_desc_internal(struct ac_nir_context *ctx,
4294 nir_deref_instr *deref_instr,
4295 const nir_instr *instr,
4296 bool image)
4297 {
4298 LLVMValueRef index = NULL;
4299 unsigned constant_index = 0;
4300 unsigned descriptor_set;
4301 unsigned base_index;
4302 bool bindless = false;
4303
4304 if (!deref_instr) {
4305 descriptor_set = 0;
4306 if (image) {
4307 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4308 base_index = 0;
4309 bindless = true;
4310 index = get_src(ctx, img_instr->src[0]);
4311 } else {
4312 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4313 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4314 nir_tex_src_sampler_handle);
4315 if (sampSrcIdx != -1) {
4316 base_index = 0;
4317 bindless = true;
4318 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4319 } else {
4320 assert(tex_instr && !image);
4321 base_index = tex_instr->sampler_index;
4322 }
4323 }
4324 } else {
4325 while(deref_instr->deref_type != nir_deref_type_var) {
4326 if (deref_instr->deref_type == nir_deref_type_array) {
4327 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4328 if (!array_size)
4329 array_size = 1;
4330
4331 if (nir_src_is_const(deref_instr->arr.index)) {
4332 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4333 } else {
4334 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4335
4336 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4337 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4338
4339 if (!index)
4340 index = indirect;
4341 else
4342 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4343 }
4344
4345 deref_instr = nir_src_as_deref(deref_instr->parent);
4346 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4347 unsigned sidx = deref_instr->strct.index;
4348 deref_instr = nir_src_as_deref(deref_instr->parent);
4349 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4350 } else {
4351 unreachable("Unsupported deref type");
4352 }
4353 }
4354 descriptor_set = deref_instr->var->data.descriptor_set;
4355
4356 if (deref_instr->var->data.bindless) {
4357 /* For now just assert on unhandled variable types */
4358 assert(deref_instr->var->data.mode == nir_var_uniform);
4359
4360 base_index = deref_instr->var->data.driver_location;
4361 bindless = true;
4362
4363 index = index ? index : ctx->ac.i32_0;
4364 index = get_bindless_index_from_uniform(ctx, base_index,
4365 constant_index, index);
4366 } else
4367 base_index = deref_instr->var->data.binding;
4368 }
4369 return (struct sampler_desc_address) {
4370 .descriptor_set = descriptor_set,
4371 .base_index = base_index,
4372 .constant_index = constant_index,
4373 .dynamic_index = index,
4374 .image = image,
4375 .bindless = bindless,
4376 };
4377 }
4378
4379 /* Extract any possibly divergent index into a separate value that can be fed
4380 * into get_sampler_desc with the same arguments. */
4381 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4382 nir_deref_instr *deref_instr,
4383 const nir_instr *instr,
4384 bool image)
4385 {
4386 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4387 return addr.dynamic_index;
4388 }
4389
4390 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4391 nir_deref_instr *deref_instr,
4392 enum ac_descriptor_type desc_type,
4393 const nir_instr *instr,
4394 LLVMValueRef index,
4395 bool image, bool write)
4396 {
4397 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4398 return ctx->abi->load_sampler_desc(ctx->abi,
4399 addr.descriptor_set,
4400 addr.base_index,
4401 addr.constant_index, index,
4402 desc_type, addr.image, write, addr.bindless);
4403 }
4404
4405 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4406 *
4407 * GFX6-GFX7:
4408 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4409 * filtering manually. The driver sets img7 to a mask clearing
4410 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4411 * s_and_b32 samp0, samp0, img7
4412 *
4413 * GFX8:
4414 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4415 */
4416 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4417 LLVMValueRef res, LLVMValueRef samp)
4418 {
4419 LLVMBuilderRef builder = ctx->ac.builder;
4420 LLVMValueRef img7, samp0;
4421
4422 if (ctx->ac.chip_class >= GFX8)
4423 return samp;
4424
4425 img7 = LLVMBuildExtractElement(builder, res,
4426 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4427 samp0 = LLVMBuildExtractElement(builder, samp,
4428 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4429 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4430 return LLVMBuildInsertElement(builder, samp, samp0,
4431 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4432 }
4433
4434 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4435 nir_tex_instr *instr,
4436 struct waterfall_context *wctx,
4437 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4438 LLVMValueRef *fmask_ptr)
4439 {
4440 nir_deref_instr *texture_deref_instr = NULL;
4441 nir_deref_instr *sampler_deref_instr = NULL;
4442 int plane = -1;
4443
4444 for (unsigned i = 0; i < instr->num_srcs; i++) {
4445 switch (instr->src[i].src_type) {
4446 case nir_tex_src_texture_deref:
4447 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4448 break;
4449 case nir_tex_src_sampler_deref:
4450 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4451 break;
4452 case nir_tex_src_plane:
4453 plane = nir_src_as_int(instr->src[i].src);
4454 break;
4455 default:
4456 break;
4457 }
4458 }
4459
4460 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4461 &instr->instr, false);
4462 if (!sampler_deref_instr)
4463 sampler_deref_instr = texture_deref_instr;
4464
4465 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4466 &instr->instr, false);
4467 if (instr->texture_non_uniform)
4468 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4469
4470 if (instr->sampler_non_uniform)
4471 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4472
4473 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4474
4475 if (plane >= 0) {
4476 assert(instr->op != nir_texop_txf_ms &&
4477 instr->op != nir_texop_samples_identical);
4478 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4479
4480 main_descriptor = AC_DESC_PLANE_0 + plane;
4481 }
4482
4483 if (instr->op == nir_texop_fragment_mask_fetch) {
4484 /* The fragment mask is fetched from the compressed
4485 * multisampled surface.
4486 */
4487 main_descriptor = AC_DESC_FMASK;
4488 }
4489
4490 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4491 texture_dynamic_index, false, false);
4492
4493 if (samp_ptr) {
4494 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4495 sampler_dynamic_index, false, false);
4496 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4497 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4498 }
4499 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4500 instr->op == nir_texop_samples_identical))
4501 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4502 &instr->instr, texture_dynamic_index, false, false);
4503 }
4504
4505 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4506 LLVMValueRef coord)
4507 {
4508 coord = ac_to_float(ctx, coord);
4509 coord = ac_build_round(ctx, coord);
4510 coord = ac_to_integer(ctx, coord);
4511 return coord;
4512 }
4513
4514 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4515 {
4516 LLVMValueRef result = NULL;
4517 struct ac_image_args args = { 0 };
4518 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4519 LLVMValueRef ddx = NULL, ddy = NULL;
4520 unsigned offset_src = 0;
4521 struct waterfall_context wctx[2] = {{{0}}};
4522
4523 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4524
4525 for (unsigned i = 0; i < instr->num_srcs; i++) {
4526 switch (instr->src[i].src_type) {
4527 case nir_tex_src_coord: {
4528 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4529 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4530 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4531 break;
4532 }
4533 case nir_tex_src_projector:
4534 break;
4535 case nir_tex_src_comparator:
4536 if (instr->is_shadow) {
4537 args.compare = get_src(ctx, instr->src[i].src);
4538 args.compare = ac_to_float(&ctx->ac, args.compare);
4539 }
4540 break;
4541 case nir_tex_src_offset:
4542 args.offset = get_src(ctx, instr->src[i].src);
4543 offset_src = i;
4544 break;
4545 case nir_tex_src_bias:
4546 args.bias = get_src(ctx, instr->src[i].src);
4547 break;
4548 case nir_tex_src_lod: {
4549 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4550 args.level_zero = true;
4551 else
4552 args.lod = get_src(ctx, instr->src[i].src);
4553 break;
4554 }
4555 case nir_tex_src_ms_index:
4556 sample_index = get_src(ctx, instr->src[i].src);
4557 break;
4558 case nir_tex_src_ms_mcs:
4559 break;
4560 case nir_tex_src_ddx:
4561 ddx = get_src(ctx, instr->src[i].src);
4562 break;
4563 case nir_tex_src_ddy:
4564 ddy = get_src(ctx, instr->src[i].src);
4565 break;
4566 case nir_tex_src_min_lod:
4567 args.min_lod = get_src(ctx, instr->src[i].src);
4568 break;
4569 case nir_tex_src_texture_offset:
4570 case nir_tex_src_sampler_offset:
4571 case nir_tex_src_plane:
4572 default:
4573 break;
4574 }
4575 }
4576
4577 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4578 result = get_buffer_size(ctx, args.resource, true);
4579 goto write_result;
4580 }
4581
4582 if (instr->op == nir_texop_texture_samples) {
4583 LLVMValueRef res, samples, is_msaa;
4584 LLVMValueRef default_sample;
4585
4586 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4587 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4588 LLVMConstInt(ctx->ac.i32, 3, false), "");
4589 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4590 LLVMConstInt(ctx->ac.i32, 28, false), "");
4591 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4592 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4593 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4594 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4595
4596 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4597 LLVMConstInt(ctx->ac.i32, 16, false), "");
4598 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4599 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4600 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4601 samples, "");
4602
4603 if (ctx->abi->robust_buffer_access) {
4604 LLVMValueRef dword1, is_null_descriptor;
4605
4606 /* Extract the second dword of the descriptor, if it's
4607 * all zero, then it's a null descriptor.
4608 */
4609 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4610 LLVMConstInt(ctx->ac.i32, 1, false), "");
4611 is_null_descriptor =
4612 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4613 LLVMConstInt(ctx->ac.i32, 0, false), "");
4614 default_sample =
4615 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4616 ctx->ac.i32_0, ctx->ac.i32_1, "");
4617 } else {
4618 default_sample = ctx->ac.i32_1;
4619 }
4620
4621 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4622 default_sample, "");
4623 result = samples;
4624 goto write_result;
4625 }
4626
4627 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4628 LLVMValueRef offset[3], pack;
4629 for (unsigned chan = 0; chan < 3; ++chan)
4630 offset[chan] = ctx->ac.i32_0;
4631
4632 unsigned num_components = ac_get_llvm_num_components(args.offset);
4633 for (unsigned chan = 0; chan < num_components; chan++) {
4634 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4635 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4636 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4637 if (chan)
4638 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4639 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4640 }
4641 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4642 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4643 args.offset = pack;
4644 }
4645
4646 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4647 * OpenGL 4.5 spec says:
4648 *
4649 * "If the texture’s internal format indicates a fixed-point
4650 * depth texture, then D_t and D_ref are clamped to the
4651 * range [0, 1]; otherwise no clamping is performed."
4652 *
4653 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4654 * so the depth comparison value isn't clamped for Z16 and
4655 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4656 * an explicitly clamped 32-bit float format.
4657 */
4658 if (args.compare &&
4659 ctx->ac.chip_class >= GFX8 &&
4660 ctx->ac.chip_class <= GFX9 &&
4661 ctx->abi->clamp_shadow_reference) {
4662 LLVMValueRef upgraded, clamped;
4663
4664 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4665 LLVMConstInt(ctx->ac.i32, 3, false), "");
4666 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4667 LLVMConstInt(ctx->ac.i32, 29, false), "");
4668 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4669 clamped = ac_build_clamp(&ctx->ac, args.compare);
4670 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4671 args.compare, "");
4672 }
4673
4674 /* pack derivatives */
4675 if (ddx || ddy) {
4676 int num_src_deriv_channels, num_dest_deriv_channels;
4677 switch (instr->sampler_dim) {
4678 case GLSL_SAMPLER_DIM_3D:
4679 case GLSL_SAMPLER_DIM_CUBE:
4680 num_src_deriv_channels = 3;
4681 num_dest_deriv_channels = 3;
4682 break;
4683 case GLSL_SAMPLER_DIM_2D:
4684 default:
4685 num_src_deriv_channels = 2;
4686 num_dest_deriv_channels = 2;
4687 break;
4688 case GLSL_SAMPLER_DIM_1D:
4689 num_src_deriv_channels = 1;
4690 if (ctx->ac.chip_class == GFX9) {
4691 num_dest_deriv_channels = 2;
4692 } else {
4693 num_dest_deriv_channels = 1;
4694 }
4695 break;
4696 }
4697
4698 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4699 args.derivs[i] = ac_to_float(&ctx->ac,
4700 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4701 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4702 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4703 }
4704 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4705 args.derivs[i] = ctx->ac.f32_0;
4706 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4707 }
4708 }
4709
4710 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4711 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4712 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4713 if (instr->coord_components == 3)
4714 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4715 ac_prepare_cube_coords(&ctx->ac,
4716 instr->op == nir_texop_txd, instr->is_array,
4717 instr->op == nir_texop_lod, args.coords, args.derivs);
4718 }
4719
4720 /* Texture coordinates fixups */
4721 if (instr->coord_components > 1 &&
4722 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4723 instr->is_array &&
4724 instr->op != nir_texop_txf) {
4725 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4726 }
4727
4728 if (instr->coord_components > 2 &&
4729 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4730 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4731 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4732 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4733 instr->is_array &&
4734 instr->op != nir_texop_txf &&
4735 instr->op != nir_texop_txf_ms &&
4736 instr->op != nir_texop_fragment_fetch &&
4737 instr->op != nir_texop_fragment_mask_fetch) {
4738 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4739 }
4740
4741 if (ctx->ac.chip_class == GFX9 &&
4742 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4743 instr->op != nir_texop_lod) {
4744 LLVMValueRef filler;
4745 if (instr->op == nir_texop_txf)
4746 filler = ctx->ac.i32_0;
4747 else
4748 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4749
4750 if (instr->is_array)
4751 args.coords[2] = args.coords[1];
4752 args.coords[1] = filler;
4753 }
4754
4755 /* Pack sample index */
4756 if (sample_index && (instr->op == nir_texop_txf_ms ||
4757 instr->op == nir_texop_fragment_fetch))
4758 args.coords[instr->coord_components] = sample_index;
4759
4760 if (instr->op == nir_texop_samples_identical) {
4761 struct ac_image_args txf_args = { 0 };
4762 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4763
4764 txf_args.dmask = 0xf;
4765 txf_args.resource = fmask_ptr;
4766 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4767 result = build_tex_intrinsic(ctx, instr, &txf_args);
4768
4769 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4770 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4771 goto write_result;
4772 }
4773
4774 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4775 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4776 instr->op != nir_texop_txs &&
4777 instr->op != nir_texop_fragment_fetch &&
4778 instr->op != nir_texop_fragment_mask_fetch) {
4779 unsigned sample_chan = instr->is_array ? 3 : 2;
4780 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4781 &ctx->ac, args.coords[0], args.coords[1],
4782 instr->is_array ? args.coords[2] : NULL,
4783 args.coords[sample_chan], fmask_ptr);
4784 }
4785
4786 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4787 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4788 num_offsets = MIN2(num_offsets, instr->coord_components);
4789 for (unsigned i = 0; i < num_offsets; ++i) {
4790 args.coords[i] = LLVMBuildAdd(
4791 ctx->ac.builder, args.coords[i],
4792 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4793 }
4794 args.offset = NULL;
4795 }
4796
4797 /* DMASK was repurposed for GATHER4. 4 components are always
4798 * returned and DMASK works like a swizzle - it selects
4799 * the component to fetch. The only valid DMASK values are
4800 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4801 * (red,red,red,red) etc.) The ISA document doesn't mention
4802 * this.
4803 */
4804 args.dmask = 0xf;
4805 if (instr->op == nir_texop_tg4) {
4806 if (instr->is_shadow)
4807 args.dmask = 1;
4808 else
4809 args.dmask = 1 << instr->component;
4810 }
4811
4812 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4813 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4814 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4815 }
4816
4817 /* Adjust the number of coordinates because we only need (x,y) for 2D
4818 * multisampled images and (x,y,layer) for 2D multisampled layered
4819 * images or for multisampled input attachments.
4820 */
4821 if (instr->op == nir_texop_fragment_mask_fetch) {
4822 if (args.dim == ac_image_2dmsaa) {
4823 args.dim = ac_image_2d;
4824 } else {
4825 assert(args.dim == ac_image_2darraymsaa);
4826 args.dim = ac_image_2darray;
4827 }
4828 }
4829
4830 assert(instr->dest.is_ssa);
4831 args.d16 = instr->dest.ssa.bit_size == 16;
4832
4833 result = build_tex_intrinsic(ctx, instr, &args);
4834
4835 if (instr->op == nir_texop_query_levels)
4836 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4837 else if (instr->is_shadow && instr->is_new_style_shadow &&
4838 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4839 instr->op != nir_texop_tg4)
4840 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4841 else if (instr->op == nir_texop_txs &&
4842 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4843 instr->is_array) {
4844 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4845 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4846 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4847 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4848 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4849 } else if (ctx->ac.chip_class == GFX9 &&
4850 instr->op == nir_texop_txs &&
4851 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4852 instr->is_array) {
4853 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4854 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4855 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4856 ctx->ac.i32_1, "");
4857 } else if (instr->dest.ssa.num_components != 4)
4858 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4859
4860 write_result:
4861 if (result) {
4862 assert(instr->dest.is_ssa);
4863 result = ac_to_integer(&ctx->ac, result);
4864
4865 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4866 result = exit_waterfall(ctx, wctx + i, result);
4867 }
4868
4869 ctx->ssa_defs[instr->dest.ssa.index] = result;
4870 }
4871 }
4872
4873 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4874 {
4875 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4876 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4877
4878 ctx->ssa_defs[instr->dest.ssa.index] = result;
4879 _mesa_hash_table_insert(ctx->phis, instr, result);
4880 }
4881
4882 static void visit_post_phi(struct ac_nir_context *ctx,
4883 nir_phi_instr *instr,
4884 LLVMValueRef llvm_phi)
4885 {
4886 nir_foreach_phi_src(src, instr) {
4887 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4888 LLVMValueRef llvm_src = get_src(ctx, src->src);
4889
4890 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4891 }
4892 }
4893
4894 static void phi_post_pass(struct ac_nir_context *ctx)
4895 {
4896 hash_table_foreach(ctx->phis, entry) {
4897 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4898 (LLVMValueRef)entry->data);
4899 }
4900 }
4901
4902
4903 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4904 nir_foreach_use(use_src, def) {
4905 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4906 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
4907 if (instr->intrinsic == nir_intrinsic_store_deref)
4908 return true;
4909 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
4910 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
4911 if (instr->op == nir_op_vec4 &&
4912 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
4913 return true;
4914 }
4915 }
4916 }
4917 return false;
4918 }
4919
4920 static void visit_ssa_undef(struct ac_nir_context *ctx,
4921 const nir_ssa_undef_instr *instr)
4922 {
4923 unsigned num_components = instr->def.num_components;
4924 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4925
4926 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
4927 LLVMValueRef undef;
4928
4929 if (num_components == 1)
4930 undef = LLVMGetUndef(type);
4931 else {
4932 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4933 }
4934 ctx->ssa_defs[instr->def.index] = undef;
4935 } else {
4936 LLVMValueRef zero = LLVMConstInt(type, 0, false);
4937 if (num_components > 1) {
4938 zero = ac_build_gather_values_extended(
4939 &ctx->ac, &zero, 4, 0, false, false);
4940 }
4941 ctx->ssa_defs[instr->def.index] = zero;
4942 }
4943 }
4944
4945 static void visit_jump(struct ac_llvm_context *ctx,
4946 const nir_jump_instr *instr)
4947 {
4948 switch (instr->type) {
4949 case nir_jump_break:
4950 ac_build_break(ctx);
4951 break;
4952 case nir_jump_continue:
4953 ac_build_continue(ctx);
4954 break;
4955 default:
4956 fprintf(stderr, "Unknown NIR jump instr: ");
4957 nir_print_instr(&instr->instr, stderr);
4958 fprintf(stderr, "\n");
4959 abort();
4960 }
4961 }
4962
4963 static LLVMTypeRef
4964 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4965 enum glsl_base_type type)
4966 {
4967 switch (type) {
4968 case GLSL_TYPE_INT:
4969 case GLSL_TYPE_UINT:
4970 case GLSL_TYPE_BOOL:
4971 case GLSL_TYPE_SUBROUTINE:
4972 return ac->i32;
4973 case GLSL_TYPE_INT8:
4974 case GLSL_TYPE_UINT8:
4975 return ac->i8;
4976 case GLSL_TYPE_INT16:
4977 case GLSL_TYPE_UINT16:
4978 return ac->i16;
4979 case GLSL_TYPE_FLOAT:
4980 return ac->f32;
4981 case GLSL_TYPE_FLOAT16:
4982 return ac->f16;
4983 case GLSL_TYPE_INT64:
4984 case GLSL_TYPE_UINT64:
4985 return ac->i64;
4986 case GLSL_TYPE_DOUBLE:
4987 return ac->f64;
4988 default:
4989 unreachable("unknown GLSL type");
4990 }
4991 }
4992
4993 static LLVMTypeRef
4994 glsl_to_llvm_type(struct ac_llvm_context *ac,
4995 const struct glsl_type *type)
4996 {
4997 if (glsl_type_is_scalar(type)) {
4998 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4999 }
5000
5001 if (glsl_type_is_vector(type)) {
5002 return LLVMVectorType(
5003 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
5004 glsl_get_vector_elements(type));
5005 }
5006
5007 if (glsl_type_is_matrix(type)) {
5008 return LLVMArrayType(
5009 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
5010 glsl_get_matrix_columns(type));
5011 }
5012
5013 if (glsl_type_is_array(type)) {
5014 return LLVMArrayType(
5015 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
5016 glsl_get_length(type));
5017 }
5018
5019 assert(glsl_type_is_struct_or_ifc(type));
5020
5021 LLVMTypeRef member_types[glsl_get_length(type)];
5022
5023 for (unsigned i = 0; i < glsl_get_length(type); i++) {
5024 member_types[i] =
5025 glsl_to_llvm_type(ac,
5026 glsl_get_struct_field(type, i));
5027 }
5028
5029 return LLVMStructTypeInContext(ac->context, member_types,
5030 glsl_get_length(type), false);
5031 }
5032
5033 static void visit_deref(struct ac_nir_context *ctx,
5034 nir_deref_instr *instr)
5035 {
5036 if (instr->mode != nir_var_mem_shared &&
5037 instr->mode != nir_var_mem_global)
5038 return;
5039
5040 LLVMValueRef result = NULL;
5041 switch(instr->deref_type) {
5042 case nir_deref_type_var: {
5043 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
5044 result = entry->data;
5045 break;
5046 }
5047 case nir_deref_type_struct:
5048 if (instr->mode == nir_var_mem_global) {
5049 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5050 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5051 instr->strct.index);
5052 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5053 LLVMConstInt(ctx->ac.i32, offset, 0));
5054 } else {
5055 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5056 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5057 }
5058 break;
5059 case nir_deref_type_array:
5060 if (instr->mode == nir_var_mem_global) {
5061 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5062 unsigned stride = glsl_get_explicit_stride(parent->type);
5063
5064 if ((glsl_type_is_matrix(parent->type) &&
5065 glsl_matrix_type_is_row_major(parent->type)) ||
5066 (glsl_type_is_vector(parent->type) && stride == 0))
5067 stride = type_scalar_size_bytes(parent->type);
5068
5069 assert(stride > 0);
5070 LLVMValueRef index = get_src(ctx, instr->arr.index);
5071 if (LLVMTypeOf(index) != ctx->ac.i64)
5072 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5073
5074 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5075
5076 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5077 } else {
5078 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5079 get_src(ctx, instr->arr.index));
5080 }
5081 break;
5082 case nir_deref_type_ptr_as_array:
5083 if (instr->mode == nir_var_mem_global) {
5084 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
5085
5086 LLVMValueRef index = get_src(ctx, instr->arr.index);
5087 if (LLVMTypeOf(index) != ctx->ac.i64)
5088 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5089
5090 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5091
5092 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5093 } else {
5094 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5095 get_src(ctx, instr->arr.index));
5096 }
5097 break;
5098 case nir_deref_type_cast: {
5099 result = get_src(ctx, instr->parent);
5100
5101 /* We can't use the structs from LLVM because the shader
5102 * specifies its own offsets. */
5103 LLVMTypeRef pointee_type = ctx->ac.i8;
5104 if (instr->mode == nir_var_mem_shared)
5105 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5106
5107 unsigned address_space;
5108
5109 switch(instr->mode) {
5110 case nir_var_mem_shared:
5111 address_space = AC_ADDR_SPACE_LDS;
5112 break;
5113 case nir_var_mem_global:
5114 address_space = AC_ADDR_SPACE_GLOBAL;
5115 break;
5116 default:
5117 unreachable("Unhandled address space");
5118 }
5119
5120 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5121
5122 if (LLVMTypeOf(result) != type) {
5123 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5124 result = LLVMBuildBitCast(ctx->ac.builder, result,
5125 type, "");
5126 } else {
5127 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5128 type, "");
5129 }
5130 }
5131 break;
5132 }
5133 default:
5134 unreachable("Unhandled deref_instr deref type");
5135 }
5136
5137 ctx->ssa_defs[instr->dest.ssa.index] = result;
5138 }
5139
5140 static void visit_cf_list(struct ac_nir_context *ctx,
5141 struct exec_list *list);
5142
5143 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5144 {
5145 nir_foreach_instr(instr, block)
5146 {
5147 switch (instr->type) {
5148 case nir_instr_type_alu:
5149 visit_alu(ctx, nir_instr_as_alu(instr));
5150 break;
5151 case nir_instr_type_load_const:
5152 visit_load_const(ctx, nir_instr_as_load_const(instr));
5153 break;
5154 case nir_instr_type_intrinsic:
5155 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5156 break;
5157 case nir_instr_type_tex:
5158 visit_tex(ctx, nir_instr_as_tex(instr));
5159 break;
5160 case nir_instr_type_phi:
5161 visit_phi(ctx, nir_instr_as_phi(instr));
5162 break;
5163 case nir_instr_type_ssa_undef:
5164 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5165 break;
5166 case nir_instr_type_jump:
5167 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5168 break;
5169 case nir_instr_type_deref:
5170 visit_deref(ctx, nir_instr_as_deref(instr));
5171 break;
5172 default:
5173 fprintf(stderr, "Unknown NIR instr type: ");
5174 nir_print_instr(instr, stderr);
5175 fprintf(stderr, "\n");
5176 abort();
5177 }
5178 }
5179
5180 _mesa_hash_table_insert(ctx->defs, block,
5181 LLVMGetInsertBlock(ctx->ac.builder));
5182 }
5183
5184 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5185 {
5186 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5187
5188 nir_block *then_block =
5189 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5190
5191 ac_build_uif(&ctx->ac, value, then_block->index);
5192
5193 visit_cf_list(ctx, &if_stmt->then_list);
5194
5195 if (!exec_list_is_empty(&if_stmt->else_list)) {
5196 nir_block *else_block =
5197 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5198
5199 ac_build_else(&ctx->ac, else_block->index);
5200 visit_cf_list(ctx, &if_stmt->else_list);
5201 }
5202
5203 ac_build_endif(&ctx->ac, then_block->index);
5204 }
5205
5206 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5207 {
5208 nir_block *first_loop_block =
5209 (nir_block *) exec_list_get_head(&loop->body);
5210
5211 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5212
5213 visit_cf_list(ctx, &loop->body);
5214
5215 ac_build_endloop(&ctx->ac, first_loop_block->index);
5216 }
5217
5218 static void visit_cf_list(struct ac_nir_context *ctx,
5219 struct exec_list *list)
5220 {
5221 foreach_list_typed(nir_cf_node, node, node, list)
5222 {
5223 switch (node->type) {
5224 case nir_cf_node_block:
5225 visit_block(ctx, nir_cf_node_as_block(node));
5226 break;
5227
5228 case nir_cf_node_if:
5229 visit_if(ctx, nir_cf_node_as_if(node));
5230 break;
5231
5232 case nir_cf_node_loop:
5233 visit_loop(ctx, nir_cf_node_as_loop(node));
5234 break;
5235
5236 default:
5237 assert(0);
5238 }
5239 }
5240 }
5241
5242 void
5243 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5244 struct ac_shader_abi *abi,
5245 struct nir_shader *nir,
5246 struct nir_variable *variable,
5247 gl_shader_stage stage)
5248 {
5249 unsigned output_loc = variable->data.driver_location / 4;
5250 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5251
5252 /* tess ctrl has it's own load/store paths for outputs */
5253 if (stage == MESA_SHADER_TESS_CTRL)
5254 return;
5255
5256 if (stage == MESA_SHADER_VERTEX ||
5257 stage == MESA_SHADER_TESS_EVAL ||
5258 stage == MESA_SHADER_GEOMETRY) {
5259 int idx = variable->data.location + variable->data.index;
5260 if (idx == VARYING_SLOT_CLIP_DIST0) {
5261 int length = nir->info.clip_distance_array_size +
5262 nir->info.cull_distance_array_size;
5263
5264 if (length > 4)
5265 attrib_count = 2;
5266 else
5267 attrib_count = 1;
5268 }
5269 }
5270
5271 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5272 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5273 for (unsigned i = 0; i < attrib_count; ++i) {
5274 for (unsigned chan = 0; chan < 4; chan++) {
5275 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5276 ac_build_alloca_undef(ctx, type, "");
5277 }
5278 }
5279 }
5280
5281 static void
5282 setup_locals(struct ac_nir_context *ctx,
5283 struct nir_function *func)
5284 {
5285 int i, j;
5286 ctx->num_locals = 0;
5287 nir_foreach_function_temp_variable(variable, func->impl) {
5288 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5289 variable->data.driver_location = ctx->num_locals * 4;
5290 variable->data.location_frac = 0;
5291 ctx->num_locals += attrib_count;
5292 }
5293 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5294 if (!ctx->locals)
5295 return;
5296
5297 for (i = 0; i < ctx->num_locals; i++) {
5298 for (j = 0; j < 4; j++) {
5299 ctx->locals[i * 4 + j] =
5300 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5301 }
5302 }
5303 }
5304
5305 static void
5306 setup_scratch(struct ac_nir_context *ctx,
5307 struct nir_shader *shader)
5308 {
5309 if (shader->scratch_size == 0)
5310 return;
5311
5312 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5313 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5314 "scratch");
5315 }
5316
5317 static void
5318 setup_constant_data(struct ac_nir_context *ctx,
5319 struct nir_shader *shader)
5320 {
5321 if (!shader->constant_data)
5322 return;
5323
5324 LLVMValueRef data =
5325 LLVMConstStringInContext(ctx->ac.context,
5326 shader->constant_data,
5327 shader->constant_data_size,
5328 true);
5329 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5330
5331 /* We want to put the constant data in the CONST address space so that
5332 * we can use scalar loads. However, LLVM versions before 10 put these
5333 * variables in the same section as the code, which is unacceptable
5334 * for RadeonSI as it needs to relocate all the data sections after
5335 * the code sections. See https://reviews.llvm.org/D65813.
5336 */
5337 unsigned address_space =
5338 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5339
5340 LLVMValueRef global =
5341 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5342 "const_data",
5343 address_space);
5344
5345 LLVMSetInitializer(global, data);
5346 LLVMSetGlobalConstant(global, true);
5347 LLVMSetVisibility(global, LLVMHiddenVisibility);
5348 ctx->constant_data = global;
5349 }
5350
5351 static void
5352 setup_shared(struct ac_nir_context *ctx,
5353 struct nir_shader *nir)
5354 {
5355 if (ctx->ac.lds)
5356 return;
5357
5358 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5359 nir->info.cs.shared_size);
5360
5361 LLVMValueRef lds =
5362 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5363 "compute_lds",
5364 AC_ADDR_SPACE_LDS);
5365 LLVMSetAlignment(lds, 64 * 1024);
5366
5367 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5368 LLVMPointerType(ctx->ac.i8,
5369 AC_ADDR_SPACE_LDS), "");
5370 }
5371
5372 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5373 const struct ac_shader_args *args, struct nir_shader *nir)
5374 {
5375 struct ac_nir_context ctx = {};
5376 struct nir_function *func;
5377
5378 ctx.ac = *ac;
5379 ctx.abi = abi;
5380 ctx.args = args;
5381
5382 ctx.stage = nir->info.stage;
5383 ctx.info = &nir->info;
5384
5385 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5386
5387 nir_foreach_shader_out_variable(variable, nir)
5388 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5389 ctx.stage);
5390
5391 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5392 _mesa_key_pointer_equal);
5393 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5394 _mesa_key_pointer_equal);
5395 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5396 _mesa_key_pointer_equal);
5397
5398 if (ctx.abi->kill_ps_if_inf_interp)
5399 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5400 _mesa_key_pointer_equal);
5401
5402 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5403
5404 nir_index_ssa_defs(func->impl);
5405 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5406
5407 setup_locals(&ctx, func);
5408 setup_scratch(&ctx, nir);
5409 setup_constant_data(&ctx, nir);
5410
5411 if (gl_shader_stage_is_compute(nir->info.stage))
5412 setup_shared(&ctx, nir);
5413
5414 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5415 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5416 /* true = don't kill. */
5417 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5418 }
5419
5420 visit_cf_list(&ctx, &func->impl->body);
5421 phi_post_pass(&ctx);
5422
5423 if (ctx.ac.postponed_kill)
5424 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5425 ctx.ac.postponed_kill, ""));
5426
5427 if (!gl_shader_stage_is_compute(nir->info.stage))
5428 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5429 ctx.abi->outputs);
5430
5431 free(ctx.locals);
5432 free(ctx.ssa_defs);
5433 ralloc_free(ctx.defs);
5434 ralloc_free(ctx.phis);
5435 ralloc_free(ctx.vars);
5436 if (ctx.abi->kill_ps_if_inf_interp)
5437 ralloc_free(ctx.verified_interp);
5438 }
5439
5440 bool
5441 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5442 {
5443 bool progress = false;
5444
5445 /* Lower large variables to scratch first so that we won't bloat the
5446 * shader by generating large if ladders for them. We later lower
5447 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5448 */
5449 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5450 nir_var_function_temp,
5451 256,
5452 glsl_get_natural_size_align_bytes);
5453
5454 /* While it would be nice not to have this flag, we are constrained
5455 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5456 */
5457 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5458
5459 /* TODO: Indirect indexing of GS inputs is unimplemented.
5460 *
5461 * TCS and TES load inputs directly from LDS or offchip memory, so
5462 * indirect indexing is trivial.
5463 */
5464 nir_variable_mode indirect_mask = 0;
5465 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5466 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5467 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5468 !llvm_has_working_vgpr_indexing)) {
5469 indirect_mask |= nir_var_shader_in;
5470 }
5471 if (!llvm_has_working_vgpr_indexing &&
5472 nir->info.stage != MESA_SHADER_TESS_CTRL)
5473 indirect_mask |= nir_var_shader_out;
5474
5475 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5476 * smart enough to handle indirects without causing excess spilling
5477 * causing the gpu to hang.
5478 *
5479 * See the following thread for more details of the problem:
5480 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5481 */
5482 indirect_mask |= nir_var_function_temp;
5483
5484 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5485 return progress;
5486 }
5487
5488 static unsigned
5489 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5490 {
5491 if (intrin->intrinsic != nir_intrinsic_store_deref)
5492 return 0;
5493
5494 nir_variable *var =
5495 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5496
5497 if (var->data.mode != nir_var_shader_out)
5498 return 0;
5499
5500 unsigned writemask = 0;
5501 const int location = var->data.location;
5502 unsigned first_component = var->data.location_frac;
5503 unsigned num_comps = intrin->dest.ssa.num_components;
5504
5505 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5506 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5507 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5508 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5509
5510 return writemask;
5511 }
5512
5513 static void
5514 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5515 unsigned *cond_block_tf_writemask,
5516 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5517 {
5518 switch (cf_node->type) {
5519 case nir_cf_node_block: {
5520 nir_block *block = nir_cf_node_as_block(cf_node);
5521 nir_foreach_instr(instr, block) {
5522 if (instr->type != nir_instr_type_intrinsic)
5523 continue;
5524
5525 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5526 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5527
5528 /* If we find a barrier in nested control flow put this in the
5529 * too hard basket. In GLSL this is not possible but it is in
5530 * SPIR-V.
5531 */
5532 if (is_nested_cf) {
5533 *tessfactors_are_def_in_all_invocs = false;
5534 return;
5535 }
5536
5537 /* The following case must be prevented:
5538 * gl_TessLevelInner = ...;
5539 * barrier();
5540 * if (gl_InvocationID == 1)
5541 * gl_TessLevelInner = ...;
5542 *
5543 * If you consider disjoint code segments separated by barriers, each
5544 * such segment that writes tess factor channels should write the same
5545 * channels in all codepaths within that segment.
5546 */
5547 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5548 /* Accumulate the result: */
5549 *tessfactors_are_def_in_all_invocs &=
5550 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5551
5552 /* Analyze the next code segment from scratch. */
5553 *upper_block_tf_writemask = 0;
5554 *cond_block_tf_writemask = 0;
5555 }
5556 } else
5557 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5558 }
5559
5560 break;
5561 }
5562 case nir_cf_node_if: {
5563 unsigned then_tessfactor_writemask = 0;
5564 unsigned else_tessfactor_writemask = 0;
5565
5566 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5567 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5568 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5569 cond_block_tf_writemask,
5570 tessfactors_are_def_in_all_invocs, true);
5571 }
5572
5573 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5574 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5575 cond_block_tf_writemask,
5576 tessfactors_are_def_in_all_invocs, true);
5577 }
5578
5579 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5580 /* If both statements write the same tess factor channels,
5581 * we can say that the upper block writes them too.
5582 */
5583 *upper_block_tf_writemask |= then_tessfactor_writemask &
5584 else_tessfactor_writemask;
5585 *cond_block_tf_writemask |= then_tessfactor_writemask |
5586 else_tessfactor_writemask;
5587 }
5588
5589 break;
5590 }
5591 case nir_cf_node_loop: {
5592 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5593 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5594 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5595 cond_block_tf_writemask,
5596 tessfactors_are_def_in_all_invocs, true);
5597 }
5598
5599 break;
5600 }
5601 default:
5602 unreachable("unknown cf node type");
5603 }
5604 }
5605
5606 bool
5607 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5608 {
5609 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5610
5611 /* The pass works as follows:
5612 * If all codepaths write tess factors, we can say that all
5613 * invocations define tess factors.
5614 *
5615 * Each tess factor channel is tracked separately.
5616 */
5617 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5618 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5619
5620 /* Initial value = true. Here the pass will accumulate results from
5621 * multiple segments surrounded by barriers. If tess factors aren't
5622 * written at all, it's a shader bug and we don't care if this will be
5623 * true.
5624 */
5625 bool tessfactors_are_def_in_all_invocs = true;
5626
5627 nir_foreach_function(function, nir) {
5628 if (function->impl) {
5629 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5630 scan_tess_ctrl(node, &main_block_tf_writemask,
5631 &cond_block_tf_writemask,
5632 &tessfactors_are_def_in_all_invocs,
5633 false);
5634 }
5635 }
5636 }
5637
5638 /* Accumulate the result for the last code segment separated by a
5639 * barrier.
5640 */
5641 if (main_block_tf_writemask || cond_block_tf_writemask) {
5642 tessfactors_are_def_in_all_invocs &=
5643 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5644 }
5645
5646 return tessfactors_are_def_in_all_invocs;
5647 }