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[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0, LLVMValueRef src1)
223 {
224 char name[64], type[64];
225 LLVMValueRef params[] = {
226 ac_to_float(ctx, src0),
227 ac_to_float(ctx, src1),
228 };
229
230 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
231 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
237 const char *intrin,
238 LLVMTypeRef result_type,
239 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
240 {
241 char name[64], type[64];
242 LLVMValueRef params[] = {
243 ac_to_float(ctx, src0),
244 ac_to_float(ctx, src1),
245 ac_to_float(ctx, src2),
246 };
247
248 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
249 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
250 assert(length < sizeof(name));
251 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
252 }
253
254 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
255 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
256 {
257 LLVMTypeRef src1_type = LLVMTypeOf(src1);
258 LLVMTypeRef src2_type = LLVMTypeOf(src2);
259
260 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
261
262 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
263 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
264 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
265 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
266 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
267 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
268 }
269
270 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
271 ctx->i32_0, "");
272 return LLVMBuildSelect(ctx->builder, v,
273 ac_to_integer_or_pointer(ctx, src1),
274 ac_to_integer_or_pointer(ctx, src2), "");
275 }
276
277 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
278 LLVMValueRef src0)
279 {
280 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
281 }
282
283 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
284 const char *intrin,
285 LLVMValueRef src0, LLVMValueRef src1)
286 {
287 LLVMTypeRef ret_type;
288 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
289 LLVMValueRef res;
290 LLVMValueRef params[] = { src0, src1 };
291 ret_type = LLVMStructTypeInContext(ctx->context, types,
292 2, true);
293
294 res = ac_build_intrinsic(ctx, intrin, ret_type,
295 params, 2, AC_FUNC_ATTR_READNONE);
296
297 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
298 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
299 return res;
300 }
301
302 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
303 LLVMValueRef src0,
304 unsigned bitsize)
305 {
306 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
307 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
308 "");
309 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
310
311 switch (bitsize) {
312 case 16:
313 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
314 case 32:
315 return result;
316 case 64:
317 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
318 default:
319 unreachable("Unsupported bit size.");
320 }
321 }
322
323 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
324 LLVMValueRef src0)
325 {
326 src0 = ac_to_float(ctx, src0);
327 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
328 return LLVMBuildSExt(ctx->builder,
329 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
330 ctx->i32, "");
331 }
332
333 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
334 LLVMValueRef src0,
335 unsigned bitsize)
336 {
337 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
338
339 switch (bitsize) {
340 case 8:
341 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
342 case 16:
343 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
344 case 32:
345 return result;
346 case 64:
347 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
348 default:
349 unreachable("Unsupported bit size.");
350 }
351 }
352
353 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
354 LLVMValueRef src0)
355 {
356 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
357 return LLVMBuildSExt(ctx->builder,
358 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
359 ctx->i32, "");
360 }
361
362 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
363 LLVMValueRef src0)
364 {
365 LLVMValueRef result;
366 LLVMValueRef cond = NULL;
367
368 src0 = ac_to_float(ctx, src0);
369 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
370
371 if (ctx->chip_class >= GFX8) {
372 LLVMValueRef args[2];
373 /* Check if the result is a denormal - and flush to 0 if so. */
374 args[0] = result;
375 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
376 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
377 }
378
379 /* need to convert back up to f32 */
380 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
381
382 if (ctx->chip_class >= GFX8)
383 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
384 else {
385 /* for GFX6-GFX7 */
386 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
387 * so compare the result and flush to 0 if it's smaller.
388 */
389 LLVMValueRef temp, cond2;
390 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
391 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
392 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
393 temp, "");
394 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
395 temp, ctx->f32_0, "");
396 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
397 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
398 }
399 return result;
400 }
401
402 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
403 LLVMValueRef src0, LLVMValueRef src1)
404 {
405 LLVMValueRef dst64, result;
406 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
407 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
408
409 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
410 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
411 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
412 return result;
413 }
414
415 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
416 LLVMValueRef src0, LLVMValueRef src1)
417 {
418 LLVMValueRef dst64, result;
419 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
420 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
421
422 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
423 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
424 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
425 return result;
426 }
427
428 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
429 LLVMValueRef bits, LLVMValueRef offset)
430 {
431 /* mask = ((1 << bits) - 1) << offset */
432 return LLVMBuildShl(ctx->builder,
433 LLVMBuildSub(ctx->builder,
434 LLVMBuildShl(ctx->builder,
435 ctx->i32_1,
436 bits, ""),
437 ctx->i32_1, ""),
438 offset, "");
439 }
440
441 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
442 LLVMValueRef mask, LLVMValueRef insert,
443 LLVMValueRef base)
444 {
445 /* Calculate:
446 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
447 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
448 */
449 return LLVMBuildXor(ctx->builder, base,
450 LLVMBuildAnd(ctx->builder, mask,
451 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
452 }
453
454 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
455 LLVMValueRef src0,
456 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
457 LLVMValueRef args[2]))
458 {
459 LLVMValueRef comp[2];
460
461 src0 = ac_to_float(ctx, src0);
462 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
463 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
464
465 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
466 }
467
468 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
469 LLVMValueRef src0)
470 {
471 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
472 LLVMValueRef temps[2], val;
473 int i;
474
475 for (i = 0; i < 2; i++) {
476 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
477 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
478 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
479 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
480 }
481 return ac_build_gather_values(ctx, temps, 2);
482 }
483
484 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
485 nir_op op,
486 LLVMValueRef src0)
487 {
488 unsigned mask;
489 int idx;
490 LLVMValueRef result;
491
492 if (op == nir_op_fddx_fine)
493 mask = AC_TID_MASK_LEFT;
494 else if (op == nir_op_fddy_fine)
495 mask = AC_TID_MASK_TOP;
496 else
497 mask = AC_TID_MASK_TOP_LEFT;
498
499 /* for DDX we want to next X pixel, DDY next Y pixel. */
500 if (op == nir_op_fddx_fine ||
501 op == nir_op_fddx_coarse ||
502 op == nir_op_fddx)
503 idx = 1;
504 else
505 idx = 2;
506
507 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
508 return result;
509 }
510
511 struct waterfall_context {
512 LLVMBasicBlockRef phi_bb[2];
513 bool use_waterfall;
514 };
515
516 /* To deal with divergent descriptors we can create a loop that handles all
517 * lanes with the same descriptor on a given iteration (henceforth a
518 * waterfall loop).
519 *
520 * These helper create the begin and end of the loop leaving the caller
521 * to implement the body.
522 *
523 * params:
524 * - ctx is the usal nir context
525 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
526 * - value is the possibly divergent value for which we built the loop
527 * - divergent is whether value is actually divergent. If false we just pass
528 * things through.
529 */
530 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
531 struct waterfall_context *wctx,
532 LLVMValueRef value, bool divergent)
533 {
534 /* If the app claims the value is divergent but it is constant we can
535 * end up with a dynamic index of NULL. */
536 if (!value)
537 divergent = false;
538
539 wctx->use_waterfall = divergent;
540 if (!divergent)
541 return value;
542
543 ac_build_bgnloop(&ctx->ac, 6000);
544
545 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
546
547 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
548 scalar_value, "uniform_active");
549
550 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
551 ac_build_ifcc(&ctx->ac, active, 6001);
552
553 return scalar_value;
554 }
555
556 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
557 struct waterfall_context *wctx,
558 LLVMValueRef value)
559 {
560 LLVMValueRef ret = NULL;
561 LLVMValueRef phi_src[2];
562 LLVMValueRef cc_phi_src[2] = {
563 LLVMConstInt(ctx->ac.i32, 0, false),
564 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
565 };
566
567 if (!wctx->use_waterfall)
568 return value;
569
570 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
571
572 ac_build_endif(&ctx->ac, 6001);
573
574 if (value) {
575 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
576 phi_src[1] = value;
577
578 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
579 }
580
581 /*
582 * By using the optimization barrier on the exit decision, we decouple
583 * the operations from the break, and hence avoid LLVM hoisting the
584 * opteration into the break block.
585 */
586 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
587 ac_build_optimization_barrier(&ctx->ac, &cc);
588
589 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
590 ac_build_ifcc(&ctx->ac, active, 6002);
591 ac_build_break(&ctx->ac);
592 ac_build_endif(&ctx->ac, 6002);
593
594 ac_build_endloop(&ctx->ac, 6000);
595 return ret;
596 }
597
598 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
599 {
600 LLVMValueRef src[4], result = NULL;
601 unsigned num_components = instr->dest.dest.ssa.num_components;
602 unsigned src_components;
603 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
604 bool saved_inexact = false;
605
606 if (instr->exact)
607 saved_inexact = ac_disable_inexact_math(ctx->ac.builder);
608
609 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
610 switch (instr->op) {
611 case nir_op_vec2:
612 case nir_op_vec3:
613 case nir_op_vec4:
614 src_components = 1;
615 break;
616 case nir_op_pack_half_2x16:
617 case nir_op_pack_snorm_2x16:
618 case nir_op_pack_unorm_2x16:
619 src_components = 2;
620 break;
621 case nir_op_unpack_half_2x16:
622 src_components = 1;
623 break;
624 case nir_op_cube_face_coord:
625 case nir_op_cube_face_index:
626 src_components = 3;
627 break;
628 default:
629 src_components = num_components;
630 break;
631 }
632 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
633 src[i] = get_alu_src(ctx, instr->src[i], src_components);
634
635 switch (instr->op) {
636 case nir_op_mov:
637 result = src[0];
638 break;
639 case nir_op_fneg:
640 src[0] = ac_to_float(&ctx->ac, src[0]);
641 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
642 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
643 /* fneg will be optimized by backend compiler with sign
644 * bit removed via XOR. This is probably a LLVM bug.
645 */
646 result = ac_build_canonicalize(&ctx->ac, result,
647 instr->dest.dest.ssa.bit_size);
648 }
649 break;
650 case nir_op_ineg:
651 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
652 break;
653 case nir_op_inot:
654 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
655 break;
656 case nir_op_iadd:
657 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
658 break;
659 case nir_op_fadd:
660 src[0] = ac_to_float(&ctx->ac, src[0]);
661 src[1] = ac_to_float(&ctx->ac, src[1]);
662 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_fsub:
665 src[0] = ac_to_float(&ctx->ac, src[0]);
666 src[1] = ac_to_float(&ctx->ac, src[1]);
667 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
668 break;
669 case nir_op_isub:
670 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_imul:
673 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
674 break;
675 case nir_op_imod:
676 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
677 break;
678 case nir_op_umod:
679 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
680 break;
681 case nir_op_fmod:
682 /* lower_fmod only lower 16-bit and 32-bit fmod */
683 assert(instr->dest.dest.ssa.bit_size == 64);
684 src[0] = ac_to_float(&ctx->ac, src[0]);
685 src[1] = ac_to_float(&ctx->ac, src[1]);
686 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
687 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
688 ac_to_float_type(&ctx->ac, def_type), result);
689 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
690 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
691 break;
692 case nir_op_irem:
693 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_idiv:
696 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
697 break;
698 case nir_op_udiv:
699 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
700 break;
701 case nir_op_fmul:
702 src[0] = ac_to_float(&ctx->ac, src[0]);
703 src[1] = ac_to_float(&ctx->ac, src[1]);
704 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
705 break;
706 case nir_op_frcp:
707 /* For doubles, we need precise division to pass GLCTS. */
708 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
709 ac_get_type_size(def_type) == 8) {
710 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
711 ac_to_float(&ctx->ac, src[0]), "");
712 } else {
713 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
714 ac_to_float_type(&ctx->ac, def_type), src[0]);
715 }
716 if (ctx->abi->clamp_div_by_zero)
717 result = ac_build_fmin(&ctx->ac, result,
718 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
719 break;
720 case nir_op_iand:
721 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
722 break;
723 case nir_op_ior:
724 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
725 break;
726 case nir_op_ixor:
727 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
728 break;
729 case nir_op_ishl:
730 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
731 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
732 LLVMTypeOf(src[0]), "");
733 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
734 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
735 LLVMTypeOf(src[0]), "");
736 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
737 break;
738 case nir_op_ishr:
739 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
740 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
741 LLVMTypeOf(src[0]), "");
742 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
743 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
744 LLVMTypeOf(src[0]), "");
745 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
746 break;
747 case nir_op_ushr:
748 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
749 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
750 LLVMTypeOf(src[0]), "");
751 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
752 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
753 LLVMTypeOf(src[0]), "");
754 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
755 break;
756 case nir_op_ilt32:
757 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
758 break;
759 case nir_op_ine32:
760 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
761 break;
762 case nir_op_ieq32:
763 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
764 break;
765 case nir_op_ige32:
766 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
767 break;
768 case nir_op_ult32:
769 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
770 break;
771 case nir_op_uge32:
772 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
773 break;
774 case nir_op_feq32:
775 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
776 break;
777 case nir_op_fneu32:
778 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
779 break;
780 case nir_op_flt32:
781 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
782 break;
783 case nir_op_fge32:
784 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
785 break;
786 case nir_op_fabs:
787 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
788 ac_to_float_type(&ctx->ac, def_type), src[0]);
789 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
790 /* fabs will be optimized by backend compiler with sign
791 * bit removed via AND.
792 */
793 result = ac_build_canonicalize(&ctx->ac, result,
794 instr->dest.dest.ssa.bit_size);
795 }
796 break;
797 case nir_op_iabs:
798 result = emit_iabs(&ctx->ac, src[0]);
799 break;
800 case nir_op_imax:
801 result = ac_build_imax(&ctx->ac, src[0], src[1]);
802 break;
803 case nir_op_imin:
804 result = ac_build_imin(&ctx->ac, src[0], src[1]);
805 break;
806 case nir_op_umax:
807 result = ac_build_umax(&ctx->ac, src[0], src[1]);
808 break;
809 case nir_op_umin:
810 result = ac_build_umin(&ctx->ac, src[0], src[1]);
811 break;
812 case nir_op_isign:
813 result = ac_build_isign(&ctx->ac, src[0],
814 instr->dest.dest.ssa.bit_size);
815 break;
816 case nir_op_fsign:
817 src[0] = ac_to_float(&ctx->ac, src[0]);
818 result = ac_build_fsign(&ctx->ac, src[0],
819 instr->dest.dest.ssa.bit_size);
820 break;
821 case nir_op_ffloor:
822 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
823 ac_to_float_type(&ctx->ac, def_type), src[0]);
824 break;
825 case nir_op_ftrunc:
826 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
827 ac_to_float_type(&ctx->ac, def_type), src[0]);
828 break;
829 case nir_op_fceil:
830 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
831 ac_to_float_type(&ctx->ac, def_type), src[0]);
832 break;
833 case nir_op_fround_even:
834 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
835 ac_to_float_type(&ctx->ac, def_type),src[0]);
836 break;
837 case nir_op_ffract:
838 src[0] = ac_to_float(&ctx->ac, src[0]);
839 result = ac_build_fract(&ctx->ac, src[0],
840 instr->dest.dest.ssa.bit_size);
841 break;
842 case nir_op_fsin:
843 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
844 ac_to_float_type(&ctx->ac, def_type), src[0]);
845 break;
846 case nir_op_fcos:
847 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
848 ac_to_float_type(&ctx->ac, def_type), src[0]);
849 break;
850 case nir_op_fsqrt:
851 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
852 ac_to_float_type(&ctx->ac, def_type), src[0]);
853 break;
854 case nir_op_fexp2:
855 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
856 ac_to_float_type(&ctx->ac, def_type), src[0]);
857 break;
858 case nir_op_flog2:
859 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
860 ac_to_float_type(&ctx->ac, def_type), src[0]);
861 break;
862 case nir_op_frsq:
863 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
864 ac_to_float_type(&ctx->ac, def_type), src[0]);
865 if (ctx->abi->clamp_div_by_zero)
866 result = ac_build_fmin(&ctx->ac, result,
867 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
868 break;
869 case nir_op_frexp_exp:
870 src[0] = ac_to_float(&ctx->ac, src[0]);
871 result = ac_build_frexp_exp(&ctx->ac, src[0],
872 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
873 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
874 result = LLVMBuildSExt(ctx->ac.builder, result,
875 ctx->ac.i32, "");
876 break;
877 case nir_op_frexp_sig:
878 src[0] = ac_to_float(&ctx->ac, src[0]);
879 result = ac_build_frexp_mant(&ctx->ac, src[0],
880 instr->dest.dest.ssa.bit_size);
881 break;
882 case nir_op_fpow:
883 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
884 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
885 break;
886 case nir_op_fmax:
887 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
888 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
889 if (ctx->ac.chip_class < GFX9 &&
890 instr->dest.dest.ssa.bit_size == 32) {
891 /* Only pre-GFX9 chips do not flush denorms. */
892 result = ac_build_canonicalize(&ctx->ac, result,
893 instr->dest.dest.ssa.bit_size);
894 }
895 break;
896 case nir_op_fmin:
897 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
898 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
899 if (ctx->ac.chip_class < GFX9 &&
900 instr->dest.dest.ssa.bit_size == 32) {
901 /* Only pre-GFX9 chips do not flush denorms. */
902 result = ac_build_canonicalize(&ctx->ac, result,
903 instr->dest.dest.ssa.bit_size);
904 }
905 break;
906 case nir_op_ffma:
907 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
908 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
909 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
910 break;
911 case nir_op_ldexp:
912 src[0] = ac_to_float(&ctx->ac, src[0]);
913 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
914 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
915 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
916 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
917 else
918 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
919 break;
920 case nir_op_bfm:
921 result = emit_bfm(&ctx->ac, src[0], src[1]);
922 break;
923 case nir_op_bitfield_select:
924 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
925 break;
926 case nir_op_ubfe:
927 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
928 break;
929 case nir_op_ibfe:
930 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
931 break;
932 case nir_op_bitfield_reverse:
933 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
934 break;
935 case nir_op_bit_count:
936 result = ac_build_bit_count(&ctx->ac, src[0]);
937 break;
938 case nir_op_vec2:
939 case nir_op_vec3:
940 case nir_op_vec4:
941 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
942 src[i] = ac_to_integer(&ctx->ac, src[i]);
943 result = ac_build_gather_values(&ctx->ac, src, num_components);
944 break;
945 case nir_op_f2i8:
946 case nir_op_f2i16:
947 case nir_op_f2i32:
948 case nir_op_f2i64:
949 src[0] = ac_to_float(&ctx->ac, src[0]);
950 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
951 break;
952 case nir_op_f2u8:
953 case nir_op_f2u16:
954 case nir_op_f2u32:
955 case nir_op_f2u64:
956 src[0] = ac_to_float(&ctx->ac, src[0]);
957 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
958 break;
959 case nir_op_i2f16:
960 case nir_op_i2f32:
961 case nir_op_i2f64:
962 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
963 break;
964 case nir_op_u2f16:
965 case nir_op_u2f32:
966 case nir_op_u2f64:
967 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
968 break;
969 case nir_op_f2f16_rtz:
970 case nir_op_f2f16:
971 case nir_op_f2fmp:
972 src[0] = ac_to_float(&ctx->ac, src[0]);
973
974 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
975 * all f32->f16 conversions have to round towards zero, because both scalar
976 * and vec2 down-conversions have to round equally.
977 */
978 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
979 instr->op == nir_op_f2f16_rtz) {
980 src[0] = ac_to_float(&ctx->ac, src[0]);
981
982 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
983 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
984
985 /* Fast path conversion. This only works if NIR is vectorized
986 * to vec2 16.
987 */
988 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
989 LLVMValueRef args[] = {
990 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
991 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
992 };
993 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
994 break;
995 }
996
997 assert(ac_get_llvm_num_components(src[0]) == 1);
998 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
999 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
1000 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
1001 } else {
1002 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1003 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1004 else
1005 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1006 }
1007 break;
1008 case nir_op_f2f16_rtne:
1009 case nir_op_f2f32:
1010 case nir_op_f2f64:
1011 src[0] = ac_to_float(&ctx->ac, src[0]);
1012 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1013 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1014 else
1015 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1016 break;
1017 case nir_op_u2u8:
1018 case nir_op_u2u16:
1019 case nir_op_u2ump:
1020 case nir_op_u2u32:
1021 case nir_op_u2u64:
1022 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1023 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1024 else
1025 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1026 break;
1027 case nir_op_i2i8:
1028 case nir_op_i2i16:
1029 case nir_op_i2imp:
1030 case nir_op_i2i32:
1031 case nir_op_i2i64:
1032 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1033 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1034 else
1035 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1036 break;
1037 case nir_op_b32csel:
1038 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1039 break;
1040 case nir_op_find_lsb:
1041 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1042 break;
1043 case nir_op_ufind_msb:
1044 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1045 break;
1046 case nir_op_ifind_msb:
1047 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1048 break;
1049 case nir_op_uadd_carry:
1050 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1051 break;
1052 case nir_op_usub_borrow:
1053 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1054 break;
1055 case nir_op_b2f16:
1056 case nir_op_b2f32:
1057 case nir_op_b2f64:
1058 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1059 break;
1060 case nir_op_f2b32:
1061 result = emit_f2b(&ctx->ac, src[0]);
1062 break;
1063 case nir_op_b2i8:
1064 case nir_op_b2i16:
1065 case nir_op_b2i32:
1066 case nir_op_b2i64:
1067 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1068 break;
1069 case nir_op_i2b32:
1070 result = emit_i2b(&ctx->ac, src[0]);
1071 break;
1072 case nir_op_fquantize2f16:
1073 result = emit_f2f16(&ctx->ac, src[0]);
1074 break;
1075 case nir_op_umul_high:
1076 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1077 break;
1078 case nir_op_imul_high:
1079 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1080 break;
1081 case nir_op_pack_half_2x16:
1082 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1083 break;
1084 case nir_op_pack_snorm_2x16:
1085 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1086 break;
1087 case nir_op_pack_unorm_2x16:
1088 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1089 break;
1090 case nir_op_unpack_half_2x16:
1091 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1092 break;
1093 case nir_op_fddx:
1094 case nir_op_fddy:
1095 case nir_op_fddx_fine:
1096 case nir_op_fddy_fine:
1097 case nir_op_fddx_coarse:
1098 case nir_op_fddy_coarse:
1099 result = emit_ddxy(ctx, instr->op, src[0]);
1100 break;
1101
1102 case nir_op_unpack_64_2x32_split_x: {
1103 assert(ac_get_llvm_num_components(src[0]) == 1);
1104 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1105 ctx->ac.v2i32,
1106 "");
1107 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1108 ctx->ac.i32_0, "");
1109 break;
1110 }
1111
1112 case nir_op_unpack_64_2x32_split_y: {
1113 assert(ac_get_llvm_num_components(src[0]) == 1);
1114 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1115 ctx->ac.v2i32,
1116 "");
1117 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1118 ctx->ac.i32_1, "");
1119 break;
1120 }
1121
1122 case nir_op_pack_64_2x32_split: {
1123 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1124 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1125 break;
1126 }
1127
1128 case nir_op_pack_32_2x16_split: {
1129 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1130 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1131 break;
1132 }
1133
1134 case nir_op_unpack_32_2x16_split_x: {
1135 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1136 ctx->ac.v2i16,
1137 "");
1138 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1139 ctx->ac.i32_0, "");
1140 break;
1141 }
1142
1143 case nir_op_unpack_32_2x16_split_y: {
1144 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1145 ctx->ac.v2i16,
1146 "");
1147 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1148 ctx->ac.i32_1, "");
1149 break;
1150 }
1151
1152 case nir_op_cube_face_coord: {
1153 src[0] = ac_to_float(&ctx->ac, src[0]);
1154 LLVMValueRef results[2];
1155 LLVMValueRef in[3];
1156 for (unsigned chan = 0; chan < 3; chan++)
1157 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1158 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1159 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1160 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1161 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1162 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1163 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1164 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1165 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1166 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1167 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1168 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1169 result = ac_build_gather_values(&ctx->ac, results, 2);
1170 break;
1171 }
1172
1173 case nir_op_cube_face_index: {
1174 src[0] = ac_to_float(&ctx->ac, src[0]);
1175 LLVMValueRef in[3];
1176 for (unsigned chan = 0; chan < 3; chan++)
1177 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1178 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1179 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1180 break;
1181 }
1182
1183 default:
1184 fprintf(stderr, "Unknown NIR alu instr: ");
1185 nir_print_instr(&instr->instr, stderr);
1186 fprintf(stderr, "\n");
1187 abort();
1188 }
1189
1190 if (result) {
1191 assert(instr->dest.dest.is_ssa);
1192 result = ac_to_integer_or_pointer(&ctx->ac, result);
1193 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1194 }
1195
1196 if (instr->exact)
1197 ac_restore_inexact_math(ctx->ac.builder, saved_inexact);
1198 }
1199
1200 static void visit_load_const(struct ac_nir_context *ctx,
1201 const nir_load_const_instr *instr)
1202 {
1203 LLVMValueRef values[4], value = NULL;
1204 LLVMTypeRef element_type =
1205 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1206
1207 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1208 switch (instr->def.bit_size) {
1209 case 8:
1210 values[i] = LLVMConstInt(element_type,
1211 instr->value[i].u8, false);
1212 break;
1213 case 16:
1214 values[i] = LLVMConstInt(element_type,
1215 instr->value[i].u16, false);
1216 break;
1217 case 32:
1218 values[i] = LLVMConstInt(element_type,
1219 instr->value[i].u32, false);
1220 break;
1221 case 64:
1222 values[i] = LLVMConstInt(element_type,
1223 instr->value[i].u64, false);
1224 break;
1225 default:
1226 fprintf(stderr,
1227 "unsupported nir load_const bit_size: %d\n",
1228 instr->def.bit_size);
1229 abort();
1230 }
1231 }
1232 if (instr->def.num_components > 1) {
1233 value = LLVMConstVector(values, instr->def.num_components);
1234 } else
1235 value = values[0];
1236
1237 ctx->ssa_defs[instr->def.index] = value;
1238 }
1239
1240 static LLVMValueRef
1241 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1242 {
1243 LLVMValueRef size =
1244 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1245 LLVMConstInt(ctx->ac.i32, 2, false), "");
1246
1247 /* GFX8 only */
1248 if (ctx->ac.chip_class == GFX8 && in_elements) {
1249 /* On GFX8, the descriptor contains the size in bytes,
1250 * but TXQ must return the size in elements.
1251 * The stride is always non-zero for resources using TXQ.
1252 */
1253 LLVMValueRef stride =
1254 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1255 ctx->ac.i32_1, "");
1256 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1257 LLVMConstInt(ctx->ac.i32, 16, false), "");
1258 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1259 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1260
1261 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1262 }
1263 return size;
1264 }
1265
1266 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1267 * incorrectly forces nearest filtering if the texture format is integer.
1268 * The only effect it has on Gather4, which always returns 4 texels for
1269 * bilinear filtering, is that the final coordinates are off by 0.5 of
1270 * the texel size.
1271 *
1272 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1273 * or (0.5 / size) from the normalized coordinates.
1274 *
1275 * However, cube textures with 8_8_8_8 data formats require a different
1276 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1277 * precision in 32-bit data formats, so it needs to be applied dynamically at
1278 * runtime. In this case, return an i1 value that indicates whether the
1279 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1280 */
1281 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1282 nir_variable *var,
1283 struct ac_image_args *args,
1284 const nir_tex_instr *instr)
1285 {
1286 const struct glsl_type *type = glsl_without_array(var->type);
1287 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1288 LLVMValueRef wa_8888 = NULL;
1289 LLVMValueRef half_texel[2];
1290 LLVMValueRef result;
1291
1292 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1293
1294 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1295 LLVMValueRef formats;
1296 LLVMValueRef data_format;
1297 LLVMValueRef wa_formats;
1298
1299 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1300
1301 data_format = LLVMBuildLShr(ctx->builder, formats,
1302 LLVMConstInt(ctx->i32, 20, false), "");
1303 data_format = LLVMBuildAnd(ctx->builder, data_format,
1304 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1305 wa_8888 = LLVMBuildICmp(
1306 ctx->builder, LLVMIntEQ, data_format,
1307 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1308 "");
1309
1310 uint32_t wa_num_format =
1311 stype == GLSL_TYPE_UINT ?
1312 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1313 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1314 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1315 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1316 "");
1317 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1318 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1319
1320 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1321 args->resource = LLVMBuildInsertElement(
1322 ctx->builder, args->resource, formats, ctx->i32_1, "");
1323 }
1324
1325 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1326 assert(!wa_8888);
1327 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1328 } else {
1329 struct ac_image_args resinfo = {};
1330 LLVMBasicBlockRef bbs[2];
1331
1332 LLVMValueRef unnorm = NULL;
1333 LLVMValueRef default_offset = ctx->f32_0;
1334 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1335 !instr->is_array) {
1336 /* In vulkan, whether the sampler uses unnormalized
1337 * coordinates or not is a dynamic property of the
1338 * sampler. Hence, to figure out whether or not we
1339 * need to divide by the texture size, we need to test
1340 * the sampler at runtime. This tests the bit set by
1341 * radv_init_sampler().
1342 */
1343 LLVMValueRef sampler0 =
1344 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1345 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1346 LLVMConstInt(ctx->i32, 15, false), "");
1347 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1348 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1349 default_offset = LLVMConstReal(ctx->f32, -0.5);
1350 }
1351
1352 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1353 if (wa_8888 || unnorm) {
1354 assert(!(wa_8888 && unnorm));
1355 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1356 /* Skip the texture size query entirely if we don't need it. */
1357 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1358 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1359 }
1360
1361 /* Query the texture size. */
1362 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1363 resinfo.opcode = ac_image_get_resinfo;
1364 resinfo.dmask = 0xf;
1365 resinfo.lod = ctx->i32_0;
1366 resinfo.resource = args->resource;
1367 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1368 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1369
1370 /* Compute -0.5 / size. */
1371 for (unsigned c = 0; c < 2; c++) {
1372 half_texel[c] =
1373 LLVMBuildExtractElement(ctx->builder, size,
1374 LLVMConstInt(ctx->i32, c, 0), "");
1375 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1376 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1377 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1378 LLVMConstReal(ctx->f32, -0.5), "");
1379 }
1380
1381 if (wa_8888 || unnorm) {
1382 ac_build_endif(ctx, 2000);
1383
1384 for (unsigned c = 0; c < 2; c++) {
1385 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1386 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1387 values, bbs);
1388 }
1389 }
1390 }
1391
1392 for (unsigned c = 0; c < 2; c++) {
1393 LLVMValueRef tmp;
1394 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1395 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1396 }
1397
1398 args->attributes = AC_FUNC_ATTR_READNONE;
1399 result = ac_build_image_opcode(ctx, args);
1400
1401 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1402 LLVMValueRef tmp, tmp2;
1403
1404 /* if the cube workaround is in place, f2i the result. */
1405 for (unsigned c = 0; c < 4; c++) {
1406 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1407 if (stype == GLSL_TYPE_UINT)
1408 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1409 else
1410 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1411 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1412 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1413 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1414 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1415 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1416 }
1417 }
1418 return result;
1419 }
1420
1421 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1422 {
1423 nir_deref_instr *texture_deref_instr = NULL;
1424
1425 for (unsigned i = 0; i < instr->num_srcs; i++) {
1426 switch (instr->src[i].src_type) {
1427 case nir_tex_src_texture_deref:
1428 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1429 break;
1430 default:
1431 break;
1432 }
1433 }
1434 return texture_deref_instr;
1435 }
1436
1437 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1438 const nir_tex_instr *instr,
1439 struct ac_image_args *args)
1440 {
1441 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1442 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1443
1444 assert(instr->dest.is_ssa);
1445 return ac_build_buffer_load_format(&ctx->ac,
1446 args->resource,
1447 args->coords[0],
1448 ctx->ac.i32_0,
1449 util_last_bit(mask),
1450 0, true,
1451 instr->dest.ssa.bit_size == 16);
1452 }
1453
1454 args->opcode = ac_image_sample;
1455
1456 switch (instr->op) {
1457 case nir_texop_txf:
1458 case nir_texop_txf_ms:
1459 case nir_texop_samples_identical:
1460 args->opcode = args->level_zero ||
1461 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1462 ac_image_load : ac_image_load_mip;
1463 args->level_zero = false;
1464 break;
1465 case nir_texop_txs:
1466 case nir_texop_query_levels:
1467 args->opcode = ac_image_get_resinfo;
1468 if (!args->lod)
1469 args->lod = ctx->ac.i32_0;
1470 args->level_zero = false;
1471 break;
1472 case nir_texop_tex:
1473 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1474 assert(!args->lod);
1475 args->level_zero = true;
1476 }
1477 break;
1478 case nir_texop_tg4:
1479 args->opcode = ac_image_gather4;
1480 if (!args->lod && !args->bias)
1481 args->level_zero = true;
1482 break;
1483 case nir_texop_lod:
1484 args->opcode = ac_image_get_lod;
1485 break;
1486 case nir_texop_fragment_fetch:
1487 case nir_texop_fragment_mask_fetch:
1488 args->opcode = ac_image_load;
1489 args->level_zero = false;
1490 break;
1491 default:
1492 break;
1493 }
1494
1495 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1496 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1497 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1498 const struct glsl_type *type = glsl_without_array(var->type);
1499 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1500 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1501 return lower_gather4_integer(&ctx->ac, var, args, instr);
1502 }
1503 }
1504
1505 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1506 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1507 if ((args->dim == ac_image_2darray ||
1508 args->dim == ac_image_2d) && !args->coords[1]) {
1509 args->coords[1] = ctx->ac.i32_0;
1510 }
1511 }
1512
1513 args->attributes = AC_FUNC_ATTR_READNONE;
1514 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1515 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1516 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1517 /* Prevent texture instructions with implicit derivatives from being
1518 * sinked into branches. */
1519 switch (instr->op) {
1520 case nir_texop_tex:
1521 case nir_texop_txb:
1522 case nir_texop_lod:
1523 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1524 break;
1525 default:
1526 break;
1527 }
1528 }
1529
1530 return ac_build_image_opcode(&ctx->ac, args);
1531 }
1532
1533 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1534 nir_intrinsic_instr *instr)
1535 {
1536 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1537 LLVMValueRef index = get_src(ctx, instr->src[1]);
1538
1539 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1540 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1541 return result;
1542 }
1543
1544 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1545 nir_intrinsic_instr *instr)
1546 {
1547 LLVMValueRef ptr, addr;
1548 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1549 unsigned index = nir_intrinsic_base(instr);
1550
1551 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1552 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1553
1554 /* Load constant values from user SGPRS when possible, otherwise
1555 * fallback to the default path that loads directly from memory.
1556 */
1557 if (LLVMIsConstant(src0) &&
1558 instr->dest.ssa.bit_size == 32) {
1559 unsigned count = instr->dest.ssa.num_components;
1560 unsigned offset = index;
1561
1562 offset += LLVMConstIntGetZExtValue(src0);
1563 offset /= 4;
1564
1565 offset -= ctx->args->base_inline_push_consts;
1566
1567 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1568 if (offset + count <= num_inline_push_consts) {
1569 LLVMValueRef push_constants[num_inline_push_consts];
1570 for (unsigned i = 0; i < num_inline_push_consts; i++)
1571 push_constants[i] = ac_get_arg(&ctx->ac,
1572 ctx->args->inline_push_consts[i]);
1573 return ac_build_gather_values(&ctx->ac,
1574 push_constants + offset,
1575 count);
1576 }
1577 }
1578
1579 ptr = LLVMBuildGEP(ctx->ac.builder,
1580 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1581
1582 if (instr->dest.ssa.bit_size == 8) {
1583 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1584 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1585 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1586 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1587
1588 LLVMValueRef params[3];
1589 if (load_dwords > 1) {
1590 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1591 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1592 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1593 } else {
1594 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1595 params[0] = ctx->ac.i32_0;
1596 params[1] = res;
1597 }
1598 params[2] = addr;
1599 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1600
1601 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1602 if (instr->dest.ssa.num_components > 1)
1603 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1604 return res;
1605 } else if (instr->dest.ssa.bit_size == 16) {
1606 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1607 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1608 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1609 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1610 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1611 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1612 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1613 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1614 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1615 LLVMConstInt(ctx->ac.i32, 4, false)};
1616 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1617 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1618 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1619 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1620 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1621 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1622 }
1623
1624 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1625
1626 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1627 }
1628
1629 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1630 const nir_intrinsic_instr *instr)
1631 {
1632 LLVMValueRef index = get_src(ctx, instr->src[0]);
1633
1634 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1635 }
1636
1637 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1638 {
1639 uint32_t new_mask = 0;
1640 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1641 if (mask & (1u << i))
1642 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1643 return new_mask;
1644 }
1645
1646 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1647 unsigned start, unsigned count)
1648 {
1649 LLVMValueRef mask[] = {
1650 ctx->i32_0, ctx->i32_1,
1651 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1652
1653 unsigned src_elements = ac_get_llvm_num_components(src);
1654
1655 if (count == src_elements) {
1656 assert(start == 0);
1657 return src;
1658 } else if (count == 1) {
1659 assert(start < src_elements);
1660 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1661 } else {
1662 assert(start + count <= src_elements);
1663 assert(count <= 4);
1664 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1665 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1666 }
1667 }
1668
1669 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1670 enum gl_access_qualifier access,
1671 bool may_store_unaligned,
1672 bool writeonly_memory)
1673 {
1674 unsigned cache_policy = 0;
1675
1676 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1677 * store opcodes not aligned to a dword are affected. The only way to
1678 * get unaligned stores is through shader images.
1679 */
1680 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1681 /* If this is write-only, don't keep data in L1 to prevent
1682 * evicting L1 cache lines that may be needed by other
1683 * instructions.
1684 */
1685 writeonly_memory ||
1686 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1687 cache_policy |= ac_glc;
1688 }
1689
1690 if (access & ACCESS_STREAM_CACHE_POLICY)
1691 cache_policy |= ac_slc | ac_glc;
1692
1693 return cache_policy;
1694 }
1695
1696 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1697 struct waterfall_context *wctx,
1698 const nir_intrinsic_instr *instr,
1699 nir_src src)
1700 {
1701 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1702 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1703 }
1704
1705 static void visit_store_ssbo(struct ac_nir_context *ctx,
1706 nir_intrinsic_instr *instr)
1707 {
1708 if (ctx->ac.postponed_kill) {
1709 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1710 ctx->ac.postponed_kill, "");
1711 ac_build_ifcc(&ctx->ac, cond, 7000);
1712 }
1713
1714 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1715 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1716 unsigned writemask = nir_intrinsic_write_mask(instr);
1717 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1718 bool writeonly_memory = access & ACCESS_NON_READABLE;
1719 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1720
1721 struct waterfall_context wctx;
1722 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1723
1724 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1725 LLVMValueRef base_data = src_data;
1726 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1727 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1728
1729 while (writemask) {
1730 int start, count;
1731 LLVMValueRef data, offset;
1732 LLVMTypeRef data_type;
1733
1734 u_bit_scan_consecutive_range(&writemask, &start, &count);
1735
1736 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1737 * writes into a 2-element and a 1-element write. */
1738 if (count == 3 &&
1739 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1740 writemask |= 1 << (start + 2);
1741 count = 2;
1742 }
1743 int num_bytes = count * elem_size_bytes; /* count in bytes */
1744
1745 /* we can only store 4 DWords at the same time.
1746 * can only happen for 64 Bit vectors. */
1747 if (num_bytes > 16) {
1748 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1749 count = 2;
1750 num_bytes = 16;
1751 }
1752
1753 /* check alignment of 16 Bit stores */
1754 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1755 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1756 count = 1;
1757 num_bytes = 2;
1758 }
1759
1760 /* Due to alignment issues, split stores of 8-bit/16-bit
1761 * vectors.
1762 */
1763 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1764 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1765 count = 1;
1766 num_bytes = elem_size_bytes;
1767 }
1768
1769 data = extract_vector_range(&ctx->ac, base_data, start, count);
1770
1771 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1772 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1773
1774 if (num_bytes == 1) {
1775 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1776 offset, ctx->ac.i32_0,
1777 cache_policy);
1778 } else if (num_bytes == 2) {
1779 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1780 offset, ctx->ac.i32_0,
1781 cache_policy);
1782 } else {
1783 int num_channels = num_bytes / 4;
1784
1785 switch (num_bytes) {
1786 case 16: /* v4f32 */
1787 data_type = ctx->ac.v4f32;
1788 break;
1789 case 12: /* v3f32 */
1790 data_type = ctx->ac.v3f32;
1791 break;
1792 case 8: /* v2f32 */
1793 data_type = ctx->ac.v2f32;
1794 break;
1795 case 4: /* f32 */
1796 data_type = ctx->ac.f32;
1797 break;
1798 default:
1799 unreachable("Malformed vector store.");
1800 }
1801 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1802
1803 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1804 num_channels, offset,
1805 ctx->ac.i32_0, 0,
1806 cache_policy);
1807 }
1808 }
1809
1810 exit_waterfall(ctx, &wctx, NULL);
1811
1812 if (ctx->ac.postponed_kill)
1813 ac_build_endif(&ctx->ac, 7000);
1814 }
1815
1816 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1817 LLVMValueRef descriptor,
1818 LLVMValueRef offset,
1819 LLVMValueRef compare,
1820 LLVMValueRef exchange)
1821 {
1822 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1823 if (ctx->abi->robust_buffer_access) {
1824 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1825
1826 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1827 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1828
1829 ac_build_ifcc(&ctx->ac, cond, -1);
1830
1831 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1832 }
1833
1834 LLVMValueRef ptr_parts[2] = {
1835 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1836 LLVMBuildAnd(ctx->ac.builder,
1837 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1838 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1839 };
1840
1841 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1842 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1843
1844 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1845
1846 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1847 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1848 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1849 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1850
1851 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1852 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1853
1854 if (ctx->abi->robust_buffer_access) {
1855 ac_build_endif(&ctx->ac, -1);
1856
1857 LLVMBasicBlockRef incoming_blocks[2] = {
1858 start_block,
1859 then_block,
1860 };
1861
1862 LLVMValueRef incoming_values[2] = {
1863 LLVMConstInt(ctx->ac.i64, 0, 0),
1864 result,
1865 };
1866 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1867 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1868 return ret;
1869 } else {
1870 return result;
1871 }
1872 }
1873
1874 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1875 nir_intrinsic_instr *instr)
1876 {
1877 if (ctx->ac.postponed_kill) {
1878 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1879 ctx->ac.postponed_kill, "");
1880 ac_build_ifcc(&ctx->ac, cond, 7001);
1881 }
1882
1883 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1884 const char *op;
1885 char name[64], type[8];
1886 LLVMValueRef params[6], descriptor;
1887 LLVMValueRef result;
1888 int arg_count = 0;
1889
1890 struct waterfall_context wctx;
1891 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1892
1893 switch (instr->intrinsic) {
1894 case nir_intrinsic_ssbo_atomic_add:
1895 op = "add";
1896 break;
1897 case nir_intrinsic_ssbo_atomic_imin:
1898 op = "smin";
1899 break;
1900 case nir_intrinsic_ssbo_atomic_umin:
1901 op = "umin";
1902 break;
1903 case nir_intrinsic_ssbo_atomic_imax:
1904 op = "smax";
1905 break;
1906 case nir_intrinsic_ssbo_atomic_umax:
1907 op = "umax";
1908 break;
1909 case nir_intrinsic_ssbo_atomic_and:
1910 op = "and";
1911 break;
1912 case nir_intrinsic_ssbo_atomic_or:
1913 op = "or";
1914 break;
1915 case nir_intrinsic_ssbo_atomic_xor:
1916 op = "xor";
1917 break;
1918 case nir_intrinsic_ssbo_atomic_exchange:
1919 op = "swap";
1920 break;
1921 case nir_intrinsic_ssbo_atomic_comp_swap:
1922 op = "cmpswap";
1923 break;
1924 default:
1925 abort();
1926 }
1927
1928 descriptor = ctx->abi->load_ssbo(ctx->abi,
1929 rsrc_base,
1930 true);
1931
1932 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1933 return_type == ctx->ac.i64) {
1934 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1935 get_src(ctx, instr->src[1]),
1936 get_src(ctx, instr->src[2]),
1937 get_src(ctx, instr->src[3]));
1938 } else {
1939 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1940 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1941 }
1942 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1943 params[arg_count++] = descriptor;
1944
1945 if (LLVM_VERSION_MAJOR >= 9) {
1946 /* XXX: The new raw/struct atomic intrinsics are buggy with
1947 * LLVM 8, see r358579.
1948 */
1949 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1950 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1951 params[arg_count++] = ctx->ac.i32_0; /* slc */
1952
1953 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1954 snprintf(name, sizeof(name),
1955 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1956 } else {
1957 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1958 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1959 params[arg_count++] = ctx->ac.i1false; /* slc */
1960
1961 assert(return_type == ctx->ac.i32);
1962 snprintf(name, sizeof(name),
1963 "llvm.amdgcn.buffer.atomic.%s", op);
1964 }
1965
1966 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1967 arg_count, 0);
1968 }
1969
1970 result = exit_waterfall(ctx, &wctx, result);
1971 if (ctx->ac.postponed_kill)
1972 ac_build_endif(&ctx->ac, 7001);
1973 return result;
1974 }
1975
1976 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1977 nir_intrinsic_instr *instr)
1978 {
1979 struct waterfall_context wctx;
1980 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1981
1982 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1983 int num_components = instr->num_components;
1984 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1985 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1986
1987 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1988 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1989 LLVMValueRef vindex = ctx->ac.i32_0;
1990
1991 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1992 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1993
1994 LLVMValueRef results[4];
1995 for (int i = 0; i < num_components;) {
1996 int num_elems = num_components - i;
1997 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1998 num_elems = 1;
1999 if (num_elems * elem_size_bytes > 16)
2000 num_elems = 16 / elem_size_bytes;
2001 int load_bytes = num_elems * elem_size_bytes;
2002
2003 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2004
2005 LLVMValueRef ret;
2006
2007 if (load_bytes == 1) {
2008 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2009 rsrc,
2010 offset,
2011 ctx->ac.i32_0,
2012 immoffset,
2013 cache_policy);
2014 } else if (load_bytes == 2) {
2015 ret = ac_build_tbuffer_load_short(&ctx->ac,
2016 rsrc,
2017 offset,
2018 ctx->ac.i32_0,
2019 immoffset,
2020 cache_policy);
2021 } else {
2022 int num_channels = util_next_power_of_two(load_bytes) / 4;
2023 bool can_speculate = access & ACCESS_CAN_REORDER;
2024
2025 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2026 vindex, offset, immoffset, 0,
2027 cache_policy, can_speculate, false);
2028 }
2029
2030 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2031 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2032 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2033
2034 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2035 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2036
2037 for (unsigned j = 0; j < num_elems; j++) {
2038 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2039 }
2040 i += num_elems;
2041 }
2042
2043 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2044 return exit_waterfall(ctx, &wctx, ret);
2045 }
2046
2047 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2048 struct waterfall_context *wctx,
2049 const nir_intrinsic_instr *instr)
2050 {
2051 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2052 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2053 }
2054
2055 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2056 nir_intrinsic_instr *instr)
2057 {
2058 struct waterfall_context wctx;
2059 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2060
2061 LLVMValueRef ret;
2062 LLVMValueRef rsrc = rsrc_base;
2063 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2064 int num_components = instr->num_components;
2065
2066 if (ctx->abi->load_ubo)
2067 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2068
2069 if (instr->dest.ssa.bit_size == 64)
2070 num_components *= 2;
2071
2072 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2073 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2074 LLVMValueRef results[num_components];
2075 for (unsigned i = 0; i < num_components; ++i) {
2076 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2077 load_bytes * i, 0);
2078
2079 if (load_bytes == 1) {
2080 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2081 rsrc,
2082 offset,
2083 ctx->ac.i32_0,
2084 immoffset,
2085 0);
2086 } else {
2087 assert(load_bytes == 2);
2088 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2089 rsrc,
2090 offset,
2091 ctx->ac.i32_0,
2092 immoffset,
2093 0);
2094 }
2095 }
2096 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2097 } else {
2098 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2099 NULL, 0, 0, true, true);
2100
2101 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2102 }
2103
2104 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2105 get_def_type(ctx, &instr->dest.ssa), "");
2106
2107 return exit_waterfall(ctx, &wctx, ret);
2108 }
2109
2110 static void
2111 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2112 bool vs_in, unsigned *vertex_index_out,
2113 LLVMValueRef *vertex_index_ref,
2114 unsigned *const_out, LLVMValueRef *indir_out)
2115 {
2116 nir_variable *var = nir_deref_instr_get_variable(instr);
2117 nir_deref_path path;
2118 unsigned idx_lvl = 1;
2119
2120 nir_deref_path_init(&path, instr, NULL);
2121
2122 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2123 if (vertex_index_ref) {
2124 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2125 if (vertex_index_out)
2126 *vertex_index_out = 0;
2127 } else {
2128 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2129 }
2130 ++idx_lvl;
2131 }
2132
2133 uint32_t const_offset = 0;
2134 LLVMValueRef offset = NULL;
2135
2136 if (var->data.compact) {
2137 assert(instr->deref_type == nir_deref_type_array);
2138 const_offset = nir_src_as_uint(instr->arr.index);
2139 goto out;
2140 }
2141
2142 for (; path.path[idx_lvl]; ++idx_lvl) {
2143 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2144 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2145 unsigned index = path.path[idx_lvl]->strct.index;
2146
2147 for (unsigned i = 0; i < index; i++) {
2148 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2149 const_offset += glsl_count_attribute_slots(ft, vs_in);
2150 }
2151 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2152 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2153 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2154 const_offset += size *
2155 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2156 } else {
2157 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2158 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2159 if (offset)
2160 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2161 else
2162 offset = array_off;
2163 }
2164 } else
2165 unreachable("Uhandled deref type in get_deref_instr_offset");
2166 }
2167
2168 out:
2169 nir_deref_path_finish(&path);
2170
2171 if (const_offset && offset)
2172 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2173 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2174 "");
2175
2176 *const_out = const_offset;
2177 *indir_out = offset;
2178 }
2179
2180 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2181 nir_intrinsic_instr *instr,
2182 bool load_inputs)
2183 {
2184 LLVMValueRef result;
2185 LLVMValueRef vertex_index = NULL;
2186 LLVMValueRef indir_index = NULL;
2187 unsigned const_index = 0;
2188
2189 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2190
2191 unsigned location = var->data.location;
2192 unsigned driver_location = var->data.driver_location;
2193 const bool is_patch = var->data.patch ||
2194 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2195 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2196 const bool is_compact = var->data.compact;
2197
2198 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2199 false, NULL, is_patch ? NULL : &vertex_index,
2200 &const_index, &indir_index);
2201
2202 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2203
2204 LLVMTypeRef src_component_type;
2205 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2206 src_component_type = LLVMGetElementType(dest_type);
2207 else
2208 src_component_type = dest_type;
2209
2210 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2211 vertex_index, indir_index,
2212 const_index, location, driver_location,
2213 var->data.location_frac,
2214 instr->num_components,
2215 is_patch, is_compact, load_inputs);
2216 if (instr->dest.ssa.bit_size == 16) {
2217 result = ac_to_integer(&ctx->ac, result);
2218 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2219 }
2220 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2221 }
2222
2223 static unsigned
2224 type_scalar_size_bytes(const struct glsl_type *type)
2225 {
2226 assert(glsl_type_is_vector_or_scalar(type) ||
2227 glsl_type_is_matrix(type));
2228 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2229 }
2230
2231 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2232 nir_intrinsic_instr *instr)
2233 {
2234 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2235 nir_variable *var = nir_deref_instr_get_variable(deref);
2236
2237 LLVMValueRef values[8];
2238 int idx = 0;
2239 int ve = instr->dest.ssa.num_components;
2240 unsigned comp = 0;
2241 LLVMValueRef indir_index;
2242 LLVMValueRef ret;
2243 unsigned const_index;
2244 unsigned stride = 4;
2245 int mode = deref->mode;
2246
2247 if (var) {
2248 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2249 var->data.mode == nir_var_shader_in;
2250 idx = var->data.driver_location;
2251 comp = var->data.location_frac;
2252 mode = var->data.mode;
2253
2254 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2255 &const_index, &indir_index);
2256
2257 if (var->data.compact) {
2258 stride = 1;
2259 const_index += comp;
2260 comp = 0;
2261 }
2262 }
2263
2264 if (instr->dest.ssa.bit_size == 64 &&
2265 (deref->mode == nir_var_shader_in ||
2266 deref->mode == nir_var_shader_out ||
2267 deref->mode == nir_var_function_temp))
2268 ve *= 2;
2269
2270 switch (mode) {
2271 case nir_var_shader_in:
2272 /* TODO: remove this after RADV switches to lowered IO */
2273 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2274 ctx->stage == MESA_SHADER_TESS_EVAL) {
2275 return load_tess_varyings(ctx, instr, true);
2276 }
2277
2278 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2279 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2280 LLVMValueRef indir_index;
2281 unsigned const_index, vertex_index;
2282 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2283 &const_index, &indir_index);
2284 assert(indir_index == NULL);
2285
2286 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2287 var->data.driver_location,
2288 var->data.location_frac,
2289 instr->num_components, vertex_index, const_index, type);
2290 }
2291
2292 for (unsigned chan = comp; chan < ve + comp; chan++) {
2293 if (indir_index) {
2294 unsigned count = glsl_count_attribute_slots(
2295 var->type,
2296 ctx->stage == MESA_SHADER_VERTEX);
2297 count -= chan / 4;
2298 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2299 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2300 stride, false, true);
2301
2302 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2303 tmp_vec,
2304 indir_index, "");
2305 } else
2306 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2307 }
2308 break;
2309 case nir_var_function_temp:
2310 for (unsigned chan = 0; chan < ve; chan++) {
2311 if (indir_index) {
2312 unsigned count = glsl_count_attribute_slots(
2313 var->type, false);
2314 count -= chan / 4;
2315 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2316 &ctx->ac, ctx->locals + idx + chan, count,
2317 stride, true, true);
2318
2319 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2320 tmp_vec,
2321 indir_index, "");
2322 } else {
2323 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2324 }
2325 }
2326 break;
2327 case nir_var_shader_out:
2328 /* TODO: remove this after RADV switches to lowered IO */
2329 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2330 return load_tess_varyings(ctx, instr, false);
2331 }
2332
2333 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2334 var->data.fb_fetch_output &&
2335 ctx->abi->emit_fbfetch)
2336 return ctx->abi->emit_fbfetch(ctx->abi);
2337
2338 for (unsigned chan = comp; chan < ve + comp; chan++) {
2339 if (indir_index) {
2340 unsigned count = glsl_count_attribute_slots(
2341 var->type, false);
2342 count -= chan / 4;
2343 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2344 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2345 stride, true, true);
2346
2347 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2348 tmp_vec,
2349 indir_index, "");
2350 } else {
2351 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2352 ctx->abi->outputs[idx + chan + const_index * stride],
2353 "");
2354 }
2355 }
2356 break;
2357 case nir_var_mem_global: {
2358 LLVMValueRef address = get_src(ctx, instr->src[0]);
2359 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2360 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2361 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2362 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2363 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2364 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2365
2366 if (stride != natural_stride || split_loads) {
2367 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2368 result_type = LLVMGetElementType(result_type);
2369
2370 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2371 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2372 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2373
2374 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2375 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2376 values[i] = LLVMBuildLoad(ctx->ac.builder,
2377 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2378
2379 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2380 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2381 }
2382 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2383 } else {
2384 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2385 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2386 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2387 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2388
2389 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2390 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2391 return val;
2392 }
2393 }
2394 default:
2395 unreachable("unhandle variable mode");
2396 }
2397 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2398 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2399 }
2400
2401 static void
2402 visit_store_var(struct ac_nir_context *ctx,
2403 nir_intrinsic_instr *instr)
2404 {
2405 if (ctx->ac.postponed_kill) {
2406 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2407 ctx->ac.postponed_kill, "");
2408 ac_build_ifcc(&ctx->ac, cond, 7002);
2409 }
2410
2411 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2412 nir_variable *var = nir_deref_instr_get_variable(deref);
2413
2414 LLVMValueRef temp_ptr, value;
2415 int idx = 0;
2416 unsigned comp = 0;
2417 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2418 int writemask = instr->const_index[0];
2419 LLVMValueRef indir_index;
2420 unsigned const_index;
2421
2422 if (var) {
2423 get_deref_offset(ctx, deref, false,
2424 NULL, NULL, &const_index, &indir_index);
2425 idx = var->data.driver_location;
2426 comp = var->data.location_frac;
2427
2428 if (var->data.compact) {
2429 const_index += comp;
2430 comp = 0;
2431 }
2432 }
2433
2434 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2435 (deref->mode == nir_var_shader_out ||
2436 deref->mode == nir_var_function_temp)) {
2437
2438 src = LLVMBuildBitCast(ctx->ac.builder, src,
2439 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2440 "");
2441
2442 writemask = widen_mask(writemask, 2);
2443 }
2444
2445 writemask = writemask << comp;
2446
2447 switch (deref->mode) {
2448 case nir_var_shader_out:
2449 /* TODO: remove this after RADV switches to lowered IO */
2450 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2451 LLVMValueRef vertex_index = NULL;
2452 LLVMValueRef indir_index = NULL;
2453 unsigned const_index = 0;
2454 const bool is_patch = var->data.patch ||
2455 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2456 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2457
2458 get_deref_offset(ctx, deref, false, NULL,
2459 is_patch ? NULL : &vertex_index,
2460 &const_index, &indir_index);
2461
2462 ctx->abi->store_tcs_outputs(ctx->abi, var,
2463 vertex_index, indir_index,
2464 const_index, src, writemask,
2465 var->data.location_frac,
2466 var->data.driver_location);
2467 break;
2468 }
2469
2470 for (unsigned chan = 0; chan < 8; chan++) {
2471 int stride = 4;
2472 if (!(writemask & (1 << chan)))
2473 continue;
2474
2475 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2476
2477 if (var->data.compact)
2478 stride = 1;
2479 if (indir_index) {
2480 unsigned count = glsl_count_attribute_slots(
2481 var->type, false);
2482 count -= chan / 4;
2483 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2484 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2485 stride, true, true);
2486
2487 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2488 value, indir_index, "");
2489 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2490 count, stride, tmp_vec);
2491
2492 } else {
2493 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2494
2495 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2496 }
2497 }
2498 break;
2499 case nir_var_function_temp:
2500 for (unsigned chan = 0; chan < 8; chan++) {
2501 if (!(writemask & (1 << chan)))
2502 continue;
2503
2504 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2505 if (indir_index) {
2506 unsigned count = glsl_count_attribute_slots(
2507 var->type, false);
2508 count -= chan / 4;
2509 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2510 &ctx->ac, ctx->locals + idx + chan, count,
2511 4, true, true);
2512
2513 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2514 value, indir_index, "");
2515 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2516 count, 4, tmp_vec);
2517 } else {
2518 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2519
2520 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2521 }
2522 }
2523 break;
2524
2525 case nir_var_mem_global: {
2526 int writemask = instr->const_index[0];
2527 LLVMValueRef address = get_src(ctx, instr->src[0]);
2528 LLVMValueRef val = get_src(ctx, instr->src[1]);
2529
2530 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2531 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2532 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2533 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2534 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2535
2536 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2537 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2538 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2539
2540 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2541 stride == natural_stride && !split_stores) {
2542 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2543 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2544 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2545
2546 val = LLVMBuildBitCast(ctx->ac.builder, val,
2547 LLVMGetElementType(LLVMTypeOf(address)), "");
2548 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2549
2550 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2551 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2552 } else {
2553 LLVMTypeRef val_type = LLVMTypeOf(val);
2554 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2555 val_type = LLVMGetElementType(val_type);
2556
2557 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2558 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2559 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2560 for (unsigned chan = 0; chan < 4; chan++) {
2561 if (!(writemask & (1 << chan)))
2562 continue;
2563
2564 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2565
2566 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2567 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2568 chan);
2569 src = LLVMBuildBitCast(ctx->ac.builder, src,
2570 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2571 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2572
2573 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2574 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2575 }
2576 }
2577 break;
2578 }
2579 default:
2580 abort();
2581 break;
2582 }
2583
2584 if (ctx->ac.postponed_kill)
2585 ac_build_endif(&ctx->ac, 7002);
2586 }
2587
2588 static void
2589 visit_store_output(struct ac_nir_context *ctx, nir_intrinsic_instr *instr)
2590 {
2591 if (ctx->ac.postponed_kill) {
2592 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2593 ctx->ac.postponed_kill, "");
2594 ac_build_ifcc(&ctx->ac, cond, 7002);
2595 }
2596
2597 unsigned base = nir_intrinsic_base(instr);
2598 unsigned writemask = nir_intrinsic_write_mask(instr);
2599 unsigned component = nir_intrinsic_component(instr);
2600 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
2601 nir_src offset = *nir_get_io_offset_src(instr);
2602 LLVMValueRef indir_index = NULL;
2603
2604 if (nir_src_is_const(offset))
2605 assert(nir_src_as_uint(offset) == 0);
2606 else
2607 indir_index = get_src(ctx, offset);
2608
2609 switch (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src))) {
2610 case 32:
2611 break;
2612 case 64:
2613 writemask = widen_mask(writemask, 2);
2614 src = LLVMBuildBitCast(ctx->ac.builder, src,
2615 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2616 "");
2617 break;
2618 default:
2619 unreachable("unhandled store_output bit size");
2620 return;
2621 }
2622
2623 writemask <<= component;
2624
2625 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2626 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
2627 LLVMValueRef vertex_index =
2628 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
2629
2630 ctx->abi->store_tcs_outputs(ctx->abi, NULL,
2631 vertex_index, indir_index,
2632 0, src, writemask,
2633 component, base * 4);
2634 return;
2635 }
2636
2637 /* No indirect indexing is allowed after this point. */
2638 assert(!indir_index);
2639
2640 for (unsigned chan = 0; chan < 8; chan++) {
2641 if (!(writemask & (1 << chan)))
2642 continue;
2643
2644 LLVMValueRef value = ac_llvm_extract_elem(&ctx->ac, src, chan - component);
2645 LLVMBuildStore(ctx->ac.builder, value,
2646 ctx->abi->outputs[base * 4 + chan]);
2647 }
2648
2649 if (ctx->ac.postponed_kill)
2650 ac_build_endif(&ctx->ac, 7002);
2651 }
2652
2653 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2654 {
2655 switch (dim) {
2656 case GLSL_SAMPLER_DIM_BUF:
2657 return 1;
2658 case GLSL_SAMPLER_DIM_1D:
2659 return array ? 2 : 1;
2660 case GLSL_SAMPLER_DIM_2D:
2661 return array ? 3 : 2;
2662 case GLSL_SAMPLER_DIM_MS:
2663 return array ? 4 : 3;
2664 case GLSL_SAMPLER_DIM_3D:
2665 case GLSL_SAMPLER_DIM_CUBE:
2666 return 3;
2667 case GLSL_SAMPLER_DIM_RECT:
2668 case GLSL_SAMPLER_DIM_SUBPASS:
2669 return 2;
2670 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2671 return 3;
2672 default:
2673 break;
2674 }
2675 return 0;
2676 }
2677
2678 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2679 LLVMValueRef coord_x, LLVMValueRef coord_y,
2680 LLVMValueRef coord_z,
2681 LLVMValueRef sample_index,
2682 LLVMValueRef fmask_desc_ptr)
2683 {
2684 unsigned sample_chan = coord_z ? 3 : 2;
2685 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2686 addr[sample_chan] = sample_index;
2687
2688 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2689 return addr[sample_chan];
2690 }
2691
2692 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2693 {
2694 assert(instr->src[0].is_ssa);
2695 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2696 }
2697
2698 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2699 const nir_intrinsic_instr *instr,
2700 LLVMValueRef dynamic_index,
2701 enum ac_descriptor_type desc_type,
2702 bool write)
2703 {
2704 nir_deref_instr *deref_instr =
2705 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2706 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2707
2708 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2709 }
2710
2711 static void get_image_coords(struct ac_nir_context *ctx,
2712 const nir_intrinsic_instr *instr,
2713 LLVMValueRef dynamic_desc_index,
2714 struct ac_image_args *args,
2715 enum glsl_sampler_dim dim,
2716 bool is_array)
2717 {
2718 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2719 LLVMValueRef masks[] = {
2720 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2721 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2722 };
2723 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2724
2725 int count;
2726 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2727 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2728 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2729 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2730 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2731 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2732 count = image_type_to_components_count(dim, is_array);
2733
2734 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2735 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2736 LLVMValueRef fmask_load_address[3];
2737
2738 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2739 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2740 if (is_array)
2741 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2742 else
2743 fmask_load_address[2] = NULL;
2744
2745 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2746 fmask_load_address[0],
2747 fmask_load_address[1],
2748 fmask_load_address[2],
2749 sample_index,
2750 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2751 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2752 }
2753 if (count == 1 && !gfx9_1d) {
2754 if (instr->src[1].ssa->num_components)
2755 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2756 else
2757 args->coords[0] = src0;
2758 } else {
2759 int chan;
2760 if (is_ms)
2761 count--;
2762 for (chan = 0; chan < count; ++chan) {
2763 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2764 }
2765
2766 if (gfx9_1d) {
2767 if (is_array) {
2768 args->coords[2] = args->coords[1];
2769 args->coords[1] = ctx->ac.i32_0;
2770 } else
2771 args->coords[1] = ctx->ac.i32_0;
2772 count++;
2773 }
2774 if (ctx->ac.chip_class == GFX9 &&
2775 dim == GLSL_SAMPLER_DIM_2D &&
2776 !is_array) {
2777 /* The hw can't bind a slice of a 3D image as a 2D
2778 * image, because it ignores BASE_ARRAY if the target
2779 * is 3D. The workaround is to read BASE_ARRAY and set
2780 * it as the 3rd address operand for all 2D images.
2781 */
2782 LLVMValueRef first_layer, const5, mask;
2783
2784 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2785 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2786 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2787 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2788
2789 args->coords[count] = first_layer;
2790 count++;
2791 }
2792
2793
2794 if (is_ms) {
2795 args->coords[count] = sample_index;
2796 count++;
2797 }
2798 }
2799 }
2800
2801 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2802 const nir_intrinsic_instr *instr,
2803 LLVMValueRef dynamic_index,
2804 bool write, bool atomic)
2805 {
2806 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2807 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2808 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2809 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2810 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2811
2812 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2813 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2814 elem_count, stride, "");
2815
2816 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2817 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2818 }
2819 return rsrc;
2820 }
2821
2822 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2823 struct waterfall_context *wctx,
2824 const nir_intrinsic_instr *instr)
2825 {
2826 nir_deref_instr *deref_instr = NULL;
2827
2828 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2829 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2830
2831 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2832 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2833 }
2834
2835 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2836 const nir_intrinsic_instr *instr,
2837 bool bindless)
2838 {
2839 LLVMValueRef res;
2840
2841 enum glsl_sampler_dim dim;
2842 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2843 bool is_array;
2844 if (bindless) {
2845 dim = nir_intrinsic_image_dim(instr);
2846 is_array = nir_intrinsic_image_array(instr);
2847 } else {
2848 const nir_deref_instr *image_deref = get_image_deref(instr);
2849 const struct glsl_type *type = image_deref->type;
2850 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2851 dim = glsl_get_sampler_dim(type);
2852 access |= var->data.access;
2853 is_array = glsl_sampler_type_is_array(type);
2854 }
2855
2856 struct waterfall_context wctx;
2857 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2858
2859 struct ac_image_args args = {};
2860
2861 args.cache_policy = get_cache_policy(ctx, access, false, false);
2862
2863 if (dim == GLSL_SAMPLER_DIM_BUF) {
2864 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2865 unsigned num_channels = util_last_bit(mask);
2866 LLVMValueRef rsrc, vindex;
2867
2868 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2869 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2870 ctx->ac.i32_0, "");
2871
2872 assert(instr->dest.is_ssa);
2873 bool can_speculate = access & ACCESS_CAN_REORDER;
2874 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2875 ctx->ac.i32_0, num_channels,
2876 args.cache_policy,
2877 can_speculate,
2878 instr->dest.ssa.bit_size == 16);
2879 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2880
2881 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2882 res = ac_to_integer(&ctx->ac, res);
2883 } else {
2884 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2885
2886 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2887 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2888 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2889 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2890 if (!level_zero)
2891 args.lod = get_src(ctx, instr->src[3]);
2892 args.dmask = 15;
2893 args.attributes = AC_FUNC_ATTR_READONLY;
2894
2895 assert(instr->dest.is_ssa);
2896 args.d16 = instr->dest.ssa.bit_size == 16;
2897
2898 res = ac_build_image_opcode(&ctx->ac, &args);
2899 }
2900 return exit_waterfall(ctx, &wctx, res);
2901 }
2902
2903 static void visit_image_store(struct ac_nir_context *ctx,
2904 const nir_intrinsic_instr *instr,
2905 bool bindless)
2906 {
2907 if (ctx->ac.postponed_kill) {
2908 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2909 ctx->ac.postponed_kill, "");
2910 ac_build_ifcc(&ctx->ac, cond, 7003);
2911 }
2912
2913 enum glsl_sampler_dim dim;
2914 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2915 bool is_array;
2916
2917 if (bindless) {
2918 dim = nir_intrinsic_image_dim(instr);
2919 is_array = nir_intrinsic_image_array(instr);
2920 } else {
2921 const nir_deref_instr *image_deref = get_image_deref(instr);
2922 const struct glsl_type *type = image_deref->type;
2923 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2924 dim = glsl_get_sampler_dim(type);
2925 access |= var->data.access;
2926 is_array = glsl_sampler_type_is_array(type);
2927 }
2928
2929 struct waterfall_context wctx;
2930 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2931
2932 bool writeonly_memory = access & ACCESS_NON_READABLE;
2933 struct ac_image_args args = {};
2934
2935 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2936
2937 if (dim == GLSL_SAMPLER_DIM_BUF) {
2938 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2939 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2940 unsigned src_channels = ac_get_llvm_num_components(src);
2941 LLVMValueRef vindex;
2942
2943 if (src_channels == 3)
2944 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2945
2946 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2947 get_src(ctx, instr->src[1]),
2948 ctx->ac.i32_0, "");
2949
2950 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2951 ctx->ac.i32_0, args.cache_policy);
2952 } else {
2953 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2954
2955 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2956 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2957 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2958 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2959 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2960 if (!level_zero)
2961 args.lod = get_src(ctx, instr->src[4]);
2962 args.dmask = 15;
2963 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2964
2965 ac_build_image_opcode(&ctx->ac, &args);
2966 }
2967
2968 exit_waterfall(ctx, &wctx, NULL);
2969 if (ctx->ac.postponed_kill)
2970 ac_build_endif(&ctx->ac, 7003);
2971 }
2972
2973 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2974 const nir_intrinsic_instr *instr,
2975 bool bindless)
2976 {
2977 if (ctx->ac.postponed_kill) {
2978 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2979 ctx->ac.postponed_kill, "");
2980 ac_build_ifcc(&ctx->ac, cond, 7004);
2981 }
2982
2983 LLVMValueRef params[7];
2984 int param_count = 0;
2985
2986 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2987 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2988 const char *atomic_name;
2989 char intrinsic_name[64];
2990 enum ac_atomic_op atomic_subop;
2991 ASSERTED int length;
2992
2993 enum glsl_sampler_dim dim;
2994 bool is_array;
2995 if (bindless) {
2996 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2997 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2998 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2999 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
3000 ASSERTED const GLenum format = nir_intrinsic_format(instr);
3001 assert(format == GL_R32UI || format == GL_R32I);
3002 }
3003 dim = nir_intrinsic_image_dim(instr);
3004 is_array = nir_intrinsic_image_array(instr);
3005 } else {
3006 const struct glsl_type *type = get_image_deref(instr)->type;
3007 dim = glsl_get_sampler_dim(type);
3008 is_array = glsl_sampler_type_is_array(type);
3009 }
3010
3011 struct waterfall_context wctx;
3012 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3013
3014 switch (instr->intrinsic) {
3015 case nir_intrinsic_bindless_image_atomic_add:
3016 case nir_intrinsic_image_deref_atomic_add:
3017 atomic_name = "add";
3018 atomic_subop = ac_atomic_add;
3019 break;
3020 case nir_intrinsic_bindless_image_atomic_imin:
3021 case nir_intrinsic_image_deref_atomic_imin:
3022 atomic_name = "smin";
3023 atomic_subop = ac_atomic_smin;
3024 break;
3025 case nir_intrinsic_bindless_image_atomic_umin:
3026 case nir_intrinsic_image_deref_atomic_umin:
3027 atomic_name = "umin";
3028 atomic_subop = ac_atomic_umin;
3029 break;
3030 case nir_intrinsic_bindless_image_atomic_imax:
3031 case nir_intrinsic_image_deref_atomic_imax:
3032 atomic_name = "smax";
3033 atomic_subop = ac_atomic_smax;
3034 break;
3035 case nir_intrinsic_bindless_image_atomic_umax:
3036 case nir_intrinsic_image_deref_atomic_umax:
3037 atomic_name = "umax";
3038 atomic_subop = ac_atomic_umax;
3039 break;
3040 case nir_intrinsic_bindless_image_atomic_and:
3041 case nir_intrinsic_image_deref_atomic_and:
3042 atomic_name = "and";
3043 atomic_subop = ac_atomic_and;
3044 break;
3045 case nir_intrinsic_bindless_image_atomic_or:
3046 case nir_intrinsic_image_deref_atomic_or:
3047 atomic_name = "or";
3048 atomic_subop = ac_atomic_or;
3049 break;
3050 case nir_intrinsic_bindless_image_atomic_xor:
3051 case nir_intrinsic_image_deref_atomic_xor:
3052 atomic_name = "xor";
3053 atomic_subop = ac_atomic_xor;
3054 break;
3055 case nir_intrinsic_bindless_image_atomic_exchange:
3056 case nir_intrinsic_image_deref_atomic_exchange:
3057 atomic_name = "swap";
3058 atomic_subop = ac_atomic_swap;
3059 break;
3060 case nir_intrinsic_bindless_image_atomic_comp_swap:
3061 case nir_intrinsic_image_deref_atomic_comp_swap:
3062 atomic_name = "cmpswap";
3063 atomic_subop = 0; /* not used */
3064 break;
3065 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3066 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3067 atomic_name = "inc";
3068 atomic_subop = ac_atomic_inc_wrap;
3069 break;
3070 }
3071 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3072 case nir_intrinsic_image_deref_atomic_dec_wrap:
3073 atomic_name = "dec";
3074 atomic_subop = ac_atomic_dec_wrap;
3075 break;
3076 default:
3077 abort();
3078 }
3079
3080 if (cmpswap)
3081 params[param_count++] = get_src(ctx, instr->src[4]);
3082 params[param_count++] = get_src(ctx, instr->src[3]);
3083
3084 LLVMValueRef result;
3085 if (dim == GLSL_SAMPLER_DIM_BUF) {
3086 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3087 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3088 ctx->ac.i32_0, ""); /* vindex */
3089 params[param_count++] = ctx->ac.i32_0; /* voffset */
3090 if (LLVM_VERSION_MAJOR >= 9) {
3091 /* XXX: The new raw/struct atomic intrinsics are buggy
3092 * with LLVM 8, see r358579.
3093 */
3094 params[param_count++] = ctx->ac.i32_0; /* soffset */
3095 params[param_count++] = ctx->ac.i32_0; /* slc */
3096
3097 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3098 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3099 } else {
3100 params[param_count++] = ctx->ac.i1false; /* slc */
3101
3102 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3103 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3104 }
3105
3106 assert(length < sizeof(intrinsic_name));
3107 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3108 params, param_count, 0);
3109 } else {
3110 struct ac_image_args args = {};
3111 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3112 args.atomic = atomic_subop;
3113 args.data[0] = params[0];
3114 if (cmpswap)
3115 args.data[1] = params[1];
3116 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3117 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3118 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3119
3120 result = ac_build_image_opcode(&ctx->ac, &args);
3121 }
3122
3123 result = exit_waterfall(ctx, &wctx, result);
3124 if (ctx->ac.postponed_kill)
3125 ac_build_endif(&ctx->ac, 7004);
3126 return result;
3127 }
3128
3129 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3130 nir_intrinsic_instr *instr)
3131 {
3132 struct waterfall_context wctx;
3133 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3134 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3135
3136 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3137
3138 return exit_waterfall(ctx, &wctx, ret);
3139 }
3140
3141 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3142 const nir_intrinsic_instr *instr,
3143 bool bindless)
3144 {
3145 LLVMValueRef res;
3146
3147 enum glsl_sampler_dim dim;
3148 bool is_array;
3149 if (bindless) {
3150 dim = nir_intrinsic_image_dim(instr);
3151 is_array = nir_intrinsic_image_array(instr);
3152 } else {
3153 const struct glsl_type *type = get_image_deref(instr)->type;
3154 dim = glsl_get_sampler_dim(type);
3155 is_array = glsl_sampler_type_is_array(type);
3156 }
3157
3158 struct waterfall_context wctx;
3159 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3160
3161 if (dim == GLSL_SAMPLER_DIM_BUF) {
3162 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3163 } else {
3164
3165 struct ac_image_args args = { 0 };
3166
3167 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3168 args.dmask = 0xf;
3169 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3170 args.opcode = ac_image_get_resinfo;
3171 assert(nir_src_as_uint(instr->src[1]) == 0);
3172 args.lod = ctx->ac.i32_0;
3173 args.attributes = AC_FUNC_ATTR_READNONE;
3174
3175 res = ac_build_image_opcode(&ctx->ac, &args);
3176
3177 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3178
3179 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3180 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3181 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3182 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3183 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3184 }
3185
3186 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3187 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3188 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3189 ctx->ac.i32_1, "");
3190 }
3191 }
3192 return exit_waterfall(ctx, &wctx, res);
3193 }
3194
3195 static void emit_membar(struct ac_llvm_context *ac,
3196 const nir_intrinsic_instr *instr)
3197 {
3198 unsigned wait_flags = 0;
3199
3200 switch (instr->intrinsic) {
3201 case nir_intrinsic_memory_barrier:
3202 case nir_intrinsic_group_memory_barrier:
3203 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3204 break;
3205 case nir_intrinsic_memory_barrier_buffer:
3206 case nir_intrinsic_memory_barrier_image:
3207 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3208 break;
3209 case nir_intrinsic_memory_barrier_shared:
3210 wait_flags = AC_WAIT_LGKM;
3211 break;
3212 default:
3213 break;
3214 }
3215
3216 ac_build_waitcnt(ac, wait_flags);
3217 }
3218
3219 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3220 {
3221 /* GFX6 only (thanks to a hw bug workaround):
3222 * The real barrier instruction isn’t needed, because an entire patch
3223 * always fits into a single wave.
3224 */
3225 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3226 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3227 return;
3228 }
3229 ac_build_s_barrier(ac);
3230 }
3231
3232 static void emit_discard(struct ac_nir_context *ctx,
3233 const nir_intrinsic_instr *instr)
3234 {
3235 LLVMValueRef cond;
3236
3237 if (instr->intrinsic == nir_intrinsic_discard_if) {
3238 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3239 get_src(ctx, instr->src[0]),
3240 ctx->ac.i32_0, "");
3241 } else {
3242 assert(instr->intrinsic == nir_intrinsic_discard);
3243 cond = ctx->ac.i1false;
3244 }
3245
3246 ac_build_kill_if_false(&ctx->ac, cond);
3247 }
3248
3249 static void emit_demote(struct ac_nir_context *ctx,
3250 const nir_intrinsic_instr *instr)
3251 {
3252 LLVMValueRef cond;
3253
3254 if (instr->intrinsic == nir_intrinsic_demote_if) {
3255 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3256 get_src(ctx, instr->src[0]),
3257 ctx->ac.i32_0, "");
3258 } else {
3259 assert(instr->intrinsic == nir_intrinsic_demote);
3260 cond = ctx->ac.i1false;
3261 }
3262
3263 /* Kill immediately while maintaining WQM. */
3264 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3265
3266 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3267 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3268 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3269 return;
3270 }
3271
3272 static LLVMValueRef
3273 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3274 {
3275 LLVMValueRef result;
3276 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3277 result = LLVMBuildAnd(ctx->ac.builder,
3278 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3279 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3280
3281 if (ctx->ac.wave_size == 32)
3282 result = LLVMBuildLShr(ctx->ac.builder, result,
3283 LLVMConstInt(ctx->ac.i32, 1, false), "");
3284
3285 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3286 }
3287
3288 static LLVMValueRef
3289 visit_load_subgroup_id(struct ac_nir_context *ctx)
3290 {
3291 if (ctx->stage == MESA_SHADER_COMPUTE) {
3292 LLVMValueRef result;
3293 result = LLVMBuildAnd(ctx->ac.builder,
3294 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3295 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3296 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3297 } else {
3298 return LLVMConstInt(ctx->ac.i32, 0, false);
3299 }
3300 }
3301
3302 static LLVMValueRef
3303 visit_load_num_subgroups(struct ac_nir_context *ctx)
3304 {
3305 if (ctx->stage == MESA_SHADER_COMPUTE) {
3306 return LLVMBuildAnd(ctx->ac.builder,
3307 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3308 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3309 } else {
3310 return LLVMConstInt(ctx->ac.i32, 1, false);
3311 }
3312 }
3313
3314 static LLVMValueRef
3315 visit_first_invocation(struct ac_nir_context *ctx)
3316 {
3317 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3318 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3319
3320 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3321 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3322 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3323 ctx->ac.iN_wavemask, args, 2,
3324 AC_FUNC_ATTR_NOUNWIND |
3325 AC_FUNC_ATTR_READNONE);
3326
3327 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3328 }
3329
3330 static LLVMValueRef
3331 visit_load_shared(struct ac_nir_context *ctx,
3332 const nir_intrinsic_instr *instr)
3333 {
3334 LLVMValueRef values[4], derived_ptr, index, ret;
3335
3336 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3337 instr->dest.ssa.bit_size);
3338
3339 for (int chan = 0; chan < instr->num_components; chan++) {
3340 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3341 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3342 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3343 }
3344
3345 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3346 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3347 }
3348
3349 static void
3350 visit_store_shared(struct ac_nir_context *ctx,
3351 const nir_intrinsic_instr *instr)
3352 {
3353 LLVMValueRef derived_ptr, data,index;
3354 LLVMBuilderRef builder = ctx->ac.builder;
3355
3356 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3357 instr->src[0].ssa->bit_size);
3358 LLVMValueRef src = get_src(ctx, instr->src[0]);
3359
3360 int writemask = nir_intrinsic_write_mask(instr);
3361 for (int chan = 0; chan < 4; chan++) {
3362 if (!(writemask & (1 << chan))) {
3363 continue;
3364 }
3365 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3366 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3367 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3368 LLVMBuildStore(builder, data, derived_ptr);
3369 }
3370 }
3371
3372 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3373 const nir_intrinsic_instr *instr,
3374 LLVMValueRef ptr, int src_idx)
3375 {
3376 if (ctx->ac.postponed_kill) {
3377 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3378 ctx->ac.postponed_kill, "");
3379 ac_build_ifcc(&ctx->ac, cond, 7005);
3380 }
3381
3382 LLVMValueRef result;
3383 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3384
3385 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3386
3387 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3388 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3389 if (deref->mode == nir_var_mem_global) {
3390 /* use "singlethread" sync scope to implement relaxed ordering */
3391 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3392
3393 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3394 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3395 }
3396 }
3397
3398 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3399 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3400 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3401 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3402 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3403 } else {
3404 LLVMAtomicRMWBinOp op;
3405 switch (instr->intrinsic) {
3406 case nir_intrinsic_shared_atomic_add:
3407 case nir_intrinsic_deref_atomic_add:
3408 op = LLVMAtomicRMWBinOpAdd;
3409 break;
3410 case nir_intrinsic_shared_atomic_umin:
3411 case nir_intrinsic_deref_atomic_umin:
3412 op = LLVMAtomicRMWBinOpUMin;
3413 break;
3414 case nir_intrinsic_shared_atomic_umax:
3415 case nir_intrinsic_deref_atomic_umax:
3416 op = LLVMAtomicRMWBinOpUMax;
3417 break;
3418 case nir_intrinsic_shared_atomic_imin:
3419 case nir_intrinsic_deref_atomic_imin:
3420 op = LLVMAtomicRMWBinOpMin;
3421 break;
3422 case nir_intrinsic_shared_atomic_imax:
3423 case nir_intrinsic_deref_atomic_imax:
3424 op = LLVMAtomicRMWBinOpMax;
3425 break;
3426 case nir_intrinsic_shared_atomic_and:
3427 case nir_intrinsic_deref_atomic_and:
3428 op = LLVMAtomicRMWBinOpAnd;
3429 break;
3430 case nir_intrinsic_shared_atomic_or:
3431 case nir_intrinsic_deref_atomic_or:
3432 op = LLVMAtomicRMWBinOpOr;
3433 break;
3434 case nir_intrinsic_shared_atomic_xor:
3435 case nir_intrinsic_deref_atomic_xor:
3436 op = LLVMAtomicRMWBinOpXor;
3437 break;
3438 case nir_intrinsic_shared_atomic_exchange:
3439 case nir_intrinsic_deref_atomic_exchange:
3440 op = LLVMAtomicRMWBinOpXchg;
3441 break;
3442 #if LLVM_VERSION_MAJOR >= 10
3443 case nir_intrinsic_shared_atomic_fadd:
3444 case nir_intrinsic_deref_atomic_fadd:
3445 op = LLVMAtomicRMWBinOpFAdd;
3446 break;
3447 #endif
3448 default:
3449 return NULL;
3450 }
3451
3452 LLVMValueRef val;
3453
3454 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3455 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3456 val = ac_to_float(&ctx->ac, src);
3457 } else {
3458 val = ac_to_integer(&ctx->ac, src);
3459 }
3460
3461 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3462 }
3463
3464 if (ctx->ac.postponed_kill)
3465 ac_build_endif(&ctx->ac, 7005);
3466 return result;
3467 }
3468
3469 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3470 {
3471 LLVMValueRef values[2];
3472 LLVMValueRef pos[2];
3473
3474 pos[0] = ac_to_float(&ctx->ac,
3475 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3476 pos[1] = ac_to_float(&ctx->ac,
3477 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3478
3479 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3480 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3481 return ac_build_gather_values(&ctx->ac, values, 2);
3482 }
3483
3484 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3485 enum glsl_interp_mode interp, unsigned location)
3486 {
3487 switch (interp) {
3488 case INTERP_MODE_FLAT:
3489 default:
3490 return NULL;
3491 case INTERP_MODE_SMOOTH:
3492 case INTERP_MODE_NONE:
3493 if (location == INTERP_CENTER)
3494 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3495 else if (location == INTERP_CENTROID)
3496 return ctx->abi->persp_centroid;
3497 else if (location == INTERP_SAMPLE)
3498 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3499 break;
3500 case INTERP_MODE_NOPERSPECTIVE:
3501 if (location == INTERP_CENTER)
3502 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3503 else if (location == INTERP_CENTROID)
3504 return ctx->abi->linear_centroid;
3505 else if (location == INTERP_SAMPLE)
3506 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3507 break;
3508 }
3509 return NULL;
3510 }
3511
3512 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3513 unsigned mode)
3514 {
3515 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3516 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3517 }
3518
3519 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3520 unsigned mode,
3521 LLVMValueRef offset)
3522 {
3523 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3524 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3525 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3526
3527 LLVMValueRef ij_out[2];
3528 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3529
3530 /*
3531 * take the I then J parameters, and the DDX/Y for it, and
3532 * calculate the IJ inputs for the interpolator.
3533 * temp1 = ddx * offset/sample.x + I;
3534 * interp_param.I = ddy * offset/sample.y + temp1;
3535 * temp1 = ddx * offset/sample.x + J;
3536 * interp_param.J = ddy * offset/sample.y + temp1;
3537 */
3538 for (unsigned i = 0; i < 2; i++) {
3539 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3540 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3541 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3542 ddxy_out, ix_ll, "");
3543 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3544 ddxy_out, iy_ll, "");
3545 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3546 interp_param, ix_ll, "");
3547 LLVMValueRef temp1, temp2;
3548
3549 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3550 ctx->ac.f32, "");
3551
3552 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3553 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3554
3555 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3556 temp2, ctx->ac.i32, "");
3557 }
3558 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3559 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3560 }
3561
3562 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3563 unsigned mode)
3564 {
3565 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3566 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3567 }
3568
3569 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3570 unsigned mode,
3571 LLVMValueRef sample_id)
3572 {
3573 if (ctx->abi->interp_at_sample_force_center)
3574 return barycentric_center(ctx, mode);
3575
3576 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3577
3578 /* fetch sample ID */
3579 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3580
3581 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3582 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3583 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3584 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3585 LLVMValueRef coords[] = { src_c0, src_c1 };
3586 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3587
3588 return barycentric_offset(ctx, mode, offset);
3589 }
3590
3591
3592 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3593 unsigned mode)
3594 {
3595 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3596 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3597 }
3598
3599 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3600 {
3601 return LLVMBuildBitCast(ctx->ac.builder,
3602 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3603 ctx->ac.v3i32, "");
3604 }
3605
3606 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3607 LLVMValueRef interp_param,
3608 unsigned index, unsigned comp_start,
3609 unsigned num_components,
3610 unsigned bitsize)
3611 {
3612 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3613 LLVMValueRef interp_param_f;
3614
3615 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3616 interp_param, ctx->ac.v2f32, "");
3617 LLVMValueRef i = LLVMBuildExtractElement(
3618 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3619 LLVMValueRef j = LLVMBuildExtractElement(
3620 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3621
3622 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3623 if (ctx->verified_interp &&
3624 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3625 LLVMValueRef args[2];
3626 args[0] = i;
3627 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3628 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3629 args, 2, AC_FUNC_ATTR_READNONE);
3630 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3631 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3632 }
3633
3634 LLVMValueRef values[4];
3635 assert(bitsize == 16 || bitsize == 32);
3636 for (unsigned comp = 0; comp < num_components; comp++) {
3637 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3638 if (bitsize == 16) {
3639 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3640 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3641 } else {
3642 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3643 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3644 }
3645 }
3646
3647 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3648 }
3649
3650 static LLVMValueRef visit_load(struct ac_nir_context *ctx,
3651 nir_intrinsic_instr *instr, bool is_output)
3652 {
3653 LLVMValueRef values[8];
3654 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
3655 LLVMTypeRef component_type;
3656 unsigned base = nir_intrinsic_base(instr);
3657 unsigned component = nir_intrinsic_component(instr);
3658 unsigned count = instr->dest.ssa.num_components *
3659 (instr->dest.ssa.bit_size == 64 ? 2 : 1);
3660 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
3661 LLVMValueRef vertex_index =
3662 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
3663 nir_src offset = *nir_get_io_offset_src(instr);
3664 LLVMValueRef indir_index = NULL;
3665
3666 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
3667 component_type = LLVMGetElementType(dest_type);
3668 else
3669 component_type = dest_type;
3670
3671 if (nir_src_is_const(offset))
3672 assert(nir_src_as_uint(offset) == 0);
3673 else
3674 indir_index = get_src(ctx, offset);
3675
3676 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
3677 (ctx->stage == MESA_SHADER_TESS_EVAL && !is_output)) {
3678 LLVMValueRef result =
3679 ctx->abi->load_tess_varyings(ctx->abi, component_type,
3680 vertex_index, indir_index,
3681 0, 0, base * 4,
3682 component,
3683 instr->num_components,
3684 false, false, !is_output);
3685 if (instr->dest.ssa.bit_size == 16) {
3686 result = ac_to_integer(&ctx->ac, result);
3687 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
3688 }
3689 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3690 }
3691
3692 /* No indirect indexing is allowed after this point. */
3693 assert(!indir_index);
3694
3695 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3696 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3697 assert(nir_src_is_const(*vertex_index_src));
3698
3699 return ctx->abi->load_inputs(ctx->abi, 0, base * 4, component,
3700 instr->num_components,
3701 nir_src_as_uint(*vertex_index_src),
3702 0, type);
3703 }
3704
3705 if (ctx->stage == MESA_SHADER_FRAGMENT && is_output &&
3706 nir_intrinsic_io_semantics(instr).fb_fetch_output)
3707 return ctx->abi->emit_fbfetch(ctx->abi);
3708
3709 /* Other non-fragment cases have inputs and outputs in temporaries. */
3710 if (ctx->stage != MESA_SHADER_FRAGMENT) {
3711 for (unsigned chan = component; chan < count + component; chan++) {
3712 if (is_output) {
3713 values[chan] = LLVMBuildLoad(ctx->ac.builder,
3714 ctx->abi->outputs[base * 4 + chan], "");
3715 } else {
3716 values[chan] = ctx->abi->inputs[base * 4 + chan];
3717 if (!values[chan])
3718 values[chan] = LLVMGetUndef(ctx->ac.i32);
3719 }
3720 }
3721 LLVMValueRef result = ac_build_varying_gather_values(&ctx->ac, values, count, component);
3722 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3723 }
3724
3725 /* Fragment shader inputs. */
3726 unsigned vertex_id = 2; /* P0 */
3727
3728 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3729 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3730
3731 switch (src0[0].i32) {
3732 case 0:
3733 vertex_id = 2;
3734 break;
3735 case 1:
3736 vertex_id = 0;
3737 break;
3738 case 2:
3739 vertex_id = 1;
3740 break;
3741 default:
3742 unreachable("Invalid vertex index");
3743 }
3744 }
3745
3746 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, base, false);
3747
3748 for (unsigned chan = 0; chan < count; chan++) {
3749 if (component + chan > 4)
3750 attr_number = LLVMConstInt(ctx->ac.i32, base + 1, false);
3751 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3752 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3753 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3754 llvm_chan,
3755 attr_number,
3756 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3757 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3758 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3759 instr->dest.ssa.bit_size == 16 ? ctx->ac.i16
3760 : ctx->ac.i32, "");
3761 }
3762
3763 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, count);
3764 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3765 }
3766
3767 static void visit_intrinsic(struct ac_nir_context *ctx,
3768 nir_intrinsic_instr *instr)
3769 {
3770 LLVMValueRef result = NULL;
3771
3772 switch (instr->intrinsic) {
3773 case nir_intrinsic_ballot:
3774 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3775 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3776 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3777 break;
3778 case nir_intrinsic_read_invocation:
3779 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3780 get_src(ctx, instr->src[1]));
3781 break;
3782 case nir_intrinsic_read_first_invocation:
3783 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3784 break;
3785 case nir_intrinsic_load_subgroup_invocation:
3786 result = ac_get_thread_id(&ctx->ac);
3787 break;
3788 case nir_intrinsic_load_work_group_id: {
3789 LLVMValueRef values[3];
3790
3791 for (int i = 0; i < 3; i++) {
3792 values[i] = ctx->args->workgroup_ids[i].used ?
3793 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3794 }
3795
3796 result = ac_build_gather_values(&ctx->ac, values, 3);
3797 break;
3798 }
3799 case nir_intrinsic_load_base_vertex:
3800 case nir_intrinsic_load_first_vertex:
3801 result = ctx->abi->load_base_vertex(ctx->abi);
3802 break;
3803 case nir_intrinsic_load_local_group_size:
3804 result = ctx->abi->load_local_group_size(ctx->abi);
3805 break;
3806 case nir_intrinsic_load_vertex_id:
3807 result = LLVMBuildAdd(ctx->ac.builder,
3808 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3809 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3810 break;
3811 case nir_intrinsic_load_vertex_id_zero_base: {
3812 result = ctx->abi->vertex_id;
3813 break;
3814 }
3815 case nir_intrinsic_load_local_invocation_id: {
3816 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3817 break;
3818 }
3819 case nir_intrinsic_load_base_instance:
3820 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3821 break;
3822 case nir_intrinsic_load_draw_id:
3823 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3824 break;
3825 case nir_intrinsic_load_view_index:
3826 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3827 break;
3828 case nir_intrinsic_load_invocation_id:
3829 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3830 result = ac_unpack_param(&ctx->ac,
3831 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3832 8, 5);
3833 } else {
3834 if (ctx->ac.chip_class >= GFX10) {
3835 result = LLVMBuildAnd(ctx->ac.builder,
3836 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3837 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3838 } else {
3839 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3840 }
3841 }
3842 break;
3843 case nir_intrinsic_load_primitive_id:
3844 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3845 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3846 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3847 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3848 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3849 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3850 } else
3851 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3852 break;
3853 case nir_intrinsic_load_sample_id:
3854 result = ac_unpack_param(&ctx->ac,
3855 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3856 8, 4);
3857 break;
3858 case nir_intrinsic_load_sample_pos:
3859 result = load_sample_pos(ctx);
3860 break;
3861 case nir_intrinsic_load_sample_mask_in:
3862 result = ctx->abi->load_sample_mask_in(ctx->abi);
3863 break;
3864 case nir_intrinsic_load_frag_coord: {
3865 LLVMValueRef values[4] = {
3866 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3867 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3868 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3869 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3870 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3871 };
3872 result = ac_to_integer(&ctx->ac,
3873 ac_build_gather_values(&ctx->ac, values, 4));
3874 break;
3875 }
3876 case nir_intrinsic_load_layer_id:
3877 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3878 break;
3879 case nir_intrinsic_load_front_face:
3880 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3881 break;
3882 case nir_intrinsic_load_helper_invocation:
3883 result = ac_build_load_helper_invocation(&ctx->ac);
3884 break;
3885 case nir_intrinsic_is_helper_invocation:
3886 result = ac_build_is_helper_invocation(&ctx->ac);
3887 break;
3888 case nir_intrinsic_load_color0:
3889 result = ctx->abi->color0;
3890 break;
3891 case nir_intrinsic_load_color1:
3892 result = ctx->abi->color1;
3893 break;
3894 case nir_intrinsic_load_user_data_amd:
3895 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3896 result = ctx->abi->user_data;
3897 break;
3898 case nir_intrinsic_load_instance_id:
3899 result = ctx->abi->instance_id;
3900 break;
3901 case nir_intrinsic_load_num_work_groups:
3902 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3903 break;
3904 case nir_intrinsic_load_local_invocation_index:
3905 result = visit_load_local_invocation_index(ctx);
3906 break;
3907 case nir_intrinsic_load_subgroup_id:
3908 result = visit_load_subgroup_id(ctx);
3909 break;
3910 case nir_intrinsic_load_num_subgroups:
3911 result = visit_load_num_subgroups(ctx);
3912 break;
3913 case nir_intrinsic_first_invocation:
3914 result = visit_first_invocation(ctx);
3915 break;
3916 case nir_intrinsic_load_push_constant:
3917 result = visit_load_push_constant(ctx, instr);
3918 break;
3919 case nir_intrinsic_vulkan_resource_index: {
3920 LLVMValueRef index = get_src(ctx, instr->src[0]);
3921 unsigned desc_set = nir_intrinsic_desc_set(instr);
3922 unsigned binding = nir_intrinsic_binding(instr);
3923
3924 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3925 binding);
3926 break;
3927 }
3928 case nir_intrinsic_vulkan_resource_reindex:
3929 result = visit_vulkan_resource_reindex(ctx, instr);
3930 break;
3931 case nir_intrinsic_store_ssbo:
3932 visit_store_ssbo(ctx, instr);
3933 break;
3934 case nir_intrinsic_load_ssbo:
3935 result = visit_load_buffer(ctx, instr);
3936 break;
3937 case nir_intrinsic_ssbo_atomic_add:
3938 case nir_intrinsic_ssbo_atomic_imin:
3939 case nir_intrinsic_ssbo_atomic_umin:
3940 case nir_intrinsic_ssbo_atomic_imax:
3941 case nir_intrinsic_ssbo_atomic_umax:
3942 case nir_intrinsic_ssbo_atomic_and:
3943 case nir_intrinsic_ssbo_atomic_or:
3944 case nir_intrinsic_ssbo_atomic_xor:
3945 case nir_intrinsic_ssbo_atomic_exchange:
3946 case nir_intrinsic_ssbo_atomic_comp_swap:
3947 result = visit_atomic_ssbo(ctx, instr);
3948 break;
3949 case nir_intrinsic_load_ubo:
3950 result = visit_load_ubo_buffer(ctx, instr);
3951 break;
3952 case nir_intrinsic_get_buffer_size:
3953 result = visit_get_buffer_size(ctx, instr);
3954 break;
3955 case nir_intrinsic_load_deref:
3956 result = visit_load_var(ctx, instr);
3957 break;
3958 case nir_intrinsic_store_deref:
3959 visit_store_var(ctx, instr);
3960 break;
3961 case nir_intrinsic_load_input:
3962 case nir_intrinsic_load_input_vertex:
3963 case nir_intrinsic_load_per_vertex_input:
3964 result = visit_load(ctx, instr, false);
3965 break;
3966 case nir_intrinsic_load_output:
3967 case nir_intrinsic_load_per_vertex_output:
3968 result = visit_load(ctx, instr, true);
3969 break;
3970 case nir_intrinsic_store_output:
3971 case nir_intrinsic_store_per_vertex_output:
3972 visit_store_output(ctx, instr);
3973 break;
3974 case nir_intrinsic_load_shared:
3975 result = visit_load_shared(ctx, instr);
3976 break;
3977 case nir_intrinsic_store_shared:
3978 visit_store_shared(ctx, instr);
3979 break;
3980 case nir_intrinsic_bindless_image_samples:
3981 case nir_intrinsic_image_deref_samples:
3982 result = visit_image_samples(ctx, instr);
3983 break;
3984 case nir_intrinsic_bindless_image_load:
3985 result = visit_image_load(ctx, instr, true);
3986 break;
3987 case nir_intrinsic_image_deref_load:
3988 result = visit_image_load(ctx, instr, false);
3989 break;
3990 case nir_intrinsic_bindless_image_store:
3991 visit_image_store(ctx, instr, true);
3992 break;
3993 case nir_intrinsic_image_deref_store:
3994 visit_image_store(ctx, instr, false);
3995 break;
3996 case nir_intrinsic_bindless_image_atomic_add:
3997 case nir_intrinsic_bindless_image_atomic_imin:
3998 case nir_intrinsic_bindless_image_atomic_umin:
3999 case nir_intrinsic_bindless_image_atomic_imax:
4000 case nir_intrinsic_bindless_image_atomic_umax:
4001 case nir_intrinsic_bindless_image_atomic_and:
4002 case nir_intrinsic_bindless_image_atomic_or:
4003 case nir_intrinsic_bindless_image_atomic_xor:
4004 case nir_intrinsic_bindless_image_atomic_exchange:
4005 case nir_intrinsic_bindless_image_atomic_comp_swap:
4006 case nir_intrinsic_bindless_image_atomic_inc_wrap:
4007 case nir_intrinsic_bindless_image_atomic_dec_wrap:
4008 result = visit_image_atomic(ctx, instr, true);
4009 break;
4010 case nir_intrinsic_image_deref_atomic_add:
4011 case nir_intrinsic_image_deref_atomic_imin:
4012 case nir_intrinsic_image_deref_atomic_umin:
4013 case nir_intrinsic_image_deref_atomic_imax:
4014 case nir_intrinsic_image_deref_atomic_umax:
4015 case nir_intrinsic_image_deref_atomic_and:
4016 case nir_intrinsic_image_deref_atomic_or:
4017 case nir_intrinsic_image_deref_atomic_xor:
4018 case nir_intrinsic_image_deref_atomic_exchange:
4019 case nir_intrinsic_image_deref_atomic_comp_swap:
4020 case nir_intrinsic_image_deref_atomic_inc_wrap:
4021 case nir_intrinsic_image_deref_atomic_dec_wrap:
4022 result = visit_image_atomic(ctx, instr, false);
4023 break;
4024 case nir_intrinsic_bindless_image_size:
4025 result = visit_image_size(ctx, instr, true);
4026 break;
4027 case nir_intrinsic_image_deref_size:
4028 result = visit_image_size(ctx, instr, false);
4029 break;
4030 case nir_intrinsic_shader_clock:
4031 result = ac_build_shader_clock(&ctx->ac,
4032 nir_intrinsic_memory_scope(instr));
4033 break;
4034 case nir_intrinsic_discard:
4035 case nir_intrinsic_discard_if:
4036 emit_discard(ctx, instr);
4037 break;
4038 case nir_intrinsic_demote:
4039 case nir_intrinsic_demote_if:
4040 emit_demote(ctx, instr);
4041 break;
4042 case nir_intrinsic_memory_barrier:
4043 case nir_intrinsic_group_memory_barrier:
4044 case nir_intrinsic_memory_barrier_buffer:
4045 case nir_intrinsic_memory_barrier_image:
4046 case nir_intrinsic_memory_barrier_shared:
4047 emit_membar(&ctx->ac, instr);
4048 break;
4049 case nir_intrinsic_scoped_barrier: {
4050 assert(!(nir_intrinsic_memory_semantics(instr) &
4051 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
4052
4053 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
4054
4055 unsigned wait_flags = 0;
4056 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
4057 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
4058 if (modes & nir_var_mem_shared)
4059 wait_flags |= AC_WAIT_LGKM;
4060
4061 if (wait_flags)
4062 ac_build_waitcnt(&ctx->ac, wait_flags);
4063
4064 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
4065 ac_emit_barrier(&ctx->ac, ctx->stage);
4066 break;
4067 }
4068 case nir_intrinsic_memory_barrier_tcs_patch:
4069 break;
4070 case nir_intrinsic_control_barrier:
4071 ac_emit_barrier(&ctx->ac, ctx->stage);
4072 break;
4073 case nir_intrinsic_shared_atomic_add:
4074 case nir_intrinsic_shared_atomic_imin:
4075 case nir_intrinsic_shared_atomic_umin:
4076 case nir_intrinsic_shared_atomic_imax:
4077 case nir_intrinsic_shared_atomic_umax:
4078 case nir_intrinsic_shared_atomic_and:
4079 case nir_intrinsic_shared_atomic_or:
4080 case nir_intrinsic_shared_atomic_xor:
4081 case nir_intrinsic_shared_atomic_exchange:
4082 case nir_intrinsic_shared_atomic_comp_swap:
4083 case nir_intrinsic_shared_atomic_fadd: {
4084 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
4085 instr->src[1].ssa->bit_size);
4086 result = visit_var_atomic(ctx, instr, ptr, 1);
4087 break;
4088 }
4089 case nir_intrinsic_deref_atomic_add:
4090 case nir_intrinsic_deref_atomic_imin:
4091 case nir_intrinsic_deref_atomic_umin:
4092 case nir_intrinsic_deref_atomic_imax:
4093 case nir_intrinsic_deref_atomic_umax:
4094 case nir_intrinsic_deref_atomic_and:
4095 case nir_intrinsic_deref_atomic_or:
4096 case nir_intrinsic_deref_atomic_xor:
4097 case nir_intrinsic_deref_atomic_exchange:
4098 case nir_intrinsic_deref_atomic_comp_swap:
4099 case nir_intrinsic_deref_atomic_fadd: {
4100 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
4101 result = visit_var_atomic(ctx, instr, ptr, 1);
4102 break;
4103 }
4104 case nir_intrinsic_load_barycentric_pixel:
4105 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
4106 break;
4107 case nir_intrinsic_load_barycentric_centroid:
4108 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
4109 break;
4110 case nir_intrinsic_load_barycentric_sample:
4111 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
4112 break;
4113 case nir_intrinsic_load_barycentric_model:
4114 result = barycentric_model(ctx);
4115 break;
4116 case nir_intrinsic_load_barycentric_at_offset: {
4117 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
4118 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
4119 break;
4120 }
4121 case nir_intrinsic_load_barycentric_at_sample: {
4122 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
4123 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
4124 break;
4125 }
4126 case nir_intrinsic_load_interpolated_input: {
4127 /* We assume any indirect loads have been lowered away */
4128 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
4129 assert(offset);
4130 assert(offset[0].i32 == 0);
4131
4132 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
4133 unsigned index = nir_intrinsic_base(instr);
4134 unsigned component = nir_intrinsic_component(instr);
4135 result = load_interpolated_input(ctx, interp_param, index,
4136 component,
4137 instr->dest.ssa.num_components,
4138 instr->dest.ssa.bit_size);
4139 break;
4140 }
4141 case nir_intrinsic_emit_vertex:
4142 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4143 break;
4144 case nir_intrinsic_emit_vertex_with_counter: {
4145 unsigned stream = nir_intrinsic_stream_id(instr);
4146 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4147 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4148 next_vertex,
4149 ctx->abi->outputs);
4150 break;
4151 }
4152 case nir_intrinsic_end_primitive:
4153 case nir_intrinsic_end_primitive_with_counter:
4154 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4155 break;
4156 case nir_intrinsic_load_tess_coord:
4157 result = ctx->abi->load_tess_coord(ctx->abi);
4158 break;
4159 case nir_intrinsic_load_tess_level_outer:
4160 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4161 break;
4162 case nir_intrinsic_load_tess_level_inner:
4163 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4164 break;
4165 case nir_intrinsic_load_tess_level_outer_default:
4166 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4167 break;
4168 case nir_intrinsic_load_tess_level_inner_default:
4169 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4170 break;
4171 case nir_intrinsic_load_patch_vertices_in:
4172 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4173 break;
4174 case nir_intrinsic_vote_all: {
4175 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4176 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4177 break;
4178 }
4179 case nir_intrinsic_vote_any: {
4180 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4181 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4182 break;
4183 }
4184 case nir_intrinsic_shuffle:
4185 if (ctx->ac.chip_class == GFX8 ||
4186 ctx->ac.chip_class == GFX9 ||
4187 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4188 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4189 get_src(ctx, instr->src[1]));
4190 } else {
4191 LLVMValueRef src = get_src(ctx, instr->src[0]);
4192 LLVMValueRef index = get_src(ctx, instr->src[1]);
4193 LLVMTypeRef type = LLVMTypeOf(src);
4194 struct waterfall_context wctx;
4195 LLVMValueRef index_val;
4196
4197 index_val = enter_waterfall(ctx, &wctx, index, true);
4198
4199 src = LLVMBuildZExt(ctx->ac.builder, src,
4200 ctx->ac.i32, "");
4201
4202 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4203 ctx->ac.i32,
4204 (LLVMValueRef []) { src, index_val }, 2,
4205 AC_FUNC_ATTR_READNONE |
4206 AC_FUNC_ATTR_CONVERGENT);
4207
4208 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4209
4210 result = exit_waterfall(ctx, &wctx, result);
4211 }
4212 break;
4213 case nir_intrinsic_reduce:
4214 result = ac_build_reduce(&ctx->ac,
4215 get_src(ctx, instr->src[0]),
4216 instr->const_index[0],
4217 instr->const_index[1]);
4218 break;
4219 case nir_intrinsic_inclusive_scan:
4220 result = ac_build_inclusive_scan(&ctx->ac,
4221 get_src(ctx, instr->src[0]),
4222 instr->const_index[0]);
4223 break;
4224 case nir_intrinsic_exclusive_scan:
4225 result = ac_build_exclusive_scan(&ctx->ac,
4226 get_src(ctx, instr->src[0]),
4227 instr->const_index[0]);
4228 break;
4229 case nir_intrinsic_quad_broadcast: {
4230 unsigned lane = nir_src_as_uint(instr->src[1]);
4231 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4232 lane, lane, lane, lane);
4233 break;
4234 }
4235 case nir_intrinsic_quad_swap_horizontal:
4236 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4237 break;
4238 case nir_intrinsic_quad_swap_vertical:
4239 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4240 break;
4241 case nir_intrinsic_quad_swap_diagonal:
4242 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4243 break;
4244 case nir_intrinsic_quad_swizzle_amd: {
4245 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4246 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4247 mask & 0x3, (mask >> 2) & 0x3,
4248 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4249 break;
4250 }
4251 case nir_intrinsic_masked_swizzle_amd: {
4252 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4253 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4254 break;
4255 }
4256 case nir_intrinsic_write_invocation_amd:
4257 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4258 get_src(ctx, instr->src[1]),
4259 get_src(ctx, instr->src[2]));
4260 break;
4261 case nir_intrinsic_mbcnt_amd:
4262 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4263 break;
4264 case nir_intrinsic_load_scratch: {
4265 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4266 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4267 offset);
4268 LLVMTypeRef comp_type =
4269 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4270 LLVMTypeRef vec_type =
4271 instr->dest.ssa.num_components == 1 ? comp_type :
4272 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4273 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4274 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4275 LLVMPointerType(vec_type, addr_space), "");
4276 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4277 break;
4278 }
4279 case nir_intrinsic_store_scratch: {
4280 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4281 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4282 offset);
4283 LLVMTypeRef comp_type =
4284 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4285 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4286 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4287 LLVMPointerType(comp_type, addr_space), "");
4288 LLVMValueRef src = get_src(ctx, instr->src[0]);
4289 unsigned wrmask = nir_intrinsic_write_mask(instr);
4290 while (wrmask) {
4291 int start, count;
4292 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4293
4294 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4295 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4296 LLVMTypeRef vec_type =
4297 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4298 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4299 offset_ptr,
4300 LLVMPointerType(vec_type, addr_space),
4301 "");
4302 LLVMValueRef offset_src =
4303 ac_extract_components(&ctx->ac, src, start, count);
4304 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4305 }
4306 break;
4307 }
4308 case nir_intrinsic_load_constant: {
4309 unsigned base = nir_intrinsic_base(instr);
4310 unsigned range = nir_intrinsic_range(instr);
4311
4312 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4313 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4314 LLVMConstInt(ctx->ac.i32, base, false), "");
4315
4316 /* Clamp the offset to avoid out-of-bound access because global
4317 * instructions can't handle them.
4318 */
4319 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4320 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4321 offset, size, "");
4322 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4323
4324 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4325 offset);
4326 LLVMTypeRef comp_type =
4327 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4328 LLVMTypeRef vec_type =
4329 instr->dest.ssa.num_components == 1 ? comp_type :
4330 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4331 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4332 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4333 LLVMPointerType(vec_type, addr_space), "");
4334 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4335 break;
4336 }
4337 default:
4338 fprintf(stderr, "Unknown intrinsic: ");
4339 nir_print_instr(&instr->instr, stderr);
4340 fprintf(stderr, "\n");
4341 break;
4342 }
4343 if (result) {
4344 ctx->ssa_defs[instr->dest.ssa.index] = result;
4345 }
4346 }
4347
4348 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4349 unsigned base_index,
4350 unsigned constant_index,
4351 LLVMValueRef dynamic_index)
4352 {
4353 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4354 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4355 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4356
4357 /* Bindless uniforms are 64bit so multiple index by 8 */
4358 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4359 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4360
4361 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4362
4363 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4364 NULL, 0, 0, true, true);
4365
4366 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4367 }
4368
4369 struct sampler_desc_address {
4370 unsigned descriptor_set;
4371 unsigned base_index; /* binding in vulkan */
4372 unsigned constant_index;
4373 LLVMValueRef dynamic_index;
4374 bool image;
4375 bool bindless;
4376 };
4377
4378 static struct sampler_desc_address
4379 get_sampler_desc_internal(struct ac_nir_context *ctx,
4380 nir_deref_instr *deref_instr,
4381 const nir_instr *instr,
4382 bool image)
4383 {
4384 LLVMValueRef index = NULL;
4385 unsigned constant_index = 0;
4386 unsigned descriptor_set;
4387 unsigned base_index;
4388 bool bindless = false;
4389
4390 if (!deref_instr) {
4391 descriptor_set = 0;
4392 if (image) {
4393 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4394 base_index = 0;
4395 bindless = true;
4396 index = get_src(ctx, img_instr->src[0]);
4397 } else {
4398 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4399 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4400 nir_tex_src_sampler_handle);
4401 if (sampSrcIdx != -1) {
4402 base_index = 0;
4403 bindless = true;
4404 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4405 } else {
4406 assert(tex_instr && !image);
4407 base_index = tex_instr->sampler_index;
4408 }
4409 }
4410 } else {
4411 while(deref_instr->deref_type != nir_deref_type_var) {
4412 if (deref_instr->deref_type == nir_deref_type_array) {
4413 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4414 if (!array_size)
4415 array_size = 1;
4416
4417 if (nir_src_is_const(deref_instr->arr.index)) {
4418 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4419 } else {
4420 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4421
4422 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4423 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4424
4425 if (!index)
4426 index = indirect;
4427 else
4428 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4429 }
4430
4431 deref_instr = nir_src_as_deref(deref_instr->parent);
4432 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4433 unsigned sidx = deref_instr->strct.index;
4434 deref_instr = nir_src_as_deref(deref_instr->parent);
4435 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4436 } else {
4437 unreachable("Unsupported deref type");
4438 }
4439 }
4440 descriptor_set = deref_instr->var->data.descriptor_set;
4441
4442 if (deref_instr->var->data.bindless) {
4443 /* For now just assert on unhandled variable types */
4444 assert(deref_instr->var->data.mode == nir_var_uniform);
4445
4446 base_index = deref_instr->var->data.driver_location;
4447 bindless = true;
4448
4449 index = index ? index : ctx->ac.i32_0;
4450 index = get_bindless_index_from_uniform(ctx, base_index,
4451 constant_index, index);
4452 } else
4453 base_index = deref_instr->var->data.binding;
4454 }
4455 return (struct sampler_desc_address) {
4456 .descriptor_set = descriptor_set,
4457 .base_index = base_index,
4458 .constant_index = constant_index,
4459 .dynamic_index = index,
4460 .image = image,
4461 .bindless = bindless,
4462 };
4463 }
4464
4465 /* Extract any possibly divergent index into a separate value that can be fed
4466 * into get_sampler_desc with the same arguments. */
4467 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4468 nir_deref_instr *deref_instr,
4469 const nir_instr *instr,
4470 bool image)
4471 {
4472 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4473 return addr.dynamic_index;
4474 }
4475
4476 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4477 nir_deref_instr *deref_instr,
4478 enum ac_descriptor_type desc_type,
4479 const nir_instr *instr,
4480 LLVMValueRef index,
4481 bool image, bool write)
4482 {
4483 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4484 return ctx->abi->load_sampler_desc(ctx->abi,
4485 addr.descriptor_set,
4486 addr.base_index,
4487 addr.constant_index, index,
4488 desc_type, addr.image, write, addr.bindless);
4489 }
4490
4491 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4492 *
4493 * GFX6-GFX7:
4494 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4495 * filtering manually. The driver sets img7 to a mask clearing
4496 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4497 * s_and_b32 samp0, samp0, img7
4498 *
4499 * GFX8:
4500 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4501 */
4502 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4503 LLVMValueRef res, LLVMValueRef samp)
4504 {
4505 LLVMBuilderRef builder = ctx->ac.builder;
4506 LLVMValueRef img7, samp0;
4507
4508 if (ctx->ac.chip_class >= GFX8)
4509 return samp;
4510
4511 img7 = LLVMBuildExtractElement(builder, res,
4512 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4513 samp0 = LLVMBuildExtractElement(builder, samp,
4514 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4515 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4516 return LLVMBuildInsertElement(builder, samp, samp0,
4517 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4518 }
4519
4520 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4521 nir_tex_instr *instr,
4522 struct waterfall_context *wctx,
4523 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4524 LLVMValueRef *fmask_ptr)
4525 {
4526 nir_deref_instr *texture_deref_instr = NULL;
4527 nir_deref_instr *sampler_deref_instr = NULL;
4528 int plane = -1;
4529
4530 for (unsigned i = 0; i < instr->num_srcs; i++) {
4531 switch (instr->src[i].src_type) {
4532 case nir_tex_src_texture_deref:
4533 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4534 break;
4535 case nir_tex_src_sampler_deref:
4536 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4537 break;
4538 case nir_tex_src_plane:
4539 plane = nir_src_as_int(instr->src[i].src);
4540 break;
4541 default:
4542 break;
4543 }
4544 }
4545
4546 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4547 &instr->instr, false);
4548 if (!sampler_deref_instr)
4549 sampler_deref_instr = texture_deref_instr;
4550
4551 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4552 &instr->instr, false);
4553 if (instr->texture_non_uniform)
4554 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4555
4556 if (instr->sampler_non_uniform)
4557 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4558
4559 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4560
4561 if (plane >= 0) {
4562 assert(instr->op != nir_texop_txf_ms &&
4563 instr->op != nir_texop_samples_identical);
4564 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4565
4566 main_descriptor = AC_DESC_PLANE_0 + plane;
4567 }
4568
4569 if (instr->op == nir_texop_fragment_mask_fetch) {
4570 /* The fragment mask is fetched from the compressed
4571 * multisampled surface.
4572 */
4573 main_descriptor = AC_DESC_FMASK;
4574 }
4575
4576 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4577 texture_dynamic_index, false, false);
4578
4579 if (samp_ptr) {
4580 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4581 sampler_dynamic_index, false, false);
4582 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4583 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4584 }
4585 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4586 instr->op == nir_texop_samples_identical))
4587 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4588 &instr->instr, texture_dynamic_index, false, false);
4589 }
4590
4591 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4592 LLVMValueRef coord)
4593 {
4594 coord = ac_to_float(ctx, coord);
4595 coord = ac_build_round(ctx, coord);
4596 coord = ac_to_integer(ctx, coord);
4597 return coord;
4598 }
4599
4600 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4601 {
4602 LLVMValueRef result = NULL;
4603 struct ac_image_args args = { 0 };
4604 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4605 LLVMValueRef ddx = NULL, ddy = NULL;
4606 unsigned offset_src = 0;
4607 struct waterfall_context wctx[2] = {{{0}}};
4608
4609 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4610
4611 for (unsigned i = 0; i < instr->num_srcs; i++) {
4612 switch (instr->src[i].src_type) {
4613 case nir_tex_src_coord: {
4614 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4615 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4616 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4617 break;
4618 }
4619 case nir_tex_src_projector:
4620 break;
4621 case nir_tex_src_comparator:
4622 if (instr->is_shadow) {
4623 args.compare = get_src(ctx, instr->src[i].src);
4624 args.compare = ac_to_float(&ctx->ac, args.compare);
4625 }
4626 break;
4627 case nir_tex_src_offset:
4628 args.offset = get_src(ctx, instr->src[i].src);
4629 offset_src = i;
4630 break;
4631 case nir_tex_src_bias:
4632 args.bias = get_src(ctx, instr->src[i].src);
4633 break;
4634 case nir_tex_src_lod: {
4635 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4636 args.level_zero = true;
4637 else
4638 args.lod = get_src(ctx, instr->src[i].src);
4639 break;
4640 }
4641 case nir_tex_src_ms_index:
4642 sample_index = get_src(ctx, instr->src[i].src);
4643 break;
4644 case nir_tex_src_ms_mcs:
4645 break;
4646 case nir_tex_src_ddx:
4647 ddx = get_src(ctx, instr->src[i].src);
4648 break;
4649 case nir_tex_src_ddy:
4650 ddy = get_src(ctx, instr->src[i].src);
4651 break;
4652 case nir_tex_src_min_lod:
4653 args.min_lod = get_src(ctx, instr->src[i].src);
4654 break;
4655 case nir_tex_src_texture_offset:
4656 case nir_tex_src_sampler_offset:
4657 case nir_tex_src_plane:
4658 default:
4659 break;
4660 }
4661 }
4662
4663 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4664 result = get_buffer_size(ctx, args.resource, true);
4665 goto write_result;
4666 }
4667
4668 if (instr->op == nir_texop_texture_samples) {
4669 LLVMValueRef res, samples, is_msaa;
4670 LLVMValueRef default_sample;
4671
4672 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4673 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4674 LLVMConstInt(ctx->ac.i32, 3, false), "");
4675 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4676 LLVMConstInt(ctx->ac.i32, 28, false), "");
4677 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4678 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4679 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4680 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4681
4682 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4683 LLVMConstInt(ctx->ac.i32, 16, false), "");
4684 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4685 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4686 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4687 samples, "");
4688
4689 if (ctx->abi->robust_buffer_access) {
4690 LLVMValueRef dword1, is_null_descriptor;
4691
4692 /* Extract the second dword of the descriptor, if it's
4693 * all zero, then it's a null descriptor.
4694 */
4695 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4696 LLVMConstInt(ctx->ac.i32, 1, false), "");
4697 is_null_descriptor =
4698 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4699 LLVMConstInt(ctx->ac.i32, 0, false), "");
4700 default_sample =
4701 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4702 ctx->ac.i32_0, ctx->ac.i32_1, "");
4703 } else {
4704 default_sample = ctx->ac.i32_1;
4705 }
4706
4707 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4708 default_sample, "");
4709 result = samples;
4710 goto write_result;
4711 }
4712
4713 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4714 LLVMValueRef offset[3], pack;
4715 for (unsigned chan = 0; chan < 3; ++chan)
4716 offset[chan] = ctx->ac.i32_0;
4717
4718 unsigned num_components = ac_get_llvm_num_components(args.offset);
4719 for (unsigned chan = 0; chan < num_components; chan++) {
4720 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4721 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4722 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4723 if (chan)
4724 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4725 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4726 }
4727 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4728 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4729 args.offset = pack;
4730 }
4731
4732 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4733 * OpenGL 4.5 spec says:
4734 *
4735 * "If the texture’s internal format indicates a fixed-point
4736 * depth texture, then D_t and D_ref are clamped to the
4737 * range [0, 1]; otherwise no clamping is performed."
4738 *
4739 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4740 * so the depth comparison value isn't clamped for Z16 and
4741 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4742 * an explicitly clamped 32-bit float format.
4743 */
4744 if (args.compare &&
4745 ctx->ac.chip_class >= GFX8 &&
4746 ctx->ac.chip_class <= GFX9 &&
4747 ctx->abi->clamp_shadow_reference) {
4748 LLVMValueRef upgraded, clamped;
4749
4750 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4751 LLVMConstInt(ctx->ac.i32, 3, false), "");
4752 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4753 LLVMConstInt(ctx->ac.i32, 29, false), "");
4754 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4755 clamped = ac_build_clamp(&ctx->ac, args.compare);
4756 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4757 args.compare, "");
4758 }
4759
4760 /* pack derivatives */
4761 if (ddx || ddy) {
4762 int num_src_deriv_channels, num_dest_deriv_channels;
4763 switch (instr->sampler_dim) {
4764 case GLSL_SAMPLER_DIM_3D:
4765 case GLSL_SAMPLER_DIM_CUBE:
4766 num_src_deriv_channels = 3;
4767 num_dest_deriv_channels = 3;
4768 break;
4769 case GLSL_SAMPLER_DIM_2D:
4770 default:
4771 num_src_deriv_channels = 2;
4772 num_dest_deriv_channels = 2;
4773 break;
4774 case GLSL_SAMPLER_DIM_1D:
4775 num_src_deriv_channels = 1;
4776 if (ctx->ac.chip_class == GFX9) {
4777 num_dest_deriv_channels = 2;
4778 } else {
4779 num_dest_deriv_channels = 1;
4780 }
4781 break;
4782 }
4783
4784 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4785 args.derivs[i] = ac_to_float(&ctx->ac,
4786 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4787 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4788 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4789 }
4790 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4791 args.derivs[i] = ctx->ac.f32_0;
4792 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4793 }
4794 }
4795
4796 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4797 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4798 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4799 if (instr->coord_components == 3)
4800 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4801 ac_prepare_cube_coords(&ctx->ac,
4802 instr->op == nir_texop_txd, instr->is_array,
4803 instr->op == nir_texop_lod, args.coords, args.derivs);
4804 }
4805
4806 /* Texture coordinates fixups */
4807 if (instr->coord_components > 1 &&
4808 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4809 instr->is_array &&
4810 instr->op != nir_texop_txf) {
4811 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4812 }
4813
4814 if (instr->coord_components > 2 &&
4815 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4816 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4817 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4818 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4819 instr->is_array &&
4820 instr->op != nir_texop_txf &&
4821 instr->op != nir_texop_txf_ms &&
4822 instr->op != nir_texop_fragment_fetch &&
4823 instr->op != nir_texop_fragment_mask_fetch) {
4824 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4825 }
4826
4827 if (ctx->ac.chip_class == GFX9 &&
4828 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4829 instr->op != nir_texop_lod) {
4830 LLVMValueRef filler;
4831 if (instr->op == nir_texop_txf)
4832 filler = ctx->ac.i32_0;
4833 else
4834 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4835
4836 if (instr->is_array)
4837 args.coords[2] = args.coords[1];
4838 args.coords[1] = filler;
4839 }
4840
4841 /* Pack sample index */
4842 if (sample_index && (instr->op == nir_texop_txf_ms ||
4843 instr->op == nir_texop_fragment_fetch))
4844 args.coords[instr->coord_components] = sample_index;
4845
4846 if (instr->op == nir_texop_samples_identical) {
4847 struct ac_image_args txf_args = { 0 };
4848 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4849
4850 txf_args.dmask = 0xf;
4851 txf_args.resource = fmask_ptr;
4852 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4853 result = build_tex_intrinsic(ctx, instr, &txf_args);
4854
4855 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4856 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4857 goto write_result;
4858 }
4859
4860 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4861 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4862 instr->op != nir_texop_txs &&
4863 instr->op != nir_texop_fragment_fetch &&
4864 instr->op != nir_texop_fragment_mask_fetch) {
4865 unsigned sample_chan = instr->is_array ? 3 : 2;
4866 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4867 &ctx->ac, args.coords[0], args.coords[1],
4868 instr->is_array ? args.coords[2] : NULL,
4869 args.coords[sample_chan], fmask_ptr);
4870 }
4871
4872 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4873 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4874 num_offsets = MIN2(num_offsets, instr->coord_components);
4875 for (unsigned i = 0; i < num_offsets; ++i) {
4876 args.coords[i] = LLVMBuildAdd(
4877 ctx->ac.builder, args.coords[i],
4878 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4879 }
4880 args.offset = NULL;
4881 }
4882
4883 /* DMASK was repurposed for GATHER4. 4 components are always
4884 * returned and DMASK works like a swizzle - it selects
4885 * the component to fetch. The only valid DMASK values are
4886 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4887 * (red,red,red,red) etc.) The ISA document doesn't mention
4888 * this.
4889 */
4890 args.dmask = 0xf;
4891 if (instr->op == nir_texop_tg4) {
4892 if (instr->is_shadow)
4893 args.dmask = 1;
4894 else
4895 args.dmask = 1 << instr->component;
4896 }
4897
4898 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4899 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4900 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4901 }
4902
4903 /* Adjust the number of coordinates because we only need (x,y) for 2D
4904 * multisampled images and (x,y,layer) for 2D multisampled layered
4905 * images or for multisampled input attachments.
4906 */
4907 if (instr->op == nir_texop_fragment_mask_fetch) {
4908 if (args.dim == ac_image_2dmsaa) {
4909 args.dim = ac_image_2d;
4910 } else {
4911 assert(args.dim == ac_image_2darraymsaa);
4912 args.dim = ac_image_2darray;
4913 }
4914 }
4915
4916 assert(instr->dest.is_ssa);
4917 args.d16 = instr->dest.ssa.bit_size == 16;
4918
4919 result = build_tex_intrinsic(ctx, instr, &args);
4920
4921 if (instr->op == nir_texop_query_levels)
4922 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4923 else if (instr->is_shadow && instr->is_new_style_shadow &&
4924 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4925 instr->op != nir_texop_tg4)
4926 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4927 else if (instr->op == nir_texop_txs &&
4928 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4929 instr->is_array) {
4930 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4931 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4932 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4933 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4934 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4935 } else if (ctx->ac.chip_class == GFX9 &&
4936 instr->op == nir_texop_txs &&
4937 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4938 instr->is_array) {
4939 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4940 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4941 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4942 ctx->ac.i32_1, "");
4943 } else if (instr->dest.ssa.num_components != 4)
4944 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4945
4946 write_result:
4947 if (result) {
4948 assert(instr->dest.is_ssa);
4949 result = ac_to_integer(&ctx->ac, result);
4950
4951 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4952 result = exit_waterfall(ctx, wctx + i, result);
4953 }
4954
4955 ctx->ssa_defs[instr->dest.ssa.index] = result;
4956 }
4957 }
4958
4959 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4960 {
4961 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4962 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4963
4964 ctx->ssa_defs[instr->dest.ssa.index] = result;
4965 _mesa_hash_table_insert(ctx->phis, instr, result);
4966 }
4967
4968 static void visit_post_phi(struct ac_nir_context *ctx,
4969 nir_phi_instr *instr,
4970 LLVMValueRef llvm_phi)
4971 {
4972 nir_foreach_phi_src(src, instr) {
4973 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4974 LLVMValueRef llvm_src = get_src(ctx, src->src);
4975
4976 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4977 }
4978 }
4979
4980 static void phi_post_pass(struct ac_nir_context *ctx)
4981 {
4982 hash_table_foreach(ctx->phis, entry) {
4983 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4984 (LLVMValueRef)entry->data);
4985 }
4986 }
4987
4988
4989 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4990 nir_foreach_use(use_src, def) {
4991 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4992 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
4993 if (instr->intrinsic == nir_intrinsic_store_deref)
4994 return true;
4995 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
4996 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
4997 if (instr->op == nir_op_vec4 &&
4998 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
4999 return true;
5000 }
5001 }
5002 }
5003 return false;
5004 }
5005
5006 static void visit_ssa_undef(struct ac_nir_context *ctx,
5007 const nir_ssa_undef_instr *instr)
5008 {
5009 unsigned num_components = instr->def.num_components;
5010 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
5011
5012 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
5013 LLVMValueRef undef;
5014
5015 if (num_components == 1)
5016 undef = LLVMGetUndef(type);
5017 else {
5018 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
5019 }
5020 ctx->ssa_defs[instr->def.index] = undef;
5021 } else {
5022 LLVMValueRef zero = LLVMConstInt(type, 0, false);
5023 if (num_components > 1) {
5024 zero = ac_build_gather_values_extended(
5025 &ctx->ac, &zero, 4, 0, false, false);
5026 }
5027 ctx->ssa_defs[instr->def.index] = zero;
5028 }
5029 }
5030
5031 static void visit_jump(struct ac_llvm_context *ctx,
5032 const nir_jump_instr *instr)
5033 {
5034 switch (instr->type) {
5035 case nir_jump_break:
5036 ac_build_break(ctx);
5037 break;
5038 case nir_jump_continue:
5039 ac_build_continue(ctx);
5040 break;
5041 default:
5042 fprintf(stderr, "Unknown NIR jump instr: ");
5043 nir_print_instr(&instr->instr, stderr);
5044 fprintf(stderr, "\n");
5045 abort();
5046 }
5047 }
5048
5049 static LLVMTypeRef
5050 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
5051 enum glsl_base_type type)
5052 {
5053 switch (type) {
5054 case GLSL_TYPE_INT:
5055 case GLSL_TYPE_UINT:
5056 case GLSL_TYPE_BOOL:
5057 case GLSL_TYPE_SUBROUTINE:
5058 return ac->i32;
5059 case GLSL_TYPE_INT8:
5060 case GLSL_TYPE_UINT8:
5061 return ac->i8;
5062 case GLSL_TYPE_INT16:
5063 case GLSL_TYPE_UINT16:
5064 return ac->i16;
5065 case GLSL_TYPE_FLOAT:
5066 return ac->f32;
5067 case GLSL_TYPE_FLOAT16:
5068 return ac->f16;
5069 case GLSL_TYPE_INT64:
5070 case GLSL_TYPE_UINT64:
5071 return ac->i64;
5072 case GLSL_TYPE_DOUBLE:
5073 return ac->f64;
5074 default:
5075 unreachable("unknown GLSL type");
5076 }
5077 }
5078
5079 static LLVMTypeRef
5080 glsl_to_llvm_type(struct ac_llvm_context *ac,
5081 const struct glsl_type *type)
5082 {
5083 if (glsl_type_is_scalar(type)) {
5084 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
5085 }
5086
5087 if (glsl_type_is_vector(type)) {
5088 return LLVMVectorType(
5089 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
5090 glsl_get_vector_elements(type));
5091 }
5092
5093 if (glsl_type_is_matrix(type)) {
5094 return LLVMArrayType(
5095 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
5096 glsl_get_matrix_columns(type));
5097 }
5098
5099 if (glsl_type_is_array(type)) {
5100 return LLVMArrayType(
5101 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
5102 glsl_get_length(type));
5103 }
5104
5105 assert(glsl_type_is_struct_or_ifc(type));
5106
5107 LLVMTypeRef member_types[glsl_get_length(type)];
5108
5109 for (unsigned i = 0; i < glsl_get_length(type); i++) {
5110 member_types[i] =
5111 glsl_to_llvm_type(ac,
5112 glsl_get_struct_field(type, i));
5113 }
5114
5115 return LLVMStructTypeInContext(ac->context, member_types,
5116 glsl_get_length(type), false);
5117 }
5118
5119 static void visit_deref(struct ac_nir_context *ctx,
5120 nir_deref_instr *instr)
5121 {
5122 if (instr->mode != nir_var_mem_shared &&
5123 instr->mode != nir_var_mem_global)
5124 return;
5125
5126 LLVMValueRef result = NULL;
5127 switch(instr->deref_type) {
5128 case nir_deref_type_var: {
5129 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
5130 result = entry->data;
5131 break;
5132 }
5133 case nir_deref_type_struct:
5134 if (instr->mode == nir_var_mem_global) {
5135 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5136 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5137 instr->strct.index);
5138 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5139 LLVMConstInt(ctx->ac.i32, offset, 0));
5140 } else {
5141 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5142 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5143 }
5144 break;
5145 case nir_deref_type_array:
5146 if (instr->mode == nir_var_mem_global) {
5147 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5148 unsigned stride = glsl_get_explicit_stride(parent->type);
5149
5150 if ((glsl_type_is_matrix(parent->type) &&
5151 glsl_matrix_type_is_row_major(parent->type)) ||
5152 (glsl_type_is_vector(parent->type) && stride == 0))
5153 stride = type_scalar_size_bytes(parent->type);
5154
5155 assert(stride > 0);
5156 LLVMValueRef index = get_src(ctx, instr->arr.index);
5157 if (LLVMTypeOf(index) != ctx->ac.i64)
5158 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5159
5160 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5161
5162 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5163 } else {
5164 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5165 get_src(ctx, instr->arr.index));
5166 }
5167 break;
5168 case nir_deref_type_ptr_as_array:
5169 if (instr->mode == nir_var_mem_global) {
5170 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
5171
5172 LLVMValueRef index = get_src(ctx, instr->arr.index);
5173 if (LLVMTypeOf(index) != ctx->ac.i64)
5174 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5175
5176 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5177
5178 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5179 } else {
5180 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5181 get_src(ctx, instr->arr.index));
5182 }
5183 break;
5184 case nir_deref_type_cast: {
5185 result = get_src(ctx, instr->parent);
5186
5187 /* We can't use the structs from LLVM because the shader
5188 * specifies its own offsets. */
5189 LLVMTypeRef pointee_type = ctx->ac.i8;
5190 if (instr->mode == nir_var_mem_shared)
5191 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5192
5193 unsigned address_space;
5194
5195 switch(instr->mode) {
5196 case nir_var_mem_shared:
5197 address_space = AC_ADDR_SPACE_LDS;
5198 break;
5199 case nir_var_mem_global:
5200 address_space = AC_ADDR_SPACE_GLOBAL;
5201 break;
5202 default:
5203 unreachable("Unhandled address space");
5204 }
5205
5206 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5207
5208 if (LLVMTypeOf(result) != type) {
5209 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5210 result = LLVMBuildBitCast(ctx->ac.builder, result,
5211 type, "");
5212 } else {
5213 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5214 type, "");
5215 }
5216 }
5217 break;
5218 }
5219 default:
5220 unreachable("Unhandled deref_instr deref type");
5221 }
5222
5223 ctx->ssa_defs[instr->dest.ssa.index] = result;
5224 }
5225
5226 static void visit_cf_list(struct ac_nir_context *ctx,
5227 struct exec_list *list);
5228
5229 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5230 {
5231 nir_foreach_instr(instr, block)
5232 {
5233 switch (instr->type) {
5234 case nir_instr_type_alu:
5235 visit_alu(ctx, nir_instr_as_alu(instr));
5236 break;
5237 case nir_instr_type_load_const:
5238 visit_load_const(ctx, nir_instr_as_load_const(instr));
5239 break;
5240 case nir_instr_type_intrinsic:
5241 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5242 break;
5243 case nir_instr_type_tex:
5244 visit_tex(ctx, nir_instr_as_tex(instr));
5245 break;
5246 case nir_instr_type_phi:
5247 visit_phi(ctx, nir_instr_as_phi(instr));
5248 break;
5249 case nir_instr_type_ssa_undef:
5250 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5251 break;
5252 case nir_instr_type_jump:
5253 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5254 break;
5255 case nir_instr_type_deref:
5256 visit_deref(ctx, nir_instr_as_deref(instr));
5257 break;
5258 default:
5259 fprintf(stderr, "Unknown NIR instr type: ");
5260 nir_print_instr(instr, stderr);
5261 fprintf(stderr, "\n");
5262 abort();
5263 }
5264 }
5265
5266 _mesa_hash_table_insert(ctx->defs, block,
5267 LLVMGetInsertBlock(ctx->ac.builder));
5268 }
5269
5270 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5271 {
5272 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5273
5274 nir_block *then_block =
5275 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5276
5277 ac_build_uif(&ctx->ac, value, then_block->index);
5278
5279 visit_cf_list(ctx, &if_stmt->then_list);
5280
5281 if (!exec_list_is_empty(&if_stmt->else_list)) {
5282 nir_block *else_block =
5283 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5284
5285 ac_build_else(&ctx->ac, else_block->index);
5286 visit_cf_list(ctx, &if_stmt->else_list);
5287 }
5288
5289 ac_build_endif(&ctx->ac, then_block->index);
5290 }
5291
5292 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5293 {
5294 nir_block *first_loop_block =
5295 (nir_block *) exec_list_get_head(&loop->body);
5296
5297 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5298
5299 visit_cf_list(ctx, &loop->body);
5300
5301 ac_build_endloop(&ctx->ac, first_loop_block->index);
5302 }
5303
5304 static void visit_cf_list(struct ac_nir_context *ctx,
5305 struct exec_list *list)
5306 {
5307 foreach_list_typed(nir_cf_node, node, node, list)
5308 {
5309 switch (node->type) {
5310 case nir_cf_node_block:
5311 visit_block(ctx, nir_cf_node_as_block(node));
5312 break;
5313
5314 case nir_cf_node_if:
5315 visit_if(ctx, nir_cf_node_as_if(node));
5316 break;
5317
5318 case nir_cf_node_loop:
5319 visit_loop(ctx, nir_cf_node_as_loop(node));
5320 break;
5321
5322 default:
5323 assert(0);
5324 }
5325 }
5326 }
5327
5328 void
5329 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5330 struct ac_shader_abi *abi,
5331 struct nir_shader *nir,
5332 struct nir_variable *variable,
5333 gl_shader_stage stage)
5334 {
5335 unsigned output_loc = variable->data.driver_location / 4;
5336 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5337
5338 /* tess ctrl has it's own load/store paths for outputs */
5339 if (stage == MESA_SHADER_TESS_CTRL)
5340 return;
5341
5342 if (stage == MESA_SHADER_VERTEX ||
5343 stage == MESA_SHADER_TESS_EVAL ||
5344 stage == MESA_SHADER_GEOMETRY) {
5345 int idx = variable->data.location + variable->data.index;
5346 if (idx == VARYING_SLOT_CLIP_DIST0) {
5347 int length = nir->info.clip_distance_array_size +
5348 nir->info.cull_distance_array_size;
5349
5350 if (length > 4)
5351 attrib_count = 2;
5352 else
5353 attrib_count = 1;
5354 }
5355 }
5356
5357 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5358 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5359 for (unsigned i = 0; i < attrib_count; ++i) {
5360 for (unsigned chan = 0; chan < 4; chan++) {
5361 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5362 ac_build_alloca_undef(ctx, type, "");
5363 }
5364 }
5365 }
5366
5367 static void
5368 setup_locals(struct ac_nir_context *ctx,
5369 struct nir_function *func)
5370 {
5371 int i, j;
5372 ctx->num_locals = 0;
5373 nir_foreach_function_temp_variable(variable, func->impl) {
5374 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5375 variable->data.driver_location = ctx->num_locals * 4;
5376 variable->data.location_frac = 0;
5377 ctx->num_locals += attrib_count;
5378 }
5379 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5380 if (!ctx->locals)
5381 return;
5382
5383 for (i = 0; i < ctx->num_locals; i++) {
5384 for (j = 0; j < 4; j++) {
5385 ctx->locals[i * 4 + j] =
5386 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5387 }
5388 }
5389 }
5390
5391 static void
5392 setup_scratch(struct ac_nir_context *ctx,
5393 struct nir_shader *shader)
5394 {
5395 if (shader->scratch_size == 0)
5396 return;
5397
5398 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5399 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5400 "scratch");
5401 }
5402
5403 static void
5404 setup_constant_data(struct ac_nir_context *ctx,
5405 struct nir_shader *shader)
5406 {
5407 if (!shader->constant_data)
5408 return;
5409
5410 LLVMValueRef data =
5411 LLVMConstStringInContext(ctx->ac.context,
5412 shader->constant_data,
5413 shader->constant_data_size,
5414 true);
5415 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5416
5417 /* We want to put the constant data in the CONST address space so that
5418 * we can use scalar loads. However, LLVM versions before 10 put these
5419 * variables in the same section as the code, which is unacceptable
5420 * for RadeonSI as it needs to relocate all the data sections after
5421 * the code sections. See https://reviews.llvm.org/D65813.
5422 */
5423 unsigned address_space =
5424 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5425
5426 LLVMValueRef global =
5427 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5428 "const_data",
5429 address_space);
5430
5431 LLVMSetInitializer(global, data);
5432 LLVMSetGlobalConstant(global, true);
5433 LLVMSetVisibility(global, LLVMHiddenVisibility);
5434 ctx->constant_data = global;
5435 }
5436
5437 static void
5438 setup_shared(struct ac_nir_context *ctx,
5439 struct nir_shader *nir)
5440 {
5441 if (ctx->ac.lds)
5442 return;
5443
5444 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5445 nir->info.cs.shared_size);
5446
5447 LLVMValueRef lds =
5448 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5449 "compute_lds",
5450 AC_ADDR_SPACE_LDS);
5451 LLVMSetAlignment(lds, 64 * 1024);
5452
5453 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5454 LLVMPointerType(ctx->ac.i8,
5455 AC_ADDR_SPACE_LDS), "");
5456 }
5457
5458 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5459 const struct ac_shader_args *args, struct nir_shader *nir)
5460 {
5461 struct ac_nir_context ctx = {};
5462 struct nir_function *func;
5463
5464 ctx.ac = *ac;
5465 ctx.abi = abi;
5466 ctx.args = args;
5467
5468 ctx.stage = nir->info.stage;
5469 ctx.info = &nir->info;
5470
5471 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5472
5473 /* TODO: remove this after RADV switches to lowered IO */
5474 if (!nir->info.io_lowered) {
5475 nir_foreach_shader_out_variable(variable, nir) {
5476 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5477 ctx.stage);
5478 }
5479 }
5480
5481 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5482 _mesa_key_pointer_equal);
5483 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5484 _mesa_key_pointer_equal);
5485 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5486 _mesa_key_pointer_equal);
5487
5488 if (ctx.abi->kill_ps_if_inf_interp)
5489 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5490 _mesa_key_pointer_equal);
5491
5492 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5493
5494 nir_index_ssa_defs(func->impl);
5495 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5496
5497 setup_locals(&ctx, func);
5498 setup_scratch(&ctx, nir);
5499 setup_constant_data(&ctx, nir);
5500
5501 if (gl_shader_stage_is_compute(nir->info.stage))
5502 setup_shared(&ctx, nir);
5503
5504 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5505 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5506 /* true = don't kill. */
5507 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5508 }
5509
5510 visit_cf_list(&ctx, &func->impl->body);
5511 phi_post_pass(&ctx);
5512
5513 if (ctx.ac.postponed_kill)
5514 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5515 ctx.ac.postponed_kill, ""));
5516
5517 if (!gl_shader_stage_is_compute(nir->info.stage))
5518 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5519 ctx.abi->outputs);
5520
5521 free(ctx.locals);
5522 free(ctx.ssa_defs);
5523 ralloc_free(ctx.defs);
5524 ralloc_free(ctx.phis);
5525 ralloc_free(ctx.vars);
5526 if (ctx.abi->kill_ps_if_inf_interp)
5527 ralloc_free(ctx.verified_interp);
5528 }
5529
5530 bool
5531 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5532 {
5533 bool progress = false;
5534
5535 /* Lower large variables to scratch first so that we won't bloat the
5536 * shader by generating large if ladders for them. We later lower
5537 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5538 */
5539 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5540 nir_var_function_temp,
5541 256,
5542 glsl_get_natural_size_align_bytes);
5543
5544 /* While it would be nice not to have this flag, we are constrained
5545 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5546 */
5547 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5548
5549 /* TODO: Indirect indexing of GS inputs is unimplemented.
5550 *
5551 * TCS and TES load inputs directly from LDS or offchip memory, so
5552 * indirect indexing is trivial.
5553 */
5554 nir_variable_mode indirect_mask = 0;
5555 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5556 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5557 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5558 !llvm_has_working_vgpr_indexing)) {
5559 indirect_mask |= nir_var_shader_in;
5560 }
5561 if (!llvm_has_working_vgpr_indexing &&
5562 nir->info.stage != MESA_SHADER_TESS_CTRL)
5563 indirect_mask |= nir_var_shader_out;
5564
5565 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5566 * smart enough to handle indirects without causing excess spilling
5567 * causing the gpu to hang.
5568 *
5569 * See the following thread for more details of the problem:
5570 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5571 */
5572 indirect_mask |= nir_var_function_temp;
5573
5574 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5575 return progress;
5576 }
5577
5578 static unsigned
5579 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5580 {
5581 if (intrin->intrinsic != nir_intrinsic_store_output)
5582 return 0;
5583
5584 unsigned writemask = nir_intrinsic_write_mask(intrin) <<
5585 nir_intrinsic_component(intrin);
5586 unsigned location = nir_intrinsic_io_semantics(intrin).location;
5587
5588 if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5589 return writemask << 4;
5590 else if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5591 return writemask;
5592
5593 return 0;
5594 }
5595
5596 static void
5597 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5598 unsigned *cond_block_tf_writemask,
5599 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5600 {
5601 switch (cf_node->type) {
5602 case nir_cf_node_block: {
5603 nir_block *block = nir_cf_node_as_block(cf_node);
5604 nir_foreach_instr(instr, block) {
5605 if (instr->type != nir_instr_type_intrinsic)
5606 continue;
5607
5608 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5609 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5610
5611 /* If we find a barrier in nested control flow put this in the
5612 * too hard basket. In GLSL this is not possible but it is in
5613 * SPIR-V.
5614 */
5615 if (is_nested_cf) {
5616 *tessfactors_are_def_in_all_invocs = false;
5617 return;
5618 }
5619
5620 /* The following case must be prevented:
5621 * gl_TessLevelInner = ...;
5622 * barrier();
5623 * if (gl_InvocationID == 1)
5624 * gl_TessLevelInner = ...;
5625 *
5626 * If you consider disjoint code segments separated by barriers, each
5627 * such segment that writes tess factor channels should write the same
5628 * channels in all codepaths within that segment.
5629 */
5630 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5631 /* Accumulate the result: */
5632 *tessfactors_are_def_in_all_invocs &=
5633 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5634
5635 /* Analyze the next code segment from scratch. */
5636 *upper_block_tf_writemask = 0;
5637 *cond_block_tf_writemask = 0;
5638 }
5639 } else
5640 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5641 }
5642
5643 break;
5644 }
5645 case nir_cf_node_if: {
5646 unsigned then_tessfactor_writemask = 0;
5647 unsigned else_tessfactor_writemask = 0;
5648
5649 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5650 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5651 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5652 cond_block_tf_writemask,
5653 tessfactors_are_def_in_all_invocs, true);
5654 }
5655
5656 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5657 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5658 cond_block_tf_writemask,
5659 tessfactors_are_def_in_all_invocs, true);
5660 }
5661
5662 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5663 /* If both statements write the same tess factor channels,
5664 * we can say that the upper block writes them too.
5665 */
5666 *upper_block_tf_writemask |= then_tessfactor_writemask &
5667 else_tessfactor_writemask;
5668 *cond_block_tf_writemask |= then_tessfactor_writemask |
5669 else_tessfactor_writemask;
5670 }
5671
5672 break;
5673 }
5674 case nir_cf_node_loop: {
5675 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5676 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5677 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5678 cond_block_tf_writemask,
5679 tessfactors_are_def_in_all_invocs, true);
5680 }
5681
5682 break;
5683 }
5684 default:
5685 unreachable("unknown cf node type");
5686 }
5687 }
5688
5689 bool
5690 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5691 {
5692 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5693
5694 /* The pass works as follows:
5695 * If all codepaths write tess factors, we can say that all
5696 * invocations define tess factors.
5697 *
5698 * Each tess factor channel is tracked separately.
5699 */
5700 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5701 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5702
5703 /* Initial value = true. Here the pass will accumulate results from
5704 * multiple segments surrounded by barriers. If tess factors aren't
5705 * written at all, it's a shader bug and we don't care if this will be
5706 * true.
5707 */
5708 bool tessfactors_are_def_in_all_invocs = true;
5709
5710 nir_foreach_function(function, nir) {
5711 if (function->impl) {
5712 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5713 scan_tess_ctrl(node, &main_block_tf_writemask,
5714 &cond_block_tf_writemask,
5715 &tessfactors_are_def_in_all_invocs,
5716 false);
5717 }
5718 }
5719 }
5720
5721 /* Accumulate the result for the last code segment separated by a
5722 * barrier.
5723 */
5724 if (main_block_tf_writemask || cond_block_tf_writemask) {
5725 tessfactors_are_def_in_all_invocs &=
5726 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5727 }
5728
5729 return tessfactors_are_def_in_all_invocs;
5730 }