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ac/nir, radv, radeonsi: Switch to using ac_shader_args
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54
55 LLVMValueRef main_function;
56 LLVMBasicBlockRef continue_block;
57 LLVMBasicBlockRef break_block;
58
59 int num_locals;
60 LLVMValueRef *locals;
61 };
62
63 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
64 nir_deref_instr *deref_instr,
65 enum ac_descriptor_type desc_type,
66 const nir_instr *instr,
67 bool image, bool write);
68
69 static void
70 build_store_values_extended(struct ac_llvm_context *ac,
71 LLVMValueRef *values,
72 unsigned value_count,
73 unsigned value_stride,
74 LLVMValueRef vec)
75 {
76 LLVMBuilderRef builder = ac->builder;
77 unsigned i;
78
79 for (i = 0; i < value_count; i++) {
80 LLVMValueRef ptr = values[i * value_stride];
81 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
82 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
83 LLVMBuildStore(builder, value, ptr);
84 }
85 }
86
87 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
88 const nir_ssa_def *def)
89 {
90 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
91 if (def->num_components > 1) {
92 type = LLVMVectorType(type, def->num_components);
93 }
94 return type;
95 }
96
97 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
98 {
99 assert(src.is_ssa);
100 return nir->ssa_defs[src.ssa->index];
101 }
102
103 static LLVMValueRef
104 get_memory_ptr(struct ac_nir_context *ctx, nir_src src)
105 {
106 LLVMValueRef ptr = get_src(ctx, src);
107 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
108 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
109
110 return LLVMBuildBitCast(ctx->ac.builder, ptr,
111 LLVMPointerType(ctx->ac.i32, addr_space), "");
112 }
113
114 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
115 const struct nir_block *b)
116 {
117 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
118 return (LLVMBasicBlockRef)entry->data;
119 }
120
121 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
122 nir_alu_src src,
123 unsigned num_components)
124 {
125 LLVMValueRef value = get_src(ctx, src.src);
126 bool need_swizzle = false;
127
128 assert(value);
129 unsigned src_components = ac_get_llvm_num_components(value);
130 for (unsigned i = 0; i < num_components; ++i) {
131 assert(src.swizzle[i] < src_components);
132 if (src.swizzle[i] != i)
133 need_swizzle = true;
134 }
135
136 if (need_swizzle || num_components != src_components) {
137 LLVMValueRef masks[] = {
138 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
139 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
140 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
141 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
142
143 if (src_components > 1 && num_components == 1) {
144 value = LLVMBuildExtractElement(ctx->ac.builder, value,
145 masks[0], "");
146 } else if (src_components == 1 && num_components > 1) {
147 LLVMValueRef values[] = {value, value, value, value};
148 value = ac_build_gather_values(&ctx->ac, values, num_components);
149 } else {
150 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
151 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
152 swizzle, "");
153 }
154 }
155 assert(!src.negate);
156 assert(!src.abs);
157 return value;
158 }
159
160 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
161 LLVMIntPredicate pred, LLVMValueRef src0,
162 LLVMValueRef src1)
163 {
164 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
165 return LLVMBuildSelect(ctx->builder, result,
166 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
167 ctx->i32_0, "");
168 }
169
170 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
171 LLVMRealPredicate pred, LLVMValueRef src0,
172 LLVMValueRef src1)
173 {
174 LLVMValueRef result;
175 src0 = ac_to_float(ctx, src0);
176 src1 = ac_to_float(ctx, src1);
177 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
178 return LLVMBuildSelect(ctx->builder, result,
179 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
180 ctx->i32_0, "");
181 }
182
183 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
184 const char *intrin,
185 LLVMTypeRef result_type,
186 LLVMValueRef src0)
187 {
188 char name[64];
189 LLVMValueRef params[] = {
190 ac_to_float(ctx, src0),
191 };
192
193 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
194 ac_get_elem_bits(ctx, result_type));
195 assert(length < sizeof(name));
196 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
197 }
198
199 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
200 const char *intrin,
201 LLVMTypeRef result_type,
202 LLVMValueRef src0, LLVMValueRef src1)
203 {
204 char name[64];
205 LLVMValueRef params[] = {
206 ac_to_float(ctx, src0),
207 ac_to_float(ctx, src1),
208 };
209
210 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
211 ac_get_elem_bits(ctx, result_type));
212 assert(length < sizeof(name));
213 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
214 }
215
216 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
217 const char *intrin,
218 LLVMTypeRef result_type,
219 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
220 {
221 char name[64];
222 LLVMValueRef params[] = {
223 ac_to_float(ctx, src0),
224 ac_to_float(ctx, src1),
225 ac_to_float(ctx, src2),
226 };
227
228 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
229 ac_get_elem_bits(ctx, result_type));
230 assert(length < sizeof(name));
231 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
232 }
233
234 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
235 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
236 {
237 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
238
239 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
240 ctx->i32_0, "");
241 return LLVMBuildSelect(ctx->builder, v,
242 ac_to_integer_or_pointer(ctx, src1),
243 ac_to_integer_or_pointer(ctx, src2), "");
244 }
245
246 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
247 LLVMValueRef src0)
248 {
249 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
250 }
251
252 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
253 const char *intrin,
254 LLVMValueRef src0, LLVMValueRef src1)
255 {
256 LLVMTypeRef ret_type;
257 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
258 LLVMValueRef res;
259 LLVMValueRef params[] = { src0, src1 };
260 ret_type = LLVMStructTypeInContext(ctx->context, types,
261 2, true);
262
263 res = ac_build_intrinsic(ctx, intrin, ret_type,
264 params, 2, AC_FUNC_ATTR_READNONE);
265
266 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
267 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
268 return res;
269 }
270
271 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
272 LLVMValueRef src0,
273 unsigned bitsize)
274 {
275 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
276 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
277 "");
278 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
279
280 switch (bitsize) {
281 case 16:
282 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
283 case 32:
284 return result;
285 case 64:
286 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
287 default:
288 unreachable("Unsupported bit size.");
289 }
290 }
291
292 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
293 LLVMValueRef src0)
294 {
295 src0 = ac_to_float(ctx, src0);
296 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
297 return LLVMBuildSExt(ctx->builder,
298 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
299 ctx->i32, "");
300 }
301
302 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
303 LLVMValueRef src0,
304 unsigned bitsize)
305 {
306 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
307
308 switch (bitsize) {
309 case 8:
310 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
311 case 16:
312 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
313 case 32:
314 return result;
315 case 64:
316 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
317 default:
318 unreachable("Unsupported bit size.");
319 }
320 }
321
322 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
323 LLVMValueRef src0)
324 {
325 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
326 return LLVMBuildSExt(ctx->builder,
327 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
328 ctx->i32, "");
329 }
330
331 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
332 LLVMValueRef src0)
333 {
334 LLVMValueRef result;
335 LLVMValueRef cond = NULL;
336
337 src0 = ac_to_float(ctx, src0);
338 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
339
340 if (ctx->chip_class >= GFX8) {
341 LLVMValueRef args[2];
342 /* Check if the result is a denormal - and flush to 0 if so. */
343 args[0] = result;
344 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
345 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
346 }
347
348 /* need to convert back up to f32 */
349 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
350
351 if (ctx->chip_class >= GFX8)
352 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
353 else {
354 /* for GFX6-GFX7 */
355 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
356 * so compare the result and flush to 0 if it's smaller.
357 */
358 LLVMValueRef temp, cond2;
359 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
360 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
361 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
362 temp, "");
363 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
364 temp, ctx->f32_0, "");
365 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
366 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
367 }
368 return result;
369 }
370
371 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
372 LLVMValueRef src0, LLVMValueRef src1)
373 {
374 LLVMValueRef dst64, result;
375 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
376 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
377
378 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
379 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
380 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
381 return result;
382 }
383
384 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
385 LLVMValueRef src0, LLVMValueRef src1)
386 {
387 LLVMValueRef dst64, result;
388 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
389 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
390
391 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
392 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
393 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
394 return result;
395 }
396
397 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
398 LLVMValueRef bits, LLVMValueRef offset)
399 {
400 /* mask = ((1 << bits) - 1) << offset */
401 return LLVMBuildShl(ctx->builder,
402 LLVMBuildSub(ctx->builder,
403 LLVMBuildShl(ctx->builder,
404 ctx->i32_1,
405 bits, ""),
406 ctx->i32_1, ""),
407 offset, "");
408 }
409
410 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
411 LLVMValueRef mask, LLVMValueRef insert,
412 LLVMValueRef base)
413 {
414 /* Calculate:
415 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
416 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
417 */
418 return LLVMBuildXor(ctx->builder, base,
419 LLVMBuildAnd(ctx->builder, mask,
420 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
421 }
422
423 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
424 LLVMValueRef src0,
425 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
426 LLVMValueRef args[2]))
427 {
428 LLVMValueRef comp[2];
429
430 src0 = ac_to_float(ctx, src0);
431 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
432 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
433
434 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
435 }
436
437 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
438 LLVMValueRef src0)
439 {
440 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
441 LLVMValueRef temps[2], val;
442 int i;
443
444 for (i = 0; i < 2; i++) {
445 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
446 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
447 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
448 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
449 }
450 return ac_build_gather_values(ctx, temps, 2);
451 }
452
453 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
454 nir_op op,
455 LLVMValueRef src0)
456 {
457 unsigned mask;
458 int idx;
459 LLVMValueRef result;
460
461 if (op == nir_op_fddx_fine)
462 mask = AC_TID_MASK_LEFT;
463 else if (op == nir_op_fddy_fine)
464 mask = AC_TID_MASK_TOP;
465 else
466 mask = AC_TID_MASK_TOP_LEFT;
467
468 /* for DDX we want to next X pixel, DDY next Y pixel. */
469 if (op == nir_op_fddx_fine ||
470 op == nir_op_fddx_coarse ||
471 op == nir_op_fddx)
472 idx = 1;
473 else
474 idx = 2;
475
476 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
477 return result;
478 }
479
480 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
481 {
482 LLVMValueRef src[4], result = NULL;
483 unsigned num_components = instr->dest.dest.ssa.num_components;
484 unsigned src_components;
485 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
486
487 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
488 switch (instr->op) {
489 case nir_op_vec2:
490 case nir_op_vec3:
491 case nir_op_vec4:
492 src_components = 1;
493 break;
494 case nir_op_pack_half_2x16:
495 case nir_op_pack_snorm_2x16:
496 case nir_op_pack_unorm_2x16:
497 src_components = 2;
498 break;
499 case nir_op_unpack_half_2x16:
500 src_components = 1;
501 break;
502 case nir_op_cube_face_coord:
503 case nir_op_cube_face_index:
504 src_components = 3;
505 break;
506 default:
507 src_components = num_components;
508 break;
509 }
510 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
511 src[i] = get_alu_src(ctx, instr->src[i], src_components);
512
513 switch (instr->op) {
514 case nir_op_mov:
515 result = src[0];
516 break;
517 case nir_op_fneg:
518 src[0] = ac_to_float(&ctx->ac, src[0]);
519 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
520 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
521 /* fneg will be optimized by backend compiler with sign
522 * bit removed via XOR. This is probably a LLVM bug.
523 */
524 result = ac_build_canonicalize(&ctx->ac, result,
525 instr->dest.dest.ssa.bit_size);
526 }
527 break;
528 case nir_op_ineg:
529 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
530 break;
531 case nir_op_inot:
532 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
533 break;
534 case nir_op_iadd:
535 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
536 break;
537 case nir_op_fadd:
538 src[0] = ac_to_float(&ctx->ac, src[0]);
539 src[1] = ac_to_float(&ctx->ac, src[1]);
540 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
541 break;
542 case nir_op_fsub:
543 src[0] = ac_to_float(&ctx->ac, src[0]);
544 src[1] = ac_to_float(&ctx->ac, src[1]);
545 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
546 break;
547 case nir_op_isub:
548 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
549 break;
550 case nir_op_imul:
551 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
552 break;
553 case nir_op_imod:
554 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
555 break;
556 case nir_op_umod:
557 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
558 break;
559 case nir_op_fmod:
560 /* lower_fmod only lower 16-bit and 32-bit fmod */
561 assert(instr->dest.dest.ssa.bit_size == 64);
562 src[0] = ac_to_float(&ctx->ac, src[0]);
563 src[1] = ac_to_float(&ctx->ac, src[1]);
564 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
565 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
566 ac_to_float_type(&ctx->ac, def_type), result);
567 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
568 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
569 break;
570 case nir_op_irem:
571 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
572 break;
573 case nir_op_idiv:
574 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
575 break;
576 case nir_op_udiv:
577 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
578 break;
579 case nir_op_fmul:
580 src[0] = ac_to_float(&ctx->ac, src[0]);
581 src[1] = ac_to_float(&ctx->ac, src[1]);
582 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
583 break;
584 case nir_op_frcp:
585 src[0] = ac_to_float(&ctx->ac, src[0]);
586 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
587 break;
588 case nir_op_iand:
589 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
590 break;
591 case nir_op_ior:
592 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
593 break;
594 case nir_op_ixor:
595 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
596 break;
597 case nir_op_ishl:
598 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
599 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
600 LLVMTypeOf(src[0]), "");
601 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
602 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
603 LLVMTypeOf(src[0]), "");
604 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
605 break;
606 case nir_op_ishr:
607 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
608 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
609 LLVMTypeOf(src[0]), "");
610 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
611 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
612 LLVMTypeOf(src[0]), "");
613 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
614 break;
615 case nir_op_ushr:
616 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
617 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
618 LLVMTypeOf(src[0]), "");
619 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
620 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
621 LLVMTypeOf(src[0]), "");
622 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
623 break;
624 case nir_op_ilt32:
625 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
626 break;
627 case nir_op_ine32:
628 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
629 break;
630 case nir_op_ieq32:
631 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
632 break;
633 case nir_op_ige32:
634 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
635 break;
636 case nir_op_ult32:
637 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
638 break;
639 case nir_op_uge32:
640 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
641 break;
642 case nir_op_feq32:
643 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
644 break;
645 case nir_op_fne32:
646 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
647 break;
648 case nir_op_flt32:
649 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
650 break;
651 case nir_op_fge32:
652 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
653 break;
654 case nir_op_fabs:
655 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
656 ac_to_float_type(&ctx->ac, def_type), src[0]);
657 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
658 /* fabs will be optimized by backend compiler with sign
659 * bit removed via AND.
660 */
661 result = ac_build_canonicalize(&ctx->ac, result,
662 instr->dest.dest.ssa.bit_size);
663 }
664 break;
665 case nir_op_iabs:
666 result = emit_iabs(&ctx->ac, src[0]);
667 break;
668 case nir_op_imax:
669 result = ac_build_imax(&ctx->ac, src[0], src[1]);
670 break;
671 case nir_op_imin:
672 result = ac_build_imin(&ctx->ac, src[0], src[1]);
673 break;
674 case nir_op_umax:
675 result = ac_build_umax(&ctx->ac, src[0], src[1]);
676 break;
677 case nir_op_umin:
678 result = ac_build_umin(&ctx->ac, src[0], src[1]);
679 break;
680 case nir_op_isign:
681 result = ac_build_isign(&ctx->ac, src[0],
682 instr->dest.dest.ssa.bit_size);
683 break;
684 case nir_op_fsign:
685 src[0] = ac_to_float(&ctx->ac, src[0]);
686 result = ac_build_fsign(&ctx->ac, src[0],
687 instr->dest.dest.ssa.bit_size);
688 break;
689 case nir_op_ffloor:
690 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
691 ac_to_float_type(&ctx->ac, def_type), src[0]);
692 break;
693 case nir_op_ftrunc:
694 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
695 ac_to_float_type(&ctx->ac, def_type), src[0]);
696 break;
697 case nir_op_fceil:
698 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
699 ac_to_float_type(&ctx->ac, def_type), src[0]);
700 break;
701 case nir_op_fround_even:
702 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
703 ac_to_float_type(&ctx->ac, def_type),src[0]);
704 break;
705 case nir_op_ffract:
706 src[0] = ac_to_float(&ctx->ac, src[0]);
707 result = ac_build_fract(&ctx->ac, src[0],
708 instr->dest.dest.ssa.bit_size);
709 break;
710 case nir_op_fsin:
711 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
712 ac_to_float_type(&ctx->ac, def_type), src[0]);
713 break;
714 case nir_op_fcos:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
716 ac_to_float_type(&ctx->ac, def_type), src[0]);
717 break;
718 case nir_op_fsqrt:
719 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
720 ac_to_float_type(&ctx->ac, def_type), src[0]);
721 break;
722 case nir_op_fexp2:
723 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
724 ac_to_float_type(&ctx->ac, def_type), src[0]);
725 break;
726 case nir_op_flog2:
727 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
728 ac_to_float_type(&ctx->ac, def_type), src[0]);
729 break;
730 case nir_op_frsq:
731 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
732 ac_to_float_type(&ctx->ac, def_type), src[0]);
733 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
734 break;
735 case nir_op_frexp_exp:
736 src[0] = ac_to_float(&ctx->ac, src[0]);
737 result = ac_build_frexp_exp(&ctx->ac, src[0],
738 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
739 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
740 result = LLVMBuildSExt(ctx->ac.builder, result,
741 ctx->ac.i32, "");
742 break;
743 case nir_op_frexp_sig:
744 src[0] = ac_to_float(&ctx->ac, src[0]);
745 result = ac_build_frexp_mant(&ctx->ac, src[0],
746 instr->dest.dest.ssa.bit_size);
747 break;
748 case nir_op_fpow:
749 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
750 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
751 break;
752 case nir_op_fmax:
753 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
754 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
755 if (ctx->ac.chip_class < GFX9 &&
756 instr->dest.dest.ssa.bit_size == 32) {
757 /* Only pre-GFX9 chips do not flush denorms. */
758 result = ac_build_canonicalize(&ctx->ac, result,
759 instr->dest.dest.ssa.bit_size);
760 }
761 break;
762 case nir_op_fmin:
763 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
764 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
765 if (ctx->ac.chip_class < GFX9 &&
766 instr->dest.dest.ssa.bit_size == 32) {
767 /* Only pre-GFX9 chips do not flush denorms. */
768 result = ac_build_canonicalize(&ctx->ac, result,
769 instr->dest.dest.ssa.bit_size);
770 }
771 break;
772 case nir_op_ffma:
773 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
774 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
775 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
776 break;
777 case nir_op_ldexp:
778 src[0] = ac_to_float(&ctx->ac, src[0]);
779 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
780 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
781 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
782 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
783 else
784 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
785 break;
786 case nir_op_bfm:
787 result = emit_bfm(&ctx->ac, src[0], src[1]);
788 break;
789 case nir_op_bitfield_select:
790 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
791 break;
792 case nir_op_ubfe:
793 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
794 break;
795 case nir_op_ibfe:
796 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
797 break;
798 case nir_op_bitfield_reverse:
799 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
800 break;
801 case nir_op_bit_count:
802 result = ac_build_bit_count(&ctx->ac, src[0]);
803 break;
804 case nir_op_vec2:
805 case nir_op_vec3:
806 case nir_op_vec4:
807 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
808 src[i] = ac_to_integer(&ctx->ac, src[i]);
809 result = ac_build_gather_values(&ctx->ac, src, num_components);
810 break;
811 case nir_op_f2i8:
812 case nir_op_f2i16:
813 case nir_op_f2i32:
814 case nir_op_f2i64:
815 src[0] = ac_to_float(&ctx->ac, src[0]);
816 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
817 break;
818 case nir_op_f2u8:
819 case nir_op_f2u16:
820 case nir_op_f2u32:
821 case nir_op_f2u64:
822 src[0] = ac_to_float(&ctx->ac, src[0]);
823 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
824 break;
825 case nir_op_i2f16:
826 case nir_op_i2f32:
827 case nir_op_i2f64:
828 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
829 break;
830 case nir_op_u2f16:
831 case nir_op_u2f32:
832 case nir_op_u2f64:
833 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
834 break;
835 case nir_op_f2f16_rtz:
836 src[0] = ac_to_float(&ctx->ac, src[0]);
837 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
838 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
839 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
840 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
841 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
842 break;
843 case nir_op_f2f16_rtne:
844 case nir_op_f2f16:
845 case nir_op_f2f32:
846 case nir_op_f2f64:
847 src[0] = ac_to_float(&ctx->ac, src[0]);
848 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
849 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
850 else
851 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
852 break;
853 case nir_op_u2u8:
854 case nir_op_u2u16:
855 case nir_op_u2u32:
856 case nir_op_u2u64:
857 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
858 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
859 else
860 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
861 break;
862 case nir_op_i2i8:
863 case nir_op_i2i16:
864 case nir_op_i2i32:
865 case nir_op_i2i64:
866 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
867 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
868 else
869 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
870 break;
871 case nir_op_b32csel:
872 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
873 break;
874 case nir_op_find_lsb:
875 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
876 break;
877 case nir_op_ufind_msb:
878 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
879 break;
880 case nir_op_ifind_msb:
881 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
882 break;
883 case nir_op_uadd_carry:
884 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
885 break;
886 case nir_op_usub_borrow:
887 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
888 break;
889 case nir_op_b2f16:
890 case nir_op_b2f32:
891 case nir_op_b2f64:
892 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
893 break;
894 case nir_op_f2b32:
895 result = emit_f2b(&ctx->ac, src[0]);
896 break;
897 case nir_op_b2i8:
898 case nir_op_b2i16:
899 case nir_op_b2i32:
900 case nir_op_b2i64:
901 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
902 break;
903 case nir_op_i2b32:
904 result = emit_i2b(&ctx->ac, src[0]);
905 break;
906 case nir_op_fquantize2f16:
907 result = emit_f2f16(&ctx->ac, src[0]);
908 break;
909 case nir_op_umul_high:
910 result = emit_umul_high(&ctx->ac, src[0], src[1]);
911 break;
912 case nir_op_imul_high:
913 result = emit_imul_high(&ctx->ac, src[0], src[1]);
914 break;
915 case nir_op_pack_half_2x16:
916 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
917 break;
918 case nir_op_pack_snorm_2x16:
919 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
920 break;
921 case nir_op_pack_unorm_2x16:
922 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
923 break;
924 case nir_op_unpack_half_2x16:
925 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
926 break;
927 case nir_op_fddx:
928 case nir_op_fddy:
929 case nir_op_fddx_fine:
930 case nir_op_fddy_fine:
931 case nir_op_fddx_coarse:
932 case nir_op_fddy_coarse:
933 result = emit_ddxy(ctx, instr->op, src[0]);
934 break;
935
936 case nir_op_unpack_64_2x32_split_x: {
937 assert(ac_get_llvm_num_components(src[0]) == 1);
938 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
939 ctx->ac.v2i32,
940 "");
941 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
942 ctx->ac.i32_0, "");
943 break;
944 }
945
946 case nir_op_unpack_64_2x32_split_y: {
947 assert(ac_get_llvm_num_components(src[0]) == 1);
948 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
949 ctx->ac.v2i32,
950 "");
951 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
952 ctx->ac.i32_1, "");
953 break;
954 }
955
956 case nir_op_pack_64_2x32_split: {
957 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
958 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
959 break;
960 }
961
962 case nir_op_pack_32_2x16_split: {
963 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
964 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
965 break;
966 }
967
968 case nir_op_unpack_32_2x16_split_x: {
969 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
970 ctx->ac.v2i16,
971 "");
972 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
973 ctx->ac.i32_0, "");
974 break;
975 }
976
977 case nir_op_unpack_32_2x16_split_y: {
978 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
979 ctx->ac.v2i16,
980 "");
981 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
982 ctx->ac.i32_1, "");
983 break;
984 }
985
986 case nir_op_cube_face_coord: {
987 src[0] = ac_to_float(&ctx->ac, src[0]);
988 LLVMValueRef results[2];
989 LLVMValueRef in[3];
990 for (unsigned chan = 0; chan < 3; chan++)
991 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
992 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
993 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
994 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
995 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
996 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
997 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
998 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
999 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1000 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1001 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1002 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1003 result = ac_build_gather_values(&ctx->ac, results, 2);
1004 break;
1005 }
1006
1007 case nir_op_cube_face_index: {
1008 src[0] = ac_to_float(&ctx->ac, src[0]);
1009 LLVMValueRef in[3];
1010 for (unsigned chan = 0; chan < 3; chan++)
1011 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1012 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1013 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1014 break;
1015 }
1016
1017 case nir_op_fmin3:
1018 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1019 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1020 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1021 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1022 break;
1023 case nir_op_umin3:
1024 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1025 result = ac_build_umin(&ctx->ac, result, src[2]);
1026 break;
1027 case nir_op_imin3:
1028 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1029 result = ac_build_imin(&ctx->ac, result, src[2]);
1030 break;
1031 case nir_op_fmax3:
1032 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1033 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1034 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1035 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1036 break;
1037 case nir_op_umax3:
1038 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1039 result = ac_build_umax(&ctx->ac, result, src[2]);
1040 break;
1041 case nir_op_imax3:
1042 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1043 result = ac_build_imax(&ctx->ac, result, src[2]);
1044 break;
1045 case nir_op_fmed3: {
1046 src[0] = ac_to_float(&ctx->ac, src[0]);
1047 src[1] = ac_to_float(&ctx->ac, src[1]);
1048 src[2] = ac_to_float(&ctx->ac, src[2]);
1049 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1050 instr->dest.dest.ssa.bit_size);
1051 break;
1052 }
1053 case nir_op_imed3: {
1054 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1055 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1056 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1057 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1058 break;
1059 }
1060 case nir_op_umed3: {
1061 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1062 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1063 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1064 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1065 break;
1066 }
1067
1068 default:
1069 fprintf(stderr, "Unknown NIR alu instr: ");
1070 nir_print_instr(&instr->instr, stderr);
1071 fprintf(stderr, "\n");
1072 abort();
1073 }
1074
1075 if (result) {
1076 assert(instr->dest.dest.is_ssa);
1077 result = ac_to_integer_or_pointer(&ctx->ac, result);
1078 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1079 }
1080 }
1081
1082 static void visit_load_const(struct ac_nir_context *ctx,
1083 const nir_load_const_instr *instr)
1084 {
1085 LLVMValueRef values[4], value = NULL;
1086 LLVMTypeRef element_type =
1087 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1088
1089 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1090 switch (instr->def.bit_size) {
1091 case 8:
1092 values[i] = LLVMConstInt(element_type,
1093 instr->value[i].u8, false);
1094 break;
1095 case 16:
1096 values[i] = LLVMConstInt(element_type,
1097 instr->value[i].u16, false);
1098 break;
1099 case 32:
1100 values[i] = LLVMConstInt(element_type,
1101 instr->value[i].u32, false);
1102 break;
1103 case 64:
1104 values[i] = LLVMConstInt(element_type,
1105 instr->value[i].u64, false);
1106 break;
1107 default:
1108 fprintf(stderr,
1109 "unsupported nir load_const bit_size: %d\n",
1110 instr->def.bit_size);
1111 abort();
1112 }
1113 }
1114 if (instr->def.num_components > 1) {
1115 value = LLVMConstVector(values, instr->def.num_components);
1116 } else
1117 value = values[0];
1118
1119 ctx->ssa_defs[instr->def.index] = value;
1120 }
1121
1122 static LLVMValueRef
1123 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1124 {
1125 LLVMValueRef size =
1126 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1127 LLVMConstInt(ctx->ac.i32, 2, false), "");
1128
1129 /* GFX8 only */
1130 if (ctx->ac.chip_class == GFX8 && in_elements) {
1131 /* On GFX8, the descriptor contains the size in bytes,
1132 * but TXQ must return the size in elements.
1133 * The stride is always non-zero for resources using TXQ.
1134 */
1135 LLVMValueRef stride =
1136 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1137 ctx->ac.i32_1, "");
1138 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1139 LLVMConstInt(ctx->ac.i32, 16, false), "");
1140 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1141 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1142
1143 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1144 }
1145 return size;
1146 }
1147
1148 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1149 * incorrectly forces nearest filtering if the texture format is integer.
1150 * The only effect it has on Gather4, which always returns 4 texels for
1151 * bilinear filtering, is that the final coordinates are off by 0.5 of
1152 * the texel size.
1153 *
1154 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1155 * or (0.5 / size) from the normalized coordinates.
1156 *
1157 * However, cube textures with 8_8_8_8 data formats require a different
1158 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1159 * precision in 32-bit data formats, so it needs to be applied dynamically at
1160 * runtime. In this case, return an i1 value that indicates whether the
1161 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1162 */
1163 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1164 nir_variable *var,
1165 struct ac_image_args *args,
1166 const nir_tex_instr *instr)
1167 {
1168 const struct glsl_type *type = glsl_without_array(var->type);
1169 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1170 LLVMValueRef wa_8888 = NULL;
1171 LLVMValueRef half_texel[2];
1172 LLVMValueRef result;
1173
1174 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1175
1176 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1177 LLVMValueRef formats;
1178 LLVMValueRef data_format;
1179 LLVMValueRef wa_formats;
1180
1181 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1182
1183 data_format = LLVMBuildLShr(ctx->builder, formats,
1184 LLVMConstInt(ctx->i32, 20, false), "");
1185 data_format = LLVMBuildAnd(ctx->builder, data_format,
1186 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1187 wa_8888 = LLVMBuildICmp(
1188 ctx->builder, LLVMIntEQ, data_format,
1189 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1190 "");
1191
1192 uint32_t wa_num_format =
1193 stype == GLSL_TYPE_UINT ?
1194 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1195 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1196 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1197 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1198 "");
1199 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1200 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1201
1202 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1203 args->resource = LLVMBuildInsertElement(
1204 ctx->builder, args->resource, formats, ctx->i32_1, "");
1205 }
1206
1207 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1208 assert(!wa_8888);
1209 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1210 } else {
1211 struct ac_image_args resinfo = {};
1212 LLVMBasicBlockRef bbs[2];
1213
1214 LLVMValueRef unnorm = NULL;
1215 LLVMValueRef default_offset = ctx->f32_0;
1216 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1217 !instr->is_array) {
1218 /* In vulkan, whether the sampler uses unnormalized
1219 * coordinates or not is a dynamic property of the
1220 * sampler. Hence, to figure out whether or not we
1221 * need to divide by the texture size, we need to test
1222 * the sampler at runtime. This tests the bit set by
1223 * radv_init_sampler().
1224 */
1225 LLVMValueRef sampler0 =
1226 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1227 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1228 LLVMConstInt(ctx->i32, 15, false), "");
1229 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1230 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1231 default_offset = LLVMConstReal(ctx->f32, -0.5);
1232 }
1233
1234 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1235 if (wa_8888 || unnorm) {
1236 assert(!(wa_8888 && unnorm));
1237 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1238 /* Skip the texture size query entirely if we don't need it. */
1239 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1240 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1241 }
1242
1243 /* Query the texture size. */
1244 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1245 resinfo.opcode = ac_image_get_resinfo;
1246 resinfo.dmask = 0xf;
1247 resinfo.lod = ctx->i32_0;
1248 resinfo.resource = args->resource;
1249 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1250 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1251
1252 /* Compute -0.5 / size. */
1253 for (unsigned c = 0; c < 2; c++) {
1254 half_texel[c] =
1255 LLVMBuildExtractElement(ctx->builder, size,
1256 LLVMConstInt(ctx->i32, c, 0), "");
1257 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1258 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1259 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1260 LLVMConstReal(ctx->f32, -0.5), "");
1261 }
1262
1263 if (wa_8888 || unnorm) {
1264 ac_build_endif(ctx, 2000);
1265
1266 for (unsigned c = 0; c < 2; c++) {
1267 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1268 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1269 values, bbs);
1270 }
1271 }
1272 }
1273
1274 for (unsigned c = 0; c < 2; c++) {
1275 LLVMValueRef tmp;
1276 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1277 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1278 }
1279
1280 args->attributes = AC_FUNC_ATTR_READNONE;
1281 result = ac_build_image_opcode(ctx, args);
1282
1283 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1284 LLVMValueRef tmp, tmp2;
1285
1286 /* if the cube workaround is in place, f2i the result. */
1287 for (unsigned c = 0; c < 4; c++) {
1288 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1289 if (stype == GLSL_TYPE_UINT)
1290 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1291 else
1292 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1293 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1294 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1295 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1296 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1297 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1298 }
1299 }
1300 return result;
1301 }
1302
1303 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1304 {
1305 nir_deref_instr *texture_deref_instr = NULL;
1306
1307 for (unsigned i = 0; i < instr->num_srcs; i++) {
1308 switch (instr->src[i].src_type) {
1309 case nir_tex_src_texture_deref:
1310 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1311 break;
1312 default:
1313 break;
1314 }
1315 }
1316 return texture_deref_instr;
1317 }
1318
1319 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1320 const nir_tex_instr *instr,
1321 struct ac_image_args *args)
1322 {
1323 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1324 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1325
1326 return ac_build_buffer_load_format(&ctx->ac,
1327 args->resource,
1328 args->coords[0],
1329 ctx->ac.i32_0,
1330 util_last_bit(mask),
1331 0, true);
1332 }
1333
1334 args->opcode = ac_image_sample;
1335
1336 switch (instr->op) {
1337 case nir_texop_txf:
1338 case nir_texop_txf_ms:
1339 case nir_texop_samples_identical:
1340 args->opcode = args->level_zero ||
1341 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1342 ac_image_load : ac_image_load_mip;
1343 args->level_zero = false;
1344 break;
1345 case nir_texop_txs:
1346 case nir_texop_query_levels:
1347 args->opcode = ac_image_get_resinfo;
1348 if (!args->lod)
1349 args->lod = ctx->ac.i32_0;
1350 args->level_zero = false;
1351 break;
1352 case nir_texop_tex:
1353 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1354 assert(!args->lod);
1355 args->level_zero = true;
1356 }
1357 break;
1358 case nir_texop_tg4:
1359 args->opcode = ac_image_gather4;
1360 args->level_zero = true;
1361 break;
1362 case nir_texop_lod:
1363 args->opcode = ac_image_get_lod;
1364 break;
1365 default:
1366 break;
1367 }
1368
1369 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1370 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1371 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1372 const struct glsl_type *type = glsl_without_array(var->type);
1373 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1374 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1375 return lower_gather4_integer(&ctx->ac, var, args, instr);
1376 }
1377 }
1378
1379 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1380 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1381 if ((args->dim == ac_image_2darray ||
1382 args->dim == ac_image_2d) && !args->coords[1]) {
1383 args->coords[1] = ctx->ac.i32_0;
1384 }
1385 }
1386
1387 args->attributes = AC_FUNC_ATTR_READNONE;
1388 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1389 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1390 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1391 /* Prevent texture instructions with implicit derivatives from being
1392 * sinked into branches. */
1393 switch (instr->op) {
1394 case nir_texop_tex:
1395 case nir_texop_txb:
1396 case nir_texop_lod:
1397 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1398 break;
1399 default:
1400 break;
1401 }
1402 }
1403
1404 return ac_build_image_opcode(&ctx->ac, args);
1405 }
1406
1407 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1408 nir_intrinsic_instr *instr)
1409 {
1410 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1411 LLVMValueRef index = get_src(ctx, instr->src[1]);
1412
1413 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1414 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1415 return result;
1416 }
1417
1418 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1419 nir_intrinsic_instr *instr)
1420 {
1421 LLVMValueRef ptr, addr;
1422 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1423 unsigned index = nir_intrinsic_base(instr);
1424
1425 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1426 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1427
1428 /* Load constant values from user SGPRS when possible, otherwise
1429 * fallback to the default path that loads directly from memory.
1430 */
1431 if (LLVMIsConstant(src0) &&
1432 instr->dest.ssa.bit_size == 32) {
1433 unsigned count = instr->dest.ssa.num_components;
1434 unsigned offset = index;
1435
1436 offset += LLVMConstIntGetZExtValue(src0);
1437 offset /= 4;
1438
1439 offset -= ctx->args->base_inline_push_consts;
1440
1441 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1442 if (offset + count <= num_inline_push_consts) {
1443 LLVMValueRef push_constants[num_inline_push_consts];
1444 for (unsigned i = 0; i < num_inline_push_consts; i++)
1445 push_constants[i] = ac_get_arg(&ctx->ac,
1446 ctx->args->inline_push_consts[i]);
1447 return ac_build_gather_values(&ctx->ac,
1448 push_constants + offset,
1449 count);
1450 }
1451 }
1452
1453 ptr = LLVMBuildGEP(ctx->ac.builder,
1454 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1455
1456 if (instr->dest.ssa.bit_size == 8) {
1457 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1458 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1459 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1460 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1461
1462 LLVMValueRef params[3];
1463 if (load_dwords > 1) {
1464 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1465 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1466 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1467 } else {
1468 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1469 params[0] = ctx->ac.i32_0;
1470 params[1] = res;
1471 }
1472 params[2] = addr;
1473 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1474
1475 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1476 if (instr->dest.ssa.num_components > 1)
1477 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1478 return res;
1479 } else if (instr->dest.ssa.bit_size == 16) {
1480 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1481 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1482 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1483 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1484 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1485 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1486 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1487 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1488 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1489 LLVMConstInt(ctx->ac.i32, 4, false)};
1490 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1491 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1492 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1493 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1494 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1495 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1496 }
1497
1498 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1499
1500 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1501 }
1502
1503 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1504 const nir_intrinsic_instr *instr)
1505 {
1506 LLVMValueRef index = get_src(ctx, instr->src[0]);
1507
1508 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1509 }
1510
1511 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1512 {
1513 uint32_t new_mask = 0;
1514 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1515 if (mask & (1u << i))
1516 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1517 return new_mask;
1518 }
1519
1520 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1521 unsigned start, unsigned count)
1522 {
1523 LLVMValueRef mask[] = {
1524 ctx->i32_0, ctx->i32_1,
1525 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1526
1527 unsigned src_elements = ac_get_llvm_num_components(src);
1528
1529 if (count == src_elements) {
1530 assert(start == 0);
1531 return src;
1532 } else if (count == 1) {
1533 assert(start < src_elements);
1534 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1535 } else {
1536 assert(start + count <= src_elements);
1537 assert(count <= 4);
1538 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1539 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1540 }
1541 }
1542
1543 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1544 enum gl_access_qualifier access,
1545 bool may_store_unaligned,
1546 bool writeonly_memory)
1547 {
1548 unsigned cache_policy = 0;
1549
1550 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1551 * store opcodes not aligned to a dword are affected. The only way to
1552 * get unaligned stores is through shader images.
1553 */
1554 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1555 /* If this is write-only, don't keep data in L1 to prevent
1556 * evicting L1 cache lines that may be needed by other
1557 * instructions.
1558 */
1559 writeonly_memory ||
1560 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1561 cache_policy |= ac_glc;
1562 }
1563
1564 if (access & ACCESS_STREAM_CACHE_POLICY)
1565 cache_policy |= ac_slc;
1566
1567 return cache_policy;
1568 }
1569
1570 static void visit_store_ssbo(struct ac_nir_context *ctx,
1571 nir_intrinsic_instr *instr)
1572 {
1573 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1574 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1575 unsigned writemask = nir_intrinsic_write_mask(instr);
1576 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1577 bool writeonly_memory = access & ACCESS_NON_READABLE;
1578 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1579
1580 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1581 get_src(ctx, instr->src[1]), true);
1582 LLVMValueRef base_data = src_data;
1583 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1584 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1585
1586 while (writemask) {
1587 int start, count;
1588 LLVMValueRef data, offset;
1589 LLVMTypeRef data_type;
1590
1591 u_bit_scan_consecutive_range(&writemask, &start, &count);
1592
1593 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1594 * writes into a 2-element and a 1-element write. */
1595 if (count == 3 &&
1596 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1597 writemask |= 1 << (start + 2);
1598 count = 2;
1599 }
1600 int num_bytes = count * elem_size_bytes; /* count in bytes */
1601
1602 /* we can only store 4 DWords at the same time.
1603 * can only happen for 64 Bit vectors. */
1604 if (num_bytes > 16) {
1605 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1606 count = 2;
1607 num_bytes = 16;
1608 }
1609
1610 /* check alignment of 16 Bit stores */
1611 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1612 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1613 count = 1;
1614 num_bytes = 2;
1615 }
1616 data = extract_vector_range(&ctx->ac, base_data, start, count);
1617
1618 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1619 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1620
1621 if (num_bytes == 1) {
1622 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1623 offset, ctx->ac.i32_0,
1624 cache_policy);
1625 } else if (num_bytes == 2) {
1626 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1627 offset, ctx->ac.i32_0,
1628 cache_policy);
1629 } else {
1630 int num_channels = num_bytes / 4;
1631
1632 switch (num_bytes) {
1633 case 16: /* v4f32 */
1634 data_type = ctx->ac.v4f32;
1635 break;
1636 case 12: /* v3f32 */
1637 data_type = ctx->ac.v3f32;
1638 break;
1639 case 8: /* v2f32 */
1640 data_type = ctx->ac.v2f32;
1641 break;
1642 case 4: /* f32 */
1643 data_type = ctx->ac.f32;
1644 break;
1645 default:
1646 unreachable("Malformed vector store.");
1647 }
1648 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1649
1650 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1651 num_channels, offset,
1652 ctx->ac.i32_0, 0,
1653 cache_policy, false);
1654 }
1655 }
1656 }
1657
1658 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1659 LLVMValueRef descriptor,
1660 LLVMValueRef offset,
1661 LLVMValueRef compare,
1662 LLVMValueRef exchange)
1663 {
1664 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1665 if (ctx->abi->robust_buffer_access) {
1666 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1667
1668 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1669 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1670
1671 ac_build_ifcc(&ctx->ac, cond, -1);
1672
1673 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1674 }
1675
1676 LLVMValueRef ptr_parts[2] = {
1677 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1678 LLVMBuildAnd(ctx->ac.builder,
1679 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1680 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1681 };
1682
1683 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1684 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1685
1686 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1687
1688 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1689 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1690 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1691 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1692
1693 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1694 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1695
1696 if (ctx->abi->robust_buffer_access) {
1697 ac_build_endif(&ctx->ac, -1);
1698
1699 LLVMBasicBlockRef incoming_blocks[2] = {
1700 start_block,
1701 then_block,
1702 };
1703
1704 LLVMValueRef incoming_values[2] = {
1705 LLVMConstInt(ctx->ac.i64, 0, 0),
1706 result,
1707 };
1708 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1709 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1710 return ret;
1711 } else {
1712 return result;
1713 }
1714 }
1715
1716 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1717 const nir_intrinsic_instr *instr)
1718 {
1719 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1720 const char *op;
1721 char name[64], type[8];
1722 LLVMValueRef params[6], descriptor;
1723 int arg_count = 0;
1724
1725 switch (instr->intrinsic) {
1726 case nir_intrinsic_ssbo_atomic_add:
1727 op = "add";
1728 break;
1729 case nir_intrinsic_ssbo_atomic_imin:
1730 op = "smin";
1731 break;
1732 case nir_intrinsic_ssbo_atomic_umin:
1733 op = "umin";
1734 break;
1735 case nir_intrinsic_ssbo_atomic_imax:
1736 op = "smax";
1737 break;
1738 case nir_intrinsic_ssbo_atomic_umax:
1739 op = "umax";
1740 break;
1741 case nir_intrinsic_ssbo_atomic_and:
1742 op = "and";
1743 break;
1744 case nir_intrinsic_ssbo_atomic_or:
1745 op = "or";
1746 break;
1747 case nir_intrinsic_ssbo_atomic_xor:
1748 op = "xor";
1749 break;
1750 case nir_intrinsic_ssbo_atomic_exchange:
1751 op = "swap";
1752 break;
1753 case nir_intrinsic_ssbo_atomic_comp_swap:
1754 op = "cmpswap";
1755 break;
1756 default:
1757 abort();
1758 }
1759
1760 descriptor = ctx->abi->load_ssbo(ctx->abi,
1761 get_src(ctx, instr->src[0]),
1762 true);
1763
1764 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1765 return_type == ctx->ac.i64) {
1766 return emit_ssbo_comp_swap_64(ctx, descriptor,
1767 get_src(ctx, instr->src[1]),
1768 get_src(ctx, instr->src[2]),
1769 get_src(ctx, instr->src[3]));
1770 }
1771 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1772 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1773 }
1774 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1775 params[arg_count++] = descriptor;
1776
1777 if (LLVM_VERSION_MAJOR >= 9) {
1778 /* XXX: The new raw/struct atomic intrinsics are buggy with
1779 * LLVM 8, see r358579.
1780 */
1781 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1782 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1783 params[arg_count++] = ctx->ac.i32_0; /* slc */
1784
1785 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1786 snprintf(name, sizeof(name),
1787 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1788 } else {
1789 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1790 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1791 params[arg_count++] = ctx->ac.i1false; /* slc */
1792
1793 assert(return_type == ctx->ac.i32);
1794 snprintf(name, sizeof(name),
1795 "llvm.amdgcn.buffer.atomic.%s", op);
1796 }
1797
1798 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1799 arg_count, 0);
1800 }
1801
1802 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1803 const nir_intrinsic_instr *instr)
1804 {
1805 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1806 int num_components = instr->num_components;
1807 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1808 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1809
1810 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1811 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1812 get_src(ctx, instr->src[0]), false);
1813 LLVMValueRef vindex = ctx->ac.i32_0;
1814
1815 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1816 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1817
1818 LLVMValueRef results[4];
1819 for (int i = 0; i < num_components;) {
1820 int num_elems = num_components - i;
1821 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1822 num_elems = 1;
1823 if (num_elems * elem_size_bytes > 16)
1824 num_elems = 16 / elem_size_bytes;
1825 int load_bytes = num_elems * elem_size_bytes;
1826
1827 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1828
1829 LLVMValueRef ret;
1830
1831 if (load_bytes == 1) {
1832 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1833 rsrc,
1834 offset,
1835 ctx->ac.i32_0,
1836 immoffset,
1837 cache_policy);
1838 } else if (load_bytes == 2) {
1839 ret = ac_build_tbuffer_load_short(&ctx->ac,
1840 rsrc,
1841 offset,
1842 ctx->ac.i32_0,
1843 immoffset,
1844 cache_policy);
1845 } else {
1846 int num_channels = util_next_power_of_two(load_bytes) / 4;
1847 bool can_speculate = access & ACCESS_CAN_REORDER;
1848
1849 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1850 vindex, offset, immoffset, 0,
1851 cache_policy, can_speculate, false);
1852 }
1853
1854 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1855 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1856 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1857
1858 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1859 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1860
1861 for (unsigned j = 0; j < num_elems; j++) {
1862 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1863 }
1864 i += num_elems;
1865 }
1866
1867 return ac_build_gather_values(&ctx->ac, results, num_components);
1868 }
1869
1870 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1871 const nir_intrinsic_instr *instr)
1872 {
1873 LLVMValueRef ret;
1874 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1875 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1876 int num_components = instr->num_components;
1877
1878 if (ctx->abi->load_ubo)
1879 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1880
1881 if (instr->dest.ssa.bit_size == 64)
1882 num_components *= 2;
1883
1884 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1885 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1886 LLVMValueRef results[num_components];
1887 for (unsigned i = 0; i < num_components; ++i) {
1888 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1889 load_bytes * i, 0);
1890
1891 if (load_bytes == 1) {
1892 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1893 rsrc,
1894 offset,
1895 ctx->ac.i32_0,
1896 immoffset,
1897 0);
1898 } else {
1899 assert(load_bytes == 2);
1900 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1901 rsrc,
1902 offset,
1903 ctx->ac.i32_0,
1904 immoffset,
1905 0);
1906 }
1907 }
1908 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1909 } else {
1910 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1911 NULL, 0, 0, true, true);
1912
1913 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1914 }
1915
1916 return LLVMBuildBitCast(ctx->ac.builder, ret,
1917 get_def_type(ctx, &instr->dest.ssa), "");
1918 }
1919
1920 static void
1921 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1922 bool vs_in, unsigned *vertex_index_out,
1923 LLVMValueRef *vertex_index_ref,
1924 unsigned *const_out, LLVMValueRef *indir_out)
1925 {
1926 nir_variable *var = nir_deref_instr_get_variable(instr);
1927 nir_deref_path path;
1928 unsigned idx_lvl = 1;
1929
1930 nir_deref_path_init(&path, instr, NULL);
1931
1932 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1933 if (vertex_index_ref) {
1934 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1935 if (vertex_index_out)
1936 *vertex_index_out = 0;
1937 } else {
1938 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1939 }
1940 ++idx_lvl;
1941 }
1942
1943 uint32_t const_offset = 0;
1944 LLVMValueRef offset = NULL;
1945
1946 if (var->data.compact) {
1947 assert(instr->deref_type == nir_deref_type_array);
1948 const_offset = nir_src_as_uint(instr->arr.index);
1949 goto out;
1950 }
1951
1952 for (; path.path[idx_lvl]; ++idx_lvl) {
1953 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1954 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1955 unsigned index = path.path[idx_lvl]->strct.index;
1956
1957 for (unsigned i = 0; i < index; i++) {
1958 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1959 const_offset += glsl_count_attribute_slots(ft, vs_in);
1960 }
1961 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1962 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1963 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
1964 const_offset += size *
1965 nir_src_as_uint(path.path[idx_lvl]->arr.index);
1966 } else {
1967 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1968 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1969 if (offset)
1970 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1971 else
1972 offset = array_off;
1973 }
1974 } else
1975 unreachable("Uhandled deref type in get_deref_instr_offset");
1976 }
1977
1978 out:
1979 nir_deref_path_finish(&path);
1980
1981 if (const_offset && offset)
1982 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1983 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1984 "");
1985
1986 *const_out = const_offset;
1987 *indir_out = offset;
1988 }
1989
1990 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
1991 nir_intrinsic_instr *instr,
1992 bool load_inputs)
1993 {
1994 LLVMValueRef result;
1995 LLVMValueRef vertex_index = NULL;
1996 LLVMValueRef indir_index = NULL;
1997 unsigned const_index = 0;
1998
1999 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2000
2001 unsigned location = var->data.location;
2002 unsigned driver_location = var->data.driver_location;
2003 const bool is_patch = var->data.patch;
2004 const bool is_compact = var->data.compact;
2005
2006 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2007 false, NULL, is_patch ? NULL : &vertex_index,
2008 &const_index, &indir_index);
2009
2010 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2011
2012 LLVMTypeRef src_component_type;
2013 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2014 src_component_type = LLVMGetElementType(dest_type);
2015 else
2016 src_component_type = dest_type;
2017
2018 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2019 vertex_index, indir_index,
2020 const_index, location, driver_location,
2021 var->data.location_frac,
2022 instr->num_components,
2023 is_patch, is_compact, load_inputs);
2024 if (instr->dest.ssa.bit_size == 16) {
2025 result = ac_to_integer(&ctx->ac, result);
2026 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2027 }
2028 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2029 }
2030
2031 static unsigned
2032 type_scalar_size_bytes(const struct glsl_type *type)
2033 {
2034 assert(glsl_type_is_vector_or_scalar(type) ||
2035 glsl_type_is_matrix(type));
2036 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2037 }
2038
2039 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2040 nir_intrinsic_instr *instr)
2041 {
2042 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2043 nir_variable *var = nir_deref_instr_get_variable(deref);
2044
2045 LLVMValueRef values[8];
2046 int idx = 0;
2047 int ve = instr->dest.ssa.num_components;
2048 unsigned comp = 0;
2049 LLVMValueRef indir_index;
2050 LLVMValueRef ret;
2051 unsigned const_index;
2052 unsigned stride = 4;
2053 int mode = deref->mode;
2054
2055 if (var) {
2056 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2057 var->data.mode == nir_var_shader_in;
2058 idx = var->data.driver_location;
2059 comp = var->data.location_frac;
2060 mode = var->data.mode;
2061
2062 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2063 &const_index, &indir_index);
2064
2065 if (var->data.compact) {
2066 stride = 1;
2067 const_index += comp;
2068 comp = 0;
2069 }
2070 }
2071
2072 if (instr->dest.ssa.bit_size == 64 &&
2073 (deref->mode == nir_var_shader_in ||
2074 deref->mode == nir_var_shader_out ||
2075 deref->mode == nir_var_function_temp))
2076 ve *= 2;
2077
2078 switch (mode) {
2079 case nir_var_shader_in:
2080 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2081 ctx->stage == MESA_SHADER_TESS_EVAL) {
2082 return load_tess_varyings(ctx, instr, true);
2083 }
2084
2085 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2086 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2087 LLVMValueRef indir_index;
2088 unsigned const_index, vertex_index;
2089 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2090 &const_index, &indir_index);
2091 assert(indir_index == NULL);
2092
2093 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2094 var->data.driver_location,
2095 var->data.location_frac,
2096 instr->num_components, vertex_index, const_index, type);
2097 }
2098
2099 for (unsigned chan = comp; chan < ve + comp; chan++) {
2100 if (indir_index) {
2101 unsigned count = glsl_count_attribute_slots(
2102 var->type,
2103 ctx->stage == MESA_SHADER_VERTEX);
2104 count -= chan / 4;
2105 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2106 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2107 stride, false, true);
2108
2109 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2110 tmp_vec,
2111 indir_index, "");
2112 } else
2113 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2114 }
2115 break;
2116 case nir_var_function_temp:
2117 for (unsigned chan = 0; chan < ve; chan++) {
2118 if (indir_index) {
2119 unsigned count = glsl_count_attribute_slots(
2120 var->type, false);
2121 count -= chan / 4;
2122 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2123 &ctx->ac, ctx->locals + idx + chan, count,
2124 stride, true, true);
2125
2126 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2127 tmp_vec,
2128 indir_index, "");
2129 } else {
2130 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2131 }
2132 }
2133 break;
2134 case nir_var_mem_shared: {
2135 LLVMValueRef address = get_src(ctx, instr->src[0]);
2136 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2137 return LLVMBuildBitCast(ctx->ac.builder, val,
2138 get_def_type(ctx, &instr->dest.ssa),
2139 "");
2140 }
2141 case nir_var_shader_out:
2142 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2143 return load_tess_varyings(ctx, instr, false);
2144 }
2145
2146 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2147 var->data.fb_fetch_output &&
2148 ctx->abi->emit_fbfetch)
2149 return ctx->abi->emit_fbfetch(ctx->abi);
2150
2151 for (unsigned chan = comp; chan < ve + comp; chan++) {
2152 if (indir_index) {
2153 unsigned count = glsl_count_attribute_slots(
2154 var->type, false);
2155 count -= chan / 4;
2156 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2157 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2158 stride, true, true);
2159
2160 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2161 tmp_vec,
2162 indir_index, "");
2163 } else {
2164 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2165 ctx->abi->outputs[idx + chan + const_index * stride],
2166 "");
2167 }
2168 }
2169 break;
2170 case nir_var_mem_global: {
2171 LLVMValueRef address = get_src(ctx, instr->src[0]);
2172 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2173 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2174 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2175
2176 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2177 if (stride != natural_stride) {
2178 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2179 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2180 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2181
2182 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2183 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2184 values[i] = LLVMBuildLoad(ctx->ac.builder,
2185 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2186 }
2187 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2188 } else {
2189 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2190 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2191 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2192 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2193 return val;
2194 }
2195 }
2196 default:
2197 unreachable("unhandle variable mode");
2198 }
2199 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2200 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2201 }
2202
2203 static void
2204 visit_store_var(struct ac_nir_context *ctx,
2205 nir_intrinsic_instr *instr)
2206 {
2207 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2208 nir_variable *var = nir_deref_instr_get_variable(deref);
2209
2210 LLVMValueRef temp_ptr, value;
2211 int idx = 0;
2212 unsigned comp = 0;
2213 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2214 int writemask = instr->const_index[0];
2215 LLVMValueRef indir_index;
2216 unsigned const_index;
2217
2218 if (var) {
2219 get_deref_offset(ctx, deref, false,
2220 NULL, NULL, &const_index, &indir_index);
2221 idx = var->data.driver_location;
2222 comp = var->data.location_frac;
2223
2224 if (var->data.compact) {
2225 const_index += comp;
2226 comp = 0;
2227 }
2228 }
2229
2230 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2231 (deref->mode == nir_var_shader_out ||
2232 deref->mode == nir_var_function_temp)) {
2233
2234 src = LLVMBuildBitCast(ctx->ac.builder, src,
2235 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2236 "");
2237
2238 writemask = widen_mask(writemask, 2);
2239 }
2240
2241 writemask = writemask << comp;
2242
2243 switch (deref->mode) {
2244 case nir_var_shader_out:
2245
2246 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2247 LLVMValueRef vertex_index = NULL;
2248 LLVMValueRef indir_index = NULL;
2249 unsigned const_index = 0;
2250 const bool is_patch = var->data.patch;
2251
2252 get_deref_offset(ctx, deref, false, NULL,
2253 is_patch ? NULL : &vertex_index,
2254 &const_index, &indir_index);
2255
2256 ctx->abi->store_tcs_outputs(ctx->abi, var,
2257 vertex_index, indir_index,
2258 const_index, src, writemask);
2259 return;
2260 }
2261
2262 for (unsigned chan = 0; chan < 8; chan++) {
2263 int stride = 4;
2264 if (!(writemask & (1 << chan)))
2265 continue;
2266
2267 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2268
2269 if (var->data.compact)
2270 stride = 1;
2271 if (indir_index) {
2272 unsigned count = glsl_count_attribute_slots(
2273 var->type, false);
2274 count -= chan / 4;
2275 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2276 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2277 stride, true, true);
2278
2279 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2280 value, indir_index, "");
2281 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2282 count, stride, tmp_vec);
2283
2284 } else {
2285 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2286
2287 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2288 }
2289 }
2290 break;
2291 case nir_var_function_temp:
2292 for (unsigned chan = 0; chan < 8; chan++) {
2293 if (!(writemask & (1 << chan)))
2294 continue;
2295
2296 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2297 if (indir_index) {
2298 unsigned count = glsl_count_attribute_slots(
2299 var->type, false);
2300 count -= chan / 4;
2301 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2302 &ctx->ac, ctx->locals + idx + chan, count,
2303 4, true, true);
2304
2305 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2306 value, indir_index, "");
2307 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2308 count, 4, tmp_vec);
2309 } else {
2310 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2311
2312 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2313 }
2314 }
2315 break;
2316
2317 case nir_var_mem_global:
2318 case nir_var_mem_shared: {
2319 int writemask = instr->const_index[0];
2320 LLVMValueRef address = get_src(ctx, instr->src[0]);
2321 LLVMValueRef val = get_src(ctx, instr->src[1]);
2322
2323 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2324 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2325 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2326
2327 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2328 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2329 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2330
2331 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2332 stride == natural_stride) {
2333 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2334 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2335 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2336
2337 val = LLVMBuildBitCast(ctx->ac.builder, val,
2338 LLVMGetElementType(LLVMTypeOf(address)), "");
2339 LLVMBuildStore(ctx->ac.builder, val, address);
2340 } else {
2341 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2342 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2343 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2344 for (unsigned chan = 0; chan < 4; chan++) {
2345 if (!(writemask & (1 << chan)))
2346 continue;
2347
2348 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2349
2350 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2351 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2352 chan);
2353 src = LLVMBuildBitCast(ctx->ac.builder, src,
2354 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2355 LLVMBuildStore(ctx->ac.builder, src, ptr);
2356 }
2357 }
2358 break;
2359 }
2360 default:
2361 abort();
2362 break;
2363 }
2364 }
2365
2366 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2367 {
2368 switch (dim) {
2369 case GLSL_SAMPLER_DIM_BUF:
2370 return 1;
2371 case GLSL_SAMPLER_DIM_1D:
2372 return array ? 2 : 1;
2373 case GLSL_SAMPLER_DIM_2D:
2374 return array ? 3 : 2;
2375 case GLSL_SAMPLER_DIM_MS:
2376 return array ? 4 : 3;
2377 case GLSL_SAMPLER_DIM_3D:
2378 case GLSL_SAMPLER_DIM_CUBE:
2379 return 3;
2380 case GLSL_SAMPLER_DIM_RECT:
2381 case GLSL_SAMPLER_DIM_SUBPASS:
2382 return 2;
2383 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2384 return 3;
2385 default:
2386 break;
2387 }
2388 return 0;
2389 }
2390
2391 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2392 LLVMValueRef coord_x, LLVMValueRef coord_y,
2393 LLVMValueRef coord_z,
2394 LLVMValueRef sample_index,
2395 LLVMValueRef fmask_desc_ptr)
2396 {
2397 unsigned sample_chan = coord_z ? 3 : 2;
2398 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2399 addr[sample_chan] = sample_index;
2400
2401 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2402 return addr[sample_chan];
2403 }
2404
2405 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2406 {
2407 assert(instr->src[0].is_ssa);
2408 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2409 }
2410
2411 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2412 const nir_intrinsic_instr *instr,
2413 enum ac_descriptor_type desc_type,
2414 bool write)
2415 {
2416 nir_deref_instr *deref_instr =
2417 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2418 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2419
2420 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2421 }
2422
2423 static void get_image_coords(struct ac_nir_context *ctx,
2424 const nir_intrinsic_instr *instr,
2425 struct ac_image_args *args,
2426 enum glsl_sampler_dim dim,
2427 bool is_array)
2428 {
2429 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2430 LLVMValueRef masks[] = {
2431 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2432 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2433 };
2434 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2435
2436 int count;
2437 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2438 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2439 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2440 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2441 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2442 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2443 count = image_type_to_components_count(dim, is_array);
2444
2445 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2446 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2447 LLVMValueRef fmask_load_address[3];
2448
2449 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2450 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2451 if (is_array)
2452 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2453 else
2454 fmask_load_address[2] = NULL;
2455
2456 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2457 fmask_load_address[0],
2458 fmask_load_address[1],
2459 fmask_load_address[2],
2460 sample_index,
2461 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2462 AC_DESC_FMASK, &instr->instr, true, false));
2463 }
2464 if (count == 1 && !gfx9_1d) {
2465 if (instr->src[1].ssa->num_components)
2466 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2467 else
2468 args->coords[0] = src0;
2469 } else {
2470 int chan;
2471 if (is_ms)
2472 count--;
2473 for (chan = 0; chan < count; ++chan) {
2474 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2475 }
2476
2477 if (gfx9_1d) {
2478 if (is_array) {
2479 args->coords[2] = args->coords[1];
2480 args->coords[1] = ctx->ac.i32_0;
2481 } else
2482 args->coords[1] = ctx->ac.i32_0;
2483 count++;
2484 }
2485 if (ctx->ac.chip_class == GFX9 &&
2486 dim == GLSL_SAMPLER_DIM_2D &&
2487 !is_array) {
2488 /* The hw can't bind a slice of a 3D image as a 2D
2489 * image, because it ignores BASE_ARRAY if the target
2490 * is 3D. The workaround is to read BASE_ARRAY and set
2491 * it as the 3rd address operand for all 2D images.
2492 */
2493 LLVMValueRef first_layer, const5, mask;
2494
2495 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2496 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2497 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2498 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2499
2500 args->coords[count] = first_layer;
2501 count++;
2502 }
2503
2504
2505 if (is_ms) {
2506 args->coords[count] = sample_index;
2507 count++;
2508 }
2509 }
2510 }
2511
2512 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2513 const nir_intrinsic_instr *instr,
2514 bool write, bool atomic)
2515 {
2516 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2517 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2518 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2519 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2520 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2521
2522 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2523 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2524 elem_count, stride, "");
2525
2526 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2527 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2528 }
2529 return rsrc;
2530 }
2531
2532 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2533 const nir_intrinsic_instr *instr,
2534 bool bindless)
2535 {
2536 LLVMValueRef res;
2537
2538 enum glsl_sampler_dim dim;
2539 enum gl_access_qualifier access;
2540 bool is_array;
2541 if (bindless) {
2542 dim = nir_intrinsic_image_dim(instr);
2543 access = nir_intrinsic_access(instr);
2544 is_array = nir_intrinsic_image_array(instr);
2545 } else {
2546 const nir_deref_instr *image_deref = get_image_deref(instr);
2547 const struct glsl_type *type = image_deref->type;
2548 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2549 dim = glsl_get_sampler_dim(type);
2550 access = var->data.access;
2551 is_array = glsl_sampler_type_is_array(type);
2552 }
2553
2554 struct ac_image_args args = {};
2555
2556 args.cache_policy = get_cache_policy(ctx, access, false, false);
2557
2558 if (dim == GLSL_SAMPLER_DIM_BUF) {
2559 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2560 unsigned num_channels = util_last_bit(mask);
2561 LLVMValueRef rsrc, vindex;
2562
2563 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2564 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2565 ctx->ac.i32_0, "");
2566
2567 bool can_speculate = access & ACCESS_CAN_REORDER;
2568 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2569 ctx->ac.i32_0, num_channels,
2570 args.cache_policy,
2571 can_speculate);
2572 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2573
2574 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2575 res = ac_to_integer(&ctx->ac, res);
2576 } else {
2577 args.opcode = ac_image_load;
2578 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2579 get_image_coords(ctx, instr, &args, dim, is_array);
2580 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2581 args.dmask = 15;
2582 args.attributes = AC_FUNC_ATTR_READONLY;
2583
2584 res = ac_build_image_opcode(&ctx->ac, &args);
2585 }
2586 return res;
2587 }
2588
2589 static void visit_image_store(struct ac_nir_context *ctx,
2590 nir_intrinsic_instr *instr,
2591 bool bindless)
2592 {
2593
2594
2595 enum glsl_sampler_dim dim;
2596 enum gl_access_qualifier access;
2597 bool is_array;
2598 if (bindless) {
2599 dim = nir_intrinsic_image_dim(instr);
2600 access = nir_intrinsic_access(instr);
2601 is_array = nir_intrinsic_image_array(instr);
2602 } else {
2603 const nir_deref_instr *image_deref = get_image_deref(instr);
2604 const struct glsl_type *type = image_deref->type;
2605 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2606 dim = glsl_get_sampler_dim(type);
2607 access = var->data.access;
2608 is_array = glsl_sampler_type_is_array(type);
2609 }
2610
2611 bool writeonly_memory = access & ACCESS_NON_READABLE;
2612 struct ac_image_args args = {};
2613
2614 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2615
2616 if (dim == GLSL_SAMPLER_DIM_BUF) {
2617 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2618 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2619 unsigned src_channels = ac_get_llvm_num_components(src);
2620 LLVMValueRef vindex;
2621
2622 if (src_channels == 3)
2623 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2624
2625 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2626 get_src(ctx, instr->src[1]),
2627 ctx->ac.i32_0, "");
2628
2629 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2630 ctx->ac.i32_0, src_channels,
2631 args.cache_policy);
2632 } else {
2633 args.opcode = ac_image_store;
2634 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2635 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2636 get_image_coords(ctx, instr, &args, dim, is_array);
2637 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2638 args.dmask = 15;
2639
2640 ac_build_image_opcode(&ctx->ac, &args);
2641 }
2642
2643 }
2644
2645 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2646 const nir_intrinsic_instr *instr,
2647 bool bindless)
2648 {
2649 LLVMValueRef params[7];
2650 int param_count = 0;
2651
2652 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2653 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2654 const char *atomic_name;
2655 char intrinsic_name[64];
2656 enum ac_atomic_op atomic_subop;
2657 ASSERTED int length;
2658
2659 enum glsl_sampler_dim dim;
2660 bool is_array;
2661 if (bindless) {
2662 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2663 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2664 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2665 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2666 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2667 assert(format == GL_R32UI || format == GL_R32I);
2668 }
2669 dim = nir_intrinsic_image_dim(instr);
2670 is_array = nir_intrinsic_image_array(instr);
2671 } else {
2672 const struct glsl_type *type = get_image_deref(instr)->type;
2673 dim = glsl_get_sampler_dim(type);
2674 is_array = glsl_sampler_type_is_array(type);
2675 }
2676
2677 switch (instr->intrinsic) {
2678 case nir_intrinsic_bindless_image_atomic_add:
2679 case nir_intrinsic_image_deref_atomic_add:
2680 atomic_name = "add";
2681 atomic_subop = ac_atomic_add;
2682 break;
2683 case nir_intrinsic_bindless_image_atomic_imin:
2684 case nir_intrinsic_image_deref_atomic_imin:
2685 atomic_name = "smin";
2686 atomic_subop = ac_atomic_smin;
2687 break;
2688 case nir_intrinsic_bindless_image_atomic_umin:
2689 case nir_intrinsic_image_deref_atomic_umin:
2690 atomic_name = "umin";
2691 atomic_subop = ac_atomic_umin;
2692 break;
2693 case nir_intrinsic_bindless_image_atomic_imax:
2694 case nir_intrinsic_image_deref_atomic_imax:
2695 atomic_name = "smax";
2696 atomic_subop = ac_atomic_smax;
2697 break;
2698 case nir_intrinsic_bindless_image_atomic_umax:
2699 case nir_intrinsic_image_deref_atomic_umax:
2700 atomic_name = "umax";
2701 atomic_subop = ac_atomic_umax;
2702 break;
2703 case nir_intrinsic_bindless_image_atomic_and:
2704 case nir_intrinsic_image_deref_atomic_and:
2705 atomic_name = "and";
2706 atomic_subop = ac_atomic_and;
2707 break;
2708 case nir_intrinsic_bindless_image_atomic_or:
2709 case nir_intrinsic_image_deref_atomic_or:
2710 atomic_name = "or";
2711 atomic_subop = ac_atomic_or;
2712 break;
2713 case nir_intrinsic_bindless_image_atomic_xor:
2714 case nir_intrinsic_image_deref_atomic_xor:
2715 atomic_name = "xor";
2716 atomic_subop = ac_atomic_xor;
2717 break;
2718 case nir_intrinsic_bindless_image_atomic_exchange:
2719 case nir_intrinsic_image_deref_atomic_exchange:
2720 atomic_name = "swap";
2721 atomic_subop = ac_atomic_swap;
2722 break;
2723 case nir_intrinsic_bindless_image_atomic_comp_swap:
2724 case nir_intrinsic_image_deref_atomic_comp_swap:
2725 atomic_name = "cmpswap";
2726 atomic_subop = 0; /* not used */
2727 break;
2728 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2729 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2730 atomic_name = "inc";
2731 atomic_subop = ac_atomic_inc_wrap;
2732 /* ATOMIC_INC instruction does:
2733 * value = (value + 1) % (data + 1)
2734 * but we want:
2735 * value = (value + 1) % data
2736 * So replace 'data' by 'data - 1'.
2737 */
2738 ctx->ssa_defs[instr->src[3].ssa->index] =
2739 LLVMBuildSub(ctx->ac.builder,
2740 ctx->ssa_defs[instr->src[3].ssa->index],
2741 ctx->ac.i32_1, "");
2742 break;
2743 }
2744 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2745 case nir_intrinsic_image_deref_atomic_dec_wrap:
2746 atomic_name = "dec";
2747 atomic_subop = ac_atomic_dec_wrap;
2748 break;
2749 default:
2750 abort();
2751 }
2752
2753 if (cmpswap)
2754 params[param_count++] = get_src(ctx, instr->src[4]);
2755 params[param_count++] = get_src(ctx, instr->src[3]);
2756
2757 if (dim == GLSL_SAMPLER_DIM_BUF) {
2758 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2759 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2760 ctx->ac.i32_0, ""); /* vindex */
2761 params[param_count++] = ctx->ac.i32_0; /* voffset */
2762 if (LLVM_VERSION_MAJOR >= 9) {
2763 /* XXX: The new raw/struct atomic intrinsics are buggy
2764 * with LLVM 8, see r358579.
2765 */
2766 params[param_count++] = ctx->ac.i32_0; /* soffset */
2767 params[param_count++] = ctx->ac.i32_0; /* slc */
2768
2769 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2770 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2771 } else {
2772 params[param_count++] = ctx->ac.i1false; /* slc */
2773
2774 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2775 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2776 }
2777
2778 assert(length < sizeof(intrinsic_name));
2779 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2780 params, param_count, 0);
2781 } else {
2782 struct ac_image_args args = {};
2783 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2784 args.atomic = atomic_subop;
2785 args.data[0] = params[0];
2786 if (cmpswap)
2787 args.data[1] = params[1];
2788 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2789 get_image_coords(ctx, instr, &args, dim, is_array);
2790 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2791
2792 return ac_build_image_opcode(&ctx->ac, &args);
2793 }
2794 }
2795
2796 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2797 const nir_intrinsic_instr *instr)
2798 {
2799 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2800
2801 return ac_build_image_get_sample_count(&ctx->ac, rsrc);
2802 }
2803
2804 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2805 const nir_intrinsic_instr *instr,
2806 bool bindless)
2807 {
2808 LLVMValueRef res;
2809
2810 enum glsl_sampler_dim dim;
2811 bool is_array;
2812 if (bindless) {
2813 dim = nir_intrinsic_image_dim(instr);
2814 is_array = nir_intrinsic_image_array(instr);
2815 } else {
2816 const struct glsl_type *type = get_image_deref(instr)->type;
2817 dim = glsl_get_sampler_dim(type);
2818 is_array = glsl_sampler_type_is_array(type);
2819 }
2820
2821 if (dim == GLSL_SAMPLER_DIM_BUF)
2822 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2823
2824 struct ac_image_args args = { 0 };
2825
2826 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2827 args.dmask = 0xf;
2828 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2829 args.opcode = ac_image_get_resinfo;
2830 args.lod = ctx->ac.i32_0;
2831 args.attributes = AC_FUNC_ATTR_READNONE;
2832
2833 res = ac_build_image_opcode(&ctx->ac, &args);
2834
2835 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2836
2837 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2838 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2839 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2840 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2841 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2842 }
2843 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2844 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2845 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2846 ctx->ac.i32_1, "");
2847
2848 }
2849 return res;
2850 }
2851
2852 static void emit_membar(struct ac_llvm_context *ac,
2853 const nir_intrinsic_instr *instr)
2854 {
2855 unsigned wait_flags = 0;
2856
2857 switch (instr->intrinsic) {
2858 case nir_intrinsic_memory_barrier:
2859 case nir_intrinsic_group_memory_barrier:
2860 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2861 break;
2862 case nir_intrinsic_memory_barrier_atomic_counter:
2863 case nir_intrinsic_memory_barrier_buffer:
2864 case nir_intrinsic_memory_barrier_image:
2865 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2866 break;
2867 case nir_intrinsic_memory_barrier_shared:
2868 wait_flags = AC_WAIT_LGKM;
2869 break;
2870 default:
2871 break;
2872 }
2873
2874 ac_build_waitcnt(ac, wait_flags);
2875 }
2876
2877 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2878 {
2879 /* GFX6 only (thanks to a hw bug workaround):
2880 * The real barrier instruction isn’t needed, because an entire patch
2881 * always fits into a single wave.
2882 */
2883 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2884 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2885 return;
2886 }
2887 ac_build_s_barrier(ac);
2888 }
2889
2890 static void emit_discard(struct ac_nir_context *ctx,
2891 const nir_intrinsic_instr *instr)
2892 {
2893 LLVMValueRef cond;
2894
2895 if (instr->intrinsic == nir_intrinsic_discard_if) {
2896 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2897 get_src(ctx, instr->src[0]),
2898 ctx->ac.i32_0, "");
2899 } else {
2900 assert(instr->intrinsic == nir_intrinsic_discard);
2901 cond = ctx->ac.i1false;
2902 }
2903
2904 ctx->abi->emit_kill(ctx->abi, cond);
2905 }
2906
2907 static LLVMValueRef
2908 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2909 {
2910 LLVMValueRef result;
2911 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2912 result = LLVMBuildAnd(ctx->ac.builder,
2913 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2914 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2915
2916 if (ctx->ac.wave_size == 32)
2917 result = LLVMBuildLShr(ctx->ac.builder, result,
2918 LLVMConstInt(ctx->ac.i32, 1, false), "");
2919
2920 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2921 }
2922
2923 static LLVMValueRef
2924 visit_load_subgroup_id(struct ac_nir_context *ctx)
2925 {
2926 if (ctx->stage == MESA_SHADER_COMPUTE) {
2927 LLVMValueRef result;
2928 result = LLVMBuildAnd(ctx->ac.builder,
2929 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2930 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2931 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2932 } else {
2933 return LLVMConstInt(ctx->ac.i32, 0, false);
2934 }
2935 }
2936
2937 static LLVMValueRef
2938 visit_load_num_subgroups(struct ac_nir_context *ctx)
2939 {
2940 if (ctx->stage == MESA_SHADER_COMPUTE) {
2941 return LLVMBuildAnd(ctx->ac.builder,
2942 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2943 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2944 } else {
2945 return LLVMConstInt(ctx->ac.i32, 1, false);
2946 }
2947 }
2948
2949 static LLVMValueRef
2950 visit_first_invocation(struct ac_nir_context *ctx)
2951 {
2952 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2953 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2954
2955 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2956 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2957 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2958 ctx->ac.iN_wavemask, args, 2,
2959 AC_FUNC_ATTR_NOUNWIND |
2960 AC_FUNC_ATTR_READNONE);
2961
2962 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2963 }
2964
2965 static LLVMValueRef
2966 visit_load_shared(struct ac_nir_context *ctx,
2967 const nir_intrinsic_instr *instr)
2968 {
2969 LLVMValueRef values[4], derived_ptr, index, ret;
2970
2971 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
2972
2973 for (int chan = 0; chan < instr->num_components; chan++) {
2974 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2975 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2976 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2977 }
2978
2979 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2980 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2981 }
2982
2983 static void
2984 visit_store_shared(struct ac_nir_context *ctx,
2985 const nir_intrinsic_instr *instr)
2986 {
2987 LLVMValueRef derived_ptr, data,index;
2988 LLVMBuilderRef builder = ctx->ac.builder;
2989
2990 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1]);
2991 LLVMValueRef src = get_src(ctx, instr->src[0]);
2992
2993 int writemask = nir_intrinsic_write_mask(instr);
2994 for (int chan = 0; chan < 4; chan++) {
2995 if (!(writemask & (1 << chan))) {
2996 continue;
2997 }
2998 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
2999 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3000 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3001 LLVMBuildStore(builder, data, derived_ptr);
3002 }
3003 }
3004
3005 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3006 const nir_intrinsic_instr *instr,
3007 LLVMValueRef ptr, int src_idx)
3008 {
3009 LLVMValueRef result;
3010 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3011
3012 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3013
3014 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3015 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3016 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3017 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3018 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3019 } else {
3020 LLVMAtomicRMWBinOp op;
3021 switch (instr->intrinsic) {
3022 case nir_intrinsic_shared_atomic_add:
3023 case nir_intrinsic_deref_atomic_add:
3024 op = LLVMAtomicRMWBinOpAdd;
3025 break;
3026 case nir_intrinsic_shared_atomic_umin:
3027 case nir_intrinsic_deref_atomic_umin:
3028 op = LLVMAtomicRMWBinOpUMin;
3029 break;
3030 case nir_intrinsic_shared_atomic_umax:
3031 case nir_intrinsic_deref_atomic_umax:
3032 op = LLVMAtomicRMWBinOpUMax;
3033 break;
3034 case nir_intrinsic_shared_atomic_imin:
3035 case nir_intrinsic_deref_atomic_imin:
3036 op = LLVMAtomicRMWBinOpMin;
3037 break;
3038 case nir_intrinsic_shared_atomic_imax:
3039 case nir_intrinsic_deref_atomic_imax:
3040 op = LLVMAtomicRMWBinOpMax;
3041 break;
3042 case nir_intrinsic_shared_atomic_and:
3043 case nir_intrinsic_deref_atomic_and:
3044 op = LLVMAtomicRMWBinOpAnd;
3045 break;
3046 case nir_intrinsic_shared_atomic_or:
3047 case nir_intrinsic_deref_atomic_or:
3048 op = LLVMAtomicRMWBinOpOr;
3049 break;
3050 case nir_intrinsic_shared_atomic_xor:
3051 case nir_intrinsic_deref_atomic_xor:
3052 op = LLVMAtomicRMWBinOpXor;
3053 break;
3054 case nir_intrinsic_shared_atomic_exchange:
3055 case nir_intrinsic_deref_atomic_exchange:
3056 op = LLVMAtomicRMWBinOpXchg;
3057 break;
3058 default:
3059 return NULL;
3060 }
3061
3062 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3063 }
3064 return result;
3065 }
3066
3067 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3068 {
3069 LLVMValueRef values[2];
3070 LLVMValueRef pos[2];
3071
3072 pos[0] = ac_to_float(&ctx->ac,
3073 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3074 pos[1] = ac_to_float(&ctx->ac,
3075 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3076
3077 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3078 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3079 return ac_build_gather_values(&ctx->ac, values, 2);
3080 }
3081
3082 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3083 enum glsl_interp_mode interp, unsigned location)
3084 {
3085 switch (interp) {
3086 case INTERP_MODE_FLAT:
3087 default:
3088 return NULL;
3089 case INTERP_MODE_SMOOTH:
3090 case INTERP_MODE_NONE:
3091 if (location == INTERP_CENTER)
3092 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3093 else if (location == INTERP_CENTROID)
3094 return ctx->abi->persp_centroid;
3095 else if (location == INTERP_SAMPLE)
3096 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3097 break;
3098 case INTERP_MODE_NOPERSPECTIVE:
3099 if (location == INTERP_CENTER)
3100 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3101 else if (location == INTERP_CENTROID)
3102 return ctx->abi->linear_centroid;
3103 else if (location == INTERP_SAMPLE)
3104 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3105 break;
3106 }
3107 return NULL;
3108 }
3109
3110 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3111 unsigned mode)
3112 {
3113 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3114 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3115 }
3116
3117 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3118 unsigned mode,
3119 LLVMValueRef offset)
3120 {
3121 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3122 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3123 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3124
3125 LLVMValueRef ij_out[2];
3126 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3127
3128 /*
3129 * take the I then J parameters, and the DDX/Y for it, and
3130 * calculate the IJ inputs for the interpolator.
3131 * temp1 = ddx * offset/sample.x + I;
3132 * interp_param.I = ddy * offset/sample.y + temp1;
3133 * temp1 = ddx * offset/sample.x + J;
3134 * interp_param.J = ddy * offset/sample.y + temp1;
3135 */
3136 for (unsigned i = 0; i < 2; i++) {
3137 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3138 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3139 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3140 ddxy_out, ix_ll, "");
3141 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3142 ddxy_out, iy_ll, "");
3143 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3144 interp_param, ix_ll, "");
3145 LLVMValueRef temp1, temp2;
3146
3147 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3148 ctx->ac.f32, "");
3149
3150 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3151 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3152
3153 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3154 temp2, ctx->ac.i32, "");
3155 }
3156 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3157 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3158 }
3159
3160 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3161 unsigned mode)
3162 {
3163 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3164 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3165 }
3166
3167 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3168 unsigned mode,
3169 LLVMValueRef sample_id)
3170 {
3171 if (ctx->abi->interp_at_sample_force_center)
3172 return barycentric_center(ctx, mode);
3173
3174 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3175
3176 /* fetch sample ID */
3177 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3178
3179 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3180 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3181 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3182 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3183 LLVMValueRef coords[] = { src_c0, src_c1 };
3184 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3185
3186 return barycentric_offset(ctx, mode, offset);
3187 }
3188
3189
3190 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3191 unsigned mode)
3192 {
3193 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3194 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3195 }
3196
3197 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3198 LLVMValueRef interp_param,
3199 unsigned index, unsigned comp_start,
3200 unsigned num_components,
3201 unsigned bitsize)
3202 {
3203 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3204
3205 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3206 interp_param, ctx->ac.v2f32, "");
3207 LLVMValueRef i = LLVMBuildExtractElement(
3208 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3209 LLVMValueRef j = LLVMBuildExtractElement(
3210 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3211
3212 LLVMValueRef values[4];
3213 assert(bitsize == 16 || bitsize == 32);
3214 for (unsigned comp = 0; comp < num_components; comp++) {
3215 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3216 if (bitsize == 16) {
3217 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3218 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3219 } else {
3220 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3221 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3222 }
3223 }
3224
3225 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3226 }
3227
3228 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3229 unsigned index, unsigned comp_start,
3230 unsigned num_components,
3231 unsigned bit_size)
3232 {
3233 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3234
3235 LLVMValueRef values[8];
3236
3237 /* Each component of a 64-bit value takes up two GL-level channels. */
3238 unsigned channels =
3239 bit_size == 64 ? num_components * 2 : num_components;
3240
3241 for (unsigned chan = 0; chan < channels; chan++) {
3242 if (comp_start + chan > 4)
3243 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3244 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3245 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3246 LLVMConstInt(ctx->ac.i32, 2, false),
3247 llvm_chan,
3248 attr_number,
3249 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3250 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3251 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3252 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3253 }
3254
3255 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3256 if (bit_size == 64) {
3257 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3258 LLVMVectorType(ctx->ac.i64, num_components);
3259 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3260 }
3261 return result;
3262 }
3263
3264 static void visit_intrinsic(struct ac_nir_context *ctx,
3265 nir_intrinsic_instr *instr)
3266 {
3267 LLVMValueRef result = NULL;
3268
3269 switch (instr->intrinsic) {
3270 case nir_intrinsic_ballot:
3271 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3272 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3273 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3274 break;
3275 case nir_intrinsic_read_invocation:
3276 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3277 get_src(ctx, instr->src[1]));
3278 break;
3279 case nir_intrinsic_read_first_invocation:
3280 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3281 break;
3282 case nir_intrinsic_load_subgroup_invocation:
3283 result = ac_get_thread_id(&ctx->ac);
3284 break;
3285 case nir_intrinsic_load_work_group_id: {
3286 LLVMValueRef values[3];
3287
3288 for (int i = 0; i < 3; i++) {
3289 values[i] = ctx->args->workgroup_ids[i].used ?
3290 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3291 }
3292
3293 result = ac_build_gather_values(&ctx->ac, values, 3);
3294 break;
3295 }
3296 case nir_intrinsic_load_base_vertex:
3297 case nir_intrinsic_load_first_vertex:
3298 result = ctx->abi->load_base_vertex(ctx->abi);
3299 break;
3300 case nir_intrinsic_load_local_group_size:
3301 result = ctx->abi->load_local_group_size(ctx->abi);
3302 break;
3303 case nir_intrinsic_load_vertex_id:
3304 result = LLVMBuildAdd(ctx->ac.builder,
3305 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3306 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3307 break;
3308 case nir_intrinsic_load_vertex_id_zero_base: {
3309 result = ctx->abi->vertex_id;
3310 break;
3311 }
3312 case nir_intrinsic_load_local_invocation_id: {
3313 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3314 break;
3315 }
3316 case nir_intrinsic_load_base_instance:
3317 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3318 break;
3319 case nir_intrinsic_load_draw_id:
3320 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3321 break;
3322 case nir_intrinsic_load_view_index:
3323 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3324 break;
3325 case nir_intrinsic_load_invocation_id:
3326 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3327 result = ac_unpack_param(&ctx->ac,
3328 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3329 8, 5);
3330 } else {
3331 if (ctx->ac.chip_class >= GFX10) {
3332 result = LLVMBuildAnd(ctx->ac.builder,
3333 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3334 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3335 } else {
3336 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3337 }
3338 }
3339 break;
3340 case nir_intrinsic_load_primitive_id:
3341 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3342 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3343 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3344 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3345 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3346 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3347 } else
3348 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3349 break;
3350 case nir_intrinsic_load_sample_id:
3351 result = ac_unpack_param(&ctx->ac,
3352 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3353 8, 4);
3354 break;
3355 case nir_intrinsic_load_sample_pos:
3356 result = load_sample_pos(ctx);
3357 break;
3358 case nir_intrinsic_load_sample_mask_in:
3359 result = ctx->abi->load_sample_mask_in(ctx->abi);
3360 break;
3361 case nir_intrinsic_load_frag_coord: {
3362 LLVMValueRef values[4] = {
3363 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3364 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3365 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3366 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3367 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3368 };
3369 result = ac_to_integer(&ctx->ac,
3370 ac_build_gather_values(&ctx->ac, values, 4));
3371 break;
3372 }
3373 case nir_intrinsic_load_layer_id:
3374 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3375 break;
3376 case nir_intrinsic_load_front_face:
3377 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3378 break;
3379 case nir_intrinsic_load_helper_invocation:
3380 result = ac_build_load_helper_invocation(&ctx->ac);
3381 break;
3382 case nir_intrinsic_load_color0:
3383 result = ctx->abi->color0;
3384 break;
3385 case nir_intrinsic_load_color1:
3386 result = ctx->abi->color1;
3387 break;
3388 case nir_intrinsic_load_user_data_amd:
3389 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3390 result = ctx->abi->user_data;
3391 break;
3392 case nir_intrinsic_load_instance_id:
3393 result = ctx->abi->instance_id;
3394 break;
3395 case nir_intrinsic_load_num_work_groups:
3396 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3397 break;
3398 case nir_intrinsic_load_local_invocation_index:
3399 result = visit_load_local_invocation_index(ctx);
3400 break;
3401 case nir_intrinsic_load_subgroup_id:
3402 result = visit_load_subgroup_id(ctx);
3403 break;
3404 case nir_intrinsic_load_num_subgroups:
3405 result = visit_load_num_subgroups(ctx);
3406 break;
3407 case nir_intrinsic_first_invocation:
3408 result = visit_first_invocation(ctx);
3409 break;
3410 case nir_intrinsic_load_push_constant:
3411 result = visit_load_push_constant(ctx, instr);
3412 break;
3413 case nir_intrinsic_vulkan_resource_index: {
3414 LLVMValueRef index = get_src(ctx, instr->src[0]);
3415 unsigned desc_set = nir_intrinsic_desc_set(instr);
3416 unsigned binding = nir_intrinsic_binding(instr);
3417
3418 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3419 binding);
3420 break;
3421 }
3422 case nir_intrinsic_vulkan_resource_reindex:
3423 result = visit_vulkan_resource_reindex(ctx, instr);
3424 break;
3425 case nir_intrinsic_store_ssbo:
3426 visit_store_ssbo(ctx, instr);
3427 break;
3428 case nir_intrinsic_load_ssbo:
3429 result = visit_load_buffer(ctx, instr);
3430 break;
3431 case nir_intrinsic_ssbo_atomic_add:
3432 case nir_intrinsic_ssbo_atomic_imin:
3433 case nir_intrinsic_ssbo_atomic_umin:
3434 case nir_intrinsic_ssbo_atomic_imax:
3435 case nir_intrinsic_ssbo_atomic_umax:
3436 case nir_intrinsic_ssbo_atomic_and:
3437 case nir_intrinsic_ssbo_atomic_or:
3438 case nir_intrinsic_ssbo_atomic_xor:
3439 case nir_intrinsic_ssbo_atomic_exchange:
3440 case nir_intrinsic_ssbo_atomic_comp_swap:
3441 result = visit_atomic_ssbo(ctx, instr);
3442 break;
3443 case nir_intrinsic_load_ubo:
3444 result = visit_load_ubo_buffer(ctx, instr);
3445 break;
3446 case nir_intrinsic_get_buffer_size:
3447 result = visit_get_buffer_size(ctx, instr);
3448 break;
3449 case nir_intrinsic_load_deref:
3450 result = visit_load_var(ctx, instr);
3451 break;
3452 case nir_intrinsic_store_deref:
3453 visit_store_var(ctx, instr);
3454 break;
3455 case nir_intrinsic_load_shared:
3456 result = visit_load_shared(ctx, instr);
3457 break;
3458 case nir_intrinsic_store_shared:
3459 visit_store_shared(ctx, instr);
3460 break;
3461 case nir_intrinsic_bindless_image_samples:
3462 case nir_intrinsic_image_deref_samples:
3463 result = visit_image_samples(ctx, instr);
3464 break;
3465 case nir_intrinsic_bindless_image_load:
3466 result = visit_image_load(ctx, instr, true);
3467 break;
3468 case nir_intrinsic_image_deref_load:
3469 result = visit_image_load(ctx, instr, false);
3470 break;
3471 case nir_intrinsic_bindless_image_store:
3472 visit_image_store(ctx, instr, true);
3473 break;
3474 case nir_intrinsic_image_deref_store:
3475 visit_image_store(ctx, instr, false);
3476 break;
3477 case nir_intrinsic_bindless_image_atomic_add:
3478 case nir_intrinsic_bindless_image_atomic_imin:
3479 case nir_intrinsic_bindless_image_atomic_umin:
3480 case nir_intrinsic_bindless_image_atomic_imax:
3481 case nir_intrinsic_bindless_image_atomic_umax:
3482 case nir_intrinsic_bindless_image_atomic_and:
3483 case nir_intrinsic_bindless_image_atomic_or:
3484 case nir_intrinsic_bindless_image_atomic_xor:
3485 case nir_intrinsic_bindless_image_atomic_exchange:
3486 case nir_intrinsic_bindless_image_atomic_comp_swap:
3487 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3488 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3489 result = visit_image_atomic(ctx, instr, true);
3490 break;
3491 case nir_intrinsic_image_deref_atomic_add:
3492 case nir_intrinsic_image_deref_atomic_imin:
3493 case nir_intrinsic_image_deref_atomic_umin:
3494 case nir_intrinsic_image_deref_atomic_imax:
3495 case nir_intrinsic_image_deref_atomic_umax:
3496 case nir_intrinsic_image_deref_atomic_and:
3497 case nir_intrinsic_image_deref_atomic_or:
3498 case nir_intrinsic_image_deref_atomic_xor:
3499 case nir_intrinsic_image_deref_atomic_exchange:
3500 case nir_intrinsic_image_deref_atomic_comp_swap:
3501 case nir_intrinsic_image_deref_atomic_inc_wrap:
3502 case nir_intrinsic_image_deref_atomic_dec_wrap:
3503 result = visit_image_atomic(ctx, instr, false);
3504 break;
3505 case nir_intrinsic_bindless_image_size:
3506 result = visit_image_size(ctx, instr, true);
3507 break;
3508 case nir_intrinsic_image_deref_size:
3509 result = visit_image_size(ctx, instr, false);
3510 break;
3511 case nir_intrinsic_shader_clock:
3512 result = ac_build_shader_clock(&ctx->ac);
3513 break;
3514 case nir_intrinsic_discard:
3515 case nir_intrinsic_discard_if:
3516 emit_discard(ctx, instr);
3517 break;
3518 case nir_intrinsic_memory_barrier:
3519 case nir_intrinsic_group_memory_barrier:
3520 case nir_intrinsic_memory_barrier_atomic_counter:
3521 case nir_intrinsic_memory_barrier_buffer:
3522 case nir_intrinsic_memory_barrier_image:
3523 case nir_intrinsic_memory_barrier_shared:
3524 emit_membar(&ctx->ac, instr);
3525 break;
3526 case nir_intrinsic_barrier:
3527 ac_emit_barrier(&ctx->ac, ctx->stage);
3528 break;
3529 case nir_intrinsic_shared_atomic_add:
3530 case nir_intrinsic_shared_atomic_imin:
3531 case nir_intrinsic_shared_atomic_umin:
3532 case nir_intrinsic_shared_atomic_imax:
3533 case nir_intrinsic_shared_atomic_umax:
3534 case nir_intrinsic_shared_atomic_and:
3535 case nir_intrinsic_shared_atomic_or:
3536 case nir_intrinsic_shared_atomic_xor:
3537 case nir_intrinsic_shared_atomic_exchange:
3538 case nir_intrinsic_shared_atomic_comp_swap: {
3539 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0]);
3540 result = visit_var_atomic(ctx, instr, ptr, 1);
3541 break;
3542 }
3543 case nir_intrinsic_deref_atomic_add:
3544 case nir_intrinsic_deref_atomic_imin:
3545 case nir_intrinsic_deref_atomic_umin:
3546 case nir_intrinsic_deref_atomic_imax:
3547 case nir_intrinsic_deref_atomic_umax:
3548 case nir_intrinsic_deref_atomic_and:
3549 case nir_intrinsic_deref_atomic_or:
3550 case nir_intrinsic_deref_atomic_xor:
3551 case nir_intrinsic_deref_atomic_exchange:
3552 case nir_intrinsic_deref_atomic_comp_swap: {
3553 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3554 result = visit_var_atomic(ctx, instr, ptr, 1);
3555 break;
3556 }
3557 case nir_intrinsic_load_barycentric_pixel:
3558 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3559 break;
3560 case nir_intrinsic_load_barycentric_centroid:
3561 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3562 break;
3563 case nir_intrinsic_load_barycentric_sample:
3564 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3565 break;
3566 case nir_intrinsic_load_barycentric_at_offset: {
3567 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3568 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3569 break;
3570 }
3571 case nir_intrinsic_load_barycentric_at_sample: {
3572 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3573 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3574 break;
3575 }
3576 case nir_intrinsic_load_interpolated_input: {
3577 /* We assume any indirect loads have been lowered away */
3578 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3579 assert(offset);
3580 assert(offset[0].i32 == 0);
3581
3582 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3583 unsigned index = nir_intrinsic_base(instr);
3584 unsigned component = nir_intrinsic_component(instr);
3585 result = load_interpolated_input(ctx, interp_param, index,
3586 component,
3587 instr->dest.ssa.num_components,
3588 instr->dest.ssa.bit_size);
3589 break;
3590 }
3591 case nir_intrinsic_load_input: {
3592 /* We only lower inputs for fragment shaders ATM */
3593 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3594 assert(offset);
3595 assert(offset[0].i32 == 0);
3596
3597 unsigned index = nir_intrinsic_base(instr);
3598 unsigned component = nir_intrinsic_component(instr);
3599 result = load_flat_input(ctx, index, component,
3600 instr->dest.ssa.num_components,
3601 instr->dest.ssa.bit_size);
3602 break;
3603 }
3604 case nir_intrinsic_emit_vertex:
3605 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3606 break;
3607 case nir_intrinsic_end_primitive:
3608 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3609 break;
3610 case nir_intrinsic_load_tess_coord:
3611 result = ctx->abi->load_tess_coord(ctx->abi);
3612 break;
3613 case nir_intrinsic_load_tess_level_outer:
3614 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3615 break;
3616 case nir_intrinsic_load_tess_level_inner:
3617 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3618 break;
3619 case nir_intrinsic_load_tess_level_outer_default:
3620 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3621 break;
3622 case nir_intrinsic_load_tess_level_inner_default:
3623 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3624 break;
3625 case nir_intrinsic_load_patch_vertices_in:
3626 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3627 break;
3628 case nir_intrinsic_vote_all: {
3629 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3630 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3631 break;
3632 }
3633 case nir_intrinsic_vote_any: {
3634 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3635 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3636 break;
3637 }
3638 case nir_intrinsic_shuffle:
3639 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3640 get_src(ctx, instr->src[1]));
3641 break;
3642 case nir_intrinsic_reduce:
3643 result = ac_build_reduce(&ctx->ac,
3644 get_src(ctx, instr->src[0]),
3645 instr->const_index[0],
3646 instr->const_index[1]);
3647 break;
3648 case nir_intrinsic_inclusive_scan:
3649 result = ac_build_inclusive_scan(&ctx->ac,
3650 get_src(ctx, instr->src[0]),
3651 instr->const_index[0]);
3652 break;
3653 case nir_intrinsic_exclusive_scan:
3654 result = ac_build_exclusive_scan(&ctx->ac,
3655 get_src(ctx, instr->src[0]),
3656 instr->const_index[0]);
3657 break;
3658 case nir_intrinsic_quad_broadcast: {
3659 unsigned lane = nir_src_as_uint(instr->src[1]);
3660 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3661 lane, lane, lane, lane);
3662 break;
3663 }
3664 case nir_intrinsic_quad_swap_horizontal:
3665 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3666 break;
3667 case nir_intrinsic_quad_swap_vertical:
3668 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3669 break;
3670 case nir_intrinsic_quad_swap_diagonal:
3671 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3672 break;
3673 case nir_intrinsic_quad_swizzle_amd: {
3674 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3675 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3676 mask & 0x3, (mask >> 2) & 0x3,
3677 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3678 break;
3679 }
3680 case nir_intrinsic_masked_swizzle_amd: {
3681 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3682 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3683 break;
3684 }
3685 case nir_intrinsic_write_invocation_amd:
3686 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3687 get_src(ctx, instr->src[1]),
3688 get_src(ctx, instr->src[2]));
3689 break;
3690 case nir_intrinsic_mbcnt_amd:
3691 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3692 break;
3693 case nir_intrinsic_load_scratch: {
3694 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3695 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3696 offset);
3697 LLVMTypeRef comp_type =
3698 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3699 LLVMTypeRef vec_type =
3700 instr->dest.ssa.num_components == 1 ? comp_type :
3701 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3702 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3703 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3704 LLVMPointerType(vec_type, addr_space), "");
3705 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3706 break;
3707 }
3708 case nir_intrinsic_store_scratch: {
3709 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3710 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3711 offset);
3712 LLVMTypeRef comp_type =
3713 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3714 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3715 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3716 LLVMPointerType(comp_type, addr_space), "");
3717 LLVMValueRef src = get_src(ctx, instr->src[0]);
3718 unsigned wrmask = nir_intrinsic_write_mask(instr);
3719 while (wrmask) {
3720 int start, count;
3721 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3722
3723 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3724 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3725 LLVMTypeRef vec_type =
3726 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3727 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3728 offset_ptr,
3729 LLVMPointerType(vec_type, addr_space),
3730 "");
3731 LLVMValueRef offset_src =
3732 ac_extract_components(&ctx->ac, src, start, count);
3733 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3734 }
3735 break;
3736 }
3737 case nir_intrinsic_load_constant: {
3738 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3739 LLVMValueRef base = LLVMConstInt(ctx->ac.i32,
3740 nir_intrinsic_base(instr),
3741 false);
3742 offset = LLVMBuildAdd(ctx->ac.builder, offset, base, "");
3743 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
3744 offset);
3745 LLVMTypeRef comp_type =
3746 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3747 LLVMTypeRef vec_type =
3748 instr->dest.ssa.num_components == 1 ? comp_type :
3749 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3750 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3751 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3752 LLVMPointerType(vec_type, addr_space), "");
3753 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3754 break;
3755 }
3756 default:
3757 fprintf(stderr, "Unknown intrinsic: ");
3758 nir_print_instr(&instr->instr, stderr);
3759 fprintf(stderr, "\n");
3760 break;
3761 }
3762 if (result) {
3763 ctx->ssa_defs[instr->dest.ssa.index] = result;
3764 }
3765 }
3766
3767 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3768 unsigned base_index,
3769 unsigned constant_index,
3770 LLVMValueRef dynamic_index)
3771 {
3772 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3773 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3774 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3775
3776 /* Bindless uniforms are 64bit so multiple index by 8 */
3777 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3778 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3779
3780 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3781
3782 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3783 NULL, 0, 0, true, true);
3784
3785 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3786 }
3787
3788 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3789 nir_deref_instr *deref_instr,
3790 enum ac_descriptor_type desc_type,
3791 const nir_instr *instr,
3792 bool image, bool write)
3793 {
3794 LLVMValueRef index = NULL;
3795 unsigned constant_index = 0;
3796 unsigned descriptor_set;
3797 unsigned base_index;
3798 bool bindless = false;
3799
3800 if (!deref_instr) {
3801 descriptor_set = 0;
3802 if (image) {
3803 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3804 base_index = 0;
3805 bindless = true;
3806 index = get_src(ctx, img_instr->src[0]);
3807 } else {
3808 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3809 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3810 nir_tex_src_sampler_handle);
3811 if (sampSrcIdx != -1) {
3812 base_index = 0;
3813 bindless = true;
3814 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3815 } else {
3816 assert(tex_instr && !image);
3817 base_index = tex_instr->sampler_index;
3818 }
3819 }
3820 } else {
3821 while(deref_instr->deref_type != nir_deref_type_var) {
3822 if (deref_instr->deref_type == nir_deref_type_array) {
3823 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3824 if (!array_size)
3825 array_size = 1;
3826
3827 if (nir_src_is_const(deref_instr->arr.index)) {
3828 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3829 } else {
3830 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3831
3832 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3833 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3834
3835 if (!index)
3836 index = indirect;
3837 else
3838 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3839 }
3840
3841 deref_instr = nir_src_as_deref(deref_instr->parent);
3842 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3843 unsigned sidx = deref_instr->strct.index;
3844 deref_instr = nir_src_as_deref(deref_instr->parent);
3845 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3846 } else {
3847 unreachable("Unsupported deref type");
3848 }
3849 }
3850 descriptor_set = deref_instr->var->data.descriptor_set;
3851
3852 if (deref_instr->var->data.bindless) {
3853 /* For now just assert on unhandled variable types */
3854 assert(deref_instr->var->data.mode == nir_var_uniform);
3855
3856 base_index = deref_instr->var->data.driver_location;
3857 bindless = true;
3858
3859 index = index ? index : ctx->ac.i32_0;
3860 index = get_bindless_index_from_uniform(ctx, base_index,
3861 constant_index, index);
3862 } else
3863 base_index = deref_instr->var->data.binding;
3864 }
3865
3866 return ctx->abi->load_sampler_desc(ctx->abi,
3867 descriptor_set,
3868 base_index,
3869 constant_index, index,
3870 desc_type, image, write, bindless);
3871 }
3872
3873 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3874 *
3875 * GFX6-GFX7:
3876 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3877 * filtering manually. The driver sets img7 to a mask clearing
3878 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3879 * s_and_b32 samp0, samp0, img7
3880 *
3881 * GFX8:
3882 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3883 */
3884 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3885 LLVMValueRef res, LLVMValueRef samp)
3886 {
3887 LLVMBuilderRef builder = ctx->ac.builder;
3888 LLVMValueRef img7, samp0;
3889
3890 if (ctx->ac.chip_class >= GFX8)
3891 return samp;
3892
3893 img7 = LLVMBuildExtractElement(builder, res,
3894 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3895 samp0 = LLVMBuildExtractElement(builder, samp,
3896 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3897 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3898 return LLVMBuildInsertElement(builder, samp, samp0,
3899 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3900 }
3901
3902 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3903 nir_tex_instr *instr,
3904 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3905 LLVMValueRef *fmask_ptr)
3906 {
3907 nir_deref_instr *texture_deref_instr = NULL;
3908 nir_deref_instr *sampler_deref_instr = NULL;
3909 int plane = -1;
3910
3911 for (unsigned i = 0; i < instr->num_srcs; i++) {
3912 switch (instr->src[i].src_type) {
3913 case nir_tex_src_texture_deref:
3914 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3915 break;
3916 case nir_tex_src_sampler_deref:
3917 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3918 break;
3919 case nir_tex_src_plane:
3920 plane = nir_src_as_int(instr->src[i].src);
3921 break;
3922 default:
3923 break;
3924 }
3925 }
3926
3927 if (!sampler_deref_instr)
3928 sampler_deref_instr = texture_deref_instr;
3929
3930 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3931
3932 if (plane >= 0) {
3933 assert(instr->op != nir_texop_txf_ms &&
3934 instr->op != nir_texop_samples_identical);
3935 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3936
3937 main_descriptor = AC_DESC_PLANE_0 + plane;
3938 }
3939
3940 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3941
3942 if (samp_ptr) {
3943 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3944 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3945 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3946 }
3947 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3948 instr->op == nir_texop_samples_identical))
3949 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3950 }
3951
3952 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3953 LLVMValueRef coord)
3954 {
3955 coord = ac_to_float(ctx, coord);
3956 coord = ac_build_round(ctx, coord);
3957 coord = ac_to_integer(ctx, coord);
3958 return coord;
3959 }
3960
3961 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3962 {
3963 LLVMValueRef result = NULL;
3964 struct ac_image_args args = { 0 };
3965 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3966 LLVMValueRef ddx = NULL, ddy = NULL;
3967 unsigned offset_src = 0;
3968
3969 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3970
3971 for (unsigned i = 0; i < instr->num_srcs; i++) {
3972 switch (instr->src[i].src_type) {
3973 case nir_tex_src_coord: {
3974 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3975 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3976 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3977 break;
3978 }
3979 case nir_tex_src_projector:
3980 break;
3981 case nir_tex_src_comparator:
3982 if (instr->is_shadow) {
3983 args.compare = get_src(ctx, instr->src[i].src);
3984 args.compare = ac_to_float(&ctx->ac, args.compare);
3985 }
3986 break;
3987 case nir_tex_src_offset:
3988 args.offset = get_src(ctx, instr->src[i].src);
3989 offset_src = i;
3990 break;
3991 case nir_tex_src_bias:
3992 if (instr->op == nir_texop_txb)
3993 args.bias = get_src(ctx, instr->src[i].src);
3994 break;
3995 case nir_tex_src_lod: {
3996 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
3997 args.level_zero = true;
3998 else
3999 args.lod = get_src(ctx, instr->src[i].src);
4000 break;
4001 }
4002 case nir_tex_src_ms_index:
4003 sample_index = get_src(ctx, instr->src[i].src);
4004 break;
4005 case nir_tex_src_ms_mcs:
4006 break;
4007 case nir_tex_src_ddx:
4008 ddx = get_src(ctx, instr->src[i].src);
4009 break;
4010 case nir_tex_src_ddy:
4011 ddy = get_src(ctx, instr->src[i].src);
4012 break;
4013 case nir_tex_src_texture_offset:
4014 case nir_tex_src_sampler_offset:
4015 case nir_tex_src_plane:
4016 default:
4017 break;
4018 }
4019 }
4020
4021 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4022 result = get_buffer_size(ctx, args.resource, true);
4023 goto write_result;
4024 }
4025
4026 if (instr->op == nir_texop_texture_samples) {
4027 LLVMValueRef res, samples, is_msaa;
4028 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4029 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4030 LLVMConstInt(ctx->ac.i32, 3, false), "");
4031 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4032 LLVMConstInt(ctx->ac.i32, 28, false), "");
4033 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4034 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4035 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4036 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4037
4038 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4039 LLVMConstInt(ctx->ac.i32, 16, false), "");
4040 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4041 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4042 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4043 samples, "");
4044 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4045 ctx->ac.i32_1, "");
4046 result = samples;
4047 goto write_result;
4048 }
4049
4050 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4051 LLVMValueRef offset[3], pack;
4052 for (unsigned chan = 0; chan < 3; ++chan)
4053 offset[chan] = ctx->ac.i32_0;
4054
4055 unsigned num_components = ac_get_llvm_num_components(args.offset);
4056 for (unsigned chan = 0; chan < num_components; chan++) {
4057 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4058 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4059 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4060 if (chan)
4061 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4062 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4063 }
4064 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4065 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4066 args.offset = pack;
4067 }
4068
4069 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4070 * OpenGL 4.5 spec says:
4071 *
4072 * "If the texture’s internal format indicates a fixed-point
4073 * depth texture, then D_t and D_ref are clamped to the
4074 * range [0, 1]; otherwise no clamping is performed."
4075 *
4076 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4077 * so the depth comparison value isn't clamped for Z16 and
4078 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4079 * an explicitly clamped 32-bit float format.
4080 */
4081 if (args.compare &&
4082 ctx->ac.chip_class >= GFX8 &&
4083 ctx->ac.chip_class <= GFX9 &&
4084 ctx->abi->clamp_shadow_reference) {
4085 LLVMValueRef upgraded, clamped;
4086
4087 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4088 LLVMConstInt(ctx->ac.i32, 3, false), "");
4089 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4090 LLVMConstInt(ctx->ac.i32, 29, false), "");
4091 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4092 clamped = ac_build_clamp(&ctx->ac, args.compare);
4093 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4094 args.compare, "");
4095 }
4096
4097 /* pack derivatives */
4098 if (ddx || ddy) {
4099 int num_src_deriv_channels, num_dest_deriv_channels;
4100 switch (instr->sampler_dim) {
4101 case GLSL_SAMPLER_DIM_3D:
4102 case GLSL_SAMPLER_DIM_CUBE:
4103 num_src_deriv_channels = 3;
4104 num_dest_deriv_channels = 3;
4105 break;
4106 case GLSL_SAMPLER_DIM_2D:
4107 default:
4108 num_src_deriv_channels = 2;
4109 num_dest_deriv_channels = 2;
4110 break;
4111 case GLSL_SAMPLER_DIM_1D:
4112 num_src_deriv_channels = 1;
4113 if (ctx->ac.chip_class == GFX9) {
4114 num_dest_deriv_channels = 2;
4115 } else {
4116 num_dest_deriv_channels = 1;
4117 }
4118 break;
4119 }
4120
4121 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4122 args.derivs[i] = ac_to_float(&ctx->ac,
4123 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4124 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4125 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4126 }
4127 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4128 args.derivs[i] = ctx->ac.f32_0;
4129 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4130 }
4131 }
4132
4133 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4134 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4135 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4136 if (instr->coord_components == 3)
4137 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4138 ac_prepare_cube_coords(&ctx->ac,
4139 instr->op == nir_texop_txd, instr->is_array,
4140 instr->op == nir_texop_lod, args.coords, args.derivs);
4141 }
4142
4143 /* Texture coordinates fixups */
4144 if (instr->coord_components > 1 &&
4145 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4146 instr->is_array &&
4147 instr->op != nir_texop_txf) {
4148 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4149 }
4150
4151 if (instr->coord_components > 2 &&
4152 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4153 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4154 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4155 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4156 instr->is_array &&
4157 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4158 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4159 }
4160
4161 if (ctx->ac.chip_class == GFX9 &&
4162 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4163 instr->op != nir_texop_lod) {
4164 LLVMValueRef filler;
4165 if (instr->op == nir_texop_txf)
4166 filler = ctx->ac.i32_0;
4167 else
4168 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4169
4170 if (instr->is_array)
4171 args.coords[2] = args.coords[1];
4172 args.coords[1] = filler;
4173 }
4174
4175 /* Pack sample index */
4176 if (instr->op == nir_texop_txf_ms && sample_index)
4177 args.coords[instr->coord_components] = sample_index;
4178
4179 if (instr->op == nir_texop_samples_identical) {
4180 struct ac_image_args txf_args = { 0 };
4181 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4182
4183 txf_args.dmask = 0xf;
4184 txf_args.resource = fmask_ptr;
4185 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4186 result = build_tex_intrinsic(ctx, instr, &txf_args);
4187
4188 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4189 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4190 goto write_result;
4191 }
4192
4193 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4194 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4195 instr->op != nir_texop_txs) {
4196 unsigned sample_chan = instr->is_array ? 3 : 2;
4197 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4198 &ctx->ac, args.coords[0], args.coords[1],
4199 instr->is_array ? args.coords[2] : NULL,
4200 args.coords[sample_chan], fmask_ptr);
4201 }
4202
4203 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4204 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4205 num_offsets = MIN2(num_offsets, instr->coord_components);
4206 for (unsigned i = 0; i < num_offsets; ++i) {
4207 args.coords[i] = LLVMBuildAdd(
4208 ctx->ac.builder, args.coords[i],
4209 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4210 }
4211 args.offset = NULL;
4212 }
4213
4214 /* DMASK was repurposed for GATHER4. 4 components are always
4215 * returned and DMASK works like a swizzle - it selects
4216 * the component to fetch. The only valid DMASK values are
4217 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4218 * (red,red,red,red) etc.) The ISA document doesn't mention
4219 * this.
4220 */
4221 args.dmask = 0xf;
4222 if (instr->op == nir_texop_tg4) {
4223 if (instr->is_shadow)
4224 args.dmask = 1;
4225 else
4226 args.dmask = 1 << instr->component;
4227 }
4228
4229 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4230 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4231 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4232 }
4233 result = build_tex_intrinsic(ctx, instr, &args);
4234
4235 if (instr->op == nir_texop_query_levels)
4236 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4237 else if (instr->is_shadow && instr->is_new_style_shadow &&
4238 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4239 instr->op != nir_texop_tg4)
4240 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4241 else if (instr->op == nir_texop_txs &&
4242 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4243 instr->is_array) {
4244 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4245 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4246 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4247 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4248 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4249 } else if (ctx->ac.chip_class == GFX9 &&
4250 instr->op == nir_texop_txs &&
4251 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4252 instr->is_array) {
4253 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4254 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4255 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4256 ctx->ac.i32_1, "");
4257 } else if (instr->dest.ssa.num_components != 4)
4258 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4259
4260 write_result:
4261 if (result) {
4262 assert(instr->dest.is_ssa);
4263 result = ac_to_integer(&ctx->ac, result);
4264 ctx->ssa_defs[instr->dest.ssa.index] = result;
4265 }
4266 }
4267
4268
4269 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4270 {
4271 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4272 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4273
4274 ctx->ssa_defs[instr->dest.ssa.index] = result;
4275 _mesa_hash_table_insert(ctx->phis, instr, result);
4276 }
4277
4278 static void visit_post_phi(struct ac_nir_context *ctx,
4279 nir_phi_instr *instr,
4280 LLVMValueRef llvm_phi)
4281 {
4282 nir_foreach_phi_src(src, instr) {
4283 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4284 LLVMValueRef llvm_src = get_src(ctx, src->src);
4285
4286 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4287 }
4288 }
4289
4290 static void phi_post_pass(struct ac_nir_context *ctx)
4291 {
4292 hash_table_foreach(ctx->phis, entry) {
4293 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4294 (LLVMValueRef)entry->data);
4295 }
4296 }
4297
4298
4299 static void visit_ssa_undef(struct ac_nir_context *ctx,
4300 const nir_ssa_undef_instr *instr)
4301 {
4302 unsigned num_components = instr->def.num_components;
4303 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4304 LLVMValueRef undef;
4305
4306 if (num_components == 1)
4307 undef = LLVMGetUndef(type);
4308 else {
4309 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4310 }
4311 ctx->ssa_defs[instr->def.index] = undef;
4312 }
4313
4314 static void visit_jump(struct ac_llvm_context *ctx,
4315 const nir_jump_instr *instr)
4316 {
4317 switch (instr->type) {
4318 case nir_jump_break:
4319 ac_build_break(ctx);
4320 break;
4321 case nir_jump_continue:
4322 ac_build_continue(ctx);
4323 break;
4324 default:
4325 fprintf(stderr, "Unknown NIR jump instr: ");
4326 nir_print_instr(&instr->instr, stderr);
4327 fprintf(stderr, "\n");
4328 abort();
4329 }
4330 }
4331
4332 static LLVMTypeRef
4333 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4334 enum glsl_base_type type)
4335 {
4336 switch (type) {
4337 case GLSL_TYPE_INT:
4338 case GLSL_TYPE_UINT:
4339 case GLSL_TYPE_BOOL:
4340 case GLSL_TYPE_SUBROUTINE:
4341 return ac->i32;
4342 case GLSL_TYPE_INT8:
4343 case GLSL_TYPE_UINT8:
4344 return ac->i8;
4345 case GLSL_TYPE_INT16:
4346 case GLSL_TYPE_UINT16:
4347 return ac->i16;
4348 case GLSL_TYPE_FLOAT:
4349 return ac->f32;
4350 case GLSL_TYPE_FLOAT16:
4351 return ac->f16;
4352 case GLSL_TYPE_INT64:
4353 case GLSL_TYPE_UINT64:
4354 return ac->i64;
4355 case GLSL_TYPE_DOUBLE:
4356 return ac->f64;
4357 default:
4358 unreachable("unknown GLSL type");
4359 }
4360 }
4361
4362 static LLVMTypeRef
4363 glsl_to_llvm_type(struct ac_llvm_context *ac,
4364 const struct glsl_type *type)
4365 {
4366 if (glsl_type_is_scalar(type)) {
4367 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4368 }
4369
4370 if (glsl_type_is_vector(type)) {
4371 return LLVMVectorType(
4372 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4373 glsl_get_vector_elements(type));
4374 }
4375
4376 if (glsl_type_is_matrix(type)) {
4377 return LLVMArrayType(
4378 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4379 glsl_get_matrix_columns(type));
4380 }
4381
4382 if (glsl_type_is_array(type)) {
4383 return LLVMArrayType(
4384 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4385 glsl_get_length(type));
4386 }
4387
4388 assert(glsl_type_is_struct_or_ifc(type));
4389
4390 LLVMTypeRef member_types[glsl_get_length(type)];
4391
4392 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4393 member_types[i] =
4394 glsl_to_llvm_type(ac,
4395 glsl_get_struct_field(type, i));
4396 }
4397
4398 return LLVMStructTypeInContext(ac->context, member_types,
4399 glsl_get_length(type), false);
4400 }
4401
4402 static void visit_deref(struct ac_nir_context *ctx,
4403 nir_deref_instr *instr)
4404 {
4405 if (instr->mode != nir_var_mem_shared &&
4406 instr->mode != nir_var_mem_global)
4407 return;
4408
4409 LLVMValueRef result = NULL;
4410 switch(instr->deref_type) {
4411 case nir_deref_type_var: {
4412 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4413 result = entry->data;
4414 break;
4415 }
4416 case nir_deref_type_struct:
4417 if (instr->mode == nir_var_mem_global) {
4418 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4419 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4420 instr->strct.index);
4421 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4422 LLVMConstInt(ctx->ac.i32, offset, 0));
4423 } else {
4424 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4425 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4426 }
4427 break;
4428 case nir_deref_type_array:
4429 if (instr->mode == nir_var_mem_global) {
4430 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4431 unsigned stride = glsl_get_explicit_stride(parent->type);
4432
4433 if ((glsl_type_is_matrix(parent->type) &&
4434 glsl_matrix_type_is_row_major(parent->type)) ||
4435 (glsl_type_is_vector(parent->type) && stride == 0))
4436 stride = type_scalar_size_bytes(parent->type);
4437
4438 assert(stride > 0);
4439 LLVMValueRef index = get_src(ctx, instr->arr.index);
4440 if (LLVMTypeOf(index) != ctx->ac.i64)
4441 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4442
4443 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4444
4445 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4446 } else {
4447 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4448 get_src(ctx, instr->arr.index));
4449 }
4450 break;
4451 case nir_deref_type_ptr_as_array:
4452 if (instr->mode == nir_var_mem_global) {
4453 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4454
4455 LLVMValueRef index = get_src(ctx, instr->arr.index);
4456 if (LLVMTypeOf(index) != ctx->ac.i64)
4457 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4458
4459 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4460
4461 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4462 } else {
4463 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4464 get_src(ctx, instr->arr.index));
4465 }
4466 break;
4467 case nir_deref_type_cast: {
4468 result = get_src(ctx, instr->parent);
4469
4470 /* We can't use the structs from LLVM because the shader
4471 * specifies its own offsets. */
4472 LLVMTypeRef pointee_type = ctx->ac.i8;
4473 if (instr->mode == nir_var_mem_shared)
4474 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4475
4476 unsigned address_space;
4477
4478 switch(instr->mode) {
4479 case nir_var_mem_shared:
4480 address_space = AC_ADDR_SPACE_LDS;
4481 break;
4482 case nir_var_mem_global:
4483 address_space = AC_ADDR_SPACE_GLOBAL;
4484 break;
4485 default:
4486 unreachable("Unhandled address space");
4487 }
4488
4489 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4490
4491 if (LLVMTypeOf(result) != type) {
4492 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4493 result = LLVMBuildBitCast(ctx->ac.builder, result,
4494 type, "");
4495 } else {
4496 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4497 type, "");
4498 }
4499 }
4500 break;
4501 }
4502 default:
4503 unreachable("Unhandled deref_instr deref type");
4504 }
4505
4506 ctx->ssa_defs[instr->dest.ssa.index] = result;
4507 }
4508
4509 static void visit_cf_list(struct ac_nir_context *ctx,
4510 struct exec_list *list);
4511
4512 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4513 {
4514 nir_foreach_instr(instr, block)
4515 {
4516 switch (instr->type) {
4517 case nir_instr_type_alu:
4518 visit_alu(ctx, nir_instr_as_alu(instr));
4519 break;
4520 case nir_instr_type_load_const:
4521 visit_load_const(ctx, nir_instr_as_load_const(instr));
4522 break;
4523 case nir_instr_type_intrinsic:
4524 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4525 break;
4526 case nir_instr_type_tex:
4527 visit_tex(ctx, nir_instr_as_tex(instr));
4528 break;
4529 case nir_instr_type_phi:
4530 visit_phi(ctx, nir_instr_as_phi(instr));
4531 break;
4532 case nir_instr_type_ssa_undef:
4533 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4534 break;
4535 case nir_instr_type_jump:
4536 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4537 break;
4538 case nir_instr_type_deref:
4539 visit_deref(ctx, nir_instr_as_deref(instr));
4540 break;
4541 default:
4542 fprintf(stderr, "Unknown NIR instr type: ");
4543 nir_print_instr(instr, stderr);
4544 fprintf(stderr, "\n");
4545 abort();
4546 }
4547 }
4548
4549 _mesa_hash_table_insert(ctx->defs, block,
4550 LLVMGetInsertBlock(ctx->ac.builder));
4551 }
4552
4553 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4554 {
4555 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4556
4557 nir_block *then_block =
4558 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4559
4560 ac_build_uif(&ctx->ac, value, then_block->index);
4561
4562 visit_cf_list(ctx, &if_stmt->then_list);
4563
4564 if (!exec_list_is_empty(&if_stmt->else_list)) {
4565 nir_block *else_block =
4566 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4567
4568 ac_build_else(&ctx->ac, else_block->index);
4569 visit_cf_list(ctx, &if_stmt->else_list);
4570 }
4571
4572 ac_build_endif(&ctx->ac, then_block->index);
4573 }
4574
4575 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4576 {
4577 nir_block *first_loop_block =
4578 (nir_block *) exec_list_get_head(&loop->body);
4579
4580 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4581
4582 visit_cf_list(ctx, &loop->body);
4583
4584 ac_build_endloop(&ctx->ac, first_loop_block->index);
4585 }
4586
4587 static void visit_cf_list(struct ac_nir_context *ctx,
4588 struct exec_list *list)
4589 {
4590 foreach_list_typed(nir_cf_node, node, node, list)
4591 {
4592 switch (node->type) {
4593 case nir_cf_node_block:
4594 visit_block(ctx, nir_cf_node_as_block(node));
4595 break;
4596
4597 case nir_cf_node_if:
4598 visit_if(ctx, nir_cf_node_as_if(node));
4599 break;
4600
4601 case nir_cf_node_loop:
4602 visit_loop(ctx, nir_cf_node_as_loop(node));
4603 break;
4604
4605 default:
4606 assert(0);
4607 }
4608 }
4609 }
4610
4611 void
4612 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4613 struct ac_shader_abi *abi,
4614 struct nir_shader *nir,
4615 struct nir_variable *variable,
4616 gl_shader_stage stage)
4617 {
4618 unsigned output_loc = variable->data.driver_location / 4;
4619 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4620
4621 /* tess ctrl has it's own load/store paths for outputs */
4622 if (stage == MESA_SHADER_TESS_CTRL)
4623 return;
4624
4625 if (stage == MESA_SHADER_VERTEX ||
4626 stage == MESA_SHADER_TESS_EVAL ||
4627 stage == MESA_SHADER_GEOMETRY) {
4628 int idx = variable->data.location + variable->data.index;
4629 if (idx == VARYING_SLOT_CLIP_DIST0) {
4630 int length = nir->info.clip_distance_array_size +
4631 nir->info.cull_distance_array_size;
4632
4633 if (length > 4)
4634 attrib_count = 2;
4635 else
4636 attrib_count = 1;
4637 }
4638 }
4639
4640 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4641 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4642 for (unsigned i = 0; i < attrib_count; ++i) {
4643 for (unsigned chan = 0; chan < 4; chan++) {
4644 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4645 ac_build_alloca_undef(ctx, type, "");
4646 }
4647 }
4648 }
4649
4650 static void
4651 setup_locals(struct ac_nir_context *ctx,
4652 struct nir_function *func)
4653 {
4654 int i, j;
4655 ctx->num_locals = 0;
4656 nir_foreach_variable(variable, &func->impl->locals) {
4657 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4658 variable->data.driver_location = ctx->num_locals * 4;
4659 variable->data.location_frac = 0;
4660 ctx->num_locals += attrib_count;
4661 }
4662 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4663 if (!ctx->locals)
4664 return;
4665
4666 for (i = 0; i < ctx->num_locals; i++) {
4667 for (j = 0; j < 4; j++) {
4668 ctx->locals[i * 4 + j] =
4669 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4670 }
4671 }
4672 }
4673
4674 static void
4675 setup_scratch(struct ac_nir_context *ctx,
4676 struct nir_shader *shader)
4677 {
4678 if (shader->scratch_size == 0)
4679 return;
4680
4681 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4682 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4683 "scratch");
4684 }
4685
4686 static void
4687 setup_constant_data(struct ac_nir_context *ctx,
4688 struct nir_shader *shader)
4689 {
4690 if (!shader->constant_data)
4691 return;
4692
4693 LLVMValueRef data =
4694 LLVMConstStringInContext(ctx->ac.context,
4695 shader->constant_data,
4696 shader->constant_data_size,
4697 true);
4698 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
4699
4700 /* We want to put the constant data in the CONST address space so that
4701 * we can use scalar loads. However, LLVM versions before 10 put these
4702 * variables in the same section as the code, which is unacceptable
4703 * for RadeonSI as it needs to relocate all the data sections after
4704 * the code sections. See https://reviews.llvm.org/D65813.
4705 */
4706 unsigned address_space =
4707 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
4708
4709 LLVMValueRef global =
4710 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4711 "const_data",
4712 address_space);
4713
4714 LLVMSetInitializer(global, data);
4715 LLVMSetGlobalConstant(global, true);
4716 LLVMSetVisibility(global, LLVMHiddenVisibility);
4717 ctx->constant_data = global;
4718 }
4719
4720 static void
4721 setup_shared(struct ac_nir_context *ctx,
4722 struct nir_shader *nir)
4723 {
4724 nir_foreach_variable(variable, &nir->shared) {
4725 LLVMValueRef shared =
4726 LLVMAddGlobalInAddressSpace(
4727 ctx->ac.module, glsl_to_llvm_type(&ctx->ac, variable->type),
4728 variable->name ? variable->name : "",
4729 AC_ADDR_SPACE_LDS);
4730 _mesa_hash_table_insert(ctx->vars, variable, shared);
4731 }
4732 }
4733
4734 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4735 const struct ac_shader_args *args, struct nir_shader *nir)
4736 {
4737 struct ac_nir_context ctx = {};
4738 struct nir_function *func;
4739
4740 ctx.ac = *ac;
4741 ctx.abi = abi;
4742 ctx.args = args;
4743
4744 ctx.stage = nir->info.stage;
4745 ctx.info = &nir->info;
4746
4747 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4748
4749 nir_foreach_variable(variable, &nir->outputs)
4750 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4751 ctx.stage);
4752
4753 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4754 _mesa_key_pointer_equal);
4755 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4756 _mesa_key_pointer_equal);
4757 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4758 _mesa_key_pointer_equal);
4759
4760 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4761
4762 nir_index_ssa_defs(func->impl);
4763 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4764
4765 setup_locals(&ctx, func);
4766 setup_scratch(&ctx, nir);
4767 setup_constant_data(&ctx, nir);
4768
4769 if (gl_shader_stage_is_compute(nir->info.stage))
4770 setup_shared(&ctx, nir);
4771
4772 visit_cf_list(&ctx, &func->impl->body);
4773 phi_post_pass(&ctx);
4774
4775 if (!gl_shader_stage_is_compute(nir->info.stage))
4776 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4777 ctx.abi->outputs);
4778
4779 free(ctx.locals);
4780 free(ctx.ssa_defs);
4781 ralloc_free(ctx.defs);
4782 ralloc_free(ctx.phis);
4783 ralloc_free(ctx.vars);
4784 }
4785
4786 void
4787 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4788 {
4789 /* Lower large variables to scratch first so that we won't bloat the
4790 * shader by generating large if ladders for them. We later lower
4791 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4792 */
4793 NIR_PASS_V(nir, nir_lower_vars_to_scratch,
4794 nir_var_function_temp,
4795 256,
4796 glsl_get_natural_size_align_bytes);
4797
4798 /* While it would be nice not to have this flag, we are constrained
4799 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4800 */
4801 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4802
4803 /* TODO: Indirect indexing of GS inputs is unimplemented.
4804 *
4805 * TCS and TES load inputs directly from LDS or offchip memory, so
4806 * indirect indexing is trivial.
4807 */
4808 nir_variable_mode indirect_mask = 0;
4809 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4810 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4811 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4812 !llvm_has_working_vgpr_indexing)) {
4813 indirect_mask |= nir_var_shader_in;
4814 }
4815 if (!llvm_has_working_vgpr_indexing &&
4816 nir->info.stage != MESA_SHADER_TESS_CTRL)
4817 indirect_mask |= nir_var_shader_out;
4818
4819 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4820 * smart enough to handle indirects without causing excess spilling
4821 * causing the gpu to hang.
4822 *
4823 * See the following thread for more details of the problem:
4824 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4825 */
4826 indirect_mask |= nir_var_function_temp;
4827
4828 nir_lower_indirect_derefs(nir, indirect_mask);
4829 }
4830
4831 static unsigned
4832 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4833 {
4834 if (intrin->intrinsic != nir_intrinsic_store_deref)
4835 return 0;
4836
4837 nir_variable *var =
4838 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4839
4840 if (var->data.mode != nir_var_shader_out)
4841 return 0;
4842
4843 unsigned writemask = 0;
4844 const int location = var->data.location;
4845 unsigned first_component = var->data.location_frac;
4846 unsigned num_comps = intrin->dest.ssa.num_components;
4847
4848 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4849 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4850 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4851 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4852
4853 return writemask;
4854 }
4855
4856 static void
4857 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4858 unsigned *cond_block_tf_writemask,
4859 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4860 {
4861 switch (cf_node->type) {
4862 case nir_cf_node_block: {
4863 nir_block *block = nir_cf_node_as_block(cf_node);
4864 nir_foreach_instr(instr, block) {
4865 if (instr->type != nir_instr_type_intrinsic)
4866 continue;
4867
4868 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4869 if (intrin->intrinsic == nir_intrinsic_barrier) {
4870
4871 /* If we find a barrier in nested control flow put this in the
4872 * too hard basket. In GLSL this is not possible but it is in
4873 * SPIR-V.
4874 */
4875 if (is_nested_cf) {
4876 *tessfactors_are_def_in_all_invocs = false;
4877 return;
4878 }
4879
4880 /* The following case must be prevented:
4881 * gl_TessLevelInner = ...;
4882 * barrier();
4883 * if (gl_InvocationID == 1)
4884 * gl_TessLevelInner = ...;
4885 *
4886 * If you consider disjoint code segments separated by barriers, each
4887 * such segment that writes tess factor channels should write the same
4888 * channels in all codepaths within that segment.
4889 */
4890 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4891 /* Accumulate the result: */
4892 *tessfactors_are_def_in_all_invocs &=
4893 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4894
4895 /* Analyze the next code segment from scratch. */
4896 *upper_block_tf_writemask = 0;
4897 *cond_block_tf_writemask = 0;
4898 }
4899 } else
4900 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4901 }
4902
4903 break;
4904 }
4905 case nir_cf_node_if: {
4906 unsigned then_tessfactor_writemask = 0;
4907 unsigned else_tessfactor_writemask = 0;
4908
4909 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4910 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4911 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4912 cond_block_tf_writemask,
4913 tessfactors_are_def_in_all_invocs, true);
4914 }
4915
4916 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4917 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4918 cond_block_tf_writemask,
4919 tessfactors_are_def_in_all_invocs, true);
4920 }
4921
4922 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4923 /* If both statements write the same tess factor channels,
4924 * we can say that the upper block writes them too.
4925 */
4926 *upper_block_tf_writemask |= then_tessfactor_writemask &
4927 else_tessfactor_writemask;
4928 *cond_block_tf_writemask |= then_tessfactor_writemask |
4929 else_tessfactor_writemask;
4930 }
4931
4932 break;
4933 }
4934 case nir_cf_node_loop: {
4935 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4936 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4937 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4938 cond_block_tf_writemask,
4939 tessfactors_are_def_in_all_invocs, true);
4940 }
4941
4942 break;
4943 }
4944 default:
4945 unreachable("unknown cf node type");
4946 }
4947 }
4948
4949 bool
4950 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4951 {
4952 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4953
4954 /* The pass works as follows:
4955 * If all codepaths write tess factors, we can say that all
4956 * invocations define tess factors.
4957 *
4958 * Each tess factor channel is tracked separately.
4959 */
4960 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4961 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4962
4963 /* Initial value = true. Here the pass will accumulate results from
4964 * multiple segments surrounded by barriers. If tess factors aren't
4965 * written at all, it's a shader bug and we don't care if this will be
4966 * true.
4967 */
4968 bool tessfactors_are_def_in_all_invocs = true;
4969
4970 nir_foreach_function(function, nir) {
4971 if (function->impl) {
4972 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4973 scan_tess_ctrl(node, &main_block_tf_writemask,
4974 &cond_block_tf_writemask,
4975 &tessfactors_are_def_in_all_invocs,
4976 false);
4977 }
4978 }
4979 }
4980
4981 /* Accumulate the result for the last code segment separated by a
4982 * barrier.
4983 */
4984 if (main_block_tf_writemask || cond_block_tf_writemask) {
4985 tessfactors_are_def_in_all_invocs &=
4986 !(cond_block_tf_writemask & ~main_block_tf_writemask);
4987 }
4988
4989 return tessfactors_are_def_in_all_invocs;
4990 }