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[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_1f_param_scalar(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0)
223 {
224 if (LLVMGetTypeKind(result_type) != LLVMVectorTypeKind)
225 return emit_intrin_1f_param(ctx, intrin, result_type, src0);
226
227 LLVMTypeRef elem_type = LLVMGetElementType(result_type);
228 LLVMValueRef ret = LLVMGetUndef(result_type);
229
230 /* Scalarize the intrinsic, because vectors are not supported. */
231 for (unsigned i = 0; i < LLVMGetVectorSize(result_type); i++) {
232 char name[64], type[64];
233 LLVMValueRef params[] = {
234 ac_to_float(ctx, ac_llvm_extract_elem(ctx, src0, i)),
235 };
236
237 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
238 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
239 assert(length < sizeof(name));
240 ret = LLVMBuildInsertElement(ctx->builder, ret,
241 ac_build_intrinsic(ctx, name, elem_type, params,
242 1, AC_FUNC_ATTR_READNONE),
243 LLVMConstInt(ctx->i32, i, 0), "");
244 }
245 return ret;
246 }
247
248 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
249 const char *intrin,
250 LLVMTypeRef result_type,
251 LLVMValueRef src0, LLVMValueRef src1)
252 {
253 char name[64], type[64];
254 LLVMValueRef params[] = {
255 ac_to_float(ctx, src0),
256 ac_to_float(ctx, src1),
257 };
258
259 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
260 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
261 assert(length < sizeof(name));
262 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
263 }
264
265 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
266 const char *intrin,
267 LLVMTypeRef result_type,
268 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
269 {
270 char name[64], type[64];
271 LLVMValueRef params[] = {
272 ac_to_float(ctx, src0),
273 ac_to_float(ctx, src1),
274 ac_to_float(ctx, src2),
275 };
276
277 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
278 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
279 assert(length < sizeof(name));
280 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
281 }
282
283 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
284 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
285 {
286 LLVMTypeRef src1_type = LLVMTypeOf(src1);
287 LLVMTypeRef src2_type = LLVMTypeOf(src2);
288
289 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
290
291 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
292 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
293 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
294 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
295 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
296 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
297 }
298
299 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
300 ctx->i32_0, "");
301 return LLVMBuildSelect(ctx->builder, v,
302 ac_to_integer_or_pointer(ctx, src1),
303 ac_to_integer_or_pointer(ctx, src2), "");
304 }
305
306 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
307 LLVMValueRef src0)
308 {
309 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
310 }
311
312 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
313 const char *intrin,
314 LLVMValueRef src0, LLVMValueRef src1)
315 {
316 LLVMTypeRef ret_type;
317 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
318 LLVMValueRef res;
319 LLVMValueRef params[] = { src0, src1 };
320 ret_type = LLVMStructTypeInContext(ctx->context, types,
321 2, true);
322
323 res = ac_build_intrinsic(ctx, intrin, ret_type,
324 params, 2, AC_FUNC_ATTR_READNONE);
325
326 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
327 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
328 return res;
329 }
330
331 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
332 LLVMValueRef src0,
333 unsigned bitsize)
334 {
335 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
336 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
337 "");
338 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
339
340 switch (bitsize) {
341 case 16:
342 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
343 case 32:
344 return result;
345 case 64:
346 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
347 default:
348 unreachable("Unsupported bit size.");
349 }
350 }
351
352 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
353 LLVMValueRef src0)
354 {
355 src0 = ac_to_float(ctx, src0);
356 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
357 return LLVMBuildSExt(ctx->builder,
358 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
359 ctx->i32, "");
360 }
361
362 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
363 LLVMValueRef src0,
364 unsigned bitsize)
365 {
366 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
367
368 switch (bitsize) {
369 case 8:
370 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
371 case 16:
372 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
373 case 32:
374 return result;
375 case 64:
376 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
377 default:
378 unreachable("Unsupported bit size.");
379 }
380 }
381
382 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
383 LLVMValueRef src0)
384 {
385 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
386 return LLVMBuildSExt(ctx->builder,
387 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
388 ctx->i32, "");
389 }
390
391 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
392 LLVMValueRef src0)
393 {
394 LLVMValueRef result;
395 LLVMValueRef cond = NULL;
396
397 src0 = ac_to_float(ctx, src0);
398 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
399
400 if (ctx->chip_class >= GFX8) {
401 LLVMValueRef args[2];
402 /* Check if the result is a denormal - and flush to 0 if so. */
403 args[0] = result;
404 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
405 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
406 }
407
408 /* need to convert back up to f32 */
409 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
410
411 if (ctx->chip_class >= GFX8)
412 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
413 else {
414 /* for GFX6-GFX7 */
415 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
416 * so compare the result and flush to 0 if it's smaller.
417 */
418 LLVMValueRef temp, cond2;
419 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
420 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
421 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
422 temp, "");
423 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
424 temp, ctx->f32_0, "");
425 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
426 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
427 }
428 return result;
429 }
430
431 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
432 LLVMValueRef src0, LLVMValueRef src1)
433 {
434 LLVMValueRef dst64, result;
435 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
436 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
437
438 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
439 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
440 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
441 return result;
442 }
443
444 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
445 LLVMValueRef src0, LLVMValueRef src1)
446 {
447 LLVMValueRef dst64, result;
448 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
449 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
450
451 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
452 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
453 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
454 return result;
455 }
456
457 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
458 LLVMValueRef bits, LLVMValueRef offset)
459 {
460 /* mask = ((1 << bits) - 1) << offset */
461 return LLVMBuildShl(ctx->builder,
462 LLVMBuildSub(ctx->builder,
463 LLVMBuildShl(ctx->builder,
464 ctx->i32_1,
465 bits, ""),
466 ctx->i32_1, ""),
467 offset, "");
468 }
469
470 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
471 LLVMValueRef mask, LLVMValueRef insert,
472 LLVMValueRef base)
473 {
474 /* Calculate:
475 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
476 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
477 */
478 return LLVMBuildXor(ctx->builder, base,
479 LLVMBuildAnd(ctx->builder, mask,
480 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
481 }
482
483 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
484 LLVMValueRef src0,
485 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
486 LLVMValueRef args[2]))
487 {
488 LLVMValueRef comp[2];
489
490 src0 = ac_to_float(ctx, src0);
491 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
492 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
493
494 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
495 }
496
497 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
498 LLVMValueRef src0)
499 {
500 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
501 LLVMValueRef temps[2], val;
502 int i;
503
504 for (i = 0; i < 2; i++) {
505 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
506 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
507 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
508 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
509 }
510 return ac_build_gather_values(ctx, temps, 2);
511 }
512
513 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
514 nir_op op,
515 LLVMValueRef src0)
516 {
517 unsigned mask;
518 int idx;
519 LLVMValueRef result;
520
521 if (op == nir_op_fddx_fine)
522 mask = AC_TID_MASK_LEFT;
523 else if (op == nir_op_fddy_fine)
524 mask = AC_TID_MASK_TOP;
525 else
526 mask = AC_TID_MASK_TOP_LEFT;
527
528 /* for DDX we want to next X pixel, DDY next Y pixel. */
529 if (op == nir_op_fddx_fine ||
530 op == nir_op_fddx_coarse ||
531 op == nir_op_fddx)
532 idx = 1;
533 else
534 idx = 2;
535
536 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
537 return result;
538 }
539
540 struct waterfall_context {
541 LLVMBasicBlockRef phi_bb[2];
542 bool use_waterfall;
543 };
544
545 /* To deal with divergent descriptors we can create a loop that handles all
546 * lanes with the same descriptor on a given iteration (henceforth a
547 * waterfall loop).
548 *
549 * These helper create the begin and end of the loop leaving the caller
550 * to implement the body.
551 *
552 * params:
553 * - ctx is the usal nir context
554 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
555 * - value is the possibly divergent value for which we built the loop
556 * - divergent is whether value is actually divergent. If false we just pass
557 * things through.
558 */
559 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
560 struct waterfall_context *wctx,
561 LLVMValueRef value, bool divergent)
562 {
563 /* If the app claims the value is divergent but it is constant we can
564 * end up with a dynamic index of NULL. */
565 if (!value)
566 divergent = false;
567
568 wctx->use_waterfall = divergent;
569 if (!divergent)
570 return value;
571
572 ac_build_bgnloop(&ctx->ac, 6000);
573
574 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
575
576 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
577 scalar_value, "uniform_active");
578
579 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
580 ac_build_ifcc(&ctx->ac, active, 6001);
581
582 return scalar_value;
583 }
584
585 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
586 struct waterfall_context *wctx,
587 LLVMValueRef value)
588 {
589 LLVMValueRef ret = NULL;
590 LLVMValueRef phi_src[2];
591 LLVMValueRef cc_phi_src[2] = {
592 LLVMConstInt(ctx->ac.i32, 0, false),
593 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
594 };
595
596 if (!wctx->use_waterfall)
597 return value;
598
599 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
600
601 ac_build_endif(&ctx->ac, 6001);
602
603 if (value) {
604 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
605 phi_src[1] = value;
606
607 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
608 }
609
610 /*
611 * By using the optimization barrier on the exit decision, we decouple
612 * the operations from the break, and hence avoid LLVM hoisting the
613 * opteration into the break block.
614 */
615 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
616 ac_build_optimization_barrier(&ctx->ac, &cc);
617
618 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
619 ac_build_ifcc(&ctx->ac, active, 6002);
620 ac_build_break(&ctx->ac);
621 ac_build_endif(&ctx->ac, 6002);
622
623 ac_build_endloop(&ctx->ac, 6000);
624 return ret;
625 }
626
627 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
628 {
629 LLVMValueRef src[4], result = NULL;
630 unsigned num_components = instr->dest.dest.ssa.num_components;
631 unsigned src_components;
632 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
633
634 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
635 switch (instr->op) {
636 case nir_op_vec2:
637 case nir_op_vec3:
638 case nir_op_vec4:
639 src_components = 1;
640 break;
641 case nir_op_pack_half_2x16:
642 case nir_op_pack_snorm_2x16:
643 case nir_op_pack_unorm_2x16:
644 src_components = 2;
645 break;
646 case nir_op_unpack_half_2x16:
647 src_components = 1;
648 break;
649 case nir_op_cube_face_coord:
650 case nir_op_cube_face_index:
651 src_components = 3;
652 break;
653 default:
654 src_components = num_components;
655 break;
656 }
657 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
658 src[i] = get_alu_src(ctx, instr->src[i], src_components);
659
660 switch (instr->op) {
661 case nir_op_mov:
662 result = src[0];
663 break;
664 case nir_op_fneg:
665 src[0] = ac_to_float(&ctx->ac, src[0]);
666 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
667 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
668 /* fneg will be optimized by backend compiler with sign
669 * bit removed via XOR. This is probably a LLVM bug.
670 */
671 result = ac_build_canonicalize(&ctx->ac, result,
672 instr->dest.dest.ssa.bit_size);
673 }
674 break;
675 case nir_op_ineg:
676 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
677 break;
678 case nir_op_inot:
679 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
680 break;
681 case nir_op_iadd:
682 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
683 break;
684 case nir_op_fadd:
685 src[0] = ac_to_float(&ctx->ac, src[0]);
686 src[1] = ac_to_float(&ctx->ac, src[1]);
687 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
688 break;
689 case nir_op_fsub:
690 src[0] = ac_to_float(&ctx->ac, src[0]);
691 src[1] = ac_to_float(&ctx->ac, src[1]);
692 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
693 break;
694 case nir_op_isub:
695 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
696 break;
697 case nir_op_imul:
698 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
699 break;
700 case nir_op_imod:
701 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
702 break;
703 case nir_op_umod:
704 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
705 break;
706 case nir_op_fmod:
707 /* lower_fmod only lower 16-bit and 32-bit fmod */
708 assert(instr->dest.dest.ssa.bit_size == 64);
709 src[0] = ac_to_float(&ctx->ac, src[0]);
710 src[1] = ac_to_float(&ctx->ac, src[1]);
711 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
712 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
713 ac_to_float_type(&ctx->ac, def_type), result);
714 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
715 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
716 break;
717 case nir_op_irem:
718 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
719 break;
720 case nir_op_idiv:
721 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
722 break;
723 case nir_op_udiv:
724 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
725 break;
726 case nir_op_fmul:
727 src[0] = ac_to_float(&ctx->ac, src[0]);
728 src[1] = ac_to_float(&ctx->ac, src[1]);
729 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
730 break;
731 case nir_op_frcp:
732 /* For doubles, we need precise division to pass GLCTS. */
733 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
734 ac_get_type_size(def_type) == 8) {
735 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
736 ac_to_float(&ctx->ac, src[0]), "");
737 } else {
738 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.rcp",
739 ac_to_float_type(&ctx->ac, def_type), src[0]);
740 }
741 if (ctx->abi->clamp_div_by_zero)
742 result = ac_build_fmin(&ctx->ac, result,
743 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
744 break;
745 case nir_op_iand:
746 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
747 break;
748 case nir_op_ior:
749 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
750 break;
751 case nir_op_ixor:
752 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
753 break;
754 case nir_op_ishl:
755 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
756 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
757 LLVMTypeOf(src[0]), "");
758 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
759 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
760 LLVMTypeOf(src[0]), "");
761 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
762 break;
763 case nir_op_ishr:
764 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
765 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
766 LLVMTypeOf(src[0]), "");
767 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
768 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
769 LLVMTypeOf(src[0]), "");
770 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
771 break;
772 case nir_op_ushr:
773 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
774 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
775 LLVMTypeOf(src[0]), "");
776 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
777 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
778 LLVMTypeOf(src[0]), "");
779 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
780 break;
781 case nir_op_ilt32:
782 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
783 break;
784 case nir_op_ine32:
785 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
786 break;
787 case nir_op_ieq32:
788 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
789 break;
790 case nir_op_ige32:
791 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
792 break;
793 case nir_op_ult32:
794 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
795 break;
796 case nir_op_uge32:
797 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
798 break;
799 case nir_op_feq32:
800 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
801 break;
802 case nir_op_fneu32:
803 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
804 break;
805 case nir_op_flt32:
806 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
807 break;
808 case nir_op_fge32:
809 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
810 break;
811 case nir_op_fabs:
812 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
813 ac_to_float_type(&ctx->ac, def_type), src[0]);
814 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
815 /* fabs will be optimized by backend compiler with sign
816 * bit removed via AND.
817 */
818 result = ac_build_canonicalize(&ctx->ac, result,
819 instr->dest.dest.ssa.bit_size);
820 }
821 break;
822 case nir_op_iabs:
823 result = emit_iabs(&ctx->ac, src[0]);
824 break;
825 case nir_op_imax:
826 result = ac_build_imax(&ctx->ac, src[0], src[1]);
827 break;
828 case nir_op_imin:
829 result = ac_build_imin(&ctx->ac, src[0], src[1]);
830 break;
831 case nir_op_umax:
832 result = ac_build_umax(&ctx->ac, src[0], src[1]);
833 break;
834 case nir_op_umin:
835 result = ac_build_umin(&ctx->ac, src[0], src[1]);
836 break;
837 case nir_op_isign:
838 result = ac_build_isign(&ctx->ac, src[0],
839 instr->dest.dest.ssa.bit_size);
840 break;
841 case nir_op_fsign:
842 src[0] = ac_to_float(&ctx->ac, src[0]);
843 result = ac_build_fsign(&ctx->ac, src[0],
844 instr->dest.dest.ssa.bit_size);
845 break;
846 case nir_op_ffloor:
847 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
848 ac_to_float_type(&ctx->ac, def_type), src[0]);
849 break;
850 case nir_op_ftrunc:
851 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
852 ac_to_float_type(&ctx->ac, def_type), src[0]);
853 break;
854 case nir_op_fceil:
855 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
856 ac_to_float_type(&ctx->ac, def_type), src[0]);
857 break;
858 case nir_op_fround_even:
859 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
860 ac_to_float_type(&ctx->ac, def_type),src[0]);
861 break;
862 case nir_op_ffract:
863 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.fract",
864 ac_to_float_type(&ctx->ac, def_type), src[0]);
865 break;
866 case nir_op_fsin:
867 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
868 ac_to_float_type(&ctx->ac, def_type), src[0]);
869 break;
870 case nir_op_fcos:
871 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
872 ac_to_float_type(&ctx->ac, def_type), src[0]);
873 break;
874 case nir_op_fsqrt:
875 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
876 ac_to_float_type(&ctx->ac, def_type), src[0]);
877 break;
878 case nir_op_fexp2:
879 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
880 ac_to_float_type(&ctx->ac, def_type), src[0]);
881 break;
882 case nir_op_flog2:
883 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
884 ac_to_float_type(&ctx->ac, def_type), src[0]);
885 break;
886 case nir_op_frsq:
887 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.rsq",
888 ac_to_float_type(&ctx->ac, def_type), src[0]);
889 if (ctx->abi->clamp_div_by_zero)
890 result = ac_build_fmin(&ctx->ac, result,
891 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
892 break;
893 case nir_op_frexp_exp:
894 src[0] = ac_to_float(&ctx->ac, src[0]);
895 result = ac_build_frexp_exp(&ctx->ac, src[0],
896 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
897 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
898 result = LLVMBuildSExt(ctx->ac.builder, result,
899 ctx->ac.i32, "");
900 break;
901 case nir_op_frexp_sig:
902 src[0] = ac_to_float(&ctx->ac, src[0]);
903 result = ac_build_frexp_mant(&ctx->ac, src[0],
904 instr->dest.dest.ssa.bit_size);
905 break;
906 case nir_op_fpow:
907 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
908 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
909 break;
910 case nir_op_fmax:
911 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
912 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
913 if (ctx->ac.chip_class < GFX9 &&
914 instr->dest.dest.ssa.bit_size == 32) {
915 /* Only pre-GFX9 chips do not flush denorms. */
916 result = ac_build_canonicalize(&ctx->ac, result,
917 instr->dest.dest.ssa.bit_size);
918 }
919 break;
920 case nir_op_fmin:
921 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
922 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
923 if (ctx->ac.chip_class < GFX9 &&
924 instr->dest.dest.ssa.bit_size == 32) {
925 /* Only pre-GFX9 chips do not flush denorms. */
926 result = ac_build_canonicalize(&ctx->ac, result,
927 instr->dest.dest.ssa.bit_size);
928 }
929 break;
930 case nir_op_ffma:
931 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
932 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
933 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
934 break;
935 case nir_op_ldexp:
936 src[0] = ac_to_float(&ctx->ac, src[0]);
937 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
938 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
939 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
940 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
941 else
942 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
943 break;
944 case nir_op_bfm:
945 result = emit_bfm(&ctx->ac, src[0], src[1]);
946 break;
947 case nir_op_bitfield_select:
948 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
949 break;
950 case nir_op_ubfe:
951 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
952 break;
953 case nir_op_ibfe:
954 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
955 break;
956 case nir_op_bitfield_reverse:
957 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
958 break;
959 case nir_op_bit_count:
960 result = ac_build_bit_count(&ctx->ac, src[0]);
961 break;
962 case nir_op_vec2:
963 case nir_op_vec3:
964 case nir_op_vec4:
965 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
966 src[i] = ac_to_integer(&ctx->ac, src[i]);
967 result = ac_build_gather_values(&ctx->ac, src, num_components);
968 break;
969 case nir_op_f2i8:
970 case nir_op_f2i16:
971 case nir_op_f2i32:
972 case nir_op_f2i64:
973 src[0] = ac_to_float(&ctx->ac, src[0]);
974 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
975 break;
976 case nir_op_f2u8:
977 case nir_op_f2u16:
978 case nir_op_f2u32:
979 case nir_op_f2u64:
980 src[0] = ac_to_float(&ctx->ac, src[0]);
981 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
982 break;
983 case nir_op_i2f16:
984 case nir_op_i2f32:
985 case nir_op_i2f64:
986 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
987 break;
988 case nir_op_u2f16:
989 case nir_op_u2f32:
990 case nir_op_u2f64:
991 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
992 break;
993 case nir_op_f2f16_rtz:
994 case nir_op_f2f16:
995 case nir_op_f2fmp:
996 src[0] = ac_to_float(&ctx->ac, src[0]);
997
998 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
999 * all f32->f16 conversions have to round towards zero, because both scalar
1000 * and vec2 down-conversions have to round equally.
1001 */
1002 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
1003 instr->op == nir_op_f2f16_rtz) {
1004 src[0] = ac_to_float(&ctx->ac, src[0]);
1005
1006 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
1007 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
1008
1009 /* Fast path conversion. This only works if NIR is vectorized
1010 * to vec2 16.
1011 */
1012 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
1013 LLVMValueRef args[] = {
1014 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
1015 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
1016 };
1017 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
1018 break;
1019 }
1020
1021 assert(ac_get_llvm_num_components(src[0]) == 1);
1022 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
1023 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
1024 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
1025 } else {
1026 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1027 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1028 else
1029 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1030 }
1031 break;
1032 case nir_op_f2f16_rtne:
1033 case nir_op_f2f32:
1034 case nir_op_f2f64:
1035 src[0] = ac_to_float(&ctx->ac, src[0]);
1036 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1037 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1038 else
1039 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1040 break;
1041 case nir_op_u2u8:
1042 case nir_op_u2u16:
1043 case nir_op_u2ump:
1044 case nir_op_u2u32:
1045 case nir_op_u2u64:
1046 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1047 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1048 else
1049 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1050 break;
1051 case nir_op_i2i8:
1052 case nir_op_i2i16:
1053 case nir_op_i2imp:
1054 case nir_op_i2i32:
1055 case nir_op_i2i64:
1056 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1057 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1058 else
1059 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1060 break;
1061 case nir_op_b32csel:
1062 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1063 break;
1064 case nir_op_find_lsb:
1065 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1066 break;
1067 case nir_op_ufind_msb:
1068 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1069 break;
1070 case nir_op_ifind_msb:
1071 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1072 break;
1073 case nir_op_uadd_carry:
1074 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1075 break;
1076 case nir_op_usub_borrow:
1077 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1078 break;
1079 case nir_op_b2f16:
1080 case nir_op_b2f32:
1081 case nir_op_b2f64:
1082 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1083 break;
1084 case nir_op_f2b32:
1085 result = emit_f2b(&ctx->ac, src[0]);
1086 break;
1087 case nir_op_b2i8:
1088 case nir_op_b2i16:
1089 case nir_op_b2i32:
1090 case nir_op_b2i64:
1091 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1092 break;
1093 case nir_op_i2b32:
1094 result = emit_i2b(&ctx->ac, src[0]);
1095 break;
1096 case nir_op_fquantize2f16:
1097 result = emit_f2f16(&ctx->ac, src[0]);
1098 break;
1099 case nir_op_umul_high:
1100 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1101 break;
1102 case nir_op_imul_high:
1103 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1104 break;
1105 case nir_op_pack_half_2x16:
1106 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1107 break;
1108 case nir_op_pack_snorm_2x16:
1109 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1110 break;
1111 case nir_op_pack_unorm_2x16:
1112 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1113 break;
1114 case nir_op_unpack_half_2x16:
1115 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1116 break;
1117 case nir_op_fddx:
1118 case nir_op_fddy:
1119 case nir_op_fddx_fine:
1120 case nir_op_fddy_fine:
1121 case nir_op_fddx_coarse:
1122 case nir_op_fddy_coarse:
1123 result = emit_ddxy(ctx, instr->op, src[0]);
1124 break;
1125
1126 case nir_op_unpack_64_2x32_split_x: {
1127 assert(ac_get_llvm_num_components(src[0]) == 1);
1128 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1129 ctx->ac.v2i32,
1130 "");
1131 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1132 ctx->ac.i32_0, "");
1133 break;
1134 }
1135
1136 case nir_op_unpack_64_2x32_split_y: {
1137 assert(ac_get_llvm_num_components(src[0]) == 1);
1138 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1139 ctx->ac.v2i32,
1140 "");
1141 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1142 ctx->ac.i32_1, "");
1143 break;
1144 }
1145
1146 case nir_op_pack_64_2x32_split: {
1147 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1148 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1149 break;
1150 }
1151
1152 case nir_op_pack_32_2x16_split: {
1153 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1154 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1155 break;
1156 }
1157
1158 case nir_op_unpack_32_2x16_split_x: {
1159 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1160 ctx->ac.v2i16,
1161 "");
1162 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1163 ctx->ac.i32_0, "");
1164 break;
1165 }
1166
1167 case nir_op_unpack_32_2x16_split_y: {
1168 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1169 ctx->ac.v2i16,
1170 "");
1171 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1172 ctx->ac.i32_1, "");
1173 break;
1174 }
1175
1176 case nir_op_cube_face_coord: {
1177 src[0] = ac_to_float(&ctx->ac, src[0]);
1178 LLVMValueRef results[2];
1179 LLVMValueRef in[3];
1180 for (unsigned chan = 0; chan < 3; chan++)
1181 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1182 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1183 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1184 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1185 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1186 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1187 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1188 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1189 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1190 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1191 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1192 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1193 result = ac_build_gather_values(&ctx->ac, results, 2);
1194 break;
1195 }
1196
1197 case nir_op_cube_face_index: {
1198 src[0] = ac_to_float(&ctx->ac, src[0]);
1199 LLVMValueRef in[3];
1200 for (unsigned chan = 0; chan < 3; chan++)
1201 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1202 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1203 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1204 break;
1205 }
1206
1207 default:
1208 fprintf(stderr, "Unknown NIR alu instr: ");
1209 nir_print_instr(&instr->instr, stderr);
1210 fprintf(stderr, "\n");
1211 abort();
1212 }
1213
1214 if (result) {
1215 assert(instr->dest.dest.is_ssa);
1216 result = ac_to_integer_or_pointer(&ctx->ac, result);
1217 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1218 }
1219 }
1220
1221 static void visit_load_const(struct ac_nir_context *ctx,
1222 const nir_load_const_instr *instr)
1223 {
1224 LLVMValueRef values[4], value = NULL;
1225 LLVMTypeRef element_type =
1226 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1227
1228 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1229 switch (instr->def.bit_size) {
1230 case 8:
1231 values[i] = LLVMConstInt(element_type,
1232 instr->value[i].u8, false);
1233 break;
1234 case 16:
1235 values[i] = LLVMConstInt(element_type,
1236 instr->value[i].u16, false);
1237 break;
1238 case 32:
1239 values[i] = LLVMConstInt(element_type,
1240 instr->value[i].u32, false);
1241 break;
1242 case 64:
1243 values[i] = LLVMConstInt(element_type,
1244 instr->value[i].u64, false);
1245 break;
1246 default:
1247 fprintf(stderr,
1248 "unsupported nir load_const bit_size: %d\n",
1249 instr->def.bit_size);
1250 abort();
1251 }
1252 }
1253 if (instr->def.num_components > 1) {
1254 value = LLVMConstVector(values, instr->def.num_components);
1255 } else
1256 value = values[0];
1257
1258 ctx->ssa_defs[instr->def.index] = value;
1259 }
1260
1261 static LLVMValueRef
1262 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1263 {
1264 LLVMValueRef size =
1265 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1266 LLVMConstInt(ctx->ac.i32, 2, false), "");
1267
1268 /* GFX8 only */
1269 if (ctx->ac.chip_class == GFX8 && in_elements) {
1270 /* On GFX8, the descriptor contains the size in bytes,
1271 * but TXQ must return the size in elements.
1272 * The stride is always non-zero for resources using TXQ.
1273 */
1274 LLVMValueRef stride =
1275 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1276 ctx->ac.i32_1, "");
1277 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1278 LLVMConstInt(ctx->ac.i32, 16, false), "");
1279 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1280 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1281
1282 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1283 }
1284 return size;
1285 }
1286
1287 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1288 * incorrectly forces nearest filtering if the texture format is integer.
1289 * The only effect it has on Gather4, which always returns 4 texels for
1290 * bilinear filtering, is that the final coordinates are off by 0.5 of
1291 * the texel size.
1292 *
1293 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1294 * or (0.5 / size) from the normalized coordinates.
1295 *
1296 * However, cube textures with 8_8_8_8 data formats require a different
1297 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1298 * precision in 32-bit data formats, so it needs to be applied dynamically at
1299 * runtime. In this case, return an i1 value that indicates whether the
1300 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1301 */
1302 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1303 nir_variable *var,
1304 struct ac_image_args *args,
1305 const nir_tex_instr *instr)
1306 {
1307 const struct glsl_type *type = glsl_without_array(var->type);
1308 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1309 LLVMValueRef wa_8888 = NULL;
1310 LLVMValueRef half_texel[2];
1311 LLVMValueRef result;
1312
1313 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1314
1315 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1316 LLVMValueRef formats;
1317 LLVMValueRef data_format;
1318 LLVMValueRef wa_formats;
1319
1320 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1321
1322 data_format = LLVMBuildLShr(ctx->builder, formats,
1323 LLVMConstInt(ctx->i32, 20, false), "");
1324 data_format = LLVMBuildAnd(ctx->builder, data_format,
1325 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1326 wa_8888 = LLVMBuildICmp(
1327 ctx->builder, LLVMIntEQ, data_format,
1328 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1329 "");
1330
1331 uint32_t wa_num_format =
1332 stype == GLSL_TYPE_UINT ?
1333 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1334 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1335 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1336 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1337 "");
1338 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1339 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1340
1341 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1342 args->resource = LLVMBuildInsertElement(
1343 ctx->builder, args->resource, formats, ctx->i32_1, "");
1344 }
1345
1346 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1347 assert(!wa_8888);
1348 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1349 } else {
1350 struct ac_image_args resinfo = {};
1351 LLVMBasicBlockRef bbs[2];
1352
1353 LLVMValueRef unnorm = NULL;
1354 LLVMValueRef default_offset = ctx->f32_0;
1355 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1356 !instr->is_array) {
1357 /* In vulkan, whether the sampler uses unnormalized
1358 * coordinates or not is a dynamic property of the
1359 * sampler. Hence, to figure out whether or not we
1360 * need to divide by the texture size, we need to test
1361 * the sampler at runtime. This tests the bit set by
1362 * radv_init_sampler().
1363 */
1364 LLVMValueRef sampler0 =
1365 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1366 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1367 LLVMConstInt(ctx->i32, 15, false), "");
1368 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1369 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1370 default_offset = LLVMConstReal(ctx->f32, -0.5);
1371 }
1372
1373 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1374 if (wa_8888 || unnorm) {
1375 assert(!(wa_8888 && unnorm));
1376 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1377 /* Skip the texture size query entirely if we don't need it. */
1378 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1379 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1380 }
1381
1382 /* Query the texture size. */
1383 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1384 resinfo.opcode = ac_image_get_resinfo;
1385 resinfo.dmask = 0xf;
1386 resinfo.lod = ctx->i32_0;
1387 resinfo.resource = args->resource;
1388 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1389 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1390
1391 /* Compute -0.5 / size. */
1392 for (unsigned c = 0; c < 2; c++) {
1393 half_texel[c] =
1394 LLVMBuildExtractElement(ctx->builder, size,
1395 LLVMConstInt(ctx->i32, c, 0), "");
1396 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1397 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1398 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1399 LLVMConstReal(ctx->f32, -0.5), "");
1400 }
1401
1402 if (wa_8888 || unnorm) {
1403 ac_build_endif(ctx, 2000);
1404
1405 for (unsigned c = 0; c < 2; c++) {
1406 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1407 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1408 values, bbs);
1409 }
1410 }
1411 }
1412
1413 for (unsigned c = 0; c < 2; c++) {
1414 LLVMValueRef tmp;
1415 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1416 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1417 }
1418
1419 args->attributes = AC_FUNC_ATTR_READNONE;
1420 result = ac_build_image_opcode(ctx, args);
1421
1422 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1423 LLVMValueRef tmp, tmp2;
1424
1425 /* if the cube workaround is in place, f2i the result. */
1426 for (unsigned c = 0; c < 4; c++) {
1427 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1428 if (stype == GLSL_TYPE_UINT)
1429 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1430 else
1431 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1432 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1433 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1434 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1435 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1436 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1437 }
1438 }
1439 return result;
1440 }
1441
1442 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1443 {
1444 nir_deref_instr *texture_deref_instr = NULL;
1445
1446 for (unsigned i = 0; i < instr->num_srcs; i++) {
1447 switch (instr->src[i].src_type) {
1448 case nir_tex_src_texture_deref:
1449 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1450 break;
1451 default:
1452 break;
1453 }
1454 }
1455 return texture_deref_instr;
1456 }
1457
1458 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1459 const nir_tex_instr *instr,
1460 struct ac_image_args *args)
1461 {
1462 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1463 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1464
1465 assert(instr->dest.is_ssa);
1466 return ac_build_buffer_load_format(&ctx->ac,
1467 args->resource,
1468 args->coords[0],
1469 ctx->ac.i32_0,
1470 util_last_bit(mask),
1471 0, true,
1472 instr->dest.ssa.bit_size == 16);
1473 }
1474
1475 args->opcode = ac_image_sample;
1476
1477 switch (instr->op) {
1478 case nir_texop_txf:
1479 case nir_texop_txf_ms:
1480 case nir_texop_samples_identical:
1481 args->opcode = args->level_zero ||
1482 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1483 ac_image_load : ac_image_load_mip;
1484 args->level_zero = false;
1485 break;
1486 case nir_texop_txs:
1487 case nir_texop_query_levels:
1488 args->opcode = ac_image_get_resinfo;
1489 if (!args->lod)
1490 args->lod = ctx->ac.i32_0;
1491 args->level_zero = false;
1492 break;
1493 case nir_texop_tex:
1494 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1495 assert(!args->lod);
1496 args->level_zero = true;
1497 }
1498 break;
1499 case nir_texop_tg4:
1500 args->opcode = ac_image_gather4;
1501 if (!args->lod && !args->bias)
1502 args->level_zero = true;
1503 break;
1504 case nir_texop_lod:
1505 args->opcode = ac_image_get_lod;
1506 break;
1507 case nir_texop_fragment_fetch:
1508 case nir_texop_fragment_mask_fetch:
1509 args->opcode = ac_image_load;
1510 args->level_zero = false;
1511 break;
1512 default:
1513 break;
1514 }
1515
1516 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1517 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1518 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1519 const struct glsl_type *type = glsl_without_array(var->type);
1520 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1521 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1522 return lower_gather4_integer(&ctx->ac, var, args, instr);
1523 }
1524 }
1525
1526 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1527 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1528 if ((args->dim == ac_image_2darray ||
1529 args->dim == ac_image_2d) && !args->coords[1]) {
1530 args->coords[1] = ctx->ac.i32_0;
1531 }
1532 }
1533
1534 args->attributes = AC_FUNC_ATTR_READNONE;
1535 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1536 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1537 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1538 /* Prevent texture instructions with implicit derivatives from being
1539 * sinked into branches. */
1540 switch (instr->op) {
1541 case nir_texop_tex:
1542 case nir_texop_txb:
1543 case nir_texop_lod:
1544 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1545 break;
1546 default:
1547 break;
1548 }
1549 }
1550
1551 return ac_build_image_opcode(&ctx->ac, args);
1552 }
1553
1554 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1555 nir_intrinsic_instr *instr)
1556 {
1557 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1558 LLVMValueRef index = get_src(ctx, instr->src[1]);
1559
1560 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1561 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1562 return result;
1563 }
1564
1565 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1566 nir_intrinsic_instr *instr)
1567 {
1568 LLVMValueRef ptr, addr;
1569 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1570 unsigned index = nir_intrinsic_base(instr);
1571
1572 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1573 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1574
1575 /* Load constant values from user SGPRS when possible, otherwise
1576 * fallback to the default path that loads directly from memory.
1577 */
1578 if (LLVMIsConstant(src0) &&
1579 instr->dest.ssa.bit_size == 32) {
1580 unsigned count = instr->dest.ssa.num_components;
1581 unsigned offset = index;
1582
1583 offset += LLVMConstIntGetZExtValue(src0);
1584 offset /= 4;
1585
1586 offset -= ctx->args->base_inline_push_consts;
1587
1588 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1589 if (offset + count <= num_inline_push_consts) {
1590 LLVMValueRef push_constants[num_inline_push_consts];
1591 for (unsigned i = 0; i < num_inline_push_consts; i++)
1592 push_constants[i] = ac_get_arg(&ctx->ac,
1593 ctx->args->inline_push_consts[i]);
1594 return ac_build_gather_values(&ctx->ac,
1595 push_constants + offset,
1596 count);
1597 }
1598 }
1599
1600 ptr = LLVMBuildGEP(ctx->ac.builder,
1601 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1602
1603 if (instr->dest.ssa.bit_size == 8) {
1604 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1605 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1606 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1607 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1608
1609 LLVMValueRef params[3];
1610 if (load_dwords > 1) {
1611 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1612 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1613 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1614 } else {
1615 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1616 params[0] = ctx->ac.i32_0;
1617 params[1] = res;
1618 }
1619 params[2] = addr;
1620 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1621
1622 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1623 if (instr->dest.ssa.num_components > 1)
1624 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1625 return res;
1626 } else if (instr->dest.ssa.bit_size == 16) {
1627 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1628 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1629 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1630 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1631 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1632 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1633 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1634 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1635 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1636 LLVMConstInt(ctx->ac.i32, 4, false)};
1637 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1638 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1639 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1640 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1641 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1642 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1643 }
1644
1645 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1646
1647 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1648 }
1649
1650 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1651 const nir_intrinsic_instr *instr)
1652 {
1653 LLVMValueRef index = get_src(ctx, instr->src[0]);
1654
1655 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1656 }
1657
1658 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1659 {
1660 uint32_t new_mask = 0;
1661 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1662 if (mask & (1u << i))
1663 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1664 return new_mask;
1665 }
1666
1667 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1668 unsigned start, unsigned count)
1669 {
1670 LLVMValueRef mask[] = {
1671 ctx->i32_0, ctx->i32_1,
1672 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1673
1674 unsigned src_elements = ac_get_llvm_num_components(src);
1675
1676 if (count == src_elements) {
1677 assert(start == 0);
1678 return src;
1679 } else if (count == 1) {
1680 assert(start < src_elements);
1681 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1682 } else {
1683 assert(start + count <= src_elements);
1684 assert(count <= 4);
1685 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1686 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1687 }
1688 }
1689
1690 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1691 enum gl_access_qualifier access,
1692 bool may_store_unaligned,
1693 bool writeonly_memory)
1694 {
1695 unsigned cache_policy = 0;
1696
1697 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1698 * store opcodes not aligned to a dword are affected. The only way to
1699 * get unaligned stores is through shader images.
1700 */
1701 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1702 /* If this is write-only, don't keep data in L1 to prevent
1703 * evicting L1 cache lines that may be needed by other
1704 * instructions.
1705 */
1706 writeonly_memory ||
1707 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1708 cache_policy |= ac_glc;
1709 }
1710
1711 if (access & ACCESS_STREAM_CACHE_POLICY)
1712 cache_policy |= ac_slc | ac_glc;
1713
1714 return cache_policy;
1715 }
1716
1717 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1718 struct waterfall_context *wctx,
1719 const nir_intrinsic_instr *instr,
1720 nir_src src)
1721 {
1722 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1723 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1724 }
1725
1726 static void visit_store_ssbo(struct ac_nir_context *ctx,
1727 nir_intrinsic_instr *instr)
1728 {
1729 if (ctx->ac.postponed_kill) {
1730 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1731 ctx->ac.postponed_kill, "");
1732 ac_build_ifcc(&ctx->ac, cond, 7000);
1733 }
1734
1735 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1736 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1737 unsigned writemask = nir_intrinsic_write_mask(instr);
1738 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1739 bool writeonly_memory = access & ACCESS_NON_READABLE;
1740 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1741
1742 struct waterfall_context wctx;
1743 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1744
1745 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1746 LLVMValueRef base_data = src_data;
1747 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1748 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1749
1750 while (writemask) {
1751 int start, count;
1752 LLVMValueRef data, offset;
1753 LLVMTypeRef data_type;
1754
1755 u_bit_scan_consecutive_range(&writemask, &start, &count);
1756
1757 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1758 * writes into a 2-element and a 1-element write. */
1759 if (count == 3 &&
1760 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1761 writemask |= 1 << (start + 2);
1762 count = 2;
1763 }
1764 int num_bytes = count * elem_size_bytes; /* count in bytes */
1765
1766 /* we can only store 4 DWords at the same time.
1767 * can only happen for 64 Bit vectors. */
1768 if (num_bytes > 16) {
1769 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1770 count = 2;
1771 num_bytes = 16;
1772 }
1773
1774 /* check alignment of 16 Bit stores */
1775 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1776 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1777 count = 1;
1778 num_bytes = 2;
1779 }
1780
1781 /* Due to alignment issues, split stores of 8-bit/16-bit
1782 * vectors.
1783 */
1784 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1785 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1786 count = 1;
1787 num_bytes = elem_size_bytes;
1788 }
1789
1790 data = extract_vector_range(&ctx->ac, base_data, start, count);
1791
1792 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1793 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1794
1795 if (num_bytes == 1) {
1796 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1797 offset, ctx->ac.i32_0,
1798 cache_policy);
1799 } else if (num_bytes == 2) {
1800 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1801 offset, ctx->ac.i32_0,
1802 cache_policy);
1803 } else {
1804 int num_channels = num_bytes / 4;
1805
1806 switch (num_bytes) {
1807 case 16: /* v4f32 */
1808 data_type = ctx->ac.v4f32;
1809 break;
1810 case 12: /* v3f32 */
1811 data_type = ctx->ac.v3f32;
1812 break;
1813 case 8: /* v2f32 */
1814 data_type = ctx->ac.v2f32;
1815 break;
1816 case 4: /* f32 */
1817 data_type = ctx->ac.f32;
1818 break;
1819 default:
1820 unreachable("Malformed vector store.");
1821 }
1822 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1823
1824 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1825 num_channels, offset,
1826 ctx->ac.i32_0, 0,
1827 cache_policy);
1828 }
1829 }
1830
1831 exit_waterfall(ctx, &wctx, NULL);
1832
1833 if (ctx->ac.postponed_kill)
1834 ac_build_endif(&ctx->ac, 7000);
1835 }
1836
1837 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1838 LLVMValueRef descriptor,
1839 LLVMValueRef offset,
1840 LLVMValueRef compare,
1841 LLVMValueRef exchange)
1842 {
1843 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1844 if (ctx->abi->robust_buffer_access) {
1845 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1846
1847 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1848 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1849
1850 ac_build_ifcc(&ctx->ac, cond, -1);
1851
1852 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1853 }
1854
1855 LLVMValueRef ptr_parts[2] = {
1856 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1857 LLVMBuildAnd(ctx->ac.builder,
1858 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1859 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1860 };
1861
1862 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1863 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1864
1865 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1866
1867 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1868 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1869 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1870 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1871
1872 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1873 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1874
1875 if (ctx->abi->robust_buffer_access) {
1876 ac_build_endif(&ctx->ac, -1);
1877
1878 LLVMBasicBlockRef incoming_blocks[2] = {
1879 start_block,
1880 then_block,
1881 };
1882
1883 LLVMValueRef incoming_values[2] = {
1884 LLVMConstInt(ctx->ac.i64, 0, 0),
1885 result,
1886 };
1887 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1888 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1889 return ret;
1890 } else {
1891 return result;
1892 }
1893 }
1894
1895 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1896 nir_intrinsic_instr *instr)
1897 {
1898 if (ctx->ac.postponed_kill) {
1899 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1900 ctx->ac.postponed_kill, "");
1901 ac_build_ifcc(&ctx->ac, cond, 7001);
1902 }
1903
1904 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1905 const char *op;
1906 char name[64], type[8];
1907 LLVMValueRef params[6], descriptor;
1908 LLVMValueRef result;
1909 int arg_count = 0;
1910
1911 struct waterfall_context wctx;
1912 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1913
1914 switch (instr->intrinsic) {
1915 case nir_intrinsic_ssbo_atomic_add:
1916 op = "add";
1917 break;
1918 case nir_intrinsic_ssbo_atomic_imin:
1919 op = "smin";
1920 break;
1921 case nir_intrinsic_ssbo_atomic_umin:
1922 op = "umin";
1923 break;
1924 case nir_intrinsic_ssbo_atomic_imax:
1925 op = "smax";
1926 break;
1927 case nir_intrinsic_ssbo_atomic_umax:
1928 op = "umax";
1929 break;
1930 case nir_intrinsic_ssbo_atomic_and:
1931 op = "and";
1932 break;
1933 case nir_intrinsic_ssbo_atomic_or:
1934 op = "or";
1935 break;
1936 case nir_intrinsic_ssbo_atomic_xor:
1937 op = "xor";
1938 break;
1939 case nir_intrinsic_ssbo_atomic_exchange:
1940 op = "swap";
1941 break;
1942 case nir_intrinsic_ssbo_atomic_comp_swap:
1943 op = "cmpswap";
1944 break;
1945 default:
1946 abort();
1947 }
1948
1949 descriptor = ctx->abi->load_ssbo(ctx->abi,
1950 rsrc_base,
1951 true);
1952
1953 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1954 return_type == ctx->ac.i64) {
1955 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1956 get_src(ctx, instr->src[1]),
1957 get_src(ctx, instr->src[2]),
1958 get_src(ctx, instr->src[3]));
1959 } else {
1960 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1961 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1962 }
1963 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1964 params[arg_count++] = descriptor;
1965
1966 if (LLVM_VERSION_MAJOR >= 9) {
1967 /* XXX: The new raw/struct atomic intrinsics are buggy with
1968 * LLVM 8, see r358579.
1969 */
1970 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1971 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1972 params[arg_count++] = ctx->ac.i32_0; /* slc */
1973
1974 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1975 snprintf(name, sizeof(name),
1976 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1977 } else {
1978 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1979 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1980 params[arg_count++] = ctx->ac.i1false; /* slc */
1981
1982 assert(return_type == ctx->ac.i32);
1983 snprintf(name, sizeof(name),
1984 "llvm.amdgcn.buffer.atomic.%s", op);
1985 }
1986
1987 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1988 arg_count, 0);
1989 }
1990
1991 result = exit_waterfall(ctx, &wctx, result);
1992 if (ctx->ac.postponed_kill)
1993 ac_build_endif(&ctx->ac, 7001);
1994 return result;
1995 }
1996
1997 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1998 nir_intrinsic_instr *instr)
1999 {
2000 struct waterfall_context wctx;
2001 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
2002
2003 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
2004 int num_components = instr->num_components;
2005 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2006 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
2007
2008 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2009 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
2010 LLVMValueRef vindex = ctx->ac.i32_0;
2011
2012 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
2013 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
2014
2015 LLVMValueRef results[4];
2016 for (int i = 0; i < num_components;) {
2017 int num_elems = num_components - i;
2018 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
2019 num_elems = 1;
2020 if (num_elems * elem_size_bytes > 16)
2021 num_elems = 16 / elem_size_bytes;
2022 int load_bytes = num_elems * elem_size_bytes;
2023
2024 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2025
2026 LLVMValueRef ret;
2027
2028 if (load_bytes == 1) {
2029 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2030 rsrc,
2031 offset,
2032 ctx->ac.i32_0,
2033 immoffset,
2034 cache_policy);
2035 } else if (load_bytes == 2) {
2036 ret = ac_build_tbuffer_load_short(&ctx->ac,
2037 rsrc,
2038 offset,
2039 ctx->ac.i32_0,
2040 immoffset,
2041 cache_policy);
2042 } else {
2043 int num_channels = util_next_power_of_two(load_bytes) / 4;
2044 bool can_speculate = access & ACCESS_CAN_REORDER;
2045
2046 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2047 vindex, offset, immoffset, 0,
2048 cache_policy, can_speculate, false);
2049 }
2050
2051 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2052 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2053 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2054
2055 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2056 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2057
2058 for (unsigned j = 0; j < num_elems; j++) {
2059 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2060 }
2061 i += num_elems;
2062 }
2063
2064 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2065 return exit_waterfall(ctx, &wctx, ret);
2066 }
2067
2068 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2069 struct waterfall_context *wctx,
2070 const nir_intrinsic_instr *instr)
2071 {
2072 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2073 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2074 }
2075
2076 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2077 nir_intrinsic_instr *instr)
2078 {
2079 struct waterfall_context wctx;
2080 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2081
2082 LLVMValueRef ret;
2083 LLVMValueRef rsrc = rsrc_base;
2084 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2085 int num_components = instr->num_components;
2086
2087 if (ctx->abi->load_ubo)
2088 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2089
2090 if (instr->dest.ssa.bit_size == 64)
2091 num_components *= 2;
2092
2093 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2094 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2095 LLVMValueRef results[num_components];
2096 for (unsigned i = 0; i < num_components; ++i) {
2097 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2098 load_bytes * i, 0);
2099
2100 if (load_bytes == 1) {
2101 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2102 rsrc,
2103 offset,
2104 ctx->ac.i32_0,
2105 immoffset,
2106 0);
2107 } else {
2108 assert(load_bytes == 2);
2109 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2110 rsrc,
2111 offset,
2112 ctx->ac.i32_0,
2113 immoffset,
2114 0);
2115 }
2116 }
2117 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2118 } else {
2119 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2120 NULL, 0, 0, true, true);
2121
2122 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2123 }
2124
2125 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2126 get_def_type(ctx, &instr->dest.ssa), "");
2127
2128 return exit_waterfall(ctx, &wctx, ret);
2129 }
2130
2131 static void
2132 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2133 bool vs_in, unsigned *vertex_index_out,
2134 LLVMValueRef *vertex_index_ref,
2135 unsigned *const_out, LLVMValueRef *indir_out)
2136 {
2137 nir_variable *var = nir_deref_instr_get_variable(instr);
2138 nir_deref_path path;
2139 unsigned idx_lvl = 1;
2140
2141 nir_deref_path_init(&path, instr, NULL);
2142
2143 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2144 if (vertex_index_ref) {
2145 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2146 if (vertex_index_out)
2147 *vertex_index_out = 0;
2148 } else {
2149 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2150 }
2151 ++idx_lvl;
2152 }
2153
2154 uint32_t const_offset = 0;
2155 LLVMValueRef offset = NULL;
2156
2157 if (var->data.compact) {
2158 assert(instr->deref_type == nir_deref_type_array);
2159 const_offset = nir_src_as_uint(instr->arr.index);
2160 goto out;
2161 }
2162
2163 for (; path.path[idx_lvl]; ++idx_lvl) {
2164 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2165 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2166 unsigned index = path.path[idx_lvl]->strct.index;
2167
2168 for (unsigned i = 0; i < index; i++) {
2169 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2170 const_offset += glsl_count_attribute_slots(ft, vs_in);
2171 }
2172 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2173 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2174 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2175 const_offset += size *
2176 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2177 } else {
2178 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2179 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2180 if (offset)
2181 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2182 else
2183 offset = array_off;
2184 }
2185 } else
2186 unreachable("Uhandled deref type in get_deref_instr_offset");
2187 }
2188
2189 out:
2190 nir_deref_path_finish(&path);
2191
2192 if (const_offset && offset)
2193 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2194 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2195 "");
2196
2197 *const_out = const_offset;
2198 *indir_out = offset;
2199 }
2200
2201 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2202 nir_intrinsic_instr *instr,
2203 bool load_inputs)
2204 {
2205 LLVMValueRef result;
2206 LLVMValueRef vertex_index = NULL;
2207 LLVMValueRef indir_index = NULL;
2208 unsigned const_index = 0;
2209
2210 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2211
2212 unsigned location = var->data.location;
2213 unsigned driver_location = var->data.driver_location;
2214 const bool is_patch = var->data.patch ||
2215 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2216 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2217 const bool is_compact = var->data.compact;
2218
2219 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2220 false, NULL, is_patch ? NULL : &vertex_index,
2221 &const_index, &indir_index);
2222
2223 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2224
2225 LLVMTypeRef src_component_type;
2226 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2227 src_component_type = LLVMGetElementType(dest_type);
2228 else
2229 src_component_type = dest_type;
2230
2231 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2232 vertex_index, indir_index,
2233 const_index, location, driver_location,
2234 var->data.location_frac,
2235 instr->num_components,
2236 is_patch, is_compact, load_inputs);
2237 if (instr->dest.ssa.bit_size == 16) {
2238 result = ac_to_integer(&ctx->ac, result);
2239 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2240 }
2241 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2242 }
2243
2244 static unsigned
2245 type_scalar_size_bytes(const struct glsl_type *type)
2246 {
2247 assert(glsl_type_is_vector_or_scalar(type) ||
2248 glsl_type_is_matrix(type));
2249 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2250 }
2251
2252 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2253 nir_intrinsic_instr *instr)
2254 {
2255 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2256 nir_variable *var = nir_deref_instr_get_variable(deref);
2257
2258 LLVMValueRef values[8];
2259 int idx = 0;
2260 int ve = instr->dest.ssa.num_components;
2261 unsigned comp = 0;
2262 LLVMValueRef indir_index;
2263 LLVMValueRef ret;
2264 unsigned const_index;
2265 unsigned stride = 4;
2266 int mode = deref->mode;
2267
2268 if (var) {
2269 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2270 var->data.mode == nir_var_shader_in;
2271 idx = var->data.driver_location;
2272 comp = var->data.location_frac;
2273 mode = var->data.mode;
2274
2275 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2276 &const_index, &indir_index);
2277
2278 if (var->data.compact) {
2279 stride = 1;
2280 const_index += comp;
2281 comp = 0;
2282 }
2283 }
2284
2285 if (instr->dest.ssa.bit_size == 64 &&
2286 (deref->mode == nir_var_shader_in ||
2287 deref->mode == nir_var_shader_out ||
2288 deref->mode == nir_var_function_temp))
2289 ve *= 2;
2290
2291 switch (mode) {
2292 case nir_var_shader_in:
2293 /* TODO: remove this after RADV switches to lowered IO */
2294 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2295 ctx->stage == MESA_SHADER_TESS_EVAL) {
2296 return load_tess_varyings(ctx, instr, true);
2297 }
2298
2299 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2300 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2301 LLVMValueRef indir_index;
2302 unsigned const_index, vertex_index;
2303 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2304 &const_index, &indir_index);
2305 assert(indir_index == NULL);
2306
2307 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2308 var->data.driver_location,
2309 var->data.location_frac,
2310 instr->num_components, vertex_index, const_index, type);
2311 }
2312
2313 for (unsigned chan = comp; chan < ve + comp; chan++) {
2314 if (indir_index) {
2315 unsigned count = glsl_count_attribute_slots(
2316 var->type,
2317 ctx->stage == MESA_SHADER_VERTEX);
2318 count -= chan / 4;
2319 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2320 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2321 stride, false, true);
2322
2323 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2324 tmp_vec,
2325 indir_index, "");
2326 } else
2327 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2328 }
2329 break;
2330 case nir_var_function_temp:
2331 for (unsigned chan = 0; chan < ve; chan++) {
2332 if (indir_index) {
2333 unsigned count = glsl_count_attribute_slots(
2334 var->type, false);
2335 count -= chan / 4;
2336 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2337 &ctx->ac, ctx->locals + idx + chan, count,
2338 stride, true, true);
2339
2340 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2341 tmp_vec,
2342 indir_index, "");
2343 } else {
2344 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2345 }
2346 }
2347 break;
2348 case nir_var_shader_out:
2349 /* TODO: remove this after RADV switches to lowered IO */
2350 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2351 return load_tess_varyings(ctx, instr, false);
2352 }
2353
2354 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2355 var->data.fb_fetch_output &&
2356 ctx->abi->emit_fbfetch)
2357 return ctx->abi->emit_fbfetch(ctx->abi);
2358
2359 for (unsigned chan = comp; chan < ve + comp; chan++) {
2360 if (indir_index) {
2361 unsigned count = glsl_count_attribute_slots(
2362 var->type, false);
2363 count -= chan / 4;
2364 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2365 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2366 stride, true, true);
2367
2368 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2369 tmp_vec,
2370 indir_index, "");
2371 } else {
2372 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2373 ctx->abi->outputs[idx + chan + const_index * stride],
2374 "");
2375 }
2376 }
2377 break;
2378 case nir_var_mem_global: {
2379 LLVMValueRef address = get_src(ctx, instr->src[0]);
2380 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2381 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2382 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2383 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2384 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2385 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2386
2387 if (stride != natural_stride || split_loads) {
2388 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2389 result_type = LLVMGetElementType(result_type);
2390
2391 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2392 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2393 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2394
2395 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2396 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2397 values[i] = LLVMBuildLoad(ctx->ac.builder,
2398 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2399
2400 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2401 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2402 }
2403 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2404 } else {
2405 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2406 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2407 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2408 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2409
2410 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2411 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2412 return val;
2413 }
2414 }
2415 default:
2416 unreachable("unhandle variable mode");
2417 }
2418 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2419 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2420 }
2421
2422 static void
2423 visit_store_var(struct ac_nir_context *ctx,
2424 nir_intrinsic_instr *instr)
2425 {
2426 if (ctx->ac.postponed_kill) {
2427 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2428 ctx->ac.postponed_kill, "");
2429 ac_build_ifcc(&ctx->ac, cond, 7002);
2430 }
2431
2432 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2433 nir_variable *var = nir_deref_instr_get_variable(deref);
2434
2435 LLVMValueRef temp_ptr, value;
2436 int idx = 0;
2437 unsigned comp = 0;
2438 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2439 int writemask = instr->const_index[0];
2440 LLVMValueRef indir_index;
2441 unsigned const_index;
2442
2443 if (var) {
2444 get_deref_offset(ctx, deref, false,
2445 NULL, NULL, &const_index, &indir_index);
2446 idx = var->data.driver_location;
2447 comp = var->data.location_frac;
2448
2449 if (var->data.compact) {
2450 const_index += comp;
2451 comp = 0;
2452 }
2453 }
2454
2455 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2456 (deref->mode == nir_var_shader_out ||
2457 deref->mode == nir_var_function_temp)) {
2458
2459 src = LLVMBuildBitCast(ctx->ac.builder, src,
2460 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2461 "");
2462
2463 writemask = widen_mask(writemask, 2);
2464 }
2465
2466 writemask = writemask << comp;
2467
2468 switch (deref->mode) {
2469 case nir_var_shader_out:
2470 /* TODO: remove this after RADV switches to lowered IO */
2471 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2472 LLVMValueRef vertex_index = NULL;
2473 LLVMValueRef indir_index = NULL;
2474 unsigned const_index = 0;
2475 const bool is_patch = var->data.patch ||
2476 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2477 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2478
2479 get_deref_offset(ctx, deref, false, NULL,
2480 is_patch ? NULL : &vertex_index,
2481 &const_index, &indir_index);
2482
2483 ctx->abi->store_tcs_outputs(ctx->abi, var,
2484 vertex_index, indir_index,
2485 const_index, src, writemask,
2486 var->data.location_frac,
2487 var->data.driver_location);
2488 break;
2489 }
2490
2491 for (unsigned chan = 0; chan < 8; chan++) {
2492 int stride = 4;
2493 if (!(writemask & (1 << chan)))
2494 continue;
2495
2496 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2497
2498 if (var->data.compact)
2499 stride = 1;
2500 if (indir_index) {
2501 unsigned count = glsl_count_attribute_slots(
2502 var->type, false);
2503 count -= chan / 4;
2504 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2505 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2506 stride, true, true);
2507
2508 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2509 value, indir_index, "");
2510 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2511 count, stride, tmp_vec);
2512
2513 } else {
2514 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2515
2516 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2517 }
2518 }
2519 break;
2520 case nir_var_function_temp:
2521 for (unsigned chan = 0; chan < 8; chan++) {
2522 if (!(writemask & (1 << chan)))
2523 continue;
2524
2525 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2526 if (indir_index) {
2527 unsigned count = glsl_count_attribute_slots(
2528 var->type, false);
2529 count -= chan / 4;
2530 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2531 &ctx->ac, ctx->locals + idx + chan, count,
2532 4, true, true);
2533
2534 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2535 value, indir_index, "");
2536 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2537 count, 4, tmp_vec);
2538 } else {
2539 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2540
2541 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2542 }
2543 }
2544 break;
2545
2546 case nir_var_mem_global: {
2547 int writemask = instr->const_index[0];
2548 LLVMValueRef address = get_src(ctx, instr->src[0]);
2549 LLVMValueRef val = get_src(ctx, instr->src[1]);
2550
2551 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2552 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2553 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2554 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2555 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2556
2557 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2558 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2559 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2560
2561 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2562 stride == natural_stride && !split_stores) {
2563 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2564 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2565 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2566
2567 val = LLVMBuildBitCast(ctx->ac.builder, val,
2568 LLVMGetElementType(LLVMTypeOf(address)), "");
2569 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2570
2571 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2572 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2573 } else {
2574 LLVMTypeRef val_type = LLVMTypeOf(val);
2575 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2576 val_type = LLVMGetElementType(val_type);
2577
2578 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2579 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2580 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2581 for (unsigned chan = 0; chan < 4; chan++) {
2582 if (!(writemask & (1 << chan)))
2583 continue;
2584
2585 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2586
2587 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2588 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2589 chan);
2590 src = LLVMBuildBitCast(ctx->ac.builder, src,
2591 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2592 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2593
2594 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2595 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2596 }
2597 }
2598 break;
2599 }
2600 default:
2601 abort();
2602 break;
2603 }
2604
2605 if (ctx->ac.postponed_kill)
2606 ac_build_endif(&ctx->ac, 7002);
2607 }
2608
2609 static void
2610 visit_store_output(struct ac_nir_context *ctx, nir_intrinsic_instr *instr)
2611 {
2612 if (ctx->ac.postponed_kill) {
2613 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2614 ctx->ac.postponed_kill, "");
2615 ac_build_ifcc(&ctx->ac, cond, 7002);
2616 }
2617
2618 unsigned base = nir_intrinsic_base(instr);
2619 unsigned writemask = nir_intrinsic_write_mask(instr);
2620 unsigned component = nir_intrinsic_component(instr);
2621 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
2622 nir_src offset = *nir_get_io_offset_src(instr);
2623 LLVMValueRef indir_index = NULL;
2624
2625 if (nir_src_is_const(offset))
2626 assert(nir_src_as_uint(offset) == 0);
2627 else
2628 indir_index = get_src(ctx, offset);
2629
2630 switch (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src))) {
2631 case 32:
2632 break;
2633 case 64:
2634 writemask = widen_mask(writemask, 2);
2635 src = LLVMBuildBitCast(ctx->ac.builder, src,
2636 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2637 "");
2638 break;
2639 default:
2640 unreachable("unhandled store_output bit size");
2641 return;
2642 }
2643
2644 writemask <<= component;
2645
2646 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2647 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
2648 LLVMValueRef vertex_index =
2649 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
2650
2651 ctx->abi->store_tcs_outputs(ctx->abi, NULL,
2652 vertex_index, indir_index,
2653 0, src, writemask,
2654 component, base * 4);
2655 return;
2656 }
2657
2658 /* No indirect indexing is allowed after this point. */
2659 assert(!indir_index);
2660
2661 for (unsigned chan = 0; chan < 8; chan++) {
2662 if (!(writemask & (1 << chan)))
2663 continue;
2664
2665 LLVMValueRef value = ac_llvm_extract_elem(&ctx->ac, src, chan - component);
2666 LLVMBuildStore(ctx->ac.builder, value,
2667 ctx->abi->outputs[base * 4 + chan]);
2668 }
2669
2670 if (ctx->ac.postponed_kill)
2671 ac_build_endif(&ctx->ac, 7002);
2672 }
2673
2674 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2675 {
2676 switch (dim) {
2677 case GLSL_SAMPLER_DIM_BUF:
2678 return 1;
2679 case GLSL_SAMPLER_DIM_1D:
2680 return array ? 2 : 1;
2681 case GLSL_SAMPLER_DIM_2D:
2682 return array ? 3 : 2;
2683 case GLSL_SAMPLER_DIM_MS:
2684 return array ? 4 : 3;
2685 case GLSL_SAMPLER_DIM_3D:
2686 case GLSL_SAMPLER_DIM_CUBE:
2687 return 3;
2688 case GLSL_SAMPLER_DIM_RECT:
2689 case GLSL_SAMPLER_DIM_SUBPASS:
2690 return 2;
2691 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2692 return 3;
2693 default:
2694 break;
2695 }
2696 return 0;
2697 }
2698
2699 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2700 LLVMValueRef coord_x, LLVMValueRef coord_y,
2701 LLVMValueRef coord_z,
2702 LLVMValueRef sample_index,
2703 LLVMValueRef fmask_desc_ptr)
2704 {
2705 unsigned sample_chan = coord_z ? 3 : 2;
2706 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2707 addr[sample_chan] = sample_index;
2708
2709 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2710 return addr[sample_chan];
2711 }
2712
2713 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2714 {
2715 assert(instr->src[0].is_ssa);
2716 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2717 }
2718
2719 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2720 const nir_intrinsic_instr *instr,
2721 LLVMValueRef dynamic_index,
2722 enum ac_descriptor_type desc_type,
2723 bool write)
2724 {
2725 nir_deref_instr *deref_instr =
2726 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2727 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2728
2729 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2730 }
2731
2732 static void get_image_coords(struct ac_nir_context *ctx,
2733 const nir_intrinsic_instr *instr,
2734 LLVMValueRef dynamic_desc_index,
2735 struct ac_image_args *args,
2736 enum glsl_sampler_dim dim,
2737 bool is_array)
2738 {
2739 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2740 LLVMValueRef masks[] = {
2741 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2742 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2743 };
2744 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2745
2746 int count;
2747 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2748 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2749 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2750 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2751 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2752 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2753 count = image_type_to_components_count(dim, is_array);
2754
2755 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2756 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2757 LLVMValueRef fmask_load_address[3];
2758
2759 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2760 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2761 if (is_array)
2762 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2763 else
2764 fmask_load_address[2] = NULL;
2765
2766 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2767 fmask_load_address[0],
2768 fmask_load_address[1],
2769 fmask_load_address[2],
2770 sample_index,
2771 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2772 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2773 }
2774 if (count == 1 && !gfx9_1d) {
2775 if (instr->src[1].ssa->num_components)
2776 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2777 else
2778 args->coords[0] = src0;
2779 } else {
2780 int chan;
2781 if (is_ms)
2782 count--;
2783 for (chan = 0; chan < count; ++chan) {
2784 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2785 }
2786
2787 if (gfx9_1d) {
2788 if (is_array) {
2789 args->coords[2] = args->coords[1];
2790 args->coords[1] = ctx->ac.i32_0;
2791 } else
2792 args->coords[1] = ctx->ac.i32_0;
2793 count++;
2794 }
2795 if (ctx->ac.chip_class == GFX9 &&
2796 dim == GLSL_SAMPLER_DIM_2D &&
2797 !is_array) {
2798 /* The hw can't bind a slice of a 3D image as a 2D
2799 * image, because it ignores BASE_ARRAY if the target
2800 * is 3D. The workaround is to read BASE_ARRAY and set
2801 * it as the 3rd address operand for all 2D images.
2802 */
2803 LLVMValueRef first_layer, const5, mask;
2804
2805 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2806 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2807 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2808 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2809
2810 args->coords[count] = first_layer;
2811 count++;
2812 }
2813
2814
2815 if (is_ms) {
2816 args->coords[count] = sample_index;
2817 count++;
2818 }
2819 }
2820 }
2821
2822 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2823 const nir_intrinsic_instr *instr,
2824 LLVMValueRef dynamic_index,
2825 bool write, bool atomic)
2826 {
2827 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2828 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2829 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2830 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2831 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2832
2833 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2834 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2835 elem_count, stride, "");
2836
2837 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2838 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2839 }
2840 return rsrc;
2841 }
2842
2843 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2844 struct waterfall_context *wctx,
2845 const nir_intrinsic_instr *instr)
2846 {
2847 nir_deref_instr *deref_instr = NULL;
2848
2849 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2850 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2851
2852 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2853 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2854 }
2855
2856 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2857 const nir_intrinsic_instr *instr,
2858 bool bindless)
2859 {
2860 LLVMValueRef res;
2861
2862 enum glsl_sampler_dim dim;
2863 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2864 bool is_array;
2865 if (bindless) {
2866 dim = nir_intrinsic_image_dim(instr);
2867 is_array = nir_intrinsic_image_array(instr);
2868 } else {
2869 const nir_deref_instr *image_deref = get_image_deref(instr);
2870 const struct glsl_type *type = image_deref->type;
2871 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2872 dim = glsl_get_sampler_dim(type);
2873 access |= var->data.access;
2874 is_array = glsl_sampler_type_is_array(type);
2875 }
2876
2877 struct waterfall_context wctx;
2878 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2879
2880 struct ac_image_args args = {};
2881
2882 args.cache_policy = get_cache_policy(ctx, access, false, false);
2883
2884 if (dim == GLSL_SAMPLER_DIM_BUF) {
2885 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2886 unsigned num_channels = util_last_bit(mask);
2887 LLVMValueRef rsrc, vindex;
2888
2889 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2890 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2891 ctx->ac.i32_0, "");
2892
2893 assert(instr->dest.is_ssa);
2894 bool can_speculate = access & ACCESS_CAN_REORDER;
2895 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2896 ctx->ac.i32_0, num_channels,
2897 args.cache_policy,
2898 can_speculate,
2899 instr->dest.ssa.bit_size == 16);
2900 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2901
2902 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2903 res = ac_to_integer(&ctx->ac, res);
2904 } else {
2905 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2906
2907 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2908 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2909 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2910 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2911 if (!level_zero)
2912 args.lod = get_src(ctx, instr->src[3]);
2913 args.dmask = 15;
2914 args.attributes = AC_FUNC_ATTR_READONLY;
2915
2916 assert(instr->dest.is_ssa);
2917 args.d16 = instr->dest.ssa.bit_size == 16;
2918
2919 res = ac_build_image_opcode(&ctx->ac, &args);
2920 }
2921 return exit_waterfall(ctx, &wctx, res);
2922 }
2923
2924 static void visit_image_store(struct ac_nir_context *ctx,
2925 const nir_intrinsic_instr *instr,
2926 bool bindless)
2927 {
2928 if (ctx->ac.postponed_kill) {
2929 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2930 ctx->ac.postponed_kill, "");
2931 ac_build_ifcc(&ctx->ac, cond, 7003);
2932 }
2933
2934 enum glsl_sampler_dim dim;
2935 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2936 bool is_array;
2937
2938 if (bindless) {
2939 dim = nir_intrinsic_image_dim(instr);
2940 is_array = nir_intrinsic_image_array(instr);
2941 } else {
2942 const nir_deref_instr *image_deref = get_image_deref(instr);
2943 const struct glsl_type *type = image_deref->type;
2944 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2945 dim = glsl_get_sampler_dim(type);
2946 access |= var->data.access;
2947 is_array = glsl_sampler_type_is_array(type);
2948 }
2949
2950 struct waterfall_context wctx;
2951 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2952
2953 bool writeonly_memory = access & ACCESS_NON_READABLE;
2954 struct ac_image_args args = {};
2955
2956 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2957
2958 if (dim == GLSL_SAMPLER_DIM_BUF) {
2959 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2960 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2961 unsigned src_channels = ac_get_llvm_num_components(src);
2962 LLVMValueRef vindex;
2963
2964 if (src_channels == 3)
2965 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2966
2967 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2968 get_src(ctx, instr->src[1]),
2969 ctx->ac.i32_0, "");
2970
2971 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2972 ctx->ac.i32_0, args.cache_policy);
2973 } else {
2974 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2975
2976 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2977 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2978 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2979 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2980 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2981 if (!level_zero)
2982 args.lod = get_src(ctx, instr->src[4]);
2983 args.dmask = 15;
2984 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2985
2986 ac_build_image_opcode(&ctx->ac, &args);
2987 }
2988
2989 exit_waterfall(ctx, &wctx, NULL);
2990 if (ctx->ac.postponed_kill)
2991 ac_build_endif(&ctx->ac, 7003);
2992 }
2993
2994 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2995 const nir_intrinsic_instr *instr,
2996 bool bindless)
2997 {
2998 if (ctx->ac.postponed_kill) {
2999 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3000 ctx->ac.postponed_kill, "");
3001 ac_build_ifcc(&ctx->ac, cond, 7004);
3002 }
3003
3004 LLVMValueRef params[7];
3005 int param_count = 0;
3006
3007 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
3008 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
3009 const char *atomic_name;
3010 char intrinsic_name[64];
3011 enum ac_atomic_op atomic_subop;
3012 ASSERTED int length;
3013
3014 enum glsl_sampler_dim dim;
3015 bool is_array;
3016 if (bindless) {
3017 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
3018 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
3019 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
3020 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
3021 ASSERTED const GLenum format = nir_intrinsic_format(instr);
3022 assert(format == GL_R32UI || format == GL_R32I);
3023 }
3024 dim = nir_intrinsic_image_dim(instr);
3025 is_array = nir_intrinsic_image_array(instr);
3026 } else {
3027 const struct glsl_type *type = get_image_deref(instr)->type;
3028 dim = glsl_get_sampler_dim(type);
3029 is_array = glsl_sampler_type_is_array(type);
3030 }
3031
3032 struct waterfall_context wctx;
3033 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3034
3035 switch (instr->intrinsic) {
3036 case nir_intrinsic_bindless_image_atomic_add:
3037 case nir_intrinsic_image_deref_atomic_add:
3038 atomic_name = "add";
3039 atomic_subop = ac_atomic_add;
3040 break;
3041 case nir_intrinsic_bindless_image_atomic_imin:
3042 case nir_intrinsic_image_deref_atomic_imin:
3043 atomic_name = "smin";
3044 atomic_subop = ac_atomic_smin;
3045 break;
3046 case nir_intrinsic_bindless_image_atomic_umin:
3047 case nir_intrinsic_image_deref_atomic_umin:
3048 atomic_name = "umin";
3049 atomic_subop = ac_atomic_umin;
3050 break;
3051 case nir_intrinsic_bindless_image_atomic_imax:
3052 case nir_intrinsic_image_deref_atomic_imax:
3053 atomic_name = "smax";
3054 atomic_subop = ac_atomic_smax;
3055 break;
3056 case nir_intrinsic_bindless_image_atomic_umax:
3057 case nir_intrinsic_image_deref_atomic_umax:
3058 atomic_name = "umax";
3059 atomic_subop = ac_atomic_umax;
3060 break;
3061 case nir_intrinsic_bindless_image_atomic_and:
3062 case nir_intrinsic_image_deref_atomic_and:
3063 atomic_name = "and";
3064 atomic_subop = ac_atomic_and;
3065 break;
3066 case nir_intrinsic_bindless_image_atomic_or:
3067 case nir_intrinsic_image_deref_atomic_or:
3068 atomic_name = "or";
3069 atomic_subop = ac_atomic_or;
3070 break;
3071 case nir_intrinsic_bindless_image_atomic_xor:
3072 case nir_intrinsic_image_deref_atomic_xor:
3073 atomic_name = "xor";
3074 atomic_subop = ac_atomic_xor;
3075 break;
3076 case nir_intrinsic_bindless_image_atomic_exchange:
3077 case nir_intrinsic_image_deref_atomic_exchange:
3078 atomic_name = "swap";
3079 atomic_subop = ac_atomic_swap;
3080 break;
3081 case nir_intrinsic_bindless_image_atomic_comp_swap:
3082 case nir_intrinsic_image_deref_atomic_comp_swap:
3083 atomic_name = "cmpswap";
3084 atomic_subop = 0; /* not used */
3085 break;
3086 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3087 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3088 atomic_name = "inc";
3089 atomic_subop = ac_atomic_inc_wrap;
3090 break;
3091 }
3092 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3093 case nir_intrinsic_image_deref_atomic_dec_wrap:
3094 atomic_name = "dec";
3095 atomic_subop = ac_atomic_dec_wrap;
3096 break;
3097 default:
3098 abort();
3099 }
3100
3101 if (cmpswap)
3102 params[param_count++] = get_src(ctx, instr->src[4]);
3103 params[param_count++] = get_src(ctx, instr->src[3]);
3104
3105 LLVMValueRef result;
3106 if (dim == GLSL_SAMPLER_DIM_BUF) {
3107 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3108 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3109 ctx->ac.i32_0, ""); /* vindex */
3110 params[param_count++] = ctx->ac.i32_0; /* voffset */
3111 if (LLVM_VERSION_MAJOR >= 9) {
3112 /* XXX: The new raw/struct atomic intrinsics are buggy
3113 * with LLVM 8, see r358579.
3114 */
3115 params[param_count++] = ctx->ac.i32_0; /* soffset */
3116 params[param_count++] = ctx->ac.i32_0; /* slc */
3117
3118 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3119 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3120 } else {
3121 params[param_count++] = ctx->ac.i1false; /* slc */
3122
3123 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3124 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3125 }
3126
3127 assert(length < sizeof(intrinsic_name));
3128 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3129 params, param_count, 0);
3130 } else {
3131 struct ac_image_args args = {};
3132 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3133 args.atomic = atomic_subop;
3134 args.data[0] = params[0];
3135 if (cmpswap)
3136 args.data[1] = params[1];
3137 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3138 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3139 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3140
3141 result = ac_build_image_opcode(&ctx->ac, &args);
3142 }
3143
3144 result = exit_waterfall(ctx, &wctx, result);
3145 if (ctx->ac.postponed_kill)
3146 ac_build_endif(&ctx->ac, 7004);
3147 return result;
3148 }
3149
3150 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3151 nir_intrinsic_instr *instr)
3152 {
3153 struct waterfall_context wctx;
3154 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3155 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3156
3157 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3158
3159 return exit_waterfall(ctx, &wctx, ret);
3160 }
3161
3162 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3163 const nir_intrinsic_instr *instr,
3164 bool bindless)
3165 {
3166 LLVMValueRef res;
3167
3168 enum glsl_sampler_dim dim;
3169 bool is_array;
3170 if (bindless) {
3171 dim = nir_intrinsic_image_dim(instr);
3172 is_array = nir_intrinsic_image_array(instr);
3173 } else {
3174 const struct glsl_type *type = get_image_deref(instr)->type;
3175 dim = glsl_get_sampler_dim(type);
3176 is_array = glsl_sampler_type_is_array(type);
3177 }
3178
3179 struct waterfall_context wctx;
3180 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3181
3182 if (dim == GLSL_SAMPLER_DIM_BUF) {
3183 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3184 } else {
3185
3186 struct ac_image_args args = { 0 };
3187
3188 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3189 args.dmask = 0xf;
3190 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3191 args.opcode = ac_image_get_resinfo;
3192 assert(nir_src_as_uint(instr->src[1]) == 0);
3193 args.lod = ctx->ac.i32_0;
3194 args.attributes = AC_FUNC_ATTR_READNONE;
3195
3196 res = ac_build_image_opcode(&ctx->ac, &args);
3197
3198 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3199
3200 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3201 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3202 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3203 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3204 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3205 }
3206
3207 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3208 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3209 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3210 ctx->ac.i32_1, "");
3211 }
3212 }
3213 return exit_waterfall(ctx, &wctx, res);
3214 }
3215
3216 static void emit_membar(struct ac_llvm_context *ac,
3217 const nir_intrinsic_instr *instr)
3218 {
3219 unsigned wait_flags = 0;
3220
3221 switch (instr->intrinsic) {
3222 case nir_intrinsic_memory_barrier:
3223 case nir_intrinsic_group_memory_barrier:
3224 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3225 break;
3226 case nir_intrinsic_memory_barrier_buffer:
3227 case nir_intrinsic_memory_barrier_image:
3228 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3229 break;
3230 case nir_intrinsic_memory_barrier_shared:
3231 wait_flags = AC_WAIT_LGKM;
3232 break;
3233 default:
3234 break;
3235 }
3236
3237 ac_build_waitcnt(ac, wait_flags);
3238 }
3239
3240 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3241 {
3242 /* GFX6 only (thanks to a hw bug workaround):
3243 * The real barrier instruction isn’t needed, because an entire patch
3244 * always fits into a single wave.
3245 */
3246 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3247 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3248 return;
3249 }
3250 ac_build_s_barrier(ac);
3251 }
3252
3253 static void emit_discard(struct ac_nir_context *ctx,
3254 const nir_intrinsic_instr *instr)
3255 {
3256 LLVMValueRef cond;
3257
3258 if (instr->intrinsic == nir_intrinsic_discard_if) {
3259 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3260 get_src(ctx, instr->src[0]),
3261 ctx->ac.i32_0, "");
3262 } else {
3263 assert(instr->intrinsic == nir_intrinsic_discard);
3264 cond = ctx->ac.i1false;
3265 }
3266
3267 ac_build_kill_if_false(&ctx->ac, cond);
3268 }
3269
3270 static void emit_demote(struct ac_nir_context *ctx,
3271 const nir_intrinsic_instr *instr)
3272 {
3273 LLVMValueRef cond;
3274
3275 if (instr->intrinsic == nir_intrinsic_demote_if) {
3276 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3277 get_src(ctx, instr->src[0]),
3278 ctx->ac.i32_0, "");
3279 } else {
3280 assert(instr->intrinsic == nir_intrinsic_demote);
3281 cond = ctx->ac.i1false;
3282 }
3283
3284 /* Kill immediately while maintaining WQM. */
3285 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3286
3287 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3288 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3289 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3290 return;
3291 }
3292
3293 static LLVMValueRef
3294 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3295 {
3296 LLVMValueRef result;
3297 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3298 result = LLVMBuildAnd(ctx->ac.builder,
3299 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3300 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3301
3302 if (ctx->ac.wave_size == 32)
3303 result = LLVMBuildLShr(ctx->ac.builder, result,
3304 LLVMConstInt(ctx->ac.i32, 1, false), "");
3305
3306 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3307 }
3308
3309 static LLVMValueRef
3310 visit_load_subgroup_id(struct ac_nir_context *ctx)
3311 {
3312 if (ctx->stage == MESA_SHADER_COMPUTE) {
3313 LLVMValueRef result;
3314 result = LLVMBuildAnd(ctx->ac.builder,
3315 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3316 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3317 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3318 } else {
3319 return LLVMConstInt(ctx->ac.i32, 0, false);
3320 }
3321 }
3322
3323 static LLVMValueRef
3324 visit_load_num_subgroups(struct ac_nir_context *ctx)
3325 {
3326 if (ctx->stage == MESA_SHADER_COMPUTE) {
3327 return LLVMBuildAnd(ctx->ac.builder,
3328 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3329 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3330 } else {
3331 return LLVMConstInt(ctx->ac.i32, 1, false);
3332 }
3333 }
3334
3335 static LLVMValueRef
3336 visit_first_invocation(struct ac_nir_context *ctx)
3337 {
3338 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3339 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3340
3341 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3342 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3343 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3344 ctx->ac.iN_wavemask, args, 2,
3345 AC_FUNC_ATTR_NOUNWIND |
3346 AC_FUNC_ATTR_READNONE);
3347
3348 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3349 }
3350
3351 static LLVMValueRef
3352 visit_load_shared(struct ac_nir_context *ctx,
3353 const nir_intrinsic_instr *instr)
3354 {
3355 LLVMValueRef values[4], derived_ptr, index, ret;
3356
3357 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3358 instr->dest.ssa.bit_size);
3359
3360 for (int chan = 0; chan < instr->num_components; chan++) {
3361 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3362 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3363 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3364 }
3365
3366 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3367 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3368 }
3369
3370 static void
3371 visit_store_shared(struct ac_nir_context *ctx,
3372 const nir_intrinsic_instr *instr)
3373 {
3374 LLVMValueRef derived_ptr, data,index;
3375 LLVMBuilderRef builder = ctx->ac.builder;
3376
3377 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3378 instr->src[0].ssa->bit_size);
3379 LLVMValueRef src = get_src(ctx, instr->src[0]);
3380
3381 int writemask = nir_intrinsic_write_mask(instr);
3382 for (int chan = 0; chan < 4; chan++) {
3383 if (!(writemask & (1 << chan))) {
3384 continue;
3385 }
3386 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3387 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3388 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3389 LLVMBuildStore(builder, data, derived_ptr);
3390 }
3391 }
3392
3393 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3394 const nir_intrinsic_instr *instr,
3395 LLVMValueRef ptr, int src_idx)
3396 {
3397 if (ctx->ac.postponed_kill) {
3398 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3399 ctx->ac.postponed_kill, "");
3400 ac_build_ifcc(&ctx->ac, cond, 7005);
3401 }
3402
3403 LLVMValueRef result;
3404 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3405
3406 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3407
3408 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3409 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3410 if (deref->mode == nir_var_mem_global) {
3411 /* use "singlethread" sync scope to implement relaxed ordering */
3412 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3413
3414 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3415 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3416 }
3417 }
3418
3419 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3420 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3421 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3422 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3423 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3424 } else {
3425 LLVMAtomicRMWBinOp op;
3426 switch (instr->intrinsic) {
3427 case nir_intrinsic_shared_atomic_add:
3428 case nir_intrinsic_deref_atomic_add:
3429 op = LLVMAtomicRMWBinOpAdd;
3430 break;
3431 case nir_intrinsic_shared_atomic_umin:
3432 case nir_intrinsic_deref_atomic_umin:
3433 op = LLVMAtomicRMWBinOpUMin;
3434 break;
3435 case nir_intrinsic_shared_atomic_umax:
3436 case nir_intrinsic_deref_atomic_umax:
3437 op = LLVMAtomicRMWBinOpUMax;
3438 break;
3439 case nir_intrinsic_shared_atomic_imin:
3440 case nir_intrinsic_deref_atomic_imin:
3441 op = LLVMAtomicRMWBinOpMin;
3442 break;
3443 case nir_intrinsic_shared_atomic_imax:
3444 case nir_intrinsic_deref_atomic_imax:
3445 op = LLVMAtomicRMWBinOpMax;
3446 break;
3447 case nir_intrinsic_shared_atomic_and:
3448 case nir_intrinsic_deref_atomic_and:
3449 op = LLVMAtomicRMWBinOpAnd;
3450 break;
3451 case nir_intrinsic_shared_atomic_or:
3452 case nir_intrinsic_deref_atomic_or:
3453 op = LLVMAtomicRMWBinOpOr;
3454 break;
3455 case nir_intrinsic_shared_atomic_xor:
3456 case nir_intrinsic_deref_atomic_xor:
3457 op = LLVMAtomicRMWBinOpXor;
3458 break;
3459 case nir_intrinsic_shared_atomic_exchange:
3460 case nir_intrinsic_deref_atomic_exchange:
3461 op = LLVMAtomicRMWBinOpXchg;
3462 break;
3463 #if LLVM_VERSION_MAJOR >= 10
3464 case nir_intrinsic_shared_atomic_fadd:
3465 case nir_intrinsic_deref_atomic_fadd:
3466 op = LLVMAtomicRMWBinOpFAdd;
3467 break;
3468 #endif
3469 default:
3470 return NULL;
3471 }
3472
3473 LLVMValueRef val;
3474
3475 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3476 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3477 val = ac_to_float(&ctx->ac, src);
3478 } else {
3479 val = ac_to_integer(&ctx->ac, src);
3480 }
3481
3482 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3483 }
3484
3485 if (ctx->ac.postponed_kill)
3486 ac_build_endif(&ctx->ac, 7005);
3487 return result;
3488 }
3489
3490 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3491 {
3492 LLVMValueRef values[2];
3493 LLVMValueRef pos[2];
3494
3495 pos[0] = ac_to_float(&ctx->ac,
3496 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3497 pos[1] = ac_to_float(&ctx->ac,
3498 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3499
3500 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3501 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3502 return ac_build_gather_values(&ctx->ac, values, 2);
3503 }
3504
3505 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3506 enum glsl_interp_mode interp, unsigned location)
3507 {
3508 switch (interp) {
3509 case INTERP_MODE_FLAT:
3510 default:
3511 return NULL;
3512 case INTERP_MODE_SMOOTH:
3513 case INTERP_MODE_NONE:
3514 if (location == INTERP_CENTER)
3515 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3516 else if (location == INTERP_CENTROID)
3517 return ctx->abi->persp_centroid;
3518 else if (location == INTERP_SAMPLE)
3519 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3520 break;
3521 case INTERP_MODE_NOPERSPECTIVE:
3522 if (location == INTERP_CENTER)
3523 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3524 else if (location == INTERP_CENTROID)
3525 return ctx->abi->linear_centroid;
3526 else if (location == INTERP_SAMPLE)
3527 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3528 break;
3529 }
3530 return NULL;
3531 }
3532
3533 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3534 unsigned mode)
3535 {
3536 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3537 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3538 }
3539
3540 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3541 unsigned mode,
3542 LLVMValueRef offset)
3543 {
3544 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3545 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3546 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3547
3548 LLVMValueRef ij_out[2];
3549 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3550
3551 /*
3552 * take the I then J parameters, and the DDX/Y for it, and
3553 * calculate the IJ inputs for the interpolator.
3554 * temp1 = ddx * offset/sample.x + I;
3555 * interp_param.I = ddy * offset/sample.y + temp1;
3556 * temp1 = ddx * offset/sample.x + J;
3557 * interp_param.J = ddy * offset/sample.y + temp1;
3558 */
3559 for (unsigned i = 0; i < 2; i++) {
3560 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3561 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3562 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3563 ddxy_out, ix_ll, "");
3564 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3565 ddxy_out, iy_ll, "");
3566 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3567 interp_param, ix_ll, "");
3568 LLVMValueRef temp1, temp2;
3569
3570 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3571 ctx->ac.f32, "");
3572
3573 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3574 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3575
3576 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3577 temp2, ctx->ac.i32, "");
3578 }
3579 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3580 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3581 }
3582
3583 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3584 unsigned mode)
3585 {
3586 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3587 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3588 }
3589
3590 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3591 unsigned mode,
3592 LLVMValueRef sample_id)
3593 {
3594 if (ctx->abi->interp_at_sample_force_center)
3595 return barycentric_center(ctx, mode);
3596
3597 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3598
3599 /* fetch sample ID */
3600 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3601
3602 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3603 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3604 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3605 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3606 LLVMValueRef coords[] = { src_c0, src_c1 };
3607 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3608
3609 return barycentric_offset(ctx, mode, offset);
3610 }
3611
3612
3613 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3614 unsigned mode)
3615 {
3616 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3617 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3618 }
3619
3620 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3621 {
3622 return LLVMBuildBitCast(ctx->ac.builder,
3623 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3624 ctx->ac.v3i32, "");
3625 }
3626
3627 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3628 LLVMValueRef interp_param,
3629 unsigned index, unsigned comp_start,
3630 unsigned num_components,
3631 unsigned bitsize)
3632 {
3633 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3634 LLVMValueRef interp_param_f;
3635
3636 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3637 interp_param, ctx->ac.v2f32, "");
3638 LLVMValueRef i = LLVMBuildExtractElement(
3639 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3640 LLVMValueRef j = LLVMBuildExtractElement(
3641 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3642
3643 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3644 if (ctx->verified_interp &&
3645 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3646 LLVMValueRef args[2];
3647 args[0] = i;
3648 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3649 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3650 args, 2, AC_FUNC_ATTR_READNONE);
3651 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3652 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3653 }
3654
3655 LLVMValueRef values[4];
3656 assert(bitsize == 16 || bitsize == 32);
3657 for (unsigned comp = 0; comp < num_components; comp++) {
3658 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3659 if (bitsize == 16) {
3660 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3661 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3662 } else {
3663 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3664 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3665 }
3666 }
3667
3668 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3669 }
3670
3671 static LLVMValueRef visit_load(struct ac_nir_context *ctx,
3672 nir_intrinsic_instr *instr, bool is_output)
3673 {
3674 LLVMValueRef values[8];
3675 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
3676 LLVMTypeRef component_type;
3677 unsigned base = nir_intrinsic_base(instr);
3678 unsigned component = nir_intrinsic_component(instr);
3679 unsigned count = instr->dest.ssa.num_components *
3680 (instr->dest.ssa.bit_size == 64 ? 2 : 1);
3681 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
3682 LLVMValueRef vertex_index =
3683 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
3684 nir_src offset = *nir_get_io_offset_src(instr);
3685 LLVMValueRef indir_index = NULL;
3686
3687 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
3688 component_type = LLVMGetElementType(dest_type);
3689 else
3690 component_type = dest_type;
3691
3692 if (nir_src_is_const(offset))
3693 assert(nir_src_as_uint(offset) == 0);
3694 else
3695 indir_index = get_src(ctx, offset);
3696
3697 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
3698 (ctx->stage == MESA_SHADER_TESS_EVAL && !is_output)) {
3699 LLVMValueRef result =
3700 ctx->abi->load_tess_varyings(ctx->abi, component_type,
3701 vertex_index, indir_index,
3702 0, 0, base * 4,
3703 component,
3704 instr->num_components,
3705 false, false, !is_output);
3706 if (instr->dest.ssa.bit_size == 16) {
3707 result = ac_to_integer(&ctx->ac, result);
3708 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
3709 }
3710 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3711 }
3712
3713 /* No indirect indexing is allowed after this point. */
3714 assert(!indir_index);
3715
3716 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3717 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3718 assert(nir_src_is_const(*vertex_index_src));
3719
3720 return ctx->abi->load_inputs(ctx->abi, 0, base * 4, component,
3721 instr->num_components,
3722 nir_src_as_uint(*vertex_index_src),
3723 0, type);
3724 }
3725
3726 if (ctx->stage == MESA_SHADER_FRAGMENT && is_output &&
3727 nir_intrinsic_io_semantics(instr).fb_fetch_output)
3728 return ctx->abi->emit_fbfetch(ctx->abi);
3729
3730 /* Other non-fragment cases have inputs and outputs in temporaries. */
3731 if (ctx->stage != MESA_SHADER_FRAGMENT) {
3732 for (unsigned chan = component; chan < count + component; chan++) {
3733 if (is_output) {
3734 values[chan] = LLVMBuildLoad(ctx->ac.builder,
3735 ctx->abi->outputs[base * 4 + chan], "");
3736 } else {
3737 values[chan] = ctx->abi->inputs[base * 4 + chan];
3738 if (!values[chan])
3739 values[chan] = LLVMGetUndef(ctx->ac.i32);
3740 }
3741 }
3742 LLVMValueRef result = ac_build_varying_gather_values(&ctx->ac, values, count, component);
3743 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3744 }
3745
3746 /* Fragment shader inputs. */
3747 unsigned vertex_id = 2; /* P0 */
3748
3749 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3750 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3751
3752 switch (src0[0].i32) {
3753 case 0:
3754 vertex_id = 2;
3755 break;
3756 case 1:
3757 vertex_id = 0;
3758 break;
3759 case 2:
3760 vertex_id = 1;
3761 break;
3762 default:
3763 unreachable("Invalid vertex index");
3764 }
3765 }
3766
3767 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, base, false);
3768
3769 for (unsigned chan = 0; chan < count; chan++) {
3770 if (component + chan > 4)
3771 attr_number = LLVMConstInt(ctx->ac.i32, base + 1, false);
3772 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3773 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3774 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3775 llvm_chan,
3776 attr_number,
3777 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3778 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3779 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3780 instr->dest.ssa.bit_size == 16 ? ctx->ac.i16
3781 : ctx->ac.i32, "");
3782 }
3783
3784 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, count);
3785 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3786 }
3787
3788 static void visit_intrinsic(struct ac_nir_context *ctx,
3789 nir_intrinsic_instr *instr)
3790 {
3791 LLVMValueRef result = NULL;
3792
3793 switch (instr->intrinsic) {
3794 case nir_intrinsic_ballot:
3795 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3796 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3797 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3798 break;
3799 case nir_intrinsic_read_invocation:
3800 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3801 get_src(ctx, instr->src[1]));
3802 break;
3803 case nir_intrinsic_read_first_invocation:
3804 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3805 break;
3806 case nir_intrinsic_load_subgroup_invocation:
3807 result = ac_get_thread_id(&ctx->ac);
3808 break;
3809 case nir_intrinsic_load_work_group_id: {
3810 LLVMValueRef values[3];
3811
3812 for (int i = 0; i < 3; i++) {
3813 values[i] = ctx->args->workgroup_ids[i].used ?
3814 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3815 }
3816
3817 result = ac_build_gather_values(&ctx->ac, values, 3);
3818 break;
3819 }
3820 case nir_intrinsic_load_base_vertex:
3821 case nir_intrinsic_load_first_vertex:
3822 result = ctx->abi->load_base_vertex(ctx->abi);
3823 break;
3824 case nir_intrinsic_load_local_group_size:
3825 result = ctx->abi->load_local_group_size(ctx->abi);
3826 break;
3827 case nir_intrinsic_load_vertex_id:
3828 result = LLVMBuildAdd(ctx->ac.builder,
3829 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3830 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3831 break;
3832 case nir_intrinsic_load_vertex_id_zero_base: {
3833 result = ctx->abi->vertex_id;
3834 break;
3835 }
3836 case nir_intrinsic_load_local_invocation_id: {
3837 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3838 break;
3839 }
3840 case nir_intrinsic_load_base_instance:
3841 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3842 break;
3843 case nir_intrinsic_load_draw_id:
3844 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3845 break;
3846 case nir_intrinsic_load_view_index:
3847 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3848 break;
3849 case nir_intrinsic_load_invocation_id:
3850 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3851 result = ac_unpack_param(&ctx->ac,
3852 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3853 8, 5);
3854 } else {
3855 if (ctx->ac.chip_class >= GFX10) {
3856 result = LLVMBuildAnd(ctx->ac.builder,
3857 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3858 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3859 } else {
3860 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3861 }
3862 }
3863 break;
3864 case nir_intrinsic_load_primitive_id:
3865 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3866 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3867 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3868 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3869 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3870 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3871 } else
3872 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3873 break;
3874 case nir_intrinsic_load_sample_id:
3875 result = ac_unpack_param(&ctx->ac,
3876 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3877 8, 4);
3878 break;
3879 case nir_intrinsic_load_sample_pos:
3880 result = load_sample_pos(ctx);
3881 break;
3882 case nir_intrinsic_load_sample_mask_in:
3883 result = ctx->abi->load_sample_mask_in(ctx->abi);
3884 break;
3885 case nir_intrinsic_load_frag_coord: {
3886 LLVMValueRef values[4] = {
3887 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3888 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3889 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3890 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3891 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3892 };
3893 result = ac_to_integer(&ctx->ac,
3894 ac_build_gather_values(&ctx->ac, values, 4));
3895 break;
3896 }
3897 case nir_intrinsic_load_layer_id:
3898 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3899 break;
3900 case nir_intrinsic_load_front_face:
3901 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3902 break;
3903 case nir_intrinsic_load_helper_invocation:
3904 result = ac_build_load_helper_invocation(&ctx->ac);
3905 break;
3906 case nir_intrinsic_is_helper_invocation:
3907 result = ac_build_is_helper_invocation(&ctx->ac);
3908 break;
3909 case nir_intrinsic_load_color0:
3910 result = ctx->abi->color0;
3911 break;
3912 case nir_intrinsic_load_color1:
3913 result = ctx->abi->color1;
3914 break;
3915 case nir_intrinsic_load_user_data_amd:
3916 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3917 result = ctx->abi->user_data;
3918 break;
3919 case nir_intrinsic_load_instance_id:
3920 result = ctx->abi->instance_id;
3921 break;
3922 case nir_intrinsic_load_num_work_groups:
3923 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3924 break;
3925 case nir_intrinsic_load_local_invocation_index:
3926 result = visit_load_local_invocation_index(ctx);
3927 break;
3928 case nir_intrinsic_load_subgroup_id:
3929 result = visit_load_subgroup_id(ctx);
3930 break;
3931 case nir_intrinsic_load_num_subgroups:
3932 result = visit_load_num_subgroups(ctx);
3933 break;
3934 case nir_intrinsic_first_invocation:
3935 result = visit_first_invocation(ctx);
3936 break;
3937 case nir_intrinsic_load_push_constant:
3938 result = visit_load_push_constant(ctx, instr);
3939 break;
3940 case nir_intrinsic_vulkan_resource_index: {
3941 LLVMValueRef index = get_src(ctx, instr->src[0]);
3942 unsigned desc_set = nir_intrinsic_desc_set(instr);
3943 unsigned binding = nir_intrinsic_binding(instr);
3944
3945 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3946 binding);
3947 break;
3948 }
3949 case nir_intrinsic_vulkan_resource_reindex:
3950 result = visit_vulkan_resource_reindex(ctx, instr);
3951 break;
3952 case nir_intrinsic_store_ssbo:
3953 visit_store_ssbo(ctx, instr);
3954 break;
3955 case nir_intrinsic_load_ssbo:
3956 result = visit_load_buffer(ctx, instr);
3957 break;
3958 case nir_intrinsic_ssbo_atomic_add:
3959 case nir_intrinsic_ssbo_atomic_imin:
3960 case nir_intrinsic_ssbo_atomic_umin:
3961 case nir_intrinsic_ssbo_atomic_imax:
3962 case nir_intrinsic_ssbo_atomic_umax:
3963 case nir_intrinsic_ssbo_atomic_and:
3964 case nir_intrinsic_ssbo_atomic_or:
3965 case nir_intrinsic_ssbo_atomic_xor:
3966 case nir_intrinsic_ssbo_atomic_exchange:
3967 case nir_intrinsic_ssbo_atomic_comp_swap:
3968 result = visit_atomic_ssbo(ctx, instr);
3969 break;
3970 case nir_intrinsic_load_ubo:
3971 result = visit_load_ubo_buffer(ctx, instr);
3972 break;
3973 case nir_intrinsic_get_buffer_size:
3974 result = visit_get_buffer_size(ctx, instr);
3975 break;
3976 case nir_intrinsic_load_deref:
3977 result = visit_load_var(ctx, instr);
3978 break;
3979 case nir_intrinsic_store_deref:
3980 visit_store_var(ctx, instr);
3981 break;
3982 case nir_intrinsic_load_input:
3983 case nir_intrinsic_load_input_vertex:
3984 case nir_intrinsic_load_per_vertex_input:
3985 result = visit_load(ctx, instr, false);
3986 break;
3987 case nir_intrinsic_load_output:
3988 case nir_intrinsic_load_per_vertex_output:
3989 result = visit_load(ctx, instr, true);
3990 break;
3991 case nir_intrinsic_store_output:
3992 case nir_intrinsic_store_per_vertex_output:
3993 visit_store_output(ctx, instr);
3994 break;
3995 case nir_intrinsic_load_shared:
3996 result = visit_load_shared(ctx, instr);
3997 break;
3998 case nir_intrinsic_store_shared:
3999 visit_store_shared(ctx, instr);
4000 break;
4001 case nir_intrinsic_bindless_image_samples:
4002 case nir_intrinsic_image_deref_samples:
4003 result = visit_image_samples(ctx, instr);
4004 break;
4005 case nir_intrinsic_bindless_image_load:
4006 result = visit_image_load(ctx, instr, true);
4007 break;
4008 case nir_intrinsic_image_deref_load:
4009 result = visit_image_load(ctx, instr, false);
4010 break;
4011 case nir_intrinsic_bindless_image_store:
4012 visit_image_store(ctx, instr, true);
4013 break;
4014 case nir_intrinsic_image_deref_store:
4015 visit_image_store(ctx, instr, false);
4016 break;
4017 case nir_intrinsic_bindless_image_atomic_add:
4018 case nir_intrinsic_bindless_image_atomic_imin:
4019 case nir_intrinsic_bindless_image_atomic_umin:
4020 case nir_intrinsic_bindless_image_atomic_imax:
4021 case nir_intrinsic_bindless_image_atomic_umax:
4022 case nir_intrinsic_bindless_image_atomic_and:
4023 case nir_intrinsic_bindless_image_atomic_or:
4024 case nir_intrinsic_bindless_image_atomic_xor:
4025 case nir_intrinsic_bindless_image_atomic_exchange:
4026 case nir_intrinsic_bindless_image_atomic_comp_swap:
4027 case nir_intrinsic_bindless_image_atomic_inc_wrap:
4028 case nir_intrinsic_bindless_image_atomic_dec_wrap:
4029 result = visit_image_atomic(ctx, instr, true);
4030 break;
4031 case nir_intrinsic_image_deref_atomic_add:
4032 case nir_intrinsic_image_deref_atomic_imin:
4033 case nir_intrinsic_image_deref_atomic_umin:
4034 case nir_intrinsic_image_deref_atomic_imax:
4035 case nir_intrinsic_image_deref_atomic_umax:
4036 case nir_intrinsic_image_deref_atomic_and:
4037 case nir_intrinsic_image_deref_atomic_or:
4038 case nir_intrinsic_image_deref_atomic_xor:
4039 case nir_intrinsic_image_deref_atomic_exchange:
4040 case nir_intrinsic_image_deref_atomic_comp_swap:
4041 case nir_intrinsic_image_deref_atomic_inc_wrap:
4042 case nir_intrinsic_image_deref_atomic_dec_wrap:
4043 result = visit_image_atomic(ctx, instr, false);
4044 break;
4045 case nir_intrinsic_bindless_image_size:
4046 result = visit_image_size(ctx, instr, true);
4047 break;
4048 case nir_intrinsic_image_deref_size:
4049 result = visit_image_size(ctx, instr, false);
4050 break;
4051 case nir_intrinsic_shader_clock:
4052 result = ac_build_shader_clock(&ctx->ac,
4053 nir_intrinsic_memory_scope(instr));
4054 break;
4055 case nir_intrinsic_discard:
4056 case nir_intrinsic_discard_if:
4057 emit_discard(ctx, instr);
4058 break;
4059 case nir_intrinsic_demote:
4060 case nir_intrinsic_demote_if:
4061 emit_demote(ctx, instr);
4062 break;
4063 case nir_intrinsic_memory_barrier:
4064 case nir_intrinsic_group_memory_barrier:
4065 case nir_intrinsic_memory_barrier_buffer:
4066 case nir_intrinsic_memory_barrier_image:
4067 case nir_intrinsic_memory_barrier_shared:
4068 emit_membar(&ctx->ac, instr);
4069 break;
4070 case nir_intrinsic_scoped_barrier: {
4071 assert(!(nir_intrinsic_memory_semantics(instr) &
4072 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
4073
4074 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
4075
4076 unsigned wait_flags = 0;
4077 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
4078 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
4079 if (modes & nir_var_mem_shared)
4080 wait_flags |= AC_WAIT_LGKM;
4081
4082 if (wait_flags)
4083 ac_build_waitcnt(&ctx->ac, wait_flags);
4084
4085 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
4086 ac_emit_barrier(&ctx->ac, ctx->stage);
4087 break;
4088 }
4089 case nir_intrinsic_memory_barrier_tcs_patch:
4090 break;
4091 case nir_intrinsic_control_barrier:
4092 ac_emit_barrier(&ctx->ac, ctx->stage);
4093 break;
4094 case nir_intrinsic_shared_atomic_add:
4095 case nir_intrinsic_shared_atomic_imin:
4096 case nir_intrinsic_shared_atomic_umin:
4097 case nir_intrinsic_shared_atomic_imax:
4098 case nir_intrinsic_shared_atomic_umax:
4099 case nir_intrinsic_shared_atomic_and:
4100 case nir_intrinsic_shared_atomic_or:
4101 case nir_intrinsic_shared_atomic_xor:
4102 case nir_intrinsic_shared_atomic_exchange:
4103 case nir_intrinsic_shared_atomic_comp_swap:
4104 case nir_intrinsic_shared_atomic_fadd: {
4105 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
4106 instr->src[1].ssa->bit_size);
4107 result = visit_var_atomic(ctx, instr, ptr, 1);
4108 break;
4109 }
4110 case nir_intrinsic_deref_atomic_add:
4111 case nir_intrinsic_deref_atomic_imin:
4112 case nir_intrinsic_deref_atomic_umin:
4113 case nir_intrinsic_deref_atomic_imax:
4114 case nir_intrinsic_deref_atomic_umax:
4115 case nir_intrinsic_deref_atomic_and:
4116 case nir_intrinsic_deref_atomic_or:
4117 case nir_intrinsic_deref_atomic_xor:
4118 case nir_intrinsic_deref_atomic_exchange:
4119 case nir_intrinsic_deref_atomic_comp_swap:
4120 case nir_intrinsic_deref_atomic_fadd: {
4121 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
4122 result = visit_var_atomic(ctx, instr, ptr, 1);
4123 break;
4124 }
4125 case nir_intrinsic_load_barycentric_pixel:
4126 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
4127 break;
4128 case nir_intrinsic_load_barycentric_centroid:
4129 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
4130 break;
4131 case nir_intrinsic_load_barycentric_sample:
4132 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
4133 break;
4134 case nir_intrinsic_load_barycentric_model:
4135 result = barycentric_model(ctx);
4136 break;
4137 case nir_intrinsic_load_barycentric_at_offset: {
4138 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
4139 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
4140 break;
4141 }
4142 case nir_intrinsic_load_barycentric_at_sample: {
4143 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
4144 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
4145 break;
4146 }
4147 case nir_intrinsic_load_interpolated_input: {
4148 /* We assume any indirect loads have been lowered away */
4149 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
4150 assert(offset);
4151 assert(offset[0].i32 == 0);
4152
4153 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
4154 unsigned index = nir_intrinsic_base(instr);
4155 unsigned component = nir_intrinsic_component(instr);
4156 result = load_interpolated_input(ctx, interp_param, index,
4157 component,
4158 instr->dest.ssa.num_components,
4159 instr->dest.ssa.bit_size);
4160 break;
4161 }
4162 case nir_intrinsic_emit_vertex:
4163 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4164 break;
4165 case nir_intrinsic_emit_vertex_with_counter: {
4166 unsigned stream = nir_intrinsic_stream_id(instr);
4167 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4168 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4169 next_vertex,
4170 ctx->abi->outputs);
4171 break;
4172 }
4173 case nir_intrinsic_end_primitive:
4174 case nir_intrinsic_end_primitive_with_counter:
4175 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4176 break;
4177 case nir_intrinsic_load_tess_coord:
4178 result = ctx->abi->load_tess_coord(ctx->abi);
4179 break;
4180 case nir_intrinsic_load_tess_level_outer:
4181 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4182 break;
4183 case nir_intrinsic_load_tess_level_inner:
4184 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4185 break;
4186 case nir_intrinsic_load_tess_level_outer_default:
4187 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4188 break;
4189 case nir_intrinsic_load_tess_level_inner_default:
4190 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4191 break;
4192 case nir_intrinsic_load_patch_vertices_in:
4193 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4194 break;
4195 case nir_intrinsic_vote_all: {
4196 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4197 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4198 break;
4199 }
4200 case nir_intrinsic_vote_any: {
4201 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4202 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4203 break;
4204 }
4205 case nir_intrinsic_shuffle:
4206 if (ctx->ac.chip_class == GFX8 ||
4207 ctx->ac.chip_class == GFX9 ||
4208 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4209 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4210 get_src(ctx, instr->src[1]));
4211 } else {
4212 LLVMValueRef src = get_src(ctx, instr->src[0]);
4213 LLVMValueRef index = get_src(ctx, instr->src[1]);
4214 LLVMTypeRef type = LLVMTypeOf(src);
4215 struct waterfall_context wctx;
4216 LLVMValueRef index_val;
4217
4218 index_val = enter_waterfall(ctx, &wctx, index, true);
4219
4220 src = LLVMBuildZExt(ctx->ac.builder, src,
4221 ctx->ac.i32, "");
4222
4223 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4224 ctx->ac.i32,
4225 (LLVMValueRef []) { src, index_val }, 2,
4226 AC_FUNC_ATTR_READNONE |
4227 AC_FUNC_ATTR_CONVERGENT);
4228
4229 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4230
4231 result = exit_waterfall(ctx, &wctx, result);
4232 }
4233 break;
4234 case nir_intrinsic_reduce:
4235 result = ac_build_reduce(&ctx->ac,
4236 get_src(ctx, instr->src[0]),
4237 instr->const_index[0],
4238 instr->const_index[1]);
4239 break;
4240 case nir_intrinsic_inclusive_scan:
4241 result = ac_build_inclusive_scan(&ctx->ac,
4242 get_src(ctx, instr->src[0]),
4243 instr->const_index[0]);
4244 break;
4245 case nir_intrinsic_exclusive_scan:
4246 result = ac_build_exclusive_scan(&ctx->ac,
4247 get_src(ctx, instr->src[0]),
4248 instr->const_index[0]);
4249 break;
4250 case nir_intrinsic_quad_broadcast: {
4251 unsigned lane = nir_src_as_uint(instr->src[1]);
4252 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4253 lane, lane, lane, lane);
4254 break;
4255 }
4256 case nir_intrinsic_quad_swap_horizontal:
4257 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4258 break;
4259 case nir_intrinsic_quad_swap_vertical:
4260 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4261 break;
4262 case nir_intrinsic_quad_swap_diagonal:
4263 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4264 break;
4265 case nir_intrinsic_quad_swizzle_amd: {
4266 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4267 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4268 mask & 0x3, (mask >> 2) & 0x3,
4269 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4270 break;
4271 }
4272 case nir_intrinsic_masked_swizzle_amd: {
4273 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4274 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4275 break;
4276 }
4277 case nir_intrinsic_write_invocation_amd:
4278 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4279 get_src(ctx, instr->src[1]),
4280 get_src(ctx, instr->src[2]));
4281 break;
4282 case nir_intrinsic_mbcnt_amd:
4283 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4284 break;
4285 case nir_intrinsic_load_scratch: {
4286 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4287 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4288 offset);
4289 LLVMTypeRef comp_type =
4290 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4291 LLVMTypeRef vec_type =
4292 instr->dest.ssa.num_components == 1 ? comp_type :
4293 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4294 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4295 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4296 LLVMPointerType(vec_type, addr_space), "");
4297 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4298 break;
4299 }
4300 case nir_intrinsic_store_scratch: {
4301 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4302 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4303 offset);
4304 LLVMTypeRef comp_type =
4305 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4306 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4307 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4308 LLVMPointerType(comp_type, addr_space), "");
4309 LLVMValueRef src = get_src(ctx, instr->src[0]);
4310 unsigned wrmask = nir_intrinsic_write_mask(instr);
4311 while (wrmask) {
4312 int start, count;
4313 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4314
4315 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4316 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4317 LLVMTypeRef vec_type =
4318 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4319 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4320 offset_ptr,
4321 LLVMPointerType(vec_type, addr_space),
4322 "");
4323 LLVMValueRef offset_src =
4324 ac_extract_components(&ctx->ac, src, start, count);
4325 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4326 }
4327 break;
4328 }
4329 case nir_intrinsic_load_constant: {
4330 unsigned base = nir_intrinsic_base(instr);
4331 unsigned range = nir_intrinsic_range(instr);
4332
4333 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4334 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4335 LLVMConstInt(ctx->ac.i32, base, false), "");
4336
4337 /* Clamp the offset to avoid out-of-bound access because global
4338 * instructions can't handle them.
4339 */
4340 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4341 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4342 offset, size, "");
4343 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4344
4345 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4346 offset);
4347 LLVMTypeRef comp_type =
4348 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4349 LLVMTypeRef vec_type =
4350 instr->dest.ssa.num_components == 1 ? comp_type :
4351 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4352 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4353 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4354 LLVMPointerType(vec_type, addr_space), "");
4355 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4356 break;
4357 }
4358 default:
4359 fprintf(stderr, "Unknown intrinsic: ");
4360 nir_print_instr(&instr->instr, stderr);
4361 fprintf(stderr, "\n");
4362 break;
4363 }
4364 if (result) {
4365 ctx->ssa_defs[instr->dest.ssa.index] = result;
4366 }
4367 }
4368
4369 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4370 unsigned base_index,
4371 unsigned constant_index,
4372 LLVMValueRef dynamic_index)
4373 {
4374 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4375 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4376 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4377
4378 /* Bindless uniforms are 64bit so multiple index by 8 */
4379 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4380 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4381
4382 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4383
4384 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4385 NULL, 0, 0, true, true);
4386
4387 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4388 }
4389
4390 struct sampler_desc_address {
4391 unsigned descriptor_set;
4392 unsigned base_index; /* binding in vulkan */
4393 unsigned constant_index;
4394 LLVMValueRef dynamic_index;
4395 bool image;
4396 bool bindless;
4397 };
4398
4399 static struct sampler_desc_address
4400 get_sampler_desc_internal(struct ac_nir_context *ctx,
4401 nir_deref_instr *deref_instr,
4402 const nir_instr *instr,
4403 bool image)
4404 {
4405 LLVMValueRef index = NULL;
4406 unsigned constant_index = 0;
4407 unsigned descriptor_set;
4408 unsigned base_index;
4409 bool bindless = false;
4410
4411 if (!deref_instr) {
4412 descriptor_set = 0;
4413 if (image) {
4414 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4415 base_index = 0;
4416 bindless = true;
4417 index = get_src(ctx, img_instr->src[0]);
4418 } else {
4419 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4420 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4421 nir_tex_src_sampler_handle);
4422 if (sampSrcIdx != -1) {
4423 base_index = 0;
4424 bindless = true;
4425 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4426 } else {
4427 assert(tex_instr && !image);
4428 base_index = tex_instr->sampler_index;
4429 }
4430 }
4431 } else {
4432 while(deref_instr->deref_type != nir_deref_type_var) {
4433 if (deref_instr->deref_type == nir_deref_type_array) {
4434 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4435 if (!array_size)
4436 array_size = 1;
4437
4438 if (nir_src_is_const(deref_instr->arr.index)) {
4439 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4440 } else {
4441 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4442
4443 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4444 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4445
4446 if (!index)
4447 index = indirect;
4448 else
4449 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4450 }
4451
4452 deref_instr = nir_src_as_deref(deref_instr->parent);
4453 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4454 unsigned sidx = deref_instr->strct.index;
4455 deref_instr = nir_src_as_deref(deref_instr->parent);
4456 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4457 } else {
4458 unreachable("Unsupported deref type");
4459 }
4460 }
4461 descriptor_set = deref_instr->var->data.descriptor_set;
4462
4463 if (deref_instr->var->data.bindless) {
4464 /* For now just assert on unhandled variable types */
4465 assert(deref_instr->var->data.mode == nir_var_uniform);
4466
4467 base_index = deref_instr->var->data.driver_location;
4468 bindless = true;
4469
4470 index = index ? index : ctx->ac.i32_0;
4471 index = get_bindless_index_from_uniform(ctx, base_index,
4472 constant_index, index);
4473 } else
4474 base_index = deref_instr->var->data.binding;
4475 }
4476 return (struct sampler_desc_address) {
4477 .descriptor_set = descriptor_set,
4478 .base_index = base_index,
4479 .constant_index = constant_index,
4480 .dynamic_index = index,
4481 .image = image,
4482 .bindless = bindless,
4483 };
4484 }
4485
4486 /* Extract any possibly divergent index into a separate value that can be fed
4487 * into get_sampler_desc with the same arguments. */
4488 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4489 nir_deref_instr *deref_instr,
4490 const nir_instr *instr,
4491 bool image)
4492 {
4493 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4494 return addr.dynamic_index;
4495 }
4496
4497 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4498 nir_deref_instr *deref_instr,
4499 enum ac_descriptor_type desc_type,
4500 const nir_instr *instr,
4501 LLVMValueRef index,
4502 bool image, bool write)
4503 {
4504 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4505 return ctx->abi->load_sampler_desc(ctx->abi,
4506 addr.descriptor_set,
4507 addr.base_index,
4508 addr.constant_index, index,
4509 desc_type, addr.image, write, addr.bindless);
4510 }
4511
4512 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4513 *
4514 * GFX6-GFX7:
4515 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4516 * filtering manually. The driver sets img7 to a mask clearing
4517 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4518 * s_and_b32 samp0, samp0, img7
4519 *
4520 * GFX8:
4521 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4522 */
4523 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4524 LLVMValueRef res, LLVMValueRef samp)
4525 {
4526 LLVMBuilderRef builder = ctx->ac.builder;
4527 LLVMValueRef img7, samp0;
4528
4529 if (ctx->ac.chip_class >= GFX8)
4530 return samp;
4531
4532 img7 = LLVMBuildExtractElement(builder, res,
4533 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4534 samp0 = LLVMBuildExtractElement(builder, samp,
4535 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4536 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4537 return LLVMBuildInsertElement(builder, samp, samp0,
4538 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4539 }
4540
4541 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4542 nir_tex_instr *instr,
4543 struct waterfall_context *wctx,
4544 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4545 LLVMValueRef *fmask_ptr)
4546 {
4547 nir_deref_instr *texture_deref_instr = NULL;
4548 nir_deref_instr *sampler_deref_instr = NULL;
4549 int plane = -1;
4550
4551 for (unsigned i = 0; i < instr->num_srcs; i++) {
4552 switch (instr->src[i].src_type) {
4553 case nir_tex_src_texture_deref:
4554 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4555 break;
4556 case nir_tex_src_sampler_deref:
4557 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4558 break;
4559 case nir_tex_src_plane:
4560 plane = nir_src_as_int(instr->src[i].src);
4561 break;
4562 default:
4563 break;
4564 }
4565 }
4566
4567 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4568 &instr->instr, false);
4569 if (!sampler_deref_instr)
4570 sampler_deref_instr = texture_deref_instr;
4571
4572 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4573 &instr->instr, false);
4574 if (instr->texture_non_uniform)
4575 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4576
4577 if (instr->sampler_non_uniform)
4578 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4579
4580 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4581
4582 if (plane >= 0) {
4583 assert(instr->op != nir_texop_txf_ms &&
4584 instr->op != nir_texop_samples_identical);
4585 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4586
4587 main_descriptor = AC_DESC_PLANE_0 + plane;
4588 }
4589
4590 if (instr->op == nir_texop_fragment_mask_fetch) {
4591 /* The fragment mask is fetched from the compressed
4592 * multisampled surface.
4593 */
4594 main_descriptor = AC_DESC_FMASK;
4595 }
4596
4597 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4598 texture_dynamic_index, false, false);
4599
4600 if (samp_ptr) {
4601 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4602 sampler_dynamic_index, false, false);
4603 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4604 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4605 }
4606 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4607 instr->op == nir_texop_samples_identical))
4608 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4609 &instr->instr, texture_dynamic_index, false, false);
4610 }
4611
4612 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4613 LLVMValueRef coord)
4614 {
4615 coord = ac_to_float(ctx, coord);
4616 coord = ac_build_round(ctx, coord);
4617 coord = ac_to_integer(ctx, coord);
4618 return coord;
4619 }
4620
4621 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4622 {
4623 LLVMValueRef result = NULL;
4624 struct ac_image_args args = { 0 };
4625 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4626 LLVMValueRef ddx = NULL, ddy = NULL;
4627 unsigned offset_src = 0;
4628 struct waterfall_context wctx[2] = {{{0}}};
4629
4630 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4631
4632 for (unsigned i = 0; i < instr->num_srcs; i++) {
4633 switch (instr->src[i].src_type) {
4634 case nir_tex_src_coord: {
4635 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4636 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4637 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4638 break;
4639 }
4640 case nir_tex_src_projector:
4641 break;
4642 case nir_tex_src_comparator:
4643 if (instr->is_shadow) {
4644 args.compare = get_src(ctx, instr->src[i].src);
4645 args.compare = ac_to_float(&ctx->ac, args.compare);
4646 }
4647 break;
4648 case nir_tex_src_offset:
4649 args.offset = get_src(ctx, instr->src[i].src);
4650 offset_src = i;
4651 break;
4652 case nir_tex_src_bias:
4653 args.bias = get_src(ctx, instr->src[i].src);
4654 break;
4655 case nir_tex_src_lod: {
4656 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4657 args.level_zero = true;
4658 else
4659 args.lod = get_src(ctx, instr->src[i].src);
4660 break;
4661 }
4662 case nir_tex_src_ms_index:
4663 sample_index = get_src(ctx, instr->src[i].src);
4664 break;
4665 case nir_tex_src_ms_mcs:
4666 break;
4667 case nir_tex_src_ddx:
4668 ddx = get_src(ctx, instr->src[i].src);
4669 break;
4670 case nir_tex_src_ddy:
4671 ddy = get_src(ctx, instr->src[i].src);
4672 break;
4673 case nir_tex_src_min_lod:
4674 args.min_lod = get_src(ctx, instr->src[i].src);
4675 break;
4676 case nir_tex_src_texture_offset:
4677 case nir_tex_src_sampler_offset:
4678 case nir_tex_src_plane:
4679 default:
4680 break;
4681 }
4682 }
4683
4684 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4685 result = get_buffer_size(ctx, args.resource, true);
4686 goto write_result;
4687 }
4688
4689 if (instr->op == nir_texop_texture_samples) {
4690 LLVMValueRef res, samples, is_msaa;
4691 LLVMValueRef default_sample;
4692
4693 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4694 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4695 LLVMConstInt(ctx->ac.i32, 3, false), "");
4696 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4697 LLVMConstInt(ctx->ac.i32, 28, false), "");
4698 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4699 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4700 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4701 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4702
4703 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4704 LLVMConstInt(ctx->ac.i32, 16, false), "");
4705 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4706 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4707 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4708 samples, "");
4709
4710 if (ctx->abi->robust_buffer_access) {
4711 LLVMValueRef dword1, is_null_descriptor;
4712
4713 /* Extract the second dword of the descriptor, if it's
4714 * all zero, then it's a null descriptor.
4715 */
4716 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4717 LLVMConstInt(ctx->ac.i32, 1, false), "");
4718 is_null_descriptor =
4719 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4720 LLVMConstInt(ctx->ac.i32, 0, false), "");
4721 default_sample =
4722 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4723 ctx->ac.i32_0, ctx->ac.i32_1, "");
4724 } else {
4725 default_sample = ctx->ac.i32_1;
4726 }
4727
4728 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4729 default_sample, "");
4730 result = samples;
4731 goto write_result;
4732 }
4733
4734 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4735 LLVMValueRef offset[3], pack;
4736 for (unsigned chan = 0; chan < 3; ++chan)
4737 offset[chan] = ctx->ac.i32_0;
4738
4739 unsigned num_components = ac_get_llvm_num_components(args.offset);
4740 for (unsigned chan = 0; chan < num_components; chan++) {
4741 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4742 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4743 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4744 if (chan)
4745 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4746 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4747 }
4748 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4749 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4750 args.offset = pack;
4751 }
4752
4753 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4754 * OpenGL 4.5 spec says:
4755 *
4756 * "If the texture’s internal format indicates a fixed-point
4757 * depth texture, then D_t and D_ref are clamped to the
4758 * range [0, 1]; otherwise no clamping is performed."
4759 *
4760 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4761 * so the depth comparison value isn't clamped for Z16 and
4762 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4763 * an explicitly clamped 32-bit float format.
4764 */
4765 if (args.compare &&
4766 ctx->ac.chip_class >= GFX8 &&
4767 ctx->ac.chip_class <= GFX9 &&
4768 ctx->abi->clamp_shadow_reference) {
4769 LLVMValueRef upgraded, clamped;
4770
4771 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4772 LLVMConstInt(ctx->ac.i32, 3, false), "");
4773 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4774 LLVMConstInt(ctx->ac.i32, 29, false), "");
4775 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4776 clamped = ac_build_clamp(&ctx->ac, args.compare);
4777 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4778 args.compare, "");
4779 }
4780
4781 /* pack derivatives */
4782 if (ddx || ddy) {
4783 int num_src_deriv_channels, num_dest_deriv_channels;
4784 switch (instr->sampler_dim) {
4785 case GLSL_SAMPLER_DIM_3D:
4786 case GLSL_SAMPLER_DIM_CUBE:
4787 num_src_deriv_channels = 3;
4788 num_dest_deriv_channels = 3;
4789 break;
4790 case GLSL_SAMPLER_DIM_2D:
4791 default:
4792 num_src_deriv_channels = 2;
4793 num_dest_deriv_channels = 2;
4794 break;
4795 case GLSL_SAMPLER_DIM_1D:
4796 num_src_deriv_channels = 1;
4797 if (ctx->ac.chip_class == GFX9) {
4798 num_dest_deriv_channels = 2;
4799 } else {
4800 num_dest_deriv_channels = 1;
4801 }
4802 break;
4803 }
4804
4805 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4806 args.derivs[i] = ac_to_float(&ctx->ac,
4807 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4808 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4809 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4810 }
4811 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4812 args.derivs[i] = ctx->ac.f32_0;
4813 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4814 }
4815 }
4816
4817 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4818 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4819 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4820 if (instr->coord_components == 3)
4821 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4822 ac_prepare_cube_coords(&ctx->ac,
4823 instr->op == nir_texop_txd, instr->is_array,
4824 instr->op == nir_texop_lod, args.coords, args.derivs);
4825 }
4826
4827 /* Texture coordinates fixups */
4828 if (instr->coord_components > 1 &&
4829 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4830 instr->is_array &&
4831 instr->op != nir_texop_txf) {
4832 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4833 }
4834
4835 if (instr->coord_components > 2 &&
4836 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4837 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4838 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4839 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4840 instr->is_array &&
4841 instr->op != nir_texop_txf &&
4842 instr->op != nir_texop_txf_ms &&
4843 instr->op != nir_texop_fragment_fetch &&
4844 instr->op != nir_texop_fragment_mask_fetch) {
4845 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4846 }
4847
4848 if (ctx->ac.chip_class == GFX9 &&
4849 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4850 instr->op != nir_texop_lod) {
4851 LLVMValueRef filler;
4852 if (instr->op == nir_texop_txf)
4853 filler = ctx->ac.i32_0;
4854 else
4855 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4856
4857 if (instr->is_array)
4858 args.coords[2] = args.coords[1];
4859 args.coords[1] = filler;
4860 }
4861
4862 /* Pack sample index */
4863 if (sample_index && (instr->op == nir_texop_txf_ms ||
4864 instr->op == nir_texop_fragment_fetch))
4865 args.coords[instr->coord_components] = sample_index;
4866
4867 if (instr->op == nir_texop_samples_identical) {
4868 struct ac_image_args txf_args = { 0 };
4869 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4870
4871 txf_args.dmask = 0xf;
4872 txf_args.resource = fmask_ptr;
4873 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4874 result = build_tex_intrinsic(ctx, instr, &txf_args);
4875
4876 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4877 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4878 goto write_result;
4879 }
4880
4881 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4882 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4883 instr->op != nir_texop_txs &&
4884 instr->op != nir_texop_fragment_fetch &&
4885 instr->op != nir_texop_fragment_mask_fetch) {
4886 unsigned sample_chan = instr->is_array ? 3 : 2;
4887 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4888 &ctx->ac, args.coords[0], args.coords[1],
4889 instr->is_array ? args.coords[2] : NULL,
4890 args.coords[sample_chan], fmask_ptr);
4891 }
4892
4893 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4894 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4895 num_offsets = MIN2(num_offsets, instr->coord_components);
4896 for (unsigned i = 0; i < num_offsets; ++i) {
4897 args.coords[i] = LLVMBuildAdd(
4898 ctx->ac.builder, args.coords[i],
4899 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4900 }
4901 args.offset = NULL;
4902 }
4903
4904 /* DMASK was repurposed for GATHER4. 4 components are always
4905 * returned and DMASK works like a swizzle - it selects
4906 * the component to fetch. The only valid DMASK values are
4907 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4908 * (red,red,red,red) etc.) The ISA document doesn't mention
4909 * this.
4910 */
4911 args.dmask = 0xf;
4912 if (instr->op == nir_texop_tg4) {
4913 if (instr->is_shadow)
4914 args.dmask = 1;
4915 else
4916 args.dmask = 1 << instr->component;
4917 }
4918
4919 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4920 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4921 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4922 }
4923
4924 /* Adjust the number of coordinates because we only need (x,y) for 2D
4925 * multisampled images and (x,y,layer) for 2D multisampled layered
4926 * images or for multisampled input attachments.
4927 */
4928 if (instr->op == nir_texop_fragment_mask_fetch) {
4929 if (args.dim == ac_image_2dmsaa) {
4930 args.dim = ac_image_2d;
4931 } else {
4932 assert(args.dim == ac_image_2darraymsaa);
4933 args.dim = ac_image_2darray;
4934 }
4935 }
4936
4937 assert(instr->dest.is_ssa);
4938 args.d16 = instr->dest.ssa.bit_size == 16;
4939
4940 result = build_tex_intrinsic(ctx, instr, &args);
4941
4942 if (instr->op == nir_texop_query_levels)
4943 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4944 else if (instr->is_shadow && instr->is_new_style_shadow &&
4945 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4946 instr->op != nir_texop_tg4)
4947 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4948 else if (instr->op == nir_texop_txs &&
4949 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4950 instr->is_array) {
4951 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4952 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4953 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4954 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4955 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4956 } else if (ctx->ac.chip_class == GFX9 &&
4957 instr->op == nir_texop_txs &&
4958 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4959 instr->is_array) {
4960 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4961 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4962 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4963 ctx->ac.i32_1, "");
4964 } else if (instr->dest.ssa.num_components != 4)
4965 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4966
4967 write_result:
4968 if (result) {
4969 assert(instr->dest.is_ssa);
4970 result = ac_to_integer(&ctx->ac, result);
4971
4972 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4973 result = exit_waterfall(ctx, wctx + i, result);
4974 }
4975
4976 ctx->ssa_defs[instr->dest.ssa.index] = result;
4977 }
4978 }
4979
4980 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4981 {
4982 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4983 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4984
4985 ctx->ssa_defs[instr->dest.ssa.index] = result;
4986 _mesa_hash_table_insert(ctx->phis, instr, result);
4987 }
4988
4989 static void visit_post_phi(struct ac_nir_context *ctx,
4990 nir_phi_instr *instr,
4991 LLVMValueRef llvm_phi)
4992 {
4993 nir_foreach_phi_src(src, instr) {
4994 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4995 LLVMValueRef llvm_src = get_src(ctx, src->src);
4996
4997 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4998 }
4999 }
5000
5001 static void phi_post_pass(struct ac_nir_context *ctx)
5002 {
5003 hash_table_foreach(ctx->phis, entry) {
5004 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
5005 (LLVMValueRef)entry->data);
5006 }
5007 }
5008
5009
5010 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
5011 nir_foreach_use(use_src, def) {
5012 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
5013 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
5014 if (instr->intrinsic == nir_intrinsic_store_deref)
5015 return true;
5016 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
5017 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
5018 if (instr->op == nir_op_vec4 &&
5019 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
5020 return true;
5021 }
5022 }
5023 }
5024 return false;
5025 }
5026
5027 static void visit_ssa_undef(struct ac_nir_context *ctx,
5028 const nir_ssa_undef_instr *instr)
5029 {
5030 unsigned num_components = instr->def.num_components;
5031 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
5032
5033 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
5034 LLVMValueRef undef;
5035
5036 if (num_components == 1)
5037 undef = LLVMGetUndef(type);
5038 else {
5039 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
5040 }
5041 ctx->ssa_defs[instr->def.index] = undef;
5042 } else {
5043 LLVMValueRef zero = LLVMConstInt(type, 0, false);
5044 if (num_components > 1) {
5045 zero = ac_build_gather_values_extended(
5046 &ctx->ac, &zero, 4, 0, false, false);
5047 }
5048 ctx->ssa_defs[instr->def.index] = zero;
5049 }
5050 }
5051
5052 static void visit_jump(struct ac_llvm_context *ctx,
5053 const nir_jump_instr *instr)
5054 {
5055 switch (instr->type) {
5056 case nir_jump_break:
5057 ac_build_break(ctx);
5058 break;
5059 case nir_jump_continue:
5060 ac_build_continue(ctx);
5061 break;
5062 default:
5063 fprintf(stderr, "Unknown NIR jump instr: ");
5064 nir_print_instr(&instr->instr, stderr);
5065 fprintf(stderr, "\n");
5066 abort();
5067 }
5068 }
5069
5070 static LLVMTypeRef
5071 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
5072 enum glsl_base_type type)
5073 {
5074 switch (type) {
5075 case GLSL_TYPE_INT:
5076 case GLSL_TYPE_UINT:
5077 case GLSL_TYPE_BOOL:
5078 case GLSL_TYPE_SUBROUTINE:
5079 return ac->i32;
5080 case GLSL_TYPE_INT8:
5081 case GLSL_TYPE_UINT8:
5082 return ac->i8;
5083 case GLSL_TYPE_INT16:
5084 case GLSL_TYPE_UINT16:
5085 return ac->i16;
5086 case GLSL_TYPE_FLOAT:
5087 return ac->f32;
5088 case GLSL_TYPE_FLOAT16:
5089 return ac->f16;
5090 case GLSL_TYPE_INT64:
5091 case GLSL_TYPE_UINT64:
5092 return ac->i64;
5093 case GLSL_TYPE_DOUBLE:
5094 return ac->f64;
5095 default:
5096 unreachable("unknown GLSL type");
5097 }
5098 }
5099
5100 static LLVMTypeRef
5101 glsl_to_llvm_type(struct ac_llvm_context *ac,
5102 const struct glsl_type *type)
5103 {
5104 if (glsl_type_is_scalar(type)) {
5105 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
5106 }
5107
5108 if (glsl_type_is_vector(type)) {
5109 return LLVMVectorType(
5110 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
5111 glsl_get_vector_elements(type));
5112 }
5113
5114 if (glsl_type_is_matrix(type)) {
5115 return LLVMArrayType(
5116 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
5117 glsl_get_matrix_columns(type));
5118 }
5119
5120 if (glsl_type_is_array(type)) {
5121 return LLVMArrayType(
5122 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
5123 glsl_get_length(type));
5124 }
5125
5126 assert(glsl_type_is_struct_or_ifc(type));
5127
5128 LLVMTypeRef member_types[glsl_get_length(type)];
5129
5130 for (unsigned i = 0; i < glsl_get_length(type); i++) {
5131 member_types[i] =
5132 glsl_to_llvm_type(ac,
5133 glsl_get_struct_field(type, i));
5134 }
5135
5136 return LLVMStructTypeInContext(ac->context, member_types,
5137 glsl_get_length(type), false);
5138 }
5139
5140 static void visit_deref(struct ac_nir_context *ctx,
5141 nir_deref_instr *instr)
5142 {
5143 if (instr->mode != nir_var_mem_shared &&
5144 instr->mode != nir_var_mem_global)
5145 return;
5146
5147 LLVMValueRef result = NULL;
5148 switch(instr->deref_type) {
5149 case nir_deref_type_var: {
5150 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
5151 result = entry->data;
5152 break;
5153 }
5154 case nir_deref_type_struct:
5155 if (instr->mode == nir_var_mem_global) {
5156 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5157 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5158 instr->strct.index);
5159 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5160 LLVMConstInt(ctx->ac.i32, offset, 0));
5161 } else {
5162 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5163 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5164 }
5165 break;
5166 case nir_deref_type_array:
5167 if (instr->mode == nir_var_mem_global) {
5168 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5169 unsigned stride = glsl_get_explicit_stride(parent->type);
5170
5171 if ((glsl_type_is_matrix(parent->type) &&
5172 glsl_matrix_type_is_row_major(parent->type)) ||
5173 (glsl_type_is_vector(parent->type) && stride == 0))
5174 stride = type_scalar_size_bytes(parent->type);
5175
5176 assert(stride > 0);
5177 LLVMValueRef index = get_src(ctx, instr->arr.index);
5178 if (LLVMTypeOf(index) != ctx->ac.i64)
5179 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5180
5181 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5182
5183 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5184 } else {
5185 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5186 get_src(ctx, instr->arr.index));
5187 }
5188 break;
5189 case nir_deref_type_ptr_as_array:
5190 if (instr->mode == nir_var_mem_global) {
5191 unsigned stride = nir_deref_instr_array_stride(instr);
5192
5193 LLVMValueRef index = get_src(ctx, instr->arr.index);
5194 if (LLVMTypeOf(index) != ctx->ac.i64)
5195 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5196
5197 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5198
5199 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5200 } else {
5201 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5202 get_src(ctx, instr->arr.index));
5203 }
5204 break;
5205 case nir_deref_type_cast: {
5206 result = get_src(ctx, instr->parent);
5207
5208 /* We can't use the structs from LLVM because the shader
5209 * specifies its own offsets. */
5210 LLVMTypeRef pointee_type = ctx->ac.i8;
5211 if (instr->mode == nir_var_mem_shared)
5212 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5213
5214 unsigned address_space;
5215
5216 switch(instr->mode) {
5217 case nir_var_mem_shared:
5218 address_space = AC_ADDR_SPACE_LDS;
5219 break;
5220 case nir_var_mem_global:
5221 address_space = AC_ADDR_SPACE_GLOBAL;
5222 break;
5223 default:
5224 unreachable("Unhandled address space");
5225 }
5226
5227 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5228
5229 if (LLVMTypeOf(result) != type) {
5230 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5231 result = LLVMBuildBitCast(ctx->ac.builder, result,
5232 type, "");
5233 } else {
5234 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5235 type, "");
5236 }
5237 }
5238 break;
5239 }
5240 default:
5241 unreachable("Unhandled deref_instr deref type");
5242 }
5243
5244 ctx->ssa_defs[instr->dest.ssa.index] = result;
5245 }
5246
5247 static void visit_cf_list(struct ac_nir_context *ctx,
5248 struct exec_list *list);
5249
5250 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5251 {
5252 nir_foreach_instr(instr, block)
5253 {
5254 switch (instr->type) {
5255 case nir_instr_type_alu:
5256 visit_alu(ctx, nir_instr_as_alu(instr));
5257 break;
5258 case nir_instr_type_load_const:
5259 visit_load_const(ctx, nir_instr_as_load_const(instr));
5260 break;
5261 case nir_instr_type_intrinsic:
5262 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5263 break;
5264 case nir_instr_type_tex:
5265 visit_tex(ctx, nir_instr_as_tex(instr));
5266 break;
5267 case nir_instr_type_phi:
5268 visit_phi(ctx, nir_instr_as_phi(instr));
5269 break;
5270 case nir_instr_type_ssa_undef:
5271 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5272 break;
5273 case nir_instr_type_jump:
5274 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5275 break;
5276 case nir_instr_type_deref:
5277 visit_deref(ctx, nir_instr_as_deref(instr));
5278 break;
5279 default:
5280 fprintf(stderr, "Unknown NIR instr type: ");
5281 nir_print_instr(instr, stderr);
5282 fprintf(stderr, "\n");
5283 abort();
5284 }
5285 }
5286
5287 _mesa_hash_table_insert(ctx->defs, block,
5288 LLVMGetInsertBlock(ctx->ac.builder));
5289 }
5290
5291 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5292 {
5293 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5294
5295 nir_block *then_block =
5296 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5297
5298 ac_build_uif(&ctx->ac, value, then_block->index);
5299
5300 visit_cf_list(ctx, &if_stmt->then_list);
5301
5302 if (!exec_list_is_empty(&if_stmt->else_list)) {
5303 nir_block *else_block =
5304 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5305
5306 ac_build_else(&ctx->ac, else_block->index);
5307 visit_cf_list(ctx, &if_stmt->else_list);
5308 }
5309
5310 ac_build_endif(&ctx->ac, then_block->index);
5311 }
5312
5313 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5314 {
5315 nir_block *first_loop_block =
5316 (nir_block *) exec_list_get_head(&loop->body);
5317
5318 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5319
5320 visit_cf_list(ctx, &loop->body);
5321
5322 ac_build_endloop(&ctx->ac, first_loop_block->index);
5323 }
5324
5325 static void visit_cf_list(struct ac_nir_context *ctx,
5326 struct exec_list *list)
5327 {
5328 foreach_list_typed(nir_cf_node, node, node, list)
5329 {
5330 switch (node->type) {
5331 case nir_cf_node_block:
5332 visit_block(ctx, nir_cf_node_as_block(node));
5333 break;
5334
5335 case nir_cf_node_if:
5336 visit_if(ctx, nir_cf_node_as_if(node));
5337 break;
5338
5339 case nir_cf_node_loop:
5340 visit_loop(ctx, nir_cf_node_as_loop(node));
5341 break;
5342
5343 default:
5344 assert(0);
5345 }
5346 }
5347 }
5348
5349 void
5350 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5351 struct ac_shader_abi *abi,
5352 struct nir_shader *nir,
5353 struct nir_variable *variable,
5354 gl_shader_stage stage)
5355 {
5356 unsigned output_loc = variable->data.driver_location / 4;
5357 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5358
5359 /* tess ctrl has it's own load/store paths for outputs */
5360 if (stage == MESA_SHADER_TESS_CTRL)
5361 return;
5362
5363 if (stage == MESA_SHADER_VERTEX ||
5364 stage == MESA_SHADER_TESS_EVAL ||
5365 stage == MESA_SHADER_GEOMETRY) {
5366 int idx = variable->data.location + variable->data.index;
5367 if (idx == VARYING_SLOT_CLIP_DIST0) {
5368 int length = nir->info.clip_distance_array_size +
5369 nir->info.cull_distance_array_size;
5370
5371 if (length > 4)
5372 attrib_count = 2;
5373 else
5374 attrib_count = 1;
5375 }
5376 }
5377
5378 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5379 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5380 for (unsigned i = 0; i < attrib_count; ++i) {
5381 for (unsigned chan = 0; chan < 4; chan++) {
5382 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5383 ac_build_alloca_undef(ctx, type, "");
5384 }
5385 }
5386 }
5387
5388 static void
5389 setup_locals(struct ac_nir_context *ctx,
5390 struct nir_function *func)
5391 {
5392 int i, j;
5393 ctx->num_locals = 0;
5394 nir_foreach_function_temp_variable(variable, func->impl) {
5395 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5396 variable->data.driver_location = ctx->num_locals * 4;
5397 variable->data.location_frac = 0;
5398 ctx->num_locals += attrib_count;
5399 }
5400 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5401 if (!ctx->locals)
5402 return;
5403
5404 for (i = 0; i < ctx->num_locals; i++) {
5405 for (j = 0; j < 4; j++) {
5406 ctx->locals[i * 4 + j] =
5407 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5408 }
5409 }
5410 }
5411
5412 static void
5413 setup_scratch(struct ac_nir_context *ctx,
5414 struct nir_shader *shader)
5415 {
5416 if (shader->scratch_size == 0)
5417 return;
5418
5419 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5420 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5421 "scratch");
5422 }
5423
5424 static void
5425 setup_constant_data(struct ac_nir_context *ctx,
5426 struct nir_shader *shader)
5427 {
5428 if (!shader->constant_data)
5429 return;
5430
5431 LLVMValueRef data =
5432 LLVMConstStringInContext(ctx->ac.context,
5433 shader->constant_data,
5434 shader->constant_data_size,
5435 true);
5436 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5437
5438 /* We want to put the constant data in the CONST address space so that
5439 * we can use scalar loads. However, LLVM versions before 10 put these
5440 * variables in the same section as the code, which is unacceptable
5441 * for RadeonSI as it needs to relocate all the data sections after
5442 * the code sections. See https://reviews.llvm.org/D65813.
5443 */
5444 unsigned address_space =
5445 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5446
5447 LLVMValueRef global =
5448 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5449 "const_data",
5450 address_space);
5451
5452 LLVMSetInitializer(global, data);
5453 LLVMSetGlobalConstant(global, true);
5454 LLVMSetVisibility(global, LLVMHiddenVisibility);
5455 ctx->constant_data = global;
5456 }
5457
5458 static void
5459 setup_shared(struct ac_nir_context *ctx,
5460 struct nir_shader *nir)
5461 {
5462 if (ctx->ac.lds)
5463 return;
5464
5465 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5466 nir->info.cs.shared_size);
5467
5468 LLVMValueRef lds =
5469 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5470 "compute_lds",
5471 AC_ADDR_SPACE_LDS);
5472 LLVMSetAlignment(lds, 64 * 1024);
5473
5474 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5475 LLVMPointerType(ctx->ac.i8,
5476 AC_ADDR_SPACE_LDS), "");
5477 }
5478
5479 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5480 const struct ac_shader_args *args, struct nir_shader *nir)
5481 {
5482 struct ac_nir_context ctx = {};
5483 struct nir_function *func;
5484
5485 ctx.ac = *ac;
5486 ctx.abi = abi;
5487 ctx.args = args;
5488
5489 ctx.stage = nir->info.stage;
5490 ctx.info = &nir->info;
5491
5492 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5493
5494 /* TODO: remove this after RADV switches to lowered IO */
5495 if (!nir->info.io_lowered) {
5496 nir_foreach_shader_out_variable(variable, nir) {
5497 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5498 ctx.stage);
5499 }
5500 }
5501
5502 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5503 _mesa_key_pointer_equal);
5504 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5505 _mesa_key_pointer_equal);
5506 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5507 _mesa_key_pointer_equal);
5508
5509 if (ctx.abi->kill_ps_if_inf_interp)
5510 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5511 _mesa_key_pointer_equal);
5512
5513 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5514
5515 nir_index_ssa_defs(func->impl);
5516 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5517
5518 setup_locals(&ctx, func);
5519 setup_scratch(&ctx, nir);
5520 setup_constant_data(&ctx, nir);
5521
5522 if (gl_shader_stage_is_compute(nir->info.stage))
5523 setup_shared(&ctx, nir);
5524
5525 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5526 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5527 /* true = don't kill. */
5528 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5529 }
5530
5531 visit_cf_list(&ctx, &func->impl->body);
5532 phi_post_pass(&ctx);
5533
5534 if (ctx.ac.postponed_kill)
5535 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5536 ctx.ac.postponed_kill, ""));
5537
5538 if (!gl_shader_stage_is_compute(nir->info.stage))
5539 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5540 ctx.abi->outputs);
5541
5542 free(ctx.locals);
5543 free(ctx.ssa_defs);
5544 ralloc_free(ctx.defs);
5545 ralloc_free(ctx.phis);
5546 ralloc_free(ctx.vars);
5547 if (ctx.abi->kill_ps_if_inf_interp)
5548 ralloc_free(ctx.verified_interp);
5549 }
5550
5551 bool
5552 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5553 {
5554 bool progress = false;
5555
5556 /* Lower large variables to scratch first so that we won't bloat the
5557 * shader by generating large if ladders for them. We later lower
5558 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5559 */
5560 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5561 nir_var_function_temp,
5562 256,
5563 glsl_get_natural_size_align_bytes);
5564
5565 /* While it would be nice not to have this flag, we are constrained
5566 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5567 */
5568 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5569
5570 /* TODO: Indirect indexing of GS inputs is unimplemented.
5571 *
5572 * TCS and TES load inputs directly from LDS or offchip memory, so
5573 * indirect indexing is trivial.
5574 */
5575 nir_variable_mode indirect_mask = 0;
5576 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5577 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5578 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5579 !llvm_has_working_vgpr_indexing)) {
5580 indirect_mask |= nir_var_shader_in;
5581 }
5582 if (!llvm_has_working_vgpr_indexing &&
5583 nir->info.stage != MESA_SHADER_TESS_CTRL)
5584 indirect_mask |= nir_var_shader_out;
5585
5586 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5587 * smart enough to handle indirects without causing excess spilling
5588 * causing the gpu to hang.
5589 *
5590 * See the following thread for more details of the problem:
5591 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5592 */
5593 indirect_mask |= nir_var_function_temp;
5594
5595 progress |= nir_lower_indirect_derefs(nir, indirect_mask, UINT32_MAX);
5596 return progress;
5597 }
5598
5599 static unsigned
5600 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5601 {
5602 if (intrin->intrinsic != nir_intrinsic_store_output)
5603 return 0;
5604
5605 unsigned writemask = nir_intrinsic_write_mask(intrin) <<
5606 nir_intrinsic_component(intrin);
5607 unsigned location = nir_intrinsic_io_semantics(intrin).location;
5608
5609 if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5610 return writemask << 4;
5611 else if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5612 return writemask;
5613
5614 return 0;
5615 }
5616
5617 static void
5618 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5619 unsigned *cond_block_tf_writemask,
5620 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5621 {
5622 switch (cf_node->type) {
5623 case nir_cf_node_block: {
5624 nir_block *block = nir_cf_node_as_block(cf_node);
5625 nir_foreach_instr(instr, block) {
5626 if (instr->type != nir_instr_type_intrinsic)
5627 continue;
5628
5629 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5630 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5631
5632 /* If we find a barrier in nested control flow put this in the
5633 * too hard basket. In GLSL this is not possible but it is in
5634 * SPIR-V.
5635 */
5636 if (is_nested_cf) {
5637 *tessfactors_are_def_in_all_invocs = false;
5638 return;
5639 }
5640
5641 /* The following case must be prevented:
5642 * gl_TessLevelInner = ...;
5643 * barrier();
5644 * if (gl_InvocationID == 1)
5645 * gl_TessLevelInner = ...;
5646 *
5647 * If you consider disjoint code segments separated by barriers, each
5648 * such segment that writes tess factor channels should write the same
5649 * channels in all codepaths within that segment.
5650 */
5651 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5652 /* Accumulate the result: */
5653 *tessfactors_are_def_in_all_invocs &=
5654 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5655
5656 /* Analyze the next code segment from scratch. */
5657 *upper_block_tf_writemask = 0;
5658 *cond_block_tf_writemask = 0;
5659 }
5660 } else
5661 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5662 }
5663
5664 break;
5665 }
5666 case nir_cf_node_if: {
5667 unsigned then_tessfactor_writemask = 0;
5668 unsigned else_tessfactor_writemask = 0;
5669
5670 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5671 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5672 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5673 cond_block_tf_writemask,
5674 tessfactors_are_def_in_all_invocs, true);
5675 }
5676
5677 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5678 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5679 cond_block_tf_writemask,
5680 tessfactors_are_def_in_all_invocs, true);
5681 }
5682
5683 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5684 /* If both statements write the same tess factor channels,
5685 * we can say that the upper block writes them too.
5686 */
5687 *upper_block_tf_writemask |= then_tessfactor_writemask &
5688 else_tessfactor_writemask;
5689 *cond_block_tf_writemask |= then_tessfactor_writemask |
5690 else_tessfactor_writemask;
5691 }
5692
5693 break;
5694 }
5695 case nir_cf_node_loop: {
5696 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5697 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5698 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5699 cond_block_tf_writemask,
5700 tessfactors_are_def_in_all_invocs, true);
5701 }
5702
5703 break;
5704 }
5705 default:
5706 unreachable("unknown cf node type");
5707 }
5708 }
5709
5710 bool
5711 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5712 {
5713 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5714
5715 /* The pass works as follows:
5716 * If all codepaths write tess factors, we can say that all
5717 * invocations define tess factors.
5718 *
5719 * Each tess factor channel is tracked separately.
5720 */
5721 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5722 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5723
5724 /* Initial value = true. Here the pass will accumulate results from
5725 * multiple segments surrounded by barriers. If tess factors aren't
5726 * written at all, it's a shader bug and we don't care if this will be
5727 * true.
5728 */
5729 bool tessfactors_are_def_in_all_invocs = true;
5730
5731 nir_foreach_function(function, nir) {
5732 if (function->impl) {
5733 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5734 scan_tess_ctrl(node, &main_block_tf_writemask,
5735 &cond_block_tf_writemask,
5736 &tessfactors_are_def_in_all_invocs,
5737 false);
5738 }
5739 }
5740 }
5741
5742 /* Accumulate the result for the last code segment separated by a
5743 * barrier.
5744 */
5745 if (main_block_tf_writemask || cond_block_tf_writemask) {
5746 tessfactors_are_def_in_all_invocs &=
5747 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5748 }
5749
5750 return tessfactors_are_def_in_all_invocs;
5751 }