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[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0, LLVMValueRef src1)
223 {
224 char name[64], type[64];
225 LLVMValueRef params[] = {
226 ac_to_float(ctx, src0),
227 ac_to_float(ctx, src1),
228 };
229
230 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
231 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
237 const char *intrin,
238 LLVMTypeRef result_type,
239 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
240 {
241 char name[64], type[64];
242 LLVMValueRef params[] = {
243 ac_to_float(ctx, src0),
244 ac_to_float(ctx, src1),
245 ac_to_float(ctx, src2),
246 };
247
248 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
249 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
250 assert(length < sizeof(name));
251 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
252 }
253
254 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
255 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
256 {
257 LLVMTypeRef src1_type = LLVMTypeOf(src1);
258 LLVMTypeRef src2_type = LLVMTypeOf(src2);
259
260 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
261
262 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
263 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
264 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
265 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
266 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
267 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
268 }
269
270 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
271 ctx->i32_0, "");
272 return LLVMBuildSelect(ctx->builder, v,
273 ac_to_integer_or_pointer(ctx, src1),
274 ac_to_integer_or_pointer(ctx, src2), "");
275 }
276
277 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
278 LLVMValueRef src0)
279 {
280 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
281 }
282
283 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
284 const char *intrin,
285 LLVMValueRef src0, LLVMValueRef src1)
286 {
287 LLVMTypeRef ret_type;
288 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
289 LLVMValueRef res;
290 LLVMValueRef params[] = { src0, src1 };
291 ret_type = LLVMStructTypeInContext(ctx->context, types,
292 2, true);
293
294 res = ac_build_intrinsic(ctx, intrin, ret_type,
295 params, 2, AC_FUNC_ATTR_READNONE);
296
297 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
298 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
299 return res;
300 }
301
302 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
303 LLVMValueRef src0,
304 unsigned bitsize)
305 {
306 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
307 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
308 "");
309 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
310
311 switch (bitsize) {
312 case 16:
313 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
314 case 32:
315 return result;
316 case 64:
317 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
318 default:
319 unreachable("Unsupported bit size.");
320 }
321 }
322
323 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
324 LLVMValueRef src0)
325 {
326 src0 = ac_to_float(ctx, src0);
327 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
328 return LLVMBuildSExt(ctx->builder,
329 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
330 ctx->i32, "");
331 }
332
333 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
334 LLVMValueRef src0,
335 unsigned bitsize)
336 {
337 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
338
339 switch (bitsize) {
340 case 8:
341 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
342 case 16:
343 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
344 case 32:
345 return result;
346 case 64:
347 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
348 default:
349 unreachable("Unsupported bit size.");
350 }
351 }
352
353 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
354 LLVMValueRef src0)
355 {
356 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
357 return LLVMBuildSExt(ctx->builder,
358 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
359 ctx->i32, "");
360 }
361
362 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
363 LLVMValueRef src0)
364 {
365 LLVMValueRef result;
366 LLVMValueRef cond = NULL;
367
368 src0 = ac_to_float(ctx, src0);
369 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
370
371 if (ctx->chip_class >= GFX8) {
372 LLVMValueRef args[2];
373 /* Check if the result is a denormal - and flush to 0 if so. */
374 args[0] = result;
375 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
376 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
377 }
378
379 /* need to convert back up to f32 */
380 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
381
382 if (ctx->chip_class >= GFX8)
383 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
384 else {
385 /* for GFX6-GFX7 */
386 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
387 * so compare the result and flush to 0 if it's smaller.
388 */
389 LLVMValueRef temp, cond2;
390 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
391 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
392 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
393 temp, "");
394 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
395 temp, ctx->f32_0, "");
396 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
397 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
398 }
399 return result;
400 }
401
402 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
403 LLVMValueRef src0, LLVMValueRef src1)
404 {
405 LLVMValueRef dst64, result;
406 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
407 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
408
409 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
410 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
411 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
412 return result;
413 }
414
415 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
416 LLVMValueRef src0, LLVMValueRef src1)
417 {
418 LLVMValueRef dst64, result;
419 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
420 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
421
422 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
423 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
424 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
425 return result;
426 }
427
428 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
429 LLVMValueRef bits, LLVMValueRef offset)
430 {
431 /* mask = ((1 << bits) - 1) << offset */
432 return LLVMBuildShl(ctx->builder,
433 LLVMBuildSub(ctx->builder,
434 LLVMBuildShl(ctx->builder,
435 ctx->i32_1,
436 bits, ""),
437 ctx->i32_1, ""),
438 offset, "");
439 }
440
441 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
442 LLVMValueRef mask, LLVMValueRef insert,
443 LLVMValueRef base)
444 {
445 /* Calculate:
446 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
447 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
448 */
449 return LLVMBuildXor(ctx->builder, base,
450 LLVMBuildAnd(ctx->builder, mask,
451 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
452 }
453
454 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
455 LLVMValueRef src0,
456 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
457 LLVMValueRef args[2]))
458 {
459 LLVMValueRef comp[2];
460
461 src0 = ac_to_float(ctx, src0);
462 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
463 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
464
465 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
466 }
467
468 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
469 LLVMValueRef src0)
470 {
471 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
472 LLVMValueRef temps[2], val;
473 int i;
474
475 for (i = 0; i < 2; i++) {
476 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
477 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
478 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
479 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
480 }
481 return ac_build_gather_values(ctx, temps, 2);
482 }
483
484 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
485 nir_op op,
486 LLVMValueRef src0)
487 {
488 unsigned mask;
489 int idx;
490 LLVMValueRef result;
491
492 if (op == nir_op_fddx_fine)
493 mask = AC_TID_MASK_LEFT;
494 else if (op == nir_op_fddy_fine)
495 mask = AC_TID_MASK_TOP;
496 else
497 mask = AC_TID_MASK_TOP_LEFT;
498
499 /* for DDX we want to next X pixel, DDY next Y pixel. */
500 if (op == nir_op_fddx_fine ||
501 op == nir_op_fddx_coarse ||
502 op == nir_op_fddx)
503 idx = 1;
504 else
505 idx = 2;
506
507 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
508 return result;
509 }
510
511 struct waterfall_context {
512 LLVMBasicBlockRef phi_bb[2];
513 bool use_waterfall;
514 };
515
516 /* To deal with divergent descriptors we can create a loop that handles all
517 * lanes with the same descriptor on a given iteration (henceforth a
518 * waterfall loop).
519 *
520 * These helper create the begin and end of the loop leaving the caller
521 * to implement the body.
522 *
523 * params:
524 * - ctx is the usal nir context
525 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
526 * - value is the possibly divergent value for which we built the loop
527 * - divergent is whether value is actually divergent. If false we just pass
528 * things through.
529 */
530 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
531 struct waterfall_context *wctx,
532 LLVMValueRef value, bool divergent)
533 {
534 /* If the app claims the value is divergent but it is constant we can
535 * end up with a dynamic index of NULL. */
536 if (!value)
537 divergent = false;
538
539 wctx->use_waterfall = divergent;
540 if (!divergent)
541 return value;
542
543 ac_build_bgnloop(&ctx->ac, 6000);
544
545 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
546
547 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
548 scalar_value, "uniform_active");
549
550 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
551 ac_build_ifcc(&ctx->ac, active, 6001);
552
553 return scalar_value;
554 }
555
556 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
557 struct waterfall_context *wctx,
558 LLVMValueRef value)
559 {
560 LLVMValueRef ret = NULL;
561 LLVMValueRef phi_src[2];
562 LLVMValueRef cc_phi_src[2] = {
563 LLVMConstInt(ctx->ac.i32, 0, false),
564 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
565 };
566
567 if (!wctx->use_waterfall)
568 return value;
569
570 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
571
572 ac_build_endif(&ctx->ac, 6001);
573
574 if (value) {
575 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
576 phi_src[1] = value;
577
578 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
579 }
580
581 /*
582 * By using the optimization barrier on the exit decision, we decouple
583 * the operations from the break, and hence avoid LLVM hoisting the
584 * opteration into the break block.
585 */
586 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
587 ac_build_optimization_barrier(&ctx->ac, &cc);
588
589 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
590 ac_build_ifcc(&ctx->ac, active, 6002);
591 ac_build_break(&ctx->ac);
592 ac_build_endif(&ctx->ac, 6002);
593
594 ac_build_endloop(&ctx->ac, 6000);
595 return ret;
596 }
597
598 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
599 {
600 LLVMValueRef src[4], result = NULL;
601 unsigned num_components = instr->dest.dest.ssa.num_components;
602 unsigned src_components;
603 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
604 bool saved_inexact = false;
605
606 if (instr->exact)
607 saved_inexact = ac_disable_inexact_math(ctx->ac.builder);
608
609 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
610 switch (instr->op) {
611 case nir_op_vec2:
612 case nir_op_vec3:
613 case nir_op_vec4:
614 src_components = 1;
615 break;
616 case nir_op_pack_half_2x16:
617 case nir_op_pack_snorm_2x16:
618 case nir_op_pack_unorm_2x16:
619 src_components = 2;
620 break;
621 case nir_op_unpack_half_2x16:
622 src_components = 1;
623 break;
624 case nir_op_cube_face_coord:
625 case nir_op_cube_face_index:
626 src_components = 3;
627 break;
628 default:
629 src_components = num_components;
630 break;
631 }
632 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
633 src[i] = get_alu_src(ctx, instr->src[i], src_components);
634
635 switch (instr->op) {
636 case nir_op_mov:
637 result = src[0];
638 break;
639 case nir_op_fneg:
640 src[0] = ac_to_float(&ctx->ac, src[0]);
641 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
642 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
643 /* fneg will be optimized by backend compiler with sign
644 * bit removed via XOR. This is probably a LLVM bug.
645 */
646 result = ac_build_canonicalize(&ctx->ac, result,
647 instr->dest.dest.ssa.bit_size);
648 }
649 break;
650 case nir_op_ineg:
651 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
652 break;
653 case nir_op_inot:
654 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
655 break;
656 case nir_op_iadd:
657 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
658 break;
659 case nir_op_fadd:
660 src[0] = ac_to_float(&ctx->ac, src[0]);
661 src[1] = ac_to_float(&ctx->ac, src[1]);
662 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_fsub:
665 src[0] = ac_to_float(&ctx->ac, src[0]);
666 src[1] = ac_to_float(&ctx->ac, src[1]);
667 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
668 break;
669 case nir_op_isub:
670 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_imul:
673 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
674 break;
675 case nir_op_imod:
676 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
677 break;
678 case nir_op_umod:
679 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
680 break;
681 case nir_op_fmod:
682 /* lower_fmod only lower 16-bit and 32-bit fmod */
683 assert(instr->dest.dest.ssa.bit_size == 64);
684 src[0] = ac_to_float(&ctx->ac, src[0]);
685 src[1] = ac_to_float(&ctx->ac, src[1]);
686 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
687 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
688 ac_to_float_type(&ctx->ac, def_type), result);
689 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
690 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
691 break;
692 case nir_op_irem:
693 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_idiv:
696 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
697 break;
698 case nir_op_udiv:
699 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
700 break;
701 case nir_op_fmul:
702 src[0] = ac_to_float(&ctx->ac, src[0]);
703 src[1] = ac_to_float(&ctx->ac, src[1]);
704 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
705 break;
706 case nir_op_frcp:
707 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
708 ac_to_float_type(&ctx->ac, def_type), src[0]);
709 break;
710 case nir_op_iand:
711 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
712 break;
713 case nir_op_ior:
714 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
715 break;
716 case nir_op_ixor:
717 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
718 break;
719 case nir_op_ishl:
720 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
721 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
722 LLVMTypeOf(src[0]), "");
723 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
724 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
725 LLVMTypeOf(src[0]), "");
726 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
727 break;
728 case nir_op_ishr:
729 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
730 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
731 LLVMTypeOf(src[0]), "");
732 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
733 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
734 LLVMTypeOf(src[0]), "");
735 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
736 break;
737 case nir_op_ushr:
738 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
739 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
740 LLVMTypeOf(src[0]), "");
741 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
742 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
743 LLVMTypeOf(src[0]), "");
744 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
745 break;
746 case nir_op_ilt32:
747 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
748 break;
749 case nir_op_ine32:
750 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
751 break;
752 case nir_op_ieq32:
753 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
754 break;
755 case nir_op_ige32:
756 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
757 break;
758 case nir_op_ult32:
759 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
760 break;
761 case nir_op_uge32:
762 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
763 break;
764 case nir_op_feq32:
765 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
766 break;
767 case nir_op_fne32:
768 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
769 break;
770 case nir_op_flt32:
771 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
772 break;
773 case nir_op_fge32:
774 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
775 break;
776 case nir_op_fabs:
777 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
778 ac_to_float_type(&ctx->ac, def_type), src[0]);
779 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
780 /* fabs will be optimized by backend compiler with sign
781 * bit removed via AND.
782 */
783 result = ac_build_canonicalize(&ctx->ac, result,
784 instr->dest.dest.ssa.bit_size);
785 }
786 break;
787 case nir_op_iabs:
788 result = emit_iabs(&ctx->ac, src[0]);
789 break;
790 case nir_op_imax:
791 result = ac_build_imax(&ctx->ac, src[0], src[1]);
792 break;
793 case nir_op_imin:
794 result = ac_build_imin(&ctx->ac, src[0], src[1]);
795 break;
796 case nir_op_umax:
797 result = ac_build_umax(&ctx->ac, src[0], src[1]);
798 break;
799 case nir_op_umin:
800 result = ac_build_umin(&ctx->ac, src[0], src[1]);
801 break;
802 case nir_op_isign:
803 result = ac_build_isign(&ctx->ac, src[0],
804 instr->dest.dest.ssa.bit_size);
805 break;
806 case nir_op_fsign:
807 src[0] = ac_to_float(&ctx->ac, src[0]);
808 result = ac_build_fsign(&ctx->ac, src[0],
809 instr->dest.dest.ssa.bit_size);
810 break;
811 case nir_op_ffloor:
812 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
813 ac_to_float_type(&ctx->ac, def_type), src[0]);
814 break;
815 case nir_op_ftrunc:
816 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
817 ac_to_float_type(&ctx->ac, def_type), src[0]);
818 break;
819 case nir_op_fceil:
820 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
821 ac_to_float_type(&ctx->ac, def_type), src[0]);
822 break;
823 case nir_op_fround_even:
824 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
825 ac_to_float_type(&ctx->ac, def_type),src[0]);
826 break;
827 case nir_op_ffract:
828 src[0] = ac_to_float(&ctx->ac, src[0]);
829 result = ac_build_fract(&ctx->ac, src[0],
830 instr->dest.dest.ssa.bit_size);
831 break;
832 case nir_op_fsin:
833 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
834 ac_to_float_type(&ctx->ac, def_type), src[0]);
835 break;
836 case nir_op_fcos:
837 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
838 ac_to_float_type(&ctx->ac, def_type), src[0]);
839 break;
840 case nir_op_fsqrt:
841 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
842 ac_to_float_type(&ctx->ac, def_type), src[0]);
843 break;
844 case nir_op_fexp2:
845 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
846 ac_to_float_type(&ctx->ac, def_type), src[0]);
847 break;
848 case nir_op_flog2:
849 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
850 ac_to_float_type(&ctx->ac, def_type), src[0]);
851 break;
852 case nir_op_frsq:
853 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
854 ac_to_float_type(&ctx->ac, def_type), src[0]);
855 break;
856 case nir_op_frexp_exp:
857 src[0] = ac_to_float(&ctx->ac, src[0]);
858 result = ac_build_frexp_exp(&ctx->ac, src[0],
859 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
860 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
861 result = LLVMBuildSExt(ctx->ac.builder, result,
862 ctx->ac.i32, "");
863 break;
864 case nir_op_frexp_sig:
865 src[0] = ac_to_float(&ctx->ac, src[0]);
866 result = ac_build_frexp_mant(&ctx->ac, src[0],
867 instr->dest.dest.ssa.bit_size);
868 break;
869 case nir_op_fpow:
870 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
871 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
872 break;
873 case nir_op_fmax:
874 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
875 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
876 if (ctx->ac.chip_class < GFX9 &&
877 instr->dest.dest.ssa.bit_size == 32) {
878 /* Only pre-GFX9 chips do not flush denorms. */
879 result = ac_build_canonicalize(&ctx->ac, result,
880 instr->dest.dest.ssa.bit_size);
881 }
882 break;
883 case nir_op_fmin:
884 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
885 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
886 if (ctx->ac.chip_class < GFX9 &&
887 instr->dest.dest.ssa.bit_size == 32) {
888 /* Only pre-GFX9 chips do not flush denorms. */
889 result = ac_build_canonicalize(&ctx->ac, result,
890 instr->dest.dest.ssa.bit_size);
891 }
892 break;
893 case nir_op_ffma:
894 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
895 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
896 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
897 break;
898 case nir_op_ldexp:
899 src[0] = ac_to_float(&ctx->ac, src[0]);
900 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
901 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
902 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
903 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
904 else
905 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
906 break;
907 case nir_op_bfm:
908 result = emit_bfm(&ctx->ac, src[0], src[1]);
909 break;
910 case nir_op_bitfield_select:
911 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
912 break;
913 case nir_op_ubfe:
914 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
915 break;
916 case nir_op_ibfe:
917 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
918 break;
919 case nir_op_bitfield_reverse:
920 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
921 break;
922 case nir_op_bit_count:
923 result = ac_build_bit_count(&ctx->ac, src[0]);
924 break;
925 case nir_op_vec2:
926 case nir_op_vec3:
927 case nir_op_vec4:
928 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
929 src[i] = ac_to_integer(&ctx->ac, src[i]);
930 result = ac_build_gather_values(&ctx->ac, src, num_components);
931 break;
932 case nir_op_f2i8:
933 case nir_op_f2i16:
934 case nir_op_f2i32:
935 case nir_op_f2i64:
936 src[0] = ac_to_float(&ctx->ac, src[0]);
937 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
938 break;
939 case nir_op_f2u8:
940 case nir_op_f2u16:
941 case nir_op_f2u32:
942 case nir_op_f2u64:
943 src[0] = ac_to_float(&ctx->ac, src[0]);
944 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
945 break;
946 case nir_op_i2f16:
947 case nir_op_i2f32:
948 case nir_op_i2f64:
949 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
950 break;
951 case nir_op_u2f16:
952 case nir_op_u2f32:
953 case nir_op_u2f64:
954 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
955 break;
956 case nir_op_f2f16_rtz:
957 case nir_op_f2f16:
958 case nir_op_f2fmp:
959 src[0] = ac_to_float(&ctx->ac, src[0]);
960
961 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
962 * all f32->f16 conversions have to round towards zero, because both scalar
963 * and vec2 down-conversions have to round equally.
964 */
965 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
966 instr->op == nir_op_f2f16_rtz) {
967 src[0] = ac_to_float(&ctx->ac, src[0]);
968
969 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
970 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
971
972 /* Fast path conversion. This only works if NIR is vectorized
973 * to vec2 16.
974 */
975 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
976 LLVMValueRef args[] = {
977 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
978 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
979 };
980 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
981 break;
982 }
983
984 assert(ac_get_llvm_num_components(src[0]) == 1);
985 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
986 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
987 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
988 } else {
989 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
990 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
991 else
992 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
993 }
994 break;
995 case nir_op_f2f16_rtne:
996 case nir_op_f2f32:
997 case nir_op_f2f64:
998 src[0] = ac_to_float(&ctx->ac, src[0]);
999 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1000 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1001 else
1002 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1003 break;
1004 case nir_op_u2u8:
1005 case nir_op_u2u16:
1006 case nir_op_u2ump:
1007 case nir_op_u2u32:
1008 case nir_op_u2u64:
1009 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1010 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1011 else
1012 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1013 break;
1014 case nir_op_i2i8:
1015 case nir_op_i2i16:
1016 case nir_op_i2imp:
1017 case nir_op_i2i32:
1018 case nir_op_i2i64:
1019 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1020 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1021 else
1022 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1023 break;
1024 case nir_op_b32csel:
1025 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1026 break;
1027 case nir_op_find_lsb:
1028 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1029 break;
1030 case nir_op_ufind_msb:
1031 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1032 break;
1033 case nir_op_ifind_msb:
1034 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1035 break;
1036 case nir_op_uadd_carry:
1037 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1038 break;
1039 case nir_op_usub_borrow:
1040 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1041 break;
1042 case nir_op_b2f16:
1043 case nir_op_b2f32:
1044 case nir_op_b2f64:
1045 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1046 break;
1047 case nir_op_f2b32:
1048 result = emit_f2b(&ctx->ac, src[0]);
1049 break;
1050 case nir_op_b2i8:
1051 case nir_op_b2i16:
1052 case nir_op_b2i32:
1053 case nir_op_b2i64:
1054 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1055 break;
1056 case nir_op_i2b32:
1057 result = emit_i2b(&ctx->ac, src[0]);
1058 break;
1059 case nir_op_fquantize2f16:
1060 result = emit_f2f16(&ctx->ac, src[0]);
1061 break;
1062 case nir_op_umul_high:
1063 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1064 break;
1065 case nir_op_imul_high:
1066 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1067 break;
1068 case nir_op_pack_half_2x16:
1069 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1070 break;
1071 case nir_op_pack_snorm_2x16:
1072 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1073 break;
1074 case nir_op_pack_unorm_2x16:
1075 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1076 break;
1077 case nir_op_unpack_half_2x16:
1078 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1079 break;
1080 case nir_op_fddx:
1081 case nir_op_fddy:
1082 case nir_op_fddx_fine:
1083 case nir_op_fddy_fine:
1084 case nir_op_fddx_coarse:
1085 case nir_op_fddy_coarse:
1086 result = emit_ddxy(ctx, instr->op, src[0]);
1087 break;
1088
1089 case nir_op_unpack_64_2x32_split_x: {
1090 assert(ac_get_llvm_num_components(src[0]) == 1);
1091 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1092 ctx->ac.v2i32,
1093 "");
1094 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1095 ctx->ac.i32_0, "");
1096 break;
1097 }
1098
1099 case nir_op_unpack_64_2x32_split_y: {
1100 assert(ac_get_llvm_num_components(src[0]) == 1);
1101 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1102 ctx->ac.v2i32,
1103 "");
1104 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1105 ctx->ac.i32_1, "");
1106 break;
1107 }
1108
1109 case nir_op_pack_64_2x32_split: {
1110 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1111 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1112 break;
1113 }
1114
1115 case nir_op_pack_32_2x16_split: {
1116 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1117 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1118 break;
1119 }
1120
1121 case nir_op_unpack_32_2x16_split_x: {
1122 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1123 ctx->ac.v2i16,
1124 "");
1125 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1126 ctx->ac.i32_0, "");
1127 break;
1128 }
1129
1130 case nir_op_unpack_32_2x16_split_y: {
1131 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1132 ctx->ac.v2i16,
1133 "");
1134 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1135 ctx->ac.i32_1, "");
1136 break;
1137 }
1138
1139 case nir_op_cube_face_coord: {
1140 src[0] = ac_to_float(&ctx->ac, src[0]);
1141 LLVMValueRef results[2];
1142 LLVMValueRef in[3];
1143 for (unsigned chan = 0; chan < 3; chan++)
1144 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1145 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1146 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1147 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1148 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1149 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1150 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1151 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1152 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1153 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1154 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1155 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1156 result = ac_build_gather_values(&ctx->ac, results, 2);
1157 break;
1158 }
1159
1160 case nir_op_cube_face_index: {
1161 src[0] = ac_to_float(&ctx->ac, src[0]);
1162 LLVMValueRef in[3];
1163 for (unsigned chan = 0; chan < 3; chan++)
1164 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1165 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1166 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1167 break;
1168 }
1169
1170 case nir_op_fmin3:
1171 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1172 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1173 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1174 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1175 break;
1176 case nir_op_umin3:
1177 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1178 result = ac_build_umin(&ctx->ac, result, src[2]);
1179 break;
1180 case nir_op_imin3:
1181 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1182 result = ac_build_imin(&ctx->ac, result, src[2]);
1183 break;
1184 case nir_op_fmax3:
1185 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1186 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1187 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1188 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1189 break;
1190 case nir_op_umax3:
1191 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1192 result = ac_build_umax(&ctx->ac, result, src[2]);
1193 break;
1194 case nir_op_imax3:
1195 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1196 result = ac_build_imax(&ctx->ac, result, src[2]);
1197 break;
1198 case nir_op_fmed3: {
1199 src[0] = ac_to_float(&ctx->ac, src[0]);
1200 src[1] = ac_to_float(&ctx->ac, src[1]);
1201 src[2] = ac_to_float(&ctx->ac, src[2]);
1202 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1203 instr->dest.dest.ssa.bit_size);
1204 break;
1205 }
1206 case nir_op_imed3: {
1207 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1208 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1209 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1210 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1211 break;
1212 }
1213 case nir_op_umed3: {
1214 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1215 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1216 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1217 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1218 break;
1219 }
1220
1221 default:
1222 fprintf(stderr, "Unknown NIR alu instr: ");
1223 nir_print_instr(&instr->instr, stderr);
1224 fprintf(stderr, "\n");
1225 abort();
1226 }
1227
1228 if (result) {
1229 assert(instr->dest.dest.is_ssa);
1230 result = ac_to_integer_or_pointer(&ctx->ac, result);
1231 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1232 }
1233
1234 if (instr->exact)
1235 ac_restore_inexact_math(ctx->ac.builder, saved_inexact);
1236 }
1237
1238 static void visit_load_const(struct ac_nir_context *ctx,
1239 const nir_load_const_instr *instr)
1240 {
1241 LLVMValueRef values[4], value = NULL;
1242 LLVMTypeRef element_type =
1243 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1244
1245 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1246 switch (instr->def.bit_size) {
1247 case 8:
1248 values[i] = LLVMConstInt(element_type,
1249 instr->value[i].u8, false);
1250 break;
1251 case 16:
1252 values[i] = LLVMConstInt(element_type,
1253 instr->value[i].u16, false);
1254 break;
1255 case 32:
1256 values[i] = LLVMConstInt(element_type,
1257 instr->value[i].u32, false);
1258 break;
1259 case 64:
1260 values[i] = LLVMConstInt(element_type,
1261 instr->value[i].u64, false);
1262 break;
1263 default:
1264 fprintf(stderr,
1265 "unsupported nir load_const bit_size: %d\n",
1266 instr->def.bit_size);
1267 abort();
1268 }
1269 }
1270 if (instr->def.num_components > 1) {
1271 value = LLVMConstVector(values, instr->def.num_components);
1272 } else
1273 value = values[0];
1274
1275 ctx->ssa_defs[instr->def.index] = value;
1276 }
1277
1278 static LLVMValueRef
1279 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1280 {
1281 LLVMValueRef size =
1282 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1283 LLVMConstInt(ctx->ac.i32, 2, false), "");
1284
1285 /* GFX8 only */
1286 if (ctx->ac.chip_class == GFX8 && in_elements) {
1287 /* On GFX8, the descriptor contains the size in bytes,
1288 * but TXQ must return the size in elements.
1289 * The stride is always non-zero for resources using TXQ.
1290 */
1291 LLVMValueRef stride =
1292 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1293 ctx->ac.i32_1, "");
1294 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1295 LLVMConstInt(ctx->ac.i32, 16, false), "");
1296 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1297 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1298
1299 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1300 }
1301 return size;
1302 }
1303
1304 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1305 * incorrectly forces nearest filtering if the texture format is integer.
1306 * The only effect it has on Gather4, which always returns 4 texels for
1307 * bilinear filtering, is that the final coordinates are off by 0.5 of
1308 * the texel size.
1309 *
1310 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1311 * or (0.5 / size) from the normalized coordinates.
1312 *
1313 * However, cube textures with 8_8_8_8 data formats require a different
1314 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1315 * precision in 32-bit data formats, so it needs to be applied dynamically at
1316 * runtime. In this case, return an i1 value that indicates whether the
1317 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1318 */
1319 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1320 nir_variable *var,
1321 struct ac_image_args *args,
1322 const nir_tex_instr *instr)
1323 {
1324 const struct glsl_type *type = glsl_without_array(var->type);
1325 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1326 LLVMValueRef wa_8888 = NULL;
1327 LLVMValueRef half_texel[2];
1328 LLVMValueRef result;
1329
1330 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1331
1332 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1333 LLVMValueRef formats;
1334 LLVMValueRef data_format;
1335 LLVMValueRef wa_formats;
1336
1337 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1338
1339 data_format = LLVMBuildLShr(ctx->builder, formats,
1340 LLVMConstInt(ctx->i32, 20, false), "");
1341 data_format = LLVMBuildAnd(ctx->builder, data_format,
1342 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1343 wa_8888 = LLVMBuildICmp(
1344 ctx->builder, LLVMIntEQ, data_format,
1345 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1346 "");
1347
1348 uint32_t wa_num_format =
1349 stype == GLSL_TYPE_UINT ?
1350 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1351 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1352 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1353 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1354 "");
1355 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1356 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1357
1358 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1359 args->resource = LLVMBuildInsertElement(
1360 ctx->builder, args->resource, formats, ctx->i32_1, "");
1361 }
1362
1363 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1364 assert(!wa_8888);
1365 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1366 } else {
1367 struct ac_image_args resinfo = {};
1368 LLVMBasicBlockRef bbs[2];
1369
1370 LLVMValueRef unnorm = NULL;
1371 LLVMValueRef default_offset = ctx->f32_0;
1372 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1373 !instr->is_array) {
1374 /* In vulkan, whether the sampler uses unnormalized
1375 * coordinates or not is a dynamic property of the
1376 * sampler. Hence, to figure out whether or not we
1377 * need to divide by the texture size, we need to test
1378 * the sampler at runtime. This tests the bit set by
1379 * radv_init_sampler().
1380 */
1381 LLVMValueRef sampler0 =
1382 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1383 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1384 LLVMConstInt(ctx->i32, 15, false), "");
1385 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1386 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1387 default_offset = LLVMConstReal(ctx->f32, -0.5);
1388 }
1389
1390 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1391 if (wa_8888 || unnorm) {
1392 assert(!(wa_8888 && unnorm));
1393 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1394 /* Skip the texture size query entirely if we don't need it. */
1395 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1396 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1397 }
1398
1399 /* Query the texture size. */
1400 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1401 resinfo.opcode = ac_image_get_resinfo;
1402 resinfo.dmask = 0xf;
1403 resinfo.lod = ctx->i32_0;
1404 resinfo.resource = args->resource;
1405 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1406 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1407
1408 /* Compute -0.5 / size. */
1409 for (unsigned c = 0; c < 2; c++) {
1410 half_texel[c] =
1411 LLVMBuildExtractElement(ctx->builder, size,
1412 LLVMConstInt(ctx->i32, c, 0), "");
1413 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1414 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1415 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1416 LLVMConstReal(ctx->f32, -0.5), "");
1417 }
1418
1419 if (wa_8888 || unnorm) {
1420 ac_build_endif(ctx, 2000);
1421
1422 for (unsigned c = 0; c < 2; c++) {
1423 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1424 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1425 values, bbs);
1426 }
1427 }
1428 }
1429
1430 for (unsigned c = 0; c < 2; c++) {
1431 LLVMValueRef tmp;
1432 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1433 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1434 }
1435
1436 args->attributes = AC_FUNC_ATTR_READNONE;
1437 result = ac_build_image_opcode(ctx, args);
1438
1439 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1440 LLVMValueRef tmp, tmp2;
1441
1442 /* if the cube workaround is in place, f2i the result. */
1443 for (unsigned c = 0; c < 4; c++) {
1444 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1445 if (stype == GLSL_TYPE_UINT)
1446 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1447 else
1448 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1449 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1450 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1451 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1452 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1453 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1454 }
1455 }
1456 return result;
1457 }
1458
1459 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1460 {
1461 nir_deref_instr *texture_deref_instr = NULL;
1462
1463 for (unsigned i = 0; i < instr->num_srcs; i++) {
1464 switch (instr->src[i].src_type) {
1465 case nir_tex_src_texture_deref:
1466 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1467 break;
1468 default:
1469 break;
1470 }
1471 }
1472 return texture_deref_instr;
1473 }
1474
1475 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1476 const nir_tex_instr *instr,
1477 struct ac_image_args *args)
1478 {
1479 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1480 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1481
1482 assert(instr->dest.is_ssa);
1483 return ac_build_buffer_load_format(&ctx->ac,
1484 args->resource,
1485 args->coords[0],
1486 ctx->ac.i32_0,
1487 util_last_bit(mask),
1488 0, true,
1489 instr->dest.ssa.bit_size == 16);
1490 }
1491
1492 args->opcode = ac_image_sample;
1493
1494 switch (instr->op) {
1495 case nir_texop_txf:
1496 case nir_texop_txf_ms:
1497 case nir_texop_samples_identical:
1498 args->opcode = args->level_zero ||
1499 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1500 ac_image_load : ac_image_load_mip;
1501 args->level_zero = false;
1502 break;
1503 case nir_texop_txs:
1504 case nir_texop_query_levels:
1505 args->opcode = ac_image_get_resinfo;
1506 if (!args->lod)
1507 args->lod = ctx->ac.i32_0;
1508 args->level_zero = false;
1509 break;
1510 case nir_texop_tex:
1511 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1512 assert(!args->lod);
1513 args->level_zero = true;
1514 }
1515 break;
1516 case nir_texop_tg4:
1517 args->opcode = ac_image_gather4;
1518 if (!args->lod && !args->bias)
1519 args->level_zero = true;
1520 break;
1521 case nir_texop_lod:
1522 args->opcode = ac_image_get_lod;
1523 break;
1524 case nir_texop_fragment_fetch:
1525 case nir_texop_fragment_mask_fetch:
1526 args->opcode = ac_image_load;
1527 args->level_zero = false;
1528 break;
1529 default:
1530 break;
1531 }
1532
1533 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1534 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1535 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1536 const struct glsl_type *type = glsl_without_array(var->type);
1537 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1538 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1539 return lower_gather4_integer(&ctx->ac, var, args, instr);
1540 }
1541 }
1542
1543 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1544 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1545 if ((args->dim == ac_image_2darray ||
1546 args->dim == ac_image_2d) && !args->coords[1]) {
1547 args->coords[1] = ctx->ac.i32_0;
1548 }
1549 }
1550
1551 args->attributes = AC_FUNC_ATTR_READNONE;
1552 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1553 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1554 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1555 /* Prevent texture instructions with implicit derivatives from being
1556 * sinked into branches. */
1557 switch (instr->op) {
1558 case nir_texop_tex:
1559 case nir_texop_txb:
1560 case nir_texop_lod:
1561 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1562 break;
1563 default:
1564 break;
1565 }
1566 }
1567
1568 return ac_build_image_opcode(&ctx->ac, args);
1569 }
1570
1571 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1572 nir_intrinsic_instr *instr)
1573 {
1574 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1575 LLVMValueRef index = get_src(ctx, instr->src[1]);
1576
1577 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1578 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1579 return result;
1580 }
1581
1582 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1583 nir_intrinsic_instr *instr)
1584 {
1585 LLVMValueRef ptr, addr;
1586 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1587 unsigned index = nir_intrinsic_base(instr);
1588
1589 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1590 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1591
1592 /* Load constant values from user SGPRS when possible, otherwise
1593 * fallback to the default path that loads directly from memory.
1594 */
1595 if (LLVMIsConstant(src0) &&
1596 instr->dest.ssa.bit_size == 32) {
1597 unsigned count = instr->dest.ssa.num_components;
1598 unsigned offset = index;
1599
1600 offset += LLVMConstIntGetZExtValue(src0);
1601 offset /= 4;
1602
1603 offset -= ctx->args->base_inline_push_consts;
1604
1605 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1606 if (offset + count <= num_inline_push_consts) {
1607 LLVMValueRef push_constants[num_inline_push_consts];
1608 for (unsigned i = 0; i < num_inline_push_consts; i++)
1609 push_constants[i] = ac_get_arg(&ctx->ac,
1610 ctx->args->inline_push_consts[i]);
1611 return ac_build_gather_values(&ctx->ac,
1612 push_constants + offset,
1613 count);
1614 }
1615 }
1616
1617 ptr = LLVMBuildGEP(ctx->ac.builder,
1618 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1619
1620 if (instr->dest.ssa.bit_size == 8) {
1621 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1622 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1623 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1624 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1625
1626 LLVMValueRef params[3];
1627 if (load_dwords > 1) {
1628 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1629 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1630 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1631 } else {
1632 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1633 params[0] = ctx->ac.i32_0;
1634 params[1] = res;
1635 }
1636 params[2] = addr;
1637 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1638
1639 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1640 if (instr->dest.ssa.num_components > 1)
1641 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1642 return res;
1643 } else if (instr->dest.ssa.bit_size == 16) {
1644 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1645 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1646 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1647 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1648 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1649 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1650 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1651 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1652 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1653 LLVMConstInt(ctx->ac.i32, 4, false)};
1654 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1655 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1656 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1657 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1658 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1659 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1660 }
1661
1662 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1663
1664 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1665 }
1666
1667 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1668 const nir_intrinsic_instr *instr)
1669 {
1670 LLVMValueRef index = get_src(ctx, instr->src[0]);
1671
1672 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1673 }
1674
1675 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1676 {
1677 uint32_t new_mask = 0;
1678 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1679 if (mask & (1u << i))
1680 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1681 return new_mask;
1682 }
1683
1684 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1685 unsigned start, unsigned count)
1686 {
1687 LLVMValueRef mask[] = {
1688 ctx->i32_0, ctx->i32_1,
1689 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1690
1691 unsigned src_elements = ac_get_llvm_num_components(src);
1692
1693 if (count == src_elements) {
1694 assert(start == 0);
1695 return src;
1696 } else if (count == 1) {
1697 assert(start < src_elements);
1698 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1699 } else {
1700 assert(start + count <= src_elements);
1701 assert(count <= 4);
1702 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1703 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1704 }
1705 }
1706
1707 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1708 enum gl_access_qualifier access,
1709 bool may_store_unaligned,
1710 bool writeonly_memory)
1711 {
1712 unsigned cache_policy = 0;
1713
1714 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1715 * store opcodes not aligned to a dword are affected. The only way to
1716 * get unaligned stores is through shader images.
1717 */
1718 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1719 /* If this is write-only, don't keep data in L1 to prevent
1720 * evicting L1 cache lines that may be needed by other
1721 * instructions.
1722 */
1723 writeonly_memory ||
1724 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1725 cache_policy |= ac_glc;
1726 }
1727
1728 if (access & ACCESS_STREAM_CACHE_POLICY)
1729 cache_policy |= ac_slc | ac_glc;
1730
1731 return cache_policy;
1732 }
1733
1734 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1735 struct waterfall_context *wctx,
1736 const nir_intrinsic_instr *instr,
1737 nir_src src)
1738 {
1739 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1740 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1741 }
1742
1743 static void visit_store_ssbo(struct ac_nir_context *ctx,
1744 nir_intrinsic_instr *instr)
1745 {
1746 if (ctx->ac.postponed_kill) {
1747 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1748 ctx->ac.postponed_kill, "");
1749 ac_build_ifcc(&ctx->ac, cond, 7000);
1750 }
1751
1752 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1753 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1754 unsigned writemask = nir_intrinsic_write_mask(instr);
1755 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1756 bool writeonly_memory = access & ACCESS_NON_READABLE;
1757 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1758
1759 struct waterfall_context wctx;
1760 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1761
1762 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1763 LLVMValueRef base_data = src_data;
1764 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1765 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1766
1767 while (writemask) {
1768 int start, count;
1769 LLVMValueRef data, offset;
1770 LLVMTypeRef data_type;
1771
1772 u_bit_scan_consecutive_range(&writemask, &start, &count);
1773
1774 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1775 * writes into a 2-element and a 1-element write. */
1776 if (count == 3 &&
1777 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1778 writemask |= 1 << (start + 2);
1779 count = 2;
1780 }
1781 int num_bytes = count * elem_size_bytes; /* count in bytes */
1782
1783 /* we can only store 4 DWords at the same time.
1784 * can only happen for 64 Bit vectors. */
1785 if (num_bytes > 16) {
1786 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1787 count = 2;
1788 num_bytes = 16;
1789 }
1790
1791 /* check alignment of 16 Bit stores */
1792 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1793 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1794 count = 1;
1795 num_bytes = 2;
1796 }
1797
1798 /* Due to alignment issues, split stores of 8-bit/16-bit
1799 * vectors.
1800 */
1801 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1802 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1803 count = 1;
1804 num_bytes = elem_size_bytes;
1805 }
1806
1807 data = extract_vector_range(&ctx->ac, base_data, start, count);
1808
1809 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1810 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1811
1812 if (num_bytes == 1) {
1813 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1814 offset, ctx->ac.i32_0,
1815 cache_policy);
1816 } else if (num_bytes == 2) {
1817 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1818 offset, ctx->ac.i32_0,
1819 cache_policy);
1820 } else {
1821 int num_channels = num_bytes / 4;
1822
1823 switch (num_bytes) {
1824 case 16: /* v4f32 */
1825 data_type = ctx->ac.v4f32;
1826 break;
1827 case 12: /* v3f32 */
1828 data_type = ctx->ac.v3f32;
1829 break;
1830 case 8: /* v2f32 */
1831 data_type = ctx->ac.v2f32;
1832 break;
1833 case 4: /* f32 */
1834 data_type = ctx->ac.f32;
1835 break;
1836 default:
1837 unreachable("Malformed vector store.");
1838 }
1839 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1840
1841 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1842 num_channels, offset,
1843 ctx->ac.i32_0, 0,
1844 cache_policy);
1845 }
1846 }
1847
1848 exit_waterfall(ctx, &wctx, NULL);
1849
1850 if (ctx->ac.postponed_kill)
1851 ac_build_endif(&ctx->ac, 7000);
1852 }
1853
1854 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1855 LLVMValueRef descriptor,
1856 LLVMValueRef offset,
1857 LLVMValueRef compare,
1858 LLVMValueRef exchange)
1859 {
1860 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1861 if (ctx->abi->robust_buffer_access) {
1862 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1863
1864 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1865 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1866
1867 ac_build_ifcc(&ctx->ac, cond, -1);
1868
1869 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1870 }
1871
1872 LLVMValueRef ptr_parts[2] = {
1873 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1874 LLVMBuildAnd(ctx->ac.builder,
1875 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1876 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1877 };
1878
1879 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1880 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1881
1882 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1883
1884 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1885 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1886 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1887 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1888
1889 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1890 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1891
1892 if (ctx->abi->robust_buffer_access) {
1893 ac_build_endif(&ctx->ac, -1);
1894
1895 LLVMBasicBlockRef incoming_blocks[2] = {
1896 start_block,
1897 then_block,
1898 };
1899
1900 LLVMValueRef incoming_values[2] = {
1901 LLVMConstInt(ctx->ac.i64, 0, 0),
1902 result,
1903 };
1904 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1905 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1906 return ret;
1907 } else {
1908 return result;
1909 }
1910 }
1911
1912 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1913 nir_intrinsic_instr *instr)
1914 {
1915 if (ctx->ac.postponed_kill) {
1916 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1917 ctx->ac.postponed_kill, "");
1918 ac_build_ifcc(&ctx->ac, cond, 7001);
1919 }
1920
1921 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1922 const char *op;
1923 char name[64], type[8];
1924 LLVMValueRef params[6], descriptor;
1925 LLVMValueRef result;
1926 int arg_count = 0;
1927
1928 struct waterfall_context wctx;
1929 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1930
1931 switch (instr->intrinsic) {
1932 case nir_intrinsic_ssbo_atomic_add:
1933 op = "add";
1934 break;
1935 case nir_intrinsic_ssbo_atomic_imin:
1936 op = "smin";
1937 break;
1938 case nir_intrinsic_ssbo_atomic_umin:
1939 op = "umin";
1940 break;
1941 case nir_intrinsic_ssbo_atomic_imax:
1942 op = "smax";
1943 break;
1944 case nir_intrinsic_ssbo_atomic_umax:
1945 op = "umax";
1946 break;
1947 case nir_intrinsic_ssbo_atomic_and:
1948 op = "and";
1949 break;
1950 case nir_intrinsic_ssbo_atomic_or:
1951 op = "or";
1952 break;
1953 case nir_intrinsic_ssbo_atomic_xor:
1954 op = "xor";
1955 break;
1956 case nir_intrinsic_ssbo_atomic_exchange:
1957 op = "swap";
1958 break;
1959 case nir_intrinsic_ssbo_atomic_comp_swap:
1960 op = "cmpswap";
1961 break;
1962 default:
1963 abort();
1964 }
1965
1966 descriptor = ctx->abi->load_ssbo(ctx->abi,
1967 rsrc_base,
1968 true);
1969
1970 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1971 return_type == ctx->ac.i64) {
1972 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1973 get_src(ctx, instr->src[1]),
1974 get_src(ctx, instr->src[2]),
1975 get_src(ctx, instr->src[3]));
1976 } else {
1977 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1978 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1979 }
1980 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1981 params[arg_count++] = descriptor;
1982
1983 if (LLVM_VERSION_MAJOR >= 9) {
1984 /* XXX: The new raw/struct atomic intrinsics are buggy with
1985 * LLVM 8, see r358579.
1986 */
1987 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1988 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1989 params[arg_count++] = ctx->ac.i32_0; /* slc */
1990
1991 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1992 snprintf(name, sizeof(name),
1993 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1994 } else {
1995 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1996 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1997 params[arg_count++] = ctx->ac.i1false; /* slc */
1998
1999 assert(return_type == ctx->ac.i32);
2000 snprintf(name, sizeof(name),
2001 "llvm.amdgcn.buffer.atomic.%s", op);
2002 }
2003
2004 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
2005 arg_count, 0);
2006 }
2007
2008 result = exit_waterfall(ctx, &wctx, result);
2009 if (ctx->ac.postponed_kill)
2010 ac_build_endif(&ctx->ac, 7001);
2011 return result;
2012 }
2013
2014 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
2015 nir_intrinsic_instr *instr)
2016 {
2017 struct waterfall_context wctx;
2018 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
2019
2020 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
2021 int num_components = instr->num_components;
2022 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2023 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
2024
2025 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2026 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
2027 LLVMValueRef vindex = ctx->ac.i32_0;
2028
2029 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
2030 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
2031
2032 LLVMValueRef results[4];
2033 for (int i = 0; i < num_components;) {
2034 int num_elems = num_components - i;
2035 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
2036 num_elems = 1;
2037 if (num_elems * elem_size_bytes > 16)
2038 num_elems = 16 / elem_size_bytes;
2039 int load_bytes = num_elems * elem_size_bytes;
2040
2041 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2042
2043 LLVMValueRef ret;
2044
2045 if (load_bytes == 1) {
2046 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2047 rsrc,
2048 offset,
2049 ctx->ac.i32_0,
2050 immoffset,
2051 cache_policy);
2052 } else if (load_bytes == 2) {
2053 ret = ac_build_tbuffer_load_short(&ctx->ac,
2054 rsrc,
2055 offset,
2056 ctx->ac.i32_0,
2057 immoffset,
2058 cache_policy);
2059 } else {
2060 int num_channels = util_next_power_of_two(load_bytes) / 4;
2061 bool can_speculate = access & ACCESS_CAN_REORDER;
2062
2063 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2064 vindex, offset, immoffset, 0,
2065 cache_policy, can_speculate, false);
2066 }
2067
2068 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2069 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2070 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2071
2072 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2073 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2074
2075 for (unsigned j = 0; j < num_elems; j++) {
2076 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2077 }
2078 i += num_elems;
2079 }
2080
2081 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2082 return exit_waterfall(ctx, &wctx, ret);
2083 }
2084
2085 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2086 struct waterfall_context *wctx,
2087 const nir_intrinsic_instr *instr)
2088 {
2089 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2090 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2091 }
2092
2093 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2094 nir_intrinsic_instr *instr)
2095 {
2096 struct waterfall_context wctx;
2097 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2098
2099 LLVMValueRef ret;
2100 LLVMValueRef rsrc = rsrc_base;
2101 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2102 int num_components = instr->num_components;
2103
2104 if (ctx->abi->load_ubo)
2105 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2106
2107 if (instr->dest.ssa.bit_size == 64)
2108 num_components *= 2;
2109
2110 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2111 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2112 LLVMValueRef results[num_components];
2113 for (unsigned i = 0; i < num_components; ++i) {
2114 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2115 load_bytes * i, 0);
2116
2117 if (load_bytes == 1) {
2118 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2119 rsrc,
2120 offset,
2121 ctx->ac.i32_0,
2122 immoffset,
2123 0);
2124 } else {
2125 assert(load_bytes == 2);
2126 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2127 rsrc,
2128 offset,
2129 ctx->ac.i32_0,
2130 immoffset,
2131 0);
2132 }
2133 }
2134 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2135 } else {
2136 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2137 NULL, 0, 0, true, true);
2138
2139 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2140 }
2141
2142 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2143 get_def_type(ctx, &instr->dest.ssa), "");
2144
2145 return exit_waterfall(ctx, &wctx, ret);
2146 }
2147
2148 static void
2149 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2150 bool vs_in, unsigned *vertex_index_out,
2151 LLVMValueRef *vertex_index_ref,
2152 unsigned *const_out, LLVMValueRef *indir_out)
2153 {
2154 nir_variable *var = nir_deref_instr_get_variable(instr);
2155 nir_deref_path path;
2156 unsigned idx_lvl = 1;
2157
2158 nir_deref_path_init(&path, instr, NULL);
2159
2160 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2161 if (vertex_index_ref) {
2162 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2163 if (vertex_index_out)
2164 *vertex_index_out = 0;
2165 } else {
2166 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2167 }
2168 ++idx_lvl;
2169 }
2170
2171 uint32_t const_offset = 0;
2172 LLVMValueRef offset = NULL;
2173
2174 if (var->data.compact) {
2175 assert(instr->deref_type == nir_deref_type_array);
2176 const_offset = nir_src_as_uint(instr->arr.index);
2177 goto out;
2178 }
2179
2180 for (; path.path[idx_lvl]; ++idx_lvl) {
2181 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2182 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2183 unsigned index = path.path[idx_lvl]->strct.index;
2184
2185 for (unsigned i = 0; i < index; i++) {
2186 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2187 const_offset += glsl_count_attribute_slots(ft, vs_in);
2188 }
2189 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2190 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2191 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2192 const_offset += size *
2193 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2194 } else {
2195 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2196 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2197 if (offset)
2198 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2199 else
2200 offset = array_off;
2201 }
2202 } else
2203 unreachable("Uhandled deref type in get_deref_instr_offset");
2204 }
2205
2206 out:
2207 nir_deref_path_finish(&path);
2208
2209 if (const_offset && offset)
2210 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2211 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2212 "");
2213
2214 *const_out = const_offset;
2215 *indir_out = offset;
2216 }
2217
2218 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2219 nir_intrinsic_instr *instr,
2220 bool load_inputs)
2221 {
2222 LLVMValueRef result;
2223 LLVMValueRef vertex_index = NULL;
2224 LLVMValueRef indir_index = NULL;
2225 unsigned const_index = 0;
2226
2227 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2228
2229 unsigned location = var->data.location;
2230 unsigned driver_location = var->data.driver_location;
2231 const bool is_patch = var->data.patch ||
2232 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2233 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2234 const bool is_compact = var->data.compact;
2235
2236 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2237 false, NULL, is_patch ? NULL : &vertex_index,
2238 &const_index, &indir_index);
2239
2240 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2241
2242 LLVMTypeRef src_component_type;
2243 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2244 src_component_type = LLVMGetElementType(dest_type);
2245 else
2246 src_component_type = dest_type;
2247
2248 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2249 vertex_index, indir_index,
2250 const_index, location, driver_location,
2251 var->data.location_frac,
2252 instr->num_components,
2253 is_patch, is_compact, load_inputs);
2254 if (instr->dest.ssa.bit_size == 16) {
2255 result = ac_to_integer(&ctx->ac, result);
2256 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2257 }
2258 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2259 }
2260
2261 static unsigned
2262 type_scalar_size_bytes(const struct glsl_type *type)
2263 {
2264 assert(glsl_type_is_vector_or_scalar(type) ||
2265 glsl_type_is_matrix(type));
2266 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2267 }
2268
2269 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2270 nir_intrinsic_instr *instr)
2271 {
2272 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2273 nir_variable *var = nir_deref_instr_get_variable(deref);
2274
2275 LLVMValueRef values[8];
2276 int idx = 0;
2277 int ve = instr->dest.ssa.num_components;
2278 unsigned comp = 0;
2279 LLVMValueRef indir_index;
2280 LLVMValueRef ret;
2281 unsigned const_index;
2282 unsigned stride = 4;
2283 int mode = deref->mode;
2284
2285 if (var) {
2286 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2287 var->data.mode == nir_var_shader_in;
2288 idx = var->data.driver_location;
2289 comp = var->data.location_frac;
2290 mode = var->data.mode;
2291
2292 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2293 &const_index, &indir_index);
2294
2295 if (var->data.compact) {
2296 stride = 1;
2297 const_index += comp;
2298 comp = 0;
2299 }
2300 }
2301
2302 if (instr->dest.ssa.bit_size == 64 &&
2303 (deref->mode == nir_var_shader_in ||
2304 deref->mode == nir_var_shader_out ||
2305 deref->mode == nir_var_function_temp))
2306 ve *= 2;
2307
2308 switch (mode) {
2309 case nir_var_shader_in:
2310 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2311 ctx->stage == MESA_SHADER_TESS_EVAL) {
2312 return load_tess_varyings(ctx, instr, true);
2313 }
2314
2315 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2316 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2317 LLVMValueRef indir_index;
2318 unsigned const_index, vertex_index;
2319 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2320 &const_index, &indir_index);
2321 assert(indir_index == NULL);
2322
2323 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2324 var->data.driver_location,
2325 var->data.location_frac,
2326 instr->num_components, vertex_index, const_index, type);
2327 }
2328
2329 for (unsigned chan = comp; chan < ve + comp; chan++) {
2330 if (indir_index) {
2331 unsigned count = glsl_count_attribute_slots(
2332 var->type,
2333 ctx->stage == MESA_SHADER_VERTEX);
2334 count -= chan / 4;
2335 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2336 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2337 stride, false, true);
2338
2339 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2340 tmp_vec,
2341 indir_index, "");
2342 } else
2343 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2344 }
2345 break;
2346 case nir_var_function_temp:
2347 for (unsigned chan = 0; chan < ve; chan++) {
2348 if (indir_index) {
2349 unsigned count = glsl_count_attribute_slots(
2350 var->type, false);
2351 count -= chan / 4;
2352 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2353 &ctx->ac, ctx->locals + idx + chan, count,
2354 stride, true, true);
2355
2356 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2357 tmp_vec,
2358 indir_index, "");
2359 } else {
2360 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2361 }
2362 }
2363 break;
2364 case nir_var_shader_out:
2365 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2366 return load_tess_varyings(ctx, instr, false);
2367 }
2368
2369 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2370 var->data.fb_fetch_output &&
2371 ctx->abi->emit_fbfetch)
2372 return ctx->abi->emit_fbfetch(ctx->abi);
2373
2374 for (unsigned chan = comp; chan < ve + comp; chan++) {
2375 if (indir_index) {
2376 unsigned count = glsl_count_attribute_slots(
2377 var->type, false);
2378 count -= chan / 4;
2379 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2380 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2381 stride, true, true);
2382
2383 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2384 tmp_vec,
2385 indir_index, "");
2386 } else {
2387 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2388 ctx->abi->outputs[idx + chan + const_index * stride],
2389 "");
2390 }
2391 }
2392 break;
2393 case nir_var_mem_global: {
2394 LLVMValueRef address = get_src(ctx, instr->src[0]);
2395 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2396 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2397 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2398 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2399 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2400 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2401
2402 if (stride != natural_stride || split_loads) {
2403 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2404 result_type = LLVMGetElementType(result_type);
2405
2406 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2407 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2408 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2409
2410 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2411 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2412 values[i] = LLVMBuildLoad(ctx->ac.builder,
2413 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2414 }
2415 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2416 } else {
2417 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2418 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2419 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2420 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2421 return val;
2422 }
2423 }
2424 default:
2425 unreachable("unhandle variable mode");
2426 }
2427 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2428 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2429 }
2430
2431 static void
2432 visit_store_var(struct ac_nir_context *ctx,
2433 nir_intrinsic_instr *instr)
2434 {
2435 if (ctx->ac.postponed_kill) {
2436 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2437 ctx->ac.postponed_kill, "");
2438 ac_build_ifcc(&ctx->ac, cond, 7002);
2439 }
2440
2441 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2442 nir_variable *var = nir_deref_instr_get_variable(deref);
2443
2444 LLVMValueRef temp_ptr, value;
2445 int idx = 0;
2446 unsigned comp = 0;
2447 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2448 int writemask = instr->const_index[0];
2449 LLVMValueRef indir_index;
2450 unsigned const_index;
2451
2452 if (var) {
2453 get_deref_offset(ctx, deref, false,
2454 NULL, NULL, &const_index, &indir_index);
2455 idx = var->data.driver_location;
2456 comp = var->data.location_frac;
2457
2458 if (var->data.compact) {
2459 const_index += comp;
2460 comp = 0;
2461 }
2462 }
2463
2464 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2465 (deref->mode == nir_var_shader_out ||
2466 deref->mode == nir_var_function_temp)) {
2467
2468 src = LLVMBuildBitCast(ctx->ac.builder, src,
2469 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2470 "");
2471
2472 writemask = widen_mask(writemask, 2);
2473 }
2474
2475 writemask = writemask << comp;
2476
2477 switch (deref->mode) {
2478 case nir_var_shader_out:
2479
2480 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2481 LLVMValueRef vertex_index = NULL;
2482 LLVMValueRef indir_index = NULL;
2483 unsigned const_index = 0;
2484 const bool is_patch = var->data.patch ||
2485 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2486 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2487
2488 get_deref_offset(ctx, deref, false, NULL,
2489 is_patch ? NULL : &vertex_index,
2490 &const_index, &indir_index);
2491
2492 ctx->abi->store_tcs_outputs(ctx->abi, var,
2493 vertex_index, indir_index,
2494 const_index, src, writemask);
2495 break;
2496 }
2497
2498 for (unsigned chan = 0; chan < 8; chan++) {
2499 int stride = 4;
2500 if (!(writemask & (1 << chan)))
2501 continue;
2502
2503 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2504
2505 if (var->data.compact)
2506 stride = 1;
2507 if (indir_index) {
2508 unsigned count = glsl_count_attribute_slots(
2509 var->type, false);
2510 count -= chan / 4;
2511 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2512 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2513 stride, true, true);
2514
2515 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2516 value, indir_index, "");
2517 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2518 count, stride, tmp_vec);
2519
2520 } else {
2521 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2522
2523 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2524 }
2525 }
2526 break;
2527 case nir_var_function_temp:
2528 for (unsigned chan = 0; chan < 8; chan++) {
2529 if (!(writemask & (1 << chan)))
2530 continue;
2531
2532 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2533 if (indir_index) {
2534 unsigned count = glsl_count_attribute_slots(
2535 var->type, false);
2536 count -= chan / 4;
2537 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2538 &ctx->ac, ctx->locals + idx + chan, count,
2539 4, true, true);
2540
2541 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2542 value, indir_index, "");
2543 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2544 count, 4, tmp_vec);
2545 } else {
2546 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2547
2548 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2549 }
2550 }
2551 break;
2552
2553 case nir_var_mem_global: {
2554 int writemask = instr->const_index[0];
2555 LLVMValueRef address = get_src(ctx, instr->src[0]);
2556 LLVMValueRef val = get_src(ctx, instr->src[1]);
2557
2558 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2559 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2560 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2561 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2562 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2563
2564 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2565 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2566 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2567
2568 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2569 stride == natural_stride && !split_stores) {
2570 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2571 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2572 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2573
2574 val = LLVMBuildBitCast(ctx->ac.builder, val,
2575 LLVMGetElementType(LLVMTypeOf(address)), "");
2576 LLVMBuildStore(ctx->ac.builder, val, address);
2577 } else {
2578 LLVMTypeRef val_type = LLVMTypeOf(val);
2579 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2580 val_type = LLVMGetElementType(val_type);
2581
2582 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2583 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2584 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2585 for (unsigned chan = 0; chan < 4; chan++) {
2586 if (!(writemask & (1 << chan)))
2587 continue;
2588
2589 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2590
2591 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2592 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2593 chan);
2594 src = LLVMBuildBitCast(ctx->ac.builder, src,
2595 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2596 LLVMBuildStore(ctx->ac.builder, src, ptr);
2597 }
2598 }
2599 break;
2600 }
2601 default:
2602 abort();
2603 break;
2604 }
2605
2606 if (ctx->ac.postponed_kill)
2607 ac_build_endif(&ctx->ac, 7002);
2608 }
2609
2610 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2611 {
2612 switch (dim) {
2613 case GLSL_SAMPLER_DIM_BUF:
2614 return 1;
2615 case GLSL_SAMPLER_DIM_1D:
2616 return array ? 2 : 1;
2617 case GLSL_SAMPLER_DIM_2D:
2618 return array ? 3 : 2;
2619 case GLSL_SAMPLER_DIM_MS:
2620 return array ? 4 : 3;
2621 case GLSL_SAMPLER_DIM_3D:
2622 case GLSL_SAMPLER_DIM_CUBE:
2623 return 3;
2624 case GLSL_SAMPLER_DIM_RECT:
2625 case GLSL_SAMPLER_DIM_SUBPASS:
2626 return 2;
2627 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2628 return 3;
2629 default:
2630 break;
2631 }
2632 return 0;
2633 }
2634
2635 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2636 LLVMValueRef coord_x, LLVMValueRef coord_y,
2637 LLVMValueRef coord_z,
2638 LLVMValueRef sample_index,
2639 LLVMValueRef fmask_desc_ptr)
2640 {
2641 unsigned sample_chan = coord_z ? 3 : 2;
2642 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2643 addr[sample_chan] = sample_index;
2644
2645 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2646 return addr[sample_chan];
2647 }
2648
2649 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2650 {
2651 assert(instr->src[0].is_ssa);
2652 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2653 }
2654
2655 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2656 const nir_intrinsic_instr *instr,
2657 LLVMValueRef dynamic_index,
2658 enum ac_descriptor_type desc_type,
2659 bool write)
2660 {
2661 nir_deref_instr *deref_instr =
2662 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2663 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2664
2665 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2666 }
2667
2668 static void get_image_coords(struct ac_nir_context *ctx,
2669 const nir_intrinsic_instr *instr,
2670 LLVMValueRef dynamic_desc_index,
2671 struct ac_image_args *args,
2672 enum glsl_sampler_dim dim,
2673 bool is_array)
2674 {
2675 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2676 LLVMValueRef masks[] = {
2677 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2678 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2679 };
2680 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2681
2682 int count;
2683 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2684 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2685 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2686 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2687 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2688 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2689 count = image_type_to_components_count(dim, is_array);
2690
2691 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2692 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2693 LLVMValueRef fmask_load_address[3];
2694
2695 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2696 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2697 if (is_array)
2698 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2699 else
2700 fmask_load_address[2] = NULL;
2701
2702 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2703 fmask_load_address[0],
2704 fmask_load_address[1],
2705 fmask_load_address[2],
2706 sample_index,
2707 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2708 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2709 }
2710 if (count == 1 && !gfx9_1d) {
2711 if (instr->src[1].ssa->num_components)
2712 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2713 else
2714 args->coords[0] = src0;
2715 } else {
2716 int chan;
2717 if (is_ms)
2718 count--;
2719 for (chan = 0; chan < count; ++chan) {
2720 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2721 }
2722
2723 if (gfx9_1d) {
2724 if (is_array) {
2725 args->coords[2] = args->coords[1];
2726 args->coords[1] = ctx->ac.i32_0;
2727 } else
2728 args->coords[1] = ctx->ac.i32_0;
2729 count++;
2730 }
2731 if (ctx->ac.chip_class == GFX9 &&
2732 dim == GLSL_SAMPLER_DIM_2D &&
2733 !is_array) {
2734 /* The hw can't bind a slice of a 3D image as a 2D
2735 * image, because it ignores BASE_ARRAY if the target
2736 * is 3D. The workaround is to read BASE_ARRAY and set
2737 * it as the 3rd address operand for all 2D images.
2738 */
2739 LLVMValueRef first_layer, const5, mask;
2740
2741 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2742 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2743 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2744 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2745
2746 args->coords[count] = first_layer;
2747 count++;
2748 }
2749
2750
2751 if (is_ms) {
2752 args->coords[count] = sample_index;
2753 count++;
2754 }
2755 }
2756 }
2757
2758 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2759 const nir_intrinsic_instr *instr,
2760 LLVMValueRef dynamic_index,
2761 bool write, bool atomic)
2762 {
2763 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2764 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2765 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2766 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2767 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2768
2769 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2770 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2771 elem_count, stride, "");
2772
2773 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2774 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2775 }
2776 return rsrc;
2777 }
2778
2779 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2780 struct waterfall_context *wctx,
2781 const nir_intrinsic_instr *instr)
2782 {
2783 nir_deref_instr *deref_instr = NULL;
2784
2785 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2786 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2787
2788 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2789 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2790 }
2791
2792 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2793 const nir_intrinsic_instr *instr,
2794 bool bindless)
2795 {
2796 LLVMValueRef res;
2797
2798 enum glsl_sampler_dim dim;
2799 enum gl_access_qualifier access;
2800 bool is_array;
2801 if (bindless) {
2802 dim = nir_intrinsic_image_dim(instr);
2803 access = nir_intrinsic_access(instr);
2804 is_array = nir_intrinsic_image_array(instr);
2805 } else {
2806 const nir_deref_instr *image_deref = get_image_deref(instr);
2807 const struct glsl_type *type = image_deref->type;
2808 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2809 dim = glsl_get_sampler_dim(type);
2810 access = var->data.access;
2811 is_array = glsl_sampler_type_is_array(type);
2812 }
2813
2814 struct waterfall_context wctx;
2815 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2816
2817 struct ac_image_args args = {};
2818
2819 args.cache_policy = get_cache_policy(ctx, access, false, false);
2820
2821 if (dim == GLSL_SAMPLER_DIM_BUF) {
2822 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2823 unsigned num_channels = util_last_bit(mask);
2824 LLVMValueRef rsrc, vindex;
2825
2826 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2827 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2828 ctx->ac.i32_0, "");
2829
2830 assert(instr->dest.is_ssa);
2831 bool can_speculate = access & ACCESS_CAN_REORDER;
2832 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2833 ctx->ac.i32_0, num_channels,
2834 args.cache_policy,
2835 can_speculate,
2836 instr->dest.ssa.bit_size == 16);
2837 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2838
2839 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2840 res = ac_to_integer(&ctx->ac, res);
2841 } else {
2842 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2843
2844 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2845 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2846 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2847 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2848 if (!level_zero)
2849 args.lod = get_src(ctx, instr->src[3]);
2850 args.dmask = 15;
2851 args.attributes = AC_FUNC_ATTR_READONLY;
2852
2853 assert(instr->dest.is_ssa);
2854 args.d16 = instr->dest.ssa.bit_size == 16;
2855
2856 res = ac_build_image_opcode(&ctx->ac, &args);
2857 }
2858 return exit_waterfall(ctx, &wctx, res);
2859 }
2860
2861 static void visit_image_store(struct ac_nir_context *ctx,
2862 const nir_intrinsic_instr *instr,
2863 bool bindless)
2864 {
2865 if (ctx->ac.postponed_kill) {
2866 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2867 ctx->ac.postponed_kill, "");
2868 ac_build_ifcc(&ctx->ac, cond, 7003);
2869 }
2870
2871 enum glsl_sampler_dim dim;
2872 enum gl_access_qualifier access;
2873 bool is_array;
2874
2875 if (bindless) {
2876 dim = nir_intrinsic_image_dim(instr);
2877 access = nir_intrinsic_access(instr);
2878 is_array = nir_intrinsic_image_array(instr);
2879 } else {
2880 const nir_deref_instr *image_deref = get_image_deref(instr);
2881 const struct glsl_type *type = image_deref->type;
2882 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2883 dim = glsl_get_sampler_dim(type);
2884 access = var->data.access;
2885 is_array = glsl_sampler_type_is_array(type);
2886 }
2887
2888 struct waterfall_context wctx;
2889 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2890
2891 bool writeonly_memory = access & ACCESS_NON_READABLE;
2892 struct ac_image_args args = {};
2893
2894 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2895
2896 if (dim == GLSL_SAMPLER_DIM_BUF) {
2897 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2898 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2899 unsigned src_channels = ac_get_llvm_num_components(src);
2900 LLVMValueRef vindex;
2901
2902 if (src_channels == 3)
2903 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2904
2905 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2906 get_src(ctx, instr->src[1]),
2907 ctx->ac.i32_0, "");
2908
2909 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2910 ctx->ac.i32_0, args.cache_policy);
2911 } else {
2912 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2913
2914 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2915 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2916 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2917 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2918 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2919 if (!level_zero)
2920 args.lod = get_src(ctx, instr->src[4]);
2921 args.dmask = 15;
2922 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2923
2924 ac_build_image_opcode(&ctx->ac, &args);
2925 }
2926
2927 exit_waterfall(ctx, &wctx, NULL);
2928 if (ctx->ac.postponed_kill)
2929 ac_build_endif(&ctx->ac, 7003);
2930 }
2931
2932 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2933 const nir_intrinsic_instr *instr,
2934 bool bindless)
2935 {
2936 if (ctx->ac.postponed_kill) {
2937 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2938 ctx->ac.postponed_kill, "");
2939 ac_build_ifcc(&ctx->ac, cond, 7004);
2940 }
2941
2942 LLVMValueRef params[7];
2943 int param_count = 0;
2944
2945 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2946 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2947 const char *atomic_name;
2948 char intrinsic_name[64];
2949 enum ac_atomic_op atomic_subop;
2950 ASSERTED int length;
2951
2952 enum glsl_sampler_dim dim;
2953 bool is_array;
2954 if (bindless) {
2955 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2956 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2957 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2958 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2959 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2960 assert(format == GL_R32UI || format == GL_R32I);
2961 }
2962 dim = nir_intrinsic_image_dim(instr);
2963 is_array = nir_intrinsic_image_array(instr);
2964 } else {
2965 const struct glsl_type *type = get_image_deref(instr)->type;
2966 dim = glsl_get_sampler_dim(type);
2967 is_array = glsl_sampler_type_is_array(type);
2968 }
2969
2970 struct waterfall_context wctx;
2971 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2972
2973 switch (instr->intrinsic) {
2974 case nir_intrinsic_bindless_image_atomic_add:
2975 case nir_intrinsic_image_deref_atomic_add:
2976 atomic_name = "add";
2977 atomic_subop = ac_atomic_add;
2978 break;
2979 case nir_intrinsic_bindless_image_atomic_imin:
2980 case nir_intrinsic_image_deref_atomic_imin:
2981 atomic_name = "smin";
2982 atomic_subop = ac_atomic_smin;
2983 break;
2984 case nir_intrinsic_bindless_image_atomic_umin:
2985 case nir_intrinsic_image_deref_atomic_umin:
2986 atomic_name = "umin";
2987 atomic_subop = ac_atomic_umin;
2988 break;
2989 case nir_intrinsic_bindless_image_atomic_imax:
2990 case nir_intrinsic_image_deref_atomic_imax:
2991 atomic_name = "smax";
2992 atomic_subop = ac_atomic_smax;
2993 break;
2994 case nir_intrinsic_bindless_image_atomic_umax:
2995 case nir_intrinsic_image_deref_atomic_umax:
2996 atomic_name = "umax";
2997 atomic_subop = ac_atomic_umax;
2998 break;
2999 case nir_intrinsic_bindless_image_atomic_and:
3000 case nir_intrinsic_image_deref_atomic_and:
3001 atomic_name = "and";
3002 atomic_subop = ac_atomic_and;
3003 break;
3004 case nir_intrinsic_bindless_image_atomic_or:
3005 case nir_intrinsic_image_deref_atomic_or:
3006 atomic_name = "or";
3007 atomic_subop = ac_atomic_or;
3008 break;
3009 case nir_intrinsic_bindless_image_atomic_xor:
3010 case nir_intrinsic_image_deref_atomic_xor:
3011 atomic_name = "xor";
3012 atomic_subop = ac_atomic_xor;
3013 break;
3014 case nir_intrinsic_bindless_image_atomic_exchange:
3015 case nir_intrinsic_image_deref_atomic_exchange:
3016 atomic_name = "swap";
3017 atomic_subop = ac_atomic_swap;
3018 break;
3019 case nir_intrinsic_bindless_image_atomic_comp_swap:
3020 case nir_intrinsic_image_deref_atomic_comp_swap:
3021 atomic_name = "cmpswap";
3022 atomic_subop = 0; /* not used */
3023 break;
3024 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3025 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3026 atomic_name = "inc";
3027 atomic_subop = ac_atomic_inc_wrap;
3028 /* ATOMIC_INC instruction does:
3029 * value = (value + 1) % (data + 1)
3030 * but we want:
3031 * value = (value + 1) % data
3032 * So replace 'data' by 'data - 1'.
3033 */
3034 ctx->ssa_defs[instr->src[3].ssa->index] =
3035 LLVMBuildSub(ctx->ac.builder,
3036 ctx->ssa_defs[instr->src[3].ssa->index],
3037 ctx->ac.i32_1, "");
3038 break;
3039 }
3040 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3041 case nir_intrinsic_image_deref_atomic_dec_wrap:
3042 atomic_name = "dec";
3043 atomic_subop = ac_atomic_dec_wrap;
3044 break;
3045 default:
3046 abort();
3047 }
3048
3049 if (cmpswap)
3050 params[param_count++] = get_src(ctx, instr->src[4]);
3051 params[param_count++] = get_src(ctx, instr->src[3]);
3052
3053 LLVMValueRef result;
3054 if (dim == GLSL_SAMPLER_DIM_BUF) {
3055 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3056 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3057 ctx->ac.i32_0, ""); /* vindex */
3058 params[param_count++] = ctx->ac.i32_0; /* voffset */
3059 if (LLVM_VERSION_MAJOR >= 9) {
3060 /* XXX: The new raw/struct atomic intrinsics are buggy
3061 * with LLVM 8, see r358579.
3062 */
3063 params[param_count++] = ctx->ac.i32_0; /* soffset */
3064 params[param_count++] = ctx->ac.i32_0; /* slc */
3065
3066 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3067 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3068 } else {
3069 params[param_count++] = ctx->ac.i1false; /* slc */
3070
3071 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3072 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3073 }
3074
3075 assert(length < sizeof(intrinsic_name));
3076 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3077 params, param_count, 0);
3078 } else {
3079 struct ac_image_args args = {};
3080 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3081 args.atomic = atomic_subop;
3082 args.data[0] = params[0];
3083 if (cmpswap)
3084 args.data[1] = params[1];
3085 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3086 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3087 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3088
3089 result = ac_build_image_opcode(&ctx->ac, &args);
3090 }
3091
3092 result = exit_waterfall(ctx, &wctx, result);
3093 if (ctx->ac.postponed_kill)
3094 ac_build_endif(&ctx->ac, 7004);
3095 return result;
3096 }
3097
3098 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3099 nir_intrinsic_instr *instr)
3100 {
3101 struct waterfall_context wctx;
3102 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3103 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3104
3105 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3106
3107 return exit_waterfall(ctx, &wctx, ret);
3108 }
3109
3110 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3111 const nir_intrinsic_instr *instr,
3112 bool bindless)
3113 {
3114 LLVMValueRef res;
3115
3116 enum glsl_sampler_dim dim;
3117 bool is_array;
3118 if (bindless) {
3119 dim = nir_intrinsic_image_dim(instr);
3120 is_array = nir_intrinsic_image_array(instr);
3121 } else {
3122 const struct glsl_type *type = get_image_deref(instr)->type;
3123 dim = glsl_get_sampler_dim(type);
3124 is_array = glsl_sampler_type_is_array(type);
3125 }
3126
3127 struct waterfall_context wctx;
3128 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3129
3130 if (dim == GLSL_SAMPLER_DIM_BUF) {
3131 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3132 } else {
3133
3134 struct ac_image_args args = { 0 };
3135
3136 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3137 args.dmask = 0xf;
3138 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3139 args.opcode = ac_image_get_resinfo;
3140 args.lod = ctx->ac.i32_0;
3141 args.attributes = AC_FUNC_ATTR_READNONE;
3142
3143 res = ac_build_image_opcode(&ctx->ac, &args);
3144
3145 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3146
3147 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3148 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3149 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3150 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3151 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3152 }
3153
3154 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3155 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3156 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3157 ctx->ac.i32_1, "");
3158 }
3159 }
3160 return exit_waterfall(ctx, &wctx, res);
3161 }
3162
3163 static void emit_membar(struct ac_llvm_context *ac,
3164 const nir_intrinsic_instr *instr)
3165 {
3166 unsigned wait_flags = 0;
3167
3168 switch (instr->intrinsic) {
3169 case nir_intrinsic_memory_barrier:
3170 case nir_intrinsic_group_memory_barrier:
3171 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3172 break;
3173 case nir_intrinsic_memory_barrier_buffer:
3174 case nir_intrinsic_memory_barrier_image:
3175 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3176 break;
3177 case nir_intrinsic_memory_barrier_shared:
3178 wait_flags = AC_WAIT_LGKM;
3179 break;
3180 default:
3181 break;
3182 }
3183
3184 ac_build_waitcnt(ac, wait_flags);
3185 }
3186
3187 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3188 {
3189 /* GFX6 only (thanks to a hw bug workaround):
3190 * The real barrier instruction isn’t needed, because an entire patch
3191 * always fits into a single wave.
3192 */
3193 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3194 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3195 return;
3196 }
3197 ac_build_s_barrier(ac);
3198 }
3199
3200 static void emit_discard(struct ac_nir_context *ctx,
3201 const nir_intrinsic_instr *instr)
3202 {
3203 LLVMValueRef cond;
3204
3205 if (instr->intrinsic == nir_intrinsic_discard_if) {
3206 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3207 get_src(ctx, instr->src[0]),
3208 ctx->ac.i32_0, "");
3209 } else {
3210 assert(instr->intrinsic == nir_intrinsic_discard);
3211 cond = ctx->ac.i1false;
3212 }
3213
3214 ac_build_kill_if_false(&ctx->ac, cond);
3215 }
3216
3217 static void emit_demote(struct ac_nir_context *ctx,
3218 const nir_intrinsic_instr *instr)
3219 {
3220 LLVMValueRef cond;
3221
3222 if (instr->intrinsic == nir_intrinsic_demote_if) {
3223 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3224 get_src(ctx, instr->src[0]),
3225 ctx->ac.i32_0, "");
3226 } else {
3227 assert(instr->intrinsic == nir_intrinsic_demote);
3228 cond = ctx->ac.i1false;
3229 }
3230
3231 /* Kill immediately while maintaining WQM. */
3232 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3233
3234 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3235 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3236 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3237 return;
3238 }
3239
3240 static LLVMValueRef
3241 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3242 {
3243 LLVMValueRef result;
3244 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3245 result = LLVMBuildAnd(ctx->ac.builder,
3246 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3247 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3248
3249 if (ctx->ac.wave_size == 32)
3250 result = LLVMBuildLShr(ctx->ac.builder, result,
3251 LLVMConstInt(ctx->ac.i32, 1, false), "");
3252
3253 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3254 }
3255
3256 static LLVMValueRef
3257 visit_load_subgroup_id(struct ac_nir_context *ctx)
3258 {
3259 if (ctx->stage == MESA_SHADER_COMPUTE) {
3260 LLVMValueRef result;
3261 result = LLVMBuildAnd(ctx->ac.builder,
3262 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3263 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3264 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3265 } else {
3266 return LLVMConstInt(ctx->ac.i32, 0, false);
3267 }
3268 }
3269
3270 static LLVMValueRef
3271 visit_load_num_subgroups(struct ac_nir_context *ctx)
3272 {
3273 if (ctx->stage == MESA_SHADER_COMPUTE) {
3274 return LLVMBuildAnd(ctx->ac.builder,
3275 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3276 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3277 } else {
3278 return LLVMConstInt(ctx->ac.i32, 1, false);
3279 }
3280 }
3281
3282 static LLVMValueRef
3283 visit_first_invocation(struct ac_nir_context *ctx)
3284 {
3285 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3286 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3287
3288 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3289 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3290 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3291 ctx->ac.iN_wavemask, args, 2,
3292 AC_FUNC_ATTR_NOUNWIND |
3293 AC_FUNC_ATTR_READNONE);
3294
3295 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3296 }
3297
3298 static LLVMValueRef
3299 visit_load_shared(struct ac_nir_context *ctx,
3300 const nir_intrinsic_instr *instr)
3301 {
3302 LLVMValueRef values[4], derived_ptr, index, ret;
3303
3304 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3305 instr->dest.ssa.bit_size);
3306
3307 for (int chan = 0; chan < instr->num_components; chan++) {
3308 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3309 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3310 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3311 }
3312
3313 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3314 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3315 }
3316
3317 static void
3318 visit_store_shared(struct ac_nir_context *ctx,
3319 const nir_intrinsic_instr *instr)
3320 {
3321 LLVMValueRef derived_ptr, data,index;
3322 LLVMBuilderRef builder = ctx->ac.builder;
3323
3324 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3325 instr->src[0].ssa->bit_size);
3326 LLVMValueRef src = get_src(ctx, instr->src[0]);
3327
3328 int writemask = nir_intrinsic_write_mask(instr);
3329 for (int chan = 0; chan < 4; chan++) {
3330 if (!(writemask & (1 << chan))) {
3331 continue;
3332 }
3333 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3334 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3335 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3336 LLVMBuildStore(builder, data, derived_ptr);
3337 }
3338 }
3339
3340 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3341 const nir_intrinsic_instr *instr,
3342 LLVMValueRef ptr, int src_idx)
3343 {
3344 if (ctx->ac.postponed_kill) {
3345 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3346 ctx->ac.postponed_kill, "");
3347 ac_build_ifcc(&ctx->ac, cond, 7005);
3348 }
3349
3350 LLVMValueRef result;
3351 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3352
3353 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3354
3355 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3356 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3357 if (deref->mode == nir_var_mem_global) {
3358 /* use "singlethread" sync scope to implement relaxed ordering */
3359 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3360
3361 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3362 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3363 }
3364 }
3365
3366 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3367 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3368 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3369 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3370 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3371 } else {
3372 LLVMAtomicRMWBinOp op;
3373 switch (instr->intrinsic) {
3374 case nir_intrinsic_shared_atomic_add:
3375 case nir_intrinsic_deref_atomic_add:
3376 op = LLVMAtomicRMWBinOpAdd;
3377 break;
3378 case nir_intrinsic_shared_atomic_umin:
3379 case nir_intrinsic_deref_atomic_umin:
3380 op = LLVMAtomicRMWBinOpUMin;
3381 break;
3382 case nir_intrinsic_shared_atomic_umax:
3383 case nir_intrinsic_deref_atomic_umax:
3384 op = LLVMAtomicRMWBinOpUMax;
3385 break;
3386 case nir_intrinsic_shared_atomic_imin:
3387 case nir_intrinsic_deref_atomic_imin:
3388 op = LLVMAtomicRMWBinOpMin;
3389 break;
3390 case nir_intrinsic_shared_atomic_imax:
3391 case nir_intrinsic_deref_atomic_imax:
3392 op = LLVMAtomicRMWBinOpMax;
3393 break;
3394 case nir_intrinsic_shared_atomic_and:
3395 case nir_intrinsic_deref_atomic_and:
3396 op = LLVMAtomicRMWBinOpAnd;
3397 break;
3398 case nir_intrinsic_shared_atomic_or:
3399 case nir_intrinsic_deref_atomic_or:
3400 op = LLVMAtomicRMWBinOpOr;
3401 break;
3402 case nir_intrinsic_shared_atomic_xor:
3403 case nir_intrinsic_deref_atomic_xor:
3404 op = LLVMAtomicRMWBinOpXor;
3405 break;
3406 case nir_intrinsic_shared_atomic_exchange:
3407 case nir_intrinsic_deref_atomic_exchange:
3408 op = LLVMAtomicRMWBinOpXchg;
3409 break;
3410 default:
3411 return NULL;
3412 }
3413
3414 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3415 }
3416
3417 if (ctx->ac.postponed_kill)
3418 ac_build_endif(&ctx->ac, 7005);
3419 return result;
3420 }
3421
3422 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3423 {
3424 LLVMValueRef values[2];
3425 LLVMValueRef pos[2];
3426
3427 pos[0] = ac_to_float(&ctx->ac,
3428 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3429 pos[1] = ac_to_float(&ctx->ac,
3430 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3431
3432 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3433 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3434 return ac_build_gather_values(&ctx->ac, values, 2);
3435 }
3436
3437 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3438 enum glsl_interp_mode interp, unsigned location)
3439 {
3440 switch (interp) {
3441 case INTERP_MODE_FLAT:
3442 default:
3443 return NULL;
3444 case INTERP_MODE_SMOOTH:
3445 case INTERP_MODE_NONE:
3446 if (location == INTERP_CENTER)
3447 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3448 else if (location == INTERP_CENTROID)
3449 return ctx->abi->persp_centroid;
3450 else if (location == INTERP_SAMPLE)
3451 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3452 break;
3453 case INTERP_MODE_NOPERSPECTIVE:
3454 if (location == INTERP_CENTER)
3455 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3456 else if (location == INTERP_CENTROID)
3457 return ctx->abi->linear_centroid;
3458 else if (location == INTERP_SAMPLE)
3459 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3460 break;
3461 }
3462 return NULL;
3463 }
3464
3465 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3466 unsigned mode)
3467 {
3468 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3469 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3470 }
3471
3472 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3473 unsigned mode,
3474 LLVMValueRef offset)
3475 {
3476 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3477 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3478 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3479
3480 LLVMValueRef ij_out[2];
3481 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3482
3483 /*
3484 * take the I then J parameters, and the DDX/Y for it, and
3485 * calculate the IJ inputs for the interpolator.
3486 * temp1 = ddx * offset/sample.x + I;
3487 * interp_param.I = ddy * offset/sample.y + temp1;
3488 * temp1 = ddx * offset/sample.x + J;
3489 * interp_param.J = ddy * offset/sample.y + temp1;
3490 */
3491 for (unsigned i = 0; i < 2; i++) {
3492 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3493 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3494 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3495 ddxy_out, ix_ll, "");
3496 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3497 ddxy_out, iy_ll, "");
3498 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3499 interp_param, ix_ll, "");
3500 LLVMValueRef temp1, temp2;
3501
3502 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3503 ctx->ac.f32, "");
3504
3505 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3506 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3507
3508 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3509 temp2, ctx->ac.i32, "");
3510 }
3511 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3512 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3513 }
3514
3515 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3516 unsigned mode)
3517 {
3518 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3519 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3520 }
3521
3522 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3523 unsigned mode,
3524 LLVMValueRef sample_id)
3525 {
3526 if (ctx->abi->interp_at_sample_force_center)
3527 return barycentric_center(ctx, mode);
3528
3529 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3530
3531 /* fetch sample ID */
3532 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3533
3534 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3535 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3536 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3537 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3538 LLVMValueRef coords[] = { src_c0, src_c1 };
3539 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3540
3541 return barycentric_offset(ctx, mode, offset);
3542 }
3543
3544
3545 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3546 unsigned mode)
3547 {
3548 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3549 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3550 }
3551
3552 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3553 {
3554 return LLVMBuildBitCast(ctx->ac.builder,
3555 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3556 ctx->ac.v3i32, "");
3557 }
3558
3559 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3560 LLVMValueRef interp_param,
3561 unsigned index, unsigned comp_start,
3562 unsigned num_components,
3563 unsigned bitsize)
3564 {
3565 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3566 LLVMValueRef interp_param_f;
3567
3568 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3569 interp_param, ctx->ac.v2f32, "");
3570 LLVMValueRef i = LLVMBuildExtractElement(
3571 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3572 LLVMValueRef j = LLVMBuildExtractElement(
3573 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3574
3575 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3576 if (ctx->verified_interp &&
3577 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3578 LLVMValueRef args[2];
3579 args[0] = i;
3580 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3581 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3582 args, 2, AC_FUNC_ATTR_READNONE);
3583 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3584 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3585 }
3586
3587 LLVMValueRef values[4];
3588 assert(bitsize == 16 || bitsize == 32);
3589 for (unsigned comp = 0; comp < num_components; comp++) {
3590 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3591 if (bitsize == 16) {
3592 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3593 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3594 } else {
3595 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3596 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3597 }
3598 }
3599
3600 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3601 }
3602
3603 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3604 nir_intrinsic_instr *instr)
3605 {
3606 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3607
3608 /* We only lower inputs for fragment shaders ATM */
3609 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3610 assert(offset);
3611 assert(offset[0].i32 == 0);
3612
3613 unsigned component = nir_intrinsic_component(instr);
3614 unsigned index = nir_intrinsic_base(instr);
3615 unsigned vertex_id = 2; /* P0 */
3616
3617 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3618 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3619
3620 switch (src0[0].i32) {
3621 case 0:
3622 vertex_id = 2;
3623 break;
3624 case 1:
3625 vertex_id = 0;
3626 break;
3627 case 2:
3628 vertex_id = 1;
3629 break;
3630 default:
3631 unreachable("Invalid vertex index");
3632 }
3633 }
3634
3635 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3636 LLVMValueRef values[8];
3637
3638 /* Each component of a 64-bit value takes up two GL-level channels. */
3639 unsigned num_components = instr->dest.ssa.num_components;
3640 unsigned bit_size = instr->dest.ssa.bit_size;
3641 unsigned channels =
3642 bit_size == 64 ? num_components * 2 : num_components;
3643
3644 for (unsigned chan = 0; chan < channels; chan++) {
3645 if (component + chan > 4)
3646 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3647 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3648 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3649 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3650 llvm_chan,
3651 attr_number,
3652 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3653 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3654 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3655 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3656 }
3657
3658 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3659 if (bit_size == 64) {
3660 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3661 LLVMVectorType(ctx->ac.i64, num_components);
3662 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3663 }
3664 return result;
3665 }
3666
3667 static void visit_intrinsic(struct ac_nir_context *ctx,
3668 nir_intrinsic_instr *instr)
3669 {
3670 LLVMValueRef result = NULL;
3671
3672 switch (instr->intrinsic) {
3673 case nir_intrinsic_ballot:
3674 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3675 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3676 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3677 break;
3678 case nir_intrinsic_read_invocation:
3679 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3680 get_src(ctx, instr->src[1]));
3681 break;
3682 case nir_intrinsic_read_first_invocation:
3683 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3684 break;
3685 case nir_intrinsic_load_subgroup_invocation:
3686 result = ac_get_thread_id(&ctx->ac);
3687 break;
3688 case nir_intrinsic_load_work_group_id: {
3689 LLVMValueRef values[3];
3690
3691 for (int i = 0; i < 3; i++) {
3692 values[i] = ctx->args->workgroup_ids[i].used ?
3693 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3694 }
3695
3696 result = ac_build_gather_values(&ctx->ac, values, 3);
3697 break;
3698 }
3699 case nir_intrinsic_load_base_vertex:
3700 case nir_intrinsic_load_first_vertex:
3701 result = ctx->abi->load_base_vertex(ctx->abi);
3702 break;
3703 case nir_intrinsic_load_local_group_size:
3704 result = ctx->abi->load_local_group_size(ctx->abi);
3705 break;
3706 case nir_intrinsic_load_vertex_id:
3707 result = LLVMBuildAdd(ctx->ac.builder,
3708 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3709 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3710 break;
3711 case nir_intrinsic_load_vertex_id_zero_base: {
3712 result = ctx->abi->vertex_id;
3713 break;
3714 }
3715 case nir_intrinsic_load_local_invocation_id: {
3716 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3717 break;
3718 }
3719 case nir_intrinsic_load_base_instance:
3720 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3721 break;
3722 case nir_intrinsic_load_draw_id:
3723 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3724 break;
3725 case nir_intrinsic_load_view_index:
3726 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3727 break;
3728 case nir_intrinsic_load_invocation_id:
3729 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3730 result = ac_unpack_param(&ctx->ac,
3731 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3732 8, 5);
3733 } else {
3734 if (ctx->ac.chip_class >= GFX10) {
3735 result = LLVMBuildAnd(ctx->ac.builder,
3736 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3737 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3738 } else {
3739 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3740 }
3741 }
3742 break;
3743 case nir_intrinsic_load_primitive_id:
3744 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3745 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3746 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3747 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3748 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3749 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3750 } else
3751 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3752 break;
3753 case nir_intrinsic_load_sample_id:
3754 result = ac_unpack_param(&ctx->ac,
3755 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3756 8, 4);
3757 break;
3758 case nir_intrinsic_load_sample_pos:
3759 result = load_sample_pos(ctx);
3760 break;
3761 case nir_intrinsic_load_sample_mask_in:
3762 result = ctx->abi->load_sample_mask_in(ctx->abi);
3763 break;
3764 case nir_intrinsic_load_frag_coord: {
3765 LLVMValueRef values[4] = {
3766 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3767 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3768 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3769 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3770 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3771 };
3772 result = ac_to_integer(&ctx->ac,
3773 ac_build_gather_values(&ctx->ac, values, 4));
3774 break;
3775 }
3776 case nir_intrinsic_load_layer_id:
3777 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3778 break;
3779 case nir_intrinsic_load_front_face:
3780 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3781 break;
3782 case nir_intrinsic_load_helper_invocation:
3783 result = ac_build_load_helper_invocation(&ctx->ac);
3784 break;
3785 case nir_intrinsic_is_helper_invocation:
3786 result = ac_build_is_helper_invocation(&ctx->ac);
3787 break;
3788 case nir_intrinsic_load_color0:
3789 result = ctx->abi->color0;
3790 break;
3791 case nir_intrinsic_load_color1:
3792 result = ctx->abi->color1;
3793 break;
3794 case nir_intrinsic_load_user_data_amd:
3795 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3796 result = ctx->abi->user_data;
3797 break;
3798 case nir_intrinsic_load_instance_id:
3799 result = ctx->abi->instance_id;
3800 break;
3801 case nir_intrinsic_load_num_work_groups:
3802 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3803 break;
3804 case nir_intrinsic_load_local_invocation_index:
3805 result = visit_load_local_invocation_index(ctx);
3806 break;
3807 case nir_intrinsic_load_subgroup_id:
3808 result = visit_load_subgroup_id(ctx);
3809 break;
3810 case nir_intrinsic_load_num_subgroups:
3811 result = visit_load_num_subgroups(ctx);
3812 break;
3813 case nir_intrinsic_first_invocation:
3814 result = visit_first_invocation(ctx);
3815 break;
3816 case nir_intrinsic_load_push_constant:
3817 result = visit_load_push_constant(ctx, instr);
3818 break;
3819 case nir_intrinsic_vulkan_resource_index: {
3820 LLVMValueRef index = get_src(ctx, instr->src[0]);
3821 unsigned desc_set = nir_intrinsic_desc_set(instr);
3822 unsigned binding = nir_intrinsic_binding(instr);
3823
3824 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3825 binding);
3826 break;
3827 }
3828 case nir_intrinsic_vulkan_resource_reindex:
3829 result = visit_vulkan_resource_reindex(ctx, instr);
3830 break;
3831 case nir_intrinsic_store_ssbo:
3832 visit_store_ssbo(ctx, instr);
3833 break;
3834 case nir_intrinsic_load_ssbo:
3835 result = visit_load_buffer(ctx, instr);
3836 break;
3837 case nir_intrinsic_ssbo_atomic_add:
3838 case nir_intrinsic_ssbo_atomic_imin:
3839 case nir_intrinsic_ssbo_atomic_umin:
3840 case nir_intrinsic_ssbo_atomic_imax:
3841 case nir_intrinsic_ssbo_atomic_umax:
3842 case nir_intrinsic_ssbo_atomic_and:
3843 case nir_intrinsic_ssbo_atomic_or:
3844 case nir_intrinsic_ssbo_atomic_xor:
3845 case nir_intrinsic_ssbo_atomic_exchange:
3846 case nir_intrinsic_ssbo_atomic_comp_swap:
3847 result = visit_atomic_ssbo(ctx, instr);
3848 break;
3849 case nir_intrinsic_load_ubo:
3850 result = visit_load_ubo_buffer(ctx, instr);
3851 break;
3852 case nir_intrinsic_get_buffer_size:
3853 result = visit_get_buffer_size(ctx, instr);
3854 break;
3855 case nir_intrinsic_load_deref:
3856 result = visit_load_var(ctx, instr);
3857 break;
3858 case nir_intrinsic_store_deref:
3859 visit_store_var(ctx, instr);
3860 break;
3861 case nir_intrinsic_load_shared:
3862 result = visit_load_shared(ctx, instr);
3863 break;
3864 case nir_intrinsic_store_shared:
3865 visit_store_shared(ctx, instr);
3866 break;
3867 case nir_intrinsic_bindless_image_samples:
3868 case nir_intrinsic_image_deref_samples:
3869 result = visit_image_samples(ctx, instr);
3870 break;
3871 case nir_intrinsic_bindless_image_load:
3872 result = visit_image_load(ctx, instr, true);
3873 break;
3874 case nir_intrinsic_image_deref_load:
3875 result = visit_image_load(ctx, instr, false);
3876 break;
3877 case nir_intrinsic_bindless_image_store:
3878 visit_image_store(ctx, instr, true);
3879 break;
3880 case nir_intrinsic_image_deref_store:
3881 visit_image_store(ctx, instr, false);
3882 break;
3883 case nir_intrinsic_bindless_image_atomic_add:
3884 case nir_intrinsic_bindless_image_atomic_imin:
3885 case nir_intrinsic_bindless_image_atomic_umin:
3886 case nir_intrinsic_bindless_image_atomic_imax:
3887 case nir_intrinsic_bindless_image_atomic_umax:
3888 case nir_intrinsic_bindless_image_atomic_and:
3889 case nir_intrinsic_bindless_image_atomic_or:
3890 case nir_intrinsic_bindless_image_atomic_xor:
3891 case nir_intrinsic_bindless_image_atomic_exchange:
3892 case nir_intrinsic_bindless_image_atomic_comp_swap:
3893 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3894 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3895 result = visit_image_atomic(ctx, instr, true);
3896 break;
3897 case nir_intrinsic_image_deref_atomic_add:
3898 case nir_intrinsic_image_deref_atomic_imin:
3899 case nir_intrinsic_image_deref_atomic_umin:
3900 case nir_intrinsic_image_deref_atomic_imax:
3901 case nir_intrinsic_image_deref_atomic_umax:
3902 case nir_intrinsic_image_deref_atomic_and:
3903 case nir_intrinsic_image_deref_atomic_or:
3904 case nir_intrinsic_image_deref_atomic_xor:
3905 case nir_intrinsic_image_deref_atomic_exchange:
3906 case nir_intrinsic_image_deref_atomic_comp_swap:
3907 case nir_intrinsic_image_deref_atomic_inc_wrap:
3908 case nir_intrinsic_image_deref_atomic_dec_wrap:
3909 result = visit_image_atomic(ctx, instr, false);
3910 break;
3911 case nir_intrinsic_bindless_image_size:
3912 result = visit_image_size(ctx, instr, true);
3913 break;
3914 case nir_intrinsic_image_deref_size:
3915 result = visit_image_size(ctx, instr, false);
3916 break;
3917 case nir_intrinsic_shader_clock:
3918 result = ac_build_shader_clock(&ctx->ac,
3919 nir_intrinsic_memory_scope(instr));
3920 break;
3921 case nir_intrinsic_discard:
3922 case nir_intrinsic_discard_if:
3923 emit_discard(ctx, instr);
3924 break;
3925 case nir_intrinsic_demote:
3926 case nir_intrinsic_demote_if:
3927 emit_demote(ctx, instr);
3928 break;
3929 case nir_intrinsic_memory_barrier:
3930 case nir_intrinsic_group_memory_barrier:
3931 case nir_intrinsic_memory_barrier_buffer:
3932 case nir_intrinsic_memory_barrier_image:
3933 case nir_intrinsic_memory_barrier_shared:
3934 emit_membar(&ctx->ac, instr);
3935 break;
3936 case nir_intrinsic_memory_barrier_tcs_patch:
3937 break;
3938 case nir_intrinsic_control_barrier:
3939 ac_emit_barrier(&ctx->ac, ctx->stage);
3940 break;
3941 case nir_intrinsic_shared_atomic_add:
3942 case nir_intrinsic_shared_atomic_imin:
3943 case nir_intrinsic_shared_atomic_umin:
3944 case nir_intrinsic_shared_atomic_imax:
3945 case nir_intrinsic_shared_atomic_umax:
3946 case nir_intrinsic_shared_atomic_and:
3947 case nir_intrinsic_shared_atomic_or:
3948 case nir_intrinsic_shared_atomic_xor:
3949 case nir_intrinsic_shared_atomic_exchange:
3950 case nir_intrinsic_shared_atomic_comp_swap: {
3951 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3952 instr->src[1].ssa->bit_size);
3953 result = visit_var_atomic(ctx, instr, ptr, 1);
3954 break;
3955 }
3956 case nir_intrinsic_deref_atomic_add:
3957 case nir_intrinsic_deref_atomic_imin:
3958 case nir_intrinsic_deref_atomic_umin:
3959 case nir_intrinsic_deref_atomic_imax:
3960 case nir_intrinsic_deref_atomic_umax:
3961 case nir_intrinsic_deref_atomic_and:
3962 case nir_intrinsic_deref_atomic_or:
3963 case nir_intrinsic_deref_atomic_xor:
3964 case nir_intrinsic_deref_atomic_exchange:
3965 case nir_intrinsic_deref_atomic_comp_swap: {
3966 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3967 result = visit_var_atomic(ctx, instr, ptr, 1);
3968 break;
3969 }
3970 case nir_intrinsic_load_barycentric_pixel:
3971 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3972 break;
3973 case nir_intrinsic_load_barycentric_centroid:
3974 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3975 break;
3976 case nir_intrinsic_load_barycentric_sample:
3977 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3978 break;
3979 case nir_intrinsic_load_barycentric_model:
3980 result = barycentric_model(ctx);
3981 break;
3982 case nir_intrinsic_load_barycentric_at_offset: {
3983 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3984 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3985 break;
3986 }
3987 case nir_intrinsic_load_barycentric_at_sample: {
3988 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3989 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3990 break;
3991 }
3992 case nir_intrinsic_load_interpolated_input: {
3993 /* We assume any indirect loads have been lowered away */
3994 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3995 assert(offset);
3996 assert(offset[0].i32 == 0);
3997
3998 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3999 unsigned index = nir_intrinsic_base(instr);
4000 unsigned component = nir_intrinsic_component(instr);
4001 result = load_interpolated_input(ctx, interp_param, index,
4002 component,
4003 instr->dest.ssa.num_components,
4004 instr->dest.ssa.bit_size);
4005 break;
4006 }
4007 case nir_intrinsic_load_input:
4008 case nir_intrinsic_load_input_vertex:
4009 result = load_input(ctx, instr);
4010 break;
4011 case nir_intrinsic_emit_vertex:
4012 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4013 break;
4014 case nir_intrinsic_emit_vertex_with_counter: {
4015 unsigned stream = nir_intrinsic_stream_id(instr);
4016 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4017 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4018 next_vertex,
4019 ctx->abi->outputs);
4020 break;
4021 }
4022 case nir_intrinsic_end_primitive:
4023 case nir_intrinsic_end_primitive_with_counter:
4024 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4025 break;
4026 case nir_intrinsic_load_tess_coord:
4027 result = ctx->abi->load_tess_coord(ctx->abi);
4028 break;
4029 case nir_intrinsic_load_tess_level_outer:
4030 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4031 break;
4032 case nir_intrinsic_load_tess_level_inner:
4033 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4034 break;
4035 case nir_intrinsic_load_tess_level_outer_default:
4036 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4037 break;
4038 case nir_intrinsic_load_tess_level_inner_default:
4039 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4040 break;
4041 case nir_intrinsic_load_patch_vertices_in:
4042 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4043 break;
4044 case nir_intrinsic_vote_all: {
4045 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4046 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4047 break;
4048 }
4049 case nir_intrinsic_vote_any: {
4050 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4051 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4052 break;
4053 }
4054 case nir_intrinsic_shuffle:
4055 if (ctx->ac.chip_class == GFX8 ||
4056 ctx->ac.chip_class == GFX9 ||
4057 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4058 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4059 get_src(ctx, instr->src[1]));
4060 } else {
4061 LLVMValueRef src = get_src(ctx, instr->src[0]);
4062 LLVMValueRef index = get_src(ctx, instr->src[1]);
4063 LLVMTypeRef type = LLVMTypeOf(src);
4064 struct waterfall_context wctx;
4065 LLVMValueRef index_val;
4066
4067 index_val = enter_waterfall(ctx, &wctx, index, true);
4068
4069 src = LLVMBuildZExt(ctx->ac.builder, src,
4070 ctx->ac.i32, "");
4071
4072 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4073 ctx->ac.i32,
4074 (LLVMValueRef []) { src, index_val }, 2,
4075 AC_FUNC_ATTR_READNONE |
4076 AC_FUNC_ATTR_CONVERGENT);
4077
4078 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4079
4080 result = exit_waterfall(ctx, &wctx, result);
4081 }
4082 break;
4083 case nir_intrinsic_reduce:
4084 result = ac_build_reduce(&ctx->ac,
4085 get_src(ctx, instr->src[0]),
4086 instr->const_index[0],
4087 instr->const_index[1]);
4088 break;
4089 case nir_intrinsic_inclusive_scan:
4090 result = ac_build_inclusive_scan(&ctx->ac,
4091 get_src(ctx, instr->src[0]),
4092 instr->const_index[0]);
4093 break;
4094 case nir_intrinsic_exclusive_scan:
4095 result = ac_build_exclusive_scan(&ctx->ac,
4096 get_src(ctx, instr->src[0]),
4097 instr->const_index[0]);
4098 break;
4099 case nir_intrinsic_quad_broadcast: {
4100 unsigned lane = nir_src_as_uint(instr->src[1]);
4101 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4102 lane, lane, lane, lane);
4103 break;
4104 }
4105 case nir_intrinsic_quad_swap_horizontal:
4106 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4107 break;
4108 case nir_intrinsic_quad_swap_vertical:
4109 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4110 break;
4111 case nir_intrinsic_quad_swap_diagonal:
4112 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4113 break;
4114 case nir_intrinsic_quad_swizzle_amd: {
4115 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4116 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4117 mask & 0x3, (mask >> 2) & 0x3,
4118 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4119 break;
4120 }
4121 case nir_intrinsic_masked_swizzle_amd: {
4122 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4123 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4124 break;
4125 }
4126 case nir_intrinsic_write_invocation_amd:
4127 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4128 get_src(ctx, instr->src[1]),
4129 get_src(ctx, instr->src[2]));
4130 break;
4131 case nir_intrinsic_mbcnt_amd:
4132 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4133 break;
4134 case nir_intrinsic_load_scratch: {
4135 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4136 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4137 offset);
4138 LLVMTypeRef comp_type =
4139 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4140 LLVMTypeRef vec_type =
4141 instr->dest.ssa.num_components == 1 ? comp_type :
4142 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4143 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4144 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4145 LLVMPointerType(vec_type, addr_space), "");
4146 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4147 break;
4148 }
4149 case nir_intrinsic_store_scratch: {
4150 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4151 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4152 offset);
4153 LLVMTypeRef comp_type =
4154 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4155 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4156 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4157 LLVMPointerType(comp_type, addr_space), "");
4158 LLVMValueRef src = get_src(ctx, instr->src[0]);
4159 unsigned wrmask = nir_intrinsic_write_mask(instr);
4160 while (wrmask) {
4161 int start, count;
4162 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4163
4164 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4165 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4166 LLVMTypeRef vec_type =
4167 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4168 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4169 offset_ptr,
4170 LLVMPointerType(vec_type, addr_space),
4171 "");
4172 LLVMValueRef offset_src =
4173 ac_extract_components(&ctx->ac, src, start, count);
4174 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4175 }
4176 break;
4177 }
4178 case nir_intrinsic_load_constant: {
4179 unsigned base = nir_intrinsic_base(instr);
4180 unsigned range = nir_intrinsic_range(instr);
4181
4182 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4183 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4184 LLVMConstInt(ctx->ac.i32, base, false), "");
4185
4186 /* Clamp the offset to avoid out-of-bound access because global
4187 * instructions can't handle them.
4188 */
4189 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4190 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4191 offset, size, "");
4192 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4193
4194 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4195 offset);
4196 LLVMTypeRef comp_type =
4197 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4198 LLVMTypeRef vec_type =
4199 instr->dest.ssa.num_components == 1 ? comp_type :
4200 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4201 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4202 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4203 LLVMPointerType(vec_type, addr_space), "");
4204 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4205 break;
4206 }
4207 default:
4208 fprintf(stderr, "Unknown intrinsic: ");
4209 nir_print_instr(&instr->instr, stderr);
4210 fprintf(stderr, "\n");
4211 break;
4212 }
4213 if (result) {
4214 ctx->ssa_defs[instr->dest.ssa.index] = result;
4215 }
4216 }
4217
4218 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4219 unsigned base_index,
4220 unsigned constant_index,
4221 LLVMValueRef dynamic_index)
4222 {
4223 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4224 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4225 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4226
4227 /* Bindless uniforms are 64bit so multiple index by 8 */
4228 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4229 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4230
4231 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4232
4233 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4234 NULL, 0, 0, true, true);
4235
4236 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4237 }
4238
4239 struct sampler_desc_address {
4240 unsigned descriptor_set;
4241 unsigned base_index; /* binding in vulkan */
4242 unsigned constant_index;
4243 LLVMValueRef dynamic_index;
4244 bool image;
4245 bool bindless;
4246 };
4247
4248 static struct sampler_desc_address
4249 get_sampler_desc_internal(struct ac_nir_context *ctx,
4250 nir_deref_instr *deref_instr,
4251 const nir_instr *instr,
4252 bool image)
4253 {
4254 LLVMValueRef index = NULL;
4255 unsigned constant_index = 0;
4256 unsigned descriptor_set;
4257 unsigned base_index;
4258 bool bindless = false;
4259
4260 if (!deref_instr) {
4261 descriptor_set = 0;
4262 if (image) {
4263 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4264 base_index = 0;
4265 bindless = true;
4266 index = get_src(ctx, img_instr->src[0]);
4267 } else {
4268 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4269 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4270 nir_tex_src_sampler_handle);
4271 if (sampSrcIdx != -1) {
4272 base_index = 0;
4273 bindless = true;
4274 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4275 } else {
4276 assert(tex_instr && !image);
4277 base_index = tex_instr->sampler_index;
4278 }
4279 }
4280 } else {
4281 while(deref_instr->deref_type != nir_deref_type_var) {
4282 if (deref_instr->deref_type == nir_deref_type_array) {
4283 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4284 if (!array_size)
4285 array_size = 1;
4286
4287 if (nir_src_is_const(deref_instr->arr.index)) {
4288 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4289 } else {
4290 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4291
4292 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4293 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4294
4295 if (!index)
4296 index = indirect;
4297 else
4298 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4299 }
4300
4301 deref_instr = nir_src_as_deref(deref_instr->parent);
4302 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4303 unsigned sidx = deref_instr->strct.index;
4304 deref_instr = nir_src_as_deref(deref_instr->parent);
4305 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4306 } else {
4307 unreachable("Unsupported deref type");
4308 }
4309 }
4310 descriptor_set = deref_instr->var->data.descriptor_set;
4311
4312 if (deref_instr->var->data.bindless) {
4313 /* For now just assert on unhandled variable types */
4314 assert(deref_instr->var->data.mode == nir_var_uniform);
4315
4316 base_index = deref_instr->var->data.driver_location;
4317 bindless = true;
4318
4319 index = index ? index : ctx->ac.i32_0;
4320 index = get_bindless_index_from_uniform(ctx, base_index,
4321 constant_index, index);
4322 } else
4323 base_index = deref_instr->var->data.binding;
4324 }
4325 return (struct sampler_desc_address) {
4326 .descriptor_set = descriptor_set,
4327 .base_index = base_index,
4328 .constant_index = constant_index,
4329 .dynamic_index = index,
4330 .image = image,
4331 .bindless = bindless,
4332 };
4333 }
4334
4335 /* Extract any possibly divergent index into a separate value that can be fed
4336 * into get_sampler_desc with the same arguments. */
4337 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4338 nir_deref_instr *deref_instr,
4339 const nir_instr *instr,
4340 bool image)
4341 {
4342 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4343 return addr.dynamic_index;
4344 }
4345
4346 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4347 nir_deref_instr *deref_instr,
4348 enum ac_descriptor_type desc_type,
4349 const nir_instr *instr,
4350 LLVMValueRef index,
4351 bool image, bool write)
4352 {
4353 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4354 return ctx->abi->load_sampler_desc(ctx->abi,
4355 addr.descriptor_set,
4356 addr.base_index,
4357 addr.constant_index, index,
4358 desc_type, addr.image, write, addr.bindless);
4359 }
4360
4361 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4362 *
4363 * GFX6-GFX7:
4364 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4365 * filtering manually. The driver sets img7 to a mask clearing
4366 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4367 * s_and_b32 samp0, samp0, img7
4368 *
4369 * GFX8:
4370 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4371 */
4372 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4373 LLVMValueRef res, LLVMValueRef samp)
4374 {
4375 LLVMBuilderRef builder = ctx->ac.builder;
4376 LLVMValueRef img7, samp0;
4377
4378 if (ctx->ac.chip_class >= GFX8)
4379 return samp;
4380
4381 img7 = LLVMBuildExtractElement(builder, res,
4382 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4383 samp0 = LLVMBuildExtractElement(builder, samp,
4384 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4385 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4386 return LLVMBuildInsertElement(builder, samp, samp0,
4387 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4388 }
4389
4390 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4391 nir_tex_instr *instr,
4392 struct waterfall_context *wctx,
4393 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4394 LLVMValueRef *fmask_ptr)
4395 {
4396 nir_deref_instr *texture_deref_instr = NULL;
4397 nir_deref_instr *sampler_deref_instr = NULL;
4398 int plane = -1;
4399
4400 for (unsigned i = 0; i < instr->num_srcs; i++) {
4401 switch (instr->src[i].src_type) {
4402 case nir_tex_src_texture_deref:
4403 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4404 break;
4405 case nir_tex_src_sampler_deref:
4406 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4407 break;
4408 case nir_tex_src_plane:
4409 plane = nir_src_as_int(instr->src[i].src);
4410 break;
4411 default:
4412 break;
4413 }
4414 }
4415
4416 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4417 &instr->instr, false);
4418 if (!sampler_deref_instr)
4419 sampler_deref_instr = texture_deref_instr;
4420
4421 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4422 &instr->instr, false);
4423 if (instr->texture_non_uniform)
4424 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4425
4426 if (instr->sampler_non_uniform)
4427 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4428
4429 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4430
4431 if (plane >= 0) {
4432 assert(instr->op != nir_texop_txf_ms &&
4433 instr->op != nir_texop_samples_identical);
4434 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4435
4436 main_descriptor = AC_DESC_PLANE_0 + plane;
4437 }
4438
4439 if (instr->op == nir_texop_fragment_mask_fetch) {
4440 /* The fragment mask is fetched from the compressed
4441 * multisampled surface.
4442 */
4443 main_descriptor = AC_DESC_FMASK;
4444 }
4445
4446 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4447 texture_dynamic_index, false, false);
4448
4449 if (samp_ptr) {
4450 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4451 sampler_dynamic_index, false, false);
4452 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4453 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4454 }
4455 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4456 instr->op == nir_texop_samples_identical))
4457 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4458 &instr->instr, texture_dynamic_index, false, false);
4459 }
4460
4461 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4462 LLVMValueRef coord)
4463 {
4464 coord = ac_to_float(ctx, coord);
4465 coord = ac_build_round(ctx, coord);
4466 coord = ac_to_integer(ctx, coord);
4467 return coord;
4468 }
4469
4470 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4471 {
4472 LLVMValueRef result = NULL;
4473 struct ac_image_args args = { 0 };
4474 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4475 LLVMValueRef ddx = NULL, ddy = NULL;
4476 unsigned offset_src = 0;
4477 struct waterfall_context wctx[2] = {{{0}}};
4478
4479 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4480
4481 for (unsigned i = 0; i < instr->num_srcs; i++) {
4482 switch (instr->src[i].src_type) {
4483 case nir_tex_src_coord: {
4484 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4485 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4486 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4487 break;
4488 }
4489 case nir_tex_src_projector:
4490 break;
4491 case nir_tex_src_comparator:
4492 if (instr->is_shadow) {
4493 args.compare = get_src(ctx, instr->src[i].src);
4494 args.compare = ac_to_float(&ctx->ac, args.compare);
4495 }
4496 break;
4497 case nir_tex_src_offset:
4498 args.offset = get_src(ctx, instr->src[i].src);
4499 offset_src = i;
4500 break;
4501 case nir_tex_src_bias:
4502 args.bias = get_src(ctx, instr->src[i].src);
4503 break;
4504 case nir_tex_src_lod: {
4505 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4506 args.level_zero = true;
4507 else
4508 args.lod = get_src(ctx, instr->src[i].src);
4509 break;
4510 }
4511 case nir_tex_src_ms_index:
4512 sample_index = get_src(ctx, instr->src[i].src);
4513 break;
4514 case nir_tex_src_ms_mcs:
4515 break;
4516 case nir_tex_src_ddx:
4517 ddx = get_src(ctx, instr->src[i].src);
4518 break;
4519 case nir_tex_src_ddy:
4520 ddy = get_src(ctx, instr->src[i].src);
4521 break;
4522 case nir_tex_src_min_lod:
4523 args.min_lod = get_src(ctx, instr->src[i].src);
4524 break;
4525 case nir_tex_src_texture_offset:
4526 case nir_tex_src_sampler_offset:
4527 case nir_tex_src_plane:
4528 default:
4529 break;
4530 }
4531 }
4532
4533 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4534 result = get_buffer_size(ctx, args.resource, true);
4535 goto write_result;
4536 }
4537
4538 if (instr->op == nir_texop_texture_samples) {
4539 LLVMValueRef res, samples, is_msaa;
4540 LLVMValueRef default_sample;
4541
4542 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4543 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4544 LLVMConstInt(ctx->ac.i32, 3, false), "");
4545 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4546 LLVMConstInt(ctx->ac.i32, 28, false), "");
4547 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4548 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4549 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4550 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4551
4552 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4553 LLVMConstInt(ctx->ac.i32, 16, false), "");
4554 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4555 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4556 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4557 samples, "");
4558
4559 if (ctx->abi->robust_buffer_access) {
4560 LLVMValueRef dword1, is_null_descriptor;
4561
4562 /* Extract the second dword of the descriptor, if it's
4563 * all zero, then it's a null descriptor.
4564 */
4565 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4566 LLVMConstInt(ctx->ac.i32, 1, false), "");
4567 is_null_descriptor =
4568 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4569 LLVMConstInt(ctx->ac.i32, 0, false), "");
4570 default_sample =
4571 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4572 ctx->ac.i32_0, ctx->ac.i32_1, "");
4573 } else {
4574 default_sample = ctx->ac.i32_1;
4575 }
4576
4577 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4578 default_sample, "");
4579 result = samples;
4580 goto write_result;
4581 }
4582
4583 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4584 LLVMValueRef offset[3], pack;
4585 for (unsigned chan = 0; chan < 3; ++chan)
4586 offset[chan] = ctx->ac.i32_0;
4587
4588 unsigned num_components = ac_get_llvm_num_components(args.offset);
4589 for (unsigned chan = 0; chan < num_components; chan++) {
4590 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4591 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4592 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4593 if (chan)
4594 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4595 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4596 }
4597 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4598 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4599 args.offset = pack;
4600 }
4601
4602 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4603 * OpenGL 4.5 spec says:
4604 *
4605 * "If the texture’s internal format indicates a fixed-point
4606 * depth texture, then D_t and D_ref are clamped to the
4607 * range [0, 1]; otherwise no clamping is performed."
4608 *
4609 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4610 * so the depth comparison value isn't clamped for Z16 and
4611 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4612 * an explicitly clamped 32-bit float format.
4613 */
4614 if (args.compare &&
4615 ctx->ac.chip_class >= GFX8 &&
4616 ctx->ac.chip_class <= GFX9 &&
4617 ctx->abi->clamp_shadow_reference) {
4618 LLVMValueRef upgraded, clamped;
4619
4620 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4621 LLVMConstInt(ctx->ac.i32, 3, false), "");
4622 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4623 LLVMConstInt(ctx->ac.i32, 29, false), "");
4624 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4625 clamped = ac_build_clamp(&ctx->ac, args.compare);
4626 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4627 args.compare, "");
4628 }
4629
4630 /* pack derivatives */
4631 if (ddx || ddy) {
4632 int num_src_deriv_channels, num_dest_deriv_channels;
4633 switch (instr->sampler_dim) {
4634 case GLSL_SAMPLER_DIM_3D:
4635 case GLSL_SAMPLER_DIM_CUBE:
4636 num_src_deriv_channels = 3;
4637 num_dest_deriv_channels = 3;
4638 break;
4639 case GLSL_SAMPLER_DIM_2D:
4640 default:
4641 num_src_deriv_channels = 2;
4642 num_dest_deriv_channels = 2;
4643 break;
4644 case GLSL_SAMPLER_DIM_1D:
4645 num_src_deriv_channels = 1;
4646 if (ctx->ac.chip_class == GFX9) {
4647 num_dest_deriv_channels = 2;
4648 } else {
4649 num_dest_deriv_channels = 1;
4650 }
4651 break;
4652 }
4653
4654 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4655 args.derivs[i] = ac_to_float(&ctx->ac,
4656 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4657 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4658 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4659 }
4660 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4661 args.derivs[i] = ctx->ac.f32_0;
4662 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4663 }
4664 }
4665
4666 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4667 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4668 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4669 if (instr->coord_components == 3)
4670 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4671 ac_prepare_cube_coords(&ctx->ac,
4672 instr->op == nir_texop_txd, instr->is_array,
4673 instr->op == nir_texop_lod, args.coords, args.derivs);
4674 }
4675
4676 /* Texture coordinates fixups */
4677 if (instr->coord_components > 1 &&
4678 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4679 instr->is_array &&
4680 instr->op != nir_texop_txf) {
4681 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4682 }
4683
4684 if (instr->coord_components > 2 &&
4685 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4686 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4687 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4688 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4689 instr->is_array &&
4690 instr->op != nir_texop_txf &&
4691 instr->op != nir_texop_txf_ms &&
4692 instr->op != nir_texop_fragment_fetch &&
4693 instr->op != nir_texop_fragment_mask_fetch) {
4694 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4695 }
4696
4697 if (ctx->ac.chip_class == GFX9 &&
4698 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4699 instr->op != nir_texop_lod) {
4700 LLVMValueRef filler;
4701 if (instr->op == nir_texop_txf)
4702 filler = ctx->ac.i32_0;
4703 else
4704 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4705
4706 if (instr->is_array)
4707 args.coords[2] = args.coords[1];
4708 args.coords[1] = filler;
4709 }
4710
4711 /* Pack sample index */
4712 if (sample_index && (instr->op == nir_texop_txf_ms ||
4713 instr->op == nir_texop_fragment_fetch))
4714 args.coords[instr->coord_components] = sample_index;
4715
4716 if (instr->op == nir_texop_samples_identical) {
4717 struct ac_image_args txf_args = { 0 };
4718 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4719
4720 txf_args.dmask = 0xf;
4721 txf_args.resource = fmask_ptr;
4722 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4723 result = build_tex_intrinsic(ctx, instr, &txf_args);
4724
4725 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4726 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4727 goto write_result;
4728 }
4729
4730 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4731 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4732 instr->op != nir_texop_txs &&
4733 instr->op != nir_texop_fragment_fetch &&
4734 instr->op != nir_texop_fragment_mask_fetch) {
4735 unsigned sample_chan = instr->is_array ? 3 : 2;
4736 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4737 &ctx->ac, args.coords[0], args.coords[1],
4738 instr->is_array ? args.coords[2] : NULL,
4739 args.coords[sample_chan], fmask_ptr);
4740 }
4741
4742 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4743 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4744 num_offsets = MIN2(num_offsets, instr->coord_components);
4745 for (unsigned i = 0; i < num_offsets; ++i) {
4746 args.coords[i] = LLVMBuildAdd(
4747 ctx->ac.builder, args.coords[i],
4748 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4749 }
4750 args.offset = NULL;
4751 }
4752
4753 /* DMASK was repurposed for GATHER4. 4 components are always
4754 * returned and DMASK works like a swizzle - it selects
4755 * the component to fetch. The only valid DMASK values are
4756 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4757 * (red,red,red,red) etc.) The ISA document doesn't mention
4758 * this.
4759 */
4760 args.dmask = 0xf;
4761 if (instr->op == nir_texop_tg4) {
4762 if (instr->is_shadow)
4763 args.dmask = 1;
4764 else
4765 args.dmask = 1 << instr->component;
4766 }
4767
4768 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4769 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4770 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4771 }
4772
4773 /* Adjust the number of coordinates because we only need (x,y) for 2D
4774 * multisampled images and (x,y,layer) for 2D multisampled layered
4775 * images or for multisampled input attachments.
4776 */
4777 if (instr->op == nir_texop_fragment_mask_fetch) {
4778 if (args.dim == ac_image_2dmsaa) {
4779 args.dim = ac_image_2d;
4780 } else {
4781 assert(args.dim == ac_image_2darraymsaa);
4782 args.dim = ac_image_2darray;
4783 }
4784 }
4785
4786 assert(instr->dest.is_ssa);
4787 args.d16 = instr->dest.ssa.bit_size == 16;
4788
4789 result = build_tex_intrinsic(ctx, instr, &args);
4790
4791 if (instr->op == nir_texop_query_levels)
4792 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4793 else if (instr->is_shadow && instr->is_new_style_shadow &&
4794 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4795 instr->op != nir_texop_tg4)
4796 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4797 else if (instr->op == nir_texop_txs &&
4798 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4799 instr->is_array) {
4800 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4801 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4802 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4803 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4804 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4805 } else if (ctx->ac.chip_class == GFX9 &&
4806 instr->op == nir_texop_txs &&
4807 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4808 instr->is_array) {
4809 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4810 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4811 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4812 ctx->ac.i32_1, "");
4813 } else if (instr->dest.ssa.num_components != 4)
4814 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4815
4816 write_result:
4817 if (result) {
4818 assert(instr->dest.is_ssa);
4819 result = ac_to_integer(&ctx->ac, result);
4820
4821 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4822 result = exit_waterfall(ctx, wctx + i, result);
4823 }
4824
4825 ctx->ssa_defs[instr->dest.ssa.index] = result;
4826 }
4827 }
4828
4829 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4830 {
4831 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4832 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4833
4834 ctx->ssa_defs[instr->dest.ssa.index] = result;
4835 _mesa_hash_table_insert(ctx->phis, instr, result);
4836 }
4837
4838 static void visit_post_phi(struct ac_nir_context *ctx,
4839 nir_phi_instr *instr,
4840 LLVMValueRef llvm_phi)
4841 {
4842 nir_foreach_phi_src(src, instr) {
4843 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4844 LLVMValueRef llvm_src = get_src(ctx, src->src);
4845
4846 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4847 }
4848 }
4849
4850 static void phi_post_pass(struct ac_nir_context *ctx)
4851 {
4852 hash_table_foreach(ctx->phis, entry) {
4853 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4854 (LLVMValueRef)entry->data);
4855 }
4856 }
4857
4858
4859 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4860 nir_foreach_use(use_src, def) {
4861 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4862 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
4863 if (instr->intrinsic == nir_intrinsic_store_deref)
4864 return true;
4865 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
4866 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
4867 if (instr->op == nir_op_vec4 &&
4868 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
4869 return true;
4870 }
4871 }
4872 }
4873 return false;
4874 }
4875
4876 static void visit_ssa_undef(struct ac_nir_context *ctx,
4877 const nir_ssa_undef_instr *instr)
4878 {
4879 unsigned num_components = instr->def.num_components;
4880 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4881
4882 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
4883 LLVMValueRef undef;
4884
4885 if (num_components == 1)
4886 undef = LLVMGetUndef(type);
4887 else {
4888 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4889 }
4890 ctx->ssa_defs[instr->def.index] = undef;
4891 } else {
4892 LLVMValueRef zero = LLVMConstInt(type, 0, false);
4893 if (num_components > 1) {
4894 zero = ac_build_gather_values_extended(
4895 &ctx->ac, &zero, 4, 0, false, false);
4896 }
4897 ctx->ssa_defs[instr->def.index] = zero;
4898 }
4899 }
4900
4901 static void visit_jump(struct ac_llvm_context *ctx,
4902 const nir_jump_instr *instr)
4903 {
4904 switch (instr->type) {
4905 case nir_jump_break:
4906 ac_build_break(ctx);
4907 break;
4908 case nir_jump_continue:
4909 ac_build_continue(ctx);
4910 break;
4911 default:
4912 fprintf(stderr, "Unknown NIR jump instr: ");
4913 nir_print_instr(&instr->instr, stderr);
4914 fprintf(stderr, "\n");
4915 abort();
4916 }
4917 }
4918
4919 static LLVMTypeRef
4920 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4921 enum glsl_base_type type)
4922 {
4923 switch (type) {
4924 case GLSL_TYPE_INT:
4925 case GLSL_TYPE_UINT:
4926 case GLSL_TYPE_BOOL:
4927 case GLSL_TYPE_SUBROUTINE:
4928 return ac->i32;
4929 case GLSL_TYPE_INT8:
4930 case GLSL_TYPE_UINT8:
4931 return ac->i8;
4932 case GLSL_TYPE_INT16:
4933 case GLSL_TYPE_UINT16:
4934 return ac->i16;
4935 case GLSL_TYPE_FLOAT:
4936 return ac->f32;
4937 case GLSL_TYPE_FLOAT16:
4938 return ac->f16;
4939 case GLSL_TYPE_INT64:
4940 case GLSL_TYPE_UINT64:
4941 return ac->i64;
4942 case GLSL_TYPE_DOUBLE:
4943 return ac->f64;
4944 default:
4945 unreachable("unknown GLSL type");
4946 }
4947 }
4948
4949 static LLVMTypeRef
4950 glsl_to_llvm_type(struct ac_llvm_context *ac,
4951 const struct glsl_type *type)
4952 {
4953 if (glsl_type_is_scalar(type)) {
4954 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4955 }
4956
4957 if (glsl_type_is_vector(type)) {
4958 return LLVMVectorType(
4959 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4960 glsl_get_vector_elements(type));
4961 }
4962
4963 if (glsl_type_is_matrix(type)) {
4964 return LLVMArrayType(
4965 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4966 glsl_get_matrix_columns(type));
4967 }
4968
4969 if (glsl_type_is_array(type)) {
4970 return LLVMArrayType(
4971 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4972 glsl_get_length(type));
4973 }
4974
4975 assert(glsl_type_is_struct_or_ifc(type));
4976
4977 LLVMTypeRef member_types[glsl_get_length(type)];
4978
4979 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4980 member_types[i] =
4981 glsl_to_llvm_type(ac,
4982 glsl_get_struct_field(type, i));
4983 }
4984
4985 return LLVMStructTypeInContext(ac->context, member_types,
4986 glsl_get_length(type), false);
4987 }
4988
4989 static void visit_deref(struct ac_nir_context *ctx,
4990 nir_deref_instr *instr)
4991 {
4992 if (instr->mode != nir_var_mem_shared &&
4993 instr->mode != nir_var_mem_global)
4994 return;
4995
4996 LLVMValueRef result = NULL;
4997 switch(instr->deref_type) {
4998 case nir_deref_type_var: {
4999 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
5000 result = entry->data;
5001 break;
5002 }
5003 case nir_deref_type_struct:
5004 if (instr->mode == nir_var_mem_global) {
5005 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5006 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5007 instr->strct.index);
5008 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5009 LLVMConstInt(ctx->ac.i32, offset, 0));
5010 } else {
5011 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5012 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5013 }
5014 break;
5015 case nir_deref_type_array:
5016 if (instr->mode == nir_var_mem_global) {
5017 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5018 unsigned stride = glsl_get_explicit_stride(parent->type);
5019
5020 if ((glsl_type_is_matrix(parent->type) &&
5021 glsl_matrix_type_is_row_major(parent->type)) ||
5022 (glsl_type_is_vector(parent->type) && stride == 0))
5023 stride = type_scalar_size_bytes(parent->type);
5024
5025 assert(stride > 0);
5026 LLVMValueRef index = get_src(ctx, instr->arr.index);
5027 if (LLVMTypeOf(index) != ctx->ac.i64)
5028 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5029
5030 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5031
5032 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5033 } else {
5034 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5035 get_src(ctx, instr->arr.index));
5036 }
5037 break;
5038 case nir_deref_type_ptr_as_array:
5039 if (instr->mode == nir_var_mem_global) {
5040 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
5041
5042 LLVMValueRef index = get_src(ctx, instr->arr.index);
5043 if (LLVMTypeOf(index) != ctx->ac.i64)
5044 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5045
5046 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5047
5048 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5049 } else {
5050 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5051 get_src(ctx, instr->arr.index));
5052 }
5053 break;
5054 case nir_deref_type_cast: {
5055 result = get_src(ctx, instr->parent);
5056
5057 /* We can't use the structs from LLVM because the shader
5058 * specifies its own offsets. */
5059 LLVMTypeRef pointee_type = ctx->ac.i8;
5060 if (instr->mode == nir_var_mem_shared)
5061 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5062
5063 unsigned address_space;
5064
5065 switch(instr->mode) {
5066 case nir_var_mem_shared:
5067 address_space = AC_ADDR_SPACE_LDS;
5068 break;
5069 case nir_var_mem_global:
5070 address_space = AC_ADDR_SPACE_GLOBAL;
5071 break;
5072 default:
5073 unreachable("Unhandled address space");
5074 }
5075
5076 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5077
5078 if (LLVMTypeOf(result) != type) {
5079 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5080 result = LLVMBuildBitCast(ctx->ac.builder, result,
5081 type, "");
5082 } else {
5083 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5084 type, "");
5085 }
5086 }
5087 break;
5088 }
5089 default:
5090 unreachable("Unhandled deref_instr deref type");
5091 }
5092
5093 ctx->ssa_defs[instr->dest.ssa.index] = result;
5094 }
5095
5096 static void visit_cf_list(struct ac_nir_context *ctx,
5097 struct exec_list *list);
5098
5099 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5100 {
5101 nir_foreach_instr(instr, block)
5102 {
5103 switch (instr->type) {
5104 case nir_instr_type_alu:
5105 visit_alu(ctx, nir_instr_as_alu(instr));
5106 break;
5107 case nir_instr_type_load_const:
5108 visit_load_const(ctx, nir_instr_as_load_const(instr));
5109 break;
5110 case nir_instr_type_intrinsic:
5111 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5112 break;
5113 case nir_instr_type_tex:
5114 visit_tex(ctx, nir_instr_as_tex(instr));
5115 break;
5116 case nir_instr_type_phi:
5117 visit_phi(ctx, nir_instr_as_phi(instr));
5118 break;
5119 case nir_instr_type_ssa_undef:
5120 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5121 break;
5122 case nir_instr_type_jump:
5123 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5124 break;
5125 case nir_instr_type_deref:
5126 visit_deref(ctx, nir_instr_as_deref(instr));
5127 break;
5128 default:
5129 fprintf(stderr, "Unknown NIR instr type: ");
5130 nir_print_instr(instr, stderr);
5131 fprintf(stderr, "\n");
5132 abort();
5133 }
5134 }
5135
5136 _mesa_hash_table_insert(ctx->defs, block,
5137 LLVMGetInsertBlock(ctx->ac.builder));
5138 }
5139
5140 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5141 {
5142 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5143
5144 nir_block *then_block =
5145 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5146
5147 ac_build_uif(&ctx->ac, value, then_block->index);
5148
5149 visit_cf_list(ctx, &if_stmt->then_list);
5150
5151 if (!exec_list_is_empty(&if_stmt->else_list)) {
5152 nir_block *else_block =
5153 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5154
5155 ac_build_else(&ctx->ac, else_block->index);
5156 visit_cf_list(ctx, &if_stmt->else_list);
5157 }
5158
5159 ac_build_endif(&ctx->ac, then_block->index);
5160 }
5161
5162 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5163 {
5164 nir_block *first_loop_block =
5165 (nir_block *) exec_list_get_head(&loop->body);
5166
5167 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5168
5169 visit_cf_list(ctx, &loop->body);
5170
5171 ac_build_endloop(&ctx->ac, first_loop_block->index);
5172 }
5173
5174 static void visit_cf_list(struct ac_nir_context *ctx,
5175 struct exec_list *list)
5176 {
5177 foreach_list_typed(nir_cf_node, node, node, list)
5178 {
5179 switch (node->type) {
5180 case nir_cf_node_block:
5181 visit_block(ctx, nir_cf_node_as_block(node));
5182 break;
5183
5184 case nir_cf_node_if:
5185 visit_if(ctx, nir_cf_node_as_if(node));
5186 break;
5187
5188 case nir_cf_node_loop:
5189 visit_loop(ctx, nir_cf_node_as_loop(node));
5190 break;
5191
5192 default:
5193 assert(0);
5194 }
5195 }
5196 }
5197
5198 void
5199 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5200 struct ac_shader_abi *abi,
5201 struct nir_shader *nir,
5202 struct nir_variable *variable,
5203 gl_shader_stage stage)
5204 {
5205 unsigned output_loc = variable->data.driver_location / 4;
5206 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5207
5208 /* tess ctrl has it's own load/store paths for outputs */
5209 if (stage == MESA_SHADER_TESS_CTRL)
5210 return;
5211
5212 if (stage == MESA_SHADER_VERTEX ||
5213 stage == MESA_SHADER_TESS_EVAL ||
5214 stage == MESA_SHADER_GEOMETRY) {
5215 int idx = variable->data.location + variable->data.index;
5216 if (idx == VARYING_SLOT_CLIP_DIST0) {
5217 int length = nir->info.clip_distance_array_size +
5218 nir->info.cull_distance_array_size;
5219
5220 if (length > 4)
5221 attrib_count = 2;
5222 else
5223 attrib_count = 1;
5224 }
5225 }
5226
5227 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5228 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5229 for (unsigned i = 0; i < attrib_count; ++i) {
5230 for (unsigned chan = 0; chan < 4; chan++) {
5231 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5232 ac_build_alloca_undef(ctx, type, "");
5233 }
5234 }
5235 }
5236
5237 static void
5238 setup_locals(struct ac_nir_context *ctx,
5239 struct nir_function *func)
5240 {
5241 int i, j;
5242 ctx->num_locals = 0;
5243 nir_foreach_variable(variable, &func->impl->locals) {
5244 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5245 variable->data.driver_location = ctx->num_locals * 4;
5246 variable->data.location_frac = 0;
5247 ctx->num_locals += attrib_count;
5248 }
5249 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5250 if (!ctx->locals)
5251 return;
5252
5253 for (i = 0; i < ctx->num_locals; i++) {
5254 for (j = 0; j < 4; j++) {
5255 ctx->locals[i * 4 + j] =
5256 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5257 }
5258 }
5259 }
5260
5261 static void
5262 setup_scratch(struct ac_nir_context *ctx,
5263 struct nir_shader *shader)
5264 {
5265 if (shader->scratch_size == 0)
5266 return;
5267
5268 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5269 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5270 "scratch");
5271 }
5272
5273 static void
5274 setup_constant_data(struct ac_nir_context *ctx,
5275 struct nir_shader *shader)
5276 {
5277 if (!shader->constant_data)
5278 return;
5279
5280 LLVMValueRef data =
5281 LLVMConstStringInContext(ctx->ac.context,
5282 shader->constant_data,
5283 shader->constant_data_size,
5284 true);
5285 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5286
5287 /* We want to put the constant data in the CONST address space so that
5288 * we can use scalar loads. However, LLVM versions before 10 put these
5289 * variables in the same section as the code, which is unacceptable
5290 * for RadeonSI as it needs to relocate all the data sections after
5291 * the code sections. See https://reviews.llvm.org/D65813.
5292 */
5293 unsigned address_space =
5294 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5295
5296 LLVMValueRef global =
5297 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5298 "const_data",
5299 address_space);
5300
5301 LLVMSetInitializer(global, data);
5302 LLVMSetGlobalConstant(global, true);
5303 LLVMSetVisibility(global, LLVMHiddenVisibility);
5304 ctx->constant_data = global;
5305 }
5306
5307 static void
5308 setup_shared(struct ac_nir_context *ctx,
5309 struct nir_shader *nir)
5310 {
5311 if (ctx->ac.lds)
5312 return;
5313
5314 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5315 nir->info.cs.shared_size);
5316
5317 LLVMValueRef lds =
5318 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5319 "compute_lds",
5320 AC_ADDR_SPACE_LDS);
5321 LLVMSetAlignment(lds, 64 * 1024);
5322
5323 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5324 LLVMPointerType(ctx->ac.i8,
5325 AC_ADDR_SPACE_LDS), "");
5326 }
5327
5328 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5329 const struct ac_shader_args *args, struct nir_shader *nir)
5330 {
5331 struct ac_nir_context ctx = {};
5332 struct nir_function *func;
5333
5334 ctx.ac = *ac;
5335 ctx.abi = abi;
5336 ctx.args = args;
5337
5338 ctx.stage = nir->info.stage;
5339 ctx.info = &nir->info;
5340
5341 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5342
5343 nir_foreach_variable(variable, &nir->outputs)
5344 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5345 ctx.stage);
5346
5347 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5348 _mesa_key_pointer_equal);
5349 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5350 _mesa_key_pointer_equal);
5351 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5352 _mesa_key_pointer_equal);
5353
5354 if (ctx.abi->kill_ps_if_inf_interp)
5355 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5356 _mesa_key_pointer_equal);
5357
5358 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5359
5360 nir_index_ssa_defs(func->impl);
5361 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5362
5363 setup_locals(&ctx, func);
5364 setup_scratch(&ctx, nir);
5365 setup_constant_data(&ctx, nir);
5366
5367 if (gl_shader_stage_is_compute(nir->info.stage))
5368 setup_shared(&ctx, nir);
5369
5370 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5371 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5372 /* true = don't kill. */
5373 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5374 }
5375
5376 visit_cf_list(&ctx, &func->impl->body);
5377 phi_post_pass(&ctx);
5378
5379 if (ctx.ac.postponed_kill)
5380 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5381 ctx.ac.postponed_kill, ""));
5382
5383 if (!gl_shader_stage_is_compute(nir->info.stage))
5384 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5385 ctx.abi->outputs);
5386
5387 free(ctx.locals);
5388 free(ctx.ssa_defs);
5389 ralloc_free(ctx.defs);
5390 ralloc_free(ctx.phis);
5391 ralloc_free(ctx.vars);
5392 if (ctx.abi->kill_ps_if_inf_interp)
5393 ralloc_free(ctx.verified_interp);
5394 }
5395
5396 bool
5397 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5398 {
5399 bool progress = false;
5400
5401 /* Lower large variables to scratch first so that we won't bloat the
5402 * shader by generating large if ladders for them. We later lower
5403 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5404 */
5405 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5406 nir_var_function_temp,
5407 256,
5408 glsl_get_natural_size_align_bytes);
5409
5410 /* While it would be nice not to have this flag, we are constrained
5411 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5412 */
5413 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5414
5415 /* TODO: Indirect indexing of GS inputs is unimplemented.
5416 *
5417 * TCS and TES load inputs directly from LDS or offchip memory, so
5418 * indirect indexing is trivial.
5419 */
5420 nir_variable_mode indirect_mask = 0;
5421 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5422 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5423 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5424 !llvm_has_working_vgpr_indexing)) {
5425 indirect_mask |= nir_var_shader_in;
5426 }
5427 if (!llvm_has_working_vgpr_indexing &&
5428 nir->info.stage != MESA_SHADER_TESS_CTRL)
5429 indirect_mask |= nir_var_shader_out;
5430
5431 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5432 * smart enough to handle indirects without causing excess spilling
5433 * causing the gpu to hang.
5434 *
5435 * See the following thread for more details of the problem:
5436 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5437 */
5438 indirect_mask |= nir_var_function_temp;
5439
5440 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5441 return progress;
5442 }
5443
5444 static unsigned
5445 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5446 {
5447 if (intrin->intrinsic != nir_intrinsic_store_deref)
5448 return 0;
5449
5450 nir_variable *var =
5451 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5452
5453 if (var->data.mode != nir_var_shader_out)
5454 return 0;
5455
5456 unsigned writemask = 0;
5457 const int location = var->data.location;
5458 unsigned first_component = var->data.location_frac;
5459 unsigned num_comps = intrin->dest.ssa.num_components;
5460
5461 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5462 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5463 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5464 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5465
5466 return writemask;
5467 }
5468
5469 static void
5470 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5471 unsigned *cond_block_tf_writemask,
5472 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5473 {
5474 switch (cf_node->type) {
5475 case nir_cf_node_block: {
5476 nir_block *block = nir_cf_node_as_block(cf_node);
5477 nir_foreach_instr(instr, block) {
5478 if (instr->type != nir_instr_type_intrinsic)
5479 continue;
5480
5481 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5482 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5483
5484 /* If we find a barrier in nested control flow put this in the
5485 * too hard basket. In GLSL this is not possible but it is in
5486 * SPIR-V.
5487 */
5488 if (is_nested_cf) {
5489 *tessfactors_are_def_in_all_invocs = false;
5490 return;
5491 }
5492
5493 /* The following case must be prevented:
5494 * gl_TessLevelInner = ...;
5495 * barrier();
5496 * if (gl_InvocationID == 1)
5497 * gl_TessLevelInner = ...;
5498 *
5499 * If you consider disjoint code segments separated by barriers, each
5500 * such segment that writes tess factor channels should write the same
5501 * channels in all codepaths within that segment.
5502 */
5503 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5504 /* Accumulate the result: */
5505 *tessfactors_are_def_in_all_invocs &=
5506 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5507
5508 /* Analyze the next code segment from scratch. */
5509 *upper_block_tf_writemask = 0;
5510 *cond_block_tf_writemask = 0;
5511 }
5512 } else
5513 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5514 }
5515
5516 break;
5517 }
5518 case nir_cf_node_if: {
5519 unsigned then_tessfactor_writemask = 0;
5520 unsigned else_tessfactor_writemask = 0;
5521
5522 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5523 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5524 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5525 cond_block_tf_writemask,
5526 tessfactors_are_def_in_all_invocs, true);
5527 }
5528
5529 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5530 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5531 cond_block_tf_writemask,
5532 tessfactors_are_def_in_all_invocs, true);
5533 }
5534
5535 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5536 /* If both statements write the same tess factor channels,
5537 * we can say that the upper block writes them too.
5538 */
5539 *upper_block_tf_writemask |= then_tessfactor_writemask &
5540 else_tessfactor_writemask;
5541 *cond_block_tf_writemask |= then_tessfactor_writemask |
5542 else_tessfactor_writemask;
5543 }
5544
5545 break;
5546 }
5547 case nir_cf_node_loop: {
5548 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5549 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5550 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5551 cond_block_tf_writemask,
5552 tessfactors_are_def_in_all_invocs, true);
5553 }
5554
5555 break;
5556 }
5557 default:
5558 unreachable("unknown cf node type");
5559 }
5560 }
5561
5562 bool
5563 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5564 {
5565 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5566
5567 /* The pass works as follows:
5568 * If all codepaths write tess factors, we can say that all
5569 * invocations define tess factors.
5570 *
5571 * Each tess factor channel is tracked separately.
5572 */
5573 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5574 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5575
5576 /* Initial value = true. Here the pass will accumulate results from
5577 * multiple segments surrounded by barriers. If tess factors aren't
5578 * written at all, it's a shader bug and we don't care if this will be
5579 * true.
5580 */
5581 bool tessfactors_are_def_in_all_invocs = true;
5582
5583 nir_foreach_function(function, nir) {
5584 if (function->impl) {
5585 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5586 scan_tess_ctrl(node, &main_block_tf_writemask,
5587 &cond_block_tf_writemask,
5588 &tessfactors_are_def_in_all_invocs,
5589 false);
5590 }
5591 }
5592 }
5593
5594 /* Accumulate the result for the last code segment separated by a
5595 * barrier.
5596 */
5597 if (main_block_tf_writemask || cond_block_tf_writemask) {
5598 tessfactors_are_def_in_all_invocs &=
5599 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5600 }
5601
5602 return tessfactors_are_def_in_all_invocs;
5603 }