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[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_1f_param_scalar(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0)
223 {
224 if (LLVMGetTypeKind(result_type) != LLVMVectorTypeKind)
225 return emit_intrin_1f_param(ctx, intrin, result_type, src0);
226
227 LLVMTypeRef elem_type = LLVMGetElementType(result_type);
228 LLVMValueRef ret = LLVMGetUndef(result_type);
229
230 /* Scalarize the intrinsic, because vectors are not supported. */
231 for (unsigned i = 0; i < LLVMGetVectorSize(result_type); i++) {
232 char name[64], type[64];
233 LLVMValueRef params[] = {
234 ac_to_float(ctx, ac_llvm_extract_elem(ctx, src0, i)),
235 };
236
237 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
238 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
239 assert(length < sizeof(name));
240 ret = LLVMBuildInsertElement(ctx->builder, ret,
241 ac_build_intrinsic(ctx, name, elem_type, params,
242 1, AC_FUNC_ATTR_READNONE),
243 LLVMConstInt(ctx->i32, i, 0), "");
244 }
245 return ret;
246 }
247
248 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
249 const char *intrin,
250 LLVMTypeRef result_type,
251 LLVMValueRef src0, LLVMValueRef src1)
252 {
253 char name[64], type[64];
254 LLVMValueRef params[] = {
255 ac_to_float(ctx, src0),
256 ac_to_float(ctx, src1),
257 };
258
259 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
260 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
261 assert(length < sizeof(name));
262 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
263 }
264
265 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
266 const char *intrin,
267 LLVMTypeRef result_type,
268 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
269 {
270 char name[64], type[64];
271 LLVMValueRef params[] = {
272 ac_to_float(ctx, src0),
273 ac_to_float(ctx, src1),
274 ac_to_float(ctx, src2),
275 };
276
277 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
278 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
279 assert(length < sizeof(name));
280 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
281 }
282
283 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
284 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
285 {
286 LLVMTypeRef src1_type = LLVMTypeOf(src1);
287 LLVMTypeRef src2_type = LLVMTypeOf(src2);
288
289 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
290 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
291 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
292 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
293 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
294 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
295 }
296
297 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
298 LLVMConstNull(LLVMTypeOf(src0)), "");
299 return LLVMBuildSelect(ctx->builder, v,
300 ac_to_integer_or_pointer(ctx, src1),
301 ac_to_integer_or_pointer(ctx, src2), "");
302 }
303
304 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
305 LLVMValueRef src0)
306 {
307 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
308 }
309
310 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
311 const char *intrin,
312 LLVMValueRef src0, LLVMValueRef src1)
313 {
314 LLVMTypeRef ret_type;
315 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
316 LLVMValueRef res;
317 LLVMValueRef params[] = { src0, src1 };
318 ret_type = LLVMStructTypeInContext(ctx->context, types,
319 2, true);
320
321 res = ac_build_intrinsic(ctx, intrin, ret_type,
322 params, 2, AC_FUNC_ATTR_READNONE);
323
324 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
325 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
326 return res;
327 }
328
329 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
330 LLVMValueRef src0,
331 unsigned bitsize)
332 {
333 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
334 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
335 "");
336 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
337
338 switch (bitsize) {
339 case 16:
340 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
341 case 32:
342 return result;
343 case 64:
344 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
345 default:
346 unreachable("Unsupported bit size.");
347 }
348 }
349
350 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
351 LLVMValueRef src0)
352 {
353 src0 = ac_to_float(ctx, src0);
354 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
355 return LLVMBuildSExt(ctx->builder,
356 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
357 ctx->i32, "");
358 }
359
360 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
361 LLVMValueRef src0,
362 unsigned bitsize)
363 {
364 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
365
366 switch (bitsize) {
367 case 8:
368 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
369 case 16:
370 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
371 case 32:
372 return result;
373 case 64:
374 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
375 default:
376 unreachable("Unsupported bit size.");
377 }
378 }
379
380 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
381 LLVMValueRef src0)
382 {
383 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
384 return LLVMBuildSExt(ctx->builder,
385 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
386 ctx->i32, "");
387 }
388
389 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
390 LLVMValueRef src0)
391 {
392 LLVMValueRef result;
393 LLVMValueRef cond = NULL;
394
395 src0 = ac_to_float(ctx, src0);
396 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
397
398 if (ctx->chip_class >= GFX8) {
399 LLVMValueRef args[2];
400 /* Check if the result is a denormal - and flush to 0 if so. */
401 args[0] = result;
402 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
403 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
404 }
405
406 /* need to convert back up to f32 */
407 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
408
409 if (ctx->chip_class >= GFX8)
410 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
411 else {
412 /* for GFX6-GFX7 */
413 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
414 * so compare the result and flush to 0 if it's smaller.
415 */
416 LLVMValueRef temp, cond2;
417 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
418 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
419 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
420 temp, "");
421 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
422 temp, ctx->f32_0, "");
423 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
424 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
425 }
426 return result;
427 }
428
429 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
430 LLVMValueRef src0, LLVMValueRef src1)
431 {
432 LLVMValueRef dst64, result;
433 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
434 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
435
436 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
437 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
438 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
439 return result;
440 }
441
442 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
443 LLVMValueRef src0, LLVMValueRef src1)
444 {
445 LLVMValueRef dst64, result;
446 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
447 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
448
449 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
450 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
451 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
452 return result;
453 }
454
455 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
456 LLVMValueRef bits, LLVMValueRef offset)
457 {
458 /* mask = ((1 << bits) - 1) << offset */
459 return LLVMBuildShl(ctx->builder,
460 LLVMBuildSub(ctx->builder,
461 LLVMBuildShl(ctx->builder,
462 ctx->i32_1,
463 bits, ""),
464 ctx->i32_1, ""),
465 offset, "");
466 }
467
468 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
469 LLVMValueRef mask, LLVMValueRef insert,
470 LLVMValueRef base)
471 {
472 /* Calculate:
473 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
474 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
475 */
476 return LLVMBuildXor(ctx->builder, base,
477 LLVMBuildAnd(ctx->builder, mask,
478 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
479 }
480
481 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
482 LLVMValueRef src0,
483 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
484 LLVMValueRef args[2]))
485 {
486 LLVMValueRef comp[2];
487
488 src0 = ac_to_float(ctx, src0);
489 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
490 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
491
492 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
493 }
494
495 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
496 LLVMValueRef src0)
497 {
498 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
499 LLVMValueRef temps[2], val;
500 int i;
501
502 for (i = 0; i < 2; i++) {
503 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
504 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
505 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
506 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
507 }
508 return ac_build_gather_values(ctx, temps, 2);
509 }
510
511 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
512 nir_op op,
513 LLVMValueRef src0)
514 {
515 unsigned mask;
516 int idx;
517 LLVMValueRef result;
518
519 if (op == nir_op_fddx_fine)
520 mask = AC_TID_MASK_LEFT;
521 else if (op == nir_op_fddy_fine)
522 mask = AC_TID_MASK_TOP;
523 else
524 mask = AC_TID_MASK_TOP_LEFT;
525
526 /* for DDX we want to next X pixel, DDY next Y pixel. */
527 if (op == nir_op_fddx_fine ||
528 op == nir_op_fddx_coarse ||
529 op == nir_op_fddx)
530 idx = 1;
531 else
532 idx = 2;
533
534 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
535 return result;
536 }
537
538 struct waterfall_context {
539 LLVMBasicBlockRef phi_bb[2];
540 bool use_waterfall;
541 };
542
543 /* To deal with divergent descriptors we can create a loop that handles all
544 * lanes with the same descriptor on a given iteration (henceforth a
545 * waterfall loop).
546 *
547 * These helper create the begin and end of the loop leaving the caller
548 * to implement the body.
549 *
550 * params:
551 * - ctx is the usal nir context
552 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
553 * - value is the possibly divergent value for which we built the loop
554 * - divergent is whether value is actually divergent. If false we just pass
555 * things through.
556 */
557 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
558 struct waterfall_context *wctx,
559 LLVMValueRef value, bool divergent)
560 {
561 /* If the app claims the value is divergent but it is constant we can
562 * end up with a dynamic index of NULL. */
563 if (!value)
564 divergent = false;
565
566 wctx->use_waterfall = divergent;
567 if (!divergent)
568 return value;
569
570 ac_build_bgnloop(&ctx->ac, 6000);
571
572 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
573
574 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
575 scalar_value, "uniform_active");
576
577 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
578 ac_build_ifcc(&ctx->ac, active, 6001);
579
580 return scalar_value;
581 }
582
583 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
584 struct waterfall_context *wctx,
585 LLVMValueRef value)
586 {
587 LLVMValueRef ret = NULL;
588 LLVMValueRef phi_src[2];
589 LLVMValueRef cc_phi_src[2] = {
590 LLVMConstInt(ctx->ac.i32, 0, false),
591 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
592 };
593
594 if (!wctx->use_waterfall)
595 return value;
596
597 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
598
599 ac_build_endif(&ctx->ac, 6001);
600
601 if (value) {
602 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
603 phi_src[1] = value;
604
605 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
606 }
607
608 /*
609 * By using the optimization barrier on the exit decision, we decouple
610 * the operations from the break, and hence avoid LLVM hoisting the
611 * opteration into the break block.
612 */
613 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
614 ac_build_optimization_barrier(&ctx->ac, &cc);
615
616 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
617 ac_build_ifcc(&ctx->ac, active, 6002);
618 ac_build_break(&ctx->ac);
619 ac_build_endif(&ctx->ac, 6002);
620
621 ac_build_endloop(&ctx->ac, 6000);
622 return ret;
623 }
624
625 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
626 {
627 LLVMValueRef src[4], result = NULL;
628 unsigned num_components = instr->dest.dest.ssa.num_components;
629 unsigned src_components;
630 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
631
632 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
633 switch (instr->op) {
634 case nir_op_vec2:
635 case nir_op_vec3:
636 case nir_op_vec4:
637 src_components = 1;
638 break;
639 case nir_op_pack_half_2x16:
640 case nir_op_pack_snorm_2x16:
641 case nir_op_pack_unorm_2x16:
642 src_components = 2;
643 break;
644 case nir_op_unpack_half_2x16:
645 src_components = 1;
646 break;
647 case nir_op_cube_face_coord:
648 case nir_op_cube_face_index:
649 src_components = 3;
650 break;
651 default:
652 src_components = num_components;
653 break;
654 }
655 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
656 src[i] = get_alu_src(ctx, instr->src[i], src_components);
657
658 switch (instr->op) {
659 case nir_op_mov:
660 result = src[0];
661 break;
662 case nir_op_fneg:
663 src[0] = ac_to_float(&ctx->ac, src[0]);
664 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
665 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
666 /* fneg will be optimized by backend compiler with sign
667 * bit removed via XOR. This is probably a LLVM bug.
668 */
669 result = ac_build_canonicalize(&ctx->ac, result,
670 instr->dest.dest.ssa.bit_size);
671 }
672 break;
673 case nir_op_ineg:
674 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
675 break;
676 case nir_op_inot:
677 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
678 break;
679 case nir_op_iadd:
680 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
681 break;
682 case nir_op_fadd:
683 src[0] = ac_to_float(&ctx->ac, src[0]);
684 src[1] = ac_to_float(&ctx->ac, src[1]);
685 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
686 break;
687 case nir_op_fsub:
688 src[0] = ac_to_float(&ctx->ac, src[0]);
689 src[1] = ac_to_float(&ctx->ac, src[1]);
690 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
691 break;
692 case nir_op_isub:
693 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_imul:
696 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
697 break;
698 case nir_op_imod:
699 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
700 break;
701 case nir_op_umod:
702 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
703 break;
704 case nir_op_irem:
705 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
706 break;
707 case nir_op_idiv:
708 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
709 break;
710 case nir_op_udiv:
711 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
712 break;
713 case nir_op_fmul:
714 src[0] = ac_to_float(&ctx->ac, src[0]);
715 src[1] = ac_to_float(&ctx->ac, src[1]);
716 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
717 break;
718 case nir_op_frcp:
719 /* For doubles, we need precise division to pass GLCTS. */
720 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
721 ac_get_type_size(def_type) == 8) {
722 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
723 ac_to_float(&ctx->ac, src[0]), "");
724 } else {
725 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.rcp",
726 ac_to_float_type(&ctx->ac, def_type), src[0]);
727 }
728 if (ctx->abi->clamp_div_by_zero)
729 result = ac_build_fmin(&ctx->ac, result,
730 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
731 break;
732 case nir_op_iand:
733 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
734 break;
735 case nir_op_ior:
736 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
737 break;
738 case nir_op_ixor:
739 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
740 break;
741 case nir_op_ishl:
742 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
743 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
744 LLVMTypeOf(src[0]), "");
745 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
746 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
747 LLVMTypeOf(src[0]), "");
748 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
749 break;
750 case nir_op_ishr:
751 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
752 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
753 LLVMTypeOf(src[0]), "");
754 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
755 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
756 LLVMTypeOf(src[0]), "");
757 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
758 break;
759 case nir_op_ushr:
760 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
761 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
762 LLVMTypeOf(src[0]), "");
763 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
764 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
765 LLVMTypeOf(src[0]), "");
766 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
767 break;
768 case nir_op_ilt32:
769 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
770 break;
771 case nir_op_ine32:
772 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
773 break;
774 case nir_op_ieq32:
775 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
776 break;
777 case nir_op_ige32:
778 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
779 break;
780 case nir_op_ult32:
781 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
782 break;
783 case nir_op_uge32:
784 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
785 break;
786 case nir_op_feq32:
787 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
788 break;
789 case nir_op_fneu32:
790 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
791 break;
792 case nir_op_flt32:
793 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
794 break;
795 case nir_op_fge32:
796 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
797 break;
798 case nir_op_fabs:
799 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
800 ac_to_float_type(&ctx->ac, def_type), src[0]);
801 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
802 /* fabs will be optimized by backend compiler with sign
803 * bit removed via AND.
804 */
805 result = ac_build_canonicalize(&ctx->ac, result,
806 instr->dest.dest.ssa.bit_size);
807 }
808 break;
809 case nir_op_iabs:
810 result = emit_iabs(&ctx->ac, src[0]);
811 break;
812 case nir_op_imax:
813 result = ac_build_imax(&ctx->ac, src[0], src[1]);
814 break;
815 case nir_op_imin:
816 result = ac_build_imin(&ctx->ac, src[0], src[1]);
817 break;
818 case nir_op_umax:
819 result = ac_build_umax(&ctx->ac, src[0], src[1]);
820 break;
821 case nir_op_umin:
822 result = ac_build_umin(&ctx->ac, src[0], src[1]);
823 break;
824 case nir_op_isign:
825 result = ac_build_isign(&ctx->ac, src[0]);
826 break;
827 case nir_op_fsign:
828 src[0] = ac_to_float(&ctx->ac, src[0]);
829 result = ac_build_fsign(&ctx->ac, src[0],
830 instr->dest.dest.ssa.bit_size);
831 break;
832 case nir_op_ffloor:
833 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
834 ac_to_float_type(&ctx->ac, def_type), src[0]);
835 break;
836 case nir_op_ftrunc:
837 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
838 ac_to_float_type(&ctx->ac, def_type), src[0]);
839 break;
840 case nir_op_fceil:
841 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
842 ac_to_float_type(&ctx->ac, def_type), src[0]);
843 break;
844 case nir_op_fround_even:
845 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
846 ac_to_float_type(&ctx->ac, def_type),src[0]);
847 break;
848 case nir_op_ffract:
849 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.fract",
850 ac_to_float_type(&ctx->ac, def_type), src[0]);
851 break;
852 case nir_op_fsin:
853 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
854 ac_to_float_type(&ctx->ac, def_type), src[0]);
855 break;
856 case nir_op_fcos:
857 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
858 ac_to_float_type(&ctx->ac, def_type), src[0]);
859 break;
860 case nir_op_fsqrt:
861 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
862 ac_to_float_type(&ctx->ac, def_type), src[0]);
863 break;
864 case nir_op_fexp2:
865 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
866 ac_to_float_type(&ctx->ac, def_type), src[0]);
867 break;
868 case nir_op_flog2:
869 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
870 ac_to_float_type(&ctx->ac, def_type), src[0]);
871 break;
872 case nir_op_frsq:
873 result = emit_intrin_1f_param_scalar(&ctx->ac, "llvm.amdgcn.rsq",
874 ac_to_float_type(&ctx->ac, def_type), src[0]);
875 if (ctx->abi->clamp_div_by_zero)
876 result = ac_build_fmin(&ctx->ac, result,
877 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
878 break;
879 case nir_op_frexp_exp:
880 src[0] = ac_to_float(&ctx->ac, src[0]);
881 result = ac_build_frexp_exp(&ctx->ac, src[0],
882 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
883 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
884 result = LLVMBuildSExt(ctx->ac.builder, result,
885 ctx->ac.i32, "");
886 break;
887 case nir_op_frexp_sig:
888 src[0] = ac_to_float(&ctx->ac, src[0]);
889 result = ac_build_frexp_mant(&ctx->ac, src[0],
890 instr->dest.dest.ssa.bit_size);
891 break;
892 case nir_op_fpow:
893 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
894 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
895 break;
896 case nir_op_fmax:
897 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
898 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
899 if (ctx->ac.chip_class < GFX9 &&
900 instr->dest.dest.ssa.bit_size == 32) {
901 /* Only pre-GFX9 chips do not flush denorms. */
902 result = ac_build_canonicalize(&ctx->ac, result,
903 instr->dest.dest.ssa.bit_size);
904 }
905 break;
906 case nir_op_fmin:
907 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
908 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
909 if (ctx->ac.chip_class < GFX9 &&
910 instr->dest.dest.ssa.bit_size == 32) {
911 /* Only pre-GFX9 chips do not flush denorms. */
912 result = ac_build_canonicalize(&ctx->ac, result,
913 instr->dest.dest.ssa.bit_size);
914 }
915 break;
916 case nir_op_ffma:
917 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
918 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
919 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
920 break;
921 case nir_op_ldexp:
922 src[0] = ac_to_float(&ctx->ac, src[0]);
923 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
924 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
925 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
926 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
927 else
928 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
929 break;
930 case nir_op_bfm:
931 result = emit_bfm(&ctx->ac, src[0], src[1]);
932 break;
933 case nir_op_bitfield_select:
934 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
935 break;
936 case nir_op_ubfe:
937 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
938 break;
939 case nir_op_ibfe:
940 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
941 break;
942 case nir_op_bitfield_reverse:
943 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
944 break;
945 case nir_op_bit_count:
946 result = ac_build_bit_count(&ctx->ac, src[0]);
947 break;
948 case nir_op_vec2:
949 case nir_op_vec3:
950 case nir_op_vec4:
951 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
952 src[i] = ac_to_integer(&ctx->ac, src[i]);
953 result = ac_build_gather_values(&ctx->ac, src, num_components);
954 break;
955 case nir_op_f2i8:
956 case nir_op_f2i16:
957 case nir_op_f2i32:
958 case nir_op_f2i64:
959 src[0] = ac_to_float(&ctx->ac, src[0]);
960 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
961 break;
962 case nir_op_f2u8:
963 case nir_op_f2u16:
964 case nir_op_f2u32:
965 case nir_op_f2u64:
966 src[0] = ac_to_float(&ctx->ac, src[0]);
967 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
968 break;
969 case nir_op_i2f16:
970 case nir_op_i2f32:
971 case nir_op_i2f64:
972 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
973 break;
974 case nir_op_u2f16:
975 case nir_op_u2f32:
976 case nir_op_u2f64:
977 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
978 break;
979 case nir_op_f2f16_rtz:
980 case nir_op_f2f16:
981 case nir_op_f2fmp:
982 src[0] = ac_to_float(&ctx->ac, src[0]);
983
984 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
985 * all f32->f16 conversions have to round towards zero, because both scalar
986 * and vec2 down-conversions have to round equally.
987 */
988 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
989 instr->op == nir_op_f2f16_rtz) {
990 src[0] = ac_to_float(&ctx->ac, src[0]);
991
992 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
993 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
994
995 /* Fast path conversion. This only works if NIR is vectorized
996 * to vec2 16.
997 */
998 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
999 LLVMValueRef args[] = {
1000 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
1001 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
1002 };
1003 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
1004 break;
1005 }
1006
1007 assert(ac_get_llvm_num_components(src[0]) == 1);
1008 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
1009 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
1010 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
1011 } else {
1012 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1013 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1014 else
1015 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1016 }
1017 break;
1018 case nir_op_f2f16_rtne:
1019 case nir_op_f2f32:
1020 case nir_op_f2f64:
1021 src[0] = ac_to_float(&ctx->ac, src[0]);
1022 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1023 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1024 else
1025 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1026 break;
1027 case nir_op_u2u8:
1028 case nir_op_u2u16:
1029 case nir_op_u2ump:
1030 case nir_op_u2u32:
1031 case nir_op_u2u64:
1032 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1033 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1034 else
1035 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1036 break;
1037 case nir_op_i2i8:
1038 case nir_op_i2i16:
1039 case nir_op_i2imp:
1040 case nir_op_i2i32:
1041 case nir_op_i2i64:
1042 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1043 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1044 else
1045 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1046 break;
1047 case nir_op_b32csel:
1048 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1049 break;
1050 case nir_op_find_lsb:
1051 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1052 break;
1053 case nir_op_ufind_msb:
1054 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1055 break;
1056 case nir_op_ifind_msb:
1057 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1058 break;
1059 case nir_op_uadd_carry:
1060 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1061 break;
1062 case nir_op_usub_borrow:
1063 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1064 break;
1065 case nir_op_b2f16:
1066 case nir_op_b2f32:
1067 case nir_op_b2f64:
1068 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1069 break;
1070 case nir_op_f2b32:
1071 result = emit_f2b(&ctx->ac, src[0]);
1072 break;
1073 case nir_op_b2i8:
1074 case nir_op_b2i16:
1075 case nir_op_b2i32:
1076 case nir_op_b2i64:
1077 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1078 break;
1079 case nir_op_i2b32:
1080 result = emit_i2b(&ctx->ac, src[0]);
1081 break;
1082 case nir_op_fquantize2f16:
1083 result = emit_f2f16(&ctx->ac, src[0]);
1084 break;
1085 case nir_op_umul_high:
1086 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1087 break;
1088 case nir_op_imul_high:
1089 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1090 break;
1091 case nir_op_pack_half_2x16:
1092 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1093 break;
1094 case nir_op_pack_snorm_2x16:
1095 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1096 break;
1097 case nir_op_pack_unorm_2x16:
1098 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1099 break;
1100 case nir_op_unpack_half_2x16:
1101 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1102 break;
1103 case nir_op_fddx:
1104 case nir_op_fddy:
1105 case nir_op_fddx_fine:
1106 case nir_op_fddy_fine:
1107 case nir_op_fddx_coarse:
1108 case nir_op_fddy_coarse:
1109 result = emit_ddxy(ctx, instr->op, src[0]);
1110 break;
1111
1112 case nir_op_unpack_64_2x32_split_x: {
1113 assert(ac_get_llvm_num_components(src[0]) == 1);
1114 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1115 ctx->ac.v2i32,
1116 "");
1117 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1118 ctx->ac.i32_0, "");
1119 break;
1120 }
1121
1122 case nir_op_unpack_64_2x32_split_y: {
1123 assert(ac_get_llvm_num_components(src[0]) == 1);
1124 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1125 ctx->ac.v2i32,
1126 "");
1127 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1128 ctx->ac.i32_1, "");
1129 break;
1130 }
1131
1132 case nir_op_pack_64_2x32_split: {
1133 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1134 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1135 break;
1136 }
1137
1138 case nir_op_pack_32_2x16_split: {
1139 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1140 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1141 break;
1142 }
1143
1144 case nir_op_unpack_32_2x16_split_x: {
1145 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1146 ctx->ac.v2i16,
1147 "");
1148 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1149 ctx->ac.i32_0, "");
1150 break;
1151 }
1152
1153 case nir_op_unpack_32_2x16_split_y: {
1154 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1155 ctx->ac.v2i16,
1156 "");
1157 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1158 ctx->ac.i32_1, "");
1159 break;
1160 }
1161
1162 case nir_op_cube_face_coord: {
1163 src[0] = ac_to_float(&ctx->ac, src[0]);
1164 LLVMValueRef results[2];
1165 LLVMValueRef in[3];
1166 for (unsigned chan = 0; chan < 3; chan++)
1167 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1168 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1169 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1170 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1171 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1172 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1173 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1174 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1175 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1176 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1177 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1178 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1179 result = ac_build_gather_values(&ctx->ac, results, 2);
1180 break;
1181 }
1182
1183 case nir_op_cube_face_index: {
1184 src[0] = ac_to_float(&ctx->ac, src[0]);
1185 LLVMValueRef in[3];
1186 for (unsigned chan = 0; chan < 3; chan++)
1187 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1188 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1189 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1190 break;
1191 }
1192
1193 default:
1194 fprintf(stderr, "Unknown NIR alu instr: ");
1195 nir_print_instr(&instr->instr, stderr);
1196 fprintf(stderr, "\n");
1197 abort();
1198 }
1199
1200 if (result) {
1201 assert(instr->dest.dest.is_ssa);
1202 result = ac_to_integer_or_pointer(&ctx->ac, result);
1203 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1204 }
1205 }
1206
1207 static void visit_load_const(struct ac_nir_context *ctx,
1208 const nir_load_const_instr *instr)
1209 {
1210 LLVMValueRef values[4], value = NULL;
1211 LLVMTypeRef element_type =
1212 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1213
1214 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1215 switch (instr->def.bit_size) {
1216 case 8:
1217 values[i] = LLVMConstInt(element_type,
1218 instr->value[i].u8, false);
1219 break;
1220 case 16:
1221 values[i] = LLVMConstInt(element_type,
1222 instr->value[i].u16, false);
1223 break;
1224 case 32:
1225 values[i] = LLVMConstInt(element_type,
1226 instr->value[i].u32, false);
1227 break;
1228 case 64:
1229 values[i] = LLVMConstInt(element_type,
1230 instr->value[i].u64, false);
1231 break;
1232 default:
1233 fprintf(stderr,
1234 "unsupported nir load_const bit_size: %d\n",
1235 instr->def.bit_size);
1236 abort();
1237 }
1238 }
1239 if (instr->def.num_components > 1) {
1240 value = LLVMConstVector(values, instr->def.num_components);
1241 } else
1242 value = values[0];
1243
1244 ctx->ssa_defs[instr->def.index] = value;
1245 }
1246
1247 static LLVMValueRef
1248 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1249 {
1250 LLVMValueRef size =
1251 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1252 LLVMConstInt(ctx->ac.i32, 2, false), "");
1253
1254 /* GFX8 only */
1255 if (ctx->ac.chip_class == GFX8 && in_elements) {
1256 /* On GFX8, the descriptor contains the size in bytes,
1257 * but TXQ must return the size in elements.
1258 * The stride is always non-zero for resources using TXQ.
1259 */
1260 LLVMValueRef stride =
1261 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1262 ctx->ac.i32_1, "");
1263 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1264 LLVMConstInt(ctx->ac.i32, 16, false), "");
1265 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1266 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1267
1268 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1269 }
1270 return size;
1271 }
1272
1273 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1274 * incorrectly forces nearest filtering if the texture format is integer.
1275 * The only effect it has on Gather4, which always returns 4 texels for
1276 * bilinear filtering, is that the final coordinates are off by 0.5 of
1277 * the texel size.
1278 *
1279 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1280 * or (0.5 / size) from the normalized coordinates.
1281 *
1282 * However, cube textures with 8_8_8_8 data formats require a different
1283 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1284 * precision in 32-bit data formats, so it needs to be applied dynamically at
1285 * runtime. In this case, return an i1 value that indicates whether the
1286 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1287 */
1288 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1289 nir_variable *var,
1290 struct ac_image_args *args,
1291 const nir_tex_instr *instr)
1292 {
1293 const struct glsl_type *type = glsl_without_array(var->type);
1294 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1295 LLVMValueRef wa_8888 = NULL;
1296 LLVMValueRef half_texel[2];
1297 LLVMValueRef result;
1298
1299 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1300
1301 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1302 LLVMValueRef formats;
1303 LLVMValueRef data_format;
1304 LLVMValueRef wa_formats;
1305
1306 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1307
1308 data_format = LLVMBuildLShr(ctx->builder, formats,
1309 LLVMConstInt(ctx->i32, 20, false), "");
1310 data_format = LLVMBuildAnd(ctx->builder, data_format,
1311 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1312 wa_8888 = LLVMBuildICmp(
1313 ctx->builder, LLVMIntEQ, data_format,
1314 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1315 "");
1316
1317 uint32_t wa_num_format =
1318 stype == GLSL_TYPE_UINT ?
1319 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1320 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1321 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1322 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1323 "");
1324 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1325 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1326
1327 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1328 args->resource = LLVMBuildInsertElement(
1329 ctx->builder, args->resource, formats, ctx->i32_1, "");
1330 }
1331
1332 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1333 assert(!wa_8888);
1334 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1335 } else {
1336 struct ac_image_args resinfo = {};
1337 LLVMBasicBlockRef bbs[2];
1338
1339 LLVMValueRef unnorm = NULL;
1340 LLVMValueRef default_offset = ctx->f32_0;
1341 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1342 !instr->is_array) {
1343 /* In vulkan, whether the sampler uses unnormalized
1344 * coordinates or not is a dynamic property of the
1345 * sampler. Hence, to figure out whether or not we
1346 * need to divide by the texture size, we need to test
1347 * the sampler at runtime. This tests the bit set by
1348 * radv_init_sampler().
1349 */
1350 LLVMValueRef sampler0 =
1351 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1352 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1353 LLVMConstInt(ctx->i32, 15, false), "");
1354 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1355 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1356 default_offset = LLVMConstReal(ctx->f32, -0.5);
1357 }
1358
1359 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1360 if (wa_8888 || unnorm) {
1361 assert(!(wa_8888 && unnorm));
1362 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1363 /* Skip the texture size query entirely if we don't need it. */
1364 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1365 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1366 }
1367
1368 /* Query the texture size. */
1369 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1370 resinfo.opcode = ac_image_get_resinfo;
1371 resinfo.dmask = 0xf;
1372 resinfo.lod = ctx->i32_0;
1373 resinfo.resource = args->resource;
1374 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1375 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1376
1377 /* Compute -0.5 / size. */
1378 for (unsigned c = 0; c < 2; c++) {
1379 half_texel[c] =
1380 LLVMBuildExtractElement(ctx->builder, size,
1381 LLVMConstInt(ctx->i32, c, 0), "");
1382 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1383 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1384 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1385 LLVMConstReal(ctx->f32, -0.5), "");
1386 }
1387
1388 if (wa_8888 || unnorm) {
1389 ac_build_endif(ctx, 2000);
1390
1391 for (unsigned c = 0; c < 2; c++) {
1392 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1393 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1394 values, bbs);
1395 }
1396 }
1397 }
1398
1399 for (unsigned c = 0; c < 2; c++) {
1400 LLVMValueRef tmp;
1401 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1402 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1403 }
1404
1405 args->attributes = AC_FUNC_ATTR_READNONE;
1406 result = ac_build_image_opcode(ctx, args);
1407
1408 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1409 LLVMValueRef tmp, tmp2;
1410
1411 /* if the cube workaround is in place, f2i the result. */
1412 for (unsigned c = 0; c < 4; c++) {
1413 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1414 if (stype == GLSL_TYPE_UINT)
1415 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1416 else
1417 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1418 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1419 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1420 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1421 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1422 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1423 }
1424 }
1425 return result;
1426 }
1427
1428 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1429 {
1430 nir_deref_instr *texture_deref_instr = NULL;
1431
1432 for (unsigned i = 0; i < instr->num_srcs; i++) {
1433 switch (instr->src[i].src_type) {
1434 case nir_tex_src_texture_deref:
1435 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1436 break;
1437 default:
1438 break;
1439 }
1440 }
1441 return texture_deref_instr;
1442 }
1443
1444 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1445 const nir_tex_instr *instr,
1446 struct ac_image_args *args)
1447 {
1448 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1449 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1450
1451 assert(instr->dest.is_ssa);
1452 return ac_build_buffer_load_format(&ctx->ac,
1453 args->resource,
1454 args->coords[0],
1455 ctx->ac.i32_0,
1456 util_last_bit(mask),
1457 0, true,
1458 instr->dest.ssa.bit_size == 16);
1459 }
1460
1461 args->opcode = ac_image_sample;
1462
1463 switch (instr->op) {
1464 case nir_texop_txf:
1465 case nir_texop_txf_ms:
1466 case nir_texop_samples_identical:
1467 args->opcode = args->level_zero ||
1468 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1469 ac_image_load : ac_image_load_mip;
1470 args->level_zero = false;
1471 break;
1472 case nir_texop_txs:
1473 case nir_texop_query_levels:
1474 args->opcode = ac_image_get_resinfo;
1475 if (!args->lod)
1476 args->lod = ctx->ac.i32_0;
1477 args->level_zero = false;
1478 break;
1479 case nir_texop_tex:
1480 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1481 assert(!args->lod);
1482 args->level_zero = true;
1483 }
1484 break;
1485 case nir_texop_tg4:
1486 args->opcode = ac_image_gather4;
1487 if (!args->lod && !args->bias)
1488 args->level_zero = true;
1489 break;
1490 case nir_texop_lod:
1491 args->opcode = ac_image_get_lod;
1492 break;
1493 case nir_texop_fragment_fetch:
1494 case nir_texop_fragment_mask_fetch:
1495 args->opcode = ac_image_load;
1496 args->level_zero = false;
1497 break;
1498 default:
1499 break;
1500 }
1501
1502 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1503 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1504 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1505 const struct glsl_type *type = glsl_without_array(var->type);
1506 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1507 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1508 return lower_gather4_integer(&ctx->ac, var, args, instr);
1509 }
1510 }
1511
1512 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1513 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1514 if ((args->dim == ac_image_2darray ||
1515 args->dim == ac_image_2d) && !args->coords[1]) {
1516 args->coords[1] = ctx->ac.i32_0;
1517 }
1518 }
1519
1520 args->attributes = AC_FUNC_ATTR_READNONE;
1521 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1522 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1523 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1524 /* Prevent texture instructions with implicit derivatives from being
1525 * sinked into branches. */
1526 switch (instr->op) {
1527 case nir_texop_tex:
1528 case nir_texop_txb:
1529 case nir_texop_lod:
1530 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1531 break;
1532 default:
1533 break;
1534 }
1535 }
1536
1537 return ac_build_image_opcode(&ctx->ac, args);
1538 }
1539
1540 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1541 nir_intrinsic_instr *instr)
1542 {
1543 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1544 LLVMValueRef index = get_src(ctx, instr->src[1]);
1545
1546 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1547 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1548 return result;
1549 }
1550
1551 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1552 nir_intrinsic_instr *instr)
1553 {
1554 LLVMValueRef ptr, addr;
1555 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1556 unsigned index = nir_intrinsic_base(instr);
1557
1558 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1559 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1560
1561 /* Load constant values from user SGPRS when possible, otherwise
1562 * fallback to the default path that loads directly from memory.
1563 */
1564 if (LLVMIsConstant(src0) &&
1565 instr->dest.ssa.bit_size == 32) {
1566 unsigned count = instr->dest.ssa.num_components;
1567 unsigned offset = index;
1568
1569 offset += LLVMConstIntGetZExtValue(src0);
1570 offset /= 4;
1571
1572 offset -= ctx->args->base_inline_push_consts;
1573
1574 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1575 if (offset + count <= num_inline_push_consts) {
1576 LLVMValueRef push_constants[num_inline_push_consts];
1577 for (unsigned i = 0; i < num_inline_push_consts; i++)
1578 push_constants[i] = ac_get_arg(&ctx->ac,
1579 ctx->args->inline_push_consts[i]);
1580 return ac_build_gather_values(&ctx->ac,
1581 push_constants + offset,
1582 count);
1583 }
1584 }
1585
1586 ptr = LLVMBuildGEP(ctx->ac.builder,
1587 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1588
1589 if (instr->dest.ssa.bit_size == 8) {
1590 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1591 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1592 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1593 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1594
1595 LLVMValueRef params[3];
1596 if (load_dwords > 1) {
1597 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1598 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1599 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1600 } else {
1601 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1602 params[0] = ctx->ac.i32_0;
1603 params[1] = res;
1604 }
1605 params[2] = addr;
1606 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1607
1608 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1609 if (instr->dest.ssa.num_components > 1)
1610 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1611 return res;
1612 } else if (instr->dest.ssa.bit_size == 16) {
1613 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1614 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1615 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1616 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1617 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1618 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1619 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1620 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1621 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1622 LLVMConstInt(ctx->ac.i32, 4, false)};
1623 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1624 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1625 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1626 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1627 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1628 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1629 }
1630
1631 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1632
1633 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1634 }
1635
1636 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1637 const nir_intrinsic_instr *instr)
1638 {
1639 LLVMValueRef index = get_src(ctx, instr->src[0]);
1640
1641 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1642 }
1643
1644 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1645 {
1646 uint32_t new_mask = 0;
1647 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1648 if (mask & (1u << i))
1649 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1650 return new_mask;
1651 }
1652
1653 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1654 unsigned start, unsigned count)
1655 {
1656 LLVMValueRef mask[] = {
1657 ctx->i32_0, ctx->i32_1,
1658 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1659
1660 unsigned src_elements = ac_get_llvm_num_components(src);
1661
1662 if (count == src_elements) {
1663 assert(start == 0);
1664 return src;
1665 } else if (count == 1) {
1666 assert(start < src_elements);
1667 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1668 } else {
1669 assert(start + count <= src_elements);
1670 assert(count <= 4);
1671 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1672 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1673 }
1674 }
1675
1676 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1677 enum gl_access_qualifier access,
1678 bool may_store_unaligned,
1679 bool writeonly_memory)
1680 {
1681 unsigned cache_policy = 0;
1682
1683 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1684 * store opcodes not aligned to a dword are affected. The only way to
1685 * get unaligned stores is through shader images.
1686 */
1687 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1688 /* If this is write-only, don't keep data in L1 to prevent
1689 * evicting L1 cache lines that may be needed by other
1690 * instructions.
1691 */
1692 writeonly_memory ||
1693 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1694 cache_policy |= ac_glc;
1695 }
1696
1697 if (access & ACCESS_STREAM_CACHE_POLICY)
1698 cache_policy |= ac_slc | ac_glc;
1699
1700 return cache_policy;
1701 }
1702
1703 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1704 struct waterfall_context *wctx,
1705 const nir_intrinsic_instr *instr,
1706 nir_src src)
1707 {
1708 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1709 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1710 }
1711
1712 static void visit_store_ssbo(struct ac_nir_context *ctx,
1713 nir_intrinsic_instr *instr)
1714 {
1715 if (ctx->ac.postponed_kill) {
1716 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1717 ctx->ac.postponed_kill, "");
1718 ac_build_ifcc(&ctx->ac, cond, 7000);
1719 }
1720
1721 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1722 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1723 unsigned writemask = nir_intrinsic_write_mask(instr);
1724 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1725 bool writeonly_memory = access & ACCESS_NON_READABLE;
1726 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1727
1728 struct waterfall_context wctx;
1729 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1730
1731 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1732 LLVMValueRef base_data = src_data;
1733 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1734 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1735
1736 while (writemask) {
1737 int start, count;
1738 LLVMValueRef data, offset;
1739 LLVMTypeRef data_type;
1740
1741 u_bit_scan_consecutive_range(&writemask, &start, &count);
1742
1743 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1744 * writes into a 2-element and a 1-element write. */
1745 if (count == 3 &&
1746 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1747 writemask |= 1 << (start + 2);
1748 count = 2;
1749 }
1750 int num_bytes = count * elem_size_bytes; /* count in bytes */
1751
1752 /* we can only store 4 DWords at the same time.
1753 * can only happen for 64 Bit vectors. */
1754 if (num_bytes > 16) {
1755 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1756 count = 2;
1757 num_bytes = 16;
1758 }
1759
1760 /* check alignment of 16 Bit stores */
1761 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1762 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1763 count = 1;
1764 num_bytes = 2;
1765 }
1766
1767 /* Due to alignment issues, split stores of 8-bit/16-bit
1768 * vectors.
1769 */
1770 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1771 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1772 count = 1;
1773 num_bytes = elem_size_bytes;
1774 }
1775
1776 data = extract_vector_range(&ctx->ac, base_data, start, count);
1777
1778 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1779 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1780
1781 if (num_bytes == 1) {
1782 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1783 offset, ctx->ac.i32_0,
1784 cache_policy);
1785 } else if (num_bytes == 2) {
1786 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1787 offset, ctx->ac.i32_0,
1788 cache_policy);
1789 } else {
1790 int num_channels = num_bytes / 4;
1791
1792 switch (num_bytes) {
1793 case 16: /* v4f32 */
1794 data_type = ctx->ac.v4f32;
1795 break;
1796 case 12: /* v3f32 */
1797 data_type = ctx->ac.v3f32;
1798 break;
1799 case 8: /* v2f32 */
1800 data_type = ctx->ac.v2f32;
1801 break;
1802 case 4: /* f32 */
1803 data_type = ctx->ac.f32;
1804 break;
1805 default:
1806 unreachable("Malformed vector store.");
1807 }
1808 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1809
1810 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1811 num_channels, offset,
1812 ctx->ac.i32_0, 0,
1813 cache_policy);
1814 }
1815 }
1816
1817 exit_waterfall(ctx, &wctx, NULL);
1818
1819 if (ctx->ac.postponed_kill)
1820 ac_build_endif(&ctx->ac, 7000);
1821 }
1822
1823 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1824 LLVMValueRef descriptor,
1825 LLVMValueRef offset,
1826 LLVMValueRef compare,
1827 LLVMValueRef exchange)
1828 {
1829 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1830 if (ctx->abi->robust_buffer_access) {
1831 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1832
1833 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1834 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1835
1836 ac_build_ifcc(&ctx->ac, cond, -1);
1837
1838 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1839 }
1840
1841 LLVMValueRef ptr_parts[2] = {
1842 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1843 LLVMBuildAnd(ctx->ac.builder,
1844 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1845 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1846 };
1847
1848 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1849 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1850
1851 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1852
1853 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1854 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1855 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1856 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1857
1858 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1859 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1860
1861 if (ctx->abi->robust_buffer_access) {
1862 ac_build_endif(&ctx->ac, -1);
1863
1864 LLVMBasicBlockRef incoming_blocks[2] = {
1865 start_block,
1866 then_block,
1867 };
1868
1869 LLVMValueRef incoming_values[2] = {
1870 LLVMConstInt(ctx->ac.i64, 0, 0),
1871 result,
1872 };
1873 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1874 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1875 return ret;
1876 } else {
1877 return result;
1878 }
1879 }
1880
1881 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1882 nir_intrinsic_instr *instr)
1883 {
1884 if (ctx->ac.postponed_kill) {
1885 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1886 ctx->ac.postponed_kill, "");
1887 ac_build_ifcc(&ctx->ac, cond, 7001);
1888 }
1889
1890 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1891 const char *op;
1892 char name[64], type[8];
1893 LLVMValueRef params[6], descriptor;
1894 LLVMValueRef result;
1895 int arg_count = 0;
1896
1897 struct waterfall_context wctx;
1898 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1899
1900 switch (instr->intrinsic) {
1901 case nir_intrinsic_ssbo_atomic_add:
1902 op = "add";
1903 break;
1904 case nir_intrinsic_ssbo_atomic_imin:
1905 op = "smin";
1906 break;
1907 case nir_intrinsic_ssbo_atomic_umin:
1908 op = "umin";
1909 break;
1910 case nir_intrinsic_ssbo_atomic_imax:
1911 op = "smax";
1912 break;
1913 case nir_intrinsic_ssbo_atomic_umax:
1914 op = "umax";
1915 break;
1916 case nir_intrinsic_ssbo_atomic_and:
1917 op = "and";
1918 break;
1919 case nir_intrinsic_ssbo_atomic_or:
1920 op = "or";
1921 break;
1922 case nir_intrinsic_ssbo_atomic_xor:
1923 op = "xor";
1924 break;
1925 case nir_intrinsic_ssbo_atomic_exchange:
1926 op = "swap";
1927 break;
1928 case nir_intrinsic_ssbo_atomic_comp_swap:
1929 op = "cmpswap";
1930 break;
1931 default:
1932 abort();
1933 }
1934
1935 descriptor = ctx->abi->load_ssbo(ctx->abi,
1936 rsrc_base,
1937 true);
1938
1939 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1940 return_type == ctx->ac.i64) {
1941 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1942 get_src(ctx, instr->src[1]),
1943 get_src(ctx, instr->src[2]),
1944 get_src(ctx, instr->src[3]));
1945 } else {
1946 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1947 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1948 }
1949 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1950 params[arg_count++] = descriptor;
1951
1952 if (LLVM_VERSION_MAJOR >= 9) {
1953 /* XXX: The new raw/struct atomic intrinsics are buggy with
1954 * LLVM 8, see r358579.
1955 */
1956 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1957 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1958 params[arg_count++] = ctx->ac.i32_0; /* slc */
1959
1960 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1961 snprintf(name, sizeof(name),
1962 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1963 } else {
1964 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1965 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1966 params[arg_count++] = ctx->ac.i1false; /* slc */
1967
1968 assert(return_type == ctx->ac.i32);
1969 snprintf(name, sizeof(name),
1970 "llvm.amdgcn.buffer.atomic.%s", op);
1971 }
1972
1973 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1974 arg_count, 0);
1975 }
1976
1977 result = exit_waterfall(ctx, &wctx, result);
1978 if (ctx->ac.postponed_kill)
1979 ac_build_endif(&ctx->ac, 7001);
1980 return result;
1981 }
1982
1983 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1984 nir_intrinsic_instr *instr)
1985 {
1986 struct waterfall_context wctx;
1987 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1988
1989 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1990 int num_components = instr->num_components;
1991 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1992 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1993
1994 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1995 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1996 LLVMValueRef vindex = ctx->ac.i32_0;
1997
1998 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1999 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
2000
2001 LLVMValueRef results[4];
2002 for (int i = 0; i < num_components;) {
2003 int num_elems = num_components - i;
2004 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
2005 num_elems = 1;
2006 if (num_elems * elem_size_bytes > 16)
2007 num_elems = 16 / elem_size_bytes;
2008 int load_bytes = num_elems * elem_size_bytes;
2009
2010 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2011
2012 LLVMValueRef ret;
2013
2014 if (load_bytes == 1) {
2015 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2016 rsrc,
2017 offset,
2018 ctx->ac.i32_0,
2019 immoffset,
2020 cache_policy);
2021 } else if (load_bytes == 2) {
2022 ret = ac_build_tbuffer_load_short(&ctx->ac,
2023 rsrc,
2024 offset,
2025 ctx->ac.i32_0,
2026 immoffset,
2027 cache_policy);
2028 } else {
2029 int num_channels = util_next_power_of_two(load_bytes) / 4;
2030 bool can_speculate = access & ACCESS_CAN_REORDER;
2031
2032 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2033 vindex, offset, immoffset, 0,
2034 cache_policy, can_speculate, false);
2035 }
2036
2037 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2038 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2039 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2040
2041 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2042 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2043
2044 for (unsigned j = 0; j < num_elems; j++) {
2045 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2046 }
2047 i += num_elems;
2048 }
2049
2050 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2051 return exit_waterfall(ctx, &wctx, ret);
2052 }
2053
2054 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2055 struct waterfall_context *wctx,
2056 const nir_intrinsic_instr *instr)
2057 {
2058 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2059 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2060 }
2061
2062 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2063 nir_intrinsic_instr *instr)
2064 {
2065 struct waterfall_context wctx;
2066 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2067
2068 LLVMValueRef ret;
2069 LLVMValueRef rsrc = rsrc_base;
2070 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2071 int num_components = instr->num_components;
2072
2073 if (ctx->abi->load_ubo)
2074 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2075
2076 if (instr->dest.ssa.bit_size == 64)
2077 num_components *= 2;
2078
2079 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2080 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2081 LLVMValueRef results[num_components];
2082 for (unsigned i = 0; i < num_components; ++i) {
2083 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2084 load_bytes * i, 0);
2085
2086 if (load_bytes == 1) {
2087 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2088 rsrc,
2089 offset,
2090 ctx->ac.i32_0,
2091 immoffset,
2092 0);
2093 } else {
2094 assert(load_bytes == 2);
2095 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2096 rsrc,
2097 offset,
2098 ctx->ac.i32_0,
2099 immoffset,
2100 0);
2101 }
2102 }
2103 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2104 } else {
2105 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2106 NULL, 0, 0, true, true);
2107
2108 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2109 }
2110
2111 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2112 get_def_type(ctx, &instr->dest.ssa), "");
2113
2114 return exit_waterfall(ctx, &wctx, ret);
2115 }
2116
2117 static void
2118 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2119 bool vs_in, unsigned *vertex_index_out,
2120 LLVMValueRef *vertex_index_ref,
2121 unsigned *const_out, LLVMValueRef *indir_out)
2122 {
2123 nir_variable *var = nir_deref_instr_get_variable(instr);
2124 nir_deref_path path;
2125 unsigned idx_lvl = 1;
2126
2127 nir_deref_path_init(&path, instr, NULL);
2128
2129 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2130 if (vertex_index_ref) {
2131 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2132 if (vertex_index_out)
2133 *vertex_index_out = 0;
2134 } else {
2135 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2136 }
2137 ++idx_lvl;
2138 }
2139
2140 uint32_t const_offset = 0;
2141 LLVMValueRef offset = NULL;
2142
2143 if (var->data.compact) {
2144 assert(instr->deref_type == nir_deref_type_array);
2145 const_offset = nir_src_as_uint(instr->arr.index);
2146 goto out;
2147 }
2148
2149 for (; path.path[idx_lvl]; ++idx_lvl) {
2150 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2151 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2152 unsigned index = path.path[idx_lvl]->strct.index;
2153
2154 for (unsigned i = 0; i < index; i++) {
2155 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2156 const_offset += glsl_count_attribute_slots(ft, vs_in);
2157 }
2158 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2159 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2160 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2161 const_offset += size *
2162 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2163 } else {
2164 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2165 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2166 if (offset)
2167 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2168 else
2169 offset = array_off;
2170 }
2171 } else
2172 unreachable("Uhandled deref type in get_deref_instr_offset");
2173 }
2174
2175 out:
2176 nir_deref_path_finish(&path);
2177
2178 if (const_offset && offset)
2179 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2180 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2181 "");
2182
2183 *const_out = const_offset;
2184 *indir_out = offset;
2185 }
2186
2187 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2188 nir_intrinsic_instr *instr,
2189 bool load_inputs)
2190 {
2191 LLVMValueRef result;
2192 LLVMValueRef vertex_index = NULL;
2193 LLVMValueRef indir_index = NULL;
2194 unsigned const_index = 0;
2195
2196 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2197
2198 unsigned location = var->data.location;
2199 unsigned driver_location = var->data.driver_location;
2200 const bool is_patch = var->data.patch ||
2201 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2202 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2203 const bool is_compact = var->data.compact;
2204
2205 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2206 false, NULL, is_patch ? NULL : &vertex_index,
2207 &const_index, &indir_index);
2208
2209 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2210
2211 LLVMTypeRef src_component_type;
2212 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2213 src_component_type = LLVMGetElementType(dest_type);
2214 else
2215 src_component_type = dest_type;
2216
2217 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2218 vertex_index, indir_index,
2219 const_index, location, driver_location,
2220 var->data.location_frac,
2221 instr->num_components,
2222 is_patch, is_compact, load_inputs);
2223 if (instr->dest.ssa.bit_size == 16) {
2224 result = ac_to_integer(&ctx->ac, result);
2225 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2226 }
2227 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2228 }
2229
2230 static unsigned
2231 type_scalar_size_bytes(const struct glsl_type *type)
2232 {
2233 assert(glsl_type_is_vector_or_scalar(type) ||
2234 glsl_type_is_matrix(type));
2235 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2236 }
2237
2238 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2239 nir_intrinsic_instr *instr)
2240 {
2241 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2242 nir_variable *var = nir_deref_instr_get_variable(deref);
2243
2244 LLVMValueRef values[8];
2245 int idx = 0;
2246 int ve = instr->dest.ssa.num_components;
2247 unsigned comp = 0;
2248 LLVMValueRef indir_index;
2249 LLVMValueRef ret;
2250 unsigned const_index;
2251 unsigned stride = 4;
2252 int mode = deref->mode;
2253
2254 if (var) {
2255 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2256 var->data.mode == nir_var_shader_in;
2257 idx = var->data.driver_location;
2258 comp = var->data.location_frac;
2259 mode = var->data.mode;
2260
2261 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2262 &const_index, &indir_index);
2263
2264 if (var->data.compact) {
2265 stride = 1;
2266 const_index += comp;
2267 comp = 0;
2268 }
2269 }
2270
2271 if (instr->dest.ssa.bit_size == 64 &&
2272 (deref->mode == nir_var_shader_in ||
2273 deref->mode == nir_var_shader_out ||
2274 deref->mode == nir_var_function_temp))
2275 ve *= 2;
2276
2277 switch (mode) {
2278 case nir_var_shader_in:
2279 /* TODO: remove this after RADV switches to lowered IO */
2280 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2281 ctx->stage == MESA_SHADER_TESS_EVAL) {
2282 return load_tess_varyings(ctx, instr, true);
2283 }
2284
2285 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2286 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2287 LLVMValueRef indir_index;
2288 unsigned const_index, vertex_index;
2289 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2290 &const_index, &indir_index);
2291 assert(indir_index == NULL);
2292
2293 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2294 var->data.driver_location,
2295 var->data.location_frac,
2296 instr->num_components, vertex_index, const_index, type);
2297 }
2298
2299 for (unsigned chan = comp; chan < ve + comp; chan++) {
2300 if (indir_index) {
2301 unsigned count = glsl_count_attribute_slots(
2302 var->type,
2303 ctx->stage == MESA_SHADER_VERTEX);
2304 count -= chan / 4;
2305 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2306 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2307 stride, false, true);
2308
2309 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2310 tmp_vec,
2311 indir_index, "");
2312 } else
2313 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2314 }
2315 break;
2316 case nir_var_function_temp:
2317 for (unsigned chan = 0; chan < ve; chan++) {
2318 if (indir_index) {
2319 unsigned count = glsl_count_attribute_slots(
2320 var->type, false);
2321 count -= chan / 4;
2322 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2323 &ctx->ac, ctx->locals + idx + chan, count,
2324 stride, true, true);
2325
2326 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2327 tmp_vec,
2328 indir_index, "");
2329 } else {
2330 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2331 }
2332 }
2333 break;
2334 case nir_var_shader_out:
2335 /* TODO: remove this after RADV switches to lowered IO */
2336 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2337 return load_tess_varyings(ctx, instr, false);
2338 }
2339
2340 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2341 var->data.fb_fetch_output &&
2342 ctx->abi->emit_fbfetch)
2343 return ctx->abi->emit_fbfetch(ctx->abi);
2344
2345 for (unsigned chan = comp; chan < ve + comp; chan++) {
2346 if (indir_index) {
2347 unsigned count = glsl_count_attribute_slots(
2348 var->type, false);
2349 count -= chan / 4;
2350 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2351 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2352 stride, true, true);
2353
2354 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2355 tmp_vec,
2356 indir_index, "");
2357 } else {
2358 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2359 ctx->abi->outputs[idx + chan + const_index * stride],
2360 "");
2361 }
2362 }
2363 break;
2364 case nir_var_mem_global: {
2365 LLVMValueRef address = get_src(ctx, instr->src[0]);
2366 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2367 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2368 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2369 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2370 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2371 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2372
2373 if (stride != natural_stride || split_loads) {
2374 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2375 result_type = LLVMGetElementType(result_type);
2376
2377 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2378 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2379 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2380
2381 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2382 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2383 values[i] = LLVMBuildLoad(ctx->ac.builder,
2384 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2385
2386 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2387 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2388 }
2389 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2390 } else {
2391 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2392 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2393 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2394 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2395
2396 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2397 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2398 return val;
2399 }
2400 }
2401 default:
2402 unreachable("unhandle variable mode");
2403 }
2404 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2405 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2406 }
2407
2408 static void
2409 visit_store_var(struct ac_nir_context *ctx,
2410 nir_intrinsic_instr *instr)
2411 {
2412 if (ctx->ac.postponed_kill) {
2413 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2414 ctx->ac.postponed_kill, "");
2415 ac_build_ifcc(&ctx->ac, cond, 7002);
2416 }
2417
2418 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2419 nir_variable *var = nir_deref_instr_get_variable(deref);
2420
2421 LLVMValueRef temp_ptr, value;
2422 int idx = 0;
2423 unsigned comp = 0;
2424 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2425 int writemask = instr->const_index[0];
2426 LLVMValueRef indir_index;
2427 unsigned const_index;
2428
2429 if (var) {
2430 get_deref_offset(ctx, deref, false,
2431 NULL, NULL, &const_index, &indir_index);
2432 idx = var->data.driver_location;
2433 comp = var->data.location_frac;
2434
2435 if (var->data.compact) {
2436 const_index += comp;
2437 comp = 0;
2438 }
2439 }
2440
2441 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2442 (deref->mode == nir_var_shader_out ||
2443 deref->mode == nir_var_function_temp)) {
2444
2445 src = LLVMBuildBitCast(ctx->ac.builder, src,
2446 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2447 "");
2448
2449 writemask = widen_mask(writemask, 2);
2450 }
2451
2452 writemask = writemask << comp;
2453
2454 switch (deref->mode) {
2455 case nir_var_shader_out:
2456 /* TODO: remove this after RADV switches to lowered IO */
2457 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2458 LLVMValueRef vertex_index = NULL;
2459 LLVMValueRef indir_index = NULL;
2460 unsigned const_index = 0;
2461 const bool is_patch = var->data.patch ||
2462 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2463 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2464
2465 get_deref_offset(ctx, deref, false, NULL,
2466 is_patch ? NULL : &vertex_index,
2467 &const_index, &indir_index);
2468
2469 ctx->abi->store_tcs_outputs(ctx->abi, var,
2470 vertex_index, indir_index,
2471 const_index, src, writemask,
2472 var->data.location_frac,
2473 var->data.driver_location);
2474 break;
2475 }
2476
2477 for (unsigned chan = 0; chan < 8; chan++) {
2478 int stride = 4;
2479 if (!(writemask & (1 << chan)))
2480 continue;
2481
2482 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2483
2484 if (var->data.compact)
2485 stride = 1;
2486 if (indir_index) {
2487 unsigned count = glsl_count_attribute_slots(
2488 var->type, false);
2489 count -= chan / 4;
2490 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2491 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2492 stride, true, true);
2493
2494 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2495 value, indir_index, "");
2496 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2497 count, stride, tmp_vec);
2498
2499 } else {
2500 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2501
2502 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2503 }
2504 }
2505 break;
2506 case nir_var_function_temp:
2507 for (unsigned chan = 0; chan < 8; chan++) {
2508 if (!(writemask & (1 << chan)))
2509 continue;
2510
2511 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2512 if (indir_index) {
2513 unsigned count = glsl_count_attribute_slots(
2514 var->type, false);
2515 count -= chan / 4;
2516 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2517 &ctx->ac, ctx->locals + idx + chan, count,
2518 4, true, true);
2519
2520 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2521 value, indir_index, "");
2522 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2523 count, 4, tmp_vec);
2524 } else {
2525 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2526
2527 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2528 }
2529 }
2530 break;
2531
2532 case nir_var_mem_global: {
2533 int writemask = instr->const_index[0];
2534 LLVMValueRef address = get_src(ctx, instr->src[0]);
2535 LLVMValueRef val = get_src(ctx, instr->src[1]);
2536
2537 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2538 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2539 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2540 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2541 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2542
2543 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2544 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2545 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2546
2547 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2548 stride == natural_stride && !split_stores) {
2549 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2550 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2551 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2552
2553 val = LLVMBuildBitCast(ctx->ac.builder, val,
2554 LLVMGetElementType(LLVMTypeOf(address)), "");
2555 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2556
2557 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2558 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2559 } else {
2560 LLVMTypeRef val_type = LLVMTypeOf(val);
2561 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2562 val_type = LLVMGetElementType(val_type);
2563
2564 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2565 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2566 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2567 for (unsigned chan = 0; chan < 4; chan++) {
2568 if (!(writemask & (1 << chan)))
2569 continue;
2570
2571 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2572
2573 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2574 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2575 chan);
2576 src = LLVMBuildBitCast(ctx->ac.builder, src,
2577 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2578 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2579
2580 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2581 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2582 }
2583 }
2584 break;
2585 }
2586 default:
2587 abort();
2588 break;
2589 }
2590
2591 if (ctx->ac.postponed_kill)
2592 ac_build_endif(&ctx->ac, 7002);
2593 }
2594
2595 static void
2596 visit_store_output(struct ac_nir_context *ctx, nir_intrinsic_instr *instr)
2597 {
2598 if (ctx->ac.postponed_kill) {
2599 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2600 ctx->ac.postponed_kill, "");
2601 ac_build_ifcc(&ctx->ac, cond, 7002);
2602 }
2603
2604 unsigned base = nir_intrinsic_base(instr);
2605 unsigned writemask = nir_intrinsic_write_mask(instr);
2606 unsigned component = nir_intrinsic_component(instr);
2607 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
2608 nir_src offset = *nir_get_io_offset_src(instr);
2609 LLVMValueRef indir_index = NULL;
2610
2611 if (nir_src_is_const(offset))
2612 assert(nir_src_as_uint(offset) == 0);
2613 else
2614 indir_index = get_src(ctx, offset);
2615
2616 switch (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src))) {
2617 case 32:
2618 break;
2619 case 64:
2620 writemask = widen_mask(writemask, 2);
2621 src = LLVMBuildBitCast(ctx->ac.builder, src,
2622 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2623 "");
2624 break;
2625 default:
2626 unreachable("unhandled store_output bit size");
2627 return;
2628 }
2629
2630 writemask <<= component;
2631
2632 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2633 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
2634 LLVMValueRef vertex_index =
2635 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
2636
2637 ctx->abi->store_tcs_outputs(ctx->abi, NULL,
2638 vertex_index, indir_index,
2639 0, src, writemask,
2640 component, base * 4);
2641 return;
2642 }
2643
2644 /* No indirect indexing is allowed after this point. */
2645 assert(!indir_index);
2646
2647 for (unsigned chan = 0; chan < 8; chan++) {
2648 if (!(writemask & (1 << chan)))
2649 continue;
2650
2651 LLVMValueRef value = ac_llvm_extract_elem(&ctx->ac, src, chan - component);
2652 LLVMBuildStore(ctx->ac.builder, value,
2653 ctx->abi->outputs[base * 4 + chan]);
2654 }
2655
2656 if (ctx->ac.postponed_kill)
2657 ac_build_endif(&ctx->ac, 7002);
2658 }
2659
2660 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2661 {
2662 switch (dim) {
2663 case GLSL_SAMPLER_DIM_BUF:
2664 return 1;
2665 case GLSL_SAMPLER_DIM_1D:
2666 return array ? 2 : 1;
2667 case GLSL_SAMPLER_DIM_2D:
2668 return array ? 3 : 2;
2669 case GLSL_SAMPLER_DIM_MS:
2670 return array ? 4 : 3;
2671 case GLSL_SAMPLER_DIM_3D:
2672 case GLSL_SAMPLER_DIM_CUBE:
2673 return 3;
2674 case GLSL_SAMPLER_DIM_RECT:
2675 case GLSL_SAMPLER_DIM_SUBPASS:
2676 return 2;
2677 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2678 return 3;
2679 default:
2680 break;
2681 }
2682 return 0;
2683 }
2684
2685 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2686 LLVMValueRef coord_x, LLVMValueRef coord_y,
2687 LLVMValueRef coord_z,
2688 LLVMValueRef sample_index,
2689 LLVMValueRef fmask_desc_ptr)
2690 {
2691 unsigned sample_chan = coord_z ? 3 : 2;
2692 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2693 addr[sample_chan] = sample_index;
2694
2695 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2696 return addr[sample_chan];
2697 }
2698
2699 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2700 {
2701 assert(instr->src[0].is_ssa);
2702 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2703 }
2704
2705 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2706 const nir_intrinsic_instr *instr,
2707 LLVMValueRef dynamic_index,
2708 enum ac_descriptor_type desc_type,
2709 bool write)
2710 {
2711 nir_deref_instr *deref_instr =
2712 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2713 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2714
2715 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2716 }
2717
2718 static void get_image_coords(struct ac_nir_context *ctx,
2719 const nir_intrinsic_instr *instr,
2720 LLVMValueRef dynamic_desc_index,
2721 struct ac_image_args *args,
2722 enum glsl_sampler_dim dim,
2723 bool is_array)
2724 {
2725 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2726 LLVMValueRef masks[] = {
2727 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2728 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2729 };
2730 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2731
2732 int count;
2733 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2734 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2735 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2736 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2737 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2738 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2739 count = image_type_to_components_count(dim, is_array);
2740
2741 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2742 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2743 LLVMValueRef fmask_load_address[3];
2744
2745 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2746 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2747 if (is_array)
2748 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2749 else
2750 fmask_load_address[2] = NULL;
2751
2752 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2753 fmask_load_address[0],
2754 fmask_load_address[1],
2755 fmask_load_address[2],
2756 sample_index,
2757 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2758 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2759 }
2760 if (count == 1 && !gfx9_1d) {
2761 if (instr->src[1].ssa->num_components)
2762 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2763 else
2764 args->coords[0] = src0;
2765 } else {
2766 int chan;
2767 if (is_ms)
2768 count--;
2769 for (chan = 0; chan < count; ++chan) {
2770 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2771 }
2772
2773 if (gfx9_1d) {
2774 if (is_array) {
2775 args->coords[2] = args->coords[1];
2776 args->coords[1] = ctx->ac.i32_0;
2777 } else
2778 args->coords[1] = ctx->ac.i32_0;
2779 count++;
2780 }
2781 if (ctx->ac.chip_class == GFX9 &&
2782 dim == GLSL_SAMPLER_DIM_2D &&
2783 !is_array) {
2784 /* The hw can't bind a slice of a 3D image as a 2D
2785 * image, because it ignores BASE_ARRAY if the target
2786 * is 3D. The workaround is to read BASE_ARRAY and set
2787 * it as the 3rd address operand for all 2D images.
2788 */
2789 LLVMValueRef first_layer, const5, mask;
2790
2791 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2792 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2793 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2794 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2795
2796 args->coords[count] = first_layer;
2797 count++;
2798 }
2799
2800
2801 if (is_ms) {
2802 args->coords[count] = sample_index;
2803 count++;
2804 }
2805 }
2806 }
2807
2808 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2809 const nir_intrinsic_instr *instr,
2810 LLVMValueRef dynamic_index,
2811 bool write, bool atomic)
2812 {
2813 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2814 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2815 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2816 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2817 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2818
2819 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2820 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2821 elem_count, stride, "");
2822
2823 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2824 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2825 }
2826 return rsrc;
2827 }
2828
2829 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2830 struct waterfall_context *wctx,
2831 const nir_intrinsic_instr *instr)
2832 {
2833 nir_deref_instr *deref_instr = NULL;
2834
2835 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2836 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2837
2838 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2839 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2840 }
2841
2842 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2843 const nir_intrinsic_instr *instr,
2844 bool bindless)
2845 {
2846 LLVMValueRef res;
2847
2848 enum glsl_sampler_dim dim;
2849 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2850 bool is_array;
2851 if (bindless) {
2852 dim = nir_intrinsic_image_dim(instr);
2853 is_array = nir_intrinsic_image_array(instr);
2854 } else {
2855 const nir_deref_instr *image_deref = get_image_deref(instr);
2856 const struct glsl_type *type = image_deref->type;
2857 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2858 dim = glsl_get_sampler_dim(type);
2859 access |= var->data.access;
2860 is_array = glsl_sampler_type_is_array(type);
2861 }
2862
2863 struct waterfall_context wctx;
2864 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2865
2866 struct ac_image_args args = {};
2867
2868 args.cache_policy = get_cache_policy(ctx, access, false, false);
2869
2870 if (dim == GLSL_SAMPLER_DIM_BUF) {
2871 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2872 unsigned num_channels = util_last_bit(mask);
2873 LLVMValueRef rsrc, vindex;
2874
2875 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2876 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2877 ctx->ac.i32_0, "");
2878
2879 assert(instr->dest.is_ssa);
2880 bool can_speculate = access & ACCESS_CAN_REORDER;
2881 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2882 ctx->ac.i32_0, num_channels,
2883 args.cache_policy,
2884 can_speculate,
2885 instr->dest.ssa.bit_size == 16);
2886 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2887
2888 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2889 res = ac_to_integer(&ctx->ac, res);
2890 } else {
2891 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2892
2893 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2894 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2895 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2896 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2897 if (!level_zero)
2898 args.lod = get_src(ctx, instr->src[3]);
2899 args.dmask = 15;
2900 args.attributes = AC_FUNC_ATTR_READONLY;
2901
2902 assert(instr->dest.is_ssa);
2903 args.d16 = instr->dest.ssa.bit_size == 16;
2904
2905 res = ac_build_image_opcode(&ctx->ac, &args);
2906 }
2907 return exit_waterfall(ctx, &wctx, res);
2908 }
2909
2910 static void visit_image_store(struct ac_nir_context *ctx,
2911 const nir_intrinsic_instr *instr,
2912 bool bindless)
2913 {
2914 if (ctx->ac.postponed_kill) {
2915 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2916 ctx->ac.postponed_kill, "");
2917 ac_build_ifcc(&ctx->ac, cond, 7003);
2918 }
2919
2920 enum glsl_sampler_dim dim;
2921 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2922 bool is_array;
2923
2924 if (bindless) {
2925 dim = nir_intrinsic_image_dim(instr);
2926 is_array = nir_intrinsic_image_array(instr);
2927 } else {
2928 const nir_deref_instr *image_deref = get_image_deref(instr);
2929 const struct glsl_type *type = image_deref->type;
2930 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2931 dim = glsl_get_sampler_dim(type);
2932 access |= var->data.access;
2933 is_array = glsl_sampler_type_is_array(type);
2934 }
2935
2936 struct waterfall_context wctx;
2937 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2938
2939 bool writeonly_memory = access & ACCESS_NON_READABLE;
2940 struct ac_image_args args = {};
2941
2942 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2943
2944 if (dim == GLSL_SAMPLER_DIM_BUF) {
2945 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2946 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2947 unsigned src_channels = ac_get_llvm_num_components(src);
2948 LLVMValueRef vindex;
2949
2950 if (src_channels == 3)
2951 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2952
2953 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2954 get_src(ctx, instr->src[1]),
2955 ctx->ac.i32_0, "");
2956
2957 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2958 ctx->ac.i32_0, args.cache_policy);
2959 } else {
2960 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2961
2962 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2963 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2964 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2965 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2966 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2967 if (!level_zero)
2968 args.lod = get_src(ctx, instr->src[4]);
2969 args.dmask = 15;
2970 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2971
2972 ac_build_image_opcode(&ctx->ac, &args);
2973 }
2974
2975 exit_waterfall(ctx, &wctx, NULL);
2976 if (ctx->ac.postponed_kill)
2977 ac_build_endif(&ctx->ac, 7003);
2978 }
2979
2980 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2981 const nir_intrinsic_instr *instr,
2982 bool bindless)
2983 {
2984 if (ctx->ac.postponed_kill) {
2985 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2986 ctx->ac.postponed_kill, "");
2987 ac_build_ifcc(&ctx->ac, cond, 7004);
2988 }
2989
2990 LLVMValueRef params[7];
2991 int param_count = 0;
2992
2993 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2994 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2995 const char *atomic_name;
2996 char intrinsic_name[64];
2997 enum ac_atomic_op atomic_subop;
2998 ASSERTED int length;
2999
3000 enum glsl_sampler_dim dim;
3001 bool is_array;
3002 if (bindless) {
3003 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
3004 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
3005 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
3006 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
3007 ASSERTED const GLenum format = nir_intrinsic_format(instr);
3008 assert(format == GL_R32UI || format == GL_R32I);
3009 }
3010 dim = nir_intrinsic_image_dim(instr);
3011 is_array = nir_intrinsic_image_array(instr);
3012 } else {
3013 const struct glsl_type *type = get_image_deref(instr)->type;
3014 dim = glsl_get_sampler_dim(type);
3015 is_array = glsl_sampler_type_is_array(type);
3016 }
3017
3018 struct waterfall_context wctx;
3019 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3020
3021 switch (instr->intrinsic) {
3022 case nir_intrinsic_bindless_image_atomic_add:
3023 case nir_intrinsic_image_deref_atomic_add:
3024 atomic_name = "add";
3025 atomic_subop = ac_atomic_add;
3026 break;
3027 case nir_intrinsic_bindless_image_atomic_imin:
3028 case nir_intrinsic_image_deref_atomic_imin:
3029 atomic_name = "smin";
3030 atomic_subop = ac_atomic_smin;
3031 break;
3032 case nir_intrinsic_bindless_image_atomic_umin:
3033 case nir_intrinsic_image_deref_atomic_umin:
3034 atomic_name = "umin";
3035 atomic_subop = ac_atomic_umin;
3036 break;
3037 case nir_intrinsic_bindless_image_atomic_imax:
3038 case nir_intrinsic_image_deref_atomic_imax:
3039 atomic_name = "smax";
3040 atomic_subop = ac_atomic_smax;
3041 break;
3042 case nir_intrinsic_bindless_image_atomic_umax:
3043 case nir_intrinsic_image_deref_atomic_umax:
3044 atomic_name = "umax";
3045 atomic_subop = ac_atomic_umax;
3046 break;
3047 case nir_intrinsic_bindless_image_atomic_and:
3048 case nir_intrinsic_image_deref_atomic_and:
3049 atomic_name = "and";
3050 atomic_subop = ac_atomic_and;
3051 break;
3052 case nir_intrinsic_bindless_image_atomic_or:
3053 case nir_intrinsic_image_deref_atomic_or:
3054 atomic_name = "or";
3055 atomic_subop = ac_atomic_or;
3056 break;
3057 case nir_intrinsic_bindless_image_atomic_xor:
3058 case nir_intrinsic_image_deref_atomic_xor:
3059 atomic_name = "xor";
3060 atomic_subop = ac_atomic_xor;
3061 break;
3062 case nir_intrinsic_bindless_image_atomic_exchange:
3063 case nir_intrinsic_image_deref_atomic_exchange:
3064 atomic_name = "swap";
3065 atomic_subop = ac_atomic_swap;
3066 break;
3067 case nir_intrinsic_bindless_image_atomic_comp_swap:
3068 case nir_intrinsic_image_deref_atomic_comp_swap:
3069 atomic_name = "cmpswap";
3070 atomic_subop = 0; /* not used */
3071 break;
3072 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3073 case nir_intrinsic_image_deref_atomic_inc_wrap: {
3074 atomic_name = "inc";
3075 atomic_subop = ac_atomic_inc_wrap;
3076 break;
3077 }
3078 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3079 case nir_intrinsic_image_deref_atomic_dec_wrap:
3080 atomic_name = "dec";
3081 atomic_subop = ac_atomic_dec_wrap;
3082 break;
3083 default:
3084 abort();
3085 }
3086
3087 if (cmpswap)
3088 params[param_count++] = get_src(ctx, instr->src[4]);
3089 params[param_count++] = get_src(ctx, instr->src[3]);
3090
3091 LLVMValueRef result;
3092 if (dim == GLSL_SAMPLER_DIM_BUF) {
3093 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3094 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3095 ctx->ac.i32_0, ""); /* vindex */
3096 params[param_count++] = ctx->ac.i32_0; /* voffset */
3097 if (LLVM_VERSION_MAJOR >= 9) {
3098 /* XXX: The new raw/struct atomic intrinsics are buggy
3099 * with LLVM 8, see r358579.
3100 */
3101 params[param_count++] = ctx->ac.i32_0; /* soffset */
3102 params[param_count++] = ctx->ac.i32_0; /* slc */
3103
3104 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3105 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3106 } else {
3107 params[param_count++] = ctx->ac.i1false; /* slc */
3108
3109 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3110 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3111 }
3112
3113 assert(length < sizeof(intrinsic_name));
3114 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3115 params, param_count, 0);
3116 } else {
3117 struct ac_image_args args = {};
3118 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3119 args.atomic = atomic_subop;
3120 args.data[0] = params[0];
3121 if (cmpswap)
3122 args.data[1] = params[1];
3123 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3124 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3125 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3126
3127 result = ac_build_image_opcode(&ctx->ac, &args);
3128 }
3129
3130 result = exit_waterfall(ctx, &wctx, result);
3131 if (ctx->ac.postponed_kill)
3132 ac_build_endif(&ctx->ac, 7004);
3133 return result;
3134 }
3135
3136 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3137 nir_intrinsic_instr *instr)
3138 {
3139 struct waterfall_context wctx;
3140 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3141 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3142
3143 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3144
3145 return exit_waterfall(ctx, &wctx, ret);
3146 }
3147
3148 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3149 const nir_intrinsic_instr *instr,
3150 bool bindless)
3151 {
3152 LLVMValueRef res;
3153
3154 enum glsl_sampler_dim dim;
3155 bool is_array;
3156 if (bindless) {
3157 dim = nir_intrinsic_image_dim(instr);
3158 is_array = nir_intrinsic_image_array(instr);
3159 } else {
3160 const struct glsl_type *type = get_image_deref(instr)->type;
3161 dim = glsl_get_sampler_dim(type);
3162 is_array = glsl_sampler_type_is_array(type);
3163 }
3164
3165 struct waterfall_context wctx;
3166 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3167
3168 if (dim == GLSL_SAMPLER_DIM_BUF) {
3169 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3170 } else {
3171
3172 struct ac_image_args args = { 0 };
3173
3174 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3175 args.dmask = 0xf;
3176 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3177 args.opcode = ac_image_get_resinfo;
3178 assert(nir_src_as_uint(instr->src[1]) == 0);
3179 args.lod = ctx->ac.i32_0;
3180 args.attributes = AC_FUNC_ATTR_READNONE;
3181
3182 res = ac_build_image_opcode(&ctx->ac, &args);
3183
3184 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3185
3186 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3187 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3188 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3189 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3190 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3191 }
3192
3193 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3194 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3195 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3196 ctx->ac.i32_1, "");
3197 }
3198 }
3199 return exit_waterfall(ctx, &wctx, res);
3200 }
3201
3202 static void emit_membar(struct ac_llvm_context *ac,
3203 const nir_intrinsic_instr *instr)
3204 {
3205 unsigned wait_flags = 0;
3206
3207 switch (instr->intrinsic) {
3208 case nir_intrinsic_memory_barrier:
3209 case nir_intrinsic_group_memory_barrier:
3210 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3211 break;
3212 case nir_intrinsic_memory_barrier_buffer:
3213 case nir_intrinsic_memory_barrier_image:
3214 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3215 break;
3216 case nir_intrinsic_memory_barrier_shared:
3217 wait_flags = AC_WAIT_LGKM;
3218 break;
3219 default:
3220 break;
3221 }
3222
3223 ac_build_waitcnt(ac, wait_flags);
3224 }
3225
3226 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3227 {
3228 /* GFX6 only (thanks to a hw bug workaround):
3229 * The real barrier instruction isn’t needed, because an entire patch
3230 * always fits into a single wave.
3231 */
3232 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3233 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3234 return;
3235 }
3236 ac_build_s_barrier(ac);
3237 }
3238
3239 static void emit_discard(struct ac_nir_context *ctx,
3240 const nir_intrinsic_instr *instr)
3241 {
3242 LLVMValueRef cond;
3243
3244 if (instr->intrinsic == nir_intrinsic_discard_if) {
3245 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3246 get_src(ctx, instr->src[0]),
3247 ctx->ac.i32_0, "");
3248 } else {
3249 assert(instr->intrinsic == nir_intrinsic_discard);
3250 cond = ctx->ac.i1false;
3251 }
3252
3253 ac_build_kill_if_false(&ctx->ac, cond);
3254 }
3255
3256 static void emit_demote(struct ac_nir_context *ctx,
3257 const nir_intrinsic_instr *instr)
3258 {
3259 LLVMValueRef cond;
3260
3261 if (instr->intrinsic == nir_intrinsic_demote_if) {
3262 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3263 get_src(ctx, instr->src[0]),
3264 ctx->ac.i32_0, "");
3265 } else {
3266 assert(instr->intrinsic == nir_intrinsic_demote);
3267 cond = ctx->ac.i1false;
3268 }
3269
3270 /* Kill immediately while maintaining WQM. */
3271 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3272
3273 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3274 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3275 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3276 return;
3277 }
3278
3279 static LLVMValueRef
3280 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3281 {
3282 LLVMValueRef result;
3283 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3284 result = LLVMBuildAnd(ctx->ac.builder,
3285 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3286 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3287
3288 if (ctx->ac.wave_size == 32)
3289 result = LLVMBuildLShr(ctx->ac.builder, result,
3290 LLVMConstInt(ctx->ac.i32, 1, false), "");
3291
3292 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3293 }
3294
3295 static LLVMValueRef
3296 visit_load_subgroup_id(struct ac_nir_context *ctx)
3297 {
3298 if (ctx->stage == MESA_SHADER_COMPUTE) {
3299 LLVMValueRef result;
3300 result = LLVMBuildAnd(ctx->ac.builder,
3301 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3302 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3303 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3304 } else {
3305 return LLVMConstInt(ctx->ac.i32, 0, false);
3306 }
3307 }
3308
3309 static LLVMValueRef
3310 visit_load_num_subgroups(struct ac_nir_context *ctx)
3311 {
3312 if (ctx->stage == MESA_SHADER_COMPUTE) {
3313 return LLVMBuildAnd(ctx->ac.builder,
3314 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3315 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3316 } else {
3317 return LLVMConstInt(ctx->ac.i32, 1, false);
3318 }
3319 }
3320
3321 static LLVMValueRef
3322 visit_first_invocation(struct ac_nir_context *ctx)
3323 {
3324 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3325 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3326
3327 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3328 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3329 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3330 ctx->ac.iN_wavemask, args, 2,
3331 AC_FUNC_ATTR_NOUNWIND |
3332 AC_FUNC_ATTR_READNONE);
3333
3334 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3335 }
3336
3337 static LLVMValueRef
3338 visit_load_shared(struct ac_nir_context *ctx,
3339 const nir_intrinsic_instr *instr)
3340 {
3341 LLVMValueRef values[4], derived_ptr, index, ret;
3342
3343 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3344 instr->dest.ssa.bit_size);
3345
3346 for (int chan = 0; chan < instr->num_components; chan++) {
3347 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3348 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3349 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3350 }
3351
3352 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3353 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3354 }
3355
3356 static void
3357 visit_store_shared(struct ac_nir_context *ctx,
3358 const nir_intrinsic_instr *instr)
3359 {
3360 LLVMValueRef derived_ptr, data,index;
3361 LLVMBuilderRef builder = ctx->ac.builder;
3362
3363 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3364 instr->src[0].ssa->bit_size);
3365 LLVMValueRef src = get_src(ctx, instr->src[0]);
3366
3367 int writemask = nir_intrinsic_write_mask(instr);
3368 for (int chan = 0; chan < 4; chan++) {
3369 if (!(writemask & (1 << chan))) {
3370 continue;
3371 }
3372 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3373 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3374 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3375 LLVMBuildStore(builder, data, derived_ptr);
3376 }
3377 }
3378
3379 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3380 const nir_intrinsic_instr *instr,
3381 LLVMValueRef ptr, int src_idx)
3382 {
3383 if (ctx->ac.postponed_kill) {
3384 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3385 ctx->ac.postponed_kill, "");
3386 ac_build_ifcc(&ctx->ac, cond, 7005);
3387 }
3388
3389 LLVMValueRef result;
3390 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3391
3392 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3393
3394 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3395 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3396 if (deref->mode == nir_var_mem_global) {
3397 /* use "singlethread" sync scope to implement relaxed ordering */
3398 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3399
3400 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3401 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3402 }
3403 }
3404
3405 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3406 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3407 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3408 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3409 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3410 } else {
3411 LLVMAtomicRMWBinOp op;
3412 switch (instr->intrinsic) {
3413 case nir_intrinsic_shared_atomic_add:
3414 case nir_intrinsic_deref_atomic_add:
3415 op = LLVMAtomicRMWBinOpAdd;
3416 break;
3417 case nir_intrinsic_shared_atomic_umin:
3418 case nir_intrinsic_deref_atomic_umin:
3419 op = LLVMAtomicRMWBinOpUMin;
3420 break;
3421 case nir_intrinsic_shared_atomic_umax:
3422 case nir_intrinsic_deref_atomic_umax:
3423 op = LLVMAtomicRMWBinOpUMax;
3424 break;
3425 case nir_intrinsic_shared_atomic_imin:
3426 case nir_intrinsic_deref_atomic_imin:
3427 op = LLVMAtomicRMWBinOpMin;
3428 break;
3429 case nir_intrinsic_shared_atomic_imax:
3430 case nir_intrinsic_deref_atomic_imax:
3431 op = LLVMAtomicRMWBinOpMax;
3432 break;
3433 case nir_intrinsic_shared_atomic_and:
3434 case nir_intrinsic_deref_atomic_and:
3435 op = LLVMAtomicRMWBinOpAnd;
3436 break;
3437 case nir_intrinsic_shared_atomic_or:
3438 case nir_intrinsic_deref_atomic_or:
3439 op = LLVMAtomicRMWBinOpOr;
3440 break;
3441 case nir_intrinsic_shared_atomic_xor:
3442 case nir_intrinsic_deref_atomic_xor:
3443 op = LLVMAtomicRMWBinOpXor;
3444 break;
3445 case nir_intrinsic_shared_atomic_exchange:
3446 case nir_intrinsic_deref_atomic_exchange:
3447 op = LLVMAtomicRMWBinOpXchg;
3448 break;
3449 #if LLVM_VERSION_MAJOR >= 10
3450 case nir_intrinsic_shared_atomic_fadd:
3451 case nir_intrinsic_deref_atomic_fadd:
3452 op = LLVMAtomicRMWBinOpFAdd;
3453 break;
3454 #endif
3455 default:
3456 return NULL;
3457 }
3458
3459 LLVMValueRef val;
3460
3461 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3462 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3463 val = ac_to_float(&ctx->ac, src);
3464 } else {
3465 val = ac_to_integer(&ctx->ac, src);
3466 }
3467
3468 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3469 }
3470
3471 if (ctx->ac.postponed_kill)
3472 ac_build_endif(&ctx->ac, 7005);
3473 return result;
3474 }
3475
3476 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3477 {
3478 LLVMValueRef values[2];
3479 LLVMValueRef pos[2];
3480
3481 pos[0] = ac_to_float(&ctx->ac,
3482 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3483 pos[1] = ac_to_float(&ctx->ac,
3484 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3485
3486 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3487 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3488 return ac_build_gather_values(&ctx->ac, values, 2);
3489 }
3490
3491 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3492 enum glsl_interp_mode interp, unsigned location)
3493 {
3494 switch (interp) {
3495 case INTERP_MODE_FLAT:
3496 default:
3497 return NULL;
3498 case INTERP_MODE_SMOOTH:
3499 case INTERP_MODE_NONE:
3500 if (location == INTERP_CENTER)
3501 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3502 else if (location == INTERP_CENTROID)
3503 return ctx->abi->persp_centroid;
3504 else if (location == INTERP_SAMPLE)
3505 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3506 break;
3507 case INTERP_MODE_NOPERSPECTIVE:
3508 if (location == INTERP_CENTER)
3509 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3510 else if (location == INTERP_CENTROID)
3511 return ctx->abi->linear_centroid;
3512 else if (location == INTERP_SAMPLE)
3513 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3514 break;
3515 }
3516 return NULL;
3517 }
3518
3519 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3520 unsigned mode)
3521 {
3522 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3523 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3524 }
3525
3526 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3527 unsigned mode,
3528 LLVMValueRef offset)
3529 {
3530 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3531 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3532 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3533
3534 LLVMValueRef ij_out[2];
3535 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3536
3537 /*
3538 * take the I then J parameters, and the DDX/Y for it, and
3539 * calculate the IJ inputs for the interpolator.
3540 * temp1 = ddx * offset/sample.x + I;
3541 * interp_param.I = ddy * offset/sample.y + temp1;
3542 * temp1 = ddx * offset/sample.x + J;
3543 * interp_param.J = ddy * offset/sample.y + temp1;
3544 */
3545 for (unsigned i = 0; i < 2; i++) {
3546 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3547 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3548 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3549 ddxy_out, ix_ll, "");
3550 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3551 ddxy_out, iy_ll, "");
3552 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3553 interp_param, ix_ll, "");
3554 LLVMValueRef temp1, temp2;
3555
3556 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3557 ctx->ac.f32, "");
3558
3559 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3560 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3561
3562 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3563 temp2, ctx->ac.i32, "");
3564 }
3565 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3566 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3567 }
3568
3569 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3570 unsigned mode)
3571 {
3572 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3573 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3574 }
3575
3576 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3577 unsigned mode,
3578 LLVMValueRef sample_id)
3579 {
3580 if (ctx->abi->interp_at_sample_force_center)
3581 return barycentric_center(ctx, mode);
3582
3583 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3584
3585 /* fetch sample ID */
3586 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3587
3588 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3589 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3590 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3591 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3592 LLVMValueRef coords[] = { src_c0, src_c1 };
3593 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3594
3595 return barycentric_offset(ctx, mode, offset);
3596 }
3597
3598
3599 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3600 unsigned mode)
3601 {
3602 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3603 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3604 }
3605
3606 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3607 {
3608 return LLVMBuildBitCast(ctx->ac.builder,
3609 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3610 ctx->ac.v3i32, "");
3611 }
3612
3613 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3614 LLVMValueRef interp_param,
3615 unsigned index, unsigned comp_start,
3616 unsigned num_components,
3617 unsigned bitsize)
3618 {
3619 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3620 LLVMValueRef interp_param_f;
3621
3622 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3623 interp_param, ctx->ac.v2f32, "");
3624 LLVMValueRef i = LLVMBuildExtractElement(
3625 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3626 LLVMValueRef j = LLVMBuildExtractElement(
3627 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3628
3629 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3630 if (ctx->verified_interp &&
3631 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3632 LLVMValueRef args[2];
3633 args[0] = i;
3634 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3635 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3636 args, 2, AC_FUNC_ATTR_READNONE);
3637 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3638 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3639 }
3640
3641 LLVMValueRef values[4];
3642 assert(bitsize == 16 || bitsize == 32);
3643 for (unsigned comp = 0; comp < num_components; comp++) {
3644 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3645 if (bitsize == 16) {
3646 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3647 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3648 } else {
3649 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3650 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3651 }
3652 }
3653
3654 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3655 }
3656
3657 static LLVMValueRef visit_load(struct ac_nir_context *ctx,
3658 nir_intrinsic_instr *instr, bool is_output)
3659 {
3660 LLVMValueRef values[8];
3661 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
3662 LLVMTypeRef component_type;
3663 unsigned base = nir_intrinsic_base(instr);
3664 unsigned component = nir_intrinsic_component(instr);
3665 unsigned count = instr->dest.ssa.num_components *
3666 (instr->dest.ssa.bit_size == 64 ? 2 : 1);
3667 nir_src *vertex_index_src = nir_get_io_vertex_index_src(instr);
3668 LLVMValueRef vertex_index =
3669 vertex_index_src ? get_src(ctx, *vertex_index_src) : NULL;
3670 nir_src offset = *nir_get_io_offset_src(instr);
3671 LLVMValueRef indir_index = NULL;
3672
3673 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
3674 component_type = LLVMGetElementType(dest_type);
3675 else
3676 component_type = dest_type;
3677
3678 if (nir_src_is_const(offset))
3679 assert(nir_src_as_uint(offset) == 0);
3680 else
3681 indir_index = get_src(ctx, offset);
3682
3683 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
3684 (ctx->stage == MESA_SHADER_TESS_EVAL && !is_output)) {
3685 LLVMValueRef result =
3686 ctx->abi->load_tess_varyings(ctx->abi, component_type,
3687 vertex_index, indir_index,
3688 0, 0, base * 4,
3689 component,
3690 instr->num_components,
3691 false, false, !is_output);
3692 if (instr->dest.ssa.bit_size == 16) {
3693 result = ac_to_integer(&ctx->ac, result);
3694 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
3695 }
3696 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3697 }
3698
3699 /* No indirect indexing is allowed after this point. */
3700 assert(!indir_index);
3701
3702 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3703 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3704 assert(nir_src_is_const(*vertex_index_src));
3705
3706 return ctx->abi->load_inputs(ctx->abi, 0, base * 4, component,
3707 instr->num_components,
3708 nir_src_as_uint(*vertex_index_src),
3709 0, type);
3710 }
3711
3712 if (ctx->stage == MESA_SHADER_FRAGMENT && is_output &&
3713 nir_intrinsic_io_semantics(instr).fb_fetch_output)
3714 return ctx->abi->emit_fbfetch(ctx->abi);
3715
3716 /* Other non-fragment cases have inputs and outputs in temporaries. */
3717 if (ctx->stage != MESA_SHADER_FRAGMENT) {
3718 for (unsigned chan = component; chan < count + component; chan++) {
3719 if (is_output) {
3720 values[chan] = LLVMBuildLoad(ctx->ac.builder,
3721 ctx->abi->outputs[base * 4 + chan], "");
3722 } else {
3723 values[chan] = ctx->abi->inputs[base * 4 + chan];
3724 if (!values[chan])
3725 values[chan] = LLVMGetUndef(ctx->ac.i32);
3726 }
3727 }
3728 LLVMValueRef result = ac_build_varying_gather_values(&ctx->ac, values, count, component);
3729 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3730 }
3731
3732 /* Fragment shader inputs. */
3733 unsigned vertex_id = 2; /* P0 */
3734
3735 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3736 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3737
3738 switch (src0[0].i32) {
3739 case 0:
3740 vertex_id = 2;
3741 break;
3742 case 1:
3743 vertex_id = 0;
3744 break;
3745 case 2:
3746 vertex_id = 1;
3747 break;
3748 default:
3749 unreachable("Invalid vertex index");
3750 }
3751 }
3752
3753 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, base, false);
3754
3755 for (unsigned chan = 0; chan < count; chan++) {
3756 if (component + chan > 4)
3757 attr_number = LLVMConstInt(ctx->ac.i32, base + 1, false);
3758 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3759 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3760 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3761 llvm_chan,
3762 attr_number,
3763 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3764 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3765 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3766 instr->dest.ssa.bit_size == 16 ? ctx->ac.i16
3767 : ctx->ac.i32, "");
3768 }
3769
3770 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, count);
3771 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
3772 }
3773
3774 static void visit_intrinsic(struct ac_nir_context *ctx,
3775 nir_intrinsic_instr *instr)
3776 {
3777 LLVMValueRef result = NULL;
3778
3779 switch (instr->intrinsic) {
3780 case nir_intrinsic_ballot:
3781 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3782 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3783 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3784 break;
3785 case nir_intrinsic_read_invocation:
3786 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3787 get_src(ctx, instr->src[1]));
3788 break;
3789 case nir_intrinsic_read_first_invocation:
3790 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3791 break;
3792 case nir_intrinsic_load_subgroup_invocation:
3793 result = ac_get_thread_id(&ctx->ac);
3794 break;
3795 case nir_intrinsic_load_work_group_id: {
3796 LLVMValueRef values[3];
3797
3798 for (int i = 0; i < 3; i++) {
3799 values[i] = ctx->args->workgroup_ids[i].used ?
3800 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3801 }
3802
3803 result = ac_build_gather_values(&ctx->ac, values, 3);
3804 break;
3805 }
3806 case nir_intrinsic_load_base_vertex:
3807 case nir_intrinsic_load_first_vertex:
3808 result = ctx->abi->load_base_vertex(ctx->abi);
3809 break;
3810 case nir_intrinsic_load_local_group_size:
3811 result = ctx->abi->load_local_group_size(ctx->abi);
3812 break;
3813 case nir_intrinsic_load_vertex_id:
3814 result = LLVMBuildAdd(ctx->ac.builder,
3815 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3816 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3817 break;
3818 case nir_intrinsic_load_vertex_id_zero_base: {
3819 result = ctx->abi->vertex_id;
3820 break;
3821 }
3822 case nir_intrinsic_load_local_invocation_id: {
3823 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3824 break;
3825 }
3826 case nir_intrinsic_load_base_instance:
3827 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3828 break;
3829 case nir_intrinsic_load_draw_id:
3830 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3831 break;
3832 case nir_intrinsic_load_view_index:
3833 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3834 break;
3835 case nir_intrinsic_load_invocation_id:
3836 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3837 result = ac_unpack_param(&ctx->ac,
3838 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3839 8, 5);
3840 } else {
3841 if (ctx->ac.chip_class >= GFX10) {
3842 result = LLVMBuildAnd(ctx->ac.builder,
3843 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3844 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3845 } else {
3846 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3847 }
3848 }
3849 break;
3850 case nir_intrinsic_load_primitive_id:
3851 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3852 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3853 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3854 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3855 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3856 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3857 } else
3858 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3859 break;
3860 case nir_intrinsic_load_sample_id:
3861 result = ac_unpack_param(&ctx->ac,
3862 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3863 8, 4);
3864 break;
3865 case nir_intrinsic_load_sample_pos:
3866 result = load_sample_pos(ctx);
3867 break;
3868 case nir_intrinsic_load_sample_mask_in:
3869 result = ctx->abi->load_sample_mask_in(ctx->abi);
3870 break;
3871 case nir_intrinsic_load_frag_coord: {
3872 LLVMValueRef values[4] = {
3873 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3874 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3875 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3876 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3877 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3878 };
3879 result = ac_to_integer(&ctx->ac,
3880 ac_build_gather_values(&ctx->ac, values, 4));
3881 break;
3882 }
3883 case nir_intrinsic_load_layer_id:
3884 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3885 break;
3886 case nir_intrinsic_load_front_face:
3887 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3888 break;
3889 case nir_intrinsic_load_helper_invocation:
3890 result = ac_build_load_helper_invocation(&ctx->ac);
3891 break;
3892 case nir_intrinsic_is_helper_invocation:
3893 result = ac_build_is_helper_invocation(&ctx->ac);
3894 break;
3895 case nir_intrinsic_load_color0:
3896 result = ctx->abi->color0;
3897 break;
3898 case nir_intrinsic_load_color1:
3899 result = ctx->abi->color1;
3900 break;
3901 case nir_intrinsic_load_user_data_amd:
3902 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3903 result = ctx->abi->user_data;
3904 break;
3905 case nir_intrinsic_load_instance_id:
3906 result = ctx->abi->instance_id;
3907 break;
3908 case nir_intrinsic_load_num_work_groups:
3909 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3910 break;
3911 case nir_intrinsic_load_local_invocation_index:
3912 result = visit_load_local_invocation_index(ctx);
3913 break;
3914 case nir_intrinsic_load_subgroup_id:
3915 result = visit_load_subgroup_id(ctx);
3916 break;
3917 case nir_intrinsic_load_num_subgroups:
3918 result = visit_load_num_subgroups(ctx);
3919 break;
3920 case nir_intrinsic_first_invocation:
3921 result = visit_first_invocation(ctx);
3922 break;
3923 case nir_intrinsic_load_push_constant:
3924 result = visit_load_push_constant(ctx, instr);
3925 break;
3926 case nir_intrinsic_vulkan_resource_index: {
3927 LLVMValueRef index = get_src(ctx, instr->src[0]);
3928 unsigned desc_set = nir_intrinsic_desc_set(instr);
3929 unsigned binding = nir_intrinsic_binding(instr);
3930
3931 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3932 binding);
3933 break;
3934 }
3935 case nir_intrinsic_vulkan_resource_reindex:
3936 result = visit_vulkan_resource_reindex(ctx, instr);
3937 break;
3938 case nir_intrinsic_store_ssbo:
3939 visit_store_ssbo(ctx, instr);
3940 break;
3941 case nir_intrinsic_load_ssbo:
3942 result = visit_load_buffer(ctx, instr);
3943 break;
3944 case nir_intrinsic_ssbo_atomic_add:
3945 case nir_intrinsic_ssbo_atomic_imin:
3946 case nir_intrinsic_ssbo_atomic_umin:
3947 case nir_intrinsic_ssbo_atomic_imax:
3948 case nir_intrinsic_ssbo_atomic_umax:
3949 case nir_intrinsic_ssbo_atomic_and:
3950 case nir_intrinsic_ssbo_atomic_or:
3951 case nir_intrinsic_ssbo_atomic_xor:
3952 case nir_intrinsic_ssbo_atomic_exchange:
3953 case nir_intrinsic_ssbo_atomic_comp_swap:
3954 result = visit_atomic_ssbo(ctx, instr);
3955 break;
3956 case nir_intrinsic_load_ubo:
3957 result = visit_load_ubo_buffer(ctx, instr);
3958 break;
3959 case nir_intrinsic_get_buffer_size:
3960 result = visit_get_buffer_size(ctx, instr);
3961 break;
3962 case nir_intrinsic_load_deref:
3963 result = visit_load_var(ctx, instr);
3964 break;
3965 case nir_intrinsic_store_deref:
3966 visit_store_var(ctx, instr);
3967 break;
3968 case nir_intrinsic_load_input:
3969 case nir_intrinsic_load_input_vertex:
3970 case nir_intrinsic_load_per_vertex_input:
3971 result = visit_load(ctx, instr, false);
3972 break;
3973 case nir_intrinsic_load_output:
3974 case nir_intrinsic_load_per_vertex_output:
3975 result = visit_load(ctx, instr, true);
3976 break;
3977 case nir_intrinsic_store_output:
3978 case nir_intrinsic_store_per_vertex_output:
3979 visit_store_output(ctx, instr);
3980 break;
3981 case nir_intrinsic_load_shared:
3982 result = visit_load_shared(ctx, instr);
3983 break;
3984 case nir_intrinsic_store_shared:
3985 visit_store_shared(ctx, instr);
3986 break;
3987 case nir_intrinsic_bindless_image_samples:
3988 case nir_intrinsic_image_deref_samples:
3989 result = visit_image_samples(ctx, instr);
3990 break;
3991 case nir_intrinsic_bindless_image_load:
3992 result = visit_image_load(ctx, instr, true);
3993 break;
3994 case nir_intrinsic_image_deref_load:
3995 result = visit_image_load(ctx, instr, false);
3996 break;
3997 case nir_intrinsic_bindless_image_store:
3998 visit_image_store(ctx, instr, true);
3999 break;
4000 case nir_intrinsic_image_deref_store:
4001 visit_image_store(ctx, instr, false);
4002 break;
4003 case nir_intrinsic_bindless_image_atomic_add:
4004 case nir_intrinsic_bindless_image_atomic_imin:
4005 case nir_intrinsic_bindless_image_atomic_umin:
4006 case nir_intrinsic_bindless_image_atomic_imax:
4007 case nir_intrinsic_bindless_image_atomic_umax:
4008 case nir_intrinsic_bindless_image_atomic_and:
4009 case nir_intrinsic_bindless_image_atomic_or:
4010 case nir_intrinsic_bindless_image_atomic_xor:
4011 case nir_intrinsic_bindless_image_atomic_exchange:
4012 case nir_intrinsic_bindless_image_atomic_comp_swap:
4013 case nir_intrinsic_bindless_image_atomic_inc_wrap:
4014 case nir_intrinsic_bindless_image_atomic_dec_wrap:
4015 result = visit_image_atomic(ctx, instr, true);
4016 break;
4017 case nir_intrinsic_image_deref_atomic_add:
4018 case nir_intrinsic_image_deref_atomic_imin:
4019 case nir_intrinsic_image_deref_atomic_umin:
4020 case nir_intrinsic_image_deref_atomic_imax:
4021 case nir_intrinsic_image_deref_atomic_umax:
4022 case nir_intrinsic_image_deref_atomic_and:
4023 case nir_intrinsic_image_deref_atomic_or:
4024 case nir_intrinsic_image_deref_atomic_xor:
4025 case nir_intrinsic_image_deref_atomic_exchange:
4026 case nir_intrinsic_image_deref_atomic_comp_swap:
4027 case nir_intrinsic_image_deref_atomic_inc_wrap:
4028 case nir_intrinsic_image_deref_atomic_dec_wrap:
4029 result = visit_image_atomic(ctx, instr, false);
4030 break;
4031 case nir_intrinsic_bindless_image_size:
4032 result = visit_image_size(ctx, instr, true);
4033 break;
4034 case nir_intrinsic_image_deref_size:
4035 result = visit_image_size(ctx, instr, false);
4036 break;
4037 case nir_intrinsic_shader_clock:
4038 result = ac_build_shader_clock(&ctx->ac,
4039 nir_intrinsic_memory_scope(instr));
4040 break;
4041 case nir_intrinsic_discard:
4042 case nir_intrinsic_discard_if:
4043 emit_discard(ctx, instr);
4044 break;
4045 case nir_intrinsic_demote:
4046 case nir_intrinsic_demote_if:
4047 emit_demote(ctx, instr);
4048 break;
4049 case nir_intrinsic_memory_barrier:
4050 case nir_intrinsic_group_memory_barrier:
4051 case nir_intrinsic_memory_barrier_buffer:
4052 case nir_intrinsic_memory_barrier_image:
4053 case nir_intrinsic_memory_barrier_shared:
4054 emit_membar(&ctx->ac, instr);
4055 break;
4056 case nir_intrinsic_scoped_barrier: {
4057 assert(!(nir_intrinsic_memory_semantics(instr) &
4058 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
4059
4060 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
4061
4062 unsigned wait_flags = 0;
4063 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
4064 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
4065 if (modes & nir_var_mem_shared)
4066 wait_flags |= AC_WAIT_LGKM;
4067
4068 if (wait_flags)
4069 ac_build_waitcnt(&ctx->ac, wait_flags);
4070
4071 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
4072 ac_emit_barrier(&ctx->ac, ctx->stage);
4073 break;
4074 }
4075 case nir_intrinsic_memory_barrier_tcs_patch:
4076 break;
4077 case nir_intrinsic_control_barrier:
4078 ac_emit_barrier(&ctx->ac, ctx->stage);
4079 break;
4080 case nir_intrinsic_shared_atomic_add:
4081 case nir_intrinsic_shared_atomic_imin:
4082 case nir_intrinsic_shared_atomic_umin:
4083 case nir_intrinsic_shared_atomic_imax:
4084 case nir_intrinsic_shared_atomic_umax:
4085 case nir_intrinsic_shared_atomic_and:
4086 case nir_intrinsic_shared_atomic_or:
4087 case nir_intrinsic_shared_atomic_xor:
4088 case nir_intrinsic_shared_atomic_exchange:
4089 case nir_intrinsic_shared_atomic_comp_swap:
4090 case nir_intrinsic_shared_atomic_fadd: {
4091 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
4092 instr->src[1].ssa->bit_size);
4093 result = visit_var_atomic(ctx, instr, ptr, 1);
4094 break;
4095 }
4096 case nir_intrinsic_deref_atomic_add:
4097 case nir_intrinsic_deref_atomic_imin:
4098 case nir_intrinsic_deref_atomic_umin:
4099 case nir_intrinsic_deref_atomic_imax:
4100 case nir_intrinsic_deref_atomic_umax:
4101 case nir_intrinsic_deref_atomic_and:
4102 case nir_intrinsic_deref_atomic_or:
4103 case nir_intrinsic_deref_atomic_xor:
4104 case nir_intrinsic_deref_atomic_exchange:
4105 case nir_intrinsic_deref_atomic_comp_swap:
4106 case nir_intrinsic_deref_atomic_fadd: {
4107 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
4108 result = visit_var_atomic(ctx, instr, ptr, 1);
4109 break;
4110 }
4111 case nir_intrinsic_load_barycentric_pixel:
4112 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
4113 break;
4114 case nir_intrinsic_load_barycentric_centroid:
4115 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
4116 break;
4117 case nir_intrinsic_load_barycentric_sample:
4118 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
4119 break;
4120 case nir_intrinsic_load_barycentric_model:
4121 result = barycentric_model(ctx);
4122 break;
4123 case nir_intrinsic_load_barycentric_at_offset: {
4124 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
4125 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
4126 break;
4127 }
4128 case nir_intrinsic_load_barycentric_at_sample: {
4129 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
4130 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
4131 break;
4132 }
4133 case nir_intrinsic_load_interpolated_input: {
4134 /* We assume any indirect loads have been lowered away */
4135 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
4136 assert(offset);
4137 assert(offset[0].i32 == 0);
4138
4139 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
4140 unsigned index = nir_intrinsic_base(instr);
4141 unsigned component = nir_intrinsic_component(instr);
4142 result = load_interpolated_input(ctx, interp_param, index,
4143 component,
4144 instr->dest.ssa.num_components,
4145 instr->dest.ssa.bit_size);
4146 break;
4147 }
4148 case nir_intrinsic_emit_vertex:
4149 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4150 break;
4151 case nir_intrinsic_emit_vertex_with_counter: {
4152 unsigned stream = nir_intrinsic_stream_id(instr);
4153 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4154 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4155 next_vertex,
4156 ctx->abi->outputs);
4157 break;
4158 }
4159 case nir_intrinsic_end_primitive:
4160 case nir_intrinsic_end_primitive_with_counter:
4161 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4162 break;
4163 case nir_intrinsic_load_tess_coord:
4164 result = ctx->abi->load_tess_coord(ctx->abi);
4165 break;
4166 case nir_intrinsic_load_tess_level_outer:
4167 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4168 break;
4169 case nir_intrinsic_load_tess_level_inner:
4170 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4171 break;
4172 case nir_intrinsic_load_tess_level_outer_default:
4173 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4174 break;
4175 case nir_intrinsic_load_tess_level_inner_default:
4176 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4177 break;
4178 case nir_intrinsic_load_patch_vertices_in:
4179 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4180 break;
4181 case nir_intrinsic_vote_all: {
4182 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4183 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4184 break;
4185 }
4186 case nir_intrinsic_vote_any: {
4187 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4188 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4189 break;
4190 }
4191 case nir_intrinsic_shuffle:
4192 if (ctx->ac.chip_class == GFX8 ||
4193 ctx->ac.chip_class == GFX9 ||
4194 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4195 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4196 get_src(ctx, instr->src[1]));
4197 } else {
4198 LLVMValueRef src = get_src(ctx, instr->src[0]);
4199 LLVMValueRef index = get_src(ctx, instr->src[1]);
4200 LLVMTypeRef type = LLVMTypeOf(src);
4201 struct waterfall_context wctx;
4202 LLVMValueRef index_val;
4203
4204 index_val = enter_waterfall(ctx, &wctx, index, true);
4205
4206 src = LLVMBuildZExt(ctx->ac.builder, src,
4207 ctx->ac.i32, "");
4208
4209 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4210 ctx->ac.i32,
4211 (LLVMValueRef []) { src, index_val }, 2,
4212 AC_FUNC_ATTR_READNONE |
4213 AC_FUNC_ATTR_CONVERGENT);
4214
4215 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4216
4217 result = exit_waterfall(ctx, &wctx, result);
4218 }
4219 break;
4220 case nir_intrinsic_reduce:
4221 result = ac_build_reduce(&ctx->ac,
4222 get_src(ctx, instr->src[0]),
4223 instr->const_index[0],
4224 instr->const_index[1]);
4225 break;
4226 case nir_intrinsic_inclusive_scan:
4227 result = ac_build_inclusive_scan(&ctx->ac,
4228 get_src(ctx, instr->src[0]),
4229 instr->const_index[0]);
4230 break;
4231 case nir_intrinsic_exclusive_scan:
4232 result = ac_build_exclusive_scan(&ctx->ac,
4233 get_src(ctx, instr->src[0]),
4234 instr->const_index[0]);
4235 break;
4236 case nir_intrinsic_quad_broadcast: {
4237 unsigned lane = nir_src_as_uint(instr->src[1]);
4238 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4239 lane, lane, lane, lane);
4240 break;
4241 }
4242 case nir_intrinsic_quad_swap_horizontal:
4243 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4244 break;
4245 case nir_intrinsic_quad_swap_vertical:
4246 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4247 break;
4248 case nir_intrinsic_quad_swap_diagonal:
4249 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4250 break;
4251 case nir_intrinsic_quad_swizzle_amd: {
4252 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4253 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4254 mask & 0x3, (mask >> 2) & 0x3,
4255 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4256 break;
4257 }
4258 case nir_intrinsic_masked_swizzle_amd: {
4259 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4260 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4261 break;
4262 }
4263 case nir_intrinsic_write_invocation_amd:
4264 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4265 get_src(ctx, instr->src[1]),
4266 get_src(ctx, instr->src[2]));
4267 break;
4268 case nir_intrinsic_mbcnt_amd:
4269 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4270 break;
4271 case nir_intrinsic_load_scratch: {
4272 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4273 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4274 offset);
4275 LLVMTypeRef comp_type =
4276 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4277 LLVMTypeRef vec_type =
4278 instr->dest.ssa.num_components == 1 ? comp_type :
4279 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4280 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4281 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4282 LLVMPointerType(vec_type, addr_space), "");
4283 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4284 break;
4285 }
4286 case nir_intrinsic_store_scratch: {
4287 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4288 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4289 offset);
4290 LLVMTypeRef comp_type =
4291 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4292 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4293 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4294 LLVMPointerType(comp_type, addr_space), "");
4295 LLVMValueRef src = get_src(ctx, instr->src[0]);
4296 unsigned wrmask = nir_intrinsic_write_mask(instr);
4297 while (wrmask) {
4298 int start, count;
4299 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4300
4301 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4302 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4303 LLVMTypeRef vec_type =
4304 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4305 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4306 offset_ptr,
4307 LLVMPointerType(vec_type, addr_space),
4308 "");
4309 LLVMValueRef offset_src =
4310 ac_extract_components(&ctx->ac, src, start, count);
4311 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4312 }
4313 break;
4314 }
4315 case nir_intrinsic_load_constant: {
4316 unsigned base = nir_intrinsic_base(instr);
4317 unsigned range = nir_intrinsic_range(instr);
4318
4319 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4320 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4321 LLVMConstInt(ctx->ac.i32, base, false), "");
4322
4323 /* Clamp the offset to avoid out-of-bound access because global
4324 * instructions can't handle them.
4325 */
4326 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4327 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4328 offset, size, "");
4329 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4330
4331 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4332 offset);
4333 LLVMTypeRef comp_type =
4334 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4335 LLVMTypeRef vec_type =
4336 instr->dest.ssa.num_components == 1 ? comp_type :
4337 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4338 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4339 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4340 LLVMPointerType(vec_type, addr_space), "");
4341 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4342 break;
4343 }
4344 default:
4345 fprintf(stderr, "Unknown intrinsic: ");
4346 nir_print_instr(&instr->instr, stderr);
4347 fprintf(stderr, "\n");
4348 break;
4349 }
4350 if (result) {
4351 ctx->ssa_defs[instr->dest.ssa.index] = result;
4352 }
4353 }
4354
4355 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4356 unsigned base_index,
4357 unsigned constant_index,
4358 LLVMValueRef dynamic_index)
4359 {
4360 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4361 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4362 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4363
4364 /* Bindless uniforms are 64bit so multiple index by 8 */
4365 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4366 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4367
4368 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4369
4370 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4371 NULL, 0, 0, true, true);
4372
4373 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4374 }
4375
4376 struct sampler_desc_address {
4377 unsigned descriptor_set;
4378 unsigned base_index; /* binding in vulkan */
4379 unsigned constant_index;
4380 LLVMValueRef dynamic_index;
4381 bool image;
4382 bool bindless;
4383 };
4384
4385 static struct sampler_desc_address
4386 get_sampler_desc_internal(struct ac_nir_context *ctx,
4387 nir_deref_instr *deref_instr,
4388 const nir_instr *instr,
4389 bool image)
4390 {
4391 LLVMValueRef index = NULL;
4392 unsigned constant_index = 0;
4393 unsigned descriptor_set;
4394 unsigned base_index;
4395 bool bindless = false;
4396
4397 if (!deref_instr) {
4398 descriptor_set = 0;
4399 if (image) {
4400 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4401 base_index = 0;
4402 bindless = true;
4403 index = get_src(ctx, img_instr->src[0]);
4404 } else {
4405 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4406 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4407 nir_tex_src_sampler_handle);
4408 if (sampSrcIdx != -1) {
4409 base_index = 0;
4410 bindless = true;
4411 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4412 } else {
4413 assert(tex_instr && !image);
4414 base_index = tex_instr->sampler_index;
4415 }
4416 }
4417 } else {
4418 while(deref_instr->deref_type != nir_deref_type_var) {
4419 if (deref_instr->deref_type == nir_deref_type_array) {
4420 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4421 if (!array_size)
4422 array_size = 1;
4423
4424 if (nir_src_is_const(deref_instr->arr.index)) {
4425 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4426 } else {
4427 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4428
4429 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4430 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4431
4432 if (!index)
4433 index = indirect;
4434 else
4435 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4436 }
4437
4438 deref_instr = nir_src_as_deref(deref_instr->parent);
4439 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4440 unsigned sidx = deref_instr->strct.index;
4441 deref_instr = nir_src_as_deref(deref_instr->parent);
4442 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4443 } else {
4444 unreachable("Unsupported deref type");
4445 }
4446 }
4447 descriptor_set = deref_instr->var->data.descriptor_set;
4448
4449 if (deref_instr->var->data.bindless) {
4450 /* For now just assert on unhandled variable types */
4451 assert(deref_instr->var->data.mode == nir_var_uniform);
4452
4453 base_index = deref_instr->var->data.driver_location;
4454 bindless = true;
4455
4456 index = index ? index : ctx->ac.i32_0;
4457 index = get_bindless_index_from_uniform(ctx, base_index,
4458 constant_index, index);
4459 } else
4460 base_index = deref_instr->var->data.binding;
4461 }
4462 return (struct sampler_desc_address) {
4463 .descriptor_set = descriptor_set,
4464 .base_index = base_index,
4465 .constant_index = constant_index,
4466 .dynamic_index = index,
4467 .image = image,
4468 .bindless = bindless,
4469 };
4470 }
4471
4472 /* Extract any possibly divergent index into a separate value that can be fed
4473 * into get_sampler_desc with the same arguments. */
4474 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4475 nir_deref_instr *deref_instr,
4476 const nir_instr *instr,
4477 bool image)
4478 {
4479 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4480 return addr.dynamic_index;
4481 }
4482
4483 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4484 nir_deref_instr *deref_instr,
4485 enum ac_descriptor_type desc_type,
4486 const nir_instr *instr,
4487 LLVMValueRef index,
4488 bool image, bool write)
4489 {
4490 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4491 return ctx->abi->load_sampler_desc(ctx->abi,
4492 addr.descriptor_set,
4493 addr.base_index,
4494 addr.constant_index, index,
4495 desc_type, addr.image, write, addr.bindless);
4496 }
4497
4498 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4499 *
4500 * GFX6-GFX7:
4501 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4502 * filtering manually. The driver sets img7 to a mask clearing
4503 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4504 * s_and_b32 samp0, samp0, img7
4505 *
4506 * GFX8:
4507 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4508 */
4509 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4510 LLVMValueRef res, LLVMValueRef samp)
4511 {
4512 LLVMBuilderRef builder = ctx->ac.builder;
4513 LLVMValueRef img7, samp0;
4514
4515 if (ctx->ac.chip_class >= GFX8)
4516 return samp;
4517
4518 img7 = LLVMBuildExtractElement(builder, res,
4519 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4520 samp0 = LLVMBuildExtractElement(builder, samp,
4521 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4522 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4523 return LLVMBuildInsertElement(builder, samp, samp0,
4524 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4525 }
4526
4527 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4528 nir_tex_instr *instr,
4529 struct waterfall_context *wctx,
4530 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4531 LLVMValueRef *fmask_ptr)
4532 {
4533 nir_deref_instr *texture_deref_instr = NULL;
4534 nir_deref_instr *sampler_deref_instr = NULL;
4535 int plane = -1;
4536
4537 for (unsigned i = 0; i < instr->num_srcs; i++) {
4538 switch (instr->src[i].src_type) {
4539 case nir_tex_src_texture_deref:
4540 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4541 break;
4542 case nir_tex_src_sampler_deref:
4543 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4544 break;
4545 case nir_tex_src_plane:
4546 plane = nir_src_as_int(instr->src[i].src);
4547 break;
4548 default:
4549 break;
4550 }
4551 }
4552
4553 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4554 &instr->instr, false);
4555 if (!sampler_deref_instr)
4556 sampler_deref_instr = texture_deref_instr;
4557
4558 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4559 &instr->instr, false);
4560 if (instr->texture_non_uniform)
4561 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4562
4563 if (instr->sampler_non_uniform)
4564 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4565
4566 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4567
4568 if (plane >= 0) {
4569 assert(instr->op != nir_texop_txf_ms &&
4570 instr->op != nir_texop_samples_identical);
4571 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4572
4573 main_descriptor = AC_DESC_PLANE_0 + plane;
4574 }
4575
4576 if (instr->op == nir_texop_fragment_mask_fetch) {
4577 /* The fragment mask is fetched from the compressed
4578 * multisampled surface.
4579 */
4580 main_descriptor = AC_DESC_FMASK;
4581 }
4582
4583 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4584 texture_dynamic_index, false, false);
4585
4586 if (samp_ptr) {
4587 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4588 sampler_dynamic_index, false, false);
4589 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4590 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4591 }
4592 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4593 instr->op == nir_texop_samples_identical))
4594 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4595 &instr->instr, texture_dynamic_index, false, false);
4596 }
4597
4598 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4599 LLVMValueRef coord)
4600 {
4601 coord = ac_to_float(ctx, coord);
4602 coord = ac_build_round(ctx, coord);
4603 coord = ac_to_integer(ctx, coord);
4604 return coord;
4605 }
4606
4607 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4608 {
4609 LLVMValueRef result = NULL;
4610 struct ac_image_args args = { 0 };
4611 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4612 LLVMValueRef ddx = NULL, ddy = NULL;
4613 unsigned offset_src = 0;
4614 struct waterfall_context wctx[2] = {{{0}}};
4615
4616 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4617
4618 for (unsigned i = 0; i < instr->num_srcs; i++) {
4619 switch (instr->src[i].src_type) {
4620 case nir_tex_src_coord: {
4621 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4622 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4623 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4624 break;
4625 }
4626 case nir_tex_src_projector:
4627 break;
4628 case nir_tex_src_comparator:
4629 if (instr->is_shadow) {
4630 args.compare = get_src(ctx, instr->src[i].src);
4631 args.compare = ac_to_float(&ctx->ac, args.compare);
4632 }
4633 break;
4634 case nir_tex_src_offset:
4635 args.offset = get_src(ctx, instr->src[i].src);
4636 offset_src = i;
4637 break;
4638 case nir_tex_src_bias:
4639 args.bias = get_src(ctx, instr->src[i].src);
4640 break;
4641 case nir_tex_src_lod: {
4642 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4643 args.level_zero = true;
4644 else
4645 args.lod = get_src(ctx, instr->src[i].src);
4646 break;
4647 }
4648 case nir_tex_src_ms_index:
4649 sample_index = get_src(ctx, instr->src[i].src);
4650 break;
4651 case nir_tex_src_ms_mcs:
4652 break;
4653 case nir_tex_src_ddx:
4654 ddx = get_src(ctx, instr->src[i].src);
4655 break;
4656 case nir_tex_src_ddy:
4657 ddy = get_src(ctx, instr->src[i].src);
4658 break;
4659 case nir_tex_src_min_lod:
4660 args.min_lod = get_src(ctx, instr->src[i].src);
4661 break;
4662 case nir_tex_src_texture_offset:
4663 case nir_tex_src_sampler_offset:
4664 case nir_tex_src_plane:
4665 default:
4666 break;
4667 }
4668 }
4669
4670 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4671 result = get_buffer_size(ctx, args.resource, true);
4672 goto write_result;
4673 }
4674
4675 if (instr->op == nir_texop_texture_samples) {
4676 LLVMValueRef res, samples, is_msaa;
4677 LLVMValueRef default_sample;
4678
4679 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4680 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4681 LLVMConstInt(ctx->ac.i32, 3, false), "");
4682 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4683 LLVMConstInt(ctx->ac.i32, 28, false), "");
4684 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4685 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4686 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4687 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4688
4689 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4690 LLVMConstInt(ctx->ac.i32, 16, false), "");
4691 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4692 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4693 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4694 samples, "");
4695
4696 if (ctx->abi->robust_buffer_access) {
4697 LLVMValueRef dword1, is_null_descriptor;
4698
4699 /* Extract the second dword of the descriptor, if it's
4700 * all zero, then it's a null descriptor.
4701 */
4702 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4703 LLVMConstInt(ctx->ac.i32, 1, false), "");
4704 is_null_descriptor =
4705 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4706 LLVMConstInt(ctx->ac.i32, 0, false), "");
4707 default_sample =
4708 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4709 ctx->ac.i32_0, ctx->ac.i32_1, "");
4710 } else {
4711 default_sample = ctx->ac.i32_1;
4712 }
4713
4714 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4715 default_sample, "");
4716 result = samples;
4717 goto write_result;
4718 }
4719
4720 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4721 LLVMValueRef offset[3], pack;
4722 for (unsigned chan = 0; chan < 3; ++chan)
4723 offset[chan] = ctx->ac.i32_0;
4724
4725 unsigned num_components = ac_get_llvm_num_components(args.offset);
4726 for (unsigned chan = 0; chan < num_components; chan++) {
4727 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4728 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4729 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4730 if (chan)
4731 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4732 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4733 }
4734 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4735 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4736 args.offset = pack;
4737 }
4738
4739 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4740 * OpenGL 4.5 spec says:
4741 *
4742 * "If the texture’s internal format indicates a fixed-point
4743 * depth texture, then D_t and D_ref are clamped to the
4744 * range [0, 1]; otherwise no clamping is performed."
4745 *
4746 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4747 * so the depth comparison value isn't clamped for Z16 and
4748 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4749 * an explicitly clamped 32-bit float format.
4750 */
4751 if (args.compare &&
4752 ctx->ac.chip_class >= GFX8 &&
4753 ctx->ac.chip_class <= GFX9 &&
4754 ctx->abi->clamp_shadow_reference) {
4755 LLVMValueRef upgraded, clamped;
4756
4757 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4758 LLVMConstInt(ctx->ac.i32, 3, false), "");
4759 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4760 LLVMConstInt(ctx->ac.i32, 29, false), "");
4761 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4762 clamped = ac_build_clamp(&ctx->ac, args.compare);
4763 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4764 args.compare, "");
4765 }
4766
4767 /* pack derivatives */
4768 if (ddx || ddy) {
4769 int num_src_deriv_channels, num_dest_deriv_channels;
4770 switch (instr->sampler_dim) {
4771 case GLSL_SAMPLER_DIM_3D:
4772 case GLSL_SAMPLER_DIM_CUBE:
4773 num_src_deriv_channels = 3;
4774 num_dest_deriv_channels = 3;
4775 break;
4776 case GLSL_SAMPLER_DIM_2D:
4777 default:
4778 num_src_deriv_channels = 2;
4779 num_dest_deriv_channels = 2;
4780 break;
4781 case GLSL_SAMPLER_DIM_1D:
4782 num_src_deriv_channels = 1;
4783 if (ctx->ac.chip_class == GFX9) {
4784 num_dest_deriv_channels = 2;
4785 } else {
4786 num_dest_deriv_channels = 1;
4787 }
4788 break;
4789 }
4790
4791 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4792 args.derivs[i] = ac_to_float(&ctx->ac,
4793 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4794 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4795 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4796 }
4797 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4798 args.derivs[i] = ctx->ac.f32_0;
4799 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4800 }
4801 }
4802
4803 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4804 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4805 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4806 if (instr->coord_components == 3)
4807 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4808 ac_prepare_cube_coords(&ctx->ac,
4809 instr->op == nir_texop_txd, instr->is_array,
4810 instr->op == nir_texop_lod, args.coords, args.derivs);
4811 }
4812
4813 /* Texture coordinates fixups */
4814 if (instr->coord_components > 1 &&
4815 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4816 instr->is_array &&
4817 instr->op != nir_texop_txf) {
4818 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4819 }
4820
4821 if (instr->coord_components > 2 &&
4822 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4823 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4824 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4825 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4826 instr->is_array &&
4827 instr->op != nir_texop_txf &&
4828 instr->op != nir_texop_txf_ms &&
4829 instr->op != nir_texop_fragment_fetch &&
4830 instr->op != nir_texop_fragment_mask_fetch) {
4831 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4832 }
4833
4834 if (ctx->ac.chip_class == GFX9 &&
4835 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4836 instr->op != nir_texop_lod) {
4837 LLVMValueRef filler;
4838 if (instr->op == nir_texop_txf)
4839 filler = ctx->ac.i32_0;
4840 else
4841 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4842
4843 if (instr->is_array)
4844 args.coords[2] = args.coords[1];
4845 args.coords[1] = filler;
4846 }
4847
4848 /* Pack sample index */
4849 if (sample_index && (instr->op == nir_texop_txf_ms ||
4850 instr->op == nir_texop_fragment_fetch))
4851 args.coords[instr->coord_components] = sample_index;
4852
4853 if (instr->op == nir_texop_samples_identical) {
4854 struct ac_image_args txf_args = { 0 };
4855 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4856
4857 txf_args.dmask = 0xf;
4858 txf_args.resource = fmask_ptr;
4859 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4860 result = build_tex_intrinsic(ctx, instr, &txf_args);
4861
4862 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4863 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4864 goto write_result;
4865 }
4866
4867 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4868 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4869 instr->op != nir_texop_txs &&
4870 instr->op != nir_texop_fragment_fetch &&
4871 instr->op != nir_texop_fragment_mask_fetch) {
4872 unsigned sample_chan = instr->is_array ? 3 : 2;
4873 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4874 &ctx->ac, args.coords[0], args.coords[1],
4875 instr->is_array ? args.coords[2] : NULL,
4876 args.coords[sample_chan], fmask_ptr);
4877 }
4878
4879 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4880 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4881 num_offsets = MIN2(num_offsets, instr->coord_components);
4882 for (unsigned i = 0; i < num_offsets; ++i) {
4883 args.coords[i] = LLVMBuildAdd(
4884 ctx->ac.builder, args.coords[i],
4885 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4886 }
4887 args.offset = NULL;
4888 }
4889
4890 /* DMASK was repurposed for GATHER4. 4 components are always
4891 * returned and DMASK works like a swizzle - it selects
4892 * the component to fetch. The only valid DMASK values are
4893 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4894 * (red,red,red,red) etc.) The ISA document doesn't mention
4895 * this.
4896 */
4897 args.dmask = 0xf;
4898 if (instr->op == nir_texop_tg4) {
4899 if (instr->is_shadow)
4900 args.dmask = 1;
4901 else
4902 args.dmask = 1 << instr->component;
4903 }
4904
4905 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4906 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4907 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4908 }
4909
4910 /* Adjust the number of coordinates because we only need (x,y) for 2D
4911 * multisampled images and (x,y,layer) for 2D multisampled layered
4912 * images or for multisampled input attachments.
4913 */
4914 if (instr->op == nir_texop_fragment_mask_fetch) {
4915 if (args.dim == ac_image_2dmsaa) {
4916 args.dim = ac_image_2d;
4917 } else {
4918 assert(args.dim == ac_image_2darraymsaa);
4919 args.dim = ac_image_2darray;
4920 }
4921 }
4922
4923 assert(instr->dest.is_ssa);
4924 args.d16 = instr->dest.ssa.bit_size == 16;
4925
4926 result = build_tex_intrinsic(ctx, instr, &args);
4927
4928 if (instr->op == nir_texop_query_levels)
4929 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4930 else if (instr->is_shadow && instr->is_new_style_shadow &&
4931 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4932 instr->op != nir_texop_tg4)
4933 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4934 else if (instr->op == nir_texop_txs &&
4935 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4936 instr->is_array) {
4937 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4938 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4939 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4940 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4941 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4942 } else if (ctx->ac.chip_class == GFX9 &&
4943 instr->op == nir_texop_txs &&
4944 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4945 instr->is_array) {
4946 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4947 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4948 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4949 ctx->ac.i32_1, "");
4950 } else if (instr->dest.ssa.num_components != 4)
4951 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4952
4953 write_result:
4954 if (result) {
4955 assert(instr->dest.is_ssa);
4956 result = ac_to_integer(&ctx->ac, result);
4957
4958 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4959 result = exit_waterfall(ctx, wctx + i, result);
4960 }
4961
4962 ctx->ssa_defs[instr->dest.ssa.index] = result;
4963 }
4964 }
4965
4966 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4967 {
4968 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4969 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4970
4971 ctx->ssa_defs[instr->dest.ssa.index] = result;
4972 _mesa_hash_table_insert(ctx->phis, instr, result);
4973 }
4974
4975 static void visit_post_phi(struct ac_nir_context *ctx,
4976 nir_phi_instr *instr,
4977 LLVMValueRef llvm_phi)
4978 {
4979 nir_foreach_phi_src(src, instr) {
4980 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4981 LLVMValueRef llvm_src = get_src(ctx, src->src);
4982
4983 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4984 }
4985 }
4986
4987 static void phi_post_pass(struct ac_nir_context *ctx)
4988 {
4989 hash_table_foreach(ctx->phis, entry) {
4990 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4991 (LLVMValueRef)entry->data);
4992 }
4993 }
4994
4995
4996 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4997 nir_foreach_use(use_src, def) {
4998 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4999 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
5000 if (instr->intrinsic == nir_intrinsic_store_deref)
5001 return true;
5002 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
5003 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
5004 if (instr->op == nir_op_vec4 &&
5005 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
5006 return true;
5007 }
5008 }
5009 }
5010 return false;
5011 }
5012
5013 static void visit_ssa_undef(struct ac_nir_context *ctx,
5014 const nir_ssa_undef_instr *instr)
5015 {
5016 unsigned num_components = instr->def.num_components;
5017 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
5018
5019 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
5020 LLVMValueRef undef;
5021
5022 if (num_components == 1)
5023 undef = LLVMGetUndef(type);
5024 else {
5025 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
5026 }
5027 ctx->ssa_defs[instr->def.index] = undef;
5028 } else {
5029 LLVMValueRef zero = LLVMConstInt(type, 0, false);
5030 if (num_components > 1) {
5031 zero = ac_build_gather_values_extended(
5032 &ctx->ac, &zero, 4, 0, false, false);
5033 }
5034 ctx->ssa_defs[instr->def.index] = zero;
5035 }
5036 }
5037
5038 static void visit_jump(struct ac_llvm_context *ctx,
5039 const nir_jump_instr *instr)
5040 {
5041 switch (instr->type) {
5042 case nir_jump_break:
5043 ac_build_break(ctx);
5044 break;
5045 case nir_jump_continue:
5046 ac_build_continue(ctx);
5047 break;
5048 default:
5049 fprintf(stderr, "Unknown NIR jump instr: ");
5050 nir_print_instr(&instr->instr, stderr);
5051 fprintf(stderr, "\n");
5052 abort();
5053 }
5054 }
5055
5056 static LLVMTypeRef
5057 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
5058 enum glsl_base_type type)
5059 {
5060 switch (type) {
5061 case GLSL_TYPE_INT:
5062 case GLSL_TYPE_UINT:
5063 case GLSL_TYPE_BOOL:
5064 case GLSL_TYPE_SUBROUTINE:
5065 return ac->i32;
5066 case GLSL_TYPE_INT8:
5067 case GLSL_TYPE_UINT8:
5068 return ac->i8;
5069 case GLSL_TYPE_INT16:
5070 case GLSL_TYPE_UINT16:
5071 return ac->i16;
5072 case GLSL_TYPE_FLOAT:
5073 return ac->f32;
5074 case GLSL_TYPE_FLOAT16:
5075 return ac->f16;
5076 case GLSL_TYPE_INT64:
5077 case GLSL_TYPE_UINT64:
5078 return ac->i64;
5079 case GLSL_TYPE_DOUBLE:
5080 return ac->f64;
5081 default:
5082 unreachable("unknown GLSL type");
5083 }
5084 }
5085
5086 static LLVMTypeRef
5087 glsl_to_llvm_type(struct ac_llvm_context *ac,
5088 const struct glsl_type *type)
5089 {
5090 if (glsl_type_is_scalar(type)) {
5091 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
5092 }
5093
5094 if (glsl_type_is_vector(type)) {
5095 return LLVMVectorType(
5096 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
5097 glsl_get_vector_elements(type));
5098 }
5099
5100 if (glsl_type_is_matrix(type)) {
5101 return LLVMArrayType(
5102 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
5103 glsl_get_matrix_columns(type));
5104 }
5105
5106 if (glsl_type_is_array(type)) {
5107 return LLVMArrayType(
5108 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
5109 glsl_get_length(type));
5110 }
5111
5112 assert(glsl_type_is_struct_or_ifc(type));
5113
5114 LLVMTypeRef member_types[glsl_get_length(type)];
5115
5116 for (unsigned i = 0; i < glsl_get_length(type); i++) {
5117 member_types[i] =
5118 glsl_to_llvm_type(ac,
5119 glsl_get_struct_field(type, i));
5120 }
5121
5122 return LLVMStructTypeInContext(ac->context, member_types,
5123 glsl_get_length(type), false);
5124 }
5125
5126 static void visit_deref(struct ac_nir_context *ctx,
5127 nir_deref_instr *instr)
5128 {
5129 if (instr->mode != nir_var_mem_shared &&
5130 instr->mode != nir_var_mem_global)
5131 return;
5132
5133 LLVMValueRef result = NULL;
5134 switch(instr->deref_type) {
5135 case nir_deref_type_var: {
5136 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
5137 result = entry->data;
5138 break;
5139 }
5140 case nir_deref_type_struct:
5141 if (instr->mode == nir_var_mem_global) {
5142 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5143 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5144 instr->strct.index);
5145 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5146 LLVMConstInt(ctx->ac.i32, offset, 0));
5147 } else {
5148 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5149 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5150 }
5151 break;
5152 case nir_deref_type_array:
5153 if (instr->mode == nir_var_mem_global) {
5154 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5155 unsigned stride = glsl_get_explicit_stride(parent->type);
5156
5157 if ((glsl_type_is_matrix(parent->type) &&
5158 glsl_matrix_type_is_row_major(parent->type)) ||
5159 (glsl_type_is_vector(parent->type) && stride == 0))
5160 stride = type_scalar_size_bytes(parent->type);
5161
5162 assert(stride > 0);
5163 LLVMValueRef index = get_src(ctx, instr->arr.index);
5164 if (LLVMTypeOf(index) != ctx->ac.i64)
5165 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5166
5167 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5168
5169 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5170 } else {
5171 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5172 get_src(ctx, instr->arr.index));
5173 }
5174 break;
5175 case nir_deref_type_ptr_as_array:
5176 if (instr->mode == nir_var_mem_global) {
5177 unsigned stride = nir_deref_instr_array_stride(instr);
5178
5179 LLVMValueRef index = get_src(ctx, instr->arr.index);
5180 if (LLVMTypeOf(index) != ctx->ac.i64)
5181 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5182
5183 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5184
5185 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5186 } else {
5187 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5188 get_src(ctx, instr->arr.index));
5189 }
5190 break;
5191 case nir_deref_type_cast: {
5192 result = get_src(ctx, instr->parent);
5193
5194 /* We can't use the structs from LLVM because the shader
5195 * specifies its own offsets. */
5196 LLVMTypeRef pointee_type = ctx->ac.i8;
5197 if (instr->mode == nir_var_mem_shared)
5198 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5199
5200 unsigned address_space;
5201
5202 switch(instr->mode) {
5203 case nir_var_mem_shared:
5204 address_space = AC_ADDR_SPACE_LDS;
5205 break;
5206 case nir_var_mem_global:
5207 address_space = AC_ADDR_SPACE_GLOBAL;
5208 break;
5209 default:
5210 unreachable("Unhandled address space");
5211 }
5212
5213 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5214
5215 if (LLVMTypeOf(result) != type) {
5216 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5217 result = LLVMBuildBitCast(ctx->ac.builder, result,
5218 type, "");
5219 } else {
5220 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5221 type, "");
5222 }
5223 }
5224 break;
5225 }
5226 default:
5227 unreachable("Unhandled deref_instr deref type");
5228 }
5229
5230 ctx->ssa_defs[instr->dest.ssa.index] = result;
5231 }
5232
5233 static void visit_cf_list(struct ac_nir_context *ctx,
5234 struct exec_list *list);
5235
5236 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5237 {
5238 nir_foreach_instr(instr, block)
5239 {
5240 switch (instr->type) {
5241 case nir_instr_type_alu:
5242 visit_alu(ctx, nir_instr_as_alu(instr));
5243 break;
5244 case nir_instr_type_load_const:
5245 visit_load_const(ctx, nir_instr_as_load_const(instr));
5246 break;
5247 case nir_instr_type_intrinsic:
5248 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5249 break;
5250 case nir_instr_type_tex:
5251 visit_tex(ctx, nir_instr_as_tex(instr));
5252 break;
5253 case nir_instr_type_phi:
5254 visit_phi(ctx, nir_instr_as_phi(instr));
5255 break;
5256 case nir_instr_type_ssa_undef:
5257 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5258 break;
5259 case nir_instr_type_jump:
5260 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5261 break;
5262 case nir_instr_type_deref:
5263 visit_deref(ctx, nir_instr_as_deref(instr));
5264 break;
5265 default:
5266 fprintf(stderr, "Unknown NIR instr type: ");
5267 nir_print_instr(instr, stderr);
5268 fprintf(stderr, "\n");
5269 abort();
5270 }
5271 }
5272
5273 _mesa_hash_table_insert(ctx->defs, block,
5274 LLVMGetInsertBlock(ctx->ac.builder));
5275 }
5276
5277 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5278 {
5279 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5280
5281 nir_block *then_block =
5282 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5283
5284 ac_build_uif(&ctx->ac, value, then_block->index);
5285
5286 visit_cf_list(ctx, &if_stmt->then_list);
5287
5288 if (!exec_list_is_empty(&if_stmt->else_list)) {
5289 nir_block *else_block =
5290 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5291
5292 ac_build_else(&ctx->ac, else_block->index);
5293 visit_cf_list(ctx, &if_stmt->else_list);
5294 }
5295
5296 ac_build_endif(&ctx->ac, then_block->index);
5297 }
5298
5299 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5300 {
5301 nir_block *first_loop_block =
5302 (nir_block *) exec_list_get_head(&loop->body);
5303
5304 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5305
5306 visit_cf_list(ctx, &loop->body);
5307
5308 ac_build_endloop(&ctx->ac, first_loop_block->index);
5309 }
5310
5311 static void visit_cf_list(struct ac_nir_context *ctx,
5312 struct exec_list *list)
5313 {
5314 foreach_list_typed(nir_cf_node, node, node, list)
5315 {
5316 switch (node->type) {
5317 case nir_cf_node_block:
5318 visit_block(ctx, nir_cf_node_as_block(node));
5319 break;
5320
5321 case nir_cf_node_if:
5322 visit_if(ctx, nir_cf_node_as_if(node));
5323 break;
5324
5325 case nir_cf_node_loop:
5326 visit_loop(ctx, nir_cf_node_as_loop(node));
5327 break;
5328
5329 default:
5330 assert(0);
5331 }
5332 }
5333 }
5334
5335 void
5336 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5337 struct ac_shader_abi *abi,
5338 struct nir_shader *nir,
5339 struct nir_variable *variable,
5340 gl_shader_stage stage)
5341 {
5342 unsigned output_loc = variable->data.driver_location / 4;
5343 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5344
5345 /* tess ctrl has it's own load/store paths for outputs */
5346 if (stage == MESA_SHADER_TESS_CTRL)
5347 return;
5348
5349 if (stage == MESA_SHADER_VERTEX ||
5350 stage == MESA_SHADER_TESS_EVAL ||
5351 stage == MESA_SHADER_GEOMETRY) {
5352 int idx = variable->data.location + variable->data.index;
5353 if (idx == VARYING_SLOT_CLIP_DIST0) {
5354 int length = nir->info.clip_distance_array_size +
5355 nir->info.cull_distance_array_size;
5356
5357 if (length > 4)
5358 attrib_count = 2;
5359 else
5360 attrib_count = 1;
5361 }
5362 }
5363
5364 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5365 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5366 for (unsigned i = 0; i < attrib_count; ++i) {
5367 for (unsigned chan = 0; chan < 4; chan++) {
5368 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5369 ac_build_alloca_undef(ctx, type, "");
5370 }
5371 }
5372 }
5373
5374 static void
5375 setup_locals(struct ac_nir_context *ctx,
5376 struct nir_function *func)
5377 {
5378 int i, j;
5379 ctx->num_locals = 0;
5380 nir_foreach_function_temp_variable(variable, func->impl) {
5381 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5382 variable->data.driver_location = ctx->num_locals * 4;
5383 variable->data.location_frac = 0;
5384 ctx->num_locals += attrib_count;
5385 }
5386 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5387 if (!ctx->locals)
5388 return;
5389
5390 for (i = 0; i < ctx->num_locals; i++) {
5391 for (j = 0; j < 4; j++) {
5392 ctx->locals[i * 4 + j] =
5393 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5394 }
5395 }
5396 }
5397
5398 static void
5399 setup_scratch(struct ac_nir_context *ctx,
5400 struct nir_shader *shader)
5401 {
5402 if (shader->scratch_size == 0)
5403 return;
5404
5405 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5406 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5407 "scratch");
5408 }
5409
5410 static void
5411 setup_constant_data(struct ac_nir_context *ctx,
5412 struct nir_shader *shader)
5413 {
5414 if (!shader->constant_data)
5415 return;
5416
5417 LLVMValueRef data =
5418 LLVMConstStringInContext(ctx->ac.context,
5419 shader->constant_data,
5420 shader->constant_data_size,
5421 true);
5422 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5423
5424 /* We want to put the constant data in the CONST address space so that
5425 * we can use scalar loads. However, LLVM versions before 10 put these
5426 * variables in the same section as the code, which is unacceptable
5427 * for RadeonSI as it needs to relocate all the data sections after
5428 * the code sections. See https://reviews.llvm.org/D65813.
5429 */
5430 unsigned address_space =
5431 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5432
5433 LLVMValueRef global =
5434 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5435 "const_data",
5436 address_space);
5437
5438 LLVMSetInitializer(global, data);
5439 LLVMSetGlobalConstant(global, true);
5440 LLVMSetVisibility(global, LLVMHiddenVisibility);
5441 ctx->constant_data = global;
5442 }
5443
5444 static void
5445 setup_shared(struct ac_nir_context *ctx,
5446 struct nir_shader *nir)
5447 {
5448 if (ctx->ac.lds)
5449 return;
5450
5451 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5452 nir->info.cs.shared_size);
5453
5454 LLVMValueRef lds =
5455 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5456 "compute_lds",
5457 AC_ADDR_SPACE_LDS);
5458 LLVMSetAlignment(lds, 64 * 1024);
5459
5460 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5461 LLVMPointerType(ctx->ac.i8,
5462 AC_ADDR_SPACE_LDS), "");
5463 }
5464
5465 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5466 const struct ac_shader_args *args, struct nir_shader *nir)
5467 {
5468 struct ac_nir_context ctx = {};
5469 struct nir_function *func;
5470
5471 ctx.ac = *ac;
5472 ctx.abi = abi;
5473 ctx.args = args;
5474
5475 ctx.stage = nir->info.stage;
5476 ctx.info = &nir->info;
5477
5478 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5479
5480 /* TODO: remove this after RADV switches to lowered IO */
5481 if (!nir->info.io_lowered) {
5482 nir_foreach_shader_out_variable(variable, nir) {
5483 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5484 ctx.stage);
5485 }
5486 }
5487
5488 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5489 _mesa_key_pointer_equal);
5490 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5491 _mesa_key_pointer_equal);
5492 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5493 _mesa_key_pointer_equal);
5494
5495 if (ctx.abi->kill_ps_if_inf_interp)
5496 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5497 _mesa_key_pointer_equal);
5498
5499 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5500
5501 nir_index_ssa_defs(func->impl);
5502 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5503
5504 setup_locals(&ctx, func);
5505 setup_scratch(&ctx, nir);
5506 setup_constant_data(&ctx, nir);
5507
5508 if (gl_shader_stage_is_compute(nir->info.stage))
5509 setup_shared(&ctx, nir);
5510
5511 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5512 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5513 /* true = don't kill. */
5514 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5515 }
5516
5517 visit_cf_list(&ctx, &func->impl->body);
5518 phi_post_pass(&ctx);
5519
5520 if (ctx.ac.postponed_kill)
5521 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5522 ctx.ac.postponed_kill, ""));
5523
5524 if (!gl_shader_stage_is_compute(nir->info.stage))
5525 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5526 ctx.abi->outputs);
5527
5528 free(ctx.locals);
5529 free(ctx.ssa_defs);
5530 ralloc_free(ctx.defs);
5531 ralloc_free(ctx.phis);
5532 ralloc_free(ctx.vars);
5533 if (ctx.abi->kill_ps_if_inf_interp)
5534 ralloc_free(ctx.verified_interp);
5535 }
5536
5537 bool
5538 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5539 {
5540 bool progress = false;
5541
5542 /* Lower large variables to scratch first so that we won't bloat the
5543 * shader by generating large if ladders for them. We later lower
5544 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5545 */
5546 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5547 nir_var_function_temp,
5548 256,
5549 glsl_get_natural_size_align_bytes);
5550
5551 /* While it would be nice not to have this flag, we are constrained
5552 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5553 */
5554 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5555
5556 /* TODO: Indirect indexing of GS inputs is unimplemented.
5557 *
5558 * TCS and TES load inputs directly from LDS or offchip memory, so
5559 * indirect indexing is trivial.
5560 */
5561 nir_variable_mode indirect_mask = 0;
5562 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5563 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5564 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5565 !llvm_has_working_vgpr_indexing)) {
5566 indirect_mask |= nir_var_shader_in;
5567 }
5568 if (!llvm_has_working_vgpr_indexing &&
5569 nir->info.stage != MESA_SHADER_TESS_CTRL)
5570 indirect_mask |= nir_var_shader_out;
5571
5572 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5573 * smart enough to handle indirects without causing excess spilling
5574 * causing the gpu to hang.
5575 *
5576 * See the following thread for more details of the problem:
5577 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5578 */
5579 indirect_mask |= nir_var_function_temp;
5580
5581 progress |= nir_lower_indirect_derefs(nir, indirect_mask, UINT32_MAX);
5582 return progress;
5583 }
5584
5585 static unsigned
5586 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5587 {
5588 if (intrin->intrinsic != nir_intrinsic_store_output)
5589 return 0;
5590
5591 unsigned writemask = nir_intrinsic_write_mask(intrin) <<
5592 nir_intrinsic_component(intrin);
5593 unsigned location = nir_intrinsic_io_semantics(intrin).location;
5594
5595 if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5596 return writemask << 4;
5597 else if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5598 return writemask;
5599
5600 return 0;
5601 }
5602
5603 static void
5604 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5605 unsigned *cond_block_tf_writemask,
5606 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5607 {
5608 switch (cf_node->type) {
5609 case nir_cf_node_block: {
5610 nir_block *block = nir_cf_node_as_block(cf_node);
5611 nir_foreach_instr(instr, block) {
5612 if (instr->type != nir_instr_type_intrinsic)
5613 continue;
5614
5615 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5616 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5617
5618 /* If we find a barrier in nested control flow put this in the
5619 * too hard basket. In GLSL this is not possible but it is in
5620 * SPIR-V.
5621 */
5622 if (is_nested_cf) {
5623 *tessfactors_are_def_in_all_invocs = false;
5624 return;
5625 }
5626
5627 /* The following case must be prevented:
5628 * gl_TessLevelInner = ...;
5629 * barrier();
5630 * if (gl_InvocationID == 1)
5631 * gl_TessLevelInner = ...;
5632 *
5633 * If you consider disjoint code segments separated by barriers, each
5634 * such segment that writes tess factor channels should write the same
5635 * channels in all codepaths within that segment.
5636 */
5637 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5638 /* Accumulate the result: */
5639 *tessfactors_are_def_in_all_invocs &=
5640 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5641
5642 /* Analyze the next code segment from scratch. */
5643 *upper_block_tf_writemask = 0;
5644 *cond_block_tf_writemask = 0;
5645 }
5646 } else
5647 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5648 }
5649
5650 break;
5651 }
5652 case nir_cf_node_if: {
5653 unsigned then_tessfactor_writemask = 0;
5654 unsigned else_tessfactor_writemask = 0;
5655
5656 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5657 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5658 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5659 cond_block_tf_writemask,
5660 tessfactors_are_def_in_all_invocs, true);
5661 }
5662
5663 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5664 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5665 cond_block_tf_writemask,
5666 tessfactors_are_def_in_all_invocs, true);
5667 }
5668
5669 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5670 /* If both statements write the same tess factor channels,
5671 * we can say that the upper block writes them too.
5672 */
5673 *upper_block_tf_writemask |= then_tessfactor_writemask &
5674 else_tessfactor_writemask;
5675 *cond_block_tf_writemask |= then_tessfactor_writemask |
5676 else_tessfactor_writemask;
5677 }
5678
5679 break;
5680 }
5681 case nir_cf_node_loop: {
5682 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5683 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5684 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5685 cond_block_tf_writemask,
5686 tessfactors_are_def_in_all_invocs, true);
5687 }
5688
5689 break;
5690 }
5691 default:
5692 unreachable("unknown cf node type");
5693 }
5694 }
5695
5696 bool
5697 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5698 {
5699 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5700
5701 /* The pass works as follows:
5702 * If all codepaths write tess factors, we can say that all
5703 * invocations define tess factors.
5704 *
5705 * Each tess factor channel is tracked separately.
5706 */
5707 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5708 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5709
5710 /* Initial value = true. Here the pass will accumulate results from
5711 * multiple segments surrounded by barriers. If tess factors aren't
5712 * written at all, it's a shader bug and we don't care if this will be
5713 * true.
5714 */
5715 bool tessfactors_are_def_in_all_invocs = true;
5716
5717 nir_foreach_function(function, nir) {
5718 if (function->impl) {
5719 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5720 scan_tess_ctrl(node, &main_block_tf_writemask,
5721 &cond_block_tf_writemask,
5722 &tessfactors_are_def_in_all_invocs,
5723 false);
5724 }
5725 }
5726 }
5727
5728 /* Accumulate the result for the last code segment separated by a
5729 * barrier.
5730 */
5731 if (main_block_tf_writemask || cond_block_tf_writemask) {
5732 tessfactors_are_def_in_all_invocs &=
5733 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5734 }
5735
5736 return tessfactors_are_def_in_all_invocs;
5737 }