e0728822800d0fd66493792091519c9e3acc0c9f
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
174 return LLVMBuildSelect(ctx->builder, result,
175 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
176 ctx->i32_0, "");
177 }
178
179 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
180 LLVMRealPredicate pred, LLVMValueRef src0,
181 LLVMValueRef src1)
182 {
183 LLVMValueRef result;
184 src0 = ac_to_float(ctx, src0);
185 src1 = ac_to_float(ctx, src1);
186 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
187 return LLVMBuildSelect(ctx->builder, result,
188 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
189 ctx->i32_0, "");
190 }
191
192 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
193 const char *intrin,
194 LLVMTypeRef result_type,
195 LLVMValueRef src0)
196 {
197 char name[64], type[64];
198 LLVMValueRef params[] = {
199 ac_to_float(ctx, src0),
200 };
201
202 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
203 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
204 assert(length < sizeof(name));
205 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
206 }
207
208 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
209 const char *intrin,
210 LLVMTypeRef result_type,
211 LLVMValueRef src0, LLVMValueRef src1)
212 {
213 char name[64], type[64];
214 LLVMValueRef params[] = {
215 ac_to_float(ctx, src0),
216 ac_to_float(ctx, src1),
217 };
218
219 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
220 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
221 assert(length < sizeof(name));
222 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
223 }
224
225 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
226 const char *intrin,
227 LLVMTypeRef result_type,
228 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
229 {
230 char name[64], type[64];
231 LLVMValueRef params[] = {
232 ac_to_float(ctx, src0),
233 ac_to_float(ctx, src1),
234 ac_to_float(ctx, src2),
235 };
236
237 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
238 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
239 assert(length < sizeof(name));
240 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
241 }
242
243 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
244 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
245 {
246 LLVMTypeRef src1_type = LLVMTypeOf(src1);
247 LLVMTypeRef src2_type = LLVMTypeOf(src2);
248
249 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
250
251 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
252 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
253 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
254 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
255 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
256 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
257 }
258
259 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
260 ctx->i32_0, "");
261 return LLVMBuildSelect(ctx->builder, v,
262 ac_to_integer_or_pointer(ctx, src1),
263 ac_to_integer_or_pointer(ctx, src2), "");
264 }
265
266 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
267 LLVMValueRef src0)
268 {
269 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
270 }
271
272 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
273 const char *intrin,
274 LLVMValueRef src0, LLVMValueRef src1)
275 {
276 LLVMTypeRef ret_type;
277 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
278 LLVMValueRef res;
279 LLVMValueRef params[] = { src0, src1 };
280 ret_type = LLVMStructTypeInContext(ctx->context, types,
281 2, true);
282
283 res = ac_build_intrinsic(ctx, intrin, ret_type,
284 params, 2, AC_FUNC_ATTR_READNONE);
285
286 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
287 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
288 return res;
289 }
290
291 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
292 LLVMValueRef src0,
293 unsigned bitsize)
294 {
295 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
296 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
297 "");
298 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
299
300 switch (bitsize) {
301 case 16:
302 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
303 case 32:
304 return result;
305 case 64:
306 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
307 default:
308 unreachable("Unsupported bit size.");
309 }
310 }
311
312 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
313 LLVMValueRef src0)
314 {
315 src0 = ac_to_float(ctx, src0);
316 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
317 return LLVMBuildSExt(ctx->builder,
318 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
319 ctx->i32, "");
320 }
321
322 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
323 LLVMValueRef src0,
324 unsigned bitsize)
325 {
326 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
327
328 switch (bitsize) {
329 case 8:
330 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
331 case 16:
332 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
333 case 32:
334 return result;
335 case 64:
336 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
337 default:
338 unreachable("Unsupported bit size.");
339 }
340 }
341
342 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
343 LLVMValueRef src0)
344 {
345 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
346 return LLVMBuildSExt(ctx->builder,
347 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
348 ctx->i32, "");
349 }
350
351 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
352 LLVMValueRef src0)
353 {
354 LLVMValueRef result;
355 LLVMValueRef cond = NULL;
356
357 src0 = ac_to_float(ctx, src0);
358 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
359
360 if (ctx->chip_class >= GFX8) {
361 LLVMValueRef args[2];
362 /* Check if the result is a denormal - and flush to 0 if so. */
363 args[0] = result;
364 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
365 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
366 }
367
368 /* need to convert back up to f32 */
369 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
370
371 if (ctx->chip_class >= GFX8)
372 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
373 else {
374 /* for GFX6-GFX7 */
375 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
376 * so compare the result and flush to 0 if it's smaller.
377 */
378 LLVMValueRef temp, cond2;
379 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
380 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
381 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
382 temp, "");
383 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
384 temp, ctx->f32_0, "");
385 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
386 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
387 }
388 return result;
389 }
390
391 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
392 LLVMValueRef src0, LLVMValueRef src1)
393 {
394 LLVMValueRef dst64, result;
395 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
396 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
397
398 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
399 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
400 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
401 return result;
402 }
403
404 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
405 LLVMValueRef src0, LLVMValueRef src1)
406 {
407 LLVMValueRef dst64, result;
408 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
409 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
410
411 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
412 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
413 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
414 return result;
415 }
416
417 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
418 LLVMValueRef bits, LLVMValueRef offset)
419 {
420 /* mask = ((1 << bits) - 1) << offset */
421 return LLVMBuildShl(ctx->builder,
422 LLVMBuildSub(ctx->builder,
423 LLVMBuildShl(ctx->builder,
424 ctx->i32_1,
425 bits, ""),
426 ctx->i32_1, ""),
427 offset, "");
428 }
429
430 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
431 LLVMValueRef mask, LLVMValueRef insert,
432 LLVMValueRef base)
433 {
434 /* Calculate:
435 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
436 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
437 */
438 return LLVMBuildXor(ctx->builder, base,
439 LLVMBuildAnd(ctx->builder, mask,
440 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
441 }
442
443 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
444 LLVMValueRef src0,
445 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
446 LLVMValueRef args[2]))
447 {
448 LLVMValueRef comp[2];
449
450 src0 = ac_to_float(ctx, src0);
451 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
452 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
453
454 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
455 }
456
457 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
458 LLVMValueRef src0)
459 {
460 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
461 LLVMValueRef temps[2], val;
462 int i;
463
464 for (i = 0; i < 2; i++) {
465 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
466 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
467 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
468 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
469 }
470 return ac_build_gather_values(ctx, temps, 2);
471 }
472
473 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
474 nir_op op,
475 LLVMValueRef src0)
476 {
477 unsigned mask;
478 int idx;
479 LLVMValueRef result;
480
481 if (op == nir_op_fddx_fine)
482 mask = AC_TID_MASK_LEFT;
483 else if (op == nir_op_fddy_fine)
484 mask = AC_TID_MASK_TOP;
485 else
486 mask = AC_TID_MASK_TOP_LEFT;
487
488 /* for DDX we want to next X pixel, DDY next Y pixel. */
489 if (op == nir_op_fddx_fine ||
490 op == nir_op_fddx_coarse ||
491 op == nir_op_fddx)
492 idx = 1;
493 else
494 idx = 2;
495
496 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
497 return result;
498 }
499
500 struct waterfall_context {
501 LLVMBasicBlockRef phi_bb[2];
502 bool use_waterfall;
503 };
504
505 /* To deal with divergent descriptors we can create a loop that handles all
506 * lanes with the same descriptor on a given iteration (henceforth a
507 * waterfall loop).
508 *
509 * These helper create the begin and end of the loop leaving the caller
510 * to implement the body.
511 *
512 * params:
513 * - ctx is the usal nir context
514 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
515 * - value is the possibly divergent value for which we built the loop
516 * - divergent is whether value is actually divergent. If false we just pass
517 * things through.
518 */
519 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
520 struct waterfall_context *wctx,
521 LLVMValueRef value, bool divergent)
522 {
523 /* If the app claims the value is divergent but it is constant we can
524 * end up with a dynamic index of NULL. */
525 if (!value)
526 divergent = false;
527
528 wctx->use_waterfall = divergent;
529 if (!divergent)
530 return value;
531
532 ac_build_bgnloop(&ctx->ac, 6000);
533
534 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
535
536 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
537 scalar_value, "uniform_active");
538
539 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
540 ac_build_ifcc(&ctx->ac, active, 6001);
541
542 return scalar_value;
543 }
544
545 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
546 struct waterfall_context *wctx,
547 LLVMValueRef value)
548 {
549 LLVMValueRef ret = NULL;
550 LLVMValueRef phi_src[2];
551 LLVMValueRef cc_phi_src[2] = {
552 LLVMConstInt(ctx->ac.i32, 0, false),
553 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
554 };
555
556 if (!wctx->use_waterfall)
557 return value;
558
559 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
560
561 ac_build_endif(&ctx->ac, 6001);
562
563 if (value) {
564 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
565 phi_src[1] = value;
566
567 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
568 }
569
570 /*
571 * By using the optimization barrier on the exit decision, we decouple
572 * the operations from the break, and hence avoid LLVM hoisting the
573 * opteration into the break block.
574 */
575 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
576 ac_build_optimization_barrier(&ctx->ac, &cc);
577
578 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
579 ac_build_ifcc(&ctx->ac, active, 6002);
580 ac_build_break(&ctx->ac);
581 ac_build_endif(&ctx->ac, 6002);
582
583 ac_build_endloop(&ctx->ac, 6000);
584 return ret;
585 }
586
587 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
588 {
589 LLVMValueRef src[4], result = NULL;
590 unsigned num_components = instr->dest.dest.ssa.num_components;
591 unsigned src_components;
592 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
593 bool saved_inexact = false;
594
595 if (instr->exact)
596 saved_inexact = ac_disable_inexact_math(ctx->ac.builder);
597
598 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
599 switch (instr->op) {
600 case nir_op_vec2:
601 case nir_op_vec3:
602 case nir_op_vec4:
603 src_components = 1;
604 break;
605 case nir_op_pack_half_2x16:
606 case nir_op_pack_snorm_2x16:
607 case nir_op_pack_unorm_2x16:
608 src_components = 2;
609 break;
610 case nir_op_unpack_half_2x16:
611 src_components = 1;
612 break;
613 case nir_op_cube_face_coord:
614 case nir_op_cube_face_index:
615 src_components = 3;
616 break;
617 default:
618 src_components = num_components;
619 break;
620 }
621 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
622 src[i] = get_alu_src(ctx, instr->src[i], src_components);
623
624 switch (instr->op) {
625 case nir_op_mov:
626 result = src[0];
627 break;
628 case nir_op_fneg:
629 src[0] = ac_to_float(&ctx->ac, src[0]);
630 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
631 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
632 /* fneg will be optimized by backend compiler with sign
633 * bit removed via XOR. This is probably a LLVM bug.
634 */
635 result = ac_build_canonicalize(&ctx->ac, result,
636 instr->dest.dest.ssa.bit_size);
637 }
638 break;
639 case nir_op_ineg:
640 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
641 break;
642 case nir_op_inot:
643 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
644 break;
645 case nir_op_iadd:
646 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_fadd:
649 src[0] = ac_to_float(&ctx->ac, src[0]);
650 src[1] = ac_to_float(&ctx->ac, src[1]);
651 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
652 break;
653 case nir_op_fsub:
654 src[0] = ac_to_float(&ctx->ac, src[0]);
655 src[1] = ac_to_float(&ctx->ac, src[1]);
656 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
657 break;
658 case nir_op_isub:
659 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
660 break;
661 case nir_op_imul:
662 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_imod:
665 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
666 break;
667 case nir_op_umod:
668 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
669 break;
670 case nir_op_fmod:
671 /* lower_fmod only lower 16-bit and 32-bit fmod */
672 assert(instr->dest.dest.ssa.bit_size == 64);
673 src[0] = ac_to_float(&ctx->ac, src[0]);
674 src[1] = ac_to_float(&ctx->ac, src[1]);
675 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
676 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
677 ac_to_float_type(&ctx->ac, def_type), result);
678 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
679 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
680 break;
681 case nir_op_irem:
682 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
683 break;
684 case nir_op_idiv:
685 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
686 break;
687 case nir_op_udiv:
688 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
689 break;
690 case nir_op_fmul:
691 src[0] = ac_to_float(&ctx->ac, src[0]);
692 src[1] = ac_to_float(&ctx->ac, src[1]);
693 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_frcp:
696 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
697 ac_to_float_type(&ctx->ac, def_type), src[0]);
698 break;
699 case nir_op_iand:
700 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
701 break;
702 case nir_op_ior:
703 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
704 break;
705 case nir_op_ixor:
706 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
707 break;
708 case nir_op_ishl:
709 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
710 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
711 LLVMTypeOf(src[0]), "");
712 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
713 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
714 LLVMTypeOf(src[0]), "");
715 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
716 break;
717 case nir_op_ishr:
718 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
719 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
720 LLVMTypeOf(src[0]), "");
721 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
722 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
723 LLVMTypeOf(src[0]), "");
724 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
725 break;
726 case nir_op_ushr:
727 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
728 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
729 LLVMTypeOf(src[0]), "");
730 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
731 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
732 LLVMTypeOf(src[0]), "");
733 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
734 break;
735 case nir_op_ilt32:
736 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
737 break;
738 case nir_op_ine32:
739 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
740 break;
741 case nir_op_ieq32:
742 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
743 break;
744 case nir_op_ige32:
745 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
746 break;
747 case nir_op_ult32:
748 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
749 break;
750 case nir_op_uge32:
751 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
752 break;
753 case nir_op_feq32:
754 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
755 break;
756 case nir_op_fne32:
757 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
758 break;
759 case nir_op_flt32:
760 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
761 break;
762 case nir_op_fge32:
763 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
764 break;
765 case nir_op_fabs:
766 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
767 ac_to_float_type(&ctx->ac, def_type), src[0]);
768 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
769 /* fabs will be optimized by backend compiler with sign
770 * bit removed via AND.
771 */
772 result = ac_build_canonicalize(&ctx->ac, result,
773 instr->dest.dest.ssa.bit_size);
774 }
775 break;
776 case nir_op_iabs:
777 result = emit_iabs(&ctx->ac, src[0]);
778 break;
779 case nir_op_imax:
780 result = ac_build_imax(&ctx->ac, src[0], src[1]);
781 break;
782 case nir_op_imin:
783 result = ac_build_imin(&ctx->ac, src[0], src[1]);
784 break;
785 case nir_op_umax:
786 result = ac_build_umax(&ctx->ac, src[0], src[1]);
787 break;
788 case nir_op_umin:
789 result = ac_build_umin(&ctx->ac, src[0], src[1]);
790 break;
791 case nir_op_isign:
792 result = ac_build_isign(&ctx->ac, src[0],
793 instr->dest.dest.ssa.bit_size);
794 break;
795 case nir_op_fsign:
796 src[0] = ac_to_float(&ctx->ac, src[0]);
797 result = ac_build_fsign(&ctx->ac, src[0],
798 instr->dest.dest.ssa.bit_size);
799 break;
800 case nir_op_ffloor:
801 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
802 ac_to_float_type(&ctx->ac, def_type), src[0]);
803 break;
804 case nir_op_ftrunc:
805 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
806 ac_to_float_type(&ctx->ac, def_type), src[0]);
807 break;
808 case nir_op_fceil:
809 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
810 ac_to_float_type(&ctx->ac, def_type), src[0]);
811 break;
812 case nir_op_fround_even:
813 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
814 ac_to_float_type(&ctx->ac, def_type),src[0]);
815 break;
816 case nir_op_ffract:
817 src[0] = ac_to_float(&ctx->ac, src[0]);
818 result = ac_build_fract(&ctx->ac, src[0],
819 instr->dest.dest.ssa.bit_size);
820 break;
821 case nir_op_fsin:
822 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
823 ac_to_float_type(&ctx->ac, def_type), src[0]);
824 break;
825 case nir_op_fcos:
826 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
827 ac_to_float_type(&ctx->ac, def_type), src[0]);
828 break;
829 case nir_op_fsqrt:
830 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
831 ac_to_float_type(&ctx->ac, def_type), src[0]);
832 break;
833 case nir_op_fexp2:
834 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
835 ac_to_float_type(&ctx->ac, def_type), src[0]);
836 break;
837 case nir_op_flog2:
838 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
839 ac_to_float_type(&ctx->ac, def_type), src[0]);
840 break;
841 case nir_op_frsq:
842 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
843 ac_to_float_type(&ctx->ac, def_type), src[0]);
844 break;
845 case nir_op_frexp_exp:
846 src[0] = ac_to_float(&ctx->ac, src[0]);
847 result = ac_build_frexp_exp(&ctx->ac, src[0],
848 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
849 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
850 result = LLVMBuildSExt(ctx->ac.builder, result,
851 ctx->ac.i32, "");
852 break;
853 case nir_op_frexp_sig:
854 src[0] = ac_to_float(&ctx->ac, src[0]);
855 result = ac_build_frexp_mant(&ctx->ac, src[0],
856 instr->dest.dest.ssa.bit_size);
857 break;
858 case nir_op_fpow:
859 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
860 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
861 break;
862 case nir_op_fmax:
863 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
864 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
865 if (ctx->ac.chip_class < GFX9 &&
866 instr->dest.dest.ssa.bit_size == 32) {
867 /* Only pre-GFX9 chips do not flush denorms. */
868 result = ac_build_canonicalize(&ctx->ac, result,
869 instr->dest.dest.ssa.bit_size);
870 }
871 break;
872 case nir_op_fmin:
873 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
874 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
875 if (ctx->ac.chip_class < GFX9 &&
876 instr->dest.dest.ssa.bit_size == 32) {
877 /* Only pre-GFX9 chips do not flush denorms. */
878 result = ac_build_canonicalize(&ctx->ac, result,
879 instr->dest.dest.ssa.bit_size);
880 }
881 break;
882 case nir_op_ffma:
883 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
884 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
885 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
886 break;
887 case nir_op_ldexp:
888 src[0] = ac_to_float(&ctx->ac, src[0]);
889 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
890 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
891 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
892 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
893 else
894 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
895 break;
896 case nir_op_bfm:
897 result = emit_bfm(&ctx->ac, src[0], src[1]);
898 break;
899 case nir_op_bitfield_select:
900 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
901 break;
902 case nir_op_ubfe:
903 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
904 break;
905 case nir_op_ibfe:
906 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
907 break;
908 case nir_op_bitfield_reverse:
909 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
910 break;
911 case nir_op_bit_count:
912 result = ac_build_bit_count(&ctx->ac, src[0]);
913 break;
914 case nir_op_vec2:
915 case nir_op_vec3:
916 case nir_op_vec4:
917 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
918 src[i] = ac_to_integer(&ctx->ac, src[i]);
919 result = ac_build_gather_values(&ctx->ac, src, num_components);
920 break;
921 case nir_op_f2i8:
922 case nir_op_f2i16:
923 case nir_op_f2i32:
924 case nir_op_f2i64:
925 src[0] = ac_to_float(&ctx->ac, src[0]);
926 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
927 break;
928 case nir_op_f2u8:
929 case nir_op_f2u16:
930 case nir_op_f2u32:
931 case nir_op_f2u64:
932 src[0] = ac_to_float(&ctx->ac, src[0]);
933 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
934 break;
935 case nir_op_i2f16:
936 case nir_op_i2f32:
937 case nir_op_i2f64:
938 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
939 break;
940 case nir_op_u2f16:
941 case nir_op_u2f32:
942 case nir_op_u2f64:
943 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
944 break;
945 case nir_op_f2f16_rtz:
946 src[0] = ac_to_float(&ctx->ac, src[0]);
947 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
948 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
949 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
950 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
951 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
952 break;
953 case nir_op_f2f16_rtne:
954 case nir_op_f2f16:
955 case nir_op_f2f32:
956 case nir_op_f2f64:
957 src[0] = ac_to_float(&ctx->ac, src[0]);
958 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
959 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
960 else
961 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
962 break;
963 case nir_op_u2u8:
964 case nir_op_u2u16:
965 case nir_op_u2u32:
966 case nir_op_u2u64:
967 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
968 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
969 else
970 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
971 break;
972 case nir_op_i2i8:
973 case nir_op_i2i16:
974 case nir_op_i2i32:
975 case nir_op_i2i64:
976 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
977 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
978 else
979 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
980 break;
981 case nir_op_b32csel:
982 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
983 break;
984 case nir_op_find_lsb:
985 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
986 break;
987 case nir_op_ufind_msb:
988 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
989 break;
990 case nir_op_ifind_msb:
991 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
992 break;
993 case nir_op_uadd_carry:
994 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
995 break;
996 case nir_op_usub_borrow:
997 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
998 break;
999 case nir_op_b2f16:
1000 case nir_op_b2f32:
1001 case nir_op_b2f64:
1002 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1003 break;
1004 case nir_op_f2b32:
1005 result = emit_f2b(&ctx->ac, src[0]);
1006 break;
1007 case nir_op_b2i8:
1008 case nir_op_b2i16:
1009 case nir_op_b2i32:
1010 case nir_op_b2i64:
1011 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1012 break;
1013 case nir_op_i2b32:
1014 result = emit_i2b(&ctx->ac, src[0]);
1015 break;
1016 case nir_op_fquantize2f16:
1017 result = emit_f2f16(&ctx->ac, src[0]);
1018 break;
1019 case nir_op_umul_high:
1020 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1021 break;
1022 case nir_op_imul_high:
1023 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1024 break;
1025 case nir_op_pack_half_2x16:
1026 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1027 break;
1028 case nir_op_pack_snorm_2x16:
1029 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1030 break;
1031 case nir_op_pack_unorm_2x16:
1032 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1033 break;
1034 case nir_op_unpack_half_2x16:
1035 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1036 break;
1037 case nir_op_fddx:
1038 case nir_op_fddy:
1039 case nir_op_fddx_fine:
1040 case nir_op_fddy_fine:
1041 case nir_op_fddx_coarse:
1042 case nir_op_fddy_coarse:
1043 result = emit_ddxy(ctx, instr->op, src[0]);
1044 break;
1045
1046 case nir_op_unpack_64_2x32_split_x: {
1047 assert(ac_get_llvm_num_components(src[0]) == 1);
1048 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1049 ctx->ac.v2i32,
1050 "");
1051 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1052 ctx->ac.i32_0, "");
1053 break;
1054 }
1055
1056 case nir_op_unpack_64_2x32_split_y: {
1057 assert(ac_get_llvm_num_components(src[0]) == 1);
1058 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1059 ctx->ac.v2i32,
1060 "");
1061 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1062 ctx->ac.i32_1, "");
1063 break;
1064 }
1065
1066 case nir_op_pack_64_2x32_split: {
1067 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1068 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1069 break;
1070 }
1071
1072 case nir_op_pack_32_2x16_split: {
1073 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1074 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1075 break;
1076 }
1077
1078 case nir_op_unpack_32_2x16_split_x: {
1079 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1080 ctx->ac.v2i16,
1081 "");
1082 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1083 ctx->ac.i32_0, "");
1084 break;
1085 }
1086
1087 case nir_op_unpack_32_2x16_split_y: {
1088 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1089 ctx->ac.v2i16,
1090 "");
1091 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1092 ctx->ac.i32_1, "");
1093 break;
1094 }
1095
1096 case nir_op_cube_face_coord: {
1097 src[0] = ac_to_float(&ctx->ac, src[0]);
1098 LLVMValueRef results[2];
1099 LLVMValueRef in[3];
1100 for (unsigned chan = 0; chan < 3; chan++)
1101 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1102 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1103 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1104 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1105 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1106 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1107 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1108 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1109 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1110 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1111 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1112 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1113 result = ac_build_gather_values(&ctx->ac, results, 2);
1114 break;
1115 }
1116
1117 case nir_op_cube_face_index: {
1118 src[0] = ac_to_float(&ctx->ac, src[0]);
1119 LLVMValueRef in[3];
1120 for (unsigned chan = 0; chan < 3; chan++)
1121 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1122 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1123 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1124 break;
1125 }
1126
1127 case nir_op_fmin3:
1128 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1129 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1130 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1131 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1132 break;
1133 case nir_op_umin3:
1134 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1135 result = ac_build_umin(&ctx->ac, result, src[2]);
1136 break;
1137 case nir_op_imin3:
1138 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1139 result = ac_build_imin(&ctx->ac, result, src[2]);
1140 break;
1141 case nir_op_fmax3:
1142 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1143 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1144 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1145 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1146 break;
1147 case nir_op_umax3:
1148 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1149 result = ac_build_umax(&ctx->ac, result, src[2]);
1150 break;
1151 case nir_op_imax3:
1152 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1153 result = ac_build_imax(&ctx->ac, result, src[2]);
1154 break;
1155 case nir_op_fmed3: {
1156 src[0] = ac_to_float(&ctx->ac, src[0]);
1157 src[1] = ac_to_float(&ctx->ac, src[1]);
1158 src[2] = ac_to_float(&ctx->ac, src[2]);
1159 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1160 instr->dest.dest.ssa.bit_size);
1161 break;
1162 }
1163 case nir_op_imed3: {
1164 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1165 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1166 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1167 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1168 break;
1169 }
1170 case nir_op_umed3: {
1171 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1172 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1173 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1174 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1175 break;
1176 }
1177
1178 default:
1179 fprintf(stderr, "Unknown NIR alu instr: ");
1180 nir_print_instr(&instr->instr, stderr);
1181 fprintf(stderr, "\n");
1182 abort();
1183 }
1184
1185 if (result) {
1186 assert(instr->dest.dest.is_ssa);
1187 result = ac_to_integer_or_pointer(&ctx->ac, result);
1188 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1189 }
1190
1191 if (instr->exact)
1192 ac_restore_inexact_math(ctx->ac.builder, saved_inexact);
1193 }
1194
1195 static void visit_load_const(struct ac_nir_context *ctx,
1196 const nir_load_const_instr *instr)
1197 {
1198 LLVMValueRef values[4], value = NULL;
1199 LLVMTypeRef element_type =
1200 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1201
1202 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1203 switch (instr->def.bit_size) {
1204 case 8:
1205 values[i] = LLVMConstInt(element_type,
1206 instr->value[i].u8, false);
1207 break;
1208 case 16:
1209 values[i] = LLVMConstInt(element_type,
1210 instr->value[i].u16, false);
1211 break;
1212 case 32:
1213 values[i] = LLVMConstInt(element_type,
1214 instr->value[i].u32, false);
1215 break;
1216 case 64:
1217 values[i] = LLVMConstInt(element_type,
1218 instr->value[i].u64, false);
1219 break;
1220 default:
1221 fprintf(stderr,
1222 "unsupported nir load_const bit_size: %d\n",
1223 instr->def.bit_size);
1224 abort();
1225 }
1226 }
1227 if (instr->def.num_components > 1) {
1228 value = LLVMConstVector(values, instr->def.num_components);
1229 } else
1230 value = values[0];
1231
1232 ctx->ssa_defs[instr->def.index] = value;
1233 }
1234
1235 static LLVMValueRef
1236 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1237 {
1238 LLVMValueRef size =
1239 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1240 LLVMConstInt(ctx->ac.i32, 2, false), "");
1241
1242 /* GFX8 only */
1243 if (ctx->ac.chip_class == GFX8 && in_elements) {
1244 /* On GFX8, the descriptor contains the size in bytes,
1245 * but TXQ must return the size in elements.
1246 * The stride is always non-zero for resources using TXQ.
1247 */
1248 LLVMValueRef stride =
1249 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1250 ctx->ac.i32_1, "");
1251 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1252 LLVMConstInt(ctx->ac.i32, 16, false), "");
1253 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1254 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1255
1256 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1257 }
1258 return size;
1259 }
1260
1261 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1262 * incorrectly forces nearest filtering if the texture format is integer.
1263 * The only effect it has on Gather4, which always returns 4 texels for
1264 * bilinear filtering, is that the final coordinates are off by 0.5 of
1265 * the texel size.
1266 *
1267 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1268 * or (0.5 / size) from the normalized coordinates.
1269 *
1270 * However, cube textures with 8_8_8_8 data formats require a different
1271 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1272 * precision in 32-bit data formats, so it needs to be applied dynamically at
1273 * runtime. In this case, return an i1 value that indicates whether the
1274 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1275 */
1276 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1277 nir_variable *var,
1278 struct ac_image_args *args,
1279 const nir_tex_instr *instr)
1280 {
1281 const struct glsl_type *type = glsl_without_array(var->type);
1282 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1283 LLVMValueRef wa_8888 = NULL;
1284 LLVMValueRef half_texel[2];
1285 LLVMValueRef result;
1286
1287 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1288
1289 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1290 LLVMValueRef formats;
1291 LLVMValueRef data_format;
1292 LLVMValueRef wa_formats;
1293
1294 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1295
1296 data_format = LLVMBuildLShr(ctx->builder, formats,
1297 LLVMConstInt(ctx->i32, 20, false), "");
1298 data_format = LLVMBuildAnd(ctx->builder, data_format,
1299 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1300 wa_8888 = LLVMBuildICmp(
1301 ctx->builder, LLVMIntEQ, data_format,
1302 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1303 "");
1304
1305 uint32_t wa_num_format =
1306 stype == GLSL_TYPE_UINT ?
1307 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1308 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1309 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1310 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1311 "");
1312 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1313 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1314
1315 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1316 args->resource = LLVMBuildInsertElement(
1317 ctx->builder, args->resource, formats, ctx->i32_1, "");
1318 }
1319
1320 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1321 assert(!wa_8888);
1322 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1323 } else {
1324 struct ac_image_args resinfo = {};
1325 LLVMBasicBlockRef bbs[2];
1326
1327 LLVMValueRef unnorm = NULL;
1328 LLVMValueRef default_offset = ctx->f32_0;
1329 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1330 !instr->is_array) {
1331 /* In vulkan, whether the sampler uses unnormalized
1332 * coordinates or not is a dynamic property of the
1333 * sampler. Hence, to figure out whether or not we
1334 * need to divide by the texture size, we need to test
1335 * the sampler at runtime. This tests the bit set by
1336 * radv_init_sampler().
1337 */
1338 LLVMValueRef sampler0 =
1339 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1340 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1341 LLVMConstInt(ctx->i32, 15, false), "");
1342 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1343 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1344 default_offset = LLVMConstReal(ctx->f32, -0.5);
1345 }
1346
1347 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1348 if (wa_8888 || unnorm) {
1349 assert(!(wa_8888 && unnorm));
1350 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1351 /* Skip the texture size query entirely if we don't need it. */
1352 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1353 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1354 }
1355
1356 /* Query the texture size. */
1357 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1358 resinfo.opcode = ac_image_get_resinfo;
1359 resinfo.dmask = 0xf;
1360 resinfo.lod = ctx->i32_0;
1361 resinfo.resource = args->resource;
1362 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1363 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1364
1365 /* Compute -0.5 / size. */
1366 for (unsigned c = 0; c < 2; c++) {
1367 half_texel[c] =
1368 LLVMBuildExtractElement(ctx->builder, size,
1369 LLVMConstInt(ctx->i32, c, 0), "");
1370 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1371 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1372 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1373 LLVMConstReal(ctx->f32, -0.5), "");
1374 }
1375
1376 if (wa_8888 || unnorm) {
1377 ac_build_endif(ctx, 2000);
1378
1379 for (unsigned c = 0; c < 2; c++) {
1380 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1381 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1382 values, bbs);
1383 }
1384 }
1385 }
1386
1387 for (unsigned c = 0; c < 2; c++) {
1388 LLVMValueRef tmp;
1389 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1390 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1391 }
1392
1393 args->attributes = AC_FUNC_ATTR_READNONE;
1394 result = ac_build_image_opcode(ctx, args);
1395
1396 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1397 LLVMValueRef tmp, tmp2;
1398
1399 /* if the cube workaround is in place, f2i the result. */
1400 for (unsigned c = 0; c < 4; c++) {
1401 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1402 if (stype == GLSL_TYPE_UINT)
1403 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1404 else
1405 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1406 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1407 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1408 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1409 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1410 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1411 }
1412 }
1413 return result;
1414 }
1415
1416 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1417 {
1418 nir_deref_instr *texture_deref_instr = NULL;
1419
1420 for (unsigned i = 0; i < instr->num_srcs; i++) {
1421 switch (instr->src[i].src_type) {
1422 case nir_tex_src_texture_deref:
1423 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1424 break;
1425 default:
1426 break;
1427 }
1428 }
1429 return texture_deref_instr;
1430 }
1431
1432 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1433 const nir_tex_instr *instr,
1434 struct ac_image_args *args)
1435 {
1436 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1437 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1438
1439 return ac_build_buffer_load_format(&ctx->ac,
1440 args->resource,
1441 args->coords[0],
1442 ctx->ac.i32_0,
1443 util_last_bit(mask),
1444 0, true);
1445 }
1446
1447 args->opcode = ac_image_sample;
1448
1449 switch (instr->op) {
1450 case nir_texop_txf:
1451 case nir_texop_txf_ms:
1452 case nir_texop_samples_identical:
1453 args->opcode = args->level_zero ||
1454 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1455 ac_image_load : ac_image_load_mip;
1456 args->level_zero = false;
1457 break;
1458 case nir_texop_txs:
1459 case nir_texop_query_levels:
1460 args->opcode = ac_image_get_resinfo;
1461 if (!args->lod)
1462 args->lod = ctx->ac.i32_0;
1463 args->level_zero = false;
1464 break;
1465 case nir_texop_tex:
1466 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1467 assert(!args->lod);
1468 args->level_zero = true;
1469 }
1470 break;
1471 case nir_texop_tg4:
1472 args->opcode = ac_image_gather4;
1473 if (!args->lod && !args->bias)
1474 args->level_zero = true;
1475 break;
1476 case nir_texop_lod:
1477 args->opcode = ac_image_get_lod;
1478 break;
1479 case nir_texop_fragment_fetch:
1480 case nir_texop_fragment_mask_fetch:
1481 args->opcode = ac_image_load;
1482 args->level_zero = false;
1483 break;
1484 default:
1485 break;
1486 }
1487
1488 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1489 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1490 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1491 const struct glsl_type *type = glsl_without_array(var->type);
1492 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1493 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1494 return lower_gather4_integer(&ctx->ac, var, args, instr);
1495 }
1496 }
1497
1498 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1499 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1500 if ((args->dim == ac_image_2darray ||
1501 args->dim == ac_image_2d) && !args->coords[1]) {
1502 args->coords[1] = ctx->ac.i32_0;
1503 }
1504 }
1505
1506 args->attributes = AC_FUNC_ATTR_READNONE;
1507 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1508 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1509 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1510 /* Prevent texture instructions with implicit derivatives from being
1511 * sinked into branches. */
1512 switch (instr->op) {
1513 case nir_texop_tex:
1514 case nir_texop_txb:
1515 case nir_texop_lod:
1516 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1517 break;
1518 default:
1519 break;
1520 }
1521 }
1522
1523 return ac_build_image_opcode(&ctx->ac, args);
1524 }
1525
1526 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1527 nir_intrinsic_instr *instr)
1528 {
1529 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1530 LLVMValueRef index = get_src(ctx, instr->src[1]);
1531
1532 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1533 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1534 return result;
1535 }
1536
1537 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1538 nir_intrinsic_instr *instr)
1539 {
1540 LLVMValueRef ptr, addr;
1541 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1542 unsigned index = nir_intrinsic_base(instr);
1543
1544 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1545 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1546
1547 /* Load constant values from user SGPRS when possible, otherwise
1548 * fallback to the default path that loads directly from memory.
1549 */
1550 if (LLVMIsConstant(src0) &&
1551 instr->dest.ssa.bit_size == 32) {
1552 unsigned count = instr->dest.ssa.num_components;
1553 unsigned offset = index;
1554
1555 offset += LLVMConstIntGetZExtValue(src0);
1556 offset /= 4;
1557
1558 offset -= ctx->args->base_inline_push_consts;
1559
1560 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1561 if (offset + count <= num_inline_push_consts) {
1562 LLVMValueRef push_constants[num_inline_push_consts];
1563 for (unsigned i = 0; i < num_inline_push_consts; i++)
1564 push_constants[i] = ac_get_arg(&ctx->ac,
1565 ctx->args->inline_push_consts[i]);
1566 return ac_build_gather_values(&ctx->ac,
1567 push_constants + offset,
1568 count);
1569 }
1570 }
1571
1572 ptr = LLVMBuildGEP(ctx->ac.builder,
1573 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1574
1575 if (instr->dest.ssa.bit_size == 8) {
1576 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1577 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1578 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1579 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1580
1581 LLVMValueRef params[3];
1582 if (load_dwords > 1) {
1583 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1584 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1585 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1586 } else {
1587 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1588 params[0] = ctx->ac.i32_0;
1589 params[1] = res;
1590 }
1591 params[2] = addr;
1592 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1593
1594 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1595 if (instr->dest.ssa.num_components > 1)
1596 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1597 return res;
1598 } else if (instr->dest.ssa.bit_size == 16) {
1599 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1600 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1601 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1602 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1603 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1604 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1605 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1606 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1607 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1608 LLVMConstInt(ctx->ac.i32, 4, false)};
1609 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1610 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1611 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1612 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1613 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1614 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1615 }
1616
1617 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1618
1619 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1620 }
1621
1622 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1623 const nir_intrinsic_instr *instr)
1624 {
1625 LLVMValueRef index = get_src(ctx, instr->src[0]);
1626
1627 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1628 }
1629
1630 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1631 {
1632 uint32_t new_mask = 0;
1633 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1634 if (mask & (1u << i))
1635 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1636 return new_mask;
1637 }
1638
1639 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1640 unsigned start, unsigned count)
1641 {
1642 LLVMValueRef mask[] = {
1643 ctx->i32_0, ctx->i32_1,
1644 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1645
1646 unsigned src_elements = ac_get_llvm_num_components(src);
1647
1648 if (count == src_elements) {
1649 assert(start == 0);
1650 return src;
1651 } else if (count == 1) {
1652 assert(start < src_elements);
1653 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1654 } else {
1655 assert(start + count <= src_elements);
1656 assert(count <= 4);
1657 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1658 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1659 }
1660 }
1661
1662 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1663 enum gl_access_qualifier access,
1664 bool may_store_unaligned,
1665 bool writeonly_memory)
1666 {
1667 unsigned cache_policy = 0;
1668
1669 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1670 * store opcodes not aligned to a dword are affected. The only way to
1671 * get unaligned stores is through shader images.
1672 */
1673 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1674 /* If this is write-only, don't keep data in L1 to prevent
1675 * evicting L1 cache lines that may be needed by other
1676 * instructions.
1677 */
1678 writeonly_memory ||
1679 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1680 cache_policy |= ac_glc;
1681 }
1682
1683 if (access & ACCESS_STREAM_CACHE_POLICY)
1684 cache_policy |= ac_slc | ac_glc;
1685
1686 return cache_policy;
1687 }
1688
1689 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1690 struct waterfall_context *wctx,
1691 const nir_intrinsic_instr *instr,
1692 nir_src src)
1693 {
1694 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1695 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1696 }
1697
1698 static void visit_store_ssbo(struct ac_nir_context *ctx,
1699 nir_intrinsic_instr *instr)
1700 {
1701 if (ctx->ac.postponed_kill) {
1702 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1703 ctx->ac.postponed_kill, "");
1704 ac_build_ifcc(&ctx->ac, cond, 7000);
1705 }
1706
1707 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1708 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1709 unsigned writemask = nir_intrinsic_write_mask(instr);
1710 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1711 bool writeonly_memory = access & ACCESS_NON_READABLE;
1712 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1713
1714 struct waterfall_context wctx;
1715 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1716
1717 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1718 LLVMValueRef base_data = src_data;
1719 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1720 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1721
1722 while (writemask) {
1723 int start, count;
1724 LLVMValueRef data, offset;
1725 LLVMTypeRef data_type;
1726
1727 u_bit_scan_consecutive_range(&writemask, &start, &count);
1728
1729 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1730 * writes into a 2-element and a 1-element write. */
1731 if (count == 3 &&
1732 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1733 writemask |= 1 << (start + 2);
1734 count = 2;
1735 }
1736 int num_bytes = count * elem_size_bytes; /* count in bytes */
1737
1738 /* we can only store 4 DWords at the same time.
1739 * can only happen for 64 Bit vectors. */
1740 if (num_bytes > 16) {
1741 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1742 count = 2;
1743 num_bytes = 16;
1744 }
1745
1746 /* check alignment of 16 Bit stores */
1747 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1748 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1749 count = 1;
1750 num_bytes = 2;
1751 }
1752
1753 /* Due to alignment issues, split stores of 8-bit/16-bit
1754 * vectors.
1755 */
1756 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1757 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1758 count = 1;
1759 num_bytes = elem_size_bytes;
1760 }
1761
1762 data = extract_vector_range(&ctx->ac, base_data, start, count);
1763
1764 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1765 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1766
1767 if (num_bytes == 1) {
1768 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1769 offset, ctx->ac.i32_0,
1770 cache_policy);
1771 } else if (num_bytes == 2) {
1772 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1773 offset, ctx->ac.i32_0,
1774 cache_policy);
1775 } else {
1776 int num_channels = num_bytes / 4;
1777
1778 switch (num_bytes) {
1779 case 16: /* v4f32 */
1780 data_type = ctx->ac.v4f32;
1781 break;
1782 case 12: /* v3f32 */
1783 data_type = ctx->ac.v3f32;
1784 break;
1785 case 8: /* v2f32 */
1786 data_type = ctx->ac.v2f32;
1787 break;
1788 case 4: /* f32 */
1789 data_type = ctx->ac.f32;
1790 break;
1791 default:
1792 unreachable("Malformed vector store.");
1793 }
1794 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1795
1796 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1797 num_channels, offset,
1798 ctx->ac.i32_0, 0,
1799 cache_policy);
1800 }
1801 }
1802
1803 exit_waterfall(ctx, &wctx, NULL);
1804
1805 if (ctx->ac.postponed_kill)
1806 ac_build_endif(&ctx->ac, 7000);
1807 }
1808
1809 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1810 LLVMValueRef descriptor,
1811 LLVMValueRef offset,
1812 LLVMValueRef compare,
1813 LLVMValueRef exchange)
1814 {
1815 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1816 if (ctx->abi->robust_buffer_access) {
1817 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1818
1819 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1820 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1821
1822 ac_build_ifcc(&ctx->ac, cond, -1);
1823
1824 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1825 }
1826
1827 LLVMValueRef ptr_parts[2] = {
1828 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1829 LLVMBuildAnd(ctx->ac.builder,
1830 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1831 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1832 };
1833
1834 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1835 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1836
1837 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1838
1839 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1840 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1841 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1842 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1843
1844 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1845 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1846
1847 if (ctx->abi->robust_buffer_access) {
1848 ac_build_endif(&ctx->ac, -1);
1849
1850 LLVMBasicBlockRef incoming_blocks[2] = {
1851 start_block,
1852 then_block,
1853 };
1854
1855 LLVMValueRef incoming_values[2] = {
1856 LLVMConstInt(ctx->ac.i64, 0, 0),
1857 result,
1858 };
1859 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1860 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1861 return ret;
1862 } else {
1863 return result;
1864 }
1865 }
1866
1867 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1868 nir_intrinsic_instr *instr)
1869 {
1870 if (ctx->ac.postponed_kill) {
1871 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1872 ctx->ac.postponed_kill, "");
1873 ac_build_ifcc(&ctx->ac, cond, 7001);
1874 }
1875
1876 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1877 const char *op;
1878 char name[64], type[8];
1879 LLVMValueRef params[6], descriptor;
1880 LLVMValueRef result;
1881 int arg_count = 0;
1882
1883 struct waterfall_context wctx;
1884 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1885
1886 switch (instr->intrinsic) {
1887 case nir_intrinsic_ssbo_atomic_add:
1888 op = "add";
1889 break;
1890 case nir_intrinsic_ssbo_atomic_imin:
1891 op = "smin";
1892 break;
1893 case nir_intrinsic_ssbo_atomic_umin:
1894 op = "umin";
1895 break;
1896 case nir_intrinsic_ssbo_atomic_imax:
1897 op = "smax";
1898 break;
1899 case nir_intrinsic_ssbo_atomic_umax:
1900 op = "umax";
1901 break;
1902 case nir_intrinsic_ssbo_atomic_and:
1903 op = "and";
1904 break;
1905 case nir_intrinsic_ssbo_atomic_or:
1906 op = "or";
1907 break;
1908 case nir_intrinsic_ssbo_atomic_xor:
1909 op = "xor";
1910 break;
1911 case nir_intrinsic_ssbo_atomic_exchange:
1912 op = "swap";
1913 break;
1914 case nir_intrinsic_ssbo_atomic_comp_swap:
1915 op = "cmpswap";
1916 break;
1917 default:
1918 abort();
1919 }
1920
1921 descriptor = ctx->abi->load_ssbo(ctx->abi,
1922 rsrc_base,
1923 true);
1924
1925 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1926 return_type == ctx->ac.i64) {
1927 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1928 get_src(ctx, instr->src[1]),
1929 get_src(ctx, instr->src[2]),
1930 get_src(ctx, instr->src[3]));
1931 } else {
1932 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1933 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1934 }
1935 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1936 params[arg_count++] = descriptor;
1937
1938 if (LLVM_VERSION_MAJOR >= 9) {
1939 /* XXX: The new raw/struct atomic intrinsics are buggy with
1940 * LLVM 8, see r358579.
1941 */
1942 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1943 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1944 params[arg_count++] = ctx->ac.i32_0; /* slc */
1945
1946 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1947 snprintf(name, sizeof(name),
1948 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1949 } else {
1950 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1951 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1952 params[arg_count++] = ctx->ac.i1false; /* slc */
1953
1954 assert(return_type == ctx->ac.i32);
1955 snprintf(name, sizeof(name),
1956 "llvm.amdgcn.buffer.atomic.%s", op);
1957 }
1958
1959 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1960 arg_count, 0);
1961 }
1962
1963 result = exit_waterfall(ctx, &wctx, result);
1964 if (ctx->ac.postponed_kill)
1965 ac_build_endif(&ctx->ac, 7001);
1966 return result;
1967 }
1968
1969 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1970 nir_intrinsic_instr *instr)
1971 {
1972 struct waterfall_context wctx;
1973 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1974
1975 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1976 int num_components = instr->num_components;
1977 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1978 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1979
1980 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1981 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1982 LLVMValueRef vindex = ctx->ac.i32_0;
1983
1984 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1985 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1986
1987 LLVMValueRef results[4];
1988 for (int i = 0; i < num_components;) {
1989 int num_elems = num_components - i;
1990 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1991 num_elems = 1;
1992 if (num_elems * elem_size_bytes > 16)
1993 num_elems = 16 / elem_size_bytes;
1994 int load_bytes = num_elems * elem_size_bytes;
1995
1996 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1997
1998 LLVMValueRef ret;
1999
2000 if (load_bytes == 1) {
2001 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2002 rsrc,
2003 offset,
2004 ctx->ac.i32_0,
2005 immoffset,
2006 cache_policy);
2007 } else if (load_bytes == 2) {
2008 ret = ac_build_tbuffer_load_short(&ctx->ac,
2009 rsrc,
2010 offset,
2011 ctx->ac.i32_0,
2012 immoffset,
2013 cache_policy);
2014 } else {
2015 int num_channels = util_next_power_of_two(load_bytes) / 4;
2016 bool can_speculate = access & ACCESS_CAN_REORDER;
2017
2018 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2019 vindex, offset, immoffset, 0,
2020 cache_policy, can_speculate, false);
2021 }
2022
2023 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2024 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2025 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2026
2027 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2028 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2029
2030 for (unsigned j = 0; j < num_elems; j++) {
2031 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2032 }
2033 i += num_elems;
2034 }
2035
2036 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2037 return exit_waterfall(ctx, &wctx, ret);
2038 }
2039
2040 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2041 struct waterfall_context *wctx,
2042 const nir_intrinsic_instr *instr)
2043 {
2044 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2045 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2046 }
2047
2048 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2049 nir_intrinsic_instr *instr)
2050 {
2051 struct waterfall_context wctx;
2052 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2053
2054 LLVMValueRef ret;
2055 LLVMValueRef rsrc = rsrc_base;
2056 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2057 int num_components = instr->num_components;
2058
2059 if (ctx->abi->load_ubo)
2060 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2061
2062 if (instr->dest.ssa.bit_size == 64)
2063 num_components *= 2;
2064
2065 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2066 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2067 LLVMValueRef results[num_components];
2068 for (unsigned i = 0; i < num_components; ++i) {
2069 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2070 load_bytes * i, 0);
2071
2072 if (load_bytes == 1) {
2073 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2074 rsrc,
2075 offset,
2076 ctx->ac.i32_0,
2077 immoffset,
2078 0);
2079 } else {
2080 assert(load_bytes == 2);
2081 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2082 rsrc,
2083 offset,
2084 ctx->ac.i32_0,
2085 immoffset,
2086 0);
2087 }
2088 }
2089 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2090 } else {
2091 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2092 NULL, 0, 0, true, true);
2093
2094 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2095 }
2096
2097 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2098 get_def_type(ctx, &instr->dest.ssa), "");
2099
2100 return exit_waterfall(ctx, &wctx, ret);
2101 }
2102
2103 static void
2104 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2105 bool vs_in, unsigned *vertex_index_out,
2106 LLVMValueRef *vertex_index_ref,
2107 unsigned *const_out, LLVMValueRef *indir_out)
2108 {
2109 nir_variable *var = nir_deref_instr_get_variable(instr);
2110 nir_deref_path path;
2111 unsigned idx_lvl = 1;
2112
2113 nir_deref_path_init(&path, instr, NULL);
2114
2115 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2116 if (vertex_index_ref) {
2117 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2118 if (vertex_index_out)
2119 *vertex_index_out = 0;
2120 } else {
2121 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2122 }
2123 ++idx_lvl;
2124 }
2125
2126 uint32_t const_offset = 0;
2127 LLVMValueRef offset = NULL;
2128
2129 if (var->data.compact) {
2130 assert(instr->deref_type == nir_deref_type_array);
2131 const_offset = nir_src_as_uint(instr->arr.index);
2132 goto out;
2133 }
2134
2135 for (; path.path[idx_lvl]; ++idx_lvl) {
2136 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2137 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2138 unsigned index = path.path[idx_lvl]->strct.index;
2139
2140 for (unsigned i = 0; i < index; i++) {
2141 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2142 const_offset += glsl_count_attribute_slots(ft, vs_in);
2143 }
2144 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2145 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2146 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2147 const_offset += size *
2148 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2149 } else {
2150 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2151 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2152 if (offset)
2153 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2154 else
2155 offset = array_off;
2156 }
2157 } else
2158 unreachable("Uhandled deref type in get_deref_instr_offset");
2159 }
2160
2161 out:
2162 nir_deref_path_finish(&path);
2163
2164 if (const_offset && offset)
2165 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2166 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2167 "");
2168
2169 *const_out = const_offset;
2170 *indir_out = offset;
2171 }
2172
2173 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2174 nir_intrinsic_instr *instr,
2175 bool load_inputs)
2176 {
2177 LLVMValueRef result;
2178 LLVMValueRef vertex_index = NULL;
2179 LLVMValueRef indir_index = NULL;
2180 unsigned const_index = 0;
2181
2182 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2183
2184 unsigned location = var->data.location;
2185 unsigned driver_location = var->data.driver_location;
2186 const bool is_patch = var->data.patch ||
2187 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2188 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2189 const bool is_compact = var->data.compact;
2190
2191 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2192 false, NULL, is_patch ? NULL : &vertex_index,
2193 &const_index, &indir_index);
2194
2195 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2196
2197 LLVMTypeRef src_component_type;
2198 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2199 src_component_type = LLVMGetElementType(dest_type);
2200 else
2201 src_component_type = dest_type;
2202
2203 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2204 vertex_index, indir_index,
2205 const_index, location, driver_location,
2206 var->data.location_frac,
2207 instr->num_components,
2208 is_patch, is_compact, load_inputs);
2209 if (instr->dest.ssa.bit_size == 16) {
2210 result = ac_to_integer(&ctx->ac, result);
2211 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2212 }
2213 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2214 }
2215
2216 static unsigned
2217 type_scalar_size_bytes(const struct glsl_type *type)
2218 {
2219 assert(glsl_type_is_vector_or_scalar(type) ||
2220 glsl_type_is_matrix(type));
2221 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2222 }
2223
2224 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2225 nir_intrinsic_instr *instr)
2226 {
2227 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2228 nir_variable *var = nir_deref_instr_get_variable(deref);
2229
2230 LLVMValueRef values[8];
2231 int idx = 0;
2232 int ve = instr->dest.ssa.num_components;
2233 unsigned comp = 0;
2234 LLVMValueRef indir_index;
2235 LLVMValueRef ret;
2236 unsigned const_index;
2237 unsigned stride = 4;
2238 int mode = deref->mode;
2239
2240 if (var) {
2241 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2242 var->data.mode == nir_var_shader_in;
2243 idx = var->data.driver_location;
2244 comp = var->data.location_frac;
2245 mode = var->data.mode;
2246
2247 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2248 &const_index, &indir_index);
2249
2250 if (var->data.compact) {
2251 stride = 1;
2252 const_index += comp;
2253 comp = 0;
2254 }
2255 }
2256
2257 if (instr->dest.ssa.bit_size == 64 &&
2258 (deref->mode == nir_var_shader_in ||
2259 deref->mode == nir_var_shader_out ||
2260 deref->mode == nir_var_function_temp))
2261 ve *= 2;
2262
2263 switch (mode) {
2264 case nir_var_shader_in:
2265 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2266 ctx->stage == MESA_SHADER_TESS_EVAL) {
2267 return load_tess_varyings(ctx, instr, true);
2268 }
2269
2270 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2271 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2272 LLVMValueRef indir_index;
2273 unsigned const_index, vertex_index;
2274 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2275 &const_index, &indir_index);
2276 assert(indir_index == NULL);
2277
2278 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2279 var->data.driver_location,
2280 var->data.location_frac,
2281 instr->num_components, vertex_index, const_index, type);
2282 }
2283
2284 for (unsigned chan = comp; chan < ve + comp; chan++) {
2285 if (indir_index) {
2286 unsigned count = glsl_count_attribute_slots(
2287 var->type,
2288 ctx->stage == MESA_SHADER_VERTEX);
2289 count -= chan / 4;
2290 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2291 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2292 stride, false, true);
2293
2294 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2295 tmp_vec,
2296 indir_index, "");
2297 } else
2298 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2299 }
2300 break;
2301 case nir_var_function_temp:
2302 for (unsigned chan = 0; chan < ve; chan++) {
2303 if (indir_index) {
2304 unsigned count = glsl_count_attribute_slots(
2305 var->type, false);
2306 count -= chan / 4;
2307 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2308 &ctx->ac, ctx->locals + idx + chan, count,
2309 stride, true, true);
2310
2311 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2312 tmp_vec,
2313 indir_index, "");
2314 } else {
2315 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2316 }
2317 }
2318 break;
2319 case nir_var_shader_out:
2320 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2321 return load_tess_varyings(ctx, instr, false);
2322 }
2323
2324 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2325 var->data.fb_fetch_output &&
2326 ctx->abi->emit_fbfetch)
2327 return ctx->abi->emit_fbfetch(ctx->abi);
2328
2329 for (unsigned chan = comp; chan < ve + comp; chan++) {
2330 if (indir_index) {
2331 unsigned count = glsl_count_attribute_slots(
2332 var->type, false);
2333 count -= chan / 4;
2334 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2335 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2336 stride, true, true);
2337
2338 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2339 tmp_vec,
2340 indir_index, "");
2341 } else {
2342 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2343 ctx->abi->outputs[idx + chan + const_index * stride],
2344 "");
2345 }
2346 }
2347 break;
2348 case nir_var_mem_global: {
2349 LLVMValueRef address = get_src(ctx, instr->src[0]);
2350 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2351 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2352 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2353 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2354 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2355 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2356
2357 if (stride != natural_stride || split_loads) {
2358 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2359 result_type = LLVMGetElementType(result_type);
2360
2361 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2362 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2363 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2364
2365 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2366 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2367 values[i] = LLVMBuildLoad(ctx->ac.builder,
2368 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2369 }
2370 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2371 } else {
2372 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2373 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2374 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2375 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2376 return val;
2377 }
2378 }
2379 default:
2380 unreachable("unhandle variable mode");
2381 }
2382 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2383 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2384 }
2385
2386 static void
2387 visit_store_var(struct ac_nir_context *ctx,
2388 nir_intrinsic_instr *instr)
2389 {
2390 if (ctx->ac.postponed_kill) {
2391 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2392 ctx->ac.postponed_kill, "");
2393 ac_build_ifcc(&ctx->ac, cond, 7002);
2394 }
2395
2396 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2397 nir_variable *var = nir_deref_instr_get_variable(deref);
2398
2399 LLVMValueRef temp_ptr, value;
2400 int idx = 0;
2401 unsigned comp = 0;
2402 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2403 int writemask = instr->const_index[0];
2404 LLVMValueRef indir_index;
2405 unsigned const_index;
2406
2407 if (var) {
2408 get_deref_offset(ctx, deref, false,
2409 NULL, NULL, &const_index, &indir_index);
2410 idx = var->data.driver_location;
2411 comp = var->data.location_frac;
2412
2413 if (var->data.compact) {
2414 const_index += comp;
2415 comp = 0;
2416 }
2417 }
2418
2419 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2420 (deref->mode == nir_var_shader_out ||
2421 deref->mode == nir_var_function_temp)) {
2422
2423 src = LLVMBuildBitCast(ctx->ac.builder, src,
2424 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2425 "");
2426
2427 writemask = widen_mask(writemask, 2);
2428 }
2429
2430 writemask = writemask << comp;
2431
2432 switch (deref->mode) {
2433 case nir_var_shader_out:
2434
2435 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2436 LLVMValueRef vertex_index = NULL;
2437 LLVMValueRef indir_index = NULL;
2438 unsigned const_index = 0;
2439 const bool is_patch = var->data.patch ||
2440 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2441 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2442
2443 get_deref_offset(ctx, deref, false, NULL,
2444 is_patch ? NULL : &vertex_index,
2445 &const_index, &indir_index);
2446
2447 ctx->abi->store_tcs_outputs(ctx->abi, var,
2448 vertex_index, indir_index,
2449 const_index, src, writemask);
2450 break;
2451 }
2452
2453 for (unsigned chan = 0; chan < 8; chan++) {
2454 int stride = 4;
2455 if (!(writemask & (1 << chan)))
2456 continue;
2457
2458 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2459
2460 if (var->data.compact)
2461 stride = 1;
2462 if (indir_index) {
2463 unsigned count = glsl_count_attribute_slots(
2464 var->type, false);
2465 count -= chan / 4;
2466 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2467 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2468 stride, true, true);
2469
2470 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2471 value, indir_index, "");
2472 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2473 count, stride, tmp_vec);
2474
2475 } else {
2476 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2477
2478 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2479 }
2480 }
2481 break;
2482 case nir_var_function_temp:
2483 for (unsigned chan = 0; chan < 8; chan++) {
2484 if (!(writemask & (1 << chan)))
2485 continue;
2486
2487 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2488 if (indir_index) {
2489 unsigned count = glsl_count_attribute_slots(
2490 var->type, false);
2491 count -= chan / 4;
2492 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2493 &ctx->ac, ctx->locals + idx + chan, count,
2494 4, true, true);
2495
2496 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2497 value, indir_index, "");
2498 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2499 count, 4, tmp_vec);
2500 } else {
2501 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2502
2503 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2504 }
2505 }
2506 break;
2507
2508 case nir_var_mem_global: {
2509 int writemask = instr->const_index[0];
2510 LLVMValueRef address = get_src(ctx, instr->src[0]);
2511 LLVMValueRef val = get_src(ctx, instr->src[1]);
2512
2513 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2514 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2515 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2516 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2517 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2518
2519 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2520 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2521 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2522
2523 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2524 stride == natural_stride && !split_stores) {
2525 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2526 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2527 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2528
2529 val = LLVMBuildBitCast(ctx->ac.builder, val,
2530 LLVMGetElementType(LLVMTypeOf(address)), "");
2531 LLVMBuildStore(ctx->ac.builder, val, address);
2532 } else {
2533 LLVMTypeRef val_type = LLVMTypeOf(val);
2534 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2535 val_type = LLVMGetElementType(val_type);
2536
2537 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2538 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2539 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2540 for (unsigned chan = 0; chan < 4; chan++) {
2541 if (!(writemask & (1 << chan)))
2542 continue;
2543
2544 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2545
2546 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2547 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2548 chan);
2549 src = LLVMBuildBitCast(ctx->ac.builder, src,
2550 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2551 LLVMBuildStore(ctx->ac.builder, src, ptr);
2552 }
2553 }
2554 break;
2555 }
2556 default:
2557 abort();
2558 break;
2559 }
2560
2561 if (ctx->ac.postponed_kill)
2562 ac_build_endif(&ctx->ac, 7002);
2563 }
2564
2565 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2566 {
2567 switch (dim) {
2568 case GLSL_SAMPLER_DIM_BUF:
2569 return 1;
2570 case GLSL_SAMPLER_DIM_1D:
2571 return array ? 2 : 1;
2572 case GLSL_SAMPLER_DIM_2D:
2573 return array ? 3 : 2;
2574 case GLSL_SAMPLER_DIM_MS:
2575 return array ? 4 : 3;
2576 case GLSL_SAMPLER_DIM_3D:
2577 case GLSL_SAMPLER_DIM_CUBE:
2578 return 3;
2579 case GLSL_SAMPLER_DIM_RECT:
2580 case GLSL_SAMPLER_DIM_SUBPASS:
2581 return 2;
2582 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2583 return 3;
2584 default:
2585 break;
2586 }
2587 return 0;
2588 }
2589
2590 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2591 LLVMValueRef coord_x, LLVMValueRef coord_y,
2592 LLVMValueRef coord_z,
2593 LLVMValueRef sample_index,
2594 LLVMValueRef fmask_desc_ptr)
2595 {
2596 unsigned sample_chan = coord_z ? 3 : 2;
2597 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2598 addr[sample_chan] = sample_index;
2599
2600 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2601 return addr[sample_chan];
2602 }
2603
2604 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2605 {
2606 assert(instr->src[0].is_ssa);
2607 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2608 }
2609
2610 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2611 const nir_intrinsic_instr *instr,
2612 LLVMValueRef dynamic_index,
2613 enum ac_descriptor_type desc_type,
2614 bool write)
2615 {
2616 nir_deref_instr *deref_instr =
2617 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2618 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2619
2620 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2621 }
2622
2623 static void get_image_coords(struct ac_nir_context *ctx,
2624 const nir_intrinsic_instr *instr,
2625 LLVMValueRef dynamic_desc_index,
2626 struct ac_image_args *args,
2627 enum glsl_sampler_dim dim,
2628 bool is_array)
2629 {
2630 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2631 LLVMValueRef masks[] = {
2632 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2633 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2634 };
2635 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2636
2637 int count;
2638 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2639 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2640 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2641 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2642 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2643 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2644 count = image_type_to_components_count(dim, is_array);
2645
2646 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2647 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2648 LLVMValueRef fmask_load_address[3];
2649
2650 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2651 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2652 if (is_array)
2653 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2654 else
2655 fmask_load_address[2] = NULL;
2656
2657 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2658 fmask_load_address[0],
2659 fmask_load_address[1],
2660 fmask_load_address[2],
2661 sample_index,
2662 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2663 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2664 }
2665 if (count == 1 && !gfx9_1d) {
2666 if (instr->src[1].ssa->num_components)
2667 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2668 else
2669 args->coords[0] = src0;
2670 } else {
2671 int chan;
2672 if (is_ms)
2673 count--;
2674 for (chan = 0; chan < count; ++chan) {
2675 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2676 }
2677
2678 if (gfx9_1d) {
2679 if (is_array) {
2680 args->coords[2] = args->coords[1];
2681 args->coords[1] = ctx->ac.i32_0;
2682 } else
2683 args->coords[1] = ctx->ac.i32_0;
2684 count++;
2685 }
2686 if (ctx->ac.chip_class == GFX9 &&
2687 dim == GLSL_SAMPLER_DIM_2D &&
2688 !is_array) {
2689 /* The hw can't bind a slice of a 3D image as a 2D
2690 * image, because it ignores BASE_ARRAY if the target
2691 * is 3D. The workaround is to read BASE_ARRAY and set
2692 * it as the 3rd address operand for all 2D images.
2693 */
2694 LLVMValueRef first_layer, const5, mask;
2695
2696 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2697 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2698 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2699 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2700
2701 args->coords[count] = first_layer;
2702 count++;
2703 }
2704
2705
2706 if (is_ms) {
2707 args->coords[count] = sample_index;
2708 count++;
2709 }
2710 }
2711 }
2712
2713 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2714 const nir_intrinsic_instr *instr,
2715 LLVMValueRef dynamic_index,
2716 bool write, bool atomic)
2717 {
2718 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2719 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2720 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2721 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2722 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2723
2724 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2725 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2726 elem_count, stride, "");
2727
2728 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2729 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2730 }
2731 return rsrc;
2732 }
2733
2734 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2735 struct waterfall_context *wctx,
2736 const nir_intrinsic_instr *instr)
2737 {
2738 nir_deref_instr *deref_instr = NULL;
2739
2740 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2741 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2742
2743 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2744 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2745 }
2746
2747 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2748 const nir_intrinsic_instr *instr,
2749 bool bindless)
2750 {
2751 LLVMValueRef res;
2752
2753 enum glsl_sampler_dim dim;
2754 enum gl_access_qualifier access;
2755 bool is_array;
2756 if (bindless) {
2757 dim = nir_intrinsic_image_dim(instr);
2758 access = nir_intrinsic_access(instr);
2759 is_array = nir_intrinsic_image_array(instr);
2760 } else {
2761 const nir_deref_instr *image_deref = get_image_deref(instr);
2762 const struct glsl_type *type = image_deref->type;
2763 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2764 dim = glsl_get_sampler_dim(type);
2765 access = var->data.access;
2766 is_array = glsl_sampler_type_is_array(type);
2767 }
2768
2769 struct waterfall_context wctx;
2770 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2771
2772 struct ac_image_args args = {};
2773
2774 args.cache_policy = get_cache_policy(ctx, access, false, false);
2775
2776 if (dim == GLSL_SAMPLER_DIM_BUF) {
2777 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2778 unsigned num_channels = util_last_bit(mask);
2779 LLVMValueRef rsrc, vindex;
2780
2781 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2782 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2783 ctx->ac.i32_0, "");
2784
2785 bool can_speculate = access & ACCESS_CAN_REORDER;
2786 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2787 ctx->ac.i32_0, num_channels,
2788 args.cache_policy,
2789 can_speculate);
2790 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2791
2792 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2793 res = ac_to_integer(&ctx->ac, res);
2794 } else {
2795 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2796
2797 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2798 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2799 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2800 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2801 if (!level_zero)
2802 args.lod = get_src(ctx, instr->src[3]);
2803 args.dmask = 15;
2804 args.attributes = AC_FUNC_ATTR_READONLY;
2805
2806 res = ac_build_image_opcode(&ctx->ac, &args);
2807 }
2808 return exit_waterfall(ctx, &wctx, res);
2809 }
2810
2811 static void visit_image_store(struct ac_nir_context *ctx,
2812 const nir_intrinsic_instr *instr,
2813 bool bindless)
2814 {
2815 if (ctx->ac.postponed_kill) {
2816 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2817 ctx->ac.postponed_kill, "");
2818 ac_build_ifcc(&ctx->ac, cond, 7003);
2819 }
2820
2821 enum glsl_sampler_dim dim;
2822 enum gl_access_qualifier access;
2823 bool is_array;
2824
2825 if (bindless) {
2826 dim = nir_intrinsic_image_dim(instr);
2827 access = nir_intrinsic_access(instr);
2828 is_array = nir_intrinsic_image_array(instr);
2829 } else {
2830 const nir_deref_instr *image_deref = get_image_deref(instr);
2831 const struct glsl_type *type = image_deref->type;
2832 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2833 dim = glsl_get_sampler_dim(type);
2834 access = var->data.access;
2835 is_array = glsl_sampler_type_is_array(type);
2836 }
2837
2838 struct waterfall_context wctx;
2839 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2840
2841 bool writeonly_memory = access & ACCESS_NON_READABLE;
2842 struct ac_image_args args = {};
2843
2844 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2845
2846 if (dim == GLSL_SAMPLER_DIM_BUF) {
2847 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2848 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2849 unsigned src_channels = ac_get_llvm_num_components(src);
2850 LLVMValueRef vindex;
2851
2852 if (src_channels == 3)
2853 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2854
2855 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2856 get_src(ctx, instr->src[1]),
2857 ctx->ac.i32_0, "");
2858
2859 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2860 ctx->ac.i32_0, src_channels,
2861 args.cache_policy);
2862 } else {
2863 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2864
2865 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2866 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2867 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2868 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2869 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2870 if (!level_zero)
2871 args.lod = get_src(ctx, instr->src[4]);
2872 args.dmask = 15;
2873
2874 ac_build_image_opcode(&ctx->ac, &args);
2875 }
2876
2877 exit_waterfall(ctx, &wctx, NULL);
2878 if (ctx->ac.postponed_kill)
2879 ac_build_endif(&ctx->ac, 7003);
2880 }
2881
2882 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2883 const nir_intrinsic_instr *instr,
2884 bool bindless)
2885 {
2886 if (ctx->ac.postponed_kill) {
2887 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2888 ctx->ac.postponed_kill, "");
2889 ac_build_ifcc(&ctx->ac, cond, 7004);
2890 }
2891
2892 LLVMValueRef params[7];
2893 int param_count = 0;
2894
2895 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2896 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2897 const char *atomic_name;
2898 char intrinsic_name[64];
2899 enum ac_atomic_op atomic_subop;
2900 ASSERTED int length;
2901
2902 enum glsl_sampler_dim dim;
2903 bool is_array;
2904 if (bindless) {
2905 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2906 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2907 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2908 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2909 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2910 assert(format == GL_R32UI || format == GL_R32I);
2911 }
2912 dim = nir_intrinsic_image_dim(instr);
2913 is_array = nir_intrinsic_image_array(instr);
2914 } else {
2915 const struct glsl_type *type = get_image_deref(instr)->type;
2916 dim = glsl_get_sampler_dim(type);
2917 is_array = glsl_sampler_type_is_array(type);
2918 }
2919
2920 struct waterfall_context wctx;
2921 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2922
2923 switch (instr->intrinsic) {
2924 case nir_intrinsic_bindless_image_atomic_add:
2925 case nir_intrinsic_image_deref_atomic_add:
2926 atomic_name = "add";
2927 atomic_subop = ac_atomic_add;
2928 break;
2929 case nir_intrinsic_bindless_image_atomic_imin:
2930 case nir_intrinsic_image_deref_atomic_imin:
2931 atomic_name = "smin";
2932 atomic_subop = ac_atomic_smin;
2933 break;
2934 case nir_intrinsic_bindless_image_atomic_umin:
2935 case nir_intrinsic_image_deref_atomic_umin:
2936 atomic_name = "umin";
2937 atomic_subop = ac_atomic_umin;
2938 break;
2939 case nir_intrinsic_bindless_image_atomic_imax:
2940 case nir_intrinsic_image_deref_atomic_imax:
2941 atomic_name = "smax";
2942 atomic_subop = ac_atomic_smax;
2943 break;
2944 case nir_intrinsic_bindless_image_atomic_umax:
2945 case nir_intrinsic_image_deref_atomic_umax:
2946 atomic_name = "umax";
2947 atomic_subop = ac_atomic_umax;
2948 break;
2949 case nir_intrinsic_bindless_image_atomic_and:
2950 case nir_intrinsic_image_deref_atomic_and:
2951 atomic_name = "and";
2952 atomic_subop = ac_atomic_and;
2953 break;
2954 case nir_intrinsic_bindless_image_atomic_or:
2955 case nir_intrinsic_image_deref_atomic_or:
2956 atomic_name = "or";
2957 atomic_subop = ac_atomic_or;
2958 break;
2959 case nir_intrinsic_bindless_image_atomic_xor:
2960 case nir_intrinsic_image_deref_atomic_xor:
2961 atomic_name = "xor";
2962 atomic_subop = ac_atomic_xor;
2963 break;
2964 case nir_intrinsic_bindless_image_atomic_exchange:
2965 case nir_intrinsic_image_deref_atomic_exchange:
2966 atomic_name = "swap";
2967 atomic_subop = ac_atomic_swap;
2968 break;
2969 case nir_intrinsic_bindless_image_atomic_comp_swap:
2970 case nir_intrinsic_image_deref_atomic_comp_swap:
2971 atomic_name = "cmpswap";
2972 atomic_subop = 0; /* not used */
2973 break;
2974 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2975 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2976 atomic_name = "inc";
2977 atomic_subop = ac_atomic_inc_wrap;
2978 /* ATOMIC_INC instruction does:
2979 * value = (value + 1) % (data + 1)
2980 * but we want:
2981 * value = (value + 1) % data
2982 * So replace 'data' by 'data - 1'.
2983 */
2984 ctx->ssa_defs[instr->src[3].ssa->index] =
2985 LLVMBuildSub(ctx->ac.builder,
2986 ctx->ssa_defs[instr->src[3].ssa->index],
2987 ctx->ac.i32_1, "");
2988 break;
2989 }
2990 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2991 case nir_intrinsic_image_deref_atomic_dec_wrap:
2992 atomic_name = "dec";
2993 atomic_subop = ac_atomic_dec_wrap;
2994 break;
2995 default:
2996 abort();
2997 }
2998
2999 if (cmpswap)
3000 params[param_count++] = get_src(ctx, instr->src[4]);
3001 params[param_count++] = get_src(ctx, instr->src[3]);
3002
3003 LLVMValueRef result;
3004 if (dim == GLSL_SAMPLER_DIM_BUF) {
3005 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3006 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3007 ctx->ac.i32_0, ""); /* vindex */
3008 params[param_count++] = ctx->ac.i32_0; /* voffset */
3009 if (LLVM_VERSION_MAJOR >= 9) {
3010 /* XXX: The new raw/struct atomic intrinsics are buggy
3011 * with LLVM 8, see r358579.
3012 */
3013 params[param_count++] = ctx->ac.i32_0; /* soffset */
3014 params[param_count++] = ctx->ac.i32_0; /* slc */
3015
3016 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3017 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3018 } else {
3019 params[param_count++] = ctx->ac.i1false; /* slc */
3020
3021 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3022 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3023 }
3024
3025 assert(length < sizeof(intrinsic_name));
3026 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3027 params, param_count, 0);
3028 } else {
3029 struct ac_image_args args = {};
3030 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3031 args.atomic = atomic_subop;
3032 args.data[0] = params[0];
3033 if (cmpswap)
3034 args.data[1] = params[1];
3035 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3036 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3037 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3038
3039 result = ac_build_image_opcode(&ctx->ac, &args);
3040 }
3041
3042 result = exit_waterfall(ctx, &wctx, result);
3043 if (ctx->ac.postponed_kill)
3044 ac_build_endif(&ctx->ac, 7004);
3045 return result;
3046 }
3047
3048 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3049 nir_intrinsic_instr *instr)
3050 {
3051 struct waterfall_context wctx;
3052 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3053 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3054
3055 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3056
3057 return exit_waterfall(ctx, &wctx, ret);
3058 }
3059
3060 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3061 const nir_intrinsic_instr *instr,
3062 bool bindless)
3063 {
3064 LLVMValueRef res;
3065
3066 enum glsl_sampler_dim dim;
3067 bool is_array;
3068 if (bindless) {
3069 dim = nir_intrinsic_image_dim(instr);
3070 is_array = nir_intrinsic_image_array(instr);
3071 } else {
3072 const struct glsl_type *type = get_image_deref(instr)->type;
3073 dim = glsl_get_sampler_dim(type);
3074 is_array = glsl_sampler_type_is_array(type);
3075 }
3076
3077 struct waterfall_context wctx;
3078 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3079
3080 if (dim == GLSL_SAMPLER_DIM_BUF) {
3081 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3082 } else {
3083
3084 struct ac_image_args args = { 0 };
3085
3086 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3087 args.dmask = 0xf;
3088 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3089 args.opcode = ac_image_get_resinfo;
3090 args.lod = ctx->ac.i32_0;
3091 args.attributes = AC_FUNC_ATTR_READNONE;
3092
3093 res = ac_build_image_opcode(&ctx->ac, &args);
3094
3095 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3096
3097 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3098 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3099 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3100 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3101 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3102 }
3103
3104 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3105 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3106 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3107 ctx->ac.i32_1, "");
3108 }
3109 }
3110 return exit_waterfall(ctx, &wctx, res);
3111 }
3112
3113 static void emit_membar(struct ac_llvm_context *ac,
3114 const nir_intrinsic_instr *instr)
3115 {
3116 unsigned wait_flags = 0;
3117
3118 switch (instr->intrinsic) {
3119 case nir_intrinsic_memory_barrier:
3120 case nir_intrinsic_group_memory_barrier:
3121 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3122 break;
3123 case nir_intrinsic_memory_barrier_buffer:
3124 case nir_intrinsic_memory_barrier_image:
3125 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3126 break;
3127 case nir_intrinsic_memory_barrier_shared:
3128 wait_flags = AC_WAIT_LGKM;
3129 break;
3130 default:
3131 break;
3132 }
3133
3134 ac_build_waitcnt(ac, wait_flags);
3135 }
3136
3137 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3138 {
3139 /* GFX6 only (thanks to a hw bug workaround):
3140 * The real barrier instruction isn’t needed, because an entire patch
3141 * always fits into a single wave.
3142 */
3143 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3144 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3145 return;
3146 }
3147 ac_build_s_barrier(ac);
3148 }
3149
3150 static void emit_discard(struct ac_nir_context *ctx,
3151 const nir_intrinsic_instr *instr)
3152 {
3153 LLVMValueRef cond;
3154
3155 if (instr->intrinsic == nir_intrinsic_discard_if) {
3156 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3157 get_src(ctx, instr->src[0]),
3158 ctx->ac.i32_0, "");
3159 } else {
3160 assert(instr->intrinsic == nir_intrinsic_discard);
3161 cond = ctx->ac.i1false;
3162 }
3163
3164 ac_build_kill_if_false(&ctx->ac, cond);
3165 }
3166
3167 static void emit_demote(struct ac_nir_context *ctx,
3168 const nir_intrinsic_instr *instr)
3169 {
3170 LLVMValueRef cond;
3171
3172 if (instr->intrinsic == nir_intrinsic_demote_if) {
3173 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3174 get_src(ctx, instr->src[0]),
3175 ctx->ac.i32_0, "");
3176 } else {
3177 assert(instr->intrinsic == nir_intrinsic_demote);
3178 cond = ctx->ac.i1false;
3179 }
3180
3181 /* Kill immediately while maintaining WQM. */
3182 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3183
3184 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3185 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3186 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3187 return;
3188 }
3189
3190 static LLVMValueRef
3191 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3192 {
3193 LLVMValueRef result;
3194 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3195 result = LLVMBuildAnd(ctx->ac.builder,
3196 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3197 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3198
3199 if (ctx->ac.wave_size == 32)
3200 result = LLVMBuildLShr(ctx->ac.builder, result,
3201 LLVMConstInt(ctx->ac.i32, 1, false), "");
3202
3203 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3204 }
3205
3206 static LLVMValueRef
3207 visit_load_subgroup_id(struct ac_nir_context *ctx)
3208 {
3209 if (ctx->stage == MESA_SHADER_COMPUTE) {
3210 LLVMValueRef result;
3211 result = LLVMBuildAnd(ctx->ac.builder,
3212 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3213 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3214 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3215 } else {
3216 return LLVMConstInt(ctx->ac.i32, 0, false);
3217 }
3218 }
3219
3220 static LLVMValueRef
3221 visit_load_num_subgroups(struct ac_nir_context *ctx)
3222 {
3223 if (ctx->stage == MESA_SHADER_COMPUTE) {
3224 return LLVMBuildAnd(ctx->ac.builder,
3225 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3226 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3227 } else {
3228 return LLVMConstInt(ctx->ac.i32, 1, false);
3229 }
3230 }
3231
3232 static LLVMValueRef
3233 visit_first_invocation(struct ac_nir_context *ctx)
3234 {
3235 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3236 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3237
3238 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3239 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3240 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3241 ctx->ac.iN_wavemask, args, 2,
3242 AC_FUNC_ATTR_NOUNWIND |
3243 AC_FUNC_ATTR_READNONE);
3244
3245 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3246 }
3247
3248 static LLVMValueRef
3249 visit_load_shared(struct ac_nir_context *ctx,
3250 const nir_intrinsic_instr *instr)
3251 {
3252 LLVMValueRef values[4], derived_ptr, index, ret;
3253
3254 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3255 instr->dest.ssa.bit_size);
3256
3257 for (int chan = 0; chan < instr->num_components; chan++) {
3258 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3259 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3260 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3261 }
3262
3263 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3264 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3265 }
3266
3267 static void
3268 visit_store_shared(struct ac_nir_context *ctx,
3269 const nir_intrinsic_instr *instr)
3270 {
3271 LLVMValueRef derived_ptr, data,index;
3272 LLVMBuilderRef builder = ctx->ac.builder;
3273
3274 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3275 instr->src[0].ssa->bit_size);
3276 LLVMValueRef src = get_src(ctx, instr->src[0]);
3277
3278 int writemask = nir_intrinsic_write_mask(instr);
3279 for (int chan = 0; chan < 4; chan++) {
3280 if (!(writemask & (1 << chan))) {
3281 continue;
3282 }
3283 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3284 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3285 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3286 LLVMBuildStore(builder, data, derived_ptr);
3287 }
3288 }
3289
3290 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3291 const nir_intrinsic_instr *instr,
3292 LLVMValueRef ptr, int src_idx)
3293 {
3294 if (ctx->ac.postponed_kill) {
3295 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3296 ctx->ac.postponed_kill, "");
3297 ac_build_ifcc(&ctx->ac, cond, 7005);
3298 }
3299
3300 LLVMValueRef result;
3301 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3302
3303 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3304
3305 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3306 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3307 if (deref->mode == nir_var_mem_global) {
3308 /* use "singlethread" sync scope to implement relaxed ordering */
3309 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3310
3311 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3312 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3313 }
3314 }
3315
3316 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3317 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3318 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3319 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3320 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3321 } else {
3322 LLVMAtomicRMWBinOp op;
3323 switch (instr->intrinsic) {
3324 case nir_intrinsic_shared_atomic_add:
3325 case nir_intrinsic_deref_atomic_add:
3326 op = LLVMAtomicRMWBinOpAdd;
3327 break;
3328 case nir_intrinsic_shared_atomic_umin:
3329 case nir_intrinsic_deref_atomic_umin:
3330 op = LLVMAtomicRMWBinOpUMin;
3331 break;
3332 case nir_intrinsic_shared_atomic_umax:
3333 case nir_intrinsic_deref_atomic_umax:
3334 op = LLVMAtomicRMWBinOpUMax;
3335 break;
3336 case nir_intrinsic_shared_atomic_imin:
3337 case nir_intrinsic_deref_atomic_imin:
3338 op = LLVMAtomicRMWBinOpMin;
3339 break;
3340 case nir_intrinsic_shared_atomic_imax:
3341 case nir_intrinsic_deref_atomic_imax:
3342 op = LLVMAtomicRMWBinOpMax;
3343 break;
3344 case nir_intrinsic_shared_atomic_and:
3345 case nir_intrinsic_deref_atomic_and:
3346 op = LLVMAtomicRMWBinOpAnd;
3347 break;
3348 case nir_intrinsic_shared_atomic_or:
3349 case nir_intrinsic_deref_atomic_or:
3350 op = LLVMAtomicRMWBinOpOr;
3351 break;
3352 case nir_intrinsic_shared_atomic_xor:
3353 case nir_intrinsic_deref_atomic_xor:
3354 op = LLVMAtomicRMWBinOpXor;
3355 break;
3356 case nir_intrinsic_shared_atomic_exchange:
3357 case nir_intrinsic_deref_atomic_exchange:
3358 op = LLVMAtomicRMWBinOpXchg;
3359 break;
3360 default:
3361 return NULL;
3362 }
3363
3364 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3365 }
3366
3367 if (ctx->ac.postponed_kill)
3368 ac_build_endif(&ctx->ac, 7005);
3369 return result;
3370 }
3371
3372 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3373 {
3374 LLVMValueRef values[2];
3375 LLVMValueRef pos[2];
3376
3377 pos[0] = ac_to_float(&ctx->ac,
3378 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3379 pos[1] = ac_to_float(&ctx->ac,
3380 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3381
3382 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3383 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3384 return ac_build_gather_values(&ctx->ac, values, 2);
3385 }
3386
3387 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3388 enum glsl_interp_mode interp, unsigned location)
3389 {
3390 switch (interp) {
3391 case INTERP_MODE_FLAT:
3392 default:
3393 return NULL;
3394 case INTERP_MODE_SMOOTH:
3395 case INTERP_MODE_NONE:
3396 if (location == INTERP_CENTER)
3397 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3398 else if (location == INTERP_CENTROID)
3399 return ctx->abi->persp_centroid;
3400 else if (location == INTERP_SAMPLE)
3401 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3402 break;
3403 case INTERP_MODE_NOPERSPECTIVE:
3404 if (location == INTERP_CENTER)
3405 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3406 else if (location == INTERP_CENTROID)
3407 return ctx->abi->linear_centroid;
3408 else if (location == INTERP_SAMPLE)
3409 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3410 break;
3411 }
3412 return NULL;
3413 }
3414
3415 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3416 unsigned mode)
3417 {
3418 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3419 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3420 }
3421
3422 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3423 unsigned mode,
3424 LLVMValueRef offset)
3425 {
3426 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3427 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3428 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3429
3430 LLVMValueRef ij_out[2];
3431 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3432
3433 /*
3434 * take the I then J parameters, and the DDX/Y for it, and
3435 * calculate the IJ inputs for the interpolator.
3436 * temp1 = ddx * offset/sample.x + I;
3437 * interp_param.I = ddy * offset/sample.y + temp1;
3438 * temp1 = ddx * offset/sample.x + J;
3439 * interp_param.J = ddy * offset/sample.y + temp1;
3440 */
3441 for (unsigned i = 0; i < 2; i++) {
3442 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3443 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3444 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3445 ddxy_out, ix_ll, "");
3446 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3447 ddxy_out, iy_ll, "");
3448 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3449 interp_param, ix_ll, "");
3450 LLVMValueRef temp1, temp2;
3451
3452 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3453 ctx->ac.f32, "");
3454
3455 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3456 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3457
3458 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3459 temp2, ctx->ac.i32, "");
3460 }
3461 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3462 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3463 }
3464
3465 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3466 unsigned mode)
3467 {
3468 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3469 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3470 }
3471
3472 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3473 unsigned mode,
3474 LLVMValueRef sample_id)
3475 {
3476 if (ctx->abi->interp_at_sample_force_center)
3477 return barycentric_center(ctx, mode);
3478
3479 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3480
3481 /* fetch sample ID */
3482 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3483
3484 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3485 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3486 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3487 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3488 LLVMValueRef coords[] = { src_c0, src_c1 };
3489 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3490
3491 return barycentric_offset(ctx, mode, offset);
3492 }
3493
3494
3495 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3496 unsigned mode)
3497 {
3498 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3499 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3500 }
3501
3502 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3503 {
3504 return LLVMBuildBitCast(ctx->ac.builder,
3505 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3506 ctx->ac.v3i32, "");
3507 }
3508
3509 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3510 LLVMValueRef interp_param,
3511 unsigned index, unsigned comp_start,
3512 unsigned num_components,
3513 unsigned bitsize)
3514 {
3515 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3516 LLVMValueRef interp_param_f;
3517
3518 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3519 interp_param, ctx->ac.v2f32, "");
3520 LLVMValueRef i = LLVMBuildExtractElement(
3521 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3522 LLVMValueRef j = LLVMBuildExtractElement(
3523 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3524
3525 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3526 if (ctx->verified_interp &&
3527 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3528 LLVMValueRef args[2];
3529 args[0] = i;
3530 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3531 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3532 args, 2, AC_FUNC_ATTR_READNONE);
3533 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3534 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3535 }
3536
3537 LLVMValueRef values[4];
3538 assert(bitsize == 16 || bitsize == 32);
3539 for (unsigned comp = 0; comp < num_components; comp++) {
3540 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3541 if (bitsize == 16) {
3542 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3543 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3544 } else {
3545 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3546 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3547 }
3548 }
3549
3550 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3551 }
3552
3553 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3554 nir_intrinsic_instr *instr)
3555 {
3556 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3557
3558 /* We only lower inputs for fragment shaders ATM */
3559 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3560 assert(offset);
3561 assert(offset[0].i32 == 0);
3562
3563 unsigned component = nir_intrinsic_component(instr);
3564 unsigned index = nir_intrinsic_base(instr);
3565 unsigned vertex_id = 2; /* P0 */
3566
3567 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3568 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3569
3570 switch (src0[0].i32) {
3571 case 0:
3572 vertex_id = 2;
3573 break;
3574 case 1:
3575 vertex_id = 0;
3576 break;
3577 case 2:
3578 vertex_id = 1;
3579 break;
3580 default:
3581 unreachable("Invalid vertex index");
3582 }
3583 }
3584
3585 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3586 LLVMValueRef values[8];
3587
3588 /* Each component of a 64-bit value takes up two GL-level channels. */
3589 unsigned num_components = instr->dest.ssa.num_components;
3590 unsigned bit_size = instr->dest.ssa.bit_size;
3591 unsigned channels =
3592 bit_size == 64 ? num_components * 2 : num_components;
3593
3594 for (unsigned chan = 0; chan < channels; chan++) {
3595 if (component + chan > 4)
3596 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3597 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3598 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3599 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3600 llvm_chan,
3601 attr_number,
3602 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3603 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3604 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3605 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3606 }
3607
3608 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3609 if (bit_size == 64) {
3610 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3611 LLVMVectorType(ctx->ac.i64, num_components);
3612 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3613 }
3614 return result;
3615 }
3616
3617 static void visit_intrinsic(struct ac_nir_context *ctx,
3618 nir_intrinsic_instr *instr)
3619 {
3620 LLVMValueRef result = NULL;
3621
3622 switch (instr->intrinsic) {
3623 case nir_intrinsic_ballot:
3624 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3625 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3626 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3627 break;
3628 case nir_intrinsic_read_invocation:
3629 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3630 get_src(ctx, instr->src[1]));
3631 break;
3632 case nir_intrinsic_read_first_invocation:
3633 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3634 break;
3635 case nir_intrinsic_load_subgroup_invocation:
3636 result = ac_get_thread_id(&ctx->ac);
3637 break;
3638 case nir_intrinsic_load_work_group_id: {
3639 LLVMValueRef values[3];
3640
3641 for (int i = 0; i < 3; i++) {
3642 values[i] = ctx->args->workgroup_ids[i].used ?
3643 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3644 }
3645
3646 result = ac_build_gather_values(&ctx->ac, values, 3);
3647 break;
3648 }
3649 case nir_intrinsic_load_base_vertex:
3650 case nir_intrinsic_load_first_vertex:
3651 result = ctx->abi->load_base_vertex(ctx->abi);
3652 break;
3653 case nir_intrinsic_load_local_group_size:
3654 result = ctx->abi->load_local_group_size(ctx->abi);
3655 break;
3656 case nir_intrinsic_load_vertex_id:
3657 result = LLVMBuildAdd(ctx->ac.builder,
3658 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3659 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3660 break;
3661 case nir_intrinsic_load_vertex_id_zero_base: {
3662 result = ctx->abi->vertex_id;
3663 break;
3664 }
3665 case nir_intrinsic_load_local_invocation_id: {
3666 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3667 break;
3668 }
3669 case nir_intrinsic_load_base_instance:
3670 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3671 break;
3672 case nir_intrinsic_load_draw_id:
3673 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3674 break;
3675 case nir_intrinsic_load_view_index:
3676 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3677 break;
3678 case nir_intrinsic_load_invocation_id:
3679 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3680 result = ac_unpack_param(&ctx->ac,
3681 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3682 8, 5);
3683 } else {
3684 if (ctx->ac.chip_class >= GFX10) {
3685 result = LLVMBuildAnd(ctx->ac.builder,
3686 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3687 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3688 } else {
3689 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3690 }
3691 }
3692 break;
3693 case nir_intrinsic_load_primitive_id:
3694 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3695 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3696 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3697 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3698 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3699 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3700 } else
3701 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3702 break;
3703 case nir_intrinsic_load_sample_id:
3704 result = ac_unpack_param(&ctx->ac,
3705 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3706 8, 4);
3707 break;
3708 case nir_intrinsic_load_sample_pos:
3709 result = load_sample_pos(ctx);
3710 break;
3711 case nir_intrinsic_load_sample_mask_in:
3712 result = ctx->abi->load_sample_mask_in(ctx->abi);
3713 break;
3714 case nir_intrinsic_load_frag_coord: {
3715 LLVMValueRef values[4] = {
3716 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3717 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3718 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3719 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3720 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3721 };
3722 result = ac_to_integer(&ctx->ac,
3723 ac_build_gather_values(&ctx->ac, values, 4));
3724 break;
3725 }
3726 case nir_intrinsic_load_layer_id:
3727 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3728 break;
3729 case nir_intrinsic_load_front_face:
3730 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3731 break;
3732 case nir_intrinsic_load_helper_invocation:
3733 result = ac_build_load_helper_invocation(&ctx->ac);
3734 break;
3735 case nir_intrinsic_is_helper_invocation:
3736 result = ac_build_is_helper_invocation(&ctx->ac);
3737 break;
3738 case nir_intrinsic_load_color0:
3739 result = ctx->abi->color0;
3740 break;
3741 case nir_intrinsic_load_color1:
3742 result = ctx->abi->color1;
3743 break;
3744 case nir_intrinsic_load_user_data_amd:
3745 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3746 result = ctx->abi->user_data;
3747 break;
3748 case nir_intrinsic_load_instance_id:
3749 result = ctx->abi->instance_id;
3750 break;
3751 case nir_intrinsic_load_num_work_groups:
3752 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3753 break;
3754 case nir_intrinsic_load_local_invocation_index:
3755 result = visit_load_local_invocation_index(ctx);
3756 break;
3757 case nir_intrinsic_load_subgroup_id:
3758 result = visit_load_subgroup_id(ctx);
3759 break;
3760 case nir_intrinsic_load_num_subgroups:
3761 result = visit_load_num_subgroups(ctx);
3762 break;
3763 case nir_intrinsic_first_invocation:
3764 result = visit_first_invocation(ctx);
3765 break;
3766 case nir_intrinsic_load_push_constant:
3767 result = visit_load_push_constant(ctx, instr);
3768 break;
3769 case nir_intrinsic_vulkan_resource_index: {
3770 LLVMValueRef index = get_src(ctx, instr->src[0]);
3771 unsigned desc_set = nir_intrinsic_desc_set(instr);
3772 unsigned binding = nir_intrinsic_binding(instr);
3773
3774 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3775 binding);
3776 break;
3777 }
3778 case nir_intrinsic_vulkan_resource_reindex:
3779 result = visit_vulkan_resource_reindex(ctx, instr);
3780 break;
3781 case nir_intrinsic_store_ssbo:
3782 visit_store_ssbo(ctx, instr);
3783 break;
3784 case nir_intrinsic_load_ssbo:
3785 result = visit_load_buffer(ctx, instr);
3786 break;
3787 case nir_intrinsic_ssbo_atomic_add:
3788 case nir_intrinsic_ssbo_atomic_imin:
3789 case nir_intrinsic_ssbo_atomic_umin:
3790 case nir_intrinsic_ssbo_atomic_imax:
3791 case nir_intrinsic_ssbo_atomic_umax:
3792 case nir_intrinsic_ssbo_atomic_and:
3793 case nir_intrinsic_ssbo_atomic_or:
3794 case nir_intrinsic_ssbo_atomic_xor:
3795 case nir_intrinsic_ssbo_atomic_exchange:
3796 case nir_intrinsic_ssbo_atomic_comp_swap:
3797 result = visit_atomic_ssbo(ctx, instr);
3798 break;
3799 case nir_intrinsic_load_ubo:
3800 result = visit_load_ubo_buffer(ctx, instr);
3801 break;
3802 case nir_intrinsic_get_buffer_size:
3803 result = visit_get_buffer_size(ctx, instr);
3804 break;
3805 case nir_intrinsic_load_deref:
3806 result = visit_load_var(ctx, instr);
3807 break;
3808 case nir_intrinsic_store_deref:
3809 visit_store_var(ctx, instr);
3810 break;
3811 case nir_intrinsic_load_shared:
3812 result = visit_load_shared(ctx, instr);
3813 break;
3814 case nir_intrinsic_store_shared:
3815 visit_store_shared(ctx, instr);
3816 break;
3817 case nir_intrinsic_bindless_image_samples:
3818 case nir_intrinsic_image_deref_samples:
3819 result = visit_image_samples(ctx, instr);
3820 break;
3821 case nir_intrinsic_bindless_image_load:
3822 result = visit_image_load(ctx, instr, true);
3823 break;
3824 case nir_intrinsic_image_deref_load:
3825 result = visit_image_load(ctx, instr, false);
3826 break;
3827 case nir_intrinsic_bindless_image_store:
3828 visit_image_store(ctx, instr, true);
3829 break;
3830 case nir_intrinsic_image_deref_store:
3831 visit_image_store(ctx, instr, false);
3832 break;
3833 case nir_intrinsic_bindless_image_atomic_add:
3834 case nir_intrinsic_bindless_image_atomic_imin:
3835 case nir_intrinsic_bindless_image_atomic_umin:
3836 case nir_intrinsic_bindless_image_atomic_imax:
3837 case nir_intrinsic_bindless_image_atomic_umax:
3838 case nir_intrinsic_bindless_image_atomic_and:
3839 case nir_intrinsic_bindless_image_atomic_or:
3840 case nir_intrinsic_bindless_image_atomic_xor:
3841 case nir_intrinsic_bindless_image_atomic_exchange:
3842 case nir_intrinsic_bindless_image_atomic_comp_swap:
3843 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3844 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3845 result = visit_image_atomic(ctx, instr, true);
3846 break;
3847 case nir_intrinsic_image_deref_atomic_add:
3848 case nir_intrinsic_image_deref_atomic_imin:
3849 case nir_intrinsic_image_deref_atomic_umin:
3850 case nir_intrinsic_image_deref_atomic_imax:
3851 case nir_intrinsic_image_deref_atomic_umax:
3852 case nir_intrinsic_image_deref_atomic_and:
3853 case nir_intrinsic_image_deref_atomic_or:
3854 case nir_intrinsic_image_deref_atomic_xor:
3855 case nir_intrinsic_image_deref_atomic_exchange:
3856 case nir_intrinsic_image_deref_atomic_comp_swap:
3857 case nir_intrinsic_image_deref_atomic_inc_wrap:
3858 case nir_intrinsic_image_deref_atomic_dec_wrap:
3859 result = visit_image_atomic(ctx, instr, false);
3860 break;
3861 case nir_intrinsic_bindless_image_size:
3862 result = visit_image_size(ctx, instr, true);
3863 break;
3864 case nir_intrinsic_image_deref_size:
3865 result = visit_image_size(ctx, instr, false);
3866 break;
3867 case nir_intrinsic_shader_clock:
3868 result = ac_build_shader_clock(&ctx->ac,
3869 nir_intrinsic_memory_scope(instr));
3870 break;
3871 case nir_intrinsic_discard:
3872 case nir_intrinsic_discard_if:
3873 emit_discard(ctx, instr);
3874 break;
3875 case nir_intrinsic_demote:
3876 case nir_intrinsic_demote_if:
3877 emit_demote(ctx, instr);
3878 break;
3879 case nir_intrinsic_memory_barrier:
3880 case nir_intrinsic_group_memory_barrier:
3881 case nir_intrinsic_memory_barrier_buffer:
3882 case nir_intrinsic_memory_barrier_image:
3883 case nir_intrinsic_memory_barrier_shared:
3884 emit_membar(&ctx->ac, instr);
3885 break;
3886 case nir_intrinsic_memory_barrier_tcs_patch:
3887 break;
3888 case nir_intrinsic_control_barrier:
3889 ac_emit_barrier(&ctx->ac, ctx->stage);
3890 break;
3891 case nir_intrinsic_shared_atomic_add:
3892 case nir_intrinsic_shared_atomic_imin:
3893 case nir_intrinsic_shared_atomic_umin:
3894 case nir_intrinsic_shared_atomic_imax:
3895 case nir_intrinsic_shared_atomic_umax:
3896 case nir_intrinsic_shared_atomic_and:
3897 case nir_intrinsic_shared_atomic_or:
3898 case nir_intrinsic_shared_atomic_xor:
3899 case nir_intrinsic_shared_atomic_exchange:
3900 case nir_intrinsic_shared_atomic_comp_swap: {
3901 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3902 instr->src[1].ssa->bit_size);
3903 result = visit_var_atomic(ctx, instr, ptr, 1);
3904 break;
3905 }
3906 case nir_intrinsic_deref_atomic_add:
3907 case nir_intrinsic_deref_atomic_imin:
3908 case nir_intrinsic_deref_atomic_umin:
3909 case nir_intrinsic_deref_atomic_imax:
3910 case nir_intrinsic_deref_atomic_umax:
3911 case nir_intrinsic_deref_atomic_and:
3912 case nir_intrinsic_deref_atomic_or:
3913 case nir_intrinsic_deref_atomic_xor:
3914 case nir_intrinsic_deref_atomic_exchange:
3915 case nir_intrinsic_deref_atomic_comp_swap: {
3916 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3917 result = visit_var_atomic(ctx, instr, ptr, 1);
3918 break;
3919 }
3920 case nir_intrinsic_load_barycentric_pixel:
3921 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3922 break;
3923 case nir_intrinsic_load_barycentric_centroid:
3924 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3925 break;
3926 case nir_intrinsic_load_barycentric_sample:
3927 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3928 break;
3929 case nir_intrinsic_load_barycentric_model:
3930 result = barycentric_model(ctx);
3931 break;
3932 case nir_intrinsic_load_barycentric_at_offset: {
3933 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3934 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3935 break;
3936 }
3937 case nir_intrinsic_load_barycentric_at_sample: {
3938 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3939 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3940 break;
3941 }
3942 case nir_intrinsic_load_interpolated_input: {
3943 /* We assume any indirect loads have been lowered away */
3944 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3945 assert(offset);
3946 assert(offset[0].i32 == 0);
3947
3948 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3949 unsigned index = nir_intrinsic_base(instr);
3950 unsigned component = nir_intrinsic_component(instr);
3951 result = load_interpolated_input(ctx, interp_param, index,
3952 component,
3953 instr->dest.ssa.num_components,
3954 instr->dest.ssa.bit_size);
3955 break;
3956 }
3957 case nir_intrinsic_load_input:
3958 case nir_intrinsic_load_input_vertex:
3959 result = load_input(ctx, instr);
3960 break;
3961 case nir_intrinsic_emit_vertex:
3962 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3963 break;
3964 case nir_intrinsic_emit_vertex_with_counter: {
3965 unsigned stream = nir_intrinsic_stream_id(instr);
3966 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
3967 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
3968 next_vertex,
3969 ctx->abi->outputs);
3970 break;
3971 }
3972 case nir_intrinsic_end_primitive:
3973 case nir_intrinsic_end_primitive_with_counter:
3974 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3975 break;
3976 case nir_intrinsic_load_tess_coord:
3977 result = ctx->abi->load_tess_coord(ctx->abi);
3978 break;
3979 case nir_intrinsic_load_tess_level_outer:
3980 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3981 break;
3982 case nir_intrinsic_load_tess_level_inner:
3983 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3984 break;
3985 case nir_intrinsic_load_tess_level_outer_default:
3986 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3987 break;
3988 case nir_intrinsic_load_tess_level_inner_default:
3989 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3990 break;
3991 case nir_intrinsic_load_patch_vertices_in:
3992 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3993 break;
3994 case nir_intrinsic_vote_all: {
3995 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3996 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3997 break;
3998 }
3999 case nir_intrinsic_vote_any: {
4000 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4001 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4002 break;
4003 }
4004 case nir_intrinsic_shuffle:
4005 if (ctx->ac.chip_class == GFX8 ||
4006 ctx->ac.chip_class == GFX9 ||
4007 (ctx->ac.chip_class == GFX10 && ctx->ac.wave_size == 32)) {
4008 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4009 get_src(ctx, instr->src[1]));
4010 } else {
4011 LLVMValueRef src = get_src(ctx, instr->src[0]);
4012 LLVMValueRef index = get_src(ctx, instr->src[1]);
4013 LLVMTypeRef type = LLVMTypeOf(src);
4014 struct waterfall_context wctx;
4015 LLVMValueRef index_val;
4016
4017 index_val = enter_waterfall(ctx, &wctx, index, true);
4018
4019 src = LLVMBuildZExt(ctx->ac.builder, src,
4020 ctx->ac.i32, "");
4021
4022 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4023 ctx->ac.i32,
4024 (LLVMValueRef []) { src, index_val }, 2,
4025 AC_FUNC_ATTR_READNONE |
4026 AC_FUNC_ATTR_CONVERGENT);
4027
4028 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4029
4030 result = exit_waterfall(ctx, &wctx, result);
4031 }
4032 break;
4033 case nir_intrinsic_reduce:
4034 result = ac_build_reduce(&ctx->ac,
4035 get_src(ctx, instr->src[0]),
4036 instr->const_index[0],
4037 instr->const_index[1]);
4038 break;
4039 case nir_intrinsic_inclusive_scan:
4040 result = ac_build_inclusive_scan(&ctx->ac,
4041 get_src(ctx, instr->src[0]),
4042 instr->const_index[0]);
4043 break;
4044 case nir_intrinsic_exclusive_scan:
4045 result = ac_build_exclusive_scan(&ctx->ac,
4046 get_src(ctx, instr->src[0]),
4047 instr->const_index[0]);
4048 break;
4049 case nir_intrinsic_quad_broadcast: {
4050 unsigned lane = nir_src_as_uint(instr->src[1]);
4051 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4052 lane, lane, lane, lane);
4053 break;
4054 }
4055 case nir_intrinsic_quad_swap_horizontal:
4056 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4057 break;
4058 case nir_intrinsic_quad_swap_vertical:
4059 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4060 break;
4061 case nir_intrinsic_quad_swap_diagonal:
4062 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4063 break;
4064 case nir_intrinsic_quad_swizzle_amd: {
4065 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4066 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4067 mask & 0x3, (mask >> 2) & 0x3,
4068 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4069 break;
4070 }
4071 case nir_intrinsic_masked_swizzle_amd: {
4072 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4073 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4074 break;
4075 }
4076 case nir_intrinsic_write_invocation_amd:
4077 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4078 get_src(ctx, instr->src[1]),
4079 get_src(ctx, instr->src[2]));
4080 break;
4081 case nir_intrinsic_mbcnt_amd:
4082 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4083 break;
4084 case nir_intrinsic_load_scratch: {
4085 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4086 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4087 offset);
4088 LLVMTypeRef comp_type =
4089 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4090 LLVMTypeRef vec_type =
4091 instr->dest.ssa.num_components == 1 ? comp_type :
4092 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4093 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4094 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4095 LLVMPointerType(vec_type, addr_space), "");
4096 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4097 break;
4098 }
4099 case nir_intrinsic_store_scratch: {
4100 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4101 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4102 offset);
4103 LLVMTypeRef comp_type =
4104 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4105 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4106 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4107 LLVMPointerType(comp_type, addr_space), "");
4108 LLVMValueRef src = get_src(ctx, instr->src[0]);
4109 unsigned wrmask = nir_intrinsic_write_mask(instr);
4110 while (wrmask) {
4111 int start, count;
4112 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4113
4114 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4115 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4116 LLVMTypeRef vec_type =
4117 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4118 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4119 offset_ptr,
4120 LLVMPointerType(vec_type, addr_space),
4121 "");
4122 LLVMValueRef offset_src =
4123 ac_extract_components(&ctx->ac, src, start, count);
4124 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4125 }
4126 break;
4127 }
4128 case nir_intrinsic_load_constant: {
4129 unsigned base = nir_intrinsic_base(instr);
4130 unsigned range = nir_intrinsic_range(instr);
4131
4132 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4133 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4134 LLVMConstInt(ctx->ac.i32, base, false), "");
4135
4136 /* Clamp the offset to avoid out-of-bound access because global
4137 * instructions can't handle them.
4138 */
4139 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4140 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4141 offset, size, "");
4142 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4143
4144 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4145 offset);
4146 LLVMTypeRef comp_type =
4147 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4148 LLVMTypeRef vec_type =
4149 instr->dest.ssa.num_components == 1 ? comp_type :
4150 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4151 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4152 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4153 LLVMPointerType(vec_type, addr_space), "");
4154 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4155 break;
4156 }
4157 default:
4158 fprintf(stderr, "Unknown intrinsic: ");
4159 nir_print_instr(&instr->instr, stderr);
4160 fprintf(stderr, "\n");
4161 break;
4162 }
4163 if (result) {
4164 ctx->ssa_defs[instr->dest.ssa.index] = result;
4165 }
4166 }
4167
4168 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4169 unsigned base_index,
4170 unsigned constant_index,
4171 LLVMValueRef dynamic_index)
4172 {
4173 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4174 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4175 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4176
4177 /* Bindless uniforms are 64bit so multiple index by 8 */
4178 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4179 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4180
4181 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4182
4183 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4184 NULL, 0, 0, true, true);
4185
4186 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4187 }
4188
4189 struct sampler_desc_address {
4190 unsigned descriptor_set;
4191 unsigned base_index; /* binding in vulkan */
4192 unsigned constant_index;
4193 LLVMValueRef dynamic_index;
4194 bool image;
4195 bool bindless;
4196 };
4197
4198 static struct sampler_desc_address
4199 get_sampler_desc_internal(struct ac_nir_context *ctx,
4200 nir_deref_instr *deref_instr,
4201 const nir_instr *instr,
4202 bool image)
4203 {
4204 LLVMValueRef index = NULL;
4205 unsigned constant_index = 0;
4206 unsigned descriptor_set;
4207 unsigned base_index;
4208 bool bindless = false;
4209
4210 if (!deref_instr) {
4211 descriptor_set = 0;
4212 if (image) {
4213 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4214 base_index = 0;
4215 bindless = true;
4216 index = get_src(ctx, img_instr->src[0]);
4217 } else {
4218 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4219 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4220 nir_tex_src_sampler_handle);
4221 if (sampSrcIdx != -1) {
4222 base_index = 0;
4223 bindless = true;
4224 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4225 } else {
4226 assert(tex_instr && !image);
4227 base_index = tex_instr->sampler_index;
4228 }
4229 }
4230 } else {
4231 while(deref_instr->deref_type != nir_deref_type_var) {
4232 if (deref_instr->deref_type == nir_deref_type_array) {
4233 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4234 if (!array_size)
4235 array_size = 1;
4236
4237 if (nir_src_is_const(deref_instr->arr.index)) {
4238 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4239 } else {
4240 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4241
4242 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4243 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4244
4245 if (!index)
4246 index = indirect;
4247 else
4248 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4249 }
4250
4251 deref_instr = nir_src_as_deref(deref_instr->parent);
4252 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4253 unsigned sidx = deref_instr->strct.index;
4254 deref_instr = nir_src_as_deref(deref_instr->parent);
4255 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4256 } else {
4257 unreachable("Unsupported deref type");
4258 }
4259 }
4260 descriptor_set = deref_instr->var->data.descriptor_set;
4261
4262 if (deref_instr->var->data.bindless) {
4263 /* For now just assert on unhandled variable types */
4264 assert(deref_instr->var->data.mode == nir_var_uniform);
4265
4266 base_index = deref_instr->var->data.driver_location;
4267 bindless = true;
4268
4269 index = index ? index : ctx->ac.i32_0;
4270 index = get_bindless_index_from_uniform(ctx, base_index,
4271 constant_index, index);
4272 } else
4273 base_index = deref_instr->var->data.binding;
4274 }
4275 return (struct sampler_desc_address) {
4276 .descriptor_set = descriptor_set,
4277 .base_index = base_index,
4278 .constant_index = constant_index,
4279 .dynamic_index = index,
4280 .image = image,
4281 .bindless = bindless,
4282 };
4283 }
4284
4285 /* Extract any possibly divergent index into a separate value that can be fed
4286 * into get_sampler_desc with the same arguments. */
4287 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4288 nir_deref_instr *deref_instr,
4289 const nir_instr *instr,
4290 bool image)
4291 {
4292 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4293 return addr.dynamic_index;
4294 }
4295
4296 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4297 nir_deref_instr *deref_instr,
4298 enum ac_descriptor_type desc_type,
4299 const nir_instr *instr,
4300 LLVMValueRef index,
4301 bool image, bool write)
4302 {
4303 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4304 return ctx->abi->load_sampler_desc(ctx->abi,
4305 addr.descriptor_set,
4306 addr.base_index,
4307 addr.constant_index, index,
4308 desc_type, addr.image, write, addr.bindless);
4309 }
4310
4311 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4312 *
4313 * GFX6-GFX7:
4314 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4315 * filtering manually. The driver sets img7 to a mask clearing
4316 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4317 * s_and_b32 samp0, samp0, img7
4318 *
4319 * GFX8:
4320 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4321 */
4322 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4323 LLVMValueRef res, LLVMValueRef samp)
4324 {
4325 LLVMBuilderRef builder = ctx->ac.builder;
4326 LLVMValueRef img7, samp0;
4327
4328 if (ctx->ac.chip_class >= GFX8)
4329 return samp;
4330
4331 img7 = LLVMBuildExtractElement(builder, res,
4332 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4333 samp0 = LLVMBuildExtractElement(builder, samp,
4334 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4335 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4336 return LLVMBuildInsertElement(builder, samp, samp0,
4337 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4338 }
4339
4340 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4341 nir_tex_instr *instr,
4342 struct waterfall_context *wctx,
4343 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4344 LLVMValueRef *fmask_ptr)
4345 {
4346 nir_deref_instr *texture_deref_instr = NULL;
4347 nir_deref_instr *sampler_deref_instr = NULL;
4348 int plane = -1;
4349
4350 for (unsigned i = 0; i < instr->num_srcs; i++) {
4351 switch (instr->src[i].src_type) {
4352 case nir_tex_src_texture_deref:
4353 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4354 break;
4355 case nir_tex_src_sampler_deref:
4356 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4357 break;
4358 case nir_tex_src_plane:
4359 plane = nir_src_as_int(instr->src[i].src);
4360 break;
4361 default:
4362 break;
4363 }
4364 }
4365
4366 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4367 &instr->instr, false);
4368 if (!sampler_deref_instr)
4369 sampler_deref_instr = texture_deref_instr;
4370
4371 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4372 &instr->instr, false);
4373 if (instr->texture_non_uniform)
4374 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4375
4376 if (instr->sampler_non_uniform)
4377 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4378
4379 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4380
4381 if (plane >= 0) {
4382 assert(instr->op != nir_texop_txf_ms &&
4383 instr->op != nir_texop_samples_identical);
4384 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4385
4386 main_descriptor = AC_DESC_PLANE_0 + plane;
4387 }
4388
4389 if (instr->op == nir_texop_fragment_mask_fetch) {
4390 /* The fragment mask is fetched from the compressed
4391 * multisampled surface.
4392 */
4393 main_descriptor = AC_DESC_FMASK;
4394 }
4395
4396 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4397 texture_dynamic_index, false, false);
4398
4399 if (samp_ptr) {
4400 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4401 sampler_dynamic_index, false, false);
4402 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4403 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4404 }
4405 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4406 instr->op == nir_texop_samples_identical))
4407 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4408 &instr->instr, texture_dynamic_index, false, false);
4409 }
4410
4411 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4412 LLVMValueRef coord)
4413 {
4414 coord = ac_to_float(ctx, coord);
4415 coord = ac_build_round(ctx, coord);
4416 coord = ac_to_integer(ctx, coord);
4417 return coord;
4418 }
4419
4420 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4421 {
4422 LLVMValueRef result = NULL;
4423 struct ac_image_args args = { 0 };
4424 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4425 LLVMValueRef ddx = NULL, ddy = NULL;
4426 unsigned offset_src = 0;
4427 struct waterfall_context wctx[2] = {{{0}}};
4428
4429 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4430
4431 for (unsigned i = 0; i < instr->num_srcs; i++) {
4432 switch (instr->src[i].src_type) {
4433 case nir_tex_src_coord: {
4434 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4435 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4436 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4437 break;
4438 }
4439 case nir_tex_src_projector:
4440 break;
4441 case nir_tex_src_comparator:
4442 if (instr->is_shadow) {
4443 args.compare = get_src(ctx, instr->src[i].src);
4444 args.compare = ac_to_float(&ctx->ac, args.compare);
4445 }
4446 break;
4447 case nir_tex_src_offset:
4448 args.offset = get_src(ctx, instr->src[i].src);
4449 offset_src = i;
4450 break;
4451 case nir_tex_src_bias:
4452 args.bias = get_src(ctx, instr->src[i].src);
4453 break;
4454 case nir_tex_src_lod: {
4455 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4456 args.level_zero = true;
4457 else
4458 args.lod = get_src(ctx, instr->src[i].src);
4459 break;
4460 }
4461 case nir_tex_src_ms_index:
4462 sample_index = get_src(ctx, instr->src[i].src);
4463 break;
4464 case nir_tex_src_ms_mcs:
4465 break;
4466 case nir_tex_src_ddx:
4467 ddx = get_src(ctx, instr->src[i].src);
4468 break;
4469 case nir_tex_src_ddy:
4470 ddy = get_src(ctx, instr->src[i].src);
4471 break;
4472 case nir_tex_src_min_lod:
4473 args.min_lod = get_src(ctx, instr->src[i].src);
4474 break;
4475 case nir_tex_src_texture_offset:
4476 case nir_tex_src_sampler_offset:
4477 case nir_tex_src_plane:
4478 default:
4479 break;
4480 }
4481 }
4482
4483 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4484 result = get_buffer_size(ctx, args.resource, true);
4485 goto write_result;
4486 }
4487
4488 if (instr->op == nir_texop_texture_samples) {
4489 LLVMValueRef res, samples, is_msaa;
4490 LLVMValueRef default_sample;
4491
4492 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4493 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4494 LLVMConstInt(ctx->ac.i32, 3, false), "");
4495 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4496 LLVMConstInt(ctx->ac.i32, 28, false), "");
4497 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4498 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4499 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4500 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4501
4502 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4503 LLVMConstInt(ctx->ac.i32, 16, false), "");
4504 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4505 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4506 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4507 samples, "");
4508
4509 if (ctx->abi->robust_buffer_access) {
4510 LLVMValueRef dword1, is_null_descriptor;
4511
4512 /* Extract the second dword of the descriptor, if it's
4513 * all zero, then it's a null descriptor.
4514 */
4515 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4516 LLVMConstInt(ctx->ac.i32, 1, false), "");
4517 is_null_descriptor =
4518 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4519 LLVMConstInt(ctx->ac.i32, 0, false), "");
4520 default_sample =
4521 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4522 ctx->ac.i32_0, ctx->ac.i32_1, "");
4523 } else {
4524 default_sample = ctx->ac.i32_1;
4525 }
4526
4527 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4528 default_sample, "");
4529 result = samples;
4530 goto write_result;
4531 }
4532
4533 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4534 LLVMValueRef offset[3], pack;
4535 for (unsigned chan = 0; chan < 3; ++chan)
4536 offset[chan] = ctx->ac.i32_0;
4537
4538 unsigned num_components = ac_get_llvm_num_components(args.offset);
4539 for (unsigned chan = 0; chan < num_components; chan++) {
4540 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4541 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4542 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4543 if (chan)
4544 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4545 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4546 }
4547 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4548 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4549 args.offset = pack;
4550 }
4551
4552 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4553 * OpenGL 4.5 spec says:
4554 *
4555 * "If the texture’s internal format indicates a fixed-point
4556 * depth texture, then D_t and D_ref are clamped to the
4557 * range [0, 1]; otherwise no clamping is performed."
4558 *
4559 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4560 * so the depth comparison value isn't clamped for Z16 and
4561 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4562 * an explicitly clamped 32-bit float format.
4563 */
4564 if (args.compare &&
4565 ctx->ac.chip_class >= GFX8 &&
4566 ctx->ac.chip_class <= GFX9 &&
4567 ctx->abi->clamp_shadow_reference) {
4568 LLVMValueRef upgraded, clamped;
4569
4570 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4571 LLVMConstInt(ctx->ac.i32, 3, false), "");
4572 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4573 LLVMConstInt(ctx->ac.i32, 29, false), "");
4574 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4575 clamped = ac_build_clamp(&ctx->ac, args.compare);
4576 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4577 args.compare, "");
4578 }
4579
4580 /* pack derivatives */
4581 if (ddx || ddy) {
4582 int num_src_deriv_channels, num_dest_deriv_channels;
4583 switch (instr->sampler_dim) {
4584 case GLSL_SAMPLER_DIM_3D:
4585 case GLSL_SAMPLER_DIM_CUBE:
4586 num_src_deriv_channels = 3;
4587 num_dest_deriv_channels = 3;
4588 break;
4589 case GLSL_SAMPLER_DIM_2D:
4590 default:
4591 num_src_deriv_channels = 2;
4592 num_dest_deriv_channels = 2;
4593 break;
4594 case GLSL_SAMPLER_DIM_1D:
4595 num_src_deriv_channels = 1;
4596 if (ctx->ac.chip_class == GFX9) {
4597 num_dest_deriv_channels = 2;
4598 } else {
4599 num_dest_deriv_channels = 1;
4600 }
4601 break;
4602 }
4603
4604 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4605 args.derivs[i] = ac_to_float(&ctx->ac,
4606 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4607 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4608 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4609 }
4610 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4611 args.derivs[i] = ctx->ac.f32_0;
4612 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4613 }
4614 }
4615
4616 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4617 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4618 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4619 if (instr->coord_components == 3)
4620 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4621 ac_prepare_cube_coords(&ctx->ac,
4622 instr->op == nir_texop_txd, instr->is_array,
4623 instr->op == nir_texop_lod, args.coords, args.derivs);
4624 }
4625
4626 /* Texture coordinates fixups */
4627 if (instr->coord_components > 1 &&
4628 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4629 instr->is_array &&
4630 instr->op != nir_texop_txf) {
4631 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4632 }
4633
4634 if (instr->coord_components > 2 &&
4635 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4636 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4637 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4638 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4639 instr->is_array &&
4640 instr->op != nir_texop_txf &&
4641 instr->op != nir_texop_txf_ms &&
4642 instr->op != nir_texop_fragment_fetch &&
4643 instr->op != nir_texop_fragment_mask_fetch) {
4644 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4645 }
4646
4647 if (ctx->ac.chip_class == GFX9 &&
4648 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4649 instr->op != nir_texop_lod) {
4650 LLVMValueRef filler;
4651 if (instr->op == nir_texop_txf)
4652 filler = ctx->ac.i32_0;
4653 else
4654 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4655
4656 if (instr->is_array)
4657 args.coords[2] = args.coords[1];
4658 args.coords[1] = filler;
4659 }
4660
4661 /* Pack sample index */
4662 if (sample_index && (instr->op == nir_texop_txf_ms ||
4663 instr->op == nir_texop_fragment_fetch))
4664 args.coords[instr->coord_components] = sample_index;
4665
4666 if (instr->op == nir_texop_samples_identical) {
4667 struct ac_image_args txf_args = { 0 };
4668 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4669
4670 txf_args.dmask = 0xf;
4671 txf_args.resource = fmask_ptr;
4672 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4673 result = build_tex_intrinsic(ctx, instr, &txf_args);
4674
4675 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4676 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4677 goto write_result;
4678 }
4679
4680 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4681 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4682 instr->op != nir_texop_txs &&
4683 instr->op != nir_texop_fragment_fetch &&
4684 instr->op != nir_texop_fragment_mask_fetch) {
4685 unsigned sample_chan = instr->is_array ? 3 : 2;
4686 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4687 &ctx->ac, args.coords[0], args.coords[1],
4688 instr->is_array ? args.coords[2] : NULL,
4689 args.coords[sample_chan], fmask_ptr);
4690 }
4691
4692 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4693 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4694 num_offsets = MIN2(num_offsets, instr->coord_components);
4695 for (unsigned i = 0; i < num_offsets; ++i) {
4696 args.coords[i] = LLVMBuildAdd(
4697 ctx->ac.builder, args.coords[i],
4698 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4699 }
4700 args.offset = NULL;
4701 }
4702
4703 /* DMASK was repurposed for GATHER4. 4 components are always
4704 * returned and DMASK works like a swizzle - it selects
4705 * the component to fetch. The only valid DMASK values are
4706 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4707 * (red,red,red,red) etc.) The ISA document doesn't mention
4708 * this.
4709 */
4710 args.dmask = 0xf;
4711 if (instr->op == nir_texop_tg4) {
4712 if (instr->is_shadow)
4713 args.dmask = 1;
4714 else
4715 args.dmask = 1 << instr->component;
4716 }
4717
4718 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4719 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4720 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4721 }
4722
4723 /* Adjust the number of coordinates because we only need (x,y) for 2D
4724 * multisampled images and (x,y,layer) for 2D multisampled layered
4725 * images or for multisampled input attachments.
4726 */
4727 if (instr->op == nir_texop_fragment_mask_fetch) {
4728 if (args.dim == ac_image_2dmsaa) {
4729 args.dim = ac_image_2d;
4730 } else {
4731 assert(args.dim == ac_image_2darraymsaa);
4732 args.dim = ac_image_2darray;
4733 }
4734 }
4735
4736 result = build_tex_intrinsic(ctx, instr, &args);
4737
4738 if (instr->op == nir_texop_query_levels)
4739 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4740 else if (instr->is_shadow && instr->is_new_style_shadow &&
4741 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4742 instr->op != nir_texop_tg4)
4743 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4744 else if (instr->op == nir_texop_txs &&
4745 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4746 instr->is_array) {
4747 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4748 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4749 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4750 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4751 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4752 } else if (ctx->ac.chip_class == GFX9 &&
4753 instr->op == nir_texop_txs &&
4754 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4755 instr->is_array) {
4756 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4757 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4758 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4759 ctx->ac.i32_1, "");
4760 } else if (instr->dest.ssa.num_components != 4)
4761 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4762
4763 write_result:
4764 if (result) {
4765 assert(instr->dest.is_ssa);
4766 result = ac_to_integer(&ctx->ac, result);
4767
4768 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4769 result = exit_waterfall(ctx, wctx + i, result);
4770 }
4771
4772 ctx->ssa_defs[instr->dest.ssa.index] = result;
4773 }
4774 }
4775
4776 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4777 {
4778 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4779 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4780
4781 ctx->ssa_defs[instr->dest.ssa.index] = result;
4782 _mesa_hash_table_insert(ctx->phis, instr, result);
4783 }
4784
4785 static void visit_post_phi(struct ac_nir_context *ctx,
4786 nir_phi_instr *instr,
4787 LLVMValueRef llvm_phi)
4788 {
4789 nir_foreach_phi_src(src, instr) {
4790 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4791 LLVMValueRef llvm_src = get_src(ctx, src->src);
4792
4793 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4794 }
4795 }
4796
4797 static void phi_post_pass(struct ac_nir_context *ctx)
4798 {
4799 hash_table_foreach(ctx->phis, entry) {
4800 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4801 (LLVMValueRef)entry->data);
4802 }
4803 }
4804
4805
4806 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4807 nir_foreach_use(use_src, def) {
4808 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4809 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
4810 if (instr->intrinsic == nir_intrinsic_store_deref)
4811 return true;
4812 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
4813 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
4814 if (instr->op == nir_op_vec4 &&
4815 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
4816 return true;
4817 }
4818 }
4819 }
4820 return false;
4821 }
4822
4823 static void visit_ssa_undef(struct ac_nir_context *ctx,
4824 const nir_ssa_undef_instr *instr)
4825 {
4826 unsigned num_components = instr->def.num_components;
4827 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4828
4829 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
4830 LLVMValueRef undef;
4831
4832 if (num_components == 1)
4833 undef = LLVMGetUndef(type);
4834 else {
4835 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4836 }
4837 ctx->ssa_defs[instr->def.index] = undef;
4838 } else {
4839 LLVMValueRef zero = LLVMConstInt(type, 0, false);
4840 if (num_components > 1) {
4841 zero = ac_build_gather_values_extended(
4842 &ctx->ac, &zero, 4, 0, false, false);
4843 }
4844 ctx->ssa_defs[instr->def.index] = zero;
4845 }
4846 }
4847
4848 static void visit_jump(struct ac_llvm_context *ctx,
4849 const nir_jump_instr *instr)
4850 {
4851 switch (instr->type) {
4852 case nir_jump_break:
4853 ac_build_break(ctx);
4854 break;
4855 case nir_jump_continue:
4856 ac_build_continue(ctx);
4857 break;
4858 default:
4859 fprintf(stderr, "Unknown NIR jump instr: ");
4860 nir_print_instr(&instr->instr, stderr);
4861 fprintf(stderr, "\n");
4862 abort();
4863 }
4864 }
4865
4866 static LLVMTypeRef
4867 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4868 enum glsl_base_type type)
4869 {
4870 switch (type) {
4871 case GLSL_TYPE_INT:
4872 case GLSL_TYPE_UINT:
4873 case GLSL_TYPE_BOOL:
4874 case GLSL_TYPE_SUBROUTINE:
4875 return ac->i32;
4876 case GLSL_TYPE_INT8:
4877 case GLSL_TYPE_UINT8:
4878 return ac->i8;
4879 case GLSL_TYPE_INT16:
4880 case GLSL_TYPE_UINT16:
4881 return ac->i16;
4882 case GLSL_TYPE_FLOAT:
4883 return ac->f32;
4884 case GLSL_TYPE_FLOAT16:
4885 return ac->f16;
4886 case GLSL_TYPE_INT64:
4887 case GLSL_TYPE_UINT64:
4888 return ac->i64;
4889 case GLSL_TYPE_DOUBLE:
4890 return ac->f64;
4891 default:
4892 unreachable("unknown GLSL type");
4893 }
4894 }
4895
4896 static LLVMTypeRef
4897 glsl_to_llvm_type(struct ac_llvm_context *ac,
4898 const struct glsl_type *type)
4899 {
4900 if (glsl_type_is_scalar(type)) {
4901 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4902 }
4903
4904 if (glsl_type_is_vector(type)) {
4905 return LLVMVectorType(
4906 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4907 glsl_get_vector_elements(type));
4908 }
4909
4910 if (glsl_type_is_matrix(type)) {
4911 return LLVMArrayType(
4912 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4913 glsl_get_matrix_columns(type));
4914 }
4915
4916 if (glsl_type_is_array(type)) {
4917 return LLVMArrayType(
4918 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4919 glsl_get_length(type));
4920 }
4921
4922 assert(glsl_type_is_struct_or_ifc(type));
4923
4924 LLVMTypeRef member_types[glsl_get_length(type)];
4925
4926 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4927 member_types[i] =
4928 glsl_to_llvm_type(ac,
4929 glsl_get_struct_field(type, i));
4930 }
4931
4932 return LLVMStructTypeInContext(ac->context, member_types,
4933 glsl_get_length(type), false);
4934 }
4935
4936 static void visit_deref(struct ac_nir_context *ctx,
4937 nir_deref_instr *instr)
4938 {
4939 if (instr->mode != nir_var_mem_shared &&
4940 instr->mode != nir_var_mem_global)
4941 return;
4942
4943 LLVMValueRef result = NULL;
4944 switch(instr->deref_type) {
4945 case nir_deref_type_var: {
4946 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4947 result = entry->data;
4948 break;
4949 }
4950 case nir_deref_type_struct:
4951 if (instr->mode == nir_var_mem_global) {
4952 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4953 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4954 instr->strct.index);
4955 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4956 LLVMConstInt(ctx->ac.i32, offset, 0));
4957 } else {
4958 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4959 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4960 }
4961 break;
4962 case nir_deref_type_array:
4963 if (instr->mode == nir_var_mem_global) {
4964 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4965 unsigned stride = glsl_get_explicit_stride(parent->type);
4966
4967 if ((glsl_type_is_matrix(parent->type) &&
4968 glsl_matrix_type_is_row_major(parent->type)) ||
4969 (glsl_type_is_vector(parent->type) && stride == 0))
4970 stride = type_scalar_size_bytes(parent->type);
4971
4972 assert(stride > 0);
4973 LLVMValueRef index = get_src(ctx, instr->arr.index);
4974 if (LLVMTypeOf(index) != ctx->ac.i64)
4975 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4976
4977 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4978
4979 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4980 } else {
4981 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4982 get_src(ctx, instr->arr.index));
4983 }
4984 break;
4985 case nir_deref_type_ptr_as_array:
4986 if (instr->mode == nir_var_mem_global) {
4987 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4988
4989 LLVMValueRef index = get_src(ctx, instr->arr.index);
4990 if (LLVMTypeOf(index) != ctx->ac.i64)
4991 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4992
4993 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4994
4995 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4996 } else {
4997 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4998 get_src(ctx, instr->arr.index));
4999 }
5000 break;
5001 case nir_deref_type_cast: {
5002 result = get_src(ctx, instr->parent);
5003
5004 /* We can't use the structs from LLVM because the shader
5005 * specifies its own offsets. */
5006 LLVMTypeRef pointee_type = ctx->ac.i8;
5007 if (instr->mode == nir_var_mem_shared)
5008 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5009
5010 unsigned address_space;
5011
5012 switch(instr->mode) {
5013 case nir_var_mem_shared:
5014 address_space = AC_ADDR_SPACE_LDS;
5015 break;
5016 case nir_var_mem_global:
5017 address_space = AC_ADDR_SPACE_GLOBAL;
5018 break;
5019 default:
5020 unreachable("Unhandled address space");
5021 }
5022
5023 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5024
5025 if (LLVMTypeOf(result) != type) {
5026 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5027 result = LLVMBuildBitCast(ctx->ac.builder, result,
5028 type, "");
5029 } else {
5030 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5031 type, "");
5032 }
5033 }
5034 break;
5035 }
5036 default:
5037 unreachable("Unhandled deref_instr deref type");
5038 }
5039
5040 ctx->ssa_defs[instr->dest.ssa.index] = result;
5041 }
5042
5043 static void visit_cf_list(struct ac_nir_context *ctx,
5044 struct exec_list *list);
5045
5046 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5047 {
5048 nir_foreach_instr(instr, block)
5049 {
5050 switch (instr->type) {
5051 case nir_instr_type_alu:
5052 visit_alu(ctx, nir_instr_as_alu(instr));
5053 break;
5054 case nir_instr_type_load_const:
5055 visit_load_const(ctx, nir_instr_as_load_const(instr));
5056 break;
5057 case nir_instr_type_intrinsic:
5058 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5059 break;
5060 case nir_instr_type_tex:
5061 visit_tex(ctx, nir_instr_as_tex(instr));
5062 break;
5063 case nir_instr_type_phi:
5064 visit_phi(ctx, nir_instr_as_phi(instr));
5065 break;
5066 case nir_instr_type_ssa_undef:
5067 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5068 break;
5069 case nir_instr_type_jump:
5070 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5071 break;
5072 case nir_instr_type_deref:
5073 visit_deref(ctx, nir_instr_as_deref(instr));
5074 break;
5075 default:
5076 fprintf(stderr, "Unknown NIR instr type: ");
5077 nir_print_instr(instr, stderr);
5078 fprintf(stderr, "\n");
5079 abort();
5080 }
5081 }
5082
5083 _mesa_hash_table_insert(ctx->defs, block,
5084 LLVMGetInsertBlock(ctx->ac.builder));
5085 }
5086
5087 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5088 {
5089 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5090
5091 nir_block *then_block =
5092 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5093
5094 ac_build_uif(&ctx->ac, value, then_block->index);
5095
5096 visit_cf_list(ctx, &if_stmt->then_list);
5097
5098 if (!exec_list_is_empty(&if_stmt->else_list)) {
5099 nir_block *else_block =
5100 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5101
5102 ac_build_else(&ctx->ac, else_block->index);
5103 visit_cf_list(ctx, &if_stmt->else_list);
5104 }
5105
5106 ac_build_endif(&ctx->ac, then_block->index);
5107 }
5108
5109 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5110 {
5111 nir_block *first_loop_block =
5112 (nir_block *) exec_list_get_head(&loop->body);
5113
5114 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5115
5116 visit_cf_list(ctx, &loop->body);
5117
5118 ac_build_endloop(&ctx->ac, first_loop_block->index);
5119 }
5120
5121 static void visit_cf_list(struct ac_nir_context *ctx,
5122 struct exec_list *list)
5123 {
5124 foreach_list_typed(nir_cf_node, node, node, list)
5125 {
5126 switch (node->type) {
5127 case nir_cf_node_block:
5128 visit_block(ctx, nir_cf_node_as_block(node));
5129 break;
5130
5131 case nir_cf_node_if:
5132 visit_if(ctx, nir_cf_node_as_if(node));
5133 break;
5134
5135 case nir_cf_node_loop:
5136 visit_loop(ctx, nir_cf_node_as_loop(node));
5137 break;
5138
5139 default:
5140 assert(0);
5141 }
5142 }
5143 }
5144
5145 void
5146 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5147 struct ac_shader_abi *abi,
5148 struct nir_shader *nir,
5149 struct nir_variable *variable,
5150 gl_shader_stage stage)
5151 {
5152 unsigned output_loc = variable->data.driver_location / 4;
5153 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5154
5155 /* tess ctrl has it's own load/store paths for outputs */
5156 if (stage == MESA_SHADER_TESS_CTRL)
5157 return;
5158
5159 if (stage == MESA_SHADER_VERTEX ||
5160 stage == MESA_SHADER_TESS_EVAL ||
5161 stage == MESA_SHADER_GEOMETRY) {
5162 int idx = variable->data.location + variable->data.index;
5163 if (idx == VARYING_SLOT_CLIP_DIST0) {
5164 int length = nir->info.clip_distance_array_size +
5165 nir->info.cull_distance_array_size;
5166
5167 if (length > 4)
5168 attrib_count = 2;
5169 else
5170 attrib_count = 1;
5171 }
5172 }
5173
5174 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5175 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5176 for (unsigned i = 0; i < attrib_count; ++i) {
5177 for (unsigned chan = 0; chan < 4; chan++) {
5178 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5179 ac_build_alloca_undef(ctx, type, "");
5180 }
5181 }
5182 }
5183
5184 static void
5185 setup_locals(struct ac_nir_context *ctx,
5186 struct nir_function *func)
5187 {
5188 int i, j;
5189 ctx->num_locals = 0;
5190 nir_foreach_variable(variable, &func->impl->locals) {
5191 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5192 variable->data.driver_location = ctx->num_locals * 4;
5193 variable->data.location_frac = 0;
5194 ctx->num_locals += attrib_count;
5195 }
5196 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5197 if (!ctx->locals)
5198 return;
5199
5200 for (i = 0; i < ctx->num_locals; i++) {
5201 for (j = 0; j < 4; j++) {
5202 ctx->locals[i * 4 + j] =
5203 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5204 }
5205 }
5206 }
5207
5208 static void
5209 setup_scratch(struct ac_nir_context *ctx,
5210 struct nir_shader *shader)
5211 {
5212 if (shader->scratch_size == 0)
5213 return;
5214
5215 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5216 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5217 "scratch");
5218 }
5219
5220 static void
5221 setup_constant_data(struct ac_nir_context *ctx,
5222 struct nir_shader *shader)
5223 {
5224 if (!shader->constant_data)
5225 return;
5226
5227 LLVMValueRef data =
5228 LLVMConstStringInContext(ctx->ac.context,
5229 shader->constant_data,
5230 shader->constant_data_size,
5231 true);
5232 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5233
5234 /* We want to put the constant data in the CONST address space so that
5235 * we can use scalar loads. However, LLVM versions before 10 put these
5236 * variables in the same section as the code, which is unacceptable
5237 * for RadeonSI as it needs to relocate all the data sections after
5238 * the code sections. See https://reviews.llvm.org/D65813.
5239 */
5240 unsigned address_space =
5241 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5242
5243 LLVMValueRef global =
5244 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5245 "const_data",
5246 address_space);
5247
5248 LLVMSetInitializer(global, data);
5249 LLVMSetGlobalConstant(global, true);
5250 LLVMSetVisibility(global, LLVMHiddenVisibility);
5251 ctx->constant_data = global;
5252 }
5253
5254 static void
5255 setup_shared(struct ac_nir_context *ctx,
5256 struct nir_shader *nir)
5257 {
5258 if (ctx->ac.lds)
5259 return;
5260
5261 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5262 nir->info.cs.shared_size);
5263
5264 LLVMValueRef lds =
5265 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5266 "compute_lds",
5267 AC_ADDR_SPACE_LDS);
5268 LLVMSetAlignment(lds, 64 * 1024);
5269
5270 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5271 LLVMPointerType(ctx->ac.i8,
5272 AC_ADDR_SPACE_LDS), "");
5273 }
5274
5275 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5276 const struct ac_shader_args *args, struct nir_shader *nir)
5277 {
5278 struct ac_nir_context ctx = {};
5279 struct nir_function *func;
5280
5281 ctx.ac = *ac;
5282 ctx.abi = abi;
5283 ctx.args = args;
5284
5285 ctx.stage = nir->info.stage;
5286 ctx.info = &nir->info;
5287
5288 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5289
5290 nir_foreach_variable(variable, &nir->outputs)
5291 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5292 ctx.stage);
5293
5294 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5295 _mesa_key_pointer_equal);
5296 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5297 _mesa_key_pointer_equal);
5298 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5299 _mesa_key_pointer_equal);
5300
5301 if (ctx.abi->kill_ps_if_inf_interp)
5302 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5303 _mesa_key_pointer_equal);
5304
5305 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5306
5307 nir_index_ssa_defs(func->impl);
5308 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5309
5310 setup_locals(&ctx, func);
5311 setup_scratch(&ctx, nir);
5312 setup_constant_data(&ctx, nir);
5313
5314 if (gl_shader_stage_is_compute(nir->info.stage))
5315 setup_shared(&ctx, nir);
5316
5317 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5318 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5319 /* true = don't kill. */
5320 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5321 }
5322
5323 visit_cf_list(&ctx, &func->impl->body);
5324 phi_post_pass(&ctx);
5325
5326 if (ctx.ac.postponed_kill)
5327 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5328 ctx.ac.postponed_kill, ""));
5329
5330 if (!gl_shader_stage_is_compute(nir->info.stage))
5331 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5332 ctx.abi->outputs);
5333
5334 free(ctx.locals);
5335 free(ctx.ssa_defs);
5336 ralloc_free(ctx.defs);
5337 ralloc_free(ctx.phis);
5338 ralloc_free(ctx.vars);
5339 if (ctx.abi->kill_ps_if_inf_interp)
5340 ralloc_free(ctx.verified_interp);
5341 }
5342
5343 bool
5344 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5345 {
5346 bool progress = false;
5347
5348 /* Lower large variables to scratch first so that we won't bloat the
5349 * shader by generating large if ladders for them. We later lower
5350 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5351 */
5352 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5353 nir_var_function_temp,
5354 256,
5355 glsl_get_natural_size_align_bytes);
5356
5357 /* While it would be nice not to have this flag, we are constrained
5358 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5359 */
5360 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5361
5362 /* TODO: Indirect indexing of GS inputs is unimplemented.
5363 *
5364 * TCS and TES load inputs directly from LDS or offchip memory, so
5365 * indirect indexing is trivial.
5366 */
5367 nir_variable_mode indirect_mask = 0;
5368 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5369 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5370 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5371 !llvm_has_working_vgpr_indexing)) {
5372 indirect_mask |= nir_var_shader_in;
5373 }
5374 if (!llvm_has_working_vgpr_indexing &&
5375 nir->info.stage != MESA_SHADER_TESS_CTRL)
5376 indirect_mask |= nir_var_shader_out;
5377
5378 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5379 * smart enough to handle indirects without causing excess spilling
5380 * causing the gpu to hang.
5381 *
5382 * See the following thread for more details of the problem:
5383 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5384 */
5385 indirect_mask |= nir_var_function_temp;
5386
5387 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5388 return progress;
5389 }
5390
5391 static unsigned
5392 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5393 {
5394 if (intrin->intrinsic != nir_intrinsic_store_deref)
5395 return 0;
5396
5397 nir_variable *var =
5398 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5399
5400 if (var->data.mode != nir_var_shader_out)
5401 return 0;
5402
5403 unsigned writemask = 0;
5404 const int location = var->data.location;
5405 unsigned first_component = var->data.location_frac;
5406 unsigned num_comps = intrin->dest.ssa.num_components;
5407
5408 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5409 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5410 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5411 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5412
5413 return writemask;
5414 }
5415
5416 static void
5417 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5418 unsigned *cond_block_tf_writemask,
5419 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5420 {
5421 switch (cf_node->type) {
5422 case nir_cf_node_block: {
5423 nir_block *block = nir_cf_node_as_block(cf_node);
5424 nir_foreach_instr(instr, block) {
5425 if (instr->type != nir_instr_type_intrinsic)
5426 continue;
5427
5428 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5429 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5430
5431 /* If we find a barrier in nested control flow put this in the
5432 * too hard basket. In GLSL this is not possible but it is in
5433 * SPIR-V.
5434 */
5435 if (is_nested_cf) {
5436 *tessfactors_are_def_in_all_invocs = false;
5437 return;
5438 }
5439
5440 /* The following case must be prevented:
5441 * gl_TessLevelInner = ...;
5442 * barrier();
5443 * if (gl_InvocationID == 1)
5444 * gl_TessLevelInner = ...;
5445 *
5446 * If you consider disjoint code segments separated by barriers, each
5447 * such segment that writes tess factor channels should write the same
5448 * channels in all codepaths within that segment.
5449 */
5450 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5451 /* Accumulate the result: */
5452 *tessfactors_are_def_in_all_invocs &=
5453 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5454
5455 /* Analyze the next code segment from scratch. */
5456 *upper_block_tf_writemask = 0;
5457 *cond_block_tf_writemask = 0;
5458 }
5459 } else
5460 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5461 }
5462
5463 break;
5464 }
5465 case nir_cf_node_if: {
5466 unsigned then_tessfactor_writemask = 0;
5467 unsigned else_tessfactor_writemask = 0;
5468
5469 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5470 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5471 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5472 cond_block_tf_writemask,
5473 tessfactors_are_def_in_all_invocs, true);
5474 }
5475
5476 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5477 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5478 cond_block_tf_writemask,
5479 tessfactors_are_def_in_all_invocs, true);
5480 }
5481
5482 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5483 /* If both statements write the same tess factor channels,
5484 * we can say that the upper block writes them too.
5485 */
5486 *upper_block_tf_writemask |= then_tessfactor_writemask &
5487 else_tessfactor_writemask;
5488 *cond_block_tf_writemask |= then_tessfactor_writemask |
5489 else_tessfactor_writemask;
5490 }
5491
5492 break;
5493 }
5494 case nir_cf_node_loop: {
5495 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5496 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5497 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5498 cond_block_tf_writemask,
5499 tessfactors_are_def_in_all_invocs, true);
5500 }
5501
5502 break;
5503 }
5504 default:
5505 unreachable("unknown cf node type");
5506 }
5507 }
5508
5509 bool
5510 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5511 {
5512 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5513
5514 /* The pass works as follows:
5515 * If all codepaths write tess factors, we can say that all
5516 * invocations define tess factors.
5517 *
5518 * Each tess factor channel is tracked separately.
5519 */
5520 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5521 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5522
5523 /* Initial value = true. Here the pass will accumulate results from
5524 * multiple segments surrounded by barriers. If tess factors aren't
5525 * written at all, it's a shader bug and we don't care if this will be
5526 * true.
5527 */
5528 bool tessfactors_are_def_in_all_invocs = true;
5529
5530 nir_foreach_function(function, nir) {
5531 if (function->impl) {
5532 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5533 scan_tess_ctrl(node, &main_block_tf_writemask,
5534 &cond_block_tf_writemask,
5535 &tessfactors_are_def_in_all_invocs,
5536 false);
5537 }
5538 }
5539 }
5540
5541 /* Accumulate the result for the last code segment separated by a
5542 * barrier.
5543 */
5544 if (main_block_tf_writemask || cond_block_tf_writemask) {
5545 tessfactors_are_def_in_all_invocs &=
5546 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5547 }
5548
5549 return tessfactors_are_def_in_all_invocs;
5550 }