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ac/llvm: add option to clamp division by zero
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0, LLVMValueRef src1)
223 {
224 char name[64], type[64];
225 LLVMValueRef params[] = {
226 ac_to_float(ctx, src0),
227 ac_to_float(ctx, src1),
228 };
229
230 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
231 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
237 const char *intrin,
238 LLVMTypeRef result_type,
239 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
240 {
241 char name[64], type[64];
242 LLVMValueRef params[] = {
243 ac_to_float(ctx, src0),
244 ac_to_float(ctx, src1),
245 ac_to_float(ctx, src2),
246 };
247
248 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
249 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
250 assert(length < sizeof(name));
251 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
252 }
253
254 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
255 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
256 {
257 LLVMTypeRef src1_type = LLVMTypeOf(src1);
258 LLVMTypeRef src2_type = LLVMTypeOf(src2);
259
260 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
261
262 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
263 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
264 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
265 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
266 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
267 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
268 }
269
270 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
271 ctx->i32_0, "");
272 return LLVMBuildSelect(ctx->builder, v,
273 ac_to_integer_or_pointer(ctx, src1),
274 ac_to_integer_or_pointer(ctx, src2), "");
275 }
276
277 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
278 LLVMValueRef src0)
279 {
280 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
281 }
282
283 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
284 const char *intrin,
285 LLVMValueRef src0, LLVMValueRef src1)
286 {
287 LLVMTypeRef ret_type;
288 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
289 LLVMValueRef res;
290 LLVMValueRef params[] = { src0, src1 };
291 ret_type = LLVMStructTypeInContext(ctx->context, types,
292 2, true);
293
294 res = ac_build_intrinsic(ctx, intrin, ret_type,
295 params, 2, AC_FUNC_ATTR_READNONE);
296
297 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
298 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
299 return res;
300 }
301
302 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
303 LLVMValueRef src0,
304 unsigned bitsize)
305 {
306 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
307 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
308 "");
309 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
310
311 switch (bitsize) {
312 case 16:
313 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
314 case 32:
315 return result;
316 case 64:
317 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
318 default:
319 unreachable("Unsupported bit size.");
320 }
321 }
322
323 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
324 LLVMValueRef src0)
325 {
326 src0 = ac_to_float(ctx, src0);
327 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
328 return LLVMBuildSExt(ctx->builder,
329 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
330 ctx->i32, "");
331 }
332
333 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
334 LLVMValueRef src0,
335 unsigned bitsize)
336 {
337 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
338
339 switch (bitsize) {
340 case 8:
341 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
342 case 16:
343 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
344 case 32:
345 return result;
346 case 64:
347 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
348 default:
349 unreachable("Unsupported bit size.");
350 }
351 }
352
353 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
354 LLVMValueRef src0)
355 {
356 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
357 return LLVMBuildSExt(ctx->builder,
358 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
359 ctx->i32, "");
360 }
361
362 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
363 LLVMValueRef src0)
364 {
365 LLVMValueRef result;
366 LLVMValueRef cond = NULL;
367
368 src0 = ac_to_float(ctx, src0);
369 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
370
371 if (ctx->chip_class >= GFX8) {
372 LLVMValueRef args[2];
373 /* Check if the result is a denormal - and flush to 0 if so. */
374 args[0] = result;
375 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
376 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
377 }
378
379 /* need to convert back up to f32 */
380 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
381
382 if (ctx->chip_class >= GFX8)
383 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
384 else {
385 /* for GFX6-GFX7 */
386 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
387 * so compare the result and flush to 0 if it's smaller.
388 */
389 LLVMValueRef temp, cond2;
390 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
391 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
392 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
393 temp, "");
394 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
395 temp, ctx->f32_0, "");
396 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
397 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
398 }
399 return result;
400 }
401
402 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
403 LLVMValueRef src0, LLVMValueRef src1)
404 {
405 LLVMValueRef dst64, result;
406 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
407 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
408
409 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
410 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
411 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
412 return result;
413 }
414
415 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
416 LLVMValueRef src0, LLVMValueRef src1)
417 {
418 LLVMValueRef dst64, result;
419 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
420 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
421
422 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
423 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
424 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
425 return result;
426 }
427
428 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
429 LLVMValueRef bits, LLVMValueRef offset)
430 {
431 /* mask = ((1 << bits) - 1) << offset */
432 return LLVMBuildShl(ctx->builder,
433 LLVMBuildSub(ctx->builder,
434 LLVMBuildShl(ctx->builder,
435 ctx->i32_1,
436 bits, ""),
437 ctx->i32_1, ""),
438 offset, "");
439 }
440
441 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
442 LLVMValueRef mask, LLVMValueRef insert,
443 LLVMValueRef base)
444 {
445 /* Calculate:
446 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
447 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
448 */
449 return LLVMBuildXor(ctx->builder, base,
450 LLVMBuildAnd(ctx->builder, mask,
451 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
452 }
453
454 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
455 LLVMValueRef src0,
456 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
457 LLVMValueRef args[2]))
458 {
459 LLVMValueRef comp[2];
460
461 src0 = ac_to_float(ctx, src0);
462 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
463 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
464
465 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
466 }
467
468 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
469 LLVMValueRef src0)
470 {
471 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
472 LLVMValueRef temps[2], val;
473 int i;
474
475 for (i = 0; i < 2; i++) {
476 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
477 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
478 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
479 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
480 }
481 return ac_build_gather_values(ctx, temps, 2);
482 }
483
484 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
485 nir_op op,
486 LLVMValueRef src0)
487 {
488 unsigned mask;
489 int idx;
490 LLVMValueRef result;
491
492 if (op == nir_op_fddx_fine)
493 mask = AC_TID_MASK_LEFT;
494 else if (op == nir_op_fddy_fine)
495 mask = AC_TID_MASK_TOP;
496 else
497 mask = AC_TID_MASK_TOP_LEFT;
498
499 /* for DDX we want to next X pixel, DDY next Y pixel. */
500 if (op == nir_op_fddx_fine ||
501 op == nir_op_fddx_coarse ||
502 op == nir_op_fddx)
503 idx = 1;
504 else
505 idx = 2;
506
507 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
508 return result;
509 }
510
511 struct waterfall_context {
512 LLVMBasicBlockRef phi_bb[2];
513 bool use_waterfall;
514 };
515
516 /* To deal with divergent descriptors we can create a loop that handles all
517 * lanes with the same descriptor on a given iteration (henceforth a
518 * waterfall loop).
519 *
520 * These helper create the begin and end of the loop leaving the caller
521 * to implement the body.
522 *
523 * params:
524 * - ctx is the usal nir context
525 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
526 * - value is the possibly divergent value for which we built the loop
527 * - divergent is whether value is actually divergent. If false we just pass
528 * things through.
529 */
530 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
531 struct waterfall_context *wctx,
532 LLVMValueRef value, bool divergent)
533 {
534 /* If the app claims the value is divergent but it is constant we can
535 * end up with a dynamic index of NULL. */
536 if (!value)
537 divergent = false;
538
539 wctx->use_waterfall = divergent;
540 if (!divergent)
541 return value;
542
543 ac_build_bgnloop(&ctx->ac, 6000);
544
545 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
546
547 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
548 scalar_value, "uniform_active");
549
550 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
551 ac_build_ifcc(&ctx->ac, active, 6001);
552
553 return scalar_value;
554 }
555
556 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
557 struct waterfall_context *wctx,
558 LLVMValueRef value)
559 {
560 LLVMValueRef ret = NULL;
561 LLVMValueRef phi_src[2];
562 LLVMValueRef cc_phi_src[2] = {
563 LLVMConstInt(ctx->ac.i32, 0, false),
564 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
565 };
566
567 if (!wctx->use_waterfall)
568 return value;
569
570 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
571
572 ac_build_endif(&ctx->ac, 6001);
573
574 if (value) {
575 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
576 phi_src[1] = value;
577
578 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
579 }
580
581 /*
582 * By using the optimization barrier on the exit decision, we decouple
583 * the operations from the break, and hence avoid LLVM hoisting the
584 * opteration into the break block.
585 */
586 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
587 ac_build_optimization_barrier(&ctx->ac, &cc);
588
589 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
590 ac_build_ifcc(&ctx->ac, active, 6002);
591 ac_build_break(&ctx->ac);
592 ac_build_endif(&ctx->ac, 6002);
593
594 ac_build_endloop(&ctx->ac, 6000);
595 return ret;
596 }
597
598 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
599 {
600 LLVMValueRef src[4], result = NULL;
601 unsigned num_components = instr->dest.dest.ssa.num_components;
602 unsigned src_components;
603 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
604 bool saved_inexact = false;
605
606 if (instr->exact)
607 saved_inexact = ac_disable_inexact_math(ctx->ac.builder);
608
609 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
610 switch (instr->op) {
611 case nir_op_vec2:
612 case nir_op_vec3:
613 case nir_op_vec4:
614 src_components = 1;
615 break;
616 case nir_op_pack_half_2x16:
617 case nir_op_pack_snorm_2x16:
618 case nir_op_pack_unorm_2x16:
619 src_components = 2;
620 break;
621 case nir_op_unpack_half_2x16:
622 src_components = 1;
623 break;
624 case nir_op_cube_face_coord:
625 case nir_op_cube_face_index:
626 src_components = 3;
627 break;
628 default:
629 src_components = num_components;
630 break;
631 }
632 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
633 src[i] = get_alu_src(ctx, instr->src[i], src_components);
634
635 switch (instr->op) {
636 case nir_op_mov:
637 result = src[0];
638 break;
639 case nir_op_fneg:
640 src[0] = ac_to_float(&ctx->ac, src[0]);
641 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
642 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
643 /* fneg will be optimized by backend compiler with sign
644 * bit removed via XOR. This is probably a LLVM bug.
645 */
646 result = ac_build_canonicalize(&ctx->ac, result,
647 instr->dest.dest.ssa.bit_size);
648 }
649 break;
650 case nir_op_ineg:
651 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
652 break;
653 case nir_op_inot:
654 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
655 break;
656 case nir_op_iadd:
657 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
658 break;
659 case nir_op_fadd:
660 src[0] = ac_to_float(&ctx->ac, src[0]);
661 src[1] = ac_to_float(&ctx->ac, src[1]);
662 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_fsub:
665 src[0] = ac_to_float(&ctx->ac, src[0]);
666 src[1] = ac_to_float(&ctx->ac, src[1]);
667 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
668 break;
669 case nir_op_isub:
670 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_imul:
673 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
674 break;
675 case nir_op_imod:
676 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
677 break;
678 case nir_op_umod:
679 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
680 break;
681 case nir_op_fmod:
682 /* lower_fmod only lower 16-bit and 32-bit fmod */
683 assert(instr->dest.dest.ssa.bit_size == 64);
684 src[0] = ac_to_float(&ctx->ac, src[0]);
685 src[1] = ac_to_float(&ctx->ac, src[1]);
686 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
687 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
688 ac_to_float_type(&ctx->ac, def_type), result);
689 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
690 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
691 break;
692 case nir_op_irem:
693 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_idiv:
696 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
697 break;
698 case nir_op_udiv:
699 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
700 break;
701 case nir_op_fmul:
702 src[0] = ac_to_float(&ctx->ac, src[0]);
703 src[1] = ac_to_float(&ctx->ac, src[1]);
704 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
705 break;
706 case nir_op_frcp:
707 /* For doubles, we need precise division to pass GLCTS. */
708 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
709 ac_get_type_size(def_type) == 8) {
710 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
711 ac_to_float(&ctx->ac, src[0]), "");
712 } else {
713 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
714 ac_to_float_type(&ctx->ac, def_type), src[0]);
715 }
716 if (ctx->abi->clamp_div_by_zero)
717 result = ac_build_fmin(&ctx->ac, result,
718 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
719 break;
720 case nir_op_iand:
721 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
722 break;
723 case nir_op_ior:
724 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
725 break;
726 case nir_op_ixor:
727 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
728 break;
729 case nir_op_ishl:
730 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
731 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
732 LLVMTypeOf(src[0]), "");
733 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
734 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
735 LLVMTypeOf(src[0]), "");
736 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
737 break;
738 case nir_op_ishr:
739 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
740 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
741 LLVMTypeOf(src[0]), "");
742 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
743 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
744 LLVMTypeOf(src[0]), "");
745 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
746 break;
747 case nir_op_ushr:
748 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
749 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
750 LLVMTypeOf(src[0]), "");
751 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
752 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
753 LLVMTypeOf(src[0]), "");
754 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
755 break;
756 case nir_op_ilt32:
757 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
758 break;
759 case nir_op_ine32:
760 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
761 break;
762 case nir_op_ieq32:
763 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
764 break;
765 case nir_op_ige32:
766 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
767 break;
768 case nir_op_ult32:
769 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
770 break;
771 case nir_op_uge32:
772 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
773 break;
774 case nir_op_feq32:
775 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
776 break;
777 case nir_op_fneu32:
778 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
779 break;
780 case nir_op_flt32:
781 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
782 break;
783 case nir_op_fge32:
784 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
785 break;
786 case nir_op_fabs:
787 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
788 ac_to_float_type(&ctx->ac, def_type), src[0]);
789 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
790 /* fabs will be optimized by backend compiler with sign
791 * bit removed via AND.
792 */
793 result = ac_build_canonicalize(&ctx->ac, result,
794 instr->dest.dest.ssa.bit_size);
795 }
796 break;
797 case nir_op_iabs:
798 result = emit_iabs(&ctx->ac, src[0]);
799 break;
800 case nir_op_imax:
801 result = ac_build_imax(&ctx->ac, src[0], src[1]);
802 break;
803 case nir_op_imin:
804 result = ac_build_imin(&ctx->ac, src[0], src[1]);
805 break;
806 case nir_op_umax:
807 result = ac_build_umax(&ctx->ac, src[0], src[1]);
808 break;
809 case nir_op_umin:
810 result = ac_build_umin(&ctx->ac, src[0], src[1]);
811 break;
812 case nir_op_isign:
813 result = ac_build_isign(&ctx->ac, src[0],
814 instr->dest.dest.ssa.bit_size);
815 break;
816 case nir_op_fsign:
817 src[0] = ac_to_float(&ctx->ac, src[0]);
818 result = ac_build_fsign(&ctx->ac, src[0],
819 instr->dest.dest.ssa.bit_size);
820 break;
821 case nir_op_ffloor:
822 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
823 ac_to_float_type(&ctx->ac, def_type), src[0]);
824 break;
825 case nir_op_ftrunc:
826 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
827 ac_to_float_type(&ctx->ac, def_type), src[0]);
828 break;
829 case nir_op_fceil:
830 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
831 ac_to_float_type(&ctx->ac, def_type), src[0]);
832 break;
833 case nir_op_fround_even:
834 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
835 ac_to_float_type(&ctx->ac, def_type),src[0]);
836 break;
837 case nir_op_ffract:
838 src[0] = ac_to_float(&ctx->ac, src[0]);
839 result = ac_build_fract(&ctx->ac, src[0],
840 instr->dest.dest.ssa.bit_size);
841 break;
842 case nir_op_fsin:
843 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
844 ac_to_float_type(&ctx->ac, def_type), src[0]);
845 break;
846 case nir_op_fcos:
847 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
848 ac_to_float_type(&ctx->ac, def_type), src[0]);
849 break;
850 case nir_op_fsqrt:
851 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
852 ac_to_float_type(&ctx->ac, def_type), src[0]);
853 break;
854 case nir_op_fexp2:
855 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
856 ac_to_float_type(&ctx->ac, def_type), src[0]);
857 break;
858 case nir_op_flog2:
859 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
860 ac_to_float_type(&ctx->ac, def_type), src[0]);
861 break;
862 case nir_op_frsq:
863 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
864 ac_to_float_type(&ctx->ac, def_type), src[0]);
865 if (ctx->abi->clamp_div_by_zero)
866 result = ac_build_fmin(&ctx->ac, result,
867 LLVMConstReal(ac_to_float_type(&ctx->ac, def_type), FLT_MAX));
868 break;
869 case nir_op_frexp_exp:
870 src[0] = ac_to_float(&ctx->ac, src[0]);
871 result = ac_build_frexp_exp(&ctx->ac, src[0],
872 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
873 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
874 result = LLVMBuildSExt(ctx->ac.builder, result,
875 ctx->ac.i32, "");
876 break;
877 case nir_op_frexp_sig:
878 src[0] = ac_to_float(&ctx->ac, src[0]);
879 result = ac_build_frexp_mant(&ctx->ac, src[0],
880 instr->dest.dest.ssa.bit_size);
881 break;
882 case nir_op_fpow:
883 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
884 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
885 break;
886 case nir_op_fmax:
887 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
888 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
889 if (ctx->ac.chip_class < GFX9 &&
890 instr->dest.dest.ssa.bit_size == 32) {
891 /* Only pre-GFX9 chips do not flush denorms. */
892 result = ac_build_canonicalize(&ctx->ac, result,
893 instr->dest.dest.ssa.bit_size);
894 }
895 break;
896 case nir_op_fmin:
897 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
898 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
899 if (ctx->ac.chip_class < GFX9 &&
900 instr->dest.dest.ssa.bit_size == 32) {
901 /* Only pre-GFX9 chips do not flush denorms. */
902 result = ac_build_canonicalize(&ctx->ac, result,
903 instr->dest.dest.ssa.bit_size);
904 }
905 break;
906 case nir_op_ffma:
907 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
908 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
909 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
910 break;
911 case nir_op_ldexp:
912 src[0] = ac_to_float(&ctx->ac, src[0]);
913 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
914 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
915 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
916 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
917 else
918 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
919 break;
920 case nir_op_bfm:
921 result = emit_bfm(&ctx->ac, src[0], src[1]);
922 break;
923 case nir_op_bitfield_select:
924 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
925 break;
926 case nir_op_ubfe:
927 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
928 break;
929 case nir_op_ibfe:
930 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
931 break;
932 case nir_op_bitfield_reverse:
933 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
934 break;
935 case nir_op_bit_count:
936 result = ac_build_bit_count(&ctx->ac, src[0]);
937 break;
938 case nir_op_vec2:
939 case nir_op_vec3:
940 case nir_op_vec4:
941 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
942 src[i] = ac_to_integer(&ctx->ac, src[i]);
943 result = ac_build_gather_values(&ctx->ac, src, num_components);
944 break;
945 case nir_op_f2i8:
946 case nir_op_f2i16:
947 case nir_op_f2i32:
948 case nir_op_f2i64:
949 src[0] = ac_to_float(&ctx->ac, src[0]);
950 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
951 break;
952 case nir_op_f2u8:
953 case nir_op_f2u16:
954 case nir_op_f2u32:
955 case nir_op_f2u64:
956 src[0] = ac_to_float(&ctx->ac, src[0]);
957 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
958 break;
959 case nir_op_i2f16:
960 case nir_op_i2f32:
961 case nir_op_i2f64:
962 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
963 break;
964 case nir_op_u2f16:
965 case nir_op_u2f32:
966 case nir_op_u2f64:
967 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
968 break;
969 case nir_op_f2f16_rtz:
970 case nir_op_f2f16:
971 case nir_op_f2fmp:
972 src[0] = ac_to_float(&ctx->ac, src[0]);
973
974 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
975 * all f32->f16 conversions have to round towards zero, because both scalar
976 * and vec2 down-conversions have to round equally.
977 */
978 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
979 instr->op == nir_op_f2f16_rtz) {
980 src[0] = ac_to_float(&ctx->ac, src[0]);
981
982 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
983 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
984
985 /* Fast path conversion. This only works if NIR is vectorized
986 * to vec2 16.
987 */
988 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
989 LLVMValueRef args[] = {
990 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
991 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
992 };
993 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
994 break;
995 }
996
997 assert(ac_get_llvm_num_components(src[0]) == 1);
998 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
999 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
1000 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
1001 } else {
1002 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1003 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1004 else
1005 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1006 }
1007 break;
1008 case nir_op_f2f16_rtne:
1009 case nir_op_f2f32:
1010 case nir_op_f2f64:
1011 src[0] = ac_to_float(&ctx->ac, src[0]);
1012 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1013 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1014 else
1015 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1016 break;
1017 case nir_op_u2u8:
1018 case nir_op_u2u16:
1019 case nir_op_u2ump:
1020 case nir_op_u2u32:
1021 case nir_op_u2u64:
1022 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1023 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1024 else
1025 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1026 break;
1027 case nir_op_i2i8:
1028 case nir_op_i2i16:
1029 case nir_op_i2imp:
1030 case nir_op_i2i32:
1031 case nir_op_i2i64:
1032 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1033 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1034 else
1035 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1036 break;
1037 case nir_op_b32csel:
1038 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1039 break;
1040 case nir_op_find_lsb:
1041 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1042 break;
1043 case nir_op_ufind_msb:
1044 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1045 break;
1046 case nir_op_ifind_msb:
1047 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1048 break;
1049 case nir_op_uadd_carry:
1050 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1051 break;
1052 case nir_op_usub_borrow:
1053 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1054 break;
1055 case nir_op_b2f16:
1056 case nir_op_b2f32:
1057 case nir_op_b2f64:
1058 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1059 break;
1060 case nir_op_f2b32:
1061 result = emit_f2b(&ctx->ac, src[0]);
1062 break;
1063 case nir_op_b2i8:
1064 case nir_op_b2i16:
1065 case nir_op_b2i32:
1066 case nir_op_b2i64:
1067 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1068 break;
1069 case nir_op_i2b32:
1070 result = emit_i2b(&ctx->ac, src[0]);
1071 break;
1072 case nir_op_fquantize2f16:
1073 result = emit_f2f16(&ctx->ac, src[0]);
1074 break;
1075 case nir_op_umul_high:
1076 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1077 break;
1078 case nir_op_imul_high:
1079 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1080 break;
1081 case nir_op_pack_half_2x16:
1082 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1083 break;
1084 case nir_op_pack_snorm_2x16:
1085 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1086 break;
1087 case nir_op_pack_unorm_2x16:
1088 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1089 break;
1090 case nir_op_unpack_half_2x16:
1091 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1092 break;
1093 case nir_op_fddx:
1094 case nir_op_fddy:
1095 case nir_op_fddx_fine:
1096 case nir_op_fddy_fine:
1097 case nir_op_fddx_coarse:
1098 case nir_op_fddy_coarse:
1099 result = emit_ddxy(ctx, instr->op, src[0]);
1100 break;
1101
1102 case nir_op_unpack_64_2x32_split_x: {
1103 assert(ac_get_llvm_num_components(src[0]) == 1);
1104 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1105 ctx->ac.v2i32,
1106 "");
1107 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1108 ctx->ac.i32_0, "");
1109 break;
1110 }
1111
1112 case nir_op_unpack_64_2x32_split_y: {
1113 assert(ac_get_llvm_num_components(src[0]) == 1);
1114 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1115 ctx->ac.v2i32,
1116 "");
1117 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1118 ctx->ac.i32_1, "");
1119 break;
1120 }
1121
1122 case nir_op_pack_64_2x32_split: {
1123 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1124 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1125 break;
1126 }
1127
1128 case nir_op_pack_32_2x16_split: {
1129 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1130 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1131 break;
1132 }
1133
1134 case nir_op_unpack_32_2x16_split_x: {
1135 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1136 ctx->ac.v2i16,
1137 "");
1138 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1139 ctx->ac.i32_0, "");
1140 break;
1141 }
1142
1143 case nir_op_unpack_32_2x16_split_y: {
1144 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1145 ctx->ac.v2i16,
1146 "");
1147 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1148 ctx->ac.i32_1, "");
1149 break;
1150 }
1151
1152 case nir_op_cube_face_coord: {
1153 src[0] = ac_to_float(&ctx->ac, src[0]);
1154 LLVMValueRef results[2];
1155 LLVMValueRef in[3];
1156 for (unsigned chan = 0; chan < 3; chan++)
1157 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1158 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1159 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1160 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1161 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1162 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1163 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1164 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1165 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1166 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1167 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1168 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1169 result = ac_build_gather_values(&ctx->ac, results, 2);
1170 break;
1171 }
1172
1173 case nir_op_cube_face_index: {
1174 src[0] = ac_to_float(&ctx->ac, src[0]);
1175 LLVMValueRef in[3];
1176 for (unsigned chan = 0; chan < 3; chan++)
1177 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1178 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1179 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1180 break;
1181 }
1182
1183 default:
1184 fprintf(stderr, "Unknown NIR alu instr: ");
1185 nir_print_instr(&instr->instr, stderr);
1186 fprintf(stderr, "\n");
1187 abort();
1188 }
1189
1190 if (result) {
1191 assert(instr->dest.dest.is_ssa);
1192 result = ac_to_integer_or_pointer(&ctx->ac, result);
1193 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1194 }
1195
1196 if (instr->exact)
1197 ac_restore_inexact_math(ctx->ac.builder, saved_inexact);
1198 }
1199
1200 static void visit_load_const(struct ac_nir_context *ctx,
1201 const nir_load_const_instr *instr)
1202 {
1203 LLVMValueRef values[4], value = NULL;
1204 LLVMTypeRef element_type =
1205 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1206
1207 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1208 switch (instr->def.bit_size) {
1209 case 8:
1210 values[i] = LLVMConstInt(element_type,
1211 instr->value[i].u8, false);
1212 break;
1213 case 16:
1214 values[i] = LLVMConstInt(element_type,
1215 instr->value[i].u16, false);
1216 break;
1217 case 32:
1218 values[i] = LLVMConstInt(element_type,
1219 instr->value[i].u32, false);
1220 break;
1221 case 64:
1222 values[i] = LLVMConstInt(element_type,
1223 instr->value[i].u64, false);
1224 break;
1225 default:
1226 fprintf(stderr,
1227 "unsupported nir load_const bit_size: %d\n",
1228 instr->def.bit_size);
1229 abort();
1230 }
1231 }
1232 if (instr->def.num_components > 1) {
1233 value = LLVMConstVector(values, instr->def.num_components);
1234 } else
1235 value = values[0];
1236
1237 ctx->ssa_defs[instr->def.index] = value;
1238 }
1239
1240 static LLVMValueRef
1241 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1242 {
1243 LLVMValueRef size =
1244 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1245 LLVMConstInt(ctx->ac.i32, 2, false), "");
1246
1247 /* GFX8 only */
1248 if (ctx->ac.chip_class == GFX8 && in_elements) {
1249 /* On GFX8, the descriptor contains the size in bytes,
1250 * but TXQ must return the size in elements.
1251 * The stride is always non-zero for resources using TXQ.
1252 */
1253 LLVMValueRef stride =
1254 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1255 ctx->ac.i32_1, "");
1256 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1257 LLVMConstInt(ctx->ac.i32, 16, false), "");
1258 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1259 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1260
1261 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1262 }
1263 return size;
1264 }
1265
1266 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1267 * incorrectly forces nearest filtering if the texture format is integer.
1268 * The only effect it has on Gather4, which always returns 4 texels for
1269 * bilinear filtering, is that the final coordinates are off by 0.5 of
1270 * the texel size.
1271 *
1272 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1273 * or (0.5 / size) from the normalized coordinates.
1274 *
1275 * However, cube textures with 8_8_8_8 data formats require a different
1276 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1277 * precision in 32-bit data formats, so it needs to be applied dynamically at
1278 * runtime. In this case, return an i1 value that indicates whether the
1279 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1280 */
1281 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1282 nir_variable *var,
1283 struct ac_image_args *args,
1284 const nir_tex_instr *instr)
1285 {
1286 const struct glsl_type *type = glsl_without_array(var->type);
1287 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1288 LLVMValueRef wa_8888 = NULL;
1289 LLVMValueRef half_texel[2];
1290 LLVMValueRef result;
1291
1292 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1293
1294 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1295 LLVMValueRef formats;
1296 LLVMValueRef data_format;
1297 LLVMValueRef wa_formats;
1298
1299 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1300
1301 data_format = LLVMBuildLShr(ctx->builder, formats,
1302 LLVMConstInt(ctx->i32, 20, false), "");
1303 data_format = LLVMBuildAnd(ctx->builder, data_format,
1304 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1305 wa_8888 = LLVMBuildICmp(
1306 ctx->builder, LLVMIntEQ, data_format,
1307 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1308 "");
1309
1310 uint32_t wa_num_format =
1311 stype == GLSL_TYPE_UINT ?
1312 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1313 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1314 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1315 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1316 "");
1317 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1318 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1319
1320 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1321 args->resource = LLVMBuildInsertElement(
1322 ctx->builder, args->resource, formats, ctx->i32_1, "");
1323 }
1324
1325 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1326 assert(!wa_8888);
1327 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1328 } else {
1329 struct ac_image_args resinfo = {};
1330 LLVMBasicBlockRef bbs[2];
1331
1332 LLVMValueRef unnorm = NULL;
1333 LLVMValueRef default_offset = ctx->f32_0;
1334 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1335 !instr->is_array) {
1336 /* In vulkan, whether the sampler uses unnormalized
1337 * coordinates or not is a dynamic property of the
1338 * sampler. Hence, to figure out whether or not we
1339 * need to divide by the texture size, we need to test
1340 * the sampler at runtime. This tests the bit set by
1341 * radv_init_sampler().
1342 */
1343 LLVMValueRef sampler0 =
1344 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1345 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1346 LLVMConstInt(ctx->i32, 15, false), "");
1347 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1348 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1349 default_offset = LLVMConstReal(ctx->f32, -0.5);
1350 }
1351
1352 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1353 if (wa_8888 || unnorm) {
1354 assert(!(wa_8888 && unnorm));
1355 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1356 /* Skip the texture size query entirely if we don't need it. */
1357 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1358 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1359 }
1360
1361 /* Query the texture size. */
1362 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1363 resinfo.opcode = ac_image_get_resinfo;
1364 resinfo.dmask = 0xf;
1365 resinfo.lod = ctx->i32_0;
1366 resinfo.resource = args->resource;
1367 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1368 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1369
1370 /* Compute -0.5 / size. */
1371 for (unsigned c = 0; c < 2; c++) {
1372 half_texel[c] =
1373 LLVMBuildExtractElement(ctx->builder, size,
1374 LLVMConstInt(ctx->i32, c, 0), "");
1375 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1376 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1377 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1378 LLVMConstReal(ctx->f32, -0.5), "");
1379 }
1380
1381 if (wa_8888 || unnorm) {
1382 ac_build_endif(ctx, 2000);
1383
1384 for (unsigned c = 0; c < 2; c++) {
1385 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1386 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1387 values, bbs);
1388 }
1389 }
1390 }
1391
1392 for (unsigned c = 0; c < 2; c++) {
1393 LLVMValueRef tmp;
1394 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1395 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1396 }
1397
1398 args->attributes = AC_FUNC_ATTR_READNONE;
1399 result = ac_build_image_opcode(ctx, args);
1400
1401 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1402 LLVMValueRef tmp, tmp2;
1403
1404 /* if the cube workaround is in place, f2i the result. */
1405 for (unsigned c = 0; c < 4; c++) {
1406 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1407 if (stype == GLSL_TYPE_UINT)
1408 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1409 else
1410 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1411 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1412 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1413 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1414 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1415 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1416 }
1417 }
1418 return result;
1419 }
1420
1421 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1422 {
1423 nir_deref_instr *texture_deref_instr = NULL;
1424
1425 for (unsigned i = 0; i < instr->num_srcs; i++) {
1426 switch (instr->src[i].src_type) {
1427 case nir_tex_src_texture_deref:
1428 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1429 break;
1430 default:
1431 break;
1432 }
1433 }
1434 return texture_deref_instr;
1435 }
1436
1437 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1438 const nir_tex_instr *instr,
1439 struct ac_image_args *args)
1440 {
1441 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1442 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1443
1444 assert(instr->dest.is_ssa);
1445 return ac_build_buffer_load_format(&ctx->ac,
1446 args->resource,
1447 args->coords[0],
1448 ctx->ac.i32_0,
1449 util_last_bit(mask),
1450 0, true,
1451 instr->dest.ssa.bit_size == 16);
1452 }
1453
1454 args->opcode = ac_image_sample;
1455
1456 switch (instr->op) {
1457 case nir_texop_txf:
1458 case nir_texop_txf_ms:
1459 case nir_texop_samples_identical:
1460 args->opcode = args->level_zero ||
1461 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1462 ac_image_load : ac_image_load_mip;
1463 args->level_zero = false;
1464 break;
1465 case nir_texop_txs:
1466 case nir_texop_query_levels:
1467 args->opcode = ac_image_get_resinfo;
1468 if (!args->lod)
1469 args->lod = ctx->ac.i32_0;
1470 args->level_zero = false;
1471 break;
1472 case nir_texop_tex:
1473 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1474 assert(!args->lod);
1475 args->level_zero = true;
1476 }
1477 break;
1478 case nir_texop_tg4:
1479 args->opcode = ac_image_gather4;
1480 if (!args->lod && !args->bias)
1481 args->level_zero = true;
1482 break;
1483 case nir_texop_lod:
1484 args->opcode = ac_image_get_lod;
1485 break;
1486 case nir_texop_fragment_fetch:
1487 case nir_texop_fragment_mask_fetch:
1488 args->opcode = ac_image_load;
1489 args->level_zero = false;
1490 break;
1491 default:
1492 break;
1493 }
1494
1495 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1496 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1497 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1498 const struct glsl_type *type = glsl_without_array(var->type);
1499 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1500 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1501 return lower_gather4_integer(&ctx->ac, var, args, instr);
1502 }
1503 }
1504
1505 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1506 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1507 if ((args->dim == ac_image_2darray ||
1508 args->dim == ac_image_2d) && !args->coords[1]) {
1509 args->coords[1] = ctx->ac.i32_0;
1510 }
1511 }
1512
1513 args->attributes = AC_FUNC_ATTR_READNONE;
1514 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1515 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1516 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1517 /* Prevent texture instructions with implicit derivatives from being
1518 * sinked into branches. */
1519 switch (instr->op) {
1520 case nir_texop_tex:
1521 case nir_texop_txb:
1522 case nir_texop_lod:
1523 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1524 break;
1525 default:
1526 break;
1527 }
1528 }
1529
1530 return ac_build_image_opcode(&ctx->ac, args);
1531 }
1532
1533 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1534 nir_intrinsic_instr *instr)
1535 {
1536 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1537 LLVMValueRef index = get_src(ctx, instr->src[1]);
1538
1539 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1540 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1541 return result;
1542 }
1543
1544 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1545 nir_intrinsic_instr *instr)
1546 {
1547 LLVMValueRef ptr, addr;
1548 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1549 unsigned index = nir_intrinsic_base(instr);
1550
1551 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1552 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1553
1554 /* Load constant values from user SGPRS when possible, otherwise
1555 * fallback to the default path that loads directly from memory.
1556 */
1557 if (LLVMIsConstant(src0) &&
1558 instr->dest.ssa.bit_size == 32) {
1559 unsigned count = instr->dest.ssa.num_components;
1560 unsigned offset = index;
1561
1562 offset += LLVMConstIntGetZExtValue(src0);
1563 offset /= 4;
1564
1565 offset -= ctx->args->base_inline_push_consts;
1566
1567 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1568 if (offset + count <= num_inline_push_consts) {
1569 LLVMValueRef push_constants[num_inline_push_consts];
1570 for (unsigned i = 0; i < num_inline_push_consts; i++)
1571 push_constants[i] = ac_get_arg(&ctx->ac,
1572 ctx->args->inline_push_consts[i]);
1573 return ac_build_gather_values(&ctx->ac,
1574 push_constants + offset,
1575 count);
1576 }
1577 }
1578
1579 ptr = LLVMBuildGEP(ctx->ac.builder,
1580 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1581
1582 if (instr->dest.ssa.bit_size == 8) {
1583 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1584 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1585 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1586 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1587
1588 LLVMValueRef params[3];
1589 if (load_dwords > 1) {
1590 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1591 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1592 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1593 } else {
1594 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1595 params[0] = ctx->ac.i32_0;
1596 params[1] = res;
1597 }
1598 params[2] = addr;
1599 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1600
1601 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1602 if (instr->dest.ssa.num_components > 1)
1603 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1604 return res;
1605 } else if (instr->dest.ssa.bit_size == 16) {
1606 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1607 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1608 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1609 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1610 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1611 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1612 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1613 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1614 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1615 LLVMConstInt(ctx->ac.i32, 4, false)};
1616 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1617 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1618 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1619 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1620 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1621 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1622 }
1623
1624 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1625
1626 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1627 }
1628
1629 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1630 const nir_intrinsic_instr *instr)
1631 {
1632 LLVMValueRef index = get_src(ctx, instr->src[0]);
1633
1634 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1635 }
1636
1637 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1638 {
1639 uint32_t new_mask = 0;
1640 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1641 if (mask & (1u << i))
1642 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1643 return new_mask;
1644 }
1645
1646 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1647 unsigned start, unsigned count)
1648 {
1649 LLVMValueRef mask[] = {
1650 ctx->i32_0, ctx->i32_1,
1651 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1652
1653 unsigned src_elements = ac_get_llvm_num_components(src);
1654
1655 if (count == src_elements) {
1656 assert(start == 0);
1657 return src;
1658 } else if (count == 1) {
1659 assert(start < src_elements);
1660 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1661 } else {
1662 assert(start + count <= src_elements);
1663 assert(count <= 4);
1664 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1665 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1666 }
1667 }
1668
1669 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1670 enum gl_access_qualifier access,
1671 bool may_store_unaligned,
1672 bool writeonly_memory)
1673 {
1674 unsigned cache_policy = 0;
1675
1676 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1677 * store opcodes not aligned to a dword are affected. The only way to
1678 * get unaligned stores is through shader images.
1679 */
1680 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1681 /* If this is write-only, don't keep data in L1 to prevent
1682 * evicting L1 cache lines that may be needed by other
1683 * instructions.
1684 */
1685 writeonly_memory ||
1686 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1687 cache_policy |= ac_glc;
1688 }
1689
1690 if (access & ACCESS_STREAM_CACHE_POLICY)
1691 cache_policy |= ac_slc | ac_glc;
1692
1693 return cache_policy;
1694 }
1695
1696 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1697 struct waterfall_context *wctx,
1698 const nir_intrinsic_instr *instr,
1699 nir_src src)
1700 {
1701 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1702 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1703 }
1704
1705 static void visit_store_ssbo(struct ac_nir_context *ctx,
1706 nir_intrinsic_instr *instr)
1707 {
1708 if (ctx->ac.postponed_kill) {
1709 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1710 ctx->ac.postponed_kill, "");
1711 ac_build_ifcc(&ctx->ac, cond, 7000);
1712 }
1713
1714 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1715 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1716 unsigned writemask = nir_intrinsic_write_mask(instr);
1717 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1718 bool writeonly_memory = access & ACCESS_NON_READABLE;
1719 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1720
1721 struct waterfall_context wctx;
1722 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1723
1724 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1725 LLVMValueRef base_data = src_data;
1726 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1727 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1728
1729 while (writemask) {
1730 int start, count;
1731 LLVMValueRef data, offset;
1732 LLVMTypeRef data_type;
1733
1734 u_bit_scan_consecutive_range(&writemask, &start, &count);
1735
1736 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1737 * writes into a 2-element and a 1-element write. */
1738 if (count == 3 &&
1739 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1740 writemask |= 1 << (start + 2);
1741 count = 2;
1742 }
1743 int num_bytes = count * elem_size_bytes; /* count in bytes */
1744
1745 /* we can only store 4 DWords at the same time.
1746 * can only happen for 64 Bit vectors. */
1747 if (num_bytes > 16) {
1748 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1749 count = 2;
1750 num_bytes = 16;
1751 }
1752
1753 /* check alignment of 16 Bit stores */
1754 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1755 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1756 count = 1;
1757 num_bytes = 2;
1758 }
1759
1760 /* Due to alignment issues, split stores of 8-bit/16-bit
1761 * vectors.
1762 */
1763 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1764 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1765 count = 1;
1766 num_bytes = elem_size_bytes;
1767 }
1768
1769 data = extract_vector_range(&ctx->ac, base_data, start, count);
1770
1771 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1772 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1773
1774 if (num_bytes == 1) {
1775 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1776 offset, ctx->ac.i32_0,
1777 cache_policy);
1778 } else if (num_bytes == 2) {
1779 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1780 offset, ctx->ac.i32_0,
1781 cache_policy);
1782 } else {
1783 int num_channels = num_bytes / 4;
1784
1785 switch (num_bytes) {
1786 case 16: /* v4f32 */
1787 data_type = ctx->ac.v4f32;
1788 break;
1789 case 12: /* v3f32 */
1790 data_type = ctx->ac.v3f32;
1791 break;
1792 case 8: /* v2f32 */
1793 data_type = ctx->ac.v2f32;
1794 break;
1795 case 4: /* f32 */
1796 data_type = ctx->ac.f32;
1797 break;
1798 default:
1799 unreachable("Malformed vector store.");
1800 }
1801 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1802
1803 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1804 num_channels, offset,
1805 ctx->ac.i32_0, 0,
1806 cache_policy);
1807 }
1808 }
1809
1810 exit_waterfall(ctx, &wctx, NULL);
1811
1812 if (ctx->ac.postponed_kill)
1813 ac_build_endif(&ctx->ac, 7000);
1814 }
1815
1816 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1817 LLVMValueRef descriptor,
1818 LLVMValueRef offset,
1819 LLVMValueRef compare,
1820 LLVMValueRef exchange)
1821 {
1822 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1823 if (ctx->abi->robust_buffer_access) {
1824 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1825
1826 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1827 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1828
1829 ac_build_ifcc(&ctx->ac, cond, -1);
1830
1831 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1832 }
1833
1834 LLVMValueRef ptr_parts[2] = {
1835 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1836 LLVMBuildAnd(ctx->ac.builder,
1837 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1838 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1839 };
1840
1841 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1842 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1843
1844 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1845
1846 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1847 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1848 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1849 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1850
1851 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1852 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1853
1854 if (ctx->abi->robust_buffer_access) {
1855 ac_build_endif(&ctx->ac, -1);
1856
1857 LLVMBasicBlockRef incoming_blocks[2] = {
1858 start_block,
1859 then_block,
1860 };
1861
1862 LLVMValueRef incoming_values[2] = {
1863 LLVMConstInt(ctx->ac.i64, 0, 0),
1864 result,
1865 };
1866 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1867 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1868 return ret;
1869 } else {
1870 return result;
1871 }
1872 }
1873
1874 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1875 nir_intrinsic_instr *instr)
1876 {
1877 if (ctx->ac.postponed_kill) {
1878 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1879 ctx->ac.postponed_kill, "");
1880 ac_build_ifcc(&ctx->ac, cond, 7001);
1881 }
1882
1883 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1884 const char *op;
1885 char name[64], type[8];
1886 LLVMValueRef params[6], descriptor;
1887 LLVMValueRef result;
1888 int arg_count = 0;
1889
1890 struct waterfall_context wctx;
1891 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1892
1893 switch (instr->intrinsic) {
1894 case nir_intrinsic_ssbo_atomic_add:
1895 op = "add";
1896 break;
1897 case nir_intrinsic_ssbo_atomic_imin:
1898 op = "smin";
1899 break;
1900 case nir_intrinsic_ssbo_atomic_umin:
1901 op = "umin";
1902 break;
1903 case nir_intrinsic_ssbo_atomic_imax:
1904 op = "smax";
1905 break;
1906 case nir_intrinsic_ssbo_atomic_umax:
1907 op = "umax";
1908 break;
1909 case nir_intrinsic_ssbo_atomic_and:
1910 op = "and";
1911 break;
1912 case nir_intrinsic_ssbo_atomic_or:
1913 op = "or";
1914 break;
1915 case nir_intrinsic_ssbo_atomic_xor:
1916 op = "xor";
1917 break;
1918 case nir_intrinsic_ssbo_atomic_exchange:
1919 op = "swap";
1920 break;
1921 case nir_intrinsic_ssbo_atomic_comp_swap:
1922 op = "cmpswap";
1923 break;
1924 default:
1925 abort();
1926 }
1927
1928 descriptor = ctx->abi->load_ssbo(ctx->abi,
1929 rsrc_base,
1930 true);
1931
1932 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1933 return_type == ctx->ac.i64) {
1934 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1935 get_src(ctx, instr->src[1]),
1936 get_src(ctx, instr->src[2]),
1937 get_src(ctx, instr->src[3]));
1938 } else {
1939 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1940 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1941 }
1942 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1943 params[arg_count++] = descriptor;
1944
1945 if (LLVM_VERSION_MAJOR >= 9) {
1946 /* XXX: The new raw/struct atomic intrinsics are buggy with
1947 * LLVM 8, see r358579.
1948 */
1949 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1950 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1951 params[arg_count++] = ctx->ac.i32_0; /* slc */
1952
1953 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1954 snprintf(name, sizeof(name),
1955 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1956 } else {
1957 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1958 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1959 params[arg_count++] = ctx->ac.i1false; /* slc */
1960
1961 assert(return_type == ctx->ac.i32);
1962 snprintf(name, sizeof(name),
1963 "llvm.amdgcn.buffer.atomic.%s", op);
1964 }
1965
1966 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1967 arg_count, 0);
1968 }
1969
1970 result = exit_waterfall(ctx, &wctx, result);
1971 if (ctx->ac.postponed_kill)
1972 ac_build_endif(&ctx->ac, 7001);
1973 return result;
1974 }
1975
1976 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1977 nir_intrinsic_instr *instr)
1978 {
1979 struct waterfall_context wctx;
1980 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1981
1982 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1983 int num_components = instr->num_components;
1984 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1985 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1986
1987 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1988 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1989 LLVMValueRef vindex = ctx->ac.i32_0;
1990
1991 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1992 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1993
1994 LLVMValueRef results[4];
1995 for (int i = 0; i < num_components;) {
1996 int num_elems = num_components - i;
1997 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1998 num_elems = 1;
1999 if (num_elems * elem_size_bytes > 16)
2000 num_elems = 16 / elem_size_bytes;
2001 int load_bytes = num_elems * elem_size_bytes;
2002
2003 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
2004
2005 LLVMValueRef ret;
2006
2007 if (load_bytes == 1) {
2008 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2009 rsrc,
2010 offset,
2011 ctx->ac.i32_0,
2012 immoffset,
2013 cache_policy);
2014 } else if (load_bytes == 2) {
2015 ret = ac_build_tbuffer_load_short(&ctx->ac,
2016 rsrc,
2017 offset,
2018 ctx->ac.i32_0,
2019 immoffset,
2020 cache_policy);
2021 } else {
2022 int num_channels = util_next_power_of_two(load_bytes) / 4;
2023 bool can_speculate = access & ACCESS_CAN_REORDER;
2024
2025 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2026 vindex, offset, immoffset, 0,
2027 cache_policy, can_speculate, false);
2028 }
2029
2030 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2031 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2032 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2033
2034 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2035 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2036
2037 for (unsigned j = 0; j < num_elems; j++) {
2038 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2039 }
2040 i += num_elems;
2041 }
2042
2043 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2044 return exit_waterfall(ctx, &wctx, ret);
2045 }
2046
2047 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2048 struct waterfall_context *wctx,
2049 const nir_intrinsic_instr *instr)
2050 {
2051 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2052 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2053 }
2054
2055 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2056 nir_intrinsic_instr *instr)
2057 {
2058 struct waterfall_context wctx;
2059 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2060
2061 LLVMValueRef ret;
2062 LLVMValueRef rsrc = rsrc_base;
2063 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2064 int num_components = instr->num_components;
2065
2066 if (ctx->abi->load_ubo)
2067 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2068
2069 if (instr->dest.ssa.bit_size == 64)
2070 num_components *= 2;
2071
2072 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2073 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2074 LLVMValueRef results[num_components];
2075 for (unsigned i = 0; i < num_components; ++i) {
2076 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2077 load_bytes * i, 0);
2078
2079 if (load_bytes == 1) {
2080 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2081 rsrc,
2082 offset,
2083 ctx->ac.i32_0,
2084 immoffset,
2085 0);
2086 } else {
2087 assert(load_bytes == 2);
2088 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2089 rsrc,
2090 offset,
2091 ctx->ac.i32_0,
2092 immoffset,
2093 0);
2094 }
2095 }
2096 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2097 } else {
2098 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2099 NULL, 0, 0, true, true);
2100
2101 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2102 }
2103
2104 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2105 get_def_type(ctx, &instr->dest.ssa), "");
2106
2107 return exit_waterfall(ctx, &wctx, ret);
2108 }
2109
2110 static void
2111 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2112 bool vs_in, unsigned *vertex_index_out,
2113 LLVMValueRef *vertex_index_ref,
2114 unsigned *const_out, LLVMValueRef *indir_out)
2115 {
2116 nir_variable *var = nir_deref_instr_get_variable(instr);
2117 nir_deref_path path;
2118 unsigned idx_lvl = 1;
2119
2120 nir_deref_path_init(&path, instr, NULL);
2121
2122 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2123 if (vertex_index_ref) {
2124 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2125 if (vertex_index_out)
2126 *vertex_index_out = 0;
2127 } else {
2128 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2129 }
2130 ++idx_lvl;
2131 }
2132
2133 uint32_t const_offset = 0;
2134 LLVMValueRef offset = NULL;
2135
2136 if (var->data.compact) {
2137 assert(instr->deref_type == nir_deref_type_array);
2138 const_offset = nir_src_as_uint(instr->arr.index);
2139 goto out;
2140 }
2141
2142 for (; path.path[idx_lvl]; ++idx_lvl) {
2143 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2144 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2145 unsigned index = path.path[idx_lvl]->strct.index;
2146
2147 for (unsigned i = 0; i < index; i++) {
2148 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2149 const_offset += glsl_count_attribute_slots(ft, vs_in);
2150 }
2151 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2152 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2153 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2154 const_offset += size *
2155 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2156 } else {
2157 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2158 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2159 if (offset)
2160 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2161 else
2162 offset = array_off;
2163 }
2164 } else
2165 unreachable("Uhandled deref type in get_deref_instr_offset");
2166 }
2167
2168 out:
2169 nir_deref_path_finish(&path);
2170
2171 if (const_offset && offset)
2172 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2173 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2174 "");
2175
2176 *const_out = const_offset;
2177 *indir_out = offset;
2178 }
2179
2180 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2181 nir_intrinsic_instr *instr,
2182 bool load_inputs)
2183 {
2184 LLVMValueRef result;
2185 LLVMValueRef vertex_index = NULL;
2186 LLVMValueRef indir_index = NULL;
2187 unsigned const_index = 0;
2188
2189 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2190
2191 unsigned location = var->data.location;
2192 unsigned driver_location = var->data.driver_location;
2193 const bool is_patch = var->data.patch ||
2194 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2195 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2196 const bool is_compact = var->data.compact;
2197
2198 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2199 false, NULL, is_patch ? NULL : &vertex_index,
2200 &const_index, &indir_index);
2201
2202 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2203
2204 LLVMTypeRef src_component_type;
2205 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2206 src_component_type = LLVMGetElementType(dest_type);
2207 else
2208 src_component_type = dest_type;
2209
2210 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2211 vertex_index, indir_index,
2212 const_index, location, driver_location,
2213 var->data.location_frac,
2214 instr->num_components,
2215 is_patch, is_compact, load_inputs);
2216 if (instr->dest.ssa.bit_size == 16) {
2217 result = ac_to_integer(&ctx->ac, result);
2218 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2219 }
2220 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2221 }
2222
2223 static unsigned
2224 type_scalar_size_bytes(const struct glsl_type *type)
2225 {
2226 assert(glsl_type_is_vector_or_scalar(type) ||
2227 glsl_type_is_matrix(type));
2228 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2229 }
2230
2231 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2232 nir_intrinsic_instr *instr)
2233 {
2234 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2235 nir_variable *var = nir_deref_instr_get_variable(deref);
2236
2237 LLVMValueRef values[8];
2238 int idx = 0;
2239 int ve = instr->dest.ssa.num_components;
2240 unsigned comp = 0;
2241 LLVMValueRef indir_index;
2242 LLVMValueRef ret;
2243 unsigned const_index;
2244 unsigned stride = 4;
2245 int mode = deref->mode;
2246
2247 if (var) {
2248 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2249 var->data.mode == nir_var_shader_in;
2250 idx = var->data.driver_location;
2251 comp = var->data.location_frac;
2252 mode = var->data.mode;
2253
2254 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2255 &const_index, &indir_index);
2256
2257 if (var->data.compact) {
2258 stride = 1;
2259 const_index += comp;
2260 comp = 0;
2261 }
2262 }
2263
2264 if (instr->dest.ssa.bit_size == 64 &&
2265 (deref->mode == nir_var_shader_in ||
2266 deref->mode == nir_var_shader_out ||
2267 deref->mode == nir_var_function_temp))
2268 ve *= 2;
2269
2270 switch (mode) {
2271 case nir_var_shader_in:
2272 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2273 ctx->stage == MESA_SHADER_TESS_EVAL) {
2274 return load_tess_varyings(ctx, instr, true);
2275 }
2276
2277 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2278 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2279 LLVMValueRef indir_index;
2280 unsigned const_index, vertex_index;
2281 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2282 &const_index, &indir_index);
2283 assert(indir_index == NULL);
2284
2285 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2286 var->data.driver_location,
2287 var->data.location_frac,
2288 instr->num_components, vertex_index, const_index, type);
2289 }
2290
2291 for (unsigned chan = comp; chan < ve + comp; chan++) {
2292 if (indir_index) {
2293 unsigned count = glsl_count_attribute_slots(
2294 var->type,
2295 ctx->stage == MESA_SHADER_VERTEX);
2296 count -= chan / 4;
2297 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2298 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2299 stride, false, true);
2300
2301 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2302 tmp_vec,
2303 indir_index, "");
2304 } else
2305 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2306 }
2307 break;
2308 case nir_var_function_temp:
2309 for (unsigned chan = 0; chan < ve; chan++) {
2310 if (indir_index) {
2311 unsigned count = glsl_count_attribute_slots(
2312 var->type, false);
2313 count -= chan / 4;
2314 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2315 &ctx->ac, ctx->locals + idx + chan, count,
2316 stride, true, true);
2317
2318 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2319 tmp_vec,
2320 indir_index, "");
2321 } else {
2322 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2323 }
2324 }
2325 break;
2326 case nir_var_shader_out:
2327 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2328 return load_tess_varyings(ctx, instr, false);
2329 }
2330
2331 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2332 var->data.fb_fetch_output &&
2333 ctx->abi->emit_fbfetch)
2334 return ctx->abi->emit_fbfetch(ctx->abi);
2335
2336 for (unsigned chan = comp; chan < ve + comp; chan++) {
2337 if (indir_index) {
2338 unsigned count = glsl_count_attribute_slots(
2339 var->type, false);
2340 count -= chan / 4;
2341 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2342 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2343 stride, true, true);
2344
2345 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2346 tmp_vec,
2347 indir_index, "");
2348 } else {
2349 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2350 ctx->abi->outputs[idx + chan + const_index * stride],
2351 "");
2352 }
2353 }
2354 break;
2355 case nir_var_mem_global: {
2356 LLVMValueRef address = get_src(ctx, instr->src[0]);
2357 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2358 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2359 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2360 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2361 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2362 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2363
2364 if (stride != natural_stride || split_loads) {
2365 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2366 result_type = LLVMGetElementType(result_type);
2367
2368 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2369 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2370 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2371
2372 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2373 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2374 values[i] = LLVMBuildLoad(ctx->ac.builder,
2375 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2376
2377 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2378 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2379 }
2380 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2381 } else {
2382 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2383 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2384 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2385 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2386
2387 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2388 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2389 return val;
2390 }
2391 }
2392 default:
2393 unreachable("unhandle variable mode");
2394 }
2395 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2396 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2397 }
2398
2399 static void
2400 visit_store_var(struct ac_nir_context *ctx,
2401 nir_intrinsic_instr *instr)
2402 {
2403 if (ctx->ac.postponed_kill) {
2404 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2405 ctx->ac.postponed_kill, "");
2406 ac_build_ifcc(&ctx->ac, cond, 7002);
2407 }
2408
2409 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2410 nir_variable *var = nir_deref_instr_get_variable(deref);
2411
2412 LLVMValueRef temp_ptr, value;
2413 int idx = 0;
2414 unsigned comp = 0;
2415 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2416 int writemask = instr->const_index[0];
2417 LLVMValueRef indir_index;
2418 unsigned const_index;
2419
2420 if (var) {
2421 get_deref_offset(ctx, deref, false,
2422 NULL, NULL, &const_index, &indir_index);
2423 idx = var->data.driver_location;
2424 comp = var->data.location_frac;
2425
2426 if (var->data.compact) {
2427 const_index += comp;
2428 comp = 0;
2429 }
2430 }
2431
2432 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2433 (deref->mode == nir_var_shader_out ||
2434 deref->mode == nir_var_function_temp)) {
2435
2436 src = LLVMBuildBitCast(ctx->ac.builder, src,
2437 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2438 "");
2439
2440 writemask = widen_mask(writemask, 2);
2441 }
2442
2443 writemask = writemask << comp;
2444
2445 switch (deref->mode) {
2446 case nir_var_shader_out:
2447
2448 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2449 LLVMValueRef vertex_index = NULL;
2450 LLVMValueRef indir_index = NULL;
2451 unsigned const_index = 0;
2452 const bool is_patch = var->data.patch ||
2453 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2454 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2455
2456 get_deref_offset(ctx, deref, false, NULL,
2457 is_patch ? NULL : &vertex_index,
2458 &const_index, &indir_index);
2459
2460 ctx->abi->store_tcs_outputs(ctx->abi, var,
2461 vertex_index, indir_index,
2462 const_index, src, writemask);
2463 break;
2464 }
2465
2466 for (unsigned chan = 0; chan < 8; chan++) {
2467 int stride = 4;
2468 if (!(writemask & (1 << chan)))
2469 continue;
2470
2471 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2472
2473 if (var->data.compact)
2474 stride = 1;
2475 if (indir_index) {
2476 unsigned count = glsl_count_attribute_slots(
2477 var->type, false);
2478 count -= chan / 4;
2479 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2480 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2481 stride, true, true);
2482
2483 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2484 value, indir_index, "");
2485 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2486 count, stride, tmp_vec);
2487
2488 } else {
2489 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2490
2491 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2492 }
2493 }
2494 break;
2495 case nir_var_function_temp:
2496 for (unsigned chan = 0; chan < 8; chan++) {
2497 if (!(writemask & (1 << chan)))
2498 continue;
2499
2500 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2501 if (indir_index) {
2502 unsigned count = glsl_count_attribute_slots(
2503 var->type, false);
2504 count -= chan / 4;
2505 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2506 &ctx->ac, ctx->locals + idx + chan, count,
2507 4, true, true);
2508
2509 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2510 value, indir_index, "");
2511 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2512 count, 4, tmp_vec);
2513 } else {
2514 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2515
2516 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2517 }
2518 }
2519 break;
2520
2521 case nir_var_mem_global: {
2522 int writemask = instr->const_index[0];
2523 LLVMValueRef address = get_src(ctx, instr->src[0]);
2524 LLVMValueRef val = get_src(ctx, instr->src[1]);
2525
2526 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2527 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2528 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2529 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2530 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2531
2532 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2533 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2534 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2535
2536 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2537 stride == natural_stride && !split_stores) {
2538 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2539 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2540 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2541
2542 val = LLVMBuildBitCast(ctx->ac.builder, val,
2543 LLVMGetElementType(LLVMTypeOf(address)), "");
2544 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2545
2546 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2547 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2548 } else {
2549 LLVMTypeRef val_type = LLVMTypeOf(val);
2550 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2551 val_type = LLVMGetElementType(val_type);
2552
2553 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2554 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2555 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2556 for (unsigned chan = 0; chan < 4; chan++) {
2557 if (!(writemask & (1 << chan)))
2558 continue;
2559
2560 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2561
2562 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2563 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2564 chan);
2565 src = LLVMBuildBitCast(ctx->ac.builder, src,
2566 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2567 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2568
2569 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2570 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2571 }
2572 }
2573 break;
2574 }
2575 default:
2576 abort();
2577 break;
2578 }
2579
2580 if (ctx->ac.postponed_kill)
2581 ac_build_endif(&ctx->ac, 7002);
2582 }
2583
2584 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2585 {
2586 switch (dim) {
2587 case GLSL_SAMPLER_DIM_BUF:
2588 return 1;
2589 case GLSL_SAMPLER_DIM_1D:
2590 return array ? 2 : 1;
2591 case GLSL_SAMPLER_DIM_2D:
2592 return array ? 3 : 2;
2593 case GLSL_SAMPLER_DIM_MS:
2594 return array ? 4 : 3;
2595 case GLSL_SAMPLER_DIM_3D:
2596 case GLSL_SAMPLER_DIM_CUBE:
2597 return 3;
2598 case GLSL_SAMPLER_DIM_RECT:
2599 case GLSL_SAMPLER_DIM_SUBPASS:
2600 return 2;
2601 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2602 return 3;
2603 default:
2604 break;
2605 }
2606 return 0;
2607 }
2608
2609 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2610 LLVMValueRef coord_x, LLVMValueRef coord_y,
2611 LLVMValueRef coord_z,
2612 LLVMValueRef sample_index,
2613 LLVMValueRef fmask_desc_ptr)
2614 {
2615 unsigned sample_chan = coord_z ? 3 : 2;
2616 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2617 addr[sample_chan] = sample_index;
2618
2619 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2620 return addr[sample_chan];
2621 }
2622
2623 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2624 {
2625 assert(instr->src[0].is_ssa);
2626 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2627 }
2628
2629 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2630 const nir_intrinsic_instr *instr,
2631 LLVMValueRef dynamic_index,
2632 enum ac_descriptor_type desc_type,
2633 bool write)
2634 {
2635 nir_deref_instr *deref_instr =
2636 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2637 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2638
2639 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2640 }
2641
2642 static void get_image_coords(struct ac_nir_context *ctx,
2643 const nir_intrinsic_instr *instr,
2644 LLVMValueRef dynamic_desc_index,
2645 struct ac_image_args *args,
2646 enum glsl_sampler_dim dim,
2647 bool is_array)
2648 {
2649 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2650 LLVMValueRef masks[] = {
2651 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2652 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2653 };
2654 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2655
2656 int count;
2657 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2658 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2659 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2660 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2661 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2662 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2663 count = image_type_to_components_count(dim, is_array);
2664
2665 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2666 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2667 LLVMValueRef fmask_load_address[3];
2668
2669 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2670 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2671 if (is_array)
2672 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2673 else
2674 fmask_load_address[2] = NULL;
2675
2676 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2677 fmask_load_address[0],
2678 fmask_load_address[1],
2679 fmask_load_address[2],
2680 sample_index,
2681 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2682 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2683 }
2684 if (count == 1 && !gfx9_1d) {
2685 if (instr->src[1].ssa->num_components)
2686 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2687 else
2688 args->coords[0] = src0;
2689 } else {
2690 int chan;
2691 if (is_ms)
2692 count--;
2693 for (chan = 0; chan < count; ++chan) {
2694 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2695 }
2696
2697 if (gfx9_1d) {
2698 if (is_array) {
2699 args->coords[2] = args->coords[1];
2700 args->coords[1] = ctx->ac.i32_0;
2701 } else
2702 args->coords[1] = ctx->ac.i32_0;
2703 count++;
2704 }
2705 if (ctx->ac.chip_class == GFX9 &&
2706 dim == GLSL_SAMPLER_DIM_2D &&
2707 !is_array) {
2708 /* The hw can't bind a slice of a 3D image as a 2D
2709 * image, because it ignores BASE_ARRAY if the target
2710 * is 3D. The workaround is to read BASE_ARRAY and set
2711 * it as the 3rd address operand for all 2D images.
2712 */
2713 LLVMValueRef first_layer, const5, mask;
2714
2715 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2716 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2717 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2718 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2719
2720 args->coords[count] = first_layer;
2721 count++;
2722 }
2723
2724
2725 if (is_ms) {
2726 args->coords[count] = sample_index;
2727 count++;
2728 }
2729 }
2730 }
2731
2732 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2733 const nir_intrinsic_instr *instr,
2734 LLVMValueRef dynamic_index,
2735 bool write, bool atomic)
2736 {
2737 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2738 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2739 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2740 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2741 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2742
2743 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2744 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2745 elem_count, stride, "");
2746
2747 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2748 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2749 }
2750 return rsrc;
2751 }
2752
2753 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2754 struct waterfall_context *wctx,
2755 const nir_intrinsic_instr *instr)
2756 {
2757 nir_deref_instr *deref_instr = NULL;
2758
2759 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2760 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2761
2762 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2763 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2764 }
2765
2766 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2767 const nir_intrinsic_instr *instr,
2768 bool bindless)
2769 {
2770 LLVMValueRef res;
2771
2772 enum glsl_sampler_dim dim;
2773 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2774 bool is_array;
2775 if (bindless) {
2776 dim = nir_intrinsic_image_dim(instr);
2777 is_array = nir_intrinsic_image_array(instr);
2778 } else {
2779 const nir_deref_instr *image_deref = get_image_deref(instr);
2780 const struct glsl_type *type = image_deref->type;
2781 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2782 dim = glsl_get_sampler_dim(type);
2783 access |= var->data.access;
2784 is_array = glsl_sampler_type_is_array(type);
2785 }
2786
2787 struct waterfall_context wctx;
2788 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2789
2790 struct ac_image_args args = {};
2791
2792 args.cache_policy = get_cache_policy(ctx, access, false, false);
2793
2794 if (dim == GLSL_SAMPLER_DIM_BUF) {
2795 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2796 unsigned num_channels = util_last_bit(mask);
2797 LLVMValueRef rsrc, vindex;
2798
2799 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2800 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2801 ctx->ac.i32_0, "");
2802
2803 assert(instr->dest.is_ssa);
2804 bool can_speculate = access & ACCESS_CAN_REORDER;
2805 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2806 ctx->ac.i32_0, num_channels,
2807 args.cache_policy,
2808 can_speculate,
2809 instr->dest.ssa.bit_size == 16);
2810 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2811
2812 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2813 res = ac_to_integer(&ctx->ac, res);
2814 } else {
2815 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2816
2817 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2818 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2819 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2820 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2821 if (!level_zero)
2822 args.lod = get_src(ctx, instr->src[3]);
2823 args.dmask = 15;
2824 args.attributes = AC_FUNC_ATTR_READONLY;
2825
2826 assert(instr->dest.is_ssa);
2827 args.d16 = instr->dest.ssa.bit_size == 16;
2828
2829 res = ac_build_image_opcode(&ctx->ac, &args);
2830 }
2831 return exit_waterfall(ctx, &wctx, res);
2832 }
2833
2834 static void visit_image_store(struct ac_nir_context *ctx,
2835 const nir_intrinsic_instr *instr,
2836 bool bindless)
2837 {
2838 if (ctx->ac.postponed_kill) {
2839 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2840 ctx->ac.postponed_kill, "");
2841 ac_build_ifcc(&ctx->ac, cond, 7003);
2842 }
2843
2844 enum glsl_sampler_dim dim;
2845 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2846 bool is_array;
2847
2848 if (bindless) {
2849 dim = nir_intrinsic_image_dim(instr);
2850 is_array = nir_intrinsic_image_array(instr);
2851 } else {
2852 const nir_deref_instr *image_deref = get_image_deref(instr);
2853 const struct glsl_type *type = image_deref->type;
2854 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2855 dim = glsl_get_sampler_dim(type);
2856 access |= var->data.access;
2857 is_array = glsl_sampler_type_is_array(type);
2858 }
2859
2860 struct waterfall_context wctx;
2861 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2862
2863 bool writeonly_memory = access & ACCESS_NON_READABLE;
2864 struct ac_image_args args = {};
2865
2866 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2867
2868 if (dim == GLSL_SAMPLER_DIM_BUF) {
2869 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2870 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2871 unsigned src_channels = ac_get_llvm_num_components(src);
2872 LLVMValueRef vindex;
2873
2874 if (src_channels == 3)
2875 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2876
2877 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2878 get_src(ctx, instr->src[1]),
2879 ctx->ac.i32_0, "");
2880
2881 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2882 ctx->ac.i32_0, args.cache_policy);
2883 } else {
2884 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2885
2886 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2887 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2888 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2889 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2890 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2891 if (!level_zero)
2892 args.lod = get_src(ctx, instr->src[4]);
2893 args.dmask = 15;
2894 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2895
2896 ac_build_image_opcode(&ctx->ac, &args);
2897 }
2898
2899 exit_waterfall(ctx, &wctx, NULL);
2900 if (ctx->ac.postponed_kill)
2901 ac_build_endif(&ctx->ac, 7003);
2902 }
2903
2904 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2905 const nir_intrinsic_instr *instr,
2906 bool bindless)
2907 {
2908 if (ctx->ac.postponed_kill) {
2909 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2910 ctx->ac.postponed_kill, "");
2911 ac_build_ifcc(&ctx->ac, cond, 7004);
2912 }
2913
2914 LLVMValueRef params[7];
2915 int param_count = 0;
2916
2917 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2918 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2919 const char *atomic_name;
2920 char intrinsic_name[64];
2921 enum ac_atomic_op atomic_subop;
2922 ASSERTED int length;
2923
2924 enum glsl_sampler_dim dim;
2925 bool is_array;
2926 if (bindless) {
2927 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2928 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2929 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2930 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2931 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2932 assert(format == GL_R32UI || format == GL_R32I);
2933 }
2934 dim = nir_intrinsic_image_dim(instr);
2935 is_array = nir_intrinsic_image_array(instr);
2936 } else {
2937 const struct glsl_type *type = get_image_deref(instr)->type;
2938 dim = glsl_get_sampler_dim(type);
2939 is_array = glsl_sampler_type_is_array(type);
2940 }
2941
2942 struct waterfall_context wctx;
2943 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2944
2945 switch (instr->intrinsic) {
2946 case nir_intrinsic_bindless_image_atomic_add:
2947 case nir_intrinsic_image_deref_atomic_add:
2948 atomic_name = "add";
2949 atomic_subop = ac_atomic_add;
2950 break;
2951 case nir_intrinsic_bindless_image_atomic_imin:
2952 case nir_intrinsic_image_deref_atomic_imin:
2953 atomic_name = "smin";
2954 atomic_subop = ac_atomic_smin;
2955 break;
2956 case nir_intrinsic_bindless_image_atomic_umin:
2957 case nir_intrinsic_image_deref_atomic_umin:
2958 atomic_name = "umin";
2959 atomic_subop = ac_atomic_umin;
2960 break;
2961 case nir_intrinsic_bindless_image_atomic_imax:
2962 case nir_intrinsic_image_deref_atomic_imax:
2963 atomic_name = "smax";
2964 atomic_subop = ac_atomic_smax;
2965 break;
2966 case nir_intrinsic_bindless_image_atomic_umax:
2967 case nir_intrinsic_image_deref_atomic_umax:
2968 atomic_name = "umax";
2969 atomic_subop = ac_atomic_umax;
2970 break;
2971 case nir_intrinsic_bindless_image_atomic_and:
2972 case nir_intrinsic_image_deref_atomic_and:
2973 atomic_name = "and";
2974 atomic_subop = ac_atomic_and;
2975 break;
2976 case nir_intrinsic_bindless_image_atomic_or:
2977 case nir_intrinsic_image_deref_atomic_or:
2978 atomic_name = "or";
2979 atomic_subop = ac_atomic_or;
2980 break;
2981 case nir_intrinsic_bindless_image_atomic_xor:
2982 case nir_intrinsic_image_deref_atomic_xor:
2983 atomic_name = "xor";
2984 atomic_subop = ac_atomic_xor;
2985 break;
2986 case nir_intrinsic_bindless_image_atomic_exchange:
2987 case nir_intrinsic_image_deref_atomic_exchange:
2988 atomic_name = "swap";
2989 atomic_subop = ac_atomic_swap;
2990 break;
2991 case nir_intrinsic_bindless_image_atomic_comp_swap:
2992 case nir_intrinsic_image_deref_atomic_comp_swap:
2993 atomic_name = "cmpswap";
2994 atomic_subop = 0; /* not used */
2995 break;
2996 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2997 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2998 atomic_name = "inc";
2999 atomic_subop = ac_atomic_inc_wrap;
3000 break;
3001 }
3002 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3003 case nir_intrinsic_image_deref_atomic_dec_wrap:
3004 atomic_name = "dec";
3005 atomic_subop = ac_atomic_dec_wrap;
3006 break;
3007 default:
3008 abort();
3009 }
3010
3011 if (cmpswap)
3012 params[param_count++] = get_src(ctx, instr->src[4]);
3013 params[param_count++] = get_src(ctx, instr->src[3]);
3014
3015 LLVMValueRef result;
3016 if (dim == GLSL_SAMPLER_DIM_BUF) {
3017 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3018 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3019 ctx->ac.i32_0, ""); /* vindex */
3020 params[param_count++] = ctx->ac.i32_0; /* voffset */
3021 if (LLVM_VERSION_MAJOR >= 9) {
3022 /* XXX: The new raw/struct atomic intrinsics are buggy
3023 * with LLVM 8, see r358579.
3024 */
3025 params[param_count++] = ctx->ac.i32_0; /* soffset */
3026 params[param_count++] = ctx->ac.i32_0; /* slc */
3027
3028 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3029 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3030 } else {
3031 params[param_count++] = ctx->ac.i1false; /* slc */
3032
3033 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3034 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3035 }
3036
3037 assert(length < sizeof(intrinsic_name));
3038 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3039 params, param_count, 0);
3040 } else {
3041 struct ac_image_args args = {};
3042 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3043 args.atomic = atomic_subop;
3044 args.data[0] = params[0];
3045 if (cmpswap)
3046 args.data[1] = params[1];
3047 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3048 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3049 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3050
3051 result = ac_build_image_opcode(&ctx->ac, &args);
3052 }
3053
3054 result = exit_waterfall(ctx, &wctx, result);
3055 if (ctx->ac.postponed_kill)
3056 ac_build_endif(&ctx->ac, 7004);
3057 return result;
3058 }
3059
3060 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3061 nir_intrinsic_instr *instr)
3062 {
3063 struct waterfall_context wctx;
3064 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3065 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3066
3067 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3068
3069 return exit_waterfall(ctx, &wctx, ret);
3070 }
3071
3072 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3073 const nir_intrinsic_instr *instr,
3074 bool bindless)
3075 {
3076 LLVMValueRef res;
3077
3078 enum glsl_sampler_dim dim;
3079 bool is_array;
3080 if (bindless) {
3081 dim = nir_intrinsic_image_dim(instr);
3082 is_array = nir_intrinsic_image_array(instr);
3083 } else {
3084 const struct glsl_type *type = get_image_deref(instr)->type;
3085 dim = glsl_get_sampler_dim(type);
3086 is_array = glsl_sampler_type_is_array(type);
3087 }
3088
3089 struct waterfall_context wctx;
3090 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3091
3092 if (dim == GLSL_SAMPLER_DIM_BUF) {
3093 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3094 } else {
3095
3096 struct ac_image_args args = { 0 };
3097
3098 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3099 args.dmask = 0xf;
3100 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3101 args.opcode = ac_image_get_resinfo;
3102 assert(nir_src_as_uint(instr->src[1]) == 0);
3103 args.lod = ctx->ac.i32_0;
3104 args.attributes = AC_FUNC_ATTR_READNONE;
3105
3106 res = ac_build_image_opcode(&ctx->ac, &args);
3107
3108 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3109
3110 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3111 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3112 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3113 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3114 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3115 }
3116
3117 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3118 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3119 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3120 ctx->ac.i32_1, "");
3121 }
3122 }
3123 return exit_waterfall(ctx, &wctx, res);
3124 }
3125
3126 static void emit_membar(struct ac_llvm_context *ac,
3127 const nir_intrinsic_instr *instr)
3128 {
3129 unsigned wait_flags = 0;
3130
3131 switch (instr->intrinsic) {
3132 case nir_intrinsic_memory_barrier:
3133 case nir_intrinsic_group_memory_barrier:
3134 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3135 break;
3136 case nir_intrinsic_memory_barrier_buffer:
3137 case nir_intrinsic_memory_barrier_image:
3138 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3139 break;
3140 case nir_intrinsic_memory_barrier_shared:
3141 wait_flags = AC_WAIT_LGKM;
3142 break;
3143 default:
3144 break;
3145 }
3146
3147 ac_build_waitcnt(ac, wait_flags);
3148 }
3149
3150 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3151 {
3152 /* GFX6 only (thanks to a hw bug workaround):
3153 * The real barrier instruction isn’t needed, because an entire patch
3154 * always fits into a single wave.
3155 */
3156 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3157 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3158 return;
3159 }
3160 ac_build_s_barrier(ac);
3161 }
3162
3163 static void emit_discard(struct ac_nir_context *ctx,
3164 const nir_intrinsic_instr *instr)
3165 {
3166 LLVMValueRef cond;
3167
3168 if (instr->intrinsic == nir_intrinsic_discard_if) {
3169 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3170 get_src(ctx, instr->src[0]),
3171 ctx->ac.i32_0, "");
3172 } else {
3173 assert(instr->intrinsic == nir_intrinsic_discard);
3174 cond = ctx->ac.i1false;
3175 }
3176
3177 ac_build_kill_if_false(&ctx->ac, cond);
3178 }
3179
3180 static void emit_demote(struct ac_nir_context *ctx,
3181 const nir_intrinsic_instr *instr)
3182 {
3183 LLVMValueRef cond;
3184
3185 if (instr->intrinsic == nir_intrinsic_demote_if) {
3186 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3187 get_src(ctx, instr->src[0]),
3188 ctx->ac.i32_0, "");
3189 } else {
3190 assert(instr->intrinsic == nir_intrinsic_demote);
3191 cond = ctx->ac.i1false;
3192 }
3193
3194 /* Kill immediately while maintaining WQM. */
3195 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3196
3197 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3198 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3199 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3200 return;
3201 }
3202
3203 static LLVMValueRef
3204 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3205 {
3206 LLVMValueRef result;
3207 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3208 result = LLVMBuildAnd(ctx->ac.builder,
3209 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3210 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3211
3212 if (ctx->ac.wave_size == 32)
3213 result = LLVMBuildLShr(ctx->ac.builder, result,
3214 LLVMConstInt(ctx->ac.i32, 1, false), "");
3215
3216 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3217 }
3218
3219 static LLVMValueRef
3220 visit_load_subgroup_id(struct ac_nir_context *ctx)
3221 {
3222 if (ctx->stage == MESA_SHADER_COMPUTE) {
3223 LLVMValueRef result;
3224 result = LLVMBuildAnd(ctx->ac.builder,
3225 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3226 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3227 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3228 } else {
3229 return LLVMConstInt(ctx->ac.i32, 0, false);
3230 }
3231 }
3232
3233 static LLVMValueRef
3234 visit_load_num_subgroups(struct ac_nir_context *ctx)
3235 {
3236 if (ctx->stage == MESA_SHADER_COMPUTE) {
3237 return LLVMBuildAnd(ctx->ac.builder,
3238 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3239 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3240 } else {
3241 return LLVMConstInt(ctx->ac.i32, 1, false);
3242 }
3243 }
3244
3245 static LLVMValueRef
3246 visit_first_invocation(struct ac_nir_context *ctx)
3247 {
3248 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3249 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3250
3251 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3252 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3253 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3254 ctx->ac.iN_wavemask, args, 2,
3255 AC_FUNC_ATTR_NOUNWIND |
3256 AC_FUNC_ATTR_READNONE);
3257
3258 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3259 }
3260
3261 static LLVMValueRef
3262 visit_load_shared(struct ac_nir_context *ctx,
3263 const nir_intrinsic_instr *instr)
3264 {
3265 LLVMValueRef values[4], derived_ptr, index, ret;
3266
3267 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3268 instr->dest.ssa.bit_size);
3269
3270 for (int chan = 0; chan < instr->num_components; chan++) {
3271 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3272 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3273 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3274 }
3275
3276 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3277 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3278 }
3279
3280 static void
3281 visit_store_shared(struct ac_nir_context *ctx,
3282 const nir_intrinsic_instr *instr)
3283 {
3284 LLVMValueRef derived_ptr, data,index;
3285 LLVMBuilderRef builder = ctx->ac.builder;
3286
3287 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3288 instr->src[0].ssa->bit_size);
3289 LLVMValueRef src = get_src(ctx, instr->src[0]);
3290
3291 int writemask = nir_intrinsic_write_mask(instr);
3292 for (int chan = 0; chan < 4; chan++) {
3293 if (!(writemask & (1 << chan))) {
3294 continue;
3295 }
3296 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3297 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3298 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3299 LLVMBuildStore(builder, data, derived_ptr);
3300 }
3301 }
3302
3303 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3304 const nir_intrinsic_instr *instr,
3305 LLVMValueRef ptr, int src_idx)
3306 {
3307 if (ctx->ac.postponed_kill) {
3308 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3309 ctx->ac.postponed_kill, "");
3310 ac_build_ifcc(&ctx->ac, cond, 7005);
3311 }
3312
3313 LLVMValueRef result;
3314 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3315
3316 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3317
3318 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3319 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3320 if (deref->mode == nir_var_mem_global) {
3321 /* use "singlethread" sync scope to implement relaxed ordering */
3322 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3323
3324 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3325 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3326 }
3327 }
3328
3329 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3330 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3331 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3332 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3333 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3334 } else {
3335 LLVMAtomicRMWBinOp op;
3336 switch (instr->intrinsic) {
3337 case nir_intrinsic_shared_atomic_add:
3338 case nir_intrinsic_deref_atomic_add:
3339 op = LLVMAtomicRMWBinOpAdd;
3340 break;
3341 case nir_intrinsic_shared_atomic_umin:
3342 case nir_intrinsic_deref_atomic_umin:
3343 op = LLVMAtomicRMWBinOpUMin;
3344 break;
3345 case nir_intrinsic_shared_atomic_umax:
3346 case nir_intrinsic_deref_atomic_umax:
3347 op = LLVMAtomicRMWBinOpUMax;
3348 break;
3349 case nir_intrinsic_shared_atomic_imin:
3350 case nir_intrinsic_deref_atomic_imin:
3351 op = LLVMAtomicRMWBinOpMin;
3352 break;
3353 case nir_intrinsic_shared_atomic_imax:
3354 case nir_intrinsic_deref_atomic_imax:
3355 op = LLVMAtomicRMWBinOpMax;
3356 break;
3357 case nir_intrinsic_shared_atomic_and:
3358 case nir_intrinsic_deref_atomic_and:
3359 op = LLVMAtomicRMWBinOpAnd;
3360 break;
3361 case nir_intrinsic_shared_atomic_or:
3362 case nir_intrinsic_deref_atomic_or:
3363 op = LLVMAtomicRMWBinOpOr;
3364 break;
3365 case nir_intrinsic_shared_atomic_xor:
3366 case nir_intrinsic_deref_atomic_xor:
3367 op = LLVMAtomicRMWBinOpXor;
3368 break;
3369 case nir_intrinsic_shared_atomic_exchange:
3370 case nir_intrinsic_deref_atomic_exchange:
3371 op = LLVMAtomicRMWBinOpXchg;
3372 break;
3373 #if LLVM_VERSION_MAJOR >= 10
3374 case nir_intrinsic_shared_atomic_fadd:
3375 case nir_intrinsic_deref_atomic_fadd:
3376 op = LLVMAtomicRMWBinOpFAdd;
3377 break;
3378 #endif
3379 default:
3380 return NULL;
3381 }
3382
3383 LLVMValueRef val;
3384
3385 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3386 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3387 val = ac_to_float(&ctx->ac, src);
3388 } else {
3389 val = ac_to_integer(&ctx->ac, src);
3390 }
3391
3392 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3393 }
3394
3395 if (ctx->ac.postponed_kill)
3396 ac_build_endif(&ctx->ac, 7005);
3397 return result;
3398 }
3399
3400 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3401 {
3402 LLVMValueRef values[2];
3403 LLVMValueRef pos[2];
3404
3405 pos[0] = ac_to_float(&ctx->ac,
3406 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3407 pos[1] = ac_to_float(&ctx->ac,
3408 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3409
3410 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3411 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3412 return ac_build_gather_values(&ctx->ac, values, 2);
3413 }
3414
3415 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3416 enum glsl_interp_mode interp, unsigned location)
3417 {
3418 switch (interp) {
3419 case INTERP_MODE_FLAT:
3420 default:
3421 return NULL;
3422 case INTERP_MODE_SMOOTH:
3423 case INTERP_MODE_NONE:
3424 if (location == INTERP_CENTER)
3425 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3426 else if (location == INTERP_CENTROID)
3427 return ctx->abi->persp_centroid;
3428 else if (location == INTERP_SAMPLE)
3429 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3430 break;
3431 case INTERP_MODE_NOPERSPECTIVE:
3432 if (location == INTERP_CENTER)
3433 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3434 else if (location == INTERP_CENTROID)
3435 return ctx->abi->linear_centroid;
3436 else if (location == INTERP_SAMPLE)
3437 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3438 break;
3439 }
3440 return NULL;
3441 }
3442
3443 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3444 unsigned mode)
3445 {
3446 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3447 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3448 }
3449
3450 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3451 unsigned mode,
3452 LLVMValueRef offset)
3453 {
3454 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3455 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3456 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3457
3458 LLVMValueRef ij_out[2];
3459 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3460
3461 /*
3462 * take the I then J parameters, and the DDX/Y for it, and
3463 * calculate the IJ inputs for the interpolator.
3464 * temp1 = ddx * offset/sample.x + I;
3465 * interp_param.I = ddy * offset/sample.y + temp1;
3466 * temp1 = ddx * offset/sample.x + J;
3467 * interp_param.J = ddy * offset/sample.y + temp1;
3468 */
3469 for (unsigned i = 0; i < 2; i++) {
3470 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3471 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3472 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3473 ddxy_out, ix_ll, "");
3474 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3475 ddxy_out, iy_ll, "");
3476 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3477 interp_param, ix_ll, "");
3478 LLVMValueRef temp1, temp2;
3479
3480 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3481 ctx->ac.f32, "");
3482
3483 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3484 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3485
3486 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3487 temp2, ctx->ac.i32, "");
3488 }
3489 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3490 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3491 }
3492
3493 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3494 unsigned mode)
3495 {
3496 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3497 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3498 }
3499
3500 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3501 unsigned mode,
3502 LLVMValueRef sample_id)
3503 {
3504 if (ctx->abi->interp_at_sample_force_center)
3505 return barycentric_center(ctx, mode);
3506
3507 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3508
3509 /* fetch sample ID */
3510 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3511
3512 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3513 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3514 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3515 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3516 LLVMValueRef coords[] = { src_c0, src_c1 };
3517 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3518
3519 return barycentric_offset(ctx, mode, offset);
3520 }
3521
3522
3523 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3524 unsigned mode)
3525 {
3526 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3527 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3528 }
3529
3530 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3531 {
3532 return LLVMBuildBitCast(ctx->ac.builder,
3533 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3534 ctx->ac.v3i32, "");
3535 }
3536
3537 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3538 LLVMValueRef interp_param,
3539 unsigned index, unsigned comp_start,
3540 unsigned num_components,
3541 unsigned bitsize)
3542 {
3543 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3544 LLVMValueRef interp_param_f;
3545
3546 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3547 interp_param, ctx->ac.v2f32, "");
3548 LLVMValueRef i = LLVMBuildExtractElement(
3549 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3550 LLVMValueRef j = LLVMBuildExtractElement(
3551 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3552
3553 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3554 if (ctx->verified_interp &&
3555 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3556 LLVMValueRef args[2];
3557 args[0] = i;
3558 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3559 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3560 args, 2, AC_FUNC_ATTR_READNONE);
3561 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3562 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3563 }
3564
3565 LLVMValueRef values[4];
3566 assert(bitsize == 16 || bitsize == 32);
3567 for (unsigned comp = 0; comp < num_components; comp++) {
3568 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3569 if (bitsize == 16) {
3570 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3571 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3572 } else {
3573 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3574 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3575 }
3576 }
3577
3578 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3579 }
3580
3581 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3582 nir_intrinsic_instr *instr)
3583 {
3584 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3585
3586 /* We only lower inputs for fragment shaders ATM */
3587 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3588 assert(offset);
3589 assert(offset[0].i32 == 0);
3590
3591 unsigned component = nir_intrinsic_component(instr);
3592 unsigned index = nir_intrinsic_base(instr);
3593 unsigned vertex_id = 2; /* P0 */
3594
3595 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3596 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3597
3598 switch (src0[0].i32) {
3599 case 0:
3600 vertex_id = 2;
3601 break;
3602 case 1:
3603 vertex_id = 0;
3604 break;
3605 case 2:
3606 vertex_id = 1;
3607 break;
3608 default:
3609 unreachable("Invalid vertex index");
3610 }
3611 }
3612
3613 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3614 LLVMValueRef values[8];
3615
3616 /* Each component of a 64-bit value takes up two GL-level channels. */
3617 unsigned num_components = instr->dest.ssa.num_components;
3618 unsigned bit_size = instr->dest.ssa.bit_size;
3619 unsigned channels =
3620 bit_size == 64 ? num_components * 2 : num_components;
3621
3622 for (unsigned chan = 0; chan < channels; chan++) {
3623 if (component + chan > 4)
3624 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3625 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3626 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3627 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3628 llvm_chan,
3629 attr_number,
3630 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3631 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3632 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3633 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3634 }
3635
3636 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3637 if (bit_size == 64) {
3638 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3639 LLVMVectorType(ctx->ac.i64, num_components);
3640 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3641 }
3642 return result;
3643 }
3644
3645 static void visit_intrinsic(struct ac_nir_context *ctx,
3646 nir_intrinsic_instr *instr)
3647 {
3648 LLVMValueRef result = NULL;
3649
3650 switch (instr->intrinsic) {
3651 case nir_intrinsic_ballot:
3652 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3653 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3654 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3655 break;
3656 case nir_intrinsic_read_invocation:
3657 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3658 get_src(ctx, instr->src[1]));
3659 break;
3660 case nir_intrinsic_read_first_invocation:
3661 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3662 break;
3663 case nir_intrinsic_load_subgroup_invocation:
3664 result = ac_get_thread_id(&ctx->ac);
3665 break;
3666 case nir_intrinsic_load_work_group_id: {
3667 LLVMValueRef values[3];
3668
3669 for (int i = 0; i < 3; i++) {
3670 values[i] = ctx->args->workgroup_ids[i].used ?
3671 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3672 }
3673
3674 result = ac_build_gather_values(&ctx->ac, values, 3);
3675 break;
3676 }
3677 case nir_intrinsic_load_base_vertex:
3678 case nir_intrinsic_load_first_vertex:
3679 result = ctx->abi->load_base_vertex(ctx->abi);
3680 break;
3681 case nir_intrinsic_load_local_group_size:
3682 result = ctx->abi->load_local_group_size(ctx->abi);
3683 break;
3684 case nir_intrinsic_load_vertex_id:
3685 result = LLVMBuildAdd(ctx->ac.builder,
3686 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3687 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3688 break;
3689 case nir_intrinsic_load_vertex_id_zero_base: {
3690 result = ctx->abi->vertex_id;
3691 break;
3692 }
3693 case nir_intrinsic_load_local_invocation_id: {
3694 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3695 break;
3696 }
3697 case nir_intrinsic_load_base_instance:
3698 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3699 break;
3700 case nir_intrinsic_load_draw_id:
3701 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3702 break;
3703 case nir_intrinsic_load_view_index:
3704 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3705 break;
3706 case nir_intrinsic_load_invocation_id:
3707 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3708 result = ac_unpack_param(&ctx->ac,
3709 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3710 8, 5);
3711 } else {
3712 if (ctx->ac.chip_class >= GFX10) {
3713 result = LLVMBuildAnd(ctx->ac.builder,
3714 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3715 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3716 } else {
3717 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3718 }
3719 }
3720 break;
3721 case nir_intrinsic_load_primitive_id:
3722 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3723 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3724 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3725 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3726 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3727 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3728 } else
3729 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3730 break;
3731 case nir_intrinsic_load_sample_id:
3732 result = ac_unpack_param(&ctx->ac,
3733 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3734 8, 4);
3735 break;
3736 case nir_intrinsic_load_sample_pos:
3737 result = load_sample_pos(ctx);
3738 break;
3739 case nir_intrinsic_load_sample_mask_in:
3740 result = ctx->abi->load_sample_mask_in(ctx->abi);
3741 break;
3742 case nir_intrinsic_load_frag_coord: {
3743 LLVMValueRef values[4] = {
3744 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3745 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3746 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3747 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3748 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3749 };
3750 result = ac_to_integer(&ctx->ac,
3751 ac_build_gather_values(&ctx->ac, values, 4));
3752 break;
3753 }
3754 case nir_intrinsic_load_layer_id:
3755 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3756 break;
3757 case nir_intrinsic_load_front_face:
3758 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3759 break;
3760 case nir_intrinsic_load_helper_invocation:
3761 result = ac_build_load_helper_invocation(&ctx->ac);
3762 break;
3763 case nir_intrinsic_is_helper_invocation:
3764 result = ac_build_is_helper_invocation(&ctx->ac);
3765 break;
3766 case nir_intrinsic_load_color0:
3767 result = ctx->abi->color0;
3768 break;
3769 case nir_intrinsic_load_color1:
3770 result = ctx->abi->color1;
3771 break;
3772 case nir_intrinsic_load_user_data_amd:
3773 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3774 result = ctx->abi->user_data;
3775 break;
3776 case nir_intrinsic_load_instance_id:
3777 result = ctx->abi->instance_id;
3778 break;
3779 case nir_intrinsic_load_num_work_groups:
3780 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3781 break;
3782 case nir_intrinsic_load_local_invocation_index:
3783 result = visit_load_local_invocation_index(ctx);
3784 break;
3785 case nir_intrinsic_load_subgroup_id:
3786 result = visit_load_subgroup_id(ctx);
3787 break;
3788 case nir_intrinsic_load_num_subgroups:
3789 result = visit_load_num_subgroups(ctx);
3790 break;
3791 case nir_intrinsic_first_invocation:
3792 result = visit_first_invocation(ctx);
3793 break;
3794 case nir_intrinsic_load_push_constant:
3795 result = visit_load_push_constant(ctx, instr);
3796 break;
3797 case nir_intrinsic_vulkan_resource_index: {
3798 LLVMValueRef index = get_src(ctx, instr->src[0]);
3799 unsigned desc_set = nir_intrinsic_desc_set(instr);
3800 unsigned binding = nir_intrinsic_binding(instr);
3801
3802 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3803 binding);
3804 break;
3805 }
3806 case nir_intrinsic_vulkan_resource_reindex:
3807 result = visit_vulkan_resource_reindex(ctx, instr);
3808 break;
3809 case nir_intrinsic_store_ssbo:
3810 visit_store_ssbo(ctx, instr);
3811 break;
3812 case nir_intrinsic_load_ssbo:
3813 result = visit_load_buffer(ctx, instr);
3814 break;
3815 case nir_intrinsic_ssbo_atomic_add:
3816 case nir_intrinsic_ssbo_atomic_imin:
3817 case nir_intrinsic_ssbo_atomic_umin:
3818 case nir_intrinsic_ssbo_atomic_imax:
3819 case nir_intrinsic_ssbo_atomic_umax:
3820 case nir_intrinsic_ssbo_atomic_and:
3821 case nir_intrinsic_ssbo_atomic_or:
3822 case nir_intrinsic_ssbo_atomic_xor:
3823 case nir_intrinsic_ssbo_atomic_exchange:
3824 case nir_intrinsic_ssbo_atomic_comp_swap:
3825 result = visit_atomic_ssbo(ctx, instr);
3826 break;
3827 case nir_intrinsic_load_ubo:
3828 result = visit_load_ubo_buffer(ctx, instr);
3829 break;
3830 case nir_intrinsic_get_buffer_size:
3831 result = visit_get_buffer_size(ctx, instr);
3832 break;
3833 case nir_intrinsic_load_deref:
3834 result = visit_load_var(ctx, instr);
3835 break;
3836 case nir_intrinsic_store_deref:
3837 visit_store_var(ctx, instr);
3838 break;
3839 case nir_intrinsic_load_shared:
3840 result = visit_load_shared(ctx, instr);
3841 break;
3842 case nir_intrinsic_store_shared:
3843 visit_store_shared(ctx, instr);
3844 break;
3845 case nir_intrinsic_bindless_image_samples:
3846 case nir_intrinsic_image_deref_samples:
3847 result = visit_image_samples(ctx, instr);
3848 break;
3849 case nir_intrinsic_bindless_image_load:
3850 result = visit_image_load(ctx, instr, true);
3851 break;
3852 case nir_intrinsic_image_deref_load:
3853 result = visit_image_load(ctx, instr, false);
3854 break;
3855 case nir_intrinsic_bindless_image_store:
3856 visit_image_store(ctx, instr, true);
3857 break;
3858 case nir_intrinsic_image_deref_store:
3859 visit_image_store(ctx, instr, false);
3860 break;
3861 case nir_intrinsic_bindless_image_atomic_add:
3862 case nir_intrinsic_bindless_image_atomic_imin:
3863 case nir_intrinsic_bindless_image_atomic_umin:
3864 case nir_intrinsic_bindless_image_atomic_imax:
3865 case nir_intrinsic_bindless_image_atomic_umax:
3866 case nir_intrinsic_bindless_image_atomic_and:
3867 case nir_intrinsic_bindless_image_atomic_or:
3868 case nir_intrinsic_bindless_image_atomic_xor:
3869 case nir_intrinsic_bindless_image_atomic_exchange:
3870 case nir_intrinsic_bindless_image_atomic_comp_swap:
3871 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3872 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3873 result = visit_image_atomic(ctx, instr, true);
3874 break;
3875 case nir_intrinsic_image_deref_atomic_add:
3876 case nir_intrinsic_image_deref_atomic_imin:
3877 case nir_intrinsic_image_deref_atomic_umin:
3878 case nir_intrinsic_image_deref_atomic_imax:
3879 case nir_intrinsic_image_deref_atomic_umax:
3880 case nir_intrinsic_image_deref_atomic_and:
3881 case nir_intrinsic_image_deref_atomic_or:
3882 case nir_intrinsic_image_deref_atomic_xor:
3883 case nir_intrinsic_image_deref_atomic_exchange:
3884 case nir_intrinsic_image_deref_atomic_comp_swap:
3885 case nir_intrinsic_image_deref_atomic_inc_wrap:
3886 case nir_intrinsic_image_deref_atomic_dec_wrap:
3887 result = visit_image_atomic(ctx, instr, false);
3888 break;
3889 case nir_intrinsic_bindless_image_size:
3890 result = visit_image_size(ctx, instr, true);
3891 break;
3892 case nir_intrinsic_image_deref_size:
3893 result = visit_image_size(ctx, instr, false);
3894 break;
3895 case nir_intrinsic_shader_clock:
3896 result = ac_build_shader_clock(&ctx->ac,
3897 nir_intrinsic_memory_scope(instr));
3898 break;
3899 case nir_intrinsic_discard:
3900 case nir_intrinsic_discard_if:
3901 emit_discard(ctx, instr);
3902 break;
3903 case nir_intrinsic_demote:
3904 case nir_intrinsic_demote_if:
3905 emit_demote(ctx, instr);
3906 break;
3907 case nir_intrinsic_memory_barrier:
3908 case nir_intrinsic_group_memory_barrier:
3909 case nir_intrinsic_memory_barrier_buffer:
3910 case nir_intrinsic_memory_barrier_image:
3911 case nir_intrinsic_memory_barrier_shared:
3912 emit_membar(&ctx->ac, instr);
3913 break;
3914 case nir_intrinsic_scoped_barrier: {
3915 assert(!(nir_intrinsic_memory_semantics(instr) &
3916 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
3917
3918 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
3919
3920 unsigned wait_flags = 0;
3921 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
3922 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3923 if (modes & nir_var_mem_shared)
3924 wait_flags |= AC_WAIT_LGKM;
3925
3926 if (wait_flags)
3927 ac_build_waitcnt(&ctx->ac, wait_flags);
3928
3929 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
3930 ac_emit_barrier(&ctx->ac, ctx->stage);
3931 break;
3932 }
3933 case nir_intrinsic_memory_barrier_tcs_patch:
3934 break;
3935 case nir_intrinsic_control_barrier:
3936 ac_emit_barrier(&ctx->ac, ctx->stage);
3937 break;
3938 case nir_intrinsic_shared_atomic_add:
3939 case nir_intrinsic_shared_atomic_imin:
3940 case nir_intrinsic_shared_atomic_umin:
3941 case nir_intrinsic_shared_atomic_imax:
3942 case nir_intrinsic_shared_atomic_umax:
3943 case nir_intrinsic_shared_atomic_and:
3944 case nir_intrinsic_shared_atomic_or:
3945 case nir_intrinsic_shared_atomic_xor:
3946 case nir_intrinsic_shared_atomic_exchange:
3947 case nir_intrinsic_shared_atomic_comp_swap:
3948 case nir_intrinsic_shared_atomic_fadd: {
3949 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3950 instr->src[1].ssa->bit_size);
3951 result = visit_var_atomic(ctx, instr, ptr, 1);
3952 break;
3953 }
3954 case nir_intrinsic_deref_atomic_add:
3955 case nir_intrinsic_deref_atomic_imin:
3956 case nir_intrinsic_deref_atomic_umin:
3957 case nir_intrinsic_deref_atomic_imax:
3958 case nir_intrinsic_deref_atomic_umax:
3959 case nir_intrinsic_deref_atomic_and:
3960 case nir_intrinsic_deref_atomic_or:
3961 case nir_intrinsic_deref_atomic_xor:
3962 case nir_intrinsic_deref_atomic_exchange:
3963 case nir_intrinsic_deref_atomic_comp_swap:
3964 case nir_intrinsic_deref_atomic_fadd: {
3965 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3966 result = visit_var_atomic(ctx, instr, ptr, 1);
3967 break;
3968 }
3969 case nir_intrinsic_load_barycentric_pixel:
3970 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3971 break;
3972 case nir_intrinsic_load_barycentric_centroid:
3973 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3974 break;
3975 case nir_intrinsic_load_barycentric_sample:
3976 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3977 break;
3978 case nir_intrinsic_load_barycentric_model:
3979 result = barycentric_model(ctx);
3980 break;
3981 case nir_intrinsic_load_barycentric_at_offset: {
3982 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3983 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3984 break;
3985 }
3986 case nir_intrinsic_load_barycentric_at_sample: {
3987 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3988 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3989 break;
3990 }
3991 case nir_intrinsic_load_interpolated_input: {
3992 /* We assume any indirect loads have been lowered away */
3993 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3994 assert(offset);
3995 assert(offset[0].i32 == 0);
3996
3997 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3998 unsigned index = nir_intrinsic_base(instr);
3999 unsigned component = nir_intrinsic_component(instr);
4000 result = load_interpolated_input(ctx, interp_param, index,
4001 component,
4002 instr->dest.ssa.num_components,
4003 instr->dest.ssa.bit_size);
4004 break;
4005 }
4006 case nir_intrinsic_load_input:
4007 case nir_intrinsic_load_input_vertex:
4008 result = load_input(ctx, instr);
4009 break;
4010 case nir_intrinsic_emit_vertex:
4011 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4012 break;
4013 case nir_intrinsic_emit_vertex_with_counter: {
4014 unsigned stream = nir_intrinsic_stream_id(instr);
4015 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4016 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4017 next_vertex,
4018 ctx->abi->outputs);
4019 break;
4020 }
4021 case nir_intrinsic_end_primitive:
4022 case nir_intrinsic_end_primitive_with_counter:
4023 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4024 break;
4025 case nir_intrinsic_load_tess_coord:
4026 result = ctx->abi->load_tess_coord(ctx->abi);
4027 break;
4028 case nir_intrinsic_load_tess_level_outer:
4029 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4030 break;
4031 case nir_intrinsic_load_tess_level_inner:
4032 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4033 break;
4034 case nir_intrinsic_load_tess_level_outer_default:
4035 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4036 break;
4037 case nir_intrinsic_load_tess_level_inner_default:
4038 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4039 break;
4040 case nir_intrinsic_load_patch_vertices_in:
4041 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4042 break;
4043 case nir_intrinsic_vote_all: {
4044 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4045 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4046 break;
4047 }
4048 case nir_intrinsic_vote_any: {
4049 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4050 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4051 break;
4052 }
4053 case nir_intrinsic_shuffle:
4054 if (ctx->ac.chip_class == GFX8 ||
4055 ctx->ac.chip_class == GFX9 ||
4056 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4057 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4058 get_src(ctx, instr->src[1]));
4059 } else {
4060 LLVMValueRef src = get_src(ctx, instr->src[0]);
4061 LLVMValueRef index = get_src(ctx, instr->src[1]);
4062 LLVMTypeRef type = LLVMTypeOf(src);
4063 struct waterfall_context wctx;
4064 LLVMValueRef index_val;
4065
4066 index_val = enter_waterfall(ctx, &wctx, index, true);
4067
4068 src = LLVMBuildZExt(ctx->ac.builder, src,
4069 ctx->ac.i32, "");
4070
4071 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4072 ctx->ac.i32,
4073 (LLVMValueRef []) { src, index_val }, 2,
4074 AC_FUNC_ATTR_READNONE |
4075 AC_FUNC_ATTR_CONVERGENT);
4076
4077 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4078
4079 result = exit_waterfall(ctx, &wctx, result);
4080 }
4081 break;
4082 case nir_intrinsic_reduce:
4083 result = ac_build_reduce(&ctx->ac,
4084 get_src(ctx, instr->src[0]),
4085 instr->const_index[0],
4086 instr->const_index[1]);
4087 break;
4088 case nir_intrinsic_inclusive_scan:
4089 result = ac_build_inclusive_scan(&ctx->ac,
4090 get_src(ctx, instr->src[0]),
4091 instr->const_index[0]);
4092 break;
4093 case nir_intrinsic_exclusive_scan:
4094 result = ac_build_exclusive_scan(&ctx->ac,
4095 get_src(ctx, instr->src[0]),
4096 instr->const_index[0]);
4097 break;
4098 case nir_intrinsic_quad_broadcast: {
4099 unsigned lane = nir_src_as_uint(instr->src[1]);
4100 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4101 lane, lane, lane, lane);
4102 break;
4103 }
4104 case nir_intrinsic_quad_swap_horizontal:
4105 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4106 break;
4107 case nir_intrinsic_quad_swap_vertical:
4108 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4109 break;
4110 case nir_intrinsic_quad_swap_diagonal:
4111 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4112 break;
4113 case nir_intrinsic_quad_swizzle_amd: {
4114 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4115 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4116 mask & 0x3, (mask >> 2) & 0x3,
4117 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4118 break;
4119 }
4120 case nir_intrinsic_masked_swizzle_amd: {
4121 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4122 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4123 break;
4124 }
4125 case nir_intrinsic_write_invocation_amd:
4126 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4127 get_src(ctx, instr->src[1]),
4128 get_src(ctx, instr->src[2]));
4129 break;
4130 case nir_intrinsic_mbcnt_amd:
4131 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4132 break;
4133 case nir_intrinsic_load_scratch: {
4134 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4135 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4136 offset);
4137 LLVMTypeRef comp_type =
4138 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4139 LLVMTypeRef vec_type =
4140 instr->dest.ssa.num_components == 1 ? comp_type :
4141 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4142 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4143 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4144 LLVMPointerType(vec_type, addr_space), "");
4145 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4146 break;
4147 }
4148 case nir_intrinsic_store_scratch: {
4149 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4150 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4151 offset);
4152 LLVMTypeRef comp_type =
4153 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4154 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4155 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4156 LLVMPointerType(comp_type, addr_space), "");
4157 LLVMValueRef src = get_src(ctx, instr->src[0]);
4158 unsigned wrmask = nir_intrinsic_write_mask(instr);
4159 while (wrmask) {
4160 int start, count;
4161 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4162
4163 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4164 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4165 LLVMTypeRef vec_type =
4166 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4167 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4168 offset_ptr,
4169 LLVMPointerType(vec_type, addr_space),
4170 "");
4171 LLVMValueRef offset_src =
4172 ac_extract_components(&ctx->ac, src, start, count);
4173 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4174 }
4175 break;
4176 }
4177 case nir_intrinsic_load_constant: {
4178 unsigned base = nir_intrinsic_base(instr);
4179 unsigned range = nir_intrinsic_range(instr);
4180
4181 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4182 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4183 LLVMConstInt(ctx->ac.i32, base, false), "");
4184
4185 /* Clamp the offset to avoid out-of-bound access because global
4186 * instructions can't handle them.
4187 */
4188 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4189 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4190 offset, size, "");
4191 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4192
4193 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4194 offset);
4195 LLVMTypeRef comp_type =
4196 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4197 LLVMTypeRef vec_type =
4198 instr->dest.ssa.num_components == 1 ? comp_type :
4199 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4200 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4201 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4202 LLVMPointerType(vec_type, addr_space), "");
4203 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4204 break;
4205 }
4206 default:
4207 fprintf(stderr, "Unknown intrinsic: ");
4208 nir_print_instr(&instr->instr, stderr);
4209 fprintf(stderr, "\n");
4210 break;
4211 }
4212 if (result) {
4213 ctx->ssa_defs[instr->dest.ssa.index] = result;
4214 }
4215 }
4216
4217 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4218 unsigned base_index,
4219 unsigned constant_index,
4220 LLVMValueRef dynamic_index)
4221 {
4222 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4223 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4224 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4225
4226 /* Bindless uniforms are 64bit so multiple index by 8 */
4227 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4228 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4229
4230 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4231
4232 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4233 NULL, 0, 0, true, true);
4234
4235 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4236 }
4237
4238 struct sampler_desc_address {
4239 unsigned descriptor_set;
4240 unsigned base_index; /* binding in vulkan */
4241 unsigned constant_index;
4242 LLVMValueRef dynamic_index;
4243 bool image;
4244 bool bindless;
4245 };
4246
4247 static struct sampler_desc_address
4248 get_sampler_desc_internal(struct ac_nir_context *ctx,
4249 nir_deref_instr *deref_instr,
4250 const nir_instr *instr,
4251 bool image)
4252 {
4253 LLVMValueRef index = NULL;
4254 unsigned constant_index = 0;
4255 unsigned descriptor_set;
4256 unsigned base_index;
4257 bool bindless = false;
4258
4259 if (!deref_instr) {
4260 descriptor_set = 0;
4261 if (image) {
4262 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4263 base_index = 0;
4264 bindless = true;
4265 index = get_src(ctx, img_instr->src[0]);
4266 } else {
4267 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4268 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4269 nir_tex_src_sampler_handle);
4270 if (sampSrcIdx != -1) {
4271 base_index = 0;
4272 bindless = true;
4273 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4274 } else {
4275 assert(tex_instr && !image);
4276 base_index = tex_instr->sampler_index;
4277 }
4278 }
4279 } else {
4280 while(deref_instr->deref_type != nir_deref_type_var) {
4281 if (deref_instr->deref_type == nir_deref_type_array) {
4282 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4283 if (!array_size)
4284 array_size = 1;
4285
4286 if (nir_src_is_const(deref_instr->arr.index)) {
4287 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4288 } else {
4289 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4290
4291 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4292 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4293
4294 if (!index)
4295 index = indirect;
4296 else
4297 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4298 }
4299
4300 deref_instr = nir_src_as_deref(deref_instr->parent);
4301 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4302 unsigned sidx = deref_instr->strct.index;
4303 deref_instr = nir_src_as_deref(deref_instr->parent);
4304 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4305 } else {
4306 unreachable("Unsupported deref type");
4307 }
4308 }
4309 descriptor_set = deref_instr->var->data.descriptor_set;
4310
4311 if (deref_instr->var->data.bindless) {
4312 /* For now just assert on unhandled variable types */
4313 assert(deref_instr->var->data.mode == nir_var_uniform);
4314
4315 base_index = deref_instr->var->data.driver_location;
4316 bindless = true;
4317
4318 index = index ? index : ctx->ac.i32_0;
4319 index = get_bindless_index_from_uniform(ctx, base_index,
4320 constant_index, index);
4321 } else
4322 base_index = deref_instr->var->data.binding;
4323 }
4324 return (struct sampler_desc_address) {
4325 .descriptor_set = descriptor_set,
4326 .base_index = base_index,
4327 .constant_index = constant_index,
4328 .dynamic_index = index,
4329 .image = image,
4330 .bindless = bindless,
4331 };
4332 }
4333
4334 /* Extract any possibly divergent index into a separate value that can be fed
4335 * into get_sampler_desc with the same arguments. */
4336 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4337 nir_deref_instr *deref_instr,
4338 const nir_instr *instr,
4339 bool image)
4340 {
4341 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4342 return addr.dynamic_index;
4343 }
4344
4345 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4346 nir_deref_instr *deref_instr,
4347 enum ac_descriptor_type desc_type,
4348 const nir_instr *instr,
4349 LLVMValueRef index,
4350 bool image, bool write)
4351 {
4352 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4353 return ctx->abi->load_sampler_desc(ctx->abi,
4354 addr.descriptor_set,
4355 addr.base_index,
4356 addr.constant_index, index,
4357 desc_type, addr.image, write, addr.bindless);
4358 }
4359
4360 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4361 *
4362 * GFX6-GFX7:
4363 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4364 * filtering manually. The driver sets img7 to a mask clearing
4365 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4366 * s_and_b32 samp0, samp0, img7
4367 *
4368 * GFX8:
4369 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4370 */
4371 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4372 LLVMValueRef res, LLVMValueRef samp)
4373 {
4374 LLVMBuilderRef builder = ctx->ac.builder;
4375 LLVMValueRef img7, samp0;
4376
4377 if (ctx->ac.chip_class >= GFX8)
4378 return samp;
4379
4380 img7 = LLVMBuildExtractElement(builder, res,
4381 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4382 samp0 = LLVMBuildExtractElement(builder, samp,
4383 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4384 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4385 return LLVMBuildInsertElement(builder, samp, samp0,
4386 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4387 }
4388
4389 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4390 nir_tex_instr *instr,
4391 struct waterfall_context *wctx,
4392 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4393 LLVMValueRef *fmask_ptr)
4394 {
4395 nir_deref_instr *texture_deref_instr = NULL;
4396 nir_deref_instr *sampler_deref_instr = NULL;
4397 int plane = -1;
4398
4399 for (unsigned i = 0; i < instr->num_srcs; i++) {
4400 switch (instr->src[i].src_type) {
4401 case nir_tex_src_texture_deref:
4402 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4403 break;
4404 case nir_tex_src_sampler_deref:
4405 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4406 break;
4407 case nir_tex_src_plane:
4408 plane = nir_src_as_int(instr->src[i].src);
4409 break;
4410 default:
4411 break;
4412 }
4413 }
4414
4415 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4416 &instr->instr, false);
4417 if (!sampler_deref_instr)
4418 sampler_deref_instr = texture_deref_instr;
4419
4420 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4421 &instr->instr, false);
4422 if (instr->texture_non_uniform)
4423 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4424
4425 if (instr->sampler_non_uniform)
4426 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4427
4428 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4429
4430 if (plane >= 0) {
4431 assert(instr->op != nir_texop_txf_ms &&
4432 instr->op != nir_texop_samples_identical);
4433 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4434
4435 main_descriptor = AC_DESC_PLANE_0 + plane;
4436 }
4437
4438 if (instr->op == nir_texop_fragment_mask_fetch) {
4439 /* The fragment mask is fetched from the compressed
4440 * multisampled surface.
4441 */
4442 main_descriptor = AC_DESC_FMASK;
4443 }
4444
4445 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4446 texture_dynamic_index, false, false);
4447
4448 if (samp_ptr) {
4449 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4450 sampler_dynamic_index, false, false);
4451 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4452 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4453 }
4454 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4455 instr->op == nir_texop_samples_identical))
4456 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4457 &instr->instr, texture_dynamic_index, false, false);
4458 }
4459
4460 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4461 LLVMValueRef coord)
4462 {
4463 coord = ac_to_float(ctx, coord);
4464 coord = ac_build_round(ctx, coord);
4465 coord = ac_to_integer(ctx, coord);
4466 return coord;
4467 }
4468
4469 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4470 {
4471 LLVMValueRef result = NULL;
4472 struct ac_image_args args = { 0 };
4473 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4474 LLVMValueRef ddx = NULL, ddy = NULL;
4475 unsigned offset_src = 0;
4476 struct waterfall_context wctx[2] = {{{0}}};
4477
4478 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4479
4480 for (unsigned i = 0; i < instr->num_srcs; i++) {
4481 switch (instr->src[i].src_type) {
4482 case nir_tex_src_coord: {
4483 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4484 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4485 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4486 break;
4487 }
4488 case nir_tex_src_projector:
4489 break;
4490 case nir_tex_src_comparator:
4491 if (instr->is_shadow) {
4492 args.compare = get_src(ctx, instr->src[i].src);
4493 args.compare = ac_to_float(&ctx->ac, args.compare);
4494 }
4495 break;
4496 case nir_tex_src_offset:
4497 args.offset = get_src(ctx, instr->src[i].src);
4498 offset_src = i;
4499 break;
4500 case nir_tex_src_bias:
4501 args.bias = get_src(ctx, instr->src[i].src);
4502 break;
4503 case nir_tex_src_lod: {
4504 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4505 args.level_zero = true;
4506 else
4507 args.lod = get_src(ctx, instr->src[i].src);
4508 break;
4509 }
4510 case nir_tex_src_ms_index:
4511 sample_index = get_src(ctx, instr->src[i].src);
4512 break;
4513 case nir_tex_src_ms_mcs:
4514 break;
4515 case nir_tex_src_ddx:
4516 ddx = get_src(ctx, instr->src[i].src);
4517 break;
4518 case nir_tex_src_ddy:
4519 ddy = get_src(ctx, instr->src[i].src);
4520 break;
4521 case nir_tex_src_min_lod:
4522 args.min_lod = get_src(ctx, instr->src[i].src);
4523 break;
4524 case nir_tex_src_texture_offset:
4525 case nir_tex_src_sampler_offset:
4526 case nir_tex_src_plane:
4527 default:
4528 break;
4529 }
4530 }
4531
4532 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4533 result = get_buffer_size(ctx, args.resource, true);
4534 goto write_result;
4535 }
4536
4537 if (instr->op == nir_texop_texture_samples) {
4538 LLVMValueRef res, samples, is_msaa;
4539 LLVMValueRef default_sample;
4540
4541 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4542 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4543 LLVMConstInt(ctx->ac.i32, 3, false), "");
4544 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4545 LLVMConstInt(ctx->ac.i32, 28, false), "");
4546 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4547 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4548 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4549 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4550
4551 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4552 LLVMConstInt(ctx->ac.i32, 16, false), "");
4553 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4554 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4555 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4556 samples, "");
4557
4558 if (ctx->abi->robust_buffer_access) {
4559 LLVMValueRef dword1, is_null_descriptor;
4560
4561 /* Extract the second dword of the descriptor, if it's
4562 * all zero, then it's a null descriptor.
4563 */
4564 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4565 LLVMConstInt(ctx->ac.i32, 1, false), "");
4566 is_null_descriptor =
4567 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4568 LLVMConstInt(ctx->ac.i32, 0, false), "");
4569 default_sample =
4570 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4571 ctx->ac.i32_0, ctx->ac.i32_1, "");
4572 } else {
4573 default_sample = ctx->ac.i32_1;
4574 }
4575
4576 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4577 default_sample, "");
4578 result = samples;
4579 goto write_result;
4580 }
4581
4582 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4583 LLVMValueRef offset[3], pack;
4584 for (unsigned chan = 0; chan < 3; ++chan)
4585 offset[chan] = ctx->ac.i32_0;
4586
4587 unsigned num_components = ac_get_llvm_num_components(args.offset);
4588 for (unsigned chan = 0; chan < num_components; chan++) {
4589 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4590 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4591 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4592 if (chan)
4593 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4594 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4595 }
4596 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4597 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4598 args.offset = pack;
4599 }
4600
4601 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4602 * OpenGL 4.5 spec says:
4603 *
4604 * "If the texture’s internal format indicates a fixed-point
4605 * depth texture, then D_t and D_ref are clamped to the
4606 * range [0, 1]; otherwise no clamping is performed."
4607 *
4608 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4609 * so the depth comparison value isn't clamped for Z16 and
4610 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4611 * an explicitly clamped 32-bit float format.
4612 */
4613 if (args.compare &&
4614 ctx->ac.chip_class >= GFX8 &&
4615 ctx->ac.chip_class <= GFX9 &&
4616 ctx->abi->clamp_shadow_reference) {
4617 LLVMValueRef upgraded, clamped;
4618
4619 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4620 LLVMConstInt(ctx->ac.i32, 3, false), "");
4621 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4622 LLVMConstInt(ctx->ac.i32, 29, false), "");
4623 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4624 clamped = ac_build_clamp(&ctx->ac, args.compare);
4625 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4626 args.compare, "");
4627 }
4628
4629 /* pack derivatives */
4630 if (ddx || ddy) {
4631 int num_src_deriv_channels, num_dest_deriv_channels;
4632 switch (instr->sampler_dim) {
4633 case GLSL_SAMPLER_DIM_3D:
4634 case GLSL_SAMPLER_DIM_CUBE:
4635 num_src_deriv_channels = 3;
4636 num_dest_deriv_channels = 3;
4637 break;
4638 case GLSL_SAMPLER_DIM_2D:
4639 default:
4640 num_src_deriv_channels = 2;
4641 num_dest_deriv_channels = 2;
4642 break;
4643 case GLSL_SAMPLER_DIM_1D:
4644 num_src_deriv_channels = 1;
4645 if (ctx->ac.chip_class == GFX9) {
4646 num_dest_deriv_channels = 2;
4647 } else {
4648 num_dest_deriv_channels = 1;
4649 }
4650 break;
4651 }
4652
4653 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4654 args.derivs[i] = ac_to_float(&ctx->ac,
4655 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4656 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4657 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4658 }
4659 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4660 args.derivs[i] = ctx->ac.f32_0;
4661 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4662 }
4663 }
4664
4665 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4666 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4667 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4668 if (instr->coord_components == 3)
4669 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4670 ac_prepare_cube_coords(&ctx->ac,
4671 instr->op == nir_texop_txd, instr->is_array,
4672 instr->op == nir_texop_lod, args.coords, args.derivs);
4673 }
4674
4675 /* Texture coordinates fixups */
4676 if (instr->coord_components > 1 &&
4677 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4678 instr->is_array &&
4679 instr->op != nir_texop_txf) {
4680 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4681 }
4682
4683 if (instr->coord_components > 2 &&
4684 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4685 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4686 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4687 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4688 instr->is_array &&
4689 instr->op != nir_texop_txf &&
4690 instr->op != nir_texop_txf_ms &&
4691 instr->op != nir_texop_fragment_fetch &&
4692 instr->op != nir_texop_fragment_mask_fetch) {
4693 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4694 }
4695
4696 if (ctx->ac.chip_class == GFX9 &&
4697 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4698 instr->op != nir_texop_lod) {
4699 LLVMValueRef filler;
4700 if (instr->op == nir_texop_txf)
4701 filler = ctx->ac.i32_0;
4702 else
4703 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4704
4705 if (instr->is_array)
4706 args.coords[2] = args.coords[1];
4707 args.coords[1] = filler;
4708 }
4709
4710 /* Pack sample index */
4711 if (sample_index && (instr->op == nir_texop_txf_ms ||
4712 instr->op == nir_texop_fragment_fetch))
4713 args.coords[instr->coord_components] = sample_index;
4714
4715 if (instr->op == nir_texop_samples_identical) {
4716 struct ac_image_args txf_args = { 0 };
4717 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4718
4719 txf_args.dmask = 0xf;
4720 txf_args.resource = fmask_ptr;
4721 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4722 result = build_tex_intrinsic(ctx, instr, &txf_args);
4723
4724 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4725 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4726 goto write_result;
4727 }
4728
4729 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4730 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4731 instr->op != nir_texop_txs &&
4732 instr->op != nir_texop_fragment_fetch &&
4733 instr->op != nir_texop_fragment_mask_fetch) {
4734 unsigned sample_chan = instr->is_array ? 3 : 2;
4735 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4736 &ctx->ac, args.coords[0], args.coords[1],
4737 instr->is_array ? args.coords[2] : NULL,
4738 args.coords[sample_chan], fmask_ptr);
4739 }
4740
4741 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4742 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4743 num_offsets = MIN2(num_offsets, instr->coord_components);
4744 for (unsigned i = 0; i < num_offsets; ++i) {
4745 args.coords[i] = LLVMBuildAdd(
4746 ctx->ac.builder, args.coords[i],
4747 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4748 }
4749 args.offset = NULL;
4750 }
4751
4752 /* DMASK was repurposed for GATHER4. 4 components are always
4753 * returned and DMASK works like a swizzle - it selects
4754 * the component to fetch. The only valid DMASK values are
4755 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4756 * (red,red,red,red) etc.) The ISA document doesn't mention
4757 * this.
4758 */
4759 args.dmask = 0xf;
4760 if (instr->op == nir_texop_tg4) {
4761 if (instr->is_shadow)
4762 args.dmask = 1;
4763 else
4764 args.dmask = 1 << instr->component;
4765 }
4766
4767 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4768 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4769 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4770 }
4771
4772 /* Adjust the number of coordinates because we only need (x,y) for 2D
4773 * multisampled images and (x,y,layer) for 2D multisampled layered
4774 * images or for multisampled input attachments.
4775 */
4776 if (instr->op == nir_texop_fragment_mask_fetch) {
4777 if (args.dim == ac_image_2dmsaa) {
4778 args.dim = ac_image_2d;
4779 } else {
4780 assert(args.dim == ac_image_2darraymsaa);
4781 args.dim = ac_image_2darray;
4782 }
4783 }
4784
4785 assert(instr->dest.is_ssa);
4786 args.d16 = instr->dest.ssa.bit_size == 16;
4787
4788 result = build_tex_intrinsic(ctx, instr, &args);
4789
4790 if (instr->op == nir_texop_query_levels)
4791 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4792 else if (instr->is_shadow && instr->is_new_style_shadow &&
4793 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4794 instr->op != nir_texop_tg4)
4795 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4796 else if (instr->op == nir_texop_txs &&
4797 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4798 instr->is_array) {
4799 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4800 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4801 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4802 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4803 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4804 } else if (ctx->ac.chip_class == GFX9 &&
4805 instr->op == nir_texop_txs &&
4806 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4807 instr->is_array) {
4808 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4809 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4810 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4811 ctx->ac.i32_1, "");
4812 } else if (instr->dest.ssa.num_components != 4)
4813 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4814
4815 write_result:
4816 if (result) {
4817 assert(instr->dest.is_ssa);
4818 result = ac_to_integer(&ctx->ac, result);
4819
4820 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4821 result = exit_waterfall(ctx, wctx + i, result);
4822 }
4823
4824 ctx->ssa_defs[instr->dest.ssa.index] = result;
4825 }
4826 }
4827
4828 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4829 {
4830 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4831 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4832
4833 ctx->ssa_defs[instr->dest.ssa.index] = result;
4834 _mesa_hash_table_insert(ctx->phis, instr, result);
4835 }
4836
4837 static void visit_post_phi(struct ac_nir_context *ctx,
4838 nir_phi_instr *instr,
4839 LLVMValueRef llvm_phi)
4840 {
4841 nir_foreach_phi_src(src, instr) {
4842 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4843 LLVMValueRef llvm_src = get_src(ctx, src->src);
4844
4845 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4846 }
4847 }
4848
4849 static void phi_post_pass(struct ac_nir_context *ctx)
4850 {
4851 hash_table_foreach(ctx->phis, entry) {
4852 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4853 (LLVMValueRef)entry->data);
4854 }
4855 }
4856
4857
4858 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4859 nir_foreach_use(use_src, def) {
4860 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4861 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
4862 if (instr->intrinsic == nir_intrinsic_store_deref)
4863 return true;
4864 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
4865 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
4866 if (instr->op == nir_op_vec4 &&
4867 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
4868 return true;
4869 }
4870 }
4871 }
4872 return false;
4873 }
4874
4875 static void visit_ssa_undef(struct ac_nir_context *ctx,
4876 const nir_ssa_undef_instr *instr)
4877 {
4878 unsigned num_components = instr->def.num_components;
4879 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4880
4881 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
4882 LLVMValueRef undef;
4883
4884 if (num_components == 1)
4885 undef = LLVMGetUndef(type);
4886 else {
4887 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4888 }
4889 ctx->ssa_defs[instr->def.index] = undef;
4890 } else {
4891 LLVMValueRef zero = LLVMConstInt(type, 0, false);
4892 if (num_components > 1) {
4893 zero = ac_build_gather_values_extended(
4894 &ctx->ac, &zero, 4, 0, false, false);
4895 }
4896 ctx->ssa_defs[instr->def.index] = zero;
4897 }
4898 }
4899
4900 static void visit_jump(struct ac_llvm_context *ctx,
4901 const nir_jump_instr *instr)
4902 {
4903 switch (instr->type) {
4904 case nir_jump_break:
4905 ac_build_break(ctx);
4906 break;
4907 case nir_jump_continue:
4908 ac_build_continue(ctx);
4909 break;
4910 default:
4911 fprintf(stderr, "Unknown NIR jump instr: ");
4912 nir_print_instr(&instr->instr, stderr);
4913 fprintf(stderr, "\n");
4914 abort();
4915 }
4916 }
4917
4918 static LLVMTypeRef
4919 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4920 enum glsl_base_type type)
4921 {
4922 switch (type) {
4923 case GLSL_TYPE_INT:
4924 case GLSL_TYPE_UINT:
4925 case GLSL_TYPE_BOOL:
4926 case GLSL_TYPE_SUBROUTINE:
4927 return ac->i32;
4928 case GLSL_TYPE_INT8:
4929 case GLSL_TYPE_UINT8:
4930 return ac->i8;
4931 case GLSL_TYPE_INT16:
4932 case GLSL_TYPE_UINT16:
4933 return ac->i16;
4934 case GLSL_TYPE_FLOAT:
4935 return ac->f32;
4936 case GLSL_TYPE_FLOAT16:
4937 return ac->f16;
4938 case GLSL_TYPE_INT64:
4939 case GLSL_TYPE_UINT64:
4940 return ac->i64;
4941 case GLSL_TYPE_DOUBLE:
4942 return ac->f64;
4943 default:
4944 unreachable("unknown GLSL type");
4945 }
4946 }
4947
4948 static LLVMTypeRef
4949 glsl_to_llvm_type(struct ac_llvm_context *ac,
4950 const struct glsl_type *type)
4951 {
4952 if (glsl_type_is_scalar(type)) {
4953 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4954 }
4955
4956 if (glsl_type_is_vector(type)) {
4957 return LLVMVectorType(
4958 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4959 glsl_get_vector_elements(type));
4960 }
4961
4962 if (glsl_type_is_matrix(type)) {
4963 return LLVMArrayType(
4964 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4965 glsl_get_matrix_columns(type));
4966 }
4967
4968 if (glsl_type_is_array(type)) {
4969 return LLVMArrayType(
4970 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4971 glsl_get_length(type));
4972 }
4973
4974 assert(glsl_type_is_struct_or_ifc(type));
4975
4976 LLVMTypeRef member_types[glsl_get_length(type)];
4977
4978 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4979 member_types[i] =
4980 glsl_to_llvm_type(ac,
4981 glsl_get_struct_field(type, i));
4982 }
4983
4984 return LLVMStructTypeInContext(ac->context, member_types,
4985 glsl_get_length(type), false);
4986 }
4987
4988 static void visit_deref(struct ac_nir_context *ctx,
4989 nir_deref_instr *instr)
4990 {
4991 if (instr->mode != nir_var_mem_shared &&
4992 instr->mode != nir_var_mem_global)
4993 return;
4994
4995 LLVMValueRef result = NULL;
4996 switch(instr->deref_type) {
4997 case nir_deref_type_var: {
4998 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4999 result = entry->data;
5000 break;
5001 }
5002 case nir_deref_type_struct:
5003 if (instr->mode == nir_var_mem_global) {
5004 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5005 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5006 instr->strct.index);
5007 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5008 LLVMConstInt(ctx->ac.i32, offset, 0));
5009 } else {
5010 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5011 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5012 }
5013 break;
5014 case nir_deref_type_array:
5015 if (instr->mode == nir_var_mem_global) {
5016 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5017 unsigned stride = glsl_get_explicit_stride(parent->type);
5018
5019 if ((glsl_type_is_matrix(parent->type) &&
5020 glsl_matrix_type_is_row_major(parent->type)) ||
5021 (glsl_type_is_vector(parent->type) && stride == 0))
5022 stride = type_scalar_size_bytes(parent->type);
5023
5024 assert(stride > 0);
5025 LLVMValueRef index = get_src(ctx, instr->arr.index);
5026 if (LLVMTypeOf(index) != ctx->ac.i64)
5027 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5028
5029 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5030
5031 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5032 } else {
5033 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5034 get_src(ctx, instr->arr.index));
5035 }
5036 break;
5037 case nir_deref_type_ptr_as_array:
5038 if (instr->mode == nir_var_mem_global) {
5039 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
5040
5041 LLVMValueRef index = get_src(ctx, instr->arr.index);
5042 if (LLVMTypeOf(index) != ctx->ac.i64)
5043 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5044
5045 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5046
5047 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5048 } else {
5049 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5050 get_src(ctx, instr->arr.index));
5051 }
5052 break;
5053 case nir_deref_type_cast: {
5054 result = get_src(ctx, instr->parent);
5055
5056 /* We can't use the structs from LLVM because the shader
5057 * specifies its own offsets. */
5058 LLVMTypeRef pointee_type = ctx->ac.i8;
5059 if (instr->mode == nir_var_mem_shared)
5060 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5061
5062 unsigned address_space;
5063
5064 switch(instr->mode) {
5065 case nir_var_mem_shared:
5066 address_space = AC_ADDR_SPACE_LDS;
5067 break;
5068 case nir_var_mem_global:
5069 address_space = AC_ADDR_SPACE_GLOBAL;
5070 break;
5071 default:
5072 unreachable("Unhandled address space");
5073 }
5074
5075 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5076
5077 if (LLVMTypeOf(result) != type) {
5078 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5079 result = LLVMBuildBitCast(ctx->ac.builder, result,
5080 type, "");
5081 } else {
5082 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5083 type, "");
5084 }
5085 }
5086 break;
5087 }
5088 default:
5089 unreachable("Unhandled deref_instr deref type");
5090 }
5091
5092 ctx->ssa_defs[instr->dest.ssa.index] = result;
5093 }
5094
5095 static void visit_cf_list(struct ac_nir_context *ctx,
5096 struct exec_list *list);
5097
5098 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5099 {
5100 nir_foreach_instr(instr, block)
5101 {
5102 switch (instr->type) {
5103 case nir_instr_type_alu:
5104 visit_alu(ctx, nir_instr_as_alu(instr));
5105 break;
5106 case nir_instr_type_load_const:
5107 visit_load_const(ctx, nir_instr_as_load_const(instr));
5108 break;
5109 case nir_instr_type_intrinsic:
5110 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5111 break;
5112 case nir_instr_type_tex:
5113 visit_tex(ctx, nir_instr_as_tex(instr));
5114 break;
5115 case nir_instr_type_phi:
5116 visit_phi(ctx, nir_instr_as_phi(instr));
5117 break;
5118 case nir_instr_type_ssa_undef:
5119 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5120 break;
5121 case nir_instr_type_jump:
5122 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5123 break;
5124 case nir_instr_type_deref:
5125 visit_deref(ctx, nir_instr_as_deref(instr));
5126 break;
5127 default:
5128 fprintf(stderr, "Unknown NIR instr type: ");
5129 nir_print_instr(instr, stderr);
5130 fprintf(stderr, "\n");
5131 abort();
5132 }
5133 }
5134
5135 _mesa_hash_table_insert(ctx->defs, block,
5136 LLVMGetInsertBlock(ctx->ac.builder));
5137 }
5138
5139 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5140 {
5141 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5142
5143 nir_block *then_block =
5144 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5145
5146 ac_build_uif(&ctx->ac, value, then_block->index);
5147
5148 visit_cf_list(ctx, &if_stmt->then_list);
5149
5150 if (!exec_list_is_empty(&if_stmt->else_list)) {
5151 nir_block *else_block =
5152 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5153
5154 ac_build_else(&ctx->ac, else_block->index);
5155 visit_cf_list(ctx, &if_stmt->else_list);
5156 }
5157
5158 ac_build_endif(&ctx->ac, then_block->index);
5159 }
5160
5161 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5162 {
5163 nir_block *first_loop_block =
5164 (nir_block *) exec_list_get_head(&loop->body);
5165
5166 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5167
5168 visit_cf_list(ctx, &loop->body);
5169
5170 ac_build_endloop(&ctx->ac, first_loop_block->index);
5171 }
5172
5173 static void visit_cf_list(struct ac_nir_context *ctx,
5174 struct exec_list *list)
5175 {
5176 foreach_list_typed(nir_cf_node, node, node, list)
5177 {
5178 switch (node->type) {
5179 case nir_cf_node_block:
5180 visit_block(ctx, nir_cf_node_as_block(node));
5181 break;
5182
5183 case nir_cf_node_if:
5184 visit_if(ctx, nir_cf_node_as_if(node));
5185 break;
5186
5187 case nir_cf_node_loop:
5188 visit_loop(ctx, nir_cf_node_as_loop(node));
5189 break;
5190
5191 default:
5192 assert(0);
5193 }
5194 }
5195 }
5196
5197 void
5198 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5199 struct ac_shader_abi *abi,
5200 struct nir_shader *nir,
5201 struct nir_variable *variable,
5202 gl_shader_stage stage)
5203 {
5204 unsigned output_loc = variable->data.driver_location / 4;
5205 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5206
5207 /* tess ctrl has it's own load/store paths for outputs */
5208 if (stage == MESA_SHADER_TESS_CTRL)
5209 return;
5210
5211 if (stage == MESA_SHADER_VERTEX ||
5212 stage == MESA_SHADER_TESS_EVAL ||
5213 stage == MESA_SHADER_GEOMETRY) {
5214 int idx = variable->data.location + variable->data.index;
5215 if (idx == VARYING_SLOT_CLIP_DIST0) {
5216 int length = nir->info.clip_distance_array_size +
5217 nir->info.cull_distance_array_size;
5218
5219 if (length > 4)
5220 attrib_count = 2;
5221 else
5222 attrib_count = 1;
5223 }
5224 }
5225
5226 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5227 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5228 for (unsigned i = 0; i < attrib_count; ++i) {
5229 for (unsigned chan = 0; chan < 4; chan++) {
5230 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5231 ac_build_alloca_undef(ctx, type, "");
5232 }
5233 }
5234 }
5235
5236 static void
5237 setup_locals(struct ac_nir_context *ctx,
5238 struct nir_function *func)
5239 {
5240 int i, j;
5241 ctx->num_locals = 0;
5242 nir_foreach_function_temp_variable(variable, func->impl) {
5243 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5244 variable->data.driver_location = ctx->num_locals * 4;
5245 variable->data.location_frac = 0;
5246 ctx->num_locals += attrib_count;
5247 }
5248 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5249 if (!ctx->locals)
5250 return;
5251
5252 for (i = 0; i < ctx->num_locals; i++) {
5253 for (j = 0; j < 4; j++) {
5254 ctx->locals[i * 4 + j] =
5255 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5256 }
5257 }
5258 }
5259
5260 static void
5261 setup_scratch(struct ac_nir_context *ctx,
5262 struct nir_shader *shader)
5263 {
5264 if (shader->scratch_size == 0)
5265 return;
5266
5267 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5268 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5269 "scratch");
5270 }
5271
5272 static void
5273 setup_constant_data(struct ac_nir_context *ctx,
5274 struct nir_shader *shader)
5275 {
5276 if (!shader->constant_data)
5277 return;
5278
5279 LLVMValueRef data =
5280 LLVMConstStringInContext(ctx->ac.context,
5281 shader->constant_data,
5282 shader->constant_data_size,
5283 true);
5284 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5285
5286 /* We want to put the constant data in the CONST address space so that
5287 * we can use scalar loads. However, LLVM versions before 10 put these
5288 * variables in the same section as the code, which is unacceptable
5289 * for RadeonSI as it needs to relocate all the data sections after
5290 * the code sections. See https://reviews.llvm.org/D65813.
5291 */
5292 unsigned address_space =
5293 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5294
5295 LLVMValueRef global =
5296 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5297 "const_data",
5298 address_space);
5299
5300 LLVMSetInitializer(global, data);
5301 LLVMSetGlobalConstant(global, true);
5302 LLVMSetVisibility(global, LLVMHiddenVisibility);
5303 ctx->constant_data = global;
5304 }
5305
5306 static void
5307 setup_shared(struct ac_nir_context *ctx,
5308 struct nir_shader *nir)
5309 {
5310 if (ctx->ac.lds)
5311 return;
5312
5313 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5314 nir->info.cs.shared_size);
5315
5316 LLVMValueRef lds =
5317 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5318 "compute_lds",
5319 AC_ADDR_SPACE_LDS);
5320 LLVMSetAlignment(lds, 64 * 1024);
5321
5322 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5323 LLVMPointerType(ctx->ac.i8,
5324 AC_ADDR_SPACE_LDS), "");
5325 }
5326
5327 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5328 const struct ac_shader_args *args, struct nir_shader *nir)
5329 {
5330 struct ac_nir_context ctx = {};
5331 struct nir_function *func;
5332
5333 ctx.ac = *ac;
5334 ctx.abi = abi;
5335 ctx.args = args;
5336
5337 ctx.stage = nir->info.stage;
5338 ctx.info = &nir->info;
5339
5340 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5341
5342 nir_foreach_shader_out_variable(variable, nir)
5343 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5344 ctx.stage);
5345
5346 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5347 _mesa_key_pointer_equal);
5348 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5349 _mesa_key_pointer_equal);
5350 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5351 _mesa_key_pointer_equal);
5352
5353 if (ctx.abi->kill_ps_if_inf_interp)
5354 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5355 _mesa_key_pointer_equal);
5356
5357 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5358
5359 nir_index_ssa_defs(func->impl);
5360 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5361
5362 setup_locals(&ctx, func);
5363 setup_scratch(&ctx, nir);
5364 setup_constant_data(&ctx, nir);
5365
5366 if (gl_shader_stage_is_compute(nir->info.stage))
5367 setup_shared(&ctx, nir);
5368
5369 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5370 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5371 /* true = don't kill. */
5372 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5373 }
5374
5375 visit_cf_list(&ctx, &func->impl->body);
5376 phi_post_pass(&ctx);
5377
5378 if (ctx.ac.postponed_kill)
5379 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5380 ctx.ac.postponed_kill, ""));
5381
5382 if (!gl_shader_stage_is_compute(nir->info.stage))
5383 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5384 ctx.abi->outputs);
5385
5386 free(ctx.locals);
5387 free(ctx.ssa_defs);
5388 ralloc_free(ctx.defs);
5389 ralloc_free(ctx.phis);
5390 ralloc_free(ctx.vars);
5391 if (ctx.abi->kill_ps_if_inf_interp)
5392 ralloc_free(ctx.verified_interp);
5393 }
5394
5395 bool
5396 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5397 {
5398 bool progress = false;
5399
5400 /* Lower large variables to scratch first so that we won't bloat the
5401 * shader by generating large if ladders for them. We later lower
5402 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5403 */
5404 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5405 nir_var_function_temp,
5406 256,
5407 glsl_get_natural_size_align_bytes);
5408
5409 /* While it would be nice not to have this flag, we are constrained
5410 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5411 */
5412 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5413
5414 /* TODO: Indirect indexing of GS inputs is unimplemented.
5415 *
5416 * TCS and TES load inputs directly from LDS or offchip memory, so
5417 * indirect indexing is trivial.
5418 */
5419 nir_variable_mode indirect_mask = 0;
5420 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5421 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5422 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5423 !llvm_has_working_vgpr_indexing)) {
5424 indirect_mask |= nir_var_shader_in;
5425 }
5426 if (!llvm_has_working_vgpr_indexing &&
5427 nir->info.stage != MESA_SHADER_TESS_CTRL)
5428 indirect_mask |= nir_var_shader_out;
5429
5430 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5431 * smart enough to handle indirects without causing excess spilling
5432 * causing the gpu to hang.
5433 *
5434 * See the following thread for more details of the problem:
5435 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5436 */
5437 indirect_mask |= nir_var_function_temp;
5438
5439 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5440 return progress;
5441 }
5442
5443 static unsigned
5444 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5445 {
5446 if (intrin->intrinsic != nir_intrinsic_store_deref)
5447 return 0;
5448
5449 nir_variable *var =
5450 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5451
5452 if (var->data.mode != nir_var_shader_out)
5453 return 0;
5454
5455 unsigned writemask = 0;
5456 const int location = var->data.location;
5457 unsigned first_component = var->data.location_frac;
5458 unsigned num_comps = intrin->dest.ssa.num_components;
5459
5460 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5461 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5462 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5463 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5464
5465 return writemask;
5466 }
5467
5468 static void
5469 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5470 unsigned *cond_block_tf_writemask,
5471 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5472 {
5473 switch (cf_node->type) {
5474 case nir_cf_node_block: {
5475 nir_block *block = nir_cf_node_as_block(cf_node);
5476 nir_foreach_instr(instr, block) {
5477 if (instr->type != nir_instr_type_intrinsic)
5478 continue;
5479
5480 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5481 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5482
5483 /* If we find a barrier in nested control flow put this in the
5484 * too hard basket. In GLSL this is not possible but it is in
5485 * SPIR-V.
5486 */
5487 if (is_nested_cf) {
5488 *tessfactors_are_def_in_all_invocs = false;
5489 return;
5490 }
5491
5492 /* The following case must be prevented:
5493 * gl_TessLevelInner = ...;
5494 * barrier();
5495 * if (gl_InvocationID == 1)
5496 * gl_TessLevelInner = ...;
5497 *
5498 * If you consider disjoint code segments separated by barriers, each
5499 * such segment that writes tess factor channels should write the same
5500 * channels in all codepaths within that segment.
5501 */
5502 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5503 /* Accumulate the result: */
5504 *tessfactors_are_def_in_all_invocs &=
5505 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5506
5507 /* Analyze the next code segment from scratch. */
5508 *upper_block_tf_writemask = 0;
5509 *cond_block_tf_writemask = 0;
5510 }
5511 } else
5512 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5513 }
5514
5515 break;
5516 }
5517 case nir_cf_node_if: {
5518 unsigned then_tessfactor_writemask = 0;
5519 unsigned else_tessfactor_writemask = 0;
5520
5521 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5522 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5523 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5524 cond_block_tf_writemask,
5525 tessfactors_are_def_in_all_invocs, true);
5526 }
5527
5528 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5529 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5530 cond_block_tf_writemask,
5531 tessfactors_are_def_in_all_invocs, true);
5532 }
5533
5534 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5535 /* If both statements write the same tess factor channels,
5536 * we can say that the upper block writes them too.
5537 */
5538 *upper_block_tf_writemask |= then_tessfactor_writemask &
5539 else_tessfactor_writemask;
5540 *cond_block_tf_writemask |= then_tessfactor_writemask |
5541 else_tessfactor_writemask;
5542 }
5543
5544 break;
5545 }
5546 case nir_cf_node_loop: {
5547 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5548 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5549 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5550 cond_block_tf_writemask,
5551 tessfactors_are_def_in_all_invocs, true);
5552 }
5553
5554 break;
5555 }
5556 default:
5557 unreachable("unknown cf node type");
5558 }
5559 }
5560
5561 bool
5562 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5563 {
5564 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5565
5566 /* The pass works as follows:
5567 * If all codepaths write tess factors, we can say that all
5568 * invocations define tess factors.
5569 *
5570 * Each tess factor channel is tracked separately.
5571 */
5572 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5573 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5574
5575 /* Initial value = true. Here the pass will accumulate results from
5576 * multiple segments surrounded by barriers. If tess factors aren't
5577 * written at all, it's a shader bug and we don't care if this will be
5578 * true.
5579 */
5580 bool tessfactors_are_def_in_all_invocs = true;
5581
5582 nir_foreach_function(function, nir) {
5583 if (function->impl) {
5584 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5585 scan_tess_ctrl(node, &main_block_tf_writemask,
5586 &cond_block_tf_writemask,
5587 &tessfactors_are_def_in_all_invocs,
5588 false);
5589 }
5590 }
5591 }
5592
5593 /* Accumulate the result for the last code segment separated by a
5594 * barrier.
5595 */
5596 if (main_block_tf_writemask || cond_block_tf_writemask) {
5597 tessfactors_are_def_in_all_invocs &=
5598 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5599 }
5600
5601 return tessfactors_are_def_in_all_invocs;
5602 }