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ac/nir: split 8-bit load/store to global memory on GFX6
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54
55 LLVMValueRef main_function;
56 LLVMBasicBlockRef continue_block;
57 LLVMBasicBlockRef break_block;
58
59 int num_locals;
60 LLVMValueRef *locals;
61 };
62
63 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
64 nir_deref_instr *deref_instr,
65 const nir_instr *instr,
66 bool image);
67
68 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
69 nir_deref_instr *deref_instr,
70 enum ac_descriptor_type desc_type,
71 const nir_instr *instr,
72 LLVMValueRef index,
73 bool image, bool write);
74
75 static void
76 build_store_values_extended(struct ac_llvm_context *ac,
77 LLVMValueRef *values,
78 unsigned value_count,
79 unsigned value_stride,
80 LLVMValueRef vec)
81 {
82 LLVMBuilderRef builder = ac->builder;
83 unsigned i;
84
85 for (i = 0; i < value_count; i++) {
86 LLVMValueRef ptr = values[i * value_stride];
87 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
88 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
89 LLVMBuildStore(builder, value, ptr);
90 }
91 }
92
93 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
94 const nir_ssa_def *def)
95 {
96 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
97 if (def->num_components > 1) {
98 type = LLVMVectorType(type, def->num_components);
99 }
100 return type;
101 }
102
103 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
104 {
105 assert(src.is_ssa);
106 return nir->ssa_defs[src.ssa->index];
107 }
108
109 static LLVMValueRef
110 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
111 {
112 LLVMValueRef ptr = get_src(ctx, src);
113 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
114 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
115
116 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
117
118 return LLVMBuildBitCast(ctx->ac.builder, ptr,
119 LLVMPointerType(type, addr_space), "");
120 }
121
122 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
123 const struct nir_block *b)
124 {
125 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
126 return (LLVMBasicBlockRef)entry->data;
127 }
128
129 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
130 nir_alu_src src,
131 unsigned num_components)
132 {
133 LLVMValueRef value = get_src(ctx, src.src);
134 bool need_swizzle = false;
135
136 assert(value);
137 unsigned src_components = ac_get_llvm_num_components(value);
138 for (unsigned i = 0; i < num_components; ++i) {
139 assert(src.swizzle[i] < src_components);
140 if (src.swizzle[i] != i)
141 need_swizzle = true;
142 }
143
144 if (need_swizzle || num_components != src_components) {
145 LLVMValueRef masks[] = {
146 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
147 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
150
151 if (src_components > 1 && num_components == 1) {
152 value = LLVMBuildExtractElement(ctx->ac.builder, value,
153 masks[0], "");
154 } else if (src_components == 1 && num_components > 1) {
155 LLVMValueRef values[] = {value, value, value, value};
156 value = ac_build_gather_values(&ctx->ac, values, num_components);
157 } else {
158 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
159 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
160 swizzle, "");
161 }
162 }
163 assert(!src.negate);
164 assert(!src.abs);
165 return value;
166 }
167
168 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
169 LLVMIntPredicate pred, LLVMValueRef src0,
170 LLVMValueRef src1)
171 {
172 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
173 return LLVMBuildSelect(ctx->builder, result,
174 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
175 ctx->i32_0, "");
176 }
177
178 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
179 LLVMRealPredicate pred, LLVMValueRef src0,
180 LLVMValueRef src1)
181 {
182 LLVMValueRef result;
183 src0 = ac_to_float(ctx, src0);
184 src1 = ac_to_float(ctx, src1);
185 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
186 return LLVMBuildSelect(ctx->builder, result,
187 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
188 ctx->i32_0, "");
189 }
190
191 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
192 const char *intrin,
193 LLVMTypeRef result_type,
194 LLVMValueRef src0)
195 {
196 char name[64];
197 LLVMValueRef params[] = {
198 ac_to_float(ctx, src0),
199 };
200
201 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
202 ac_get_elem_bits(ctx, result_type));
203 assert(length < sizeof(name));
204 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
205 }
206
207 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
208 const char *intrin,
209 LLVMTypeRef result_type,
210 LLVMValueRef src0, LLVMValueRef src1)
211 {
212 char name[64];
213 LLVMValueRef params[] = {
214 ac_to_float(ctx, src0),
215 ac_to_float(ctx, src1),
216 };
217
218 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
219 ac_get_elem_bits(ctx, result_type));
220 assert(length < sizeof(name));
221 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
222 }
223
224 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
225 const char *intrin,
226 LLVMTypeRef result_type,
227 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
228 {
229 char name[64];
230 LLVMValueRef params[] = {
231 ac_to_float(ctx, src0),
232 ac_to_float(ctx, src1),
233 ac_to_float(ctx, src2),
234 };
235
236 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
237 ac_get_elem_bits(ctx, result_type));
238 assert(length < sizeof(name));
239 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
240 }
241
242 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
243 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
244 {
245 LLVMTypeRef src1_type = LLVMTypeOf(src1);
246 LLVMTypeRef src2_type = LLVMTypeOf(src2);
247
248 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
249
250 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
251 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
252 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
253 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
254 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
255 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
256 }
257
258 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
259 ctx->i32_0, "");
260 return LLVMBuildSelect(ctx->builder, v,
261 ac_to_integer_or_pointer(ctx, src1),
262 ac_to_integer_or_pointer(ctx, src2), "");
263 }
264
265 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
266 LLVMValueRef src0)
267 {
268 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
269 }
270
271 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
272 const char *intrin,
273 LLVMValueRef src0, LLVMValueRef src1)
274 {
275 LLVMTypeRef ret_type;
276 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
277 LLVMValueRef res;
278 LLVMValueRef params[] = { src0, src1 };
279 ret_type = LLVMStructTypeInContext(ctx->context, types,
280 2, true);
281
282 res = ac_build_intrinsic(ctx, intrin, ret_type,
283 params, 2, AC_FUNC_ATTR_READNONE);
284
285 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
286 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
287 return res;
288 }
289
290 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
291 LLVMValueRef src0,
292 unsigned bitsize)
293 {
294 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
295 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
296 "");
297 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
298
299 switch (bitsize) {
300 case 16:
301 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
302 case 32:
303 return result;
304 case 64:
305 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
306 default:
307 unreachable("Unsupported bit size.");
308 }
309 }
310
311 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
312 LLVMValueRef src0)
313 {
314 src0 = ac_to_float(ctx, src0);
315 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
316 return LLVMBuildSExt(ctx->builder,
317 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
318 ctx->i32, "");
319 }
320
321 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
322 LLVMValueRef src0,
323 unsigned bitsize)
324 {
325 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
326
327 switch (bitsize) {
328 case 8:
329 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
330 case 16:
331 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
332 case 32:
333 return result;
334 case 64:
335 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
336 default:
337 unreachable("Unsupported bit size.");
338 }
339 }
340
341 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
342 LLVMValueRef src0)
343 {
344 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
345 return LLVMBuildSExt(ctx->builder,
346 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
347 ctx->i32, "");
348 }
349
350 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
351 LLVMValueRef src0)
352 {
353 LLVMValueRef result;
354 LLVMValueRef cond = NULL;
355
356 src0 = ac_to_float(ctx, src0);
357 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
358
359 if (ctx->chip_class >= GFX8) {
360 LLVMValueRef args[2];
361 /* Check if the result is a denormal - and flush to 0 if so. */
362 args[0] = result;
363 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
364 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
365 }
366
367 /* need to convert back up to f32 */
368 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
369
370 if (ctx->chip_class >= GFX8)
371 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
372 else {
373 /* for GFX6-GFX7 */
374 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
375 * so compare the result and flush to 0 if it's smaller.
376 */
377 LLVMValueRef temp, cond2;
378 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
379 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
380 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
381 temp, "");
382 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
383 temp, ctx->f32_0, "");
384 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
385 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
386 }
387 return result;
388 }
389
390 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
391 LLVMValueRef src0, LLVMValueRef src1)
392 {
393 LLVMValueRef dst64, result;
394 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
395 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
396
397 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
398 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
399 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
400 return result;
401 }
402
403 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
404 LLVMValueRef src0, LLVMValueRef src1)
405 {
406 LLVMValueRef dst64, result;
407 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
408 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
409
410 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
411 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
412 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
413 return result;
414 }
415
416 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
417 LLVMValueRef bits, LLVMValueRef offset)
418 {
419 /* mask = ((1 << bits) - 1) << offset */
420 return LLVMBuildShl(ctx->builder,
421 LLVMBuildSub(ctx->builder,
422 LLVMBuildShl(ctx->builder,
423 ctx->i32_1,
424 bits, ""),
425 ctx->i32_1, ""),
426 offset, "");
427 }
428
429 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
430 LLVMValueRef mask, LLVMValueRef insert,
431 LLVMValueRef base)
432 {
433 /* Calculate:
434 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
435 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
436 */
437 return LLVMBuildXor(ctx->builder, base,
438 LLVMBuildAnd(ctx->builder, mask,
439 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
440 }
441
442 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
443 LLVMValueRef src0,
444 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
445 LLVMValueRef args[2]))
446 {
447 LLVMValueRef comp[2];
448
449 src0 = ac_to_float(ctx, src0);
450 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
451 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
452
453 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
454 }
455
456 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
457 LLVMValueRef src0)
458 {
459 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
460 LLVMValueRef temps[2], val;
461 int i;
462
463 for (i = 0; i < 2; i++) {
464 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
465 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
466 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
467 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
468 }
469 return ac_build_gather_values(ctx, temps, 2);
470 }
471
472 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
473 nir_op op,
474 LLVMValueRef src0)
475 {
476 unsigned mask;
477 int idx;
478 LLVMValueRef result;
479
480 if (op == nir_op_fddx_fine)
481 mask = AC_TID_MASK_LEFT;
482 else if (op == nir_op_fddy_fine)
483 mask = AC_TID_MASK_TOP;
484 else
485 mask = AC_TID_MASK_TOP_LEFT;
486
487 /* for DDX we want to next X pixel, DDY next Y pixel. */
488 if (op == nir_op_fddx_fine ||
489 op == nir_op_fddx_coarse ||
490 op == nir_op_fddx)
491 idx = 1;
492 else
493 idx = 2;
494
495 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
496 return result;
497 }
498
499 struct waterfall_context {
500 LLVMBasicBlockRef phi_bb[2];
501 bool use_waterfall;
502 };
503
504 /* To deal with divergent descriptors we can create a loop that handles all
505 * lanes with the same descriptor on a given iteration (henceforth a
506 * waterfall loop).
507 *
508 * These helper create the begin and end of the loop leaving the caller
509 * to implement the body.
510 *
511 * params:
512 * - ctx is the usal nir context
513 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
514 * - value is the possibly divergent value for which we built the loop
515 * - divergent is whether value is actually divergent. If false we just pass
516 * things through.
517 */
518 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
519 struct waterfall_context *wctx,
520 LLVMValueRef value, bool divergent)
521 {
522 /* If the app claims the value is divergent but it is constant we can
523 * end up with a dynamic index of NULL. */
524 if (!value)
525 divergent = false;
526
527 wctx->use_waterfall = divergent;
528 if (!divergent)
529 return value;
530
531 ac_build_bgnloop(&ctx->ac, 6000);
532
533 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
534
535 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
536 scalar_value, "uniform_active");
537
538 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
539 ac_build_ifcc(&ctx->ac, active, 6001);
540
541 return scalar_value;
542 }
543
544 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
545 struct waterfall_context *wctx,
546 LLVMValueRef value)
547 {
548 LLVMValueRef ret = NULL;
549 LLVMValueRef phi_src[2];
550 LLVMValueRef cc_phi_src[2] = {
551 LLVMConstInt(ctx->ac.i32, 0, false),
552 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
553 };
554
555 if (!wctx->use_waterfall)
556 return value;
557
558 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
559
560 ac_build_endif(&ctx->ac, 6001);
561
562 if (value) {
563 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
564 phi_src[1] = value;
565
566 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
567 }
568
569 /*
570 * By using the optimization barrier on the exit decision, we decouple
571 * the operations from the break, and hence avoid LLVM hoisting the
572 * opteration into the break block.
573 */
574 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
575 ac_build_optimization_barrier(&ctx->ac, &cc);
576
577 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
578 ac_build_ifcc(&ctx->ac, active, 6002);
579 ac_build_break(&ctx->ac);
580 ac_build_endif(&ctx->ac, 6002);
581
582 ac_build_endloop(&ctx->ac, 6000);
583 return ret;
584 }
585
586 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
587 {
588 LLVMValueRef src[4], result = NULL;
589 unsigned num_components = instr->dest.dest.ssa.num_components;
590 unsigned src_components;
591 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
592
593 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
594 switch (instr->op) {
595 case nir_op_vec2:
596 case nir_op_vec3:
597 case nir_op_vec4:
598 src_components = 1;
599 break;
600 case nir_op_pack_half_2x16:
601 case nir_op_pack_snorm_2x16:
602 case nir_op_pack_unorm_2x16:
603 src_components = 2;
604 break;
605 case nir_op_unpack_half_2x16:
606 src_components = 1;
607 break;
608 case nir_op_cube_face_coord:
609 case nir_op_cube_face_index:
610 src_components = 3;
611 break;
612 default:
613 src_components = num_components;
614 break;
615 }
616 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
617 src[i] = get_alu_src(ctx, instr->src[i], src_components);
618
619 switch (instr->op) {
620 case nir_op_mov:
621 result = src[0];
622 break;
623 case nir_op_fneg:
624 src[0] = ac_to_float(&ctx->ac, src[0]);
625 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
626 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
627 /* fneg will be optimized by backend compiler with sign
628 * bit removed via XOR. This is probably a LLVM bug.
629 */
630 result = ac_build_canonicalize(&ctx->ac, result,
631 instr->dest.dest.ssa.bit_size);
632 }
633 break;
634 case nir_op_ineg:
635 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
636 break;
637 case nir_op_inot:
638 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
639 break;
640 case nir_op_iadd:
641 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
642 break;
643 case nir_op_fadd:
644 src[0] = ac_to_float(&ctx->ac, src[0]);
645 src[1] = ac_to_float(&ctx->ac, src[1]);
646 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
647 break;
648 case nir_op_fsub:
649 src[0] = ac_to_float(&ctx->ac, src[0]);
650 src[1] = ac_to_float(&ctx->ac, src[1]);
651 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
652 break;
653 case nir_op_isub:
654 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
655 break;
656 case nir_op_imul:
657 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
658 break;
659 case nir_op_imod:
660 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
661 break;
662 case nir_op_umod:
663 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
664 break;
665 case nir_op_fmod:
666 /* lower_fmod only lower 16-bit and 32-bit fmod */
667 assert(instr->dest.dest.ssa.bit_size == 64);
668 src[0] = ac_to_float(&ctx->ac, src[0]);
669 src[1] = ac_to_float(&ctx->ac, src[1]);
670 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
671 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
672 ac_to_float_type(&ctx->ac, def_type), result);
673 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
674 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
675 break;
676 case nir_op_irem:
677 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
678 break;
679 case nir_op_idiv:
680 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
681 break;
682 case nir_op_udiv:
683 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
684 break;
685 case nir_op_fmul:
686 src[0] = ac_to_float(&ctx->ac, src[0]);
687 src[1] = ac_to_float(&ctx->ac, src[1]);
688 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
689 break;
690 case nir_op_frcp:
691 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
692 ac_to_float_type(&ctx->ac, def_type), src[0]);
693 break;
694 case nir_op_iand:
695 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
696 break;
697 case nir_op_ior:
698 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
699 break;
700 case nir_op_ixor:
701 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
702 break;
703 case nir_op_ishl:
704 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
705 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
706 LLVMTypeOf(src[0]), "");
707 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
708 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
709 LLVMTypeOf(src[0]), "");
710 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
711 break;
712 case nir_op_ishr:
713 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
714 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
715 LLVMTypeOf(src[0]), "");
716 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
717 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
718 LLVMTypeOf(src[0]), "");
719 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
720 break;
721 case nir_op_ushr:
722 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
723 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
724 LLVMTypeOf(src[0]), "");
725 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
726 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
727 LLVMTypeOf(src[0]), "");
728 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
729 break;
730 case nir_op_ilt32:
731 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
732 break;
733 case nir_op_ine32:
734 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
735 break;
736 case nir_op_ieq32:
737 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
738 break;
739 case nir_op_ige32:
740 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
741 break;
742 case nir_op_ult32:
743 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
744 break;
745 case nir_op_uge32:
746 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
747 break;
748 case nir_op_feq32:
749 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
750 break;
751 case nir_op_fne32:
752 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
753 break;
754 case nir_op_flt32:
755 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
756 break;
757 case nir_op_fge32:
758 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
759 break;
760 case nir_op_fabs:
761 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
762 ac_to_float_type(&ctx->ac, def_type), src[0]);
763 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
764 /* fabs will be optimized by backend compiler with sign
765 * bit removed via AND.
766 */
767 result = ac_build_canonicalize(&ctx->ac, result,
768 instr->dest.dest.ssa.bit_size);
769 }
770 break;
771 case nir_op_iabs:
772 result = emit_iabs(&ctx->ac, src[0]);
773 break;
774 case nir_op_imax:
775 result = ac_build_imax(&ctx->ac, src[0], src[1]);
776 break;
777 case nir_op_imin:
778 result = ac_build_imin(&ctx->ac, src[0], src[1]);
779 break;
780 case nir_op_umax:
781 result = ac_build_umax(&ctx->ac, src[0], src[1]);
782 break;
783 case nir_op_umin:
784 result = ac_build_umin(&ctx->ac, src[0], src[1]);
785 break;
786 case nir_op_isign:
787 result = ac_build_isign(&ctx->ac, src[0],
788 instr->dest.dest.ssa.bit_size);
789 break;
790 case nir_op_fsign:
791 src[0] = ac_to_float(&ctx->ac, src[0]);
792 result = ac_build_fsign(&ctx->ac, src[0],
793 instr->dest.dest.ssa.bit_size);
794 break;
795 case nir_op_ffloor:
796 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
797 ac_to_float_type(&ctx->ac, def_type), src[0]);
798 break;
799 case nir_op_ftrunc:
800 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
801 ac_to_float_type(&ctx->ac, def_type), src[0]);
802 break;
803 case nir_op_fceil:
804 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
805 ac_to_float_type(&ctx->ac, def_type), src[0]);
806 break;
807 case nir_op_fround_even:
808 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
809 ac_to_float_type(&ctx->ac, def_type),src[0]);
810 break;
811 case nir_op_ffract:
812 src[0] = ac_to_float(&ctx->ac, src[0]);
813 result = ac_build_fract(&ctx->ac, src[0],
814 instr->dest.dest.ssa.bit_size);
815 break;
816 case nir_op_fsin:
817 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
818 ac_to_float_type(&ctx->ac, def_type), src[0]);
819 break;
820 case nir_op_fcos:
821 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
822 ac_to_float_type(&ctx->ac, def_type), src[0]);
823 break;
824 case nir_op_fsqrt:
825 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
826 ac_to_float_type(&ctx->ac, def_type), src[0]);
827 break;
828 case nir_op_fexp2:
829 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
830 ac_to_float_type(&ctx->ac, def_type), src[0]);
831 break;
832 case nir_op_flog2:
833 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
834 ac_to_float_type(&ctx->ac, def_type), src[0]);
835 break;
836 case nir_op_frsq:
837 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
838 ac_to_float_type(&ctx->ac, def_type), src[0]);
839 break;
840 case nir_op_frexp_exp:
841 src[0] = ac_to_float(&ctx->ac, src[0]);
842 result = ac_build_frexp_exp(&ctx->ac, src[0],
843 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
844 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
845 result = LLVMBuildSExt(ctx->ac.builder, result,
846 ctx->ac.i32, "");
847 break;
848 case nir_op_frexp_sig:
849 src[0] = ac_to_float(&ctx->ac, src[0]);
850 result = ac_build_frexp_mant(&ctx->ac, src[0],
851 instr->dest.dest.ssa.bit_size);
852 break;
853 case nir_op_fpow:
854 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
855 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
856 break;
857 case nir_op_fmax:
858 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
859 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
860 if (ctx->ac.chip_class < GFX9 &&
861 instr->dest.dest.ssa.bit_size == 32) {
862 /* Only pre-GFX9 chips do not flush denorms. */
863 result = ac_build_canonicalize(&ctx->ac, result,
864 instr->dest.dest.ssa.bit_size);
865 }
866 break;
867 case nir_op_fmin:
868 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
869 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
870 if (ctx->ac.chip_class < GFX9 &&
871 instr->dest.dest.ssa.bit_size == 32) {
872 /* Only pre-GFX9 chips do not flush denorms. */
873 result = ac_build_canonicalize(&ctx->ac, result,
874 instr->dest.dest.ssa.bit_size);
875 }
876 break;
877 case nir_op_ffma:
878 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
879 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
880 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
881 break;
882 case nir_op_ldexp:
883 src[0] = ac_to_float(&ctx->ac, src[0]);
884 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
885 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
886 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
887 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
888 else
889 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
890 break;
891 case nir_op_bfm:
892 result = emit_bfm(&ctx->ac, src[0], src[1]);
893 break;
894 case nir_op_bitfield_select:
895 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
896 break;
897 case nir_op_ubfe:
898 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
899 break;
900 case nir_op_ibfe:
901 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
902 break;
903 case nir_op_bitfield_reverse:
904 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
905 break;
906 case nir_op_bit_count:
907 result = ac_build_bit_count(&ctx->ac, src[0]);
908 break;
909 case nir_op_vec2:
910 case nir_op_vec3:
911 case nir_op_vec4:
912 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
913 src[i] = ac_to_integer(&ctx->ac, src[i]);
914 result = ac_build_gather_values(&ctx->ac, src, num_components);
915 break;
916 case nir_op_f2i8:
917 case nir_op_f2i16:
918 case nir_op_f2i32:
919 case nir_op_f2i64:
920 src[0] = ac_to_float(&ctx->ac, src[0]);
921 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
922 break;
923 case nir_op_f2u8:
924 case nir_op_f2u16:
925 case nir_op_f2u32:
926 case nir_op_f2u64:
927 src[0] = ac_to_float(&ctx->ac, src[0]);
928 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
929 break;
930 case nir_op_i2f16:
931 case nir_op_i2f32:
932 case nir_op_i2f64:
933 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
934 break;
935 case nir_op_u2f16:
936 case nir_op_u2f32:
937 case nir_op_u2f64:
938 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
939 break;
940 case nir_op_f2f16_rtz:
941 src[0] = ac_to_float(&ctx->ac, src[0]);
942 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
943 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
944 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
945 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
946 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
947 break;
948 case nir_op_f2f16_rtne:
949 case nir_op_f2f16:
950 case nir_op_f2f32:
951 case nir_op_f2f64:
952 src[0] = ac_to_float(&ctx->ac, src[0]);
953 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
954 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
955 else
956 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
957 break;
958 case nir_op_u2u8:
959 case nir_op_u2u16:
960 case nir_op_u2u32:
961 case nir_op_u2u64:
962 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
963 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
964 else
965 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
966 break;
967 case nir_op_i2i8:
968 case nir_op_i2i16:
969 case nir_op_i2i32:
970 case nir_op_i2i64:
971 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
972 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
973 else
974 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
975 break;
976 case nir_op_b32csel:
977 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
978 break;
979 case nir_op_find_lsb:
980 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
981 break;
982 case nir_op_ufind_msb:
983 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
984 break;
985 case nir_op_ifind_msb:
986 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
987 break;
988 case nir_op_uadd_carry:
989 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
990 break;
991 case nir_op_usub_borrow:
992 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
993 break;
994 case nir_op_b2f16:
995 case nir_op_b2f32:
996 case nir_op_b2f64:
997 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
998 break;
999 case nir_op_f2b32:
1000 result = emit_f2b(&ctx->ac, src[0]);
1001 break;
1002 case nir_op_b2i8:
1003 case nir_op_b2i16:
1004 case nir_op_b2i32:
1005 case nir_op_b2i64:
1006 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1007 break;
1008 case nir_op_i2b32:
1009 result = emit_i2b(&ctx->ac, src[0]);
1010 break;
1011 case nir_op_fquantize2f16:
1012 result = emit_f2f16(&ctx->ac, src[0]);
1013 break;
1014 case nir_op_umul_high:
1015 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1016 break;
1017 case nir_op_imul_high:
1018 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1019 break;
1020 case nir_op_pack_half_2x16:
1021 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1022 break;
1023 case nir_op_pack_snorm_2x16:
1024 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1025 break;
1026 case nir_op_pack_unorm_2x16:
1027 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1028 break;
1029 case nir_op_unpack_half_2x16:
1030 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1031 break;
1032 case nir_op_fddx:
1033 case nir_op_fddy:
1034 case nir_op_fddx_fine:
1035 case nir_op_fddy_fine:
1036 case nir_op_fddx_coarse:
1037 case nir_op_fddy_coarse:
1038 result = emit_ddxy(ctx, instr->op, src[0]);
1039 break;
1040
1041 case nir_op_unpack_64_2x32_split_x: {
1042 assert(ac_get_llvm_num_components(src[0]) == 1);
1043 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1044 ctx->ac.v2i32,
1045 "");
1046 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1047 ctx->ac.i32_0, "");
1048 break;
1049 }
1050
1051 case nir_op_unpack_64_2x32_split_y: {
1052 assert(ac_get_llvm_num_components(src[0]) == 1);
1053 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1054 ctx->ac.v2i32,
1055 "");
1056 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1057 ctx->ac.i32_1, "");
1058 break;
1059 }
1060
1061 case nir_op_pack_64_2x32_split: {
1062 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1063 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1064 break;
1065 }
1066
1067 case nir_op_pack_32_2x16_split: {
1068 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1069 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1070 break;
1071 }
1072
1073 case nir_op_unpack_32_2x16_split_x: {
1074 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1075 ctx->ac.v2i16,
1076 "");
1077 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1078 ctx->ac.i32_0, "");
1079 break;
1080 }
1081
1082 case nir_op_unpack_32_2x16_split_y: {
1083 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1084 ctx->ac.v2i16,
1085 "");
1086 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1087 ctx->ac.i32_1, "");
1088 break;
1089 }
1090
1091 case nir_op_cube_face_coord: {
1092 src[0] = ac_to_float(&ctx->ac, src[0]);
1093 LLVMValueRef results[2];
1094 LLVMValueRef in[3];
1095 for (unsigned chan = 0; chan < 3; chan++)
1096 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1097 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1098 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1099 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1100 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1101 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1102 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1103 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1104 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1105 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1106 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1107 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1108 result = ac_build_gather_values(&ctx->ac, results, 2);
1109 break;
1110 }
1111
1112 case nir_op_cube_face_index: {
1113 src[0] = ac_to_float(&ctx->ac, src[0]);
1114 LLVMValueRef in[3];
1115 for (unsigned chan = 0; chan < 3; chan++)
1116 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1117 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1118 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1119 break;
1120 }
1121
1122 case nir_op_fmin3:
1123 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1124 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1125 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1126 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1127 break;
1128 case nir_op_umin3:
1129 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1130 result = ac_build_umin(&ctx->ac, result, src[2]);
1131 break;
1132 case nir_op_imin3:
1133 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1134 result = ac_build_imin(&ctx->ac, result, src[2]);
1135 break;
1136 case nir_op_fmax3:
1137 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1138 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1139 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1140 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1141 break;
1142 case nir_op_umax3:
1143 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1144 result = ac_build_umax(&ctx->ac, result, src[2]);
1145 break;
1146 case nir_op_imax3:
1147 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1148 result = ac_build_imax(&ctx->ac, result, src[2]);
1149 break;
1150 case nir_op_fmed3: {
1151 src[0] = ac_to_float(&ctx->ac, src[0]);
1152 src[1] = ac_to_float(&ctx->ac, src[1]);
1153 src[2] = ac_to_float(&ctx->ac, src[2]);
1154 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1155 instr->dest.dest.ssa.bit_size);
1156 break;
1157 }
1158 case nir_op_imed3: {
1159 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1160 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1161 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1162 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1163 break;
1164 }
1165 case nir_op_umed3: {
1166 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1167 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1168 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1169 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1170 break;
1171 }
1172
1173 default:
1174 fprintf(stderr, "Unknown NIR alu instr: ");
1175 nir_print_instr(&instr->instr, stderr);
1176 fprintf(stderr, "\n");
1177 abort();
1178 }
1179
1180 if (result) {
1181 assert(instr->dest.dest.is_ssa);
1182 result = ac_to_integer_or_pointer(&ctx->ac, result);
1183 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1184 }
1185 }
1186
1187 static void visit_load_const(struct ac_nir_context *ctx,
1188 const nir_load_const_instr *instr)
1189 {
1190 LLVMValueRef values[4], value = NULL;
1191 LLVMTypeRef element_type =
1192 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1193
1194 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1195 switch (instr->def.bit_size) {
1196 case 8:
1197 values[i] = LLVMConstInt(element_type,
1198 instr->value[i].u8, false);
1199 break;
1200 case 16:
1201 values[i] = LLVMConstInt(element_type,
1202 instr->value[i].u16, false);
1203 break;
1204 case 32:
1205 values[i] = LLVMConstInt(element_type,
1206 instr->value[i].u32, false);
1207 break;
1208 case 64:
1209 values[i] = LLVMConstInt(element_type,
1210 instr->value[i].u64, false);
1211 break;
1212 default:
1213 fprintf(stderr,
1214 "unsupported nir load_const bit_size: %d\n",
1215 instr->def.bit_size);
1216 abort();
1217 }
1218 }
1219 if (instr->def.num_components > 1) {
1220 value = LLVMConstVector(values, instr->def.num_components);
1221 } else
1222 value = values[0];
1223
1224 ctx->ssa_defs[instr->def.index] = value;
1225 }
1226
1227 static LLVMValueRef
1228 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1229 {
1230 LLVMValueRef size =
1231 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1232 LLVMConstInt(ctx->ac.i32, 2, false), "");
1233
1234 /* GFX8 only */
1235 if (ctx->ac.chip_class == GFX8 && in_elements) {
1236 /* On GFX8, the descriptor contains the size in bytes,
1237 * but TXQ must return the size in elements.
1238 * The stride is always non-zero for resources using TXQ.
1239 */
1240 LLVMValueRef stride =
1241 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1242 ctx->ac.i32_1, "");
1243 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1244 LLVMConstInt(ctx->ac.i32, 16, false), "");
1245 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1246 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1247
1248 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1249 }
1250 return size;
1251 }
1252
1253 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1254 * incorrectly forces nearest filtering if the texture format is integer.
1255 * The only effect it has on Gather4, which always returns 4 texels for
1256 * bilinear filtering, is that the final coordinates are off by 0.5 of
1257 * the texel size.
1258 *
1259 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1260 * or (0.5 / size) from the normalized coordinates.
1261 *
1262 * However, cube textures with 8_8_8_8 data formats require a different
1263 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1264 * precision in 32-bit data formats, so it needs to be applied dynamically at
1265 * runtime. In this case, return an i1 value that indicates whether the
1266 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1267 */
1268 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1269 nir_variable *var,
1270 struct ac_image_args *args,
1271 const nir_tex_instr *instr)
1272 {
1273 const struct glsl_type *type = glsl_without_array(var->type);
1274 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1275 LLVMValueRef wa_8888 = NULL;
1276 LLVMValueRef half_texel[2];
1277 LLVMValueRef result;
1278
1279 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1280
1281 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1282 LLVMValueRef formats;
1283 LLVMValueRef data_format;
1284 LLVMValueRef wa_formats;
1285
1286 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1287
1288 data_format = LLVMBuildLShr(ctx->builder, formats,
1289 LLVMConstInt(ctx->i32, 20, false), "");
1290 data_format = LLVMBuildAnd(ctx->builder, data_format,
1291 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1292 wa_8888 = LLVMBuildICmp(
1293 ctx->builder, LLVMIntEQ, data_format,
1294 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1295 "");
1296
1297 uint32_t wa_num_format =
1298 stype == GLSL_TYPE_UINT ?
1299 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1300 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1301 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1302 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1303 "");
1304 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1305 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1306
1307 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1308 args->resource = LLVMBuildInsertElement(
1309 ctx->builder, args->resource, formats, ctx->i32_1, "");
1310 }
1311
1312 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1313 assert(!wa_8888);
1314 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1315 } else {
1316 struct ac_image_args resinfo = {};
1317 LLVMBasicBlockRef bbs[2];
1318
1319 LLVMValueRef unnorm = NULL;
1320 LLVMValueRef default_offset = ctx->f32_0;
1321 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1322 !instr->is_array) {
1323 /* In vulkan, whether the sampler uses unnormalized
1324 * coordinates or not is a dynamic property of the
1325 * sampler. Hence, to figure out whether or not we
1326 * need to divide by the texture size, we need to test
1327 * the sampler at runtime. This tests the bit set by
1328 * radv_init_sampler().
1329 */
1330 LLVMValueRef sampler0 =
1331 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1332 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1333 LLVMConstInt(ctx->i32, 15, false), "");
1334 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1335 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1336 default_offset = LLVMConstReal(ctx->f32, -0.5);
1337 }
1338
1339 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1340 if (wa_8888 || unnorm) {
1341 assert(!(wa_8888 && unnorm));
1342 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1343 /* Skip the texture size query entirely if we don't need it. */
1344 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1345 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1346 }
1347
1348 /* Query the texture size. */
1349 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1350 resinfo.opcode = ac_image_get_resinfo;
1351 resinfo.dmask = 0xf;
1352 resinfo.lod = ctx->i32_0;
1353 resinfo.resource = args->resource;
1354 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1355 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1356
1357 /* Compute -0.5 / size. */
1358 for (unsigned c = 0; c < 2; c++) {
1359 half_texel[c] =
1360 LLVMBuildExtractElement(ctx->builder, size,
1361 LLVMConstInt(ctx->i32, c, 0), "");
1362 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1363 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1364 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1365 LLVMConstReal(ctx->f32, -0.5), "");
1366 }
1367
1368 if (wa_8888 || unnorm) {
1369 ac_build_endif(ctx, 2000);
1370
1371 for (unsigned c = 0; c < 2; c++) {
1372 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1373 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1374 values, bbs);
1375 }
1376 }
1377 }
1378
1379 for (unsigned c = 0; c < 2; c++) {
1380 LLVMValueRef tmp;
1381 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1382 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1383 }
1384
1385 args->attributes = AC_FUNC_ATTR_READNONE;
1386 result = ac_build_image_opcode(ctx, args);
1387
1388 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1389 LLVMValueRef tmp, tmp2;
1390
1391 /* if the cube workaround is in place, f2i the result. */
1392 for (unsigned c = 0; c < 4; c++) {
1393 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1394 if (stype == GLSL_TYPE_UINT)
1395 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1396 else
1397 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1398 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1399 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1400 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1401 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1402 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1403 }
1404 }
1405 return result;
1406 }
1407
1408 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1409 {
1410 nir_deref_instr *texture_deref_instr = NULL;
1411
1412 for (unsigned i = 0; i < instr->num_srcs; i++) {
1413 switch (instr->src[i].src_type) {
1414 case nir_tex_src_texture_deref:
1415 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1416 break;
1417 default:
1418 break;
1419 }
1420 }
1421 return texture_deref_instr;
1422 }
1423
1424 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1425 const nir_tex_instr *instr,
1426 struct ac_image_args *args)
1427 {
1428 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1429 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1430
1431 return ac_build_buffer_load_format(&ctx->ac,
1432 args->resource,
1433 args->coords[0],
1434 ctx->ac.i32_0,
1435 util_last_bit(mask),
1436 0, true);
1437 }
1438
1439 args->opcode = ac_image_sample;
1440
1441 switch (instr->op) {
1442 case nir_texop_txf:
1443 case nir_texop_txf_ms:
1444 case nir_texop_samples_identical:
1445 args->opcode = args->level_zero ||
1446 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1447 ac_image_load : ac_image_load_mip;
1448 args->level_zero = false;
1449 break;
1450 case nir_texop_txs:
1451 case nir_texop_query_levels:
1452 args->opcode = ac_image_get_resinfo;
1453 if (!args->lod)
1454 args->lod = ctx->ac.i32_0;
1455 args->level_zero = false;
1456 break;
1457 case nir_texop_tex:
1458 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1459 assert(!args->lod);
1460 args->level_zero = true;
1461 }
1462 break;
1463 case nir_texop_tg4:
1464 args->opcode = ac_image_gather4;
1465 args->level_zero = true;
1466 break;
1467 case nir_texop_lod:
1468 args->opcode = ac_image_get_lod;
1469 break;
1470 case nir_texop_fragment_fetch:
1471 case nir_texop_fragment_mask_fetch:
1472 args->opcode = ac_image_load;
1473 args->level_zero = false;
1474 break;
1475 default:
1476 break;
1477 }
1478
1479 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1480 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1481 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1482 const struct glsl_type *type = glsl_without_array(var->type);
1483 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1484 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1485 return lower_gather4_integer(&ctx->ac, var, args, instr);
1486 }
1487 }
1488
1489 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1490 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1491 if ((args->dim == ac_image_2darray ||
1492 args->dim == ac_image_2d) && !args->coords[1]) {
1493 args->coords[1] = ctx->ac.i32_0;
1494 }
1495 }
1496
1497 args->attributes = AC_FUNC_ATTR_READNONE;
1498 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1499 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1500 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1501 /* Prevent texture instructions with implicit derivatives from being
1502 * sinked into branches. */
1503 switch (instr->op) {
1504 case nir_texop_tex:
1505 case nir_texop_txb:
1506 case nir_texop_lod:
1507 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1508 break;
1509 default:
1510 break;
1511 }
1512 }
1513
1514 return ac_build_image_opcode(&ctx->ac, args);
1515 }
1516
1517 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1518 nir_intrinsic_instr *instr)
1519 {
1520 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1521 LLVMValueRef index = get_src(ctx, instr->src[1]);
1522
1523 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1524 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1525 return result;
1526 }
1527
1528 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1529 nir_intrinsic_instr *instr)
1530 {
1531 LLVMValueRef ptr, addr;
1532 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1533 unsigned index = nir_intrinsic_base(instr);
1534
1535 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1536 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1537
1538 /* Load constant values from user SGPRS when possible, otherwise
1539 * fallback to the default path that loads directly from memory.
1540 */
1541 if (LLVMIsConstant(src0) &&
1542 instr->dest.ssa.bit_size == 32) {
1543 unsigned count = instr->dest.ssa.num_components;
1544 unsigned offset = index;
1545
1546 offset += LLVMConstIntGetZExtValue(src0);
1547 offset /= 4;
1548
1549 offset -= ctx->args->base_inline_push_consts;
1550
1551 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1552 if (offset + count <= num_inline_push_consts) {
1553 LLVMValueRef push_constants[num_inline_push_consts];
1554 for (unsigned i = 0; i < num_inline_push_consts; i++)
1555 push_constants[i] = ac_get_arg(&ctx->ac,
1556 ctx->args->inline_push_consts[i]);
1557 return ac_build_gather_values(&ctx->ac,
1558 push_constants + offset,
1559 count);
1560 }
1561 }
1562
1563 ptr = LLVMBuildGEP(ctx->ac.builder,
1564 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1565
1566 if (instr->dest.ssa.bit_size == 8) {
1567 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1568 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1569 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1570 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1571
1572 LLVMValueRef params[3];
1573 if (load_dwords > 1) {
1574 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1575 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1576 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1577 } else {
1578 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1579 params[0] = ctx->ac.i32_0;
1580 params[1] = res;
1581 }
1582 params[2] = addr;
1583 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1584
1585 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1586 if (instr->dest.ssa.num_components > 1)
1587 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1588 return res;
1589 } else if (instr->dest.ssa.bit_size == 16) {
1590 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1591 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1592 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1593 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1594 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1595 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1596 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1597 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1598 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1599 LLVMConstInt(ctx->ac.i32, 4, false)};
1600 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1601 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1602 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1603 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1604 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1605 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1606 }
1607
1608 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1609
1610 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1611 }
1612
1613 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1614 const nir_intrinsic_instr *instr)
1615 {
1616 LLVMValueRef index = get_src(ctx, instr->src[0]);
1617
1618 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1619 }
1620
1621 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1622 {
1623 uint32_t new_mask = 0;
1624 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1625 if (mask & (1u << i))
1626 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1627 return new_mask;
1628 }
1629
1630 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1631 unsigned start, unsigned count)
1632 {
1633 LLVMValueRef mask[] = {
1634 ctx->i32_0, ctx->i32_1,
1635 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1636
1637 unsigned src_elements = ac_get_llvm_num_components(src);
1638
1639 if (count == src_elements) {
1640 assert(start == 0);
1641 return src;
1642 } else if (count == 1) {
1643 assert(start < src_elements);
1644 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1645 } else {
1646 assert(start + count <= src_elements);
1647 assert(count <= 4);
1648 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1649 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1650 }
1651 }
1652
1653 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1654 enum gl_access_qualifier access,
1655 bool may_store_unaligned,
1656 bool writeonly_memory)
1657 {
1658 unsigned cache_policy = 0;
1659
1660 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1661 * store opcodes not aligned to a dword are affected. The only way to
1662 * get unaligned stores is through shader images.
1663 */
1664 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1665 /* If this is write-only, don't keep data in L1 to prevent
1666 * evicting L1 cache lines that may be needed by other
1667 * instructions.
1668 */
1669 writeonly_memory ||
1670 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1671 cache_policy |= ac_glc;
1672 }
1673
1674 if (access & ACCESS_STREAM_CACHE_POLICY)
1675 cache_policy |= ac_slc;
1676
1677 return cache_policy;
1678 }
1679
1680 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1681 struct waterfall_context *wctx,
1682 const nir_intrinsic_instr *instr,
1683 nir_src src)
1684 {
1685 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1686 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1687 }
1688
1689 static void visit_store_ssbo(struct ac_nir_context *ctx,
1690 nir_intrinsic_instr *instr)
1691 {
1692 if (ctx->ac.postponed_kill) {
1693 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1694 ctx->ac.postponed_kill, "");
1695 ac_build_ifcc(&ctx->ac, cond, 7000);
1696 }
1697
1698 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1699 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1700 unsigned writemask = nir_intrinsic_write_mask(instr);
1701 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1702 bool writeonly_memory = access & ACCESS_NON_READABLE;
1703 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1704
1705 struct waterfall_context wctx;
1706 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1707
1708 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1709 LLVMValueRef base_data = src_data;
1710 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1711 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1712
1713 while (writemask) {
1714 int start, count;
1715 LLVMValueRef data, offset;
1716 LLVMTypeRef data_type;
1717
1718 u_bit_scan_consecutive_range(&writemask, &start, &count);
1719
1720 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1721 * writes into a 2-element and a 1-element write. */
1722 if (count == 3 &&
1723 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1724 writemask |= 1 << (start + 2);
1725 count = 2;
1726 }
1727 int num_bytes = count * elem_size_bytes; /* count in bytes */
1728
1729 /* we can only store 4 DWords at the same time.
1730 * can only happen for 64 Bit vectors. */
1731 if (num_bytes > 16) {
1732 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1733 count = 2;
1734 num_bytes = 16;
1735 }
1736
1737 /* check alignment of 16 Bit stores */
1738 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1739 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1740 count = 1;
1741 num_bytes = 2;
1742 }
1743 data = extract_vector_range(&ctx->ac, base_data, start, count);
1744
1745 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1746 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1747
1748 if (num_bytes == 1) {
1749 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1750 offset, ctx->ac.i32_0,
1751 cache_policy);
1752 } else if (num_bytes == 2) {
1753 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1754 offset, ctx->ac.i32_0,
1755 cache_policy);
1756 } else {
1757 int num_channels = num_bytes / 4;
1758
1759 switch (num_bytes) {
1760 case 16: /* v4f32 */
1761 data_type = ctx->ac.v4f32;
1762 break;
1763 case 12: /* v3f32 */
1764 data_type = ctx->ac.v3f32;
1765 break;
1766 case 8: /* v2f32 */
1767 data_type = ctx->ac.v2f32;
1768 break;
1769 case 4: /* f32 */
1770 data_type = ctx->ac.f32;
1771 break;
1772 default:
1773 unreachable("Malformed vector store.");
1774 }
1775 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1776
1777 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1778 num_channels, offset,
1779 ctx->ac.i32_0, 0,
1780 cache_policy);
1781 }
1782 }
1783
1784 exit_waterfall(ctx, &wctx, NULL);
1785
1786 if (ctx->ac.postponed_kill)
1787 ac_build_endif(&ctx->ac, 7000);
1788 }
1789
1790 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1791 LLVMValueRef descriptor,
1792 LLVMValueRef offset,
1793 LLVMValueRef compare,
1794 LLVMValueRef exchange)
1795 {
1796 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1797 if (ctx->abi->robust_buffer_access) {
1798 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1799
1800 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1801 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1802
1803 ac_build_ifcc(&ctx->ac, cond, -1);
1804
1805 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1806 }
1807
1808 LLVMValueRef ptr_parts[2] = {
1809 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1810 LLVMBuildAnd(ctx->ac.builder,
1811 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1812 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1813 };
1814
1815 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1816 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1817
1818 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1819
1820 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1821 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1822 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1823 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1824
1825 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1826 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1827
1828 if (ctx->abi->robust_buffer_access) {
1829 ac_build_endif(&ctx->ac, -1);
1830
1831 LLVMBasicBlockRef incoming_blocks[2] = {
1832 start_block,
1833 then_block,
1834 };
1835
1836 LLVMValueRef incoming_values[2] = {
1837 LLVMConstInt(ctx->ac.i64, 0, 0),
1838 result,
1839 };
1840 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1841 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1842 return ret;
1843 } else {
1844 return result;
1845 }
1846 }
1847
1848 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1849 nir_intrinsic_instr *instr)
1850 {
1851 if (ctx->ac.postponed_kill) {
1852 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1853 ctx->ac.postponed_kill, "");
1854 ac_build_ifcc(&ctx->ac, cond, 7001);
1855 }
1856
1857 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1858 const char *op;
1859 char name[64], type[8];
1860 LLVMValueRef params[6], descriptor;
1861 LLVMValueRef result;
1862 int arg_count = 0;
1863
1864 struct waterfall_context wctx;
1865 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1866
1867 switch (instr->intrinsic) {
1868 case nir_intrinsic_ssbo_atomic_add:
1869 op = "add";
1870 break;
1871 case nir_intrinsic_ssbo_atomic_imin:
1872 op = "smin";
1873 break;
1874 case nir_intrinsic_ssbo_atomic_umin:
1875 op = "umin";
1876 break;
1877 case nir_intrinsic_ssbo_atomic_imax:
1878 op = "smax";
1879 break;
1880 case nir_intrinsic_ssbo_atomic_umax:
1881 op = "umax";
1882 break;
1883 case nir_intrinsic_ssbo_atomic_and:
1884 op = "and";
1885 break;
1886 case nir_intrinsic_ssbo_atomic_or:
1887 op = "or";
1888 break;
1889 case nir_intrinsic_ssbo_atomic_xor:
1890 op = "xor";
1891 break;
1892 case nir_intrinsic_ssbo_atomic_exchange:
1893 op = "swap";
1894 break;
1895 case nir_intrinsic_ssbo_atomic_comp_swap:
1896 op = "cmpswap";
1897 break;
1898 default:
1899 abort();
1900 }
1901
1902 descriptor = ctx->abi->load_ssbo(ctx->abi,
1903 rsrc_base,
1904 true);
1905
1906 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1907 return_type == ctx->ac.i64) {
1908 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1909 get_src(ctx, instr->src[1]),
1910 get_src(ctx, instr->src[2]),
1911 get_src(ctx, instr->src[3]));
1912 } else {
1913 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1914 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1915 }
1916 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1917 params[arg_count++] = descriptor;
1918
1919 if (LLVM_VERSION_MAJOR >= 9) {
1920 /* XXX: The new raw/struct atomic intrinsics are buggy with
1921 * LLVM 8, see r358579.
1922 */
1923 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1924 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1925 params[arg_count++] = ctx->ac.i32_0; /* slc */
1926
1927 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1928 snprintf(name, sizeof(name),
1929 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1930 } else {
1931 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1932 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1933 params[arg_count++] = ctx->ac.i1false; /* slc */
1934
1935 assert(return_type == ctx->ac.i32);
1936 snprintf(name, sizeof(name),
1937 "llvm.amdgcn.buffer.atomic.%s", op);
1938 }
1939
1940 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1941 arg_count, 0);
1942 }
1943
1944 result = exit_waterfall(ctx, &wctx, result);
1945 if (ctx->ac.postponed_kill)
1946 ac_build_endif(&ctx->ac, 7001);
1947 return result;
1948 }
1949
1950 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1951 nir_intrinsic_instr *instr)
1952 {
1953 struct waterfall_context wctx;
1954 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1955
1956 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1957 int num_components = instr->num_components;
1958 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1959 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1960
1961 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1962 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1963 LLVMValueRef vindex = ctx->ac.i32_0;
1964
1965 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1966 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1967
1968 LLVMValueRef results[4];
1969 for (int i = 0; i < num_components;) {
1970 int num_elems = num_components - i;
1971 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1972 num_elems = 1;
1973 if (num_elems * elem_size_bytes > 16)
1974 num_elems = 16 / elem_size_bytes;
1975 int load_bytes = num_elems * elem_size_bytes;
1976
1977 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1978
1979 LLVMValueRef ret;
1980
1981 if (load_bytes == 1) {
1982 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1983 rsrc,
1984 offset,
1985 ctx->ac.i32_0,
1986 immoffset,
1987 cache_policy);
1988 } else if (load_bytes == 2) {
1989 ret = ac_build_tbuffer_load_short(&ctx->ac,
1990 rsrc,
1991 offset,
1992 ctx->ac.i32_0,
1993 immoffset,
1994 cache_policy);
1995 } else {
1996 int num_channels = util_next_power_of_two(load_bytes) / 4;
1997 bool can_speculate = access & ACCESS_CAN_REORDER;
1998
1999 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2000 vindex, offset, immoffset, 0,
2001 cache_policy, can_speculate, false);
2002 }
2003
2004 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2005 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2006 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2007
2008 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2009 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2010
2011 for (unsigned j = 0; j < num_elems; j++) {
2012 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2013 }
2014 i += num_elems;
2015 }
2016
2017 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2018 return exit_waterfall(ctx, &wctx, ret);
2019 }
2020
2021 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2022 struct waterfall_context *wctx,
2023 const nir_intrinsic_instr *instr)
2024 {
2025 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2026 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2027 }
2028
2029 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2030 nir_intrinsic_instr *instr)
2031 {
2032 struct waterfall_context wctx;
2033 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2034
2035 LLVMValueRef ret;
2036 LLVMValueRef rsrc = rsrc_base;
2037 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2038 int num_components = instr->num_components;
2039
2040 if (ctx->abi->load_ubo)
2041 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2042
2043 if (instr->dest.ssa.bit_size == 64)
2044 num_components *= 2;
2045
2046 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2047 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2048 LLVMValueRef results[num_components];
2049 for (unsigned i = 0; i < num_components; ++i) {
2050 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2051 load_bytes * i, 0);
2052
2053 if (load_bytes == 1) {
2054 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2055 rsrc,
2056 offset,
2057 ctx->ac.i32_0,
2058 immoffset,
2059 0);
2060 } else {
2061 assert(load_bytes == 2);
2062 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2063 rsrc,
2064 offset,
2065 ctx->ac.i32_0,
2066 immoffset,
2067 0);
2068 }
2069 }
2070 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2071 } else {
2072 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2073 NULL, 0, 0, true, true);
2074
2075 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2076 }
2077
2078 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2079 get_def_type(ctx, &instr->dest.ssa), "");
2080
2081 return exit_waterfall(ctx, &wctx, ret);
2082 }
2083
2084 static void
2085 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2086 bool vs_in, unsigned *vertex_index_out,
2087 LLVMValueRef *vertex_index_ref,
2088 unsigned *const_out, LLVMValueRef *indir_out)
2089 {
2090 nir_variable *var = nir_deref_instr_get_variable(instr);
2091 nir_deref_path path;
2092 unsigned idx_lvl = 1;
2093
2094 nir_deref_path_init(&path, instr, NULL);
2095
2096 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2097 if (vertex_index_ref) {
2098 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2099 if (vertex_index_out)
2100 *vertex_index_out = 0;
2101 } else {
2102 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2103 }
2104 ++idx_lvl;
2105 }
2106
2107 uint32_t const_offset = 0;
2108 LLVMValueRef offset = NULL;
2109
2110 if (var->data.compact) {
2111 assert(instr->deref_type == nir_deref_type_array);
2112 const_offset = nir_src_as_uint(instr->arr.index);
2113 goto out;
2114 }
2115
2116 for (; path.path[idx_lvl]; ++idx_lvl) {
2117 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2118 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2119 unsigned index = path.path[idx_lvl]->strct.index;
2120
2121 for (unsigned i = 0; i < index; i++) {
2122 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2123 const_offset += glsl_count_attribute_slots(ft, vs_in);
2124 }
2125 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2126 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2127 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2128 const_offset += size *
2129 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2130 } else {
2131 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2132 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2133 if (offset)
2134 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2135 else
2136 offset = array_off;
2137 }
2138 } else
2139 unreachable("Uhandled deref type in get_deref_instr_offset");
2140 }
2141
2142 out:
2143 nir_deref_path_finish(&path);
2144
2145 if (const_offset && offset)
2146 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2147 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2148 "");
2149
2150 *const_out = const_offset;
2151 *indir_out = offset;
2152 }
2153
2154 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2155 nir_intrinsic_instr *instr,
2156 bool load_inputs)
2157 {
2158 LLVMValueRef result;
2159 LLVMValueRef vertex_index = NULL;
2160 LLVMValueRef indir_index = NULL;
2161 unsigned const_index = 0;
2162
2163 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2164
2165 unsigned location = var->data.location;
2166 unsigned driver_location = var->data.driver_location;
2167 const bool is_patch = var->data.patch ||
2168 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2169 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2170 const bool is_compact = var->data.compact;
2171
2172 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2173 false, NULL, is_patch ? NULL : &vertex_index,
2174 &const_index, &indir_index);
2175
2176 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2177
2178 LLVMTypeRef src_component_type;
2179 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2180 src_component_type = LLVMGetElementType(dest_type);
2181 else
2182 src_component_type = dest_type;
2183
2184 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2185 vertex_index, indir_index,
2186 const_index, location, driver_location,
2187 var->data.location_frac,
2188 instr->num_components,
2189 is_patch, is_compact, load_inputs);
2190 if (instr->dest.ssa.bit_size == 16) {
2191 result = ac_to_integer(&ctx->ac, result);
2192 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2193 }
2194 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2195 }
2196
2197 static unsigned
2198 type_scalar_size_bytes(const struct glsl_type *type)
2199 {
2200 assert(glsl_type_is_vector_or_scalar(type) ||
2201 glsl_type_is_matrix(type));
2202 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2203 }
2204
2205 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2206 nir_intrinsic_instr *instr)
2207 {
2208 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2209 nir_variable *var = nir_deref_instr_get_variable(deref);
2210
2211 LLVMValueRef values[8];
2212 int idx = 0;
2213 int ve = instr->dest.ssa.num_components;
2214 unsigned comp = 0;
2215 LLVMValueRef indir_index;
2216 LLVMValueRef ret;
2217 unsigned const_index;
2218 unsigned stride = 4;
2219 int mode = deref->mode;
2220
2221 if (var) {
2222 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2223 var->data.mode == nir_var_shader_in;
2224 idx = var->data.driver_location;
2225 comp = var->data.location_frac;
2226 mode = var->data.mode;
2227
2228 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2229 &const_index, &indir_index);
2230
2231 if (var->data.compact) {
2232 stride = 1;
2233 const_index += comp;
2234 comp = 0;
2235 }
2236 }
2237
2238 if (instr->dest.ssa.bit_size == 64 &&
2239 (deref->mode == nir_var_shader_in ||
2240 deref->mode == nir_var_shader_out ||
2241 deref->mode == nir_var_function_temp))
2242 ve *= 2;
2243
2244 switch (mode) {
2245 case nir_var_shader_in:
2246 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2247 ctx->stage == MESA_SHADER_TESS_EVAL) {
2248 return load_tess_varyings(ctx, instr, true);
2249 }
2250
2251 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2252 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2253 LLVMValueRef indir_index;
2254 unsigned const_index, vertex_index;
2255 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2256 &const_index, &indir_index);
2257 assert(indir_index == NULL);
2258
2259 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2260 var->data.driver_location,
2261 var->data.location_frac,
2262 instr->num_components, vertex_index, const_index, type);
2263 }
2264
2265 for (unsigned chan = comp; chan < ve + comp; chan++) {
2266 if (indir_index) {
2267 unsigned count = glsl_count_attribute_slots(
2268 var->type,
2269 ctx->stage == MESA_SHADER_VERTEX);
2270 count -= chan / 4;
2271 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2272 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2273 stride, false, true);
2274
2275 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2276 tmp_vec,
2277 indir_index, "");
2278 } else
2279 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2280 }
2281 break;
2282 case nir_var_function_temp:
2283 for (unsigned chan = 0; chan < ve; chan++) {
2284 if (indir_index) {
2285 unsigned count = glsl_count_attribute_slots(
2286 var->type, false);
2287 count -= chan / 4;
2288 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2289 &ctx->ac, ctx->locals + idx + chan, count,
2290 stride, true, true);
2291
2292 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2293 tmp_vec,
2294 indir_index, "");
2295 } else {
2296 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2297 }
2298 }
2299 break;
2300 case nir_var_shader_out:
2301 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2302 return load_tess_varyings(ctx, instr, false);
2303 }
2304
2305 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2306 var->data.fb_fetch_output &&
2307 ctx->abi->emit_fbfetch)
2308 return ctx->abi->emit_fbfetch(ctx->abi);
2309
2310 for (unsigned chan = comp; chan < ve + comp; chan++) {
2311 if (indir_index) {
2312 unsigned count = glsl_count_attribute_slots(
2313 var->type, false);
2314 count -= chan / 4;
2315 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2316 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2317 stride, true, true);
2318
2319 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2320 tmp_vec,
2321 indir_index, "");
2322 } else {
2323 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2324 ctx->abi->outputs[idx + chan + const_index * stride],
2325 "");
2326 }
2327 }
2328 break;
2329 case nir_var_mem_global: {
2330 LLVMValueRef address = get_src(ctx, instr->src[0]);
2331 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2332 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2333 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2334 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2335 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2336 bool split_loads = ctx->ac.chip_class == GFX6 &&
2337 elem_size_bytes == 1;
2338
2339 if (stride != natural_stride || split_loads) {
2340 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2341 result_type = LLVMGetElementType(result_type);
2342
2343 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2344 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2345 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2346
2347 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2348 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2349 values[i] = LLVMBuildLoad(ctx->ac.builder,
2350 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2351 }
2352 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2353 } else {
2354 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2355 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2356 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2357 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2358 return val;
2359 }
2360 }
2361 default:
2362 unreachable("unhandle variable mode");
2363 }
2364 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2365 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2366 }
2367
2368 static void
2369 visit_store_var(struct ac_nir_context *ctx,
2370 nir_intrinsic_instr *instr)
2371 {
2372 if (ctx->ac.postponed_kill) {
2373 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2374 ctx->ac.postponed_kill, "");
2375 ac_build_ifcc(&ctx->ac, cond, 7002);
2376 }
2377
2378 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2379 nir_variable *var = nir_deref_instr_get_variable(deref);
2380
2381 LLVMValueRef temp_ptr, value;
2382 int idx = 0;
2383 unsigned comp = 0;
2384 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2385 int writemask = instr->const_index[0];
2386 LLVMValueRef indir_index;
2387 unsigned const_index;
2388
2389 if (var) {
2390 get_deref_offset(ctx, deref, false,
2391 NULL, NULL, &const_index, &indir_index);
2392 idx = var->data.driver_location;
2393 comp = var->data.location_frac;
2394
2395 if (var->data.compact) {
2396 const_index += comp;
2397 comp = 0;
2398 }
2399 }
2400
2401 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2402 (deref->mode == nir_var_shader_out ||
2403 deref->mode == nir_var_function_temp)) {
2404
2405 src = LLVMBuildBitCast(ctx->ac.builder, src,
2406 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2407 "");
2408
2409 writemask = widen_mask(writemask, 2);
2410 }
2411
2412 writemask = writemask << comp;
2413
2414 switch (deref->mode) {
2415 case nir_var_shader_out:
2416
2417 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2418 LLVMValueRef vertex_index = NULL;
2419 LLVMValueRef indir_index = NULL;
2420 unsigned const_index = 0;
2421 const bool is_patch = var->data.patch ||
2422 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2423 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2424
2425 get_deref_offset(ctx, deref, false, NULL,
2426 is_patch ? NULL : &vertex_index,
2427 &const_index, &indir_index);
2428
2429 ctx->abi->store_tcs_outputs(ctx->abi, var,
2430 vertex_index, indir_index,
2431 const_index, src, writemask);
2432 break;
2433 }
2434
2435 for (unsigned chan = 0; chan < 8; chan++) {
2436 int stride = 4;
2437 if (!(writemask & (1 << chan)))
2438 continue;
2439
2440 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2441
2442 if (var->data.compact)
2443 stride = 1;
2444 if (indir_index) {
2445 unsigned count = glsl_count_attribute_slots(
2446 var->type, false);
2447 count -= chan / 4;
2448 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2449 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2450 stride, true, true);
2451
2452 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2453 value, indir_index, "");
2454 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2455 count, stride, tmp_vec);
2456
2457 } else {
2458 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2459
2460 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2461 }
2462 }
2463 break;
2464 case nir_var_function_temp:
2465 for (unsigned chan = 0; chan < 8; chan++) {
2466 if (!(writemask & (1 << chan)))
2467 continue;
2468
2469 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2470 if (indir_index) {
2471 unsigned count = glsl_count_attribute_slots(
2472 var->type, false);
2473 count -= chan / 4;
2474 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2475 &ctx->ac, ctx->locals + idx + chan, count,
2476 4, true, true);
2477
2478 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2479 value, indir_index, "");
2480 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2481 count, 4, tmp_vec);
2482 } else {
2483 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2484
2485 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2486 }
2487 }
2488 break;
2489
2490 case nir_var_mem_global: {
2491 int writemask = instr->const_index[0];
2492 LLVMValueRef address = get_src(ctx, instr->src[0]);
2493 LLVMValueRef val = get_src(ctx, instr->src[1]);
2494
2495 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2496 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2497 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2498 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2499 bool split_stores = ctx->ac.chip_class == GFX6 &&
2500 elem_size_bytes == 1;
2501
2502 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2503 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2504 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2505
2506 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2507 stride == natural_stride && !split_stores) {
2508 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2509 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2510 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2511
2512 val = LLVMBuildBitCast(ctx->ac.builder, val,
2513 LLVMGetElementType(LLVMTypeOf(address)), "");
2514 LLVMBuildStore(ctx->ac.builder, val, address);
2515 } else {
2516 LLVMTypeRef val_type = LLVMTypeOf(val);
2517 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2518 val_type = LLVMGetElementType(val_type);
2519
2520 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2521 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2522 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2523 for (unsigned chan = 0; chan < 4; chan++) {
2524 if (!(writemask & (1 << chan)))
2525 continue;
2526
2527 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2528
2529 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2530 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2531 chan);
2532 src = LLVMBuildBitCast(ctx->ac.builder, src,
2533 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2534 LLVMBuildStore(ctx->ac.builder, src, ptr);
2535 }
2536 }
2537 break;
2538 }
2539 default:
2540 abort();
2541 break;
2542 }
2543
2544 if (ctx->ac.postponed_kill)
2545 ac_build_endif(&ctx->ac, 7002);
2546 }
2547
2548 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2549 {
2550 switch (dim) {
2551 case GLSL_SAMPLER_DIM_BUF:
2552 return 1;
2553 case GLSL_SAMPLER_DIM_1D:
2554 return array ? 2 : 1;
2555 case GLSL_SAMPLER_DIM_2D:
2556 return array ? 3 : 2;
2557 case GLSL_SAMPLER_DIM_MS:
2558 return array ? 4 : 3;
2559 case GLSL_SAMPLER_DIM_3D:
2560 case GLSL_SAMPLER_DIM_CUBE:
2561 return 3;
2562 case GLSL_SAMPLER_DIM_RECT:
2563 case GLSL_SAMPLER_DIM_SUBPASS:
2564 return 2;
2565 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2566 return 3;
2567 default:
2568 break;
2569 }
2570 return 0;
2571 }
2572
2573 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2574 LLVMValueRef coord_x, LLVMValueRef coord_y,
2575 LLVMValueRef coord_z,
2576 LLVMValueRef sample_index,
2577 LLVMValueRef fmask_desc_ptr)
2578 {
2579 unsigned sample_chan = coord_z ? 3 : 2;
2580 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2581 addr[sample_chan] = sample_index;
2582
2583 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2584 return addr[sample_chan];
2585 }
2586
2587 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2588 {
2589 assert(instr->src[0].is_ssa);
2590 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2591 }
2592
2593 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2594 const nir_intrinsic_instr *instr,
2595 LLVMValueRef dynamic_index,
2596 enum ac_descriptor_type desc_type,
2597 bool write)
2598 {
2599 nir_deref_instr *deref_instr =
2600 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2601 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2602
2603 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2604 }
2605
2606 static void get_image_coords(struct ac_nir_context *ctx,
2607 const nir_intrinsic_instr *instr,
2608 LLVMValueRef dynamic_desc_index,
2609 struct ac_image_args *args,
2610 enum glsl_sampler_dim dim,
2611 bool is_array)
2612 {
2613 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2614 LLVMValueRef masks[] = {
2615 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2616 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2617 };
2618 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2619
2620 int count;
2621 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2622 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2623 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2624 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2625 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2626 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2627 count = image_type_to_components_count(dim, is_array);
2628
2629 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2630 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2631 LLVMValueRef fmask_load_address[3];
2632
2633 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2634 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2635 if (is_array)
2636 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2637 else
2638 fmask_load_address[2] = NULL;
2639
2640 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2641 fmask_load_address[0],
2642 fmask_load_address[1],
2643 fmask_load_address[2],
2644 sample_index,
2645 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2646 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2647 }
2648 if (count == 1 && !gfx9_1d) {
2649 if (instr->src[1].ssa->num_components)
2650 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2651 else
2652 args->coords[0] = src0;
2653 } else {
2654 int chan;
2655 if (is_ms)
2656 count--;
2657 for (chan = 0; chan < count; ++chan) {
2658 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2659 }
2660
2661 if (gfx9_1d) {
2662 if (is_array) {
2663 args->coords[2] = args->coords[1];
2664 args->coords[1] = ctx->ac.i32_0;
2665 } else
2666 args->coords[1] = ctx->ac.i32_0;
2667 count++;
2668 }
2669 if (ctx->ac.chip_class == GFX9 &&
2670 dim == GLSL_SAMPLER_DIM_2D &&
2671 !is_array) {
2672 /* The hw can't bind a slice of a 3D image as a 2D
2673 * image, because it ignores BASE_ARRAY if the target
2674 * is 3D. The workaround is to read BASE_ARRAY and set
2675 * it as the 3rd address operand for all 2D images.
2676 */
2677 LLVMValueRef first_layer, const5, mask;
2678
2679 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2680 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2681 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2682 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2683
2684 args->coords[count] = first_layer;
2685 count++;
2686 }
2687
2688
2689 if (is_ms) {
2690 args->coords[count] = sample_index;
2691 count++;
2692 }
2693 }
2694 }
2695
2696 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2697 const nir_intrinsic_instr *instr,
2698 LLVMValueRef dynamic_index,
2699 bool write, bool atomic)
2700 {
2701 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2702 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2703 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2704 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2705 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2706
2707 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2708 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2709 elem_count, stride, "");
2710
2711 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2712 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2713 }
2714 return rsrc;
2715 }
2716
2717 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2718 struct waterfall_context *wctx,
2719 const nir_intrinsic_instr *instr)
2720 {
2721 nir_deref_instr *deref_instr = NULL;
2722
2723 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2724 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2725
2726 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2727 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2728 }
2729
2730 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2731 const nir_intrinsic_instr *instr,
2732 bool bindless)
2733 {
2734 LLVMValueRef res;
2735
2736 enum glsl_sampler_dim dim;
2737 enum gl_access_qualifier access;
2738 bool is_array;
2739 if (bindless) {
2740 dim = nir_intrinsic_image_dim(instr);
2741 access = nir_intrinsic_access(instr);
2742 is_array = nir_intrinsic_image_array(instr);
2743 } else {
2744 const nir_deref_instr *image_deref = get_image_deref(instr);
2745 const struct glsl_type *type = image_deref->type;
2746 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2747 dim = glsl_get_sampler_dim(type);
2748 access = var->data.access;
2749 is_array = glsl_sampler_type_is_array(type);
2750 }
2751
2752 struct waterfall_context wctx;
2753 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2754
2755 struct ac_image_args args = {};
2756
2757 args.cache_policy = get_cache_policy(ctx, access, false, false);
2758
2759 if (dim == GLSL_SAMPLER_DIM_BUF) {
2760 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2761 unsigned num_channels = util_last_bit(mask);
2762 LLVMValueRef rsrc, vindex;
2763
2764 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2765 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2766 ctx->ac.i32_0, "");
2767
2768 bool can_speculate = access & ACCESS_CAN_REORDER;
2769 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2770 ctx->ac.i32_0, num_channels,
2771 args.cache_policy,
2772 can_speculate);
2773 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2774
2775 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2776 res = ac_to_integer(&ctx->ac, res);
2777 } else {
2778 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2779
2780 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2781 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2782 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2783 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2784 if (!level_zero)
2785 args.lod = get_src(ctx, instr->src[3]);
2786 args.dmask = 15;
2787 args.attributes = AC_FUNC_ATTR_READONLY;
2788
2789 res = ac_build_image_opcode(&ctx->ac, &args);
2790 }
2791 return exit_waterfall(ctx, &wctx, res);
2792 }
2793
2794 static void visit_image_store(struct ac_nir_context *ctx,
2795 const nir_intrinsic_instr *instr,
2796 bool bindless)
2797 {
2798 if (ctx->ac.postponed_kill) {
2799 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2800 ctx->ac.postponed_kill, "");
2801 ac_build_ifcc(&ctx->ac, cond, 7003);
2802 }
2803
2804 enum glsl_sampler_dim dim;
2805 enum gl_access_qualifier access;
2806 bool is_array;
2807
2808 if (bindless) {
2809 dim = nir_intrinsic_image_dim(instr);
2810 access = nir_intrinsic_access(instr);
2811 is_array = nir_intrinsic_image_array(instr);
2812 } else {
2813 const nir_deref_instr *image_deref = get_image_deref(instr);
2814 const struct glsl_type *type = image_deref->type;
2815 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2816 dim = glsl_get_sampler_dim(type);
2817 access = var->data.access;
2818 is_array = glsl_sampler_type_is_array(type);
2819 }
2820
2821 struct waterfall_context wctx;
2822 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2823
2824 bool writeonly_memory = access & ACCESS_NON_READABLE;
2825 struct ac_image_args args = {};
2826
2827 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2828
2829 if (dim == GLSL_SAMPLER_DIM_BUF) {
2830 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2831 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2832 unsigned src_channels = ac_get_llvm_num_components(src);
2833 LLVMValueRef vindex;
2834
2835 if (src_channels == 3)
2836 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2837
2838 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2839 get_src(ctx, instr->src[1]),
2840 ctx->ac.i32_0, "");
2841
2842 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2843 ctx->ac.i32_0, src_channels,
2844 args.cache_policy);
2845 } else {
2846 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2847
2848 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2849 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2850 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2851 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2852 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2853 if (!level_zero)
2854 args.lod = get_src(ctx, instr->src[4]);
2855 args.dmask = 15;
2856
2857 ac_build_image_opcode(&ctx->ac, &args);
2858 }
2859
2860 exit_waterfall(ctx, &wctx, NULL);
2861 if (ctx->ac.postponed_kill)
2862 ac_build_endif(&ctx->ac, 7003);
2863 }
2864
2865 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2866 const nir_intrinsic_instr *instr,
2867 bool bindless)
2868 {
2869 if (ctx->ac.postponed_kill) {
2870 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2871 ctx->ac.postponed_kill, "");
2872 ac_build_ifcc(&ctx->ac, cond, 7004);
2873 }
2874
2875 LLVMValueRef params[7];
2876 int param_count = 0;
2877
2878 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2879 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2880 const char *atomic_name;
2881 char intrinsic_name[64];
2882 enum ac_atomic_op atomic_subop;
2883 ASSERTED int length;
2884
2885 enum glsl_sampler_dim dim;
2886 bool is_array;
2887 if (bindless) {
2888 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2889 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2890 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2891 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2892 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2893 assert(format == GL_R32UI || format == GL_R32I);
2894 }
2895 dim = nir_intrinsic_image_dim(instr);
2896 is_array = nir_intrinsic_image_array(instr);
2897 } else {
2898 const struct glsl_type *type = get_image_deref(instr)->type;
2899 dim = glsl_get_sampler_dim(type);
2900 is_array = glsl_sampler_type_is_array(type);
2901 }
2902
2903 struct waterfall_context wctx;
2904 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2905
2906 switch (instr->intrinsic) {
2907 case nir_intrinsic_bindless_image_atomic_add:
2908 case nir_intrinsic_image_deref_atomic_add:
2909 atomic_name = "add";
2910 atomic_subop = ac_atomic_add;
2911 break;
2912 case nir_intrinsic_bindless_image_atomic_imin:
2913 case nir_intrinsic_image_deref_atomic_imin:
2914 atomic_name = "smin";
2915 atomic_subop = ac_atomic_smin;
2916 break;
2917 case nir_intrinsic_bindless_image_atomic_umin:
2918 case nir_intrinsic_image_deref_atomic_umin:
2919 atomic_name = "umin";
2920 atomic_subop = ac_atomic_umin;
2921 break;
2922 case nir_intrinsic_bindless_image_atomic_imax:
2923 case nir_intrinsic_image_deref_atomic_imax:
2924 atomic_name = "smax";
2925 atomic_subop = ac_atomic_smax;
2926 break;
2927 case nir_intrinsic_bindless_image_atomic_umax:
2928 case nir_intrinsic_image_deref_atomic_umax:
2929 atomic_name = "umax";
2930 atomic_subop = ac_atomic_umax;
2931 break;
2932 case nir_intrinsic_bindless_image_atomic_and:
2933 case nir_intrinsic_image_deref_atomic_and:
2934 atomic_name = "and";
2935 atomic_subop = ac_atomic_and;
2936 break;
2937 case nir_intrinsic_bindless_image_atomic_or:
2938 case nir_intrinsic_image_deref_atomic_or:
2939 atomic_name = "or";
2940 atomic_subop = ac_atomic_or;
2941 break;
2942 case nir_intrinsic_bindless_image_atomic_xor:
2943 case nir_intrinsic_image_deref_atomic_xor:
2944 atomic_name = "xor";
2945 atomic_subop = ac_atomic_xor;
2946 break;
2947 case nir_intrinsic_bindless_image_atomic_exchange:
2948 case nir_intrinsic_image_deref_atomic_exchange:
2949 atomic_name = "swap";
2950 atomic_subop = ac_atomic_swap;
2951 break;
2952 case nir_intrinsic_bindless_image_atomic_comp_swap:
2953 case nir_intrinsic_image_deref_atomic_comp_swap:
2954 atomic_name = "cmpswap";
2955 atomic_subop = 0; /* not used */
2956 break;
2957 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2958 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2959 atomic_name = "inc";
2960 atomic_subop = ac_atomic_inc_wrap;
2961 /* ATOMIC_INC instruction does:
2962 * value = (value + 1) % (data + 1)
2963 * but we want:
2964 * value = (value + 1) % data
2965 * So replace 'data' by 'data - 1'.
2966 */
2967 ctx->ssa_defs[instr->src[3].ssa->index] =
2968 LLVMBuildSub(ctx->ac.builder,
2969 ctx->ssa_defs[instr->src[3].ssa->index],
2970 ctx->ac.i32_1, "");
2971 break;
2972 }
2973 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2974 case nir_intrinsic_image_deref_atomic_dec_wrap:
2975 atomic_name = "dec";
2976 atomic_subop = ac_atomic_dec_wrap;
2977 break;
2978 default:
2979 abort();
2980 }
2981
2982 if (cmpswap)
2983 params[param_count++] = get_src(ctx, instr->src[4]);
2984 params[param_count++] = get_src(ctx, instr->src[3]);
2985
2986 LLVMValueRef result;
2987 if (dim == GLSL_SAMPLER_DIM_BUF) {
2988 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
2989 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2990 ctx->ac.i32_0, ""); /* vindex */
2991 params[param_count++] = ctx->ac.i32_0; /* voffset */
2992 if (LLVM_VERSION_MAJOR >= 9) {
2993 /* XXX: The new raw/struct atomic intrinsics are buggy
2994 * with LLVM 8, see r358579.
2995 */
2996 params[param_count++] = ctx->ac.i32_0; /* soffset */
2997 params[param_count++] = ctx->ac.i32_0; /* slc */
2998
2999 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3000 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3001 } else {
3002 params[param_count++] = ctx->ac.i1false; /* slc */
3003
3004 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3005 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3006 }
3007
3008 assert(length < sizeof(intrinsic_name));
3009 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3010 params, param_count, 0);
3011 } else {
3012 struct ac_image_args args = {};
3013 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3014 args.atomic = atomic_subop;
3015 args.data[0] = params[0];
3016 if (cmpswap)
3017 args.data[1] = params[1];
3018 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3019 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3020 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3021
3022 result = ac_build_image_opcode(&ctx->ac, &args);
3023 }
3024
3025 result = exit_waterfall(ctx, &wctx, result);
3026 if (ctx->ac.postponed_kill)
3027 ac_build_endif(&ctx->ac, 7004);
3028 return result;
3029 }
3030
3031 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3032 nir_intrinsic_instr *instr)
3033 {
3034 struct waterfall_context wctx;
3035 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3036 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3037
3038 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3039
3040 return exit_waterfall(ctx, &wctx, ret);
3041 }
3042
3043 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3044 const nir_intrinsic_instr *instr,
3045 bool bindless)
3046 {
3047 LLVMValueRef res;
3048
3049 enum glsl_sampler_dim dim;
3050 bool is_array;
3051 if (bindless) {
3052 dim = nir_intrinsic_image_dim(instr);
3053 is_array = nir_intrinsic_image_array(instr);
3054 } else {
3055 const struct glsl_type *type = get_image_deref(instr)->type;
3056 dim = glsl_get_sampler_dim(type);
3057 is_array = glsl_sampler_type_is_array(type);
3058 }
3059
3060 struct waterfall_context wctx;
3061 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3062
3063 if (dim == GLSL_SAMPLER_DIM_BUF) {
3064 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3065 } else {
3066
3067 struct ac_image_args args = { 0 };
3068
3069 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3070 args.dmask = 0xf;
3071 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3072 args.opcode = ac_image_get_resinfo;
3073 args.lod = ctx->ac.i32_0;
3074 args.attributes = AC_FUNC_ATTR_READNONE;
3075
3076 res = ac_build_image_opcode(&ctx->ac, &args);
3077
3078 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3079
3080 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3081 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3082 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3083 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3084 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3085 }
3086
3087 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3088 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3089 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3090 ctx->ac.i32_1, "");
3091 }
3092 }
3093 return exit_waterfall(ctx, &wctx, res);
3094 }
3095
3096 static void emit_membar(struct ac_llvm_context *ac,
3097 const nir_intrinsic_instr *instr)
3098 {
3099 unsigned wait_flags = 0;
3100
3101 switch (instr->intrinsic) {
3102 case nir_intrinsic_memory_barrier:
3103 case nir_intrinsic_group_memory_barrier:
3104 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3105 break;
3106 case nir_intrinsic_memory_barrier_buffer:
3107 case nir_intrinsic_memory_barrier_image:
3108 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3109 break;
3110 case nir_intrinsic_memory_barrier_shared:
3111 wait_flags = AC_WAIT_LGKM;
3112 break;
3113 default:
3114 break;
3115 }
3116
3117 ac_build_waitcnt(ac, wait_flags);
3118 }
3119
3120 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3121 {
3122 /* GFX6 only (thanks to a hw bug workaround):
3123 * The real barrier instruction isn’t needed, because an entire patch
3124 * always fits into a single wave.
3125 */
3126 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3127 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3128 return;
3129 }
3130 ac_build_s_barrier(ac);
3131 }
3132
3133 static void emit_discard(struct ac_nir_context *ctx,
3134 const nir_intrinsic_instr *instr)
3135 {
3136 LLVMValueRef cond;
3137
3138 if (instr->intrinsic == nir_intrinsic_discard_if) {
3139 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3140 get_src(ctx, instr->src[0]),
3141 ctx->ac.i32_0, "");
3142 } else {
3143 assert(instr->intrinsic == nir_intrinsic_discard);
3144 cond = ctx->ac.i1false;
3145 }
3146
3147 ac_build_kill_if_false(&ctx->ac, cond);
3148 }
3149
3150 static void emit_demote(struct ac_nir_context *ctx,
3151 const nir_intrinsic_instr *instr)
3152 {
3153 LLVMValueRef cond;
3154
3155 if (instr->intrinsic == nir_intrinsic_demote_if) {
3156 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3157 get_src(ctx, instr->src[0]),
3158 ctx->ac.i32_0, "");
3159 } else {
3160 assert(instr->intrinsic == nir_intrinsic_demote);
3161 cond = ctx->ac.i1false;
3162 }
3163
3164 /* Kill immediately while maintaining WQM. */
3165 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3166
3167 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3168 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3169 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3170 return;
3171 }
3172
3173 static LLVMValueRef
3174 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3175 {
3176 LLVMValueRef result;
3177 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3178 result = LLVMBuildAnd(ctx->ac.builder,
3179 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3180 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3181
3182 if (ctx->ac.wave_size == 32)
3183 result = LLVMBuildLShr(ctx->ac.builder, result,
3184 LLVMConstInt(ctx->ac.i32, 1, false), "");
3185
3186 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3187 }
3188
3189 static LLVMValueRef
3190 visit_load_subgroup_id(struct ac_nir_context *ctx)
3191 {
3192 if (ctx->stage == MESA_SHADER_COMPUTE) {
3193 LLVMValueRef result;
3194 result = LLVMBuildAnd(ctx->ac.builder,
3195 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3196 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3197 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3198 } else {
3199 return LLVMConstInt(ctx->ac.i32, 0, false);
3200 }
3201 }
3202
3203 static LLVMValueRef
3204 visit_load_num_subgroups(struct ac_nir_context *ctx)
3205 {
3206 if (ctx->stage == MESA_SHADER_COMPUTE) {
3207 return LLVMBuildAnd(ctx->ac.builder,
3208 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3209 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3210 } else {
3211 return LLVMConstInt(ctx->ac.i32, 1, false);
3212 }
3213 }
3214
3215 static LLVMValueRef
3216 visit_first_invocation(struct ac_nir_context *ctx)
3217 {
3218 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3219 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3220
3221 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3222 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3223 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3224 ctx->ac.iN_wavemask, args, 2,
3225 AC_FUNC_ATTR_NOUNWIND |
3226 AC_FUNC_ATTR_READNONE);
3227
3228 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3229 }
3230
3231 static LLVMValueRef
3232 visit_load_shared(struct ac_nir_context *ctx,
3233 const nir_intrinsic_instr *instr)
3234 {
3235 LLVMValueRef values[4], derived_ptr, index, ret;
3236
3237 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3238 instr->dest.ssa.bit_size);
3239
3240 for (int chan = 0; chan < instr->num_components; chan++) {
3241 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3242 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3243 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3244 }
3245
3246 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3247 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3248 }
3249
3250 static void
3251 visit_store_shared(struct ac_nir_context *ctx,
3252 const nir_intrinsic_instr *instr)
3253 {
3254 LLVMValueRef derived_ptr, data,index;
3255 LLVMBuilderRef builder = ctx->ac.builder;
3256
3257 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3258 instr->src[0].ssa->bit_size);
3259 LLVMValueRef src = get_src(ctx, instr->src[0]);
3260
3261 int writemask = nir_intrinsic_write_mask(instr);
3262 for (int chan = 0; chan < 4; chan++) {
3263 if (!(writemask & (1 << chan))) {
3264 continue;
3265 }
3266 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3267 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3268 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3269 LLVMBuildStore(builder, data, derived_ptr);
3270 }
3271 }
3272
3273 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3274 const nir_intrinsic_instr *instr,
3275 LLVMValueRef ptr, int src_idx)
3276 {
3277 if (ctx->ac.postponed_kill) {
3278 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3279 ctx->ac.postponed_kill, "");
3280 ac_build_ifcc(&ctx->ac, cond, 7005);
3281 }
3282
3283 LLVMValueRef result;
3284 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3285
3286 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3287
3288 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3289 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3290 if (deref->mode == nir_var_mem_global) {
3291 /* use "singlethread" sync scope to implement relaxed ordering */
3292 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3293
3294 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3295 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3296 }
3297 }
3298
3299 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3300 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3301 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3302 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3303 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3304 } else {
3305 LLVMAtomicRMWBinOp op;
3306 switch (instr->intrinsic) {
3307 case nir_intrinsic_shared_atomic_add:
3308 case nir_intrinsic_deref_atomic_add:
3309 op = LLVMAtomicRMWBinOpAdd;
3310 break;
3311 case nir_intrinsic_shared_atomic_umin:
3312 case nir_intrinsic_deref_atomic_umin:
3313 op = LLVMAtomicRMWBinOpUMin;
3314 break;
3315 case nir_intrinsic_shared_atomic_umax:
3316 case nir_intrinsic_deref_atomic_umax:
3317 op = LLVMAtomicRMWBinOpUMax;
3318 break;
3319 case nir_intrinsic_shared_atomic_imin:
3320 case nir_intrinsic_deref_atomic_imin:
3321 op = LLVMAtomicRMWBinOpMin;
3322 break;
3323 case nir_intrinsic_shared_atomic_imax:
3324 case nir_intrinsic_deref_atomic_imax:
3325 op = LLVMAtomicRMWBinOpMax;
3326 break;
3327 case nir_intrinsic_shared_atomic_and:
3328 case nir_intrinsic_deref_atomic_and:
3329 op = LLVMAtomicRMWBinOpAnd;
3330 break;
3331 case nir_intrinsic_shared_atomic_or:
3332 case nir_intrinsic_deref_atomic_or:
3333 op = LLVMAtomicRMWBinOpOr;
3334 break;
3335 case nir_intrinsic_shared_atomic_xor:
3336 case nir_intrinsic_deref_atomic_xor:
3337 op = LLVMAtomicRMWBinOpXor;
3338 break;
3339 case nir_intrinsic_shared_atomic_exchange:
3340 case nir_intrinsic_deref_atomic_exchange:
3341 op = LLVMAtomicRMWBinOpXchg;
3342 break;
3343 default:
3344 return NULL;
3345 }
3346
3347 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3348 }
3349
3350 if (ctx->ac.postponed_kill)
3351 ac_build_endif(&ctx->ac, 7005);
3352 return result;
3353 }
3354
3355 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3356 {
3357 LLVMValueRef values[2];
3358 LLVMValueRef pos[2];
3359
3360 pos[0] = ac_to_float(&ctx->ac,
3361 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3362 pos[1] = ac_to_float(&ctx->ac,
3363 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3364
3365 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3366 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3367 return ac_build_gather_values(&ctx->ac, values, 2);
3368 }
3369
3370 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3371 enum glsl_interp_mode interp, unsigned location)
3372 {
3373 switch (interp) {
3374 case INTERP_MODE_FLAT:
3375 default:
3376 return NULL;
3377 case INTERP_MODE_SMOOTH:
3378 case INTERP_MODE_NONE:
3379 if (location == INTERP_CENTER)
3380 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3381 else if (location == INTERP_CENTROID)
3382 return ctx->abi->persp_centroid;
3383 else if (location == INTERP_SAMPLE)
3384 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3385 break;
3386 case INTERP_MODE_NOPERSPECTIVE:
3387 if (location == INTERP_CENTER)
3388 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3389 else if (location == INTERP_CENTROID)
3390 return ctx->abi->linear_centroid;
3391 else if (location == INTERP_SAMPLE)
3392 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3393 break;
3394 }
3395 return NULL;
3396 }
3397
3398 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3399 unsigned mode)
3400 {
3401 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3402 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3403 }
3404
3405 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3406 unsigned mode,
3407 LLVMValueRef offset)
3408 {
3409 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3410 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3411 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3412
3413 LLVMValueRef ij_out[2];
3414 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3415
3416 /*
3417 * take the I then J parameters, and the DDX/Y for it, and
3418 * calculate the IJ inputs for the interpolator.
3419 * temp1 = ddx * offset/sample.x + I;
3420 * interp_param.I = ddy * offset/sample.y + temp1;
3421 * temp1 = ddx * offset/sample.x + J;
3422 * interp_param.J = ddy * offset/sample.y + temp1;
3423 */
3424 for (unsigned i = 0; i < 2; i++) {
3425 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3426 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3427 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3428 ddxy_out, ix_ll, "");
3429 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3430 ddxy_out, iy_ll, "");
3431 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3432 interp_param, ix_ll, "");
3433 LLVMValueRef temp1, temp2;
3434
3435 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3436 ctx->ac.f32, "");
3437
3438 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3439 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3440
3441 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3442 temp2, ctx->ac.i32, "");
3443 }
3444 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3445 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3446 }
3447
3448 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3449 unsigned mode)
3450 {
3451 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3452 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3453 }
3454
3455 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3456 unsigned mode,
3457 LLVMValueRef sample_id)
3458 {
3459 if (ctx->abi->interp_at_sample_force_center)
3460 return barycentric_center(ctx, mode);
3461
3462 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3463
3464 /* fetch sample ID */
3465 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3466
3467 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3468 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3469 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3470 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3471 LLVMValueRef coords[] = { src_c0, src_c1 };
3472 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3473
3474 return barycentric_offset(ctx, mode, offset);
3475 }
3476
3477
3478 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3479 unsigned mode)
3480 {
3481 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3482 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3483 }
3484
3485 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3486 {
3487 return LLVMBuildBitCast(ctx->ac.builder,
3488 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3489 ctx->ac.v3i32, "");
3490 }
3491
3492 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3493 LLVMValueRef interp_param,
3494 unsigned index, unsigned comp_start,
3495 unsigned num_components,
3496 unsigned bitsize)
3497 {
3498 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3499
3500 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3501 interp_param, ctx->ac.v2f32, "");
3502 LLVMValueRef i = LLVMBuildExtractElement(
3503 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3504 LLVMValueRef j = LLVMBuildExtractElement(
3505 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3506
3507 LLVMValueRef values[4];
3508 assert(bitsize == 16 || bitsize == 32);
3509 for (unsigned comp = 0; comp < num_components; comp++) {
3510 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3511 if (bitsize == 16) {
3512 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3513 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3514 } else {
3515 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3516 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3517 }
3518 }
3519
3520 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3521 }
3522
3523 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3524 nir_intrinsic_instr *instr)
3525 {
3526 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3527
3528 /* We only lower inputs for fragment shaders ATM */
3529 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3530 assert(offset);
3531 assert(offset[0].i32 == 0);
3532
3533 unsigned component = nir_intrinsic_component(instr);
3534 unsigned index = nir_intrinsic_base(instr);
3535 unsigned vertex_id = 2; /* P0 */
3536
3537 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3538 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3539
3540 switch (src0[0].i32) {
3541 case 0:
3542 vertex_id = 2;
3543 break;
3544 case 1:
3545 vertex_id = 0;
3546 break;
3547 case 2:
3548 vertex_id = 1;
3549 break;
3550 default:
3551 unreachable("Invalid vertex index");
3552 }
3553 }
3554
3555 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3556 LLVMValueRef values[8];
3557
3558 /* Each component of a 64-bit value takes up two GL-level channels. */
3559 unsigned num_components = instr->dest.ssa.num_components;
3560 unsigned bit_size = instr->dest.ssa.bit_size;
3561 unsigned channels =
3562 bit_size == 64 ? num_components * 2 : num_components;
3563
3564 for (unsigned chan = 0; chan < channels; chan++) {
3565 if (component + chan > 4)
3566 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3567 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3568 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3569 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3570 llvm_chan,
3571 attr_number,
3572 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3573 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3574 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3575 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3576 }
3577
3578 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3579 if (bit_size == 64) {
3580 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3581 LLVMVectorType(ctx->ac.i64, num_components);
3582 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3583 }
3584 return result;
3585 }
3586
3587 static void visit_intrinsic(struct ac_nir_context *ctx,
3588 nir_intrinsic_instr *instr)
3589 {
3590 LLVMValueRef result = NULL;
3591
3592 switch (instr->intrinsic) {
3593 case nir_intrinsic_ballot:
3594 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3595 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3596 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3597 break;
3598 case nir_intrinsic_read_invocation:
3599 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3600 get_src(ctx, instr->src[1]));
3601 break;
3602 case nir_intrinsic_read_first_invocation:
3603 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3604 break;
3605 case nir_intrinsic_load_subgroup_invocation:
3606 result = ac_get_thread_id(&ctx->ac);
3607 break;
3608 case nir_intrinsic_load_work_group_id: {
3609 LLVMValueRef values[3];
3610
3611 for (int i = 0; i < 3; i++) {
3612 values[i] = ctx->args->workgroup_ids[i].used ?
3613 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3614 }
3615
3616 result = ac_build_gather_values(&ctx->ac, values, 3);
3617 break;
3618 }
3619 case nir_intrinsic_load_base_vertex:
3620 case nir_intrinsic_load_first_vertex:
3621 result = ctx->abi->load_base_vertex(ctx->abi);
3622 break;
3623 case nir_intrinsic_load_local_group_size:
3624 result = ctx->abi->load_local_group_size(ctx->abi);
3625 break;
3626 case nir_intrinsic_load_vertex_id:
3627 result = LLVMBuildAdd(ctx->ac.builder,
3628 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3629 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3630 break;
3631 case nir_intrinsic_load_vertex_id_zero_base: {
3632 result = ctx->abi->vertex_id;
3633 break;
3634 }
3635 case nir_intrinsic_load_local_invocation_id: {
3636 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3637 break;
3638 }
3639 case nir_intrinsic_load_base_instance:
3640 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3641 break;
3642 case nir_intrinsic_load_draw_id:
3643 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3644 break;
3645 case nir_intrinsic_load_view_index:
3646 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3647 break;
3648 case nir_intrinsic_load_invocation_id:
3649 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3650 result = ac_unpack_param(&ctx->ac,
3651 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3652 8, 5);
3653 } else {
3654 if (ctx->ac.chip_class >= GFX10) {
3655 result = LLVMBuildAnd(ctx->ac.builder,
3656 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3657 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3658 } else {
3659 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3660 }
3661 }
3662 break;
3663 case nir_intrinsic_load_primitive_id:
3664 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3665 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3666 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3667 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3668 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3669 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3670 } else
3671 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3672 break;
3673 case nir_intrinsic_load_sample_id:
3674 result = ac_unpack_param(&ctx->ac,
3675 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3676 8, 4);
3677 break;
3678 case nir_intrinsic_load_sample_pos:
3679 result = load_sample_pos(ctx);
3680 break;
3681 case nir_intrinsic_load_sample_mask_in:
3682 result = ctx->abi->load_sample_mask_in(ctx->abi);
3683 break;
3684 case nir_intrinsic_load_frag_coord: {
3685 LLVMValueRef values[4] = {
3686 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3687 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3688 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3689 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3690 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3691 };
3692 result = ac_to_integer(&ctx->ac,
3693 ac_build_gather_values(&ctx->ac, values, 4));
3694 break;
3695 }
3696 case nir_intrinsic_load_layer_id:
3697 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3698 break;
3699 case nir_intrinsic_load_front_face:
3700 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3701 break;
3702 case nir_intrinsic_load_helper_invocation:
3703 result = ac_build_load_helper_invocation(&ctx->ac);
3704 break;
3705 case nir_intrinsic_is_helper_invocation:
3706 result = ac_build_is_helper_invocation(&ctx->ac);
3707 break;
3708 case nir_intrinsic_load_color0:
3709 result = ctx->abi->color0;
3710 break;
3711 case nir_intrinsic_load_color1:
3712 result = ctx->abi->color1;
3713 break;
3714 case nir_intrinsic_load_user_data_amd:
3715 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3716 result = ctx->abi->user_data;
3717 break;
3718 case nir_intrinsic_load_instance_id:
3719 result = ctx->abi->instance_id;
3720 break;
3721 case nir_intrinsic_load_num_work_groups:
3722 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3723 break;
3724 case nir_intrinsic_load_local_invocation_index:
3725 result = visit_load_local_invocation_index(ctx);
3726 break;
3727 case nir_intrinsic_load_subgroup_id:
3728 result = visit_load_subgroup_id(ctx);
3729 break;
3730 case nir_intrinsic_load_num_subgroups:
3731 result = visit_load_num_subgroups(ctx);
3732 break;
3733 case nir_intrinsic_first_invocation:
3734 result = visit_first_invocation(ctx);
3735 break;
3736 case nir_intrinsic_load_push_constant:
3737 result = visit_load_push_constant(ctx, instr);
3738 break;
3739 case nir_intrinsic_vulkan_resource_index: {
3740 LLVMValueRef index = get_src(ctx, instr->src[0]);
3741 unsigned desc_set = nir_intrinsic_desc_set(instr);
3742 unsigned binding = nir_intrinsic_binding(instr);
3743
3744 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3745 binding);
3746 break;
3747 }
3748 case nir_intrinsic_vulkan_resource_reindex:
3749 result = visit_vulkan_resource_reindex(ctx, instr);
3750 break;
3751 case nir_intrinsic_store_ssbo:
3752 visit_store_ssbo(ctx, instr);
3753 break;
3754 case nir_intrinsic_load_ssbo:
3755 result = visit_load_buffer(ctx, instr);
3756 break;
3757 case nir_intrinsic_ssbo_atomic_add:
3758 case nir_intrinsic_ssbo_atomic_imin:
3759 case nir_intrinsic_ssbo_atomic_umin:
3760 case nir_intrinsic_ssbo_atomic_imax:
3761 case nir_intrinsic_ssbo_atomic_umax:
3762 case nir_intrinsic_ssbo_atomic_and:
3763 case nir_intrinsic_ssbo_atomic_or:
3764 case nir_intrinsic_ssbo_atomic_xor:
3765 case nir_intrinsic_ssbo_atomic_exchange:
3766 case nir_intrinsic_ssbo_atomic_comp_swap:
3767 result = visit_atomic_ssbo(ctx, instr);
3768 break;
3769 case nir_intrinsic_load_ubo:
3770 result = visit_load_ubo_buffer(ctx, instr);
3771 break;
3772 case nir_intrinsic_get_buffer_size:
3773 result = visit_get_buffer_size(ctx, instr);
3774 break;
3775 case nir_intrinsic_load_deref:
3776 result = visit_load_var(ctx, instr);
3777 break;
3778 case nir_intrinsic_store_deref:
3779 visit_store_var(ctx, instr);
3780 break;
3781 case nir_intrinsic_load_shared:
3782 result = visit_load_shared(ctx, instr);
3783 break;
3784 case nir_intrinsic_store_shared:
3785 visit_store_shared(ctx, instr);
3786 break;
3787 case nir_intrinsic_bindless_image_samples:
3788 case nir_intrinsic_image_deref_samples:
3789 result = visit_image_samples(ctx, instr);
3790 break;
3791 case nir_intrinsic_bindless_image_load:
3792 result = visit_image_load(ctx, instr, true);
3793 break;
3794 case nir_intrinsic_image_deref_load:
3795 result = visit_image_load(ctx, instr, false);
3796 break;
3797 case nir_intrinsic_bindless_image_store:
3798 visit_image_store(ctx, instr, true);
3799 break;
3800 case nir_intrinsic_image_deref_store:
3801 visit_image_store(ctx, instr, false);
3802 break;
3803 case nir_intrinsic_bindless_image_atomic_add:
3804 case nir_intrinsic_bindless_image_atomic_imin:
3805 case nir_intrinsic_bindless_image_atomic_umin:
3806 case nir_intrinsic_bindless_image_atomic_imax:
3807 case nir_intrinsic_bindless_image_atomic_umax:
3808 case nir_intrinsic_bindless_image_atomic_and:
3809 case nir_intrinsic_bindless_image_atomic_or:
3810 case nir_intrinsic_bindless_image_atomic_xor:
3811 case nir_intrinsic_bindless_image_atomic_exchange:
3812 case nir_intrinsic_bindless_image_atomic_comp_swap:
3813 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3814 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3815 result = visit_image_atomic(ctx, instr, true);
3816 break;
3817 case nir_intrinsic_image_deref_atomic_add:
3818 case nir_intrinsic_image_deref_atomic_imin:
3819 case nir_intrinsic_image_deref_atomic_umin:
3820 case nir_intrinsic_image_deref_atomic_imax:
3821 case nir_intrinsic_image_deref_atomic_umax:
3822 case nir_intrinsic_image_deref_atomic_and:
3823 case nir_intrinsic_image_deref_atomic_or:
3824 case nir_intrinsic_image_deref_atomic_xor:
3825 case nir_intrinsic_image_deref_atomic_exchange:
3826 case nir_intrinsic_image_deref_atomic_comp_swap:
3827 case nir_intrinsic_image_deref_atomic_inc_wrap:
3828 case nir_intrinsic_image_deref_atomic_dec_wrap:
3829 result = visit_image_atomic(ctx, instr, false);
3830 break;
3831 case nir_intrinsic_bindless_image_size:
3832 result = visit_image_size(ctx, instr, true);
3833 break;
3834 case nir_intrinsic_image_deref_size:
3835 result = visit_image_size(ctx, instr, false);
3836 break;
3837 case nir_intrinsic_shader_clock:
3838 result = ac_build_shader_clock(&ctx->ac);
3839 break;
3840 case nir_intrinsic_discard:
3841 case nir_intrinsic_discard_if:
3842 emit_discard(ctx, instr);
3843 break;
3844 case nir_intrinsic_demote:
3845 case nir_intrinsic_demote_if:
3846 emit_demote(ctx, instr);
3847 break;
3848 case nir_intrinsic_memory_barrier:
3849 case nir_intrinsic_group_memory_barrier:
3850 case nir_intrinsic_memory_barrier_buffer:
3851 case nir_intrinsic_memory_barrier_image:
3852 case nir_intrinsic_memory_barrier_shared:
3853 emit_membar(&ctx->ac, instr);
3854 break;
3855 case nir_intrinsic_memory_barrier_tcs_patch:
3856 break;
3857 case nir_intrinsic_control_barrier:
3858 ac_emit_barrier(&ctx->ac, ctx->stage);
3859 break;
3860 case nir_intrinsic_shared_atomic_add:
3861 case nir_intrinsic_shared_atomic_imin:
3862 case nir_intrinsic_shared_atomic_umin:
3863 case nir_intrinsic_shared_atomic_imax:
3864 case nir_intrinsic_shared_atomic_umax:
3865 case nir_intrinsic_shared_atomic_and:
3866 case nir_intrinsic_shared_atomic_or:
3867 case nir_intrinsic_shared_atomic_xor:
3868 case nir_intrinsic_shared_atomic_exchange:
3869 case nir_intrinsic_shared_atomic_comp_swap: {
3870 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3871 instr->src[1].ssa->bit_size);
3872 result = visit_var_atomic(ctx, instr, ptr, 1);
3873 break;
3874 }
3875 case nir_intrinsic_deref_atomic_add:
3876 case nir_intrinsic_deref_atomic_imin:
3877 case nir_intrinsic_deref_atomic_umin:
3878 case nir_intrinsic_deref_atomic_imax:
3879 case nir_intrinsic_deref_atomic_umax:
3880 case nir_intrinsic_deref_atomic_and:
3881 case nir_intrinsic_deref_atomic_or:
3882 case nir_intrinsic_deref_atomic_xor:
3883 case nir_intrinsic_deref_atomic_exchange:
3884 case nir_intrinsic_deref_atomic_comp_swap: {
3885 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3886 result = visit_var_atomic(ctx, instr, ptr, 1);
3887 break;
3888 }
3889 case nir_intrinsic_load_barycentric_pixel:
3890 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3891 break;
3892 case nir_intrinsic_load_barycentric_centroid:
3893 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3894 break;
3895 case nir_intrinsic_load_barycentric_sample:
3896 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3897 break;
3898 case nir_intrinsic_load_barycentric_model:
3899 result = barycentric_model(ctx);
3900 break;
3901 case nir_intrinsic_load_barycentric_at_offset: {
3902 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3903 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3904 break;
3905 }
3906 case nir_intrinsic_load_barycentric_at_sample: {
3907 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3908 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3909 break;
3910 }
3911 case nir_intrinsic_load_interpolated_input: {
3912 /* We assume any indirect loads have been lowered away */
3913 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3914 assert(offset);
3915 assert(offset[0].i32 == 0);
3916
3917 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3918 unsigned index = nir_intrinsic_base(instr);
3919 unsigned component = nir_intrinsic_component(instr);
3920 result = load_interpolated_input(ctx, interp_param, index,
3921 component,
3922 instr->dest.ssa.num_components,
3923 instr->dest.ssa.bit_size);
3924 break;
3925 }
3926 case nir_intrinsic_load_input:
3927 case nir_intrinsic_load_input_vertex:
3928 result = load_input(ctx, instr);
3929 break;
3930 case nir_intrinsic_emit_vertex:
3931 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3932 break;
3933 case nir_intrinsic_end_primitive:
3934 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3935 break;
3936 case nir_intrinsic_load_tess_coord:
3937 result = ctx->abi->load_tess_coord(ctx->abi);
3938 break;
3939 case nir_intrinsic_load_tess_level_outer:
3940 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3941 break;
3942 case nir_intrinsic_load_tess_level_inner:
3943 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3944 break;
3945 case nir_intrinsic_load_tess_level_outer_default:
3946 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3947 break;
3948 case nir_intrinsic_load_tess_level_inner_default:
3949 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3950 break;
3951 case nir_intrinsic_load_patch_vertices_in:
3952 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3953 break;
3954 case nir_intrinsic_vote_all: {
3955 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3956 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3957 break;
3958 }
3959 case nir_intrinsic_vote_any: {
3960 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3961 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3962 break;
3963 }
3964 case nir_intrinsic_shuffle:
3965 if (ctx->ac.chip_class == GFX8 ||
3966 ctx->ac.chip_class == GFX9 ||
3967 (ctx->ac.chip_class == GFX10 && ctx->ac.wave_size == 32)) {
3968 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3969 get_src(ctx, instr->src[1]));
3970 } else {
3971 LLVMValueRef src = get_src(ctx, instr->src[0]);
3972 LLVMValueRef index = get_src(ctx, instr->src[1]);
3973 LLVMTypeRef type = LLVMTypeOf(src);
3974 struct waterfall_context wctx;
3975 LLVMValueRef index_val;
3976
3977 index_val = enter_waterfall(ctx, &wctx, index, true);
3978
3979 src = LLVMBuildZExt(ctx->ac.builder, src,
3980 ctx->ac.i32, "");
3981
3982 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
3983 ctx->ac.i32,
3984 (LLVMValueRef []) { src, index_val }, 2,
3985 AC_FUNC_ATTR_READNONE |
3986 AC_FUNC_ATTR_CONVERGENT);
3987
3988 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
3989
3990 result = exit_waterfall(ctx, &wctx, result);
3991 }
3992 break;
3993 case nir_intrinsic_reduce:
3994 result = ac_build_reduce(&ctx->ac,
3995 get_src(ctx, instr->src[0]),
3996 instr->const_index[0],
3997 instr->const_index[1]);
3998 break;
3999 case nir_intrinsic_inclusive_scan:
4000 result = ac_build_inclusive_scan(&ctx->ac,
4001 get_src(ctx, instr->src[0]),
4002 instr->const_index[0]);
4003 break;
4004 case nir_intrinsic_exclusive_scan:
4005 result = ac_build_exclusive_scan(&ctx->ac,
4006 get_src(ctx, instr->src[0]),
4007 instr->const_index[0]);
4008 break;
4009 case nir_intrinsic_quad_broadcast: {
4010 unsigned lane = nir_src_as_uint(instr->src[1]);
4011 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4012 lane, lane, lane, lane);
4013 break;
4014 }
4015 case nir_intrinsic_quad_swap_horizontal:
4016 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4017 break;
4018 case nir_intrinsic_quad_swap_vertical:
4019 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4020 break;
4021 case nir_intrinsic_quad_swap_diagonal:
4022 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4023 break;
4024 case nir_intrinsic_quad_swizzle_amd: {
4025 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4026 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4027 mask & 0x3, (mask >> 2) & 0x3,
4028 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4029 break;
4030 }
4031 case nir_intrinsic_masked_swizzle_amd: {
4032 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4033 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4034 break;
4035 }
4036 case nir_intrinsic_write_invocation_amd:
4037 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4038 get_src(ctx, instr->src[1]),
4039 get_src(ctx, instr->src[2]));
4040 break;
4041 case nir_intrinsic_mbcnt_amd:
4042 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4043 break;
4044 case nir_intrinsic_load_scratch: {
4045 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4046 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4047 offset);
4048 LLVMTypeRef comp_type =
4049 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4050 LLVMTypeRef vec_type =
4051 instr->dest.ssa.num_components == 1 ? comp_type :
4052 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4053 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4054 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4055 LLVMPointerType(vec_type, addr_space), "");
4056 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4057 break;
4058 }
4059 case nir_intrinsic_store_scratch: {
4060 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4061 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4062 offset);
4063 LLVMTypeRef comp_type =
4064 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4065 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4066 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4067 LLVMPointerType(comp_type, addr_space), "");
4068 LLVMValueRef src = get_src(ctx, instr->src[0]);
4069 unsigned wrmask = nir_intrinsic_write_mask(instr);
4070 while (wrmask) {
4071 int start, count;
4072 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4073
4074 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4075 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4076 LLVMTypeRef vec_type =
4077 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4078 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4079 offset_ptr,
4080 LLVMPointerType(vec_type, addr_space),
4081 "");
4082 LLVMValueRef offset_src =
4083 ac_extract_components(&ctx->ac, src, start, count);
4084 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4085 }
4086 break;
4087 }
4088 case nir_intrinsic_load_constant: {
4089 unsigned base = nir_intrinsic_base(instr);
4090 unsigned range = nir_intrinsic_range(instr);
4091
4092 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4093 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4094 LLVMConstInt(ctx->ac.i32, base, false), "");
4095
4096 /* Clamp the offset to avoid out-of-bound access because global
4097 * instructions can't handle them.
4098 */
4099 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4100 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4101 offset, size, "");
4102 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4103
4104 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4105 offset);
4106 LLVMTypeRef comp_type =
4107 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4108 LLVMTypeRef vec_type =
4109 instr->dest.ssa.num_components == 1 ? comp_type :
4110 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4111 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4112 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4113 LLVMPointerType(vec_type, addr_space), "");
4114 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4115 break;
4116 }
4117 default:
4118 fprintf(stderr, "Unknown intrinsic: ");
4119 nir_print_instr(&instr->instr, stderr);
4120 fprintf(stderr, "\n");
4121 break;
4122 }
4123 if (result) {
4124 ctx->ssa_defs[instr->dest.ssa.index] = result;
4125 }
4126 }
4127
4128 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4129 unsigned base_index,
4130 unsigned constant_index,
4131 LLVMValueRef dynamic_index)
4132 {
4133 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4134 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4135 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4136
4137 /* Bindless uniforms are 64bit so multiple index by 8 */
4138 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4139 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4140
4141 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4142
4143 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4144 NULL, 0, 0, true, true);
4145
4146 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4147 }
4148
4149 struct sampler_desc_address {
4150 unsigned descriptor_set;
4151 unsigned base_index; /* binding in vulkan */
4152 unsigned constant_index;
4153 LLVMValueRef dynamic_index;
4154 bool image;
4155 bool bindless;
4156 };
4157
4158 static struct sampler_desc_address
4159 get_sampler_desc_internal(struct ac_nir_context *ctx,
4160 nir_deref_instr *deref_instr,
4161 const nir_instr *instr,
4162 bool image)
4163 {
4164 LLVMValueRef index = NULL;
4165 unsigned constant_index = 0;
4166 unsigned descriptor_set;
4167 unsigned base_index;
4168 bool bindless = false;
4169
4170 if (!deref_instr) {
4171 descriptor_set = 0;
4172 if (image) {
4173 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4174 base_index = 0;
4175 bindless = true;
4176 index = get_src(ctx, img_instr->src[0]);
4177 } else {
4178 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4179 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4180 nir_tex_src_sampler_handle);
4181 if (sampSrcIdx != -1) {
4182 base_index = 0;
4183 bindless = true;
4184 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4185 } else {
4186 assert(tex_instr && !image);
4187 base_index = tex_instr->sampler_index;
4188 }
4189 }
4190 } else {
4191 while(deref_instr->deref_type != nir_deref_type_var) {
4192 if (deref_instr->deref_type == nir_deref_type_array) {
4193 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4194 if (!array_size)
4195 array_size = 1;
4196
4197 if (nir_src_is_const(deref_instr->arr.index)) {
4198 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4199 } else {
4200 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4201
4202 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4203 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4204
4205 if (!index)
4206 index = indirect;
4207 else
4208 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4209 }
4210
4211 deref_instr = nir_src_as_deref(deref_instr->parent);
4212 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4213 unsigned sidx = deref_instr->strct.index;
4214 deref_instr = nir_src_as_deref(deref_instr->parent);
4215 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4216 } else {
4217 unreachable("Unsupported deref type");
4218 }
4219 }
4220 descriptor_set = deref_instr->var->data.descriptor_set;
4221
4222 if (deref_instr->var->data.bindless) {
4223 /* For now just assert on unhandled variable types */
4224 assert(deref_instr->var->data.mode == nir_var_uniform);
4225
4226 base_index = deref_instr->var->data.driver_location;
4227 bindless = true;
4228
4229 index = index ? index : ctx->ac.i32_0;
4230 index = get_bindless_index_from_uniform(ctx, base_index,
4231 constant_index, index);
4232 } else
4233 base_index = deref_instr->var->data.binding;
4234 }
4235 return (struct sampler_desc_address) {
4236 .descriptor_set = descriptor_set,
4237 .base_index = base_index,
4238 .constant_index = constant_index,
4239 .dynamic_index = index,
4240 .image = image,
4241 .bindless = bindless,
4242 };
4243 }
4244
4245 /* Extract any possibly divergent index into a separate value that can be fed
4246 * into get_sampler_desc with the same arguments. */
4247 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4248 nir_deref_instr *deref_instr,
4249 const nir_instr *instr,
4250 bool image)
4251 {
4252 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4253 return addr.dynamic_index;
4254 }
4255
4256 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4257 nir_deref_instr *deref_instr,
4258 enum ac_descriptor_type desc_type,
4259 const nir_instr *instr,
4260 LLVMValueRef index,
4261 bool image, bool write)
4262 {
4263 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4264 return ctx->abi->load_sampler_desc(ctx->abi,
4265 addr.descriptor_set,
4266 addr.base_index,
4267 addr.constant_index, index,
4268 desc_type, addr.image, write, addr.bindless);
4269 }
4270
4271 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4272 *
4273 * GFX6-GFX7:
4274 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4275 * filtering manually. The driver sets img7 to a mask clearing
4276 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4277 * s_and_b32 samp0, samp0, img7
4278 *
4279 * GFX8:
4280 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4281 */
4282 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4283 LLVMValueRef res, LLVMValueRef samp)
4284 {
4285 LLVMBuilderRef builder = ctx->ac.builder;
4286 LLVMValueRef img7, samp0;
4287
4288 if (ctx->ac.chip_class >= GFX8)
4289 return samp;
4290
4291 img7 = LLVMBuildExtractElement(builder, res,
4292 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4293 samp0 = LLVMBuildExtractElement(builder, samp,
4294 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4295 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4296 return LLVMBuildInsertElement(builder, samp, samp0,
4297 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4298 }
4299
4300 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4301 nir_tex_instr *instr,
4302 struct waterfall_context *wctx,
4303 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4304 LLVMValueRef *fmask_ptr)
4305 {
4306 nir_deref_instr *texture_deref_instr = NULL;
4307 nir_deref_instr *sampler_deref_instr = NULL;
4308 int plane = -1;
4309
4310 for (unsigned i = 0; i < instr->num_srcs; i++) {
4311 switch (instr->src[i].src_type) {
4312 case nir_tex_src_texture_deref:
4313 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4314 break;
4315 case nir_tex_src_sampler_deref:
4316 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4317 break;
4318 case nir_tex_src_plane:
4319 plane = nir_src_as_int(instr->src[i].src);
4320 break;
4321 default:
4322 break;
4323 }
4324 }
4325
4326 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4327 &instr->instr, false);
4328 if (!sampler_deref_instr)
4329 sampler_deref_instr = texture_deref_instr;
4330
4331 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4332 &instr->instr, false);
4333 if (instr->texture_non_uniform)
4334 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4335
4336 if (instr->sampler_non_uniform)
4337 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4338
4339 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4340
4341 if (plane >= 0) {
4342 assert(instr->op != nir_texop_txf_ms &&
4343 instr->op != nir_texop_samples_identical);
4344 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4345
4346 main_descriptor = AC_DESC_PLANE_0 + plane;
4347 }
4348
4349 if (instr->op == nir_texop_fragment_mask_fetch) {
4350 /* The fragment mask is fetched from the compressed
4351 * multisampled surface.
4352 */
4353 main_descriptor = AC_DESC_FMASK;
4354 }
4355
4356 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4357 texture_dynamic_index, false, false);
4358
4359 if (samp_ptr) {
4360 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4361 sampler_dynamic_index, false, false);
4362 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4363 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4364 }
4365 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4366 instr->op == nir_texop_samples_identical))
4367 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4368 &instr->instr, texture_dynamic_index, false, false);
4369 }
4370
4371 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4372 LLVMValueRef coord)
4373 {
4374 coord = ac_to_float(ctx, coord);
4375 coord = ac_build_round(ctx, coord);
4376 coord = ac_to_integer(ctx, coord);
4377 return coord;
4378 }
4379
4380 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4381 {
4382 LLVMValueRef result = NULL;
4383 struct ac_image_args args = { 0 };
4384 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4385 LLVMValueRef ddx = NULL, ddy = NULL;
4386 unsigned offset_src = 0;
4387 struct waterfall_context wctx[2] = {{{0}}};
4388
4389 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4390
4391 for (unsigned i = 0; i < instr->num_srcs; i++) {
4392 switch (instr->src[i].src_type) {
4393 case nir_tex_src_coord: {
4394 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4395 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4396 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4397 break;
4398 }
4399 case nir_tex_src_projector:
4400 break;
4401 case nir_tex_src_comparator:
4402 if (instr->is_shadow) {
4403 args.compare = get_src(ctx, instr->src[i].src);
4404 args.compare = ac_to_float(&ctx->ac, args.compare);
4405 }
4406 break;
4407 case nir_tex_src_offset:
4408 args.offset = get_src(ctx, instr->src[i].src);
4409 offset_src = i;
4410 break;
4411 case nir_tex_src_bias:
4412 if (instr->op == nir_texop_txb)
4413 args.bias = get_src(ctx, instr->src[i].src);
4414 break;
4415 case nir_tex_src_lod: {
4416 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4417 args.level_zero = true;
4418 else
4419 args.lod = get_src(ctx, instr->src[i].src);
4420 break;
4421 }
4422 case nir_tex_src_ms_index:
4423 sample_index = get_src(ctx, instr->src[i].src);
4424 break;
4425 case nir_tex_src_ms_mcs:
4426 break;
4427 case nir_tex_src_ddx:
4428 ddx = get_src(ctx, instr->src[i].src);
4429 break;
4430 case nir_tex_src_ddy:
4431 ddy = get_src(ctx, instr->src[i].src);
4432 break;
4433 case nir_tex_src_texture_offset:
4434 case nir_tex_src_sampler_offset:
4435 case nir_tex_src_plane:
4436 default:
4437 break;
4438 }
4439 }
4440
4441 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4442 result = get_buffer_size(ctx, args.resource, true);
4443 goto write_result;
4444 }
4445
4446 if (instr->op == nir_texop_texture_samples) {
4447 LLVMValueRef res, samples, is_msaa;
4448 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4449 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4450 LLVMConstInt(ctx->ac.i32, 3, false), "");
4451 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4452 LLVMConstInt(ctx->ac.i32, 28, false), "");
4453 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4454 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4455 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4456 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4457
4458 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4459 LLVMConstInt(ctx->ac.i32, 16, false), "");
4460 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4461 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4462 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4463 samples, "");
4464 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4465 ctx->ac.i32_1, "");
4466 result = samples;
4467 goto write_result;
4468 }
4469
4470 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4471 LLVMValueRef offset[3], pack;
4472 for (unsigned chan = 0; chan < 3; ++chan)
4473 offset[chan] = ctx->ac.i32_0;
4474
4475 unsigned num_components = ac_get_llvm_num_components(args.offset);
4476 for (unsigned chan = 0; chan < num_components; chan++) {
4477 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4478 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4479 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4480 if (chan)
4481 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4482 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4483 }
4484 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4485 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4486 args.offset = pack;
4487 }
4488
4489 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4490 * OpenGL 4.5 spec says:
4491 *
4492 * "If the texture’s internal format indicates a fixed-point
4493 * depth texture, then D_t and D_ref are clamped to the
4494 * range [0, 1]; otherwise no clamping is performed."
4495 *
4496 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4497 * so the depth comparison value isn't clamped for Z16 and
4498 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4499 * an explicitly clamped 32-bit float format.
4500 */
4501 if (args.compare &&
4502 ctx->ac.chip_class >= GFX8 &&
4503 ctx->ac.chip_class <= GFX9 &&
4504 ctx->abi->clamp_shadow_reference) {
4505 LLVMValueRef upgraded, clamped;
4506
4507 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4508 LLVMConstInt(ctx->ac.i32, 3, false), "");
4509 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4510 LLVMConstInt(ctx->ac.i32, 29, false), "");
4511 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4512 clamped = ac_build_clamp(&ctx->ac, args.compare);
4513 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4514 args.compare, "");
4515 }
4516
4517 /* pack derivatives */
4518 if (ddx || ddy) {
4519 int num_src_deriv_channels, num_dest_deriv_channels;
4520 switch (instr->sampler_dim) {
4521 case GLSL_SAMPLER_DIM_3D:
4522 case GLSL_SAMPLER_DIM_CUBE:
4523 num_src_deriv_channels = 3;
4524 num_dest_deriv_channels = 3;
4525 break;
4526 case GLSL_SAMPLER_DIM_2D:
4527 default:
4528 num_src_deriv_channels = 2;
4529 num_dest_deriv_channels = 2;
4530 break;
4531 case GLSL_SAMPLER_DIM_1D:
4532 num_src_deriv_channels = 1;
4533 if (ctx->ac.chip_class == GFX9) {
4534 num_dest_deriv_channels = 2;
4535 } else {
4536 num_dest_deriv_channels = 1;
4537 }
4538 break;
4539 }
4540
4541 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4542 args.derivs[i] = ac_to_float(&ctx->ac,
4543 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4544 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4545 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4546 }
4547 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4548 args.derivs[i] = ctx->ac.f32_0;
4549 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4550 }
4551 }
4552
4553 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4554 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4555 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4556 if (instr->coord_components == 3)
4557 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4558 ac_prepare_cube_coords(&ctx->ac,
4559 instr->op == nir_texop_txd, instr->is_array,
4560 instr->op == nir_texop_lod, args.coords, args.derivs);
4561 }
4562
4563 /* Texture coordinates fixups */
4564 if (instr->coord_components > 1 &&
4565 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4566 instr->is_array &&
4567 instr->op != nir_texop_txf) {
4568 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4569 }
4570
4571 if (instr->coord_components > 2 &&
4572 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4573 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4574 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4575 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4576 instr->is_array &&
4577 instr->op != nir_texop_txf &&
4578 instr->op != nir_texop_txf_ms &&
4579 instr->op != nir_texop_fragment_fetch &&
4580 instr->op != nir_texop_fragment_mask_fetch) {
4581 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4582 }
4583
4584 if (ctx->ac.chip_class == GFX9 &&
4585 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4586 instr->op != nir_texop_lod) {
4587 LLVMValueRef filler;
4588 if (instr->op == nir_texop_txf)
4589 filler = ctx->ac.i32_0;
4590 else
4591 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4592
4593 if (instr->is_array)
4594 args.coords[2] = args.coords[1];
4595 args.coords[1] = filler;
4596 }
4597
4598 /* Pack sample index */
4599 if (sample_index && (instr->op == nir_texop_txf_ms ||
4600 instr->op == nir_texop_fragment_fetch))
4601 args.coords[instr->coord_components] = sample_index;
4602
4603 if (instr->op == nir_texop_samples_identical) {
4604 struct ac_image_args txf_args = { 0 };
4605 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4606
4607 txf_args.dmask = 0xf;
4608 txf_args.resource = fmask_ptr;
4609 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4610 result = build_tex_intrinsic(ctx, instr, &txf_args);
4611
4612 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4613 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4614 goto write_result;
4615 }
4616
4617 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4618 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4619 instr->op != nir_texop_txs &&
4620 instr->op != nir_texop_fragment_fetch &&
4621 instr->op != nir_texop_fragment_mask_fetch) {
4622 unsigned sample_chan = instr->is_array ? 3 : 2;
4623 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4624 &ctx->ac, args.coords[0], args.coords[1],
4625 instr->is_array ? args.coords[2] : NULL,
4626 args.coords[sample_chan], fmask_ptr);
4627 }
4628
4629 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4630 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4631 num_offsets = MIN2(num_offsets, instr->coord_components);
4632 for (unsigned i = 0; i < num_offsets; ++i) {
4633 args.coords[i] = LLVMBuildAdd(
4634 ctx->ac.builder, args.coords[i],
4635 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4636 }
4637 args.offset = NULL;
4638 }
4639
4640 /* DMASK was repurposed for GATHER4. 4 components are always
4641 * returned and DMASK works like a swizzle - it selects
4642 * the component to fetch. The only valid DMASK values are
4643 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4644 * (red,red,red,red) etc.) The ISA document doesn't mention
4645 * this.
4646 */
4647 args.dmask = 0xf;
4648 if (instr->op == nir_texop_tg4) {
4649 if (instr->is_shadow)
4650 args.dmask = 1;
4651 else
4652 args.dmask = 1 << instr->component;
4653 }
4654
4655 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4656 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4657 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4658 }
4659
4660 /* Adjust the number of coordinates because we only need (x,y) for 2D
4661 * multisampled images and (x,y,layer) for 2D multisampled layered
4662 * images or for multisampled input attachments.
4663 */
4664 if (instr->op == nir_texop_fragment_mask_fetch) {
4665 if (args.dim == ac_image_2dmsaa) {
4666 args.dim = ac_image_2d;
4667 } else {
4668 assert(args.dim == ac_image_2darraymsaa);
4669 args.dim = ac_image_2darray;
4670 }
4671 }
4672
4673 result = build_tex_intrinsic(ctx, instr, &args);
4674
4675 if (instr->op == nir_texop_query_levels)
4676 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4677 else if (instr->is_shadow && instr->is_new_style_shadow &&
4678 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4679 instr->op != nir_texop_tg4)
4680 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4681 else if (instr->op == nir_texop_txs &&
4682 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4683 instr->is_array) {
4684 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4685 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4686 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4687 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4688 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4689 } else if (ctx->ac.chip_class == GFX9 &&
4690 instr->op == nir_texop_txs &&
4691 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4692 instr->is_array) {
4693 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4694 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4695 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4696 ctx->ac.i32_1, "");
4697 } else if (instr->dest.ssa.num_components != 4)
4698 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4699
4700 write_result:
4701 if (result) {
4702 assert(instr->dest.is_ssa);
4703 result = ac_to_integer(&ctx->ac, result);
4704
4705 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4706 result = exit_waterfall(ctx, wctx + i, result);
4707 }
4708
4709 ctx->ssa_defs[instr->dest.ssa.index] = result;
4710 }
4711 }
4712
4713 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4714 {
4715 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4716 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4717
4718 ctx->ssa_defs[instr->dest.ssa.index] = result;
4719 _mesa_hash_table_insert(ctx->phis, instr, result);
4720 }
4721
4722 static void visit_post_phi(struct ac_nir_context *ctx,
4723 nir_phi_instr *instr,
4724 LLVMValueRef llvm_phi)
4725 {
4726 nir_foreach_phi_src(src, instr) {
4727 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4728 LLVMValueRef llvm_src = get_src(ctx, src->src);
4729
4730 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4731 }
4732 }
4733
4734 static void phi_post_pass(struct ac_nir_context *ctx)
4735 {
4736 hash_table_foreach(ctx->phis, entry) {
4737 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4738 (LLVMValueRef)entry->data);
4739 }
4740 }
4741
4742
4743 static void visit_ssa_undef(struct ac_nir_context *ctx,
4744 const nir_ssa_undef_instr *instr)
4745 {
4746 unsigned num_components = instr->def.num_components;
4747 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4748 LLVMValueRef undef;
4749
4750 if (num_components == 1)
4751 undef = LLVMGetUndef(type);
4752 else {
4753 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4754 }
4755 ctx->ssa_defs[instr->def.index] = undef;
4756 }
4757
4758 static void visit_jump(struct ac_llvm_context *ctx,
4759 const nir_jump_instr *instr)
4760 {
4761 switch (instr->type) {
4762 case nir_jump_break:
4763 ac_build_break(ctx);
4764 break;
4765 case nir_jump_continue:
4766 ac_build_continue(ctx);
4767 break;
4768 default:
4769 fprintf(stderr, "Unknown NIR jump instr: ");
4770 nir_print_instr(&instr->instr, stderr);
4771 fprintf(stderr, "\n");
4772 abort();
4773 }
4774 }
4775
4776 static LLVMTypeRef
4777 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4778 enum glsl_base_type type)
4779 {
4780 switch (type) {
4781 case GLSL_TYPE_INT:
4782 case GLSL_TYPE_UINT:
4783 case GLSL_TYPE_BOOL:
4784 case GLSL_TYPE_SUBROUTINE:
4785 return ac->i32;
4786 case GLSL_TYPE_INT8:
4787 case GLSL_TYPE_UINT8:
4788 return ac->i8;
4789 case GLSL_TYPE_INT16:
4790 case GLSL_TYPE_UINT16:
4791 return ac->i16;
4792 case GLSL_TYPE_FLOAT:
4793 return ac->f32;
4794 case GLSL_TYPE_FLOAT16:
4795 return ac->f16;
4796 case GLSL_TYPE_INT64:
4797 case GLSL_TYPE_UINT64:
4798 return ac->i64;
4799 case GLSL_TYPE_DOUBLE:
4800 return ac->f64;
4801 default:
4802 unreachable("unknown GLSL type");
4803 }
4804 }
4805
4806 static LLVMTypeRef
4807 glsl_to_llvm_type(struct ac_llvm_context *ac,
4808 const struct glsl_type *type)
4809 {
4810 if (glsl_type_is_scalar(type)) {
4811 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4812 }
4813
4814 if (glsl_type_is_vector(type)) {
4815 return LLVMVectorType(
4816 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4817 glsl_get_vector_elements(type));
4818 }
4819
4820 if (glsl_type_is_matrix(type)) {
4821 return LLVMArrayType(
4822 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4823 glsl_get_matrix_columns(type));
4824 }
4825
4826 if (glsl_type_is_array(type)) {
4827 return LLVMArrayType(
4828 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4829 glsl_get_length(type));
4830 }
4831
4832 assert(glsl_type_is_struct_or_ifc(type));
4833
4834 LLVMTypeRef member_types[glsl_get_length(type)];
4835
4836 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4837 member_types[i] =
4838 glsl_to_llvm_type(ac,
4839 glsl_get_struct_field(type, i));
4840 }
4841
4842 return LLVMStructTypeInContext(ac->context, member_types,
4843 glsl_get_length(type), false);
4844 }
4845
4846 static void visit_deref(struct ac_nir_context *ctx,
4847 nir_deref_instr *instr)
4848 {
4849 if (instr->mode != nir_var_mem_shared &&
4850 instr->mode != nir_var_mem_global)
4851 return;
4852
4853 LLVMValueRef result = NULL;
4854 switch(instr->deref_type) {
4855 case nir_deref_type_var: {
4856 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4857 result = entry->data;
4858 break;
4859 }
4860 case nir_deref_type_struct:
4861 if (instr->mode == nir_var_mem_global) {
4862 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4863 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4864 instr->strct.index);
4865 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4866 LLVMConstInt(ctx->ac.i32, offset, 0));
4867 } else {
4868 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4869 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4870 }
4871 break;
4872 case nir_deref_type_array:
4873 if (instr->mode == nir_var_mem_global) {
4874 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4875 unsigned stride = glsl_get_explicit_stride(parent->type);
4876
4877 if ((glsl_type_is_matrix(parent->type) &&
4878 glsl_matrix_type_is_row_major(parent->type)) ||
4879 (glsl_type_is_vector(parent->type) && stride == 0))
4880 stride = type_scalar_size_bytes(parent->type);
4881
4882 assert(stride > 0);
4883 LLVMValueRef index = get_src(ctx, instr->arr.index);
4884 if (LLVMTypeOf(index) != ctx->ac.i64)
4885 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4886
4887 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4888
4889 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4890 } else {
4891 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4892 get_src(ctx, instr->arr.index));
4893 }
4894 break;
4895 case nir_deref_type_ptr_as_array:
4896 if (instr->mode == nir_var_mem_global) {
4897 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4898
4899 LLVMValueRef index = get_src(ctx, instr->arr.index);
4900 if (LLVMTypeOf(index) != ctx->ac.i64)
4901 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4902
4903 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4904
4905 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4906 } else {
4907 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4908 get_src(ctx, instr->arr.index));
4909 }
4910 break;
4911 case nir_deref_type_cast: {
4912 result = get_src(ctx, instr->parent);
4913
4914 /* We can't use the structs from LLVM because the shader
4915 * specifies its own offsets. */
4916 LLVMTypeRef pointee_type = ctx->ac.i8;
4917 if (instr->mode == nir_var_mem_shared)
4918 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4919
4920 unsigned address_space;
4921
4922 switch(instr->mode) {
4923 case nir_var_mem_shared:
4924 address_space = AC_ADDR_SPACE_LDS;
4925 break;
4926 case nir_var_mem_global:
4927 address_space = AC_ADDR_SPACE_GLOBAL;
4928 break;
4929 default:
4930 unreachable("Unhandled address space");
4931 }
4932
4933 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4934
4935 if (LLVMTypeOf(result) != type) {
4936 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4937 result = LLVMBuildBitCast(ctx->ac.builder, result,
4938 type, "");
4939 } else {
4940 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4941 type, "");
4942 }
4943 }
4944 break;
4945 }
4946 default:
4947 unreachable("Unhandled deref_instr deref type");
4948 }
4949
4950 ctx->ssa_defs[instr->dest.ssa.index] = result;
4951 }
4952
4953 static void visit_cf_list(struct ac_nir_context *ctx,
4954 struct exec_list *list);
4955
4956 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4957 {
4958 nir_foreach_instr(instr, block)
4959 {
4960 switch (instr->type) {
4961 case nir_instr_type_alu:
4962 visit_alu(ctx, nir_instr_as_alu(instr));
4963 break;
4964 case nir_instr_type_load_const:
4965 visit_load_const(ctx, nir_instr_as_load_const(instr));
4966 break;
4967 case nir_instr_type_intrinsic:
4968 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4969 break;
4970 case nir_instr_type_tex:
4971 visit_tex(ctx, nir_instr_as_tex(instr));
4972 break;
4973 case nir_instr_type_phi:
4974 visit_phi(ctx, nir_instr_as_phi(instr));
4975 break;
4976 case nir_instr_type_ssa_undef:
4977 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4978 break;
4979 case nir_instr_type_jump:
4980 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4981 break;
4982 case nir_instr_type_deref:
4983 visit_deref(ctx, nir_instr_as_deref(instr));
4984 break;
4985 default:
4986 fprintf(stderr, "Unknown NIR instr type: ");
4987 nir_print_instr(instr, stderr);
4988 fprintf(stderr, "\n");
4989 abort();
4990 }
4991 }
4992
4993 _mesa_hash_table_insert(ctx->defs, block,
4994 LLVMGetInsertBlock(ctx->ac.builder));
4995 }
4996
4997 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4998 {
4999 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5000
5001 nir_block *then_block =
5002 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5003
5004 ac_build_uif(&ctx->ac, value, then_block->index);
5005
5006 visit_cf_list(ctx, &if_stmt->then_list);
5007
5008 if (!exec_list_is_empty(&if_stmt->else_list)) {
5009 nir_block *else_block =
5010 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5011
5012 ac_build_else(&ctx->ac, else_block->index);
5013 visit_cf_list(ctx, &if_stmt->else_list);
5014 }
5015
5016 ac_build_endif(&ctx->ac, then_block->index);
5017 }
5018
5019 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5020 {
5021 nir_block *first_loop_block =
5022 (nir_block *) exec_list_get_head(&loop->body);
5023
5024 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5025
5026 visit_cf_list(ctx, &loop->body);
5027
5028 ac_build_endloop(&ctx->ac, first_loop_block->index);
5029 }
5030
5031 static void visit_cf_list(struct ac_nir_context *ctx,
5032 struct exec_list *list)
5033 {
5034 foreach_list_typed(nir_cf_node, node, node, list)
5035 {
5036 switch (node->type) {
5037 case nir_cf_node_block:
5038 visit_block(ctx, nir_cf_node_as_block(node));
5039 break;
5040
5041 case nir_cf_node_if:
5042 visit_if(ctx, nir_cf_node_as_if(node));
5043 break;
5044
5045 case nir_cf_node_loop:
5046 visit_loop(ctx, nir_cf_node_as_loop(node));
5047 break;
5048
5049 default:
5050 assert(0);
5051 }
5052 }
5053 }
5054
5055 void
5056 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5057 struct ac_shader_abi *abi,
5058 struct nir_shader *nir,
5059 struct nir_variable *variable,
5060 gl_shader_stage stage)
5061 {
5062 unsigned output_loc = variable->data.driver_location / 4;
5063 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5064
5065 /* tess ctrl has it's own load/store paths for outputs */
5066 if (stage == MESA_SHADER_TESS_CTRL)
5067 return;
5068
5069 if (stage == MESA_SHADER_VERTEX ||
5070 stage == MESA_SHADER_TESS_EVAL ||
5071 stage == MESA_SHADER_GEOMETRY) {
5072 int idx = variable->data.location + variable->data.index;
5073 if (idx == VARYING_SLOT_CLIP_DIST0) {
5074 int length = nir->info.clip_distance_array_size +
5075 nir->info.cull_distance_array_size;
5076
5077 if (length > 4)
5078 attrib_count = 2;
5079 else
5080 attrib_count = 1;
5081 }
5082 }
5083
5084 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5085 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5086 for (unsigned i = 0; i < attrib_count; ++i) {
5087 for (unsigned chan = 0; chan < 4; chan++) {
5088 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5089 ac_build_alloca_undef(ctx, type, "");
5090 }
5091 }
5092 }
5093
5094 static void
5095 setup_locals(struct ac_nir_context *ctx,
5096 struct nir_function *func)
5097 {
5098 int i, j;
5099 ctx->num_locals = 0;
5100 nir_foreach_variable(variable, &func->impl->locals) {
5101 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5102 variable->data.driver_location = ctx->num_locals * 4;
5103 variable->data.location_frac = 0;
5104 ctx->num_locals += attrib_count;
5105 }
5106 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5107 if (!ctx->locals)
5108 return;
5109
5110 for (i = 0; i < ctx->num_locals; i++) {
5111 for (j = 0; j < 4; j++) {
5112 ctx->locals[i * 4 + j] =
5113 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5114 }
5115 }
5116 }
5117
5118 static void
5119 setup_scratch(struct ac_nir_context *ctx,
5120 struct nir_shader *shader)
5121 {
5122 if (shader->scratch_size == 0)
5123 return;
5124
5125 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5126 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5127 "scratch");
5128 }
5129
5130 static void
5131 setup_constant_data(struct ac_nir_context *ctx,
5132 struct nir_shader *shader)
5133 {
5134 if (!shader->constant_data)
5135 return;
5136
5137 LLVMValueRef data =
5138 LLVMConstStringInContext(ctx->ac.context,
5139 shader->constant_data,
5140 shader->constant_data_size,
5141 true);
5142 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5143
5144 /* We want to put the constant data in the CONST address space so that
5145 * we can use scalar loads. However, LLVM versions before 10 put these
5146 * variables in the same section as the code, which is unacceptable
5147 * for RadeonSI as it needs to relocate all the data sections after
5148 * the code sections. See https://reviews.llvm.org/D65813.
5149 */
5150 unsigned address_space =
5151 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5152
5153 LLVMValueRef global =
5154 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5155 "const_data",
5156 address_space);
5157
5158 LLVMSetInitializer(global, data);
5159 LLVMSetGlobalConstant(global, true);
5160 LLVMSetVisibility(global, LLVMHiddenVisibility);
5161 ctx->constant_data = global;
5162 }
5163
5164 static void
5165 setup_shared(struct ac_nir_context *ctx,
5166 struct nir_shader *nir)
5167 {
5168 if (ctx->ac.lds)
5169 return;
5170
5171 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5172 nir->info.cs.shared_size);
5173
5174 LLVMValueRef lds =
5175 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5176 "compute_lds",
5177 AC_ADDR_SPACE_LDS);
5178 LLVMSetAlignment(lds, 64 * 1024);
5179
5180 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5181 LLVMPointerType(ctx->ac.i8,
5182 AC_ADDR_SPACE_LDS), "");
5183 }
5184
5185 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5186 const struct ac_shader_args *args, struct nir_shader *nir)
5187 {
5188 struct ac_nir_context ctx = {};
5189 struct nir_function *func;
5190
5191 ctx.ac = *ac;
5192 ctx.abi = abi;
5193 ctx.args = args;
5194
5195 ctx.stage = nir->info.stage;
5196 ctx.info = &nir->info;
5197
5198 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5199
5200 nir_foreach_variable(variable, &nir->outputs)
5201 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5202 ctx.stage);
5203
5204 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5205 _mesa_key_pointer_equal);
5206 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5207 _mesa_key_pointer_equal);
5208 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5209 _mesa_key_pointer_equal);
5210
5211 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5212
5213 nir_index_ssa_defs(func->impl);
5214 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5215
5216 setup_locals(&ctx, func);
5217 setup_scratch(&ctx, nir);
5218 setup_constant_data(&ctx, nir);
5219
5220 if (gl_shader_stage_is_compute(nir->info.stage))
5221 setup_shared(&ctx, nir);
5222
5223 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5224 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5225 /* true = don't kill. */
5226 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5227 }
5228
5229 visit_cf_list(&ctx, &func->impl->body);
5230 phi_post_pass(&ctx);
5231
5232 if (ctx.ac.postponed_kill)
5233 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5234 ctx.ac.postponed_kill, ""));
5235
5236 if (!gl_shader_stage_is_compute(nir->info.stage))
5237 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5238 ctx.abi->outputs);
5239
5240 free(ctx.locals);
5241 free(ctx.ssa_defs);
5242 ralloc_free(ctx.defs);
5243 ralloc_free(ctx.phis);
5244 ralloc_free(ctx.vars);
5245 }
5246
5247 bool
5248 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5249 {
5250 bool progress = false;
5251
5252 /* Lower large variables to scratch first so that we won't bloat the
5253 * shader by generating large if ladders for them. We later lower
5254 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5255 */
5256 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5257 nir_var_function_temp,
5258 256,
5259 glsl_get_natural_size_align_bytes);
5260
5261 /* While it would be nice not to have this flag, we are constrained
5262 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5263 */
5264 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5265
5266 /* TODO: Indirect indexing of GS inputs is unimplemented.
5267 *
5268 * TCS and TES load inputs directly from LDS or offchip memory, so
5269 * indirect indexing is trivial.
5270 */
5271 nir_variable_mode indirect_mask = 0;
5272 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5273 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5274 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5275 !llvm_has_working_vgpr_indexing)) {
5276 indirect_mask |= nir_var_shader_in;
5277 }
5278 if (!llvm_has_working_vgpr_indexing &&
5279 nir->info.stage != MESA_SHADER_TESS_CTRL)
5280 indirect_mask |= nir_var_shader_out;
5281
5282 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5283 * smart enough to handle indirects without causing excess spilling
5284 * causing the gpu to hang.
5285 *
5286 * See the following thread for more details of the problem:
5287 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5288 */
5289 indirect_mask |= nir_var_function_temp;
5290
5291 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5292 return progress;
5293 }
5294
5295 static unsigned
5296 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5297 {
5298 if (intrin->intrinsic != nir_intrinsic_store_deref)
5299 return 0;
5300
5301 nir_variable *var =
5302 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5303
5304 if (var->data.mode != nir_var_shader_out)
5305 return 0;
5306
5307 unsigned writemask = 0;
5308 const int location = var->data.location;
5309 unsigned first_component = var->data.location_frac;
5310 unsigned num_comps = intrin->dest.ssa.num_components;
5311
5312 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5313 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5314 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5315 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5316
5317 return writemask;
5318 }
5319
5320 static void
5321 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5322 unsigned *cond_block_tf_writemask,
5323 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5324 {
5325 switch (cf_node->type) {
5326 case nir_cf_node_block: {
5327 nir_block *block = nir_cf_node_as_block(cf_node);
5328 nir_foreach_instr(instr, block) {
5329 if (instr->type != nir_instr_type_intrinsic)
5330 continue;
5331
5332 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5333 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5334
5335 /* If we find a barrier in nested control flow put this in the
5336 * too hard basket. In GLSL this is not possible but it is in
5337 * SPIR-V.
5338 */
5339 if (is_nested_cf) {
5340 *tessfactors_are_def_in_all_invocs = false;
5341 return;
5342 }
5343
5344 /* The following case must be prevented:
5345 * gl_TessLevelInner = ...;
5346 * barrier();
5347 * if (gl_InvocationID == 1)
5348 * gl_TessLevelInner = ...;
5349 *
5350 * If you consider disjoint code segments separated by barriers, each
5351 * such segment that writes tess factor channels should write the same
5352 * channels in all codepaths within that segment.
5353 */
5354 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5355 /* Accumulate the result: */
5356 *tessfactors_are_def_in_all_invocs &=
5357 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5358
5359 /* Analyze the next code segment from scratch. */
5360 *upper_block_tf_writemask = 0;
5361 *cond_block_tf_writemask = 0;
5362 }
5363 } else
5364 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5365 }
5366
5367 break;
5368 }
5369 case nir_cf_node_if: {
5370 unsigned then_tessfactor_writemask = 0;
5371 unsigned else_tessfactor_writemask = 0;
5372
5373 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5374 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5375 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5376 cond_block_tf_writemask,
5377 tessfactors_are_def_in_all_invocs, true);
5378 }
5379
5380 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5381 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5382 cond_block_tf_writemask,
5383 tessfactors_are_def_in_all_invocs, true);
5384 }
5385
5386 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5387 /* If both statements write the same tess factor channels,
5388 * we can say that the upper block writes them too.
5389 */
5390 *upper_block_tf_writemask |= then_tessfactor_writemask &
5391 else_tessfactor_writemask;
5392 *cond_block_tf_writemask |= then_tessfactor_writemask |
5393 else_tessfactor_writemask;
5394 }
5395
5396 break;
5397 }
5398 case nir_cf_node_loop: {
5399 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5400 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5401 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5402 cond_block_tf_writemask,
5403 tessfactors_are_def_in_all_invocs, true);
5404 }
5405
5406 break;
5407 }
5408 default:
5409 unreachable("unknown cf node type");
5410 }
5411 }
5412
5413 bool
5414 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5415 {
5416 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5417
5418 /* The pass works as follows:
5419 * If all codepaths write tess factors, we can say that all
5420 * invocations define tess factors.
5421 *
5422 * Each tess factor channel is tracked separately.
5423 */
5424 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5425 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5426
5427 /* Initial value = true. Here the pass will accumulate results from
5428 * multiple segments surrounded by barriers. If tess factors aren't
5429 * written at all, it's a shader bug and we don't care if this will be
5430 * true.
5431 */
5432 bool tessfactors_are_def_in_all_invocs = true;
5433
5434 nir_foreach_function(function, nir) {
5435 if (function->impl) {
5436 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5437 scan_tess_ctrl(node, &main_block_tf_writemask,
5438 &cond_block_tf_writemask,
5439 &tessfactors_are_def_in_all_invocs,
5440 false);
5441 }
5442 }
5443 }
5444
5445 /* Accumulate the result for the last code segment separated by a
5446 * barrier.
5447 */
5448 if (main_block_tf_writemask || cond_block_tf_writemask) {
5449 tessfactors_are_def_in_all_invocs &=
5450 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5451 }
5452
5453 return tessfactors_are_def_in_all_invocs;
5454 }