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ac/nir: add support for nir_texop_fragment_{mask}_fetch
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54
55 LLVMValueRef main_function;
56 LLVMBasicBlockRef continue_block;
57 LLVMBasicBlockRef break_block;
58
59 int num_locals;
60 LLVMValueRef *locals;
61 };
62
63 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
64 nir_deref_instr *deref_instr,
65 enum ac_descriptor_type desc_type,
66 const nir_instr *instr,
67 bool image, bool write);
68
69 static void
70 build_store_values_extended(struct ac_llvm_context *ac,
71 LLVMValueRef *values,
72 unsigned value_count,
73 unsigned value_stride,
74 LLVMValueRef vec)
75 {
76 LLVMBuilderRef builder = ac->builder;
77 unsigned i;
78
79 for (i = 0; i < value_count; i++) {
80 LLVMValueRef ptr = values[i * value_stride];
81 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
82 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
83 LLVMBuildStore(builder, value, ptr);
84 }
85 }
86
87 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
88 const nir_ssa_def *def)
89 {
90 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
91 if (def->num_components > 1) {
92 type = LLVMVectorType(type, def->num_components);
93 }
94 return type;
95 }
96
97 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
98 {
99 assert(src.is_ssa);
100 return nir->ssa_defs[src.ssa->index];
101 }
102
103 static LLVMValueRef
104 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
105 {
106 LLVMValueRef ptr = get_src(ctx, src);
107 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
108 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
109
110 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
111
112 return LLVMBuildBitCast(ctx->ac.builder, ptr,
113 LLVMPointerType(type, addr_space), "");
114 }
115
116 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
117 const struct nir_block *b)
118 {
119 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
120 return (LLVMBasicBlockRef)entry->data;
121 }
122
123 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
124 nir_alu_src src,
125 unsigned num_components)
126 {
127 LLVMValueRef value = get_src(ctx, src.src);
128 bool need_swizzle = false;
129
130 assert(value);
131 unsigned src_components = ac_get_llvm_num_components(value);
132 for (unsigned i = 0; i < num_components; ++i) {
133 assert(src.swizzle[i] < src_components);
134 if (src.swizzle[i] != i)
135 need_swizzle = true;
136 }
137
138 if (need_swizzle || num_components != src_components) {
139 LLVMValueRef masks[] = {
140 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
141 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
142 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
143 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
144
145 if (src_components > 1 && num_components == 1) {
146 value = LLVMBuildExtractElement(ctx->ac.builder, value,
147 masks[0], "");
148 } else if (src_components == 1 && num_components > 1) {
149 LLVMValueRef values[] = {value, value, value, value};
150 value = ac_build_gather_values(&ctx->ac, values, num_components);
151 } else {
152 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
153 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
154 swizzle, "");
155 }
156 }
157 assert(!src.negate);
158 assert(!src.abs);
159 return value;
160 }
161
162 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
163 LLVMIntPredicate pred, LLVMValueRef src0,
164 LLVMValueRef src1)
165 {
166 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
167 return LLVMBuildSelect(ctx->builder, result,
168 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
169 ctx->i32_0, "");
170 }
171
172 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
173 LLVMRealPredicate pred, LLVMValueRef src0,
174 LLVMValueRef src1)
175 {
176 LLVMValueRef result;
177 src0 = ac_to_float(ctx, src0);
178 src1 = ac_to_float(ctx, src1);
179 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
180 return LLVMBuildSelect(ctx->builder, result,
181 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
182 ctx->i32_0, "");
183 }
184
185 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
186 const char *intrin,
187 LLVMTypeRef result_type,
188 LLVMValueRef src0)
189 {
190 char name[64];
191 LLVMValueRef params[] = {
192 ac_to_float(ctx, src0),
193 };
194
195 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
196 ac_get_elem_bits(ctx, result_type));
197 assert(length < sizeof(name));
198 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
199 }
200
201 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
202 const char *intrin,
203 LLVMTypeRef result_type,
204 LLVMValueRef src0, LLVMValueRef src1)
205 {
206 char name[64];
207 LLVMValueRef params[] = {
208 ac_to_float(ctx, src0),
209 ac_to_float(ctx, src1),
210 };
211
212 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
213 ac_get_elem_bits(ctx, result_type));
214 assert(length < sizeof(name));
215 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
216 }
217
218 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
219 const char *intrin,
220 LLVMTypeRef result_type,
221 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
222 {
223 char name[64];
224 LLVMValueRef params[] = {
225 ac_to_float(ctx, src0),
226 ac_to_float(ctx, src1),
227 ac_to_float(ctx, src2),
228 };
229
230 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
231 ac_get_elem_bits(ctx, result_type));
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
237 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
238 {
239 LLVMTypeRef src1_type = LLVMTypeOf(src1);
240 LLVMTypeRef src2_type = LLVMTypeOf(src2);
241
242 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
243
244 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
245 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
246 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
247 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
248 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
249 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
250 }
251
252 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
253 ctx->i32_0, "");
254 return LLVMBuildSelect(ctx->builder, v,
255 ac_to_integer_or_pointer(ctx, src1),
256 ac_to_integer_or_pointer(ctx, src2), "");
257 }
258
259 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
260 LLVMValueRef src0)
261 {
262 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
263 }
264
265 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
266 const char *intrin,
267 LLVMValueRef src0, LLVMValueRef src1)
268 {
269 LLVMTypeRef ret_type;
270 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
271 LLVMValueRef res;
272 LLVMValueRef params[] = { src0, src1 };
273 ret_type = LLVMStructTypeInContext(ctx->context, types,
274 2, true);
275
276 res = ac_build_intrinsic(ctx, intrin, ret_type,
277 params, 2, AC_FUNC_ATTR_READNONE);
278
279 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
280 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
281 return res;
282 }
283
284 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
285 LLVMValueRef src0,
286 unsigned bitsize)
287 {
288 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
289 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
290 "");
291 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
292
293 switch (bitsize) {
294 case 16:
295 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
296 case 32:
297 return result;
298 case 64:
299 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
300 default:
301 unreachable("Unsupported bit size.");
302 }
303 }
304
305 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
306 LLVMValueRef src0)
307 {
308 src0 = ac_to_float(ctx, src0);
309 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
310 return LLVMBuildSExt(ctx->builder,
311 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
312 ctx->i32, "");
313 }
314
315 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
316 LLVMValueRef src0,
317 unsigned bitsize)
318 {
319 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
320
321 switch (bitsize) {
322 case 8:
323 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
324 case 16:
325 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
326 case 32:
327 return result;
328 case 64:
329 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
330 default:
331 unreachable("Unsupported bit size.");
332 }
333 }
334
335 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
336 LLVMValueRef src0)
337 {
338 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
339 return LLVMBuildSExt(ctx->builder,
340 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
341 ctx->i32, "");
342 }
343
344 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
345 LLVMValueRef src0)
346 {
347 LLVMValueRef result;
348 LLVMValueRef cond = NULL;
349
350 src0 = ac_to_float(ctx, src0);
351 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
352
353 if (ctx->chip_class >= GFX8) {
354 LLVMValueRef args[2];
355 /* Check if the result is a denormal - and flush to 0 if so. */
356 args[0] = result;
357 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
358 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
359 }
360
361 /* need to convert back up to f32 */
362 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
363
364 if (ctx->chip_class >= GFX8)
365 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
366 else {
367 /* for GFX6-GFX7 */
368 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
369 * so compare the result and flush to 0 if it's smaller.
370 */
371 LLVMValueRef temp, cond2;
372 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
373 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
374 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
375 temp, "");
376 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
377 temp, ctx->f32_0, "");
378 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
379 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
380 }
381 return result;
382 }
383
384 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
385 LLVMValueRef src0, LLVMValueRef src1)
386 {
387 LLVMValueRef dst64, result;
388 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
389 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
390
391 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
392 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
393 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
394 return result;
395 }
396
397 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
398 LLVMValueRef src0, LLVMValueRef src1)
399 {
400 LLVMValueRef dst64, result;
401 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
402 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
403
404 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
405 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
406 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
407 return result;
408 }
409
410 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
411 LLVMValueRef bits, LLVMValueRef offset)
412 {
413 /* mask = ((1 << bits) - 1) << offset */
414 return LLVMBuildShl(ctx->builder,
415 LLVMBuildSub(ctx->builder,
416 LLVMBuildShl(ctx->builder,
417 ctx->i32_1,
418 bits, ""),
419 ctx->i32_1, ""),
420 offset, "");
421 }
422
423 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
424 LLVMValueRef mask, LLVMValueRef insert,
425 LLVMValueRef base)
426 {
427 /* Calculate:
428 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
429 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
430 */
431 return LLVMBuildXor(ctx->builder, base,
432 LLVMBuildAnd(ctx->builder, mask,
433 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
434 }
435
436 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
437 LLVMValueRef src0,
438 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
439 LLVMValueRef args[2]))
440 {
441 LLVMValueRef comp[2];
442
443 src0 = ac_to_float(ctx, src0);
444 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
445 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
446
447 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
448 }
449
450 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
451 LLVMValueRef src0)
452 {
453 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
454 LLVMValueRef temps[2], val;
455 int i;
456
457 for (i = 0; i < 2; i++) {
458 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
459 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
460 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
461 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
462 }
463 return ac_build_gather_values(ctx, temps, 2);
464 }
465
466 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
467 nir_op op,
468 LLVMValueRef src0)
469 {
470 unsigned mask;
471 int idx;
472 LLVMValueRef result;
473
474 if (op == nir_op_fddx_fine)
475 mask = AC_TID_MASK_LEFT;
476 else if (op == nir_op_fddy_fine)
477 mask = AC_TID_MASK_TOP;
478 else
479 mask = AC_TID_MASK_TOP_LEFT;
480
481 /* for DDX we want to next X pixel, DDY next Y pixel. */
482 if (op == nir_op_fddx_fine ||
483 op == nir_op_fddx_coarse ||
484 op == nir_op_fddx)
485 idx = 1;
486 else
487 idx = 2;
488
489 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
490 return result;
491 }
492
493 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
494 {
495 LLVMValueRef src[4], result = NULL;
496 unsigned num_components = instr->dest.dest.ssa.num_components;
497 unsigned src_components;
498 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
499
500 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
501 switch (instr->op) {
502 case nir_op_vec2:
503 case nir_op_vec3:
504 case nir_op_vec4:
505 src_components = 1;
506 break;
507 case nir_op_pack_half_2x16:
508 case nir_op_pack_snorm_2x16:
509 case nir_op_pack_unorm_2x16:
510 src_components = 2;
511 break;
512 case nir_op_unpack_half_2x16:
513 src_components = 1;
514 break;
515 case nir_op_cube_face_coord:
516 case nir_op_cube_face_index:
517 src_components = 3;
518 break;
519 default:
520 src_components = num_components;
521 break;
522 }
523 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
524 src[i] = get_alu_src(ctx, instr->src[i], src_components);
525
526 switch (instr->op) {
527 case nir_op_mov:
528 result = src[0];
529 break;
530 case nir_op_fneg:
531 src[0] = ac_to_float(&ctx->ac, src[0]);
532 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
533 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
534 /* fneg will be optimized by backend compiler with sign
535 * bit removed via XOR. This is probably a LLVM bug.
536 */
537 result = ac_build_canonicalize(&ctx->ac, result,
538 instr->dest.dest.ssa.bit_size);
539 }
540 break;
541 case nir_op_ineg:
542 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
543 break;
544 case nir_op_inot:
545 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
546 break;
547 case nir_op_iadd:
548 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
549 break;
550 case nir_op_fadd:
551 src[0] = ac_to_float(&ctx->ac, src[0]);
552 src[1] = ac_to_float(&ctx->ac, src[1]);
553 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
554 break;
555 case nir_op_fsub:
556 src[0] = ac_to_float(&ctx->ac, src[0]);
557 src[1] = ac_to_float(&ctx->ac, src[1]);
558 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
559 break;
560 case nir_op_isub:
561 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
562 break;
563 case nir_op_imul:
564 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
565 break;
566 case nir_op_imod:
567 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
568 break;
569 case nir_op_umod:
570 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_fmod:
573 /* lower_fmod only lower 16-bit and 32-bit fmod */
574 assert(instr->dest.dest.ssa.bit_size == 64);
575 src[0] = ac_to_float(&ctx->ac, src[0]);
576 src[1] = ac_to_float(&ctx->ac, src[1]);
577 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
578 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
579 ac_to_float_type(&ctx->ac, def_type), result);
580 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
581 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
582 break;
583 case nir_op_irem:
584 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
585 break;
586 case nir_op_idiv:
587 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
588 break;
589 case nir_op_udiv:
590 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
591 break;
592 case nir_op_fmul:
593 src[0] = ac_to_float(&ctx->ac, src[0]);
594 src[1] = ac_to_float(&ctx->ac, src[1]);
595 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
596 break;
597 case nir_op_frcp:
598 src[0] = ac_to_float(&ctx->ac, src[0]);
599 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
600 break;
601 case nir_op_iand:
602 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_ior:
605 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_ixor:
608 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
609 break;
610 case nir_op_ishl:
611 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
612 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
613 LLVMTypeOf(src[0]), "");
614 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
615 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
616 LLVMTypeOf(src[0]), "");
617 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_ishr:
620 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
621 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
622 LLVMTypeOf(src[0]), "");
623 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
624 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
625 LLVMTypeOf(src[0]), "");
626 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
627 break;
628 case nir_op_ushr:
629 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
630 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
631 LLVMTypeOf(src[0]), "");
632 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
633 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
634 LLVMTypeOf(src[0]), "");
635 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_ilt32:
638 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
639 break;
640 case nir_op_ine32:
641 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
642 break;
643 case nir_op_ieq32:
644 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
645 break;
646 case nir_op_ige32:
647 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
648 break;
649 case nir_op_ult32:
650 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
651 break;
652 case nir_op_uge32:
653 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
654 break;
655 case nir_op_feq32:
656 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
657 break;
658 case nir_op_fne32:
659 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
660 break;
661 case nir_op_flt32:
662 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
663 break;
664 case nir_op_fge32:
665 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
666 break;
667 case nir_op_fabs:
668 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
669 ac_to_float_type(&ctx->ac, def_type), src[0]);
670 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
671 /* fabs will be optimized by backend compiler with sign
672 * bit removed via AND.
673 */
674 result = ac_build_canonicalize(&ctx->ac, result,
675 instr->dest.dest.ssa.bit_size);
676 }
677 break;
678 case nir_op_iabs:
679 result = emit_iabs(&ctx->ac, src[0]);
680 break;
681 case nir_op_imax:
682 result = ac_build_imax(&ctx->ac, src[0], src[1]);
683 break;
684 case nir_op_imin:
685 result = ac_build_imin(&ctx->ac, src[0], src[1]);
686 break;
687 case nir_op_umax:
688 result = ac_build_umax(&ctx->ac, src[0], src[1]);
689 break;
690 case nir_op_umin:
691 result = ac_build_umin(&ctx->ac, src[0], src[1]);
692 break;
693 case nir_op_isign:
694 result = ac_build_isign(&ctx->ac, src[0],
695 instr->dest.dest.ssa.bit_size);
696 break;
697 case nir_op_fsign:
698 src[0] = ac_to_float(&ctx->ac, src[0]);
699 result = ac_build_fsign(&ctx->ac, src[0],
700 instr->dest.dest.ssa.bit_size);
701 break;
702 case nir_op_ffloor:
703 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
704 ac_to_float_type(&ctx->ac, def_type), src[0]);
705 break;
706 case nir_op_ftrunc:
707 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
708 ac_to_float_type(&ctx->ac, def_type), src[0]);
709 break;
710 case nir_op_fceil:
711 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
712 ac_to_float_type(&ctx->ac, def_type), src[0]);
713 break;
714 case nir_op_fround_even:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
716 ac_to_float_type(&ctx->ac, def_type),src[0]);
717 break;
718 case nir_op_ffract:
719 src[0] = ac_to_float(&ctx->ac, src[0]);
720 result = ac_build_fract(&ctx->ac, src[0],
721 instr->dest.dest.ssa.bit_size);
722 break;
723 case nir_op_fsin:
724 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
725 ac_to_float_type(&ctx->ac, def_type), src[0]);
726 break;
727 case nir_op_fcos:
728 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
729 ac_to_float_type(&ctx->ac, def_type), src[0]);
730 break;
731 case nir_op_fsqrt:
732 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
733 ac_to_float_type(&ctx->ac, def_type), src[0]);
734 break;
735 case nir_op_fexp2:
736 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
737 ac_to_float_type(&ctx->ac, def_type), src[0]);
738 break;
739 case nir_op_flog2:
740 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
741 ac_to_float_type(&ctx->ac, def_type), src[0]);
742 break;
743 case nir_op_frsq:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
747 break;
748 case nir_op_frexp_exp:
749 src[0] = ac_to_float(&ctx->ac, src[0]);
750 result = ac_build_frexp_exp(&ctx->ac, src[0],
751 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
752 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
753 result = LLVMBuildSExt(ctx->ac.builder, result,
754 ctx->ac.i32, "");
755 break;
756 case nir_op_frexp_sig:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_frexp_mant(&ctx->ac, src[0],
759 instr->dest.dest.ssa.bit_size);
760 break;
761 case nir_op_fpow:
762 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
763 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
764 break;
765 case nir_op_fmax:
766 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
767 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
768 if (ctx->ac.chip_class < GFX9 &&
769 instr->dest.dest.ssa.bit_size == 32) {
770 /* Only pre-GFX9 chips do not flush denorms. */
771 result = ac_build_canonicalize(&ctx->ac, result,
772 instr->dest.dest.ssa.bit_size);
773 }
774 break;
775 case nir_op_fmin:
776 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
777 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
778 if (ctx->ac.chip_class < GFX9 &&
779 instr->dest.dest.ssa.bit_size == 32) {
780 /* Only pre-GFX9 chips do not flush denorms. */
781 result = ac_build_canonicalize(&ctx->ac, result,
782 instr->dest.dest.ssa.bit_size);
783 }
784 break;
785 case nir_op_ffma:
786 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
787 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
788 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
789 break;
790 case nir_op_ldexp:
791 src[0] = ac_to_float(&ctx->ac, src[0]);
792 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
793 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
794 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
795 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
796 else
797 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
798 break;
799 case nir_op_bfm:
800 result = emit_bfm(&ctx->ac, src[0], src[1]);
801 break;
802 case nir_op_bitfield_select:
803 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
804 break;
805 case nir_op_ubfe:
806 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
807 break;
808 case nir_op_ibfe:
809 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
810 break;
811 case nir_op_bitfield_reverse:
812 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
813 break;
814 case nir_op_bit_count:
815 result = ac_build_bit_count(&ctx->ac, src[0]);
816 break;
817 case nir_op_vec2:
818 case nir_op_vec3:
819 case nir_op_vec4:
820 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
821 src[i] = ac_to_integer(&ctx->ac, src[i]);
822 result = ac_build_gather_values(&ctx->ac, src, num_components);
823 break;
824 case nir_op_f2i8:
825 case nir_op_f2i16:
826 case nir_op_f2i32:
827 case nir_op_f2i64:
828 src[0] = ac_to_float(&ctx->ac, src[0]);
829 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
830 break;
831 case nir_op_f2u8:
832 case nir_op_f2u16:
833 case nir_op_f2u32:
834 case nir_op_f2u64:
835 src[0] = ac_to_float(&ctx->ac, src[0]);
836 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
837 break;
838 case nir_op_i2f16:
839 case nir_op_i2f32:
840 case nir_op_i2f64:
841 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
842 break;
843 case nir_op_u2f16:
844 case nir_op_u2f32:
845 case nir_op_u2f64:
846 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
847 break;
848 case nir_op_f2f16_rtz:
849 src[0] = ac_to_float(&ctx->ac, src[0]);
850 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
851 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
852 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
853 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
854 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
855 break;
856 case nir_op_f2f16_rtne:
857 case nir_op_f2f16:
858 case nir_op_f2f32:
859 case nir_op_f2f64:
860 src[0] = ac_to_float(&ctx->ac, src[0]);
861 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
862 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
863 else
864 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
865 break;
866 case nir_op_u2u8:
867 case nir_op_u2u16:
868 case nir_op_u2u32:
869 case nir_op_u2u64:
870 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
871 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
872 else
873 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
874 break;
875 case nir_op_i2i8:
876 case nir_op_i2i16:
877 case nir_op_i2i32:
878 case nir_op_i2i64:
879 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
880 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
881 else
882 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
883 break;
884 case nir_op_b32csel:
885 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
886 break;
887 case nir_op_find_lsb:
888 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
889 break;
890 case nir_op_ufind_msb:
891 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
892 break;
893 case nir_op_ifind_msb:
894 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
895 break;
896 case nir_op_uadd_carry:
897 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
898 break;
899 case nir_op_usub_borrow:
900 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
901 break;
902 case nir_op_b2f16:
903 case nir_op_b2f32:
904 case nir_op_b2f64:
905 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
906 break;
907 case nir_op_f2b32:
908 result = emit_f2b(&ctx->ac, src[0]);
909 break;
910 case nir_op_b2i8:
911 case nir_op_b2i16:
912 case nir_op_b2i32:
913 case nir_op_b2i64:
914 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
915 break;
916 case nir_op_i2b32:
917 result = emit_i2b(&ctx->ac, src[0]);
918 break;
919 case nir_op_fquantize2f16:
920 result = emit_f2f16(&ctx->ac, src[0]);
921 break;
922 case nir_op_umul_high:
923 result = emit_umul_high(&ctx->ac, src[0], src[1]);
924 break;
925 case nir_op_imul_high:
926 result = emit_imul_high(&ctx->ac, src[0], src[1]);
927 break;
928 case nir_op_pack_half_2x16:
929 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
930 break;
931 case nir_op_pack_snorm_2x16:
932 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
933 break;
934 case nir_op_pack_unorm_2x16:
935 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
936 break;
937 case nir_op_unpack_half_2x16:
938 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
939 break;
940 case nir_op_fddx:
941 case nir_op_fddy:
942 case nir_op_fddx_fine:
943 case nir_op_fddy_fine:
944 case nir_op_fddx_coarse:
945 case nir_op_fddy_coarse:
946 result = emit_ddxy(ctx, instr->op, src[0]);
947 break;
948
949 case nir_op_unpack_64_2x32_split_x: {
950 assert(ac_get_llvm_num_components(src[0]) == 1);
951 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
952 ctx->ac.v2i32,
953 "");
954 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
955 ctx->ac.i32_0, "");
956 break;
957 }
958
959 case nir_op_unpack_64_2x32_split_y: {
960 assert(ac_get_llvm_num_components(src[0]) == 1);
961 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
962 ctx->ac.v2i32,
963 "");
964 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
965 ctx->ac.i32_1, "");
966 break;
967 }
968
969 case nir_op_pack_64_2x32_split: {
970 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
971 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
972 break;
973 }
974
975 case nir_op_pack_32_2x16_split: {
976 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
977 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
978 break;
979 }
980
981 case nir_op_unpack_32_2x16_split_x: {
982 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
983 ctx->ac.v2i16,
984 "");
985 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
986 ctx->ac.i32_0, "");
987 break;
988 }
989
990 case nir_op_unpack_32_2x16_split_y: {
991 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
992 ctx->ac.v2i16,
993 "");
994 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
995 ctx->ac.i32_1, "");
996 break;
997 }
998
999 case nir_op_cube_face_coord: {
1000 src[0] = ac_to_float(&ctx->ac, src[0]);
1001 LLVMValueRef results[2];
1002 LLVMValueRef in[3];
1003 for (unsigned chan = 0; chan < 3; chan++)
1004 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1005 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1006 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1007 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1008 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1009 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1010 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1011 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1012 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1013 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1014 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1015 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1016 result = ac_build_gather_values(&ctx->ac, results, 2);
1017 break;
1018 }
1019
1020 case nir_op_cube_face_index: {
1021 src[0] = ac_to_float(&ctx->ac, src[0]);
1022 LLVMValueRef in[3];
1023 for (unsigned chan = 0; chan < 3; chan++)
1024 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1025 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1026 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1027 break;
1028 }
1029
1030 case nir_op_fmin3:
1031 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1032 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1033 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1034 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1035 break;
1036 case nir_op_umin3:
1037 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1038 result = ac_build_umin(&ctx->ac, result, src[2]);
1039 break;
1040 case nir_op_imin3:
1041 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1042 result = ac_build_imin(&ctx->ac, result, src[2]);
1043 break;
1044 case nir_op_fmax3:
1045 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1046 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1047 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1048 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1049 break;
1050 case nir_op_umax3:
1051 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1052 result = ac_build_umax(&ctx->ac, result, src[2]);
1053 break;
1054 case nir_op_imax3:
1055 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1056 result = ac_build_imax(&ctx->ac, result, src[2]);
1057 break;
1058 case nir_op_fmed3: {
1059 src[0] = ac_to_float(&ctx->ac, src[0]);
1060 src[1] = ac_to_float(&ctx->ac, src[1]);
1061 src[2] = ac_to_float(&ctx->ac, src[2]);
1062 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1063 instr->dest.dest.ssa.bit_size);
1064 break;
1065 }
1066 case nir_op_imed3: {
1067 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1068 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1069 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1070 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1071 break;
1072 }
1073 case nir_op_umed3: {
1074 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1075 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1076 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1077 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1078 break;
1079 }
1080
1081 default:
1082 fprintf(stderr, "Unknown NIR alu instr: ");
1083 nir_print_instr(&instr->instr, stderr);
1084 fprintf(stderr, "\n");
1085 abort();
1086 }
1087
1088 if (result) {
1089 assert(instr->dest.dest.is_ssa);
1090 result = ac_to_integer_or_pointer(&ctx->ac, result);
1091 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1092 }
1093 }
1094
1095 static void visit_load_const(struct ac_nir_context *ctx,
1096 const nir_load_const_instr *instr)
1097 {
1098 LLVMValueRef values[4], value = NULL;
1099 LLVMTypeRef element_type =
1100 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1101
1102 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1103 switch (instr->def.bit_size) {
1104 case 8:
1105 values[i] = LLVMConstInt(element_type,
1106 instr->value[i].u8, false);
1107 break;
1108 case 16:
1109 values[i] = LLVMConstInt(element_type,
1110 instr->value[i].u16, false);
1111 break;
1112 case 32:
1113 values[i] = LLVMConstInt(element_type,
1114 instr->value[i].u32, false);
1115 break;
1116 case 64:
1117 values[i] = LLVMConstInt(element_type,
1118 instr->value[i].u64, false);
1119 break;
1120 default:
1121 fprintf(stderr,
1122 "unsupported nir load_const bit_size: %d\n",
1123 instr->def.bit_size);
1124 abort();
1125 }
1126 }
1127 if (instr->def.num_components > 1) {
1128 value = LLVMConstVector(values, instr->def.num_components);
1129 } else
1130 value = values[0];
1131
1132 ctx->ssa_defs[instr->def.index] = value;
1133 }
1134
1135 static LLVMValueRef
1136 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1137 {
1138 LLVMValueRef size =
1139 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1140 LLVMConstInt(ctx->ac.i32, 2, false), "");
1141
1142 /* GFX8 only */
1143 if (ctx->ac.chip_class == GFX8 && in_elements) {
1144 /* On GFX8, the descriptor contains the size in bytes,
1145 * but TXQ must return the size in elements.
1146 * The stride is always non-zero for resources using TXQ.
1147 */
1148 LLVMValueRef stride =
1149 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1150 ctx->ac.i32_1, "");
1151 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1152 LLVMConstInt(ctx->ac.i32, 16, false), "");
1153 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1154 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1155
1156 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1157 }
1158 return size;
1159 }
1160
1161 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1162 * incorrectly forces nearest filtering if the texture format is integer.
1163 * The only effect it has on Gather4, which always returns 4 texels for
1164 * bilinear filtering, is that the final coordinates are off by 0.5 of
1165 * the texel size.
1166 *
1167 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1168 * or (0.5 / size) from the normalized coordinates.
1169 *
1170 * However, cube textures with 8_8_8_8 data formats require a different
1171 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1172 * precision in 32-bit data formats, so it needs to be applied dynamically at
1173 * runtime. In this case, return an i1 value that indicates whether the
1174 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1175 */
1176 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1177 nir_variable *var,
1178 struct ac_image_args *args,
1179 const nir_tex_instr *instr)
1180 {
1181 const struct glsl_type *type = glsl_without_array(var->type);
1182 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1183 LLVMValueRef wa_8888 = NULL;
1184 LLVMValueRef half_texel[2];
1185 LLVMValueRef result;
1186
1187 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1188
1189 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1190 LLVMValueRef formats;
1191 LLVMValueRef data_format;
1192 LLVMValueRef wa_formats;
1193
1194 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1195
1196 data_format = LLVMBuildLShr(ctx->builder, formats,
1197 LLVMConstInt(ctx->i32, 20, false), "");
1198 data_format = LLVMBuildAnd(ctx->builder, data_format,
1199 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1200 wa_8888 = LLVMBuildICmp(
1201 ctx->builder, LLVMIntEQ, data_format,
1202 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1203 "");
1204
1205 uint32_t wa_num_format =
1206 stype == GLSL_TYPE_UINT ?
1207 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1208 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1209 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1210 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1211 "");
1212 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1213 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1214
1215 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1216 args->resource = LLVMBuildInsertElement(
1217 ctx->builder, args->resource, formats, ctx->i32_1, "");
1218 }
1219
1220 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1221 assert(!wa_8888);
1222 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1223 } else {
1224 struct ac_image_args resinfo = {};
1225 LLVMBasicBlockRef bbs[2];
1226
1227 LLVMValueRef unnorm = NULL;
1228 LLVMValueRef default_offset = ctx->f32_0;
1229 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1230 !instr->is_array) {
1231 /* In vulkan, whether the sampler uses unnormalized
1232 * coordinates or not is a dynamic property of the
1233 * sampler. Hence, to figure out whether or not we
1234 * need to divide by the texture size, we need to test
1235 * the sampler at runtime. This tests the bit set by
1236 * radv_init_sampler().
1237 */
1238 LLVMValueRef sampler0 =
1239 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1240 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1241 LLVMConstInt(ctx->i32, 15, false), "");
1242 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1243 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1244 default_offset = LLVMConstReal(ctx->f32, -0.5);
1245 }
1246
1247 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1248 if (wa_8888 || unnorm) {
1249 assert(!(wa_8888 && unnorm));
1250 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1251 /* Skip the texture size query entirely if we don't need it. */
1252 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1253 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1254 }
1255
1256 /* Query the texture size. */
1257 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1258 resinfo.opcode = ac_image_get_resinfo;
1259 resinfo.dmask = 0xf;
1260 resinfo.lod = ctx->i32_0;
1261 resinfo.resource = args->resource;
1262 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1263 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1264
1265 /* Compute -0.5 / size. */
1266 for (unsigned c = 0; c < 2; c++) {
1267 half_texel[c] =
1268 LLVMBuildExtractElement(ctx->builder, size,
1269 LLVMConstInt(ctx->i32, c, 0), "");
1270 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1271 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1272 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1273 LLVMConstReal(ctx->f32, -0.5), "");
1274 }
1275
1276 if (wa_8888 || unnorm) {
1277 ac_build_endif(ctx, 2000);
1278
1279 for (unsigned c = 0; c < 2; c++) {
1280 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1281 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1282 values, bbs);
1283 }
1284 }
1285 }
1286
1287 for (unsigned c = 0; c < 2; c++) {
1288 LLVMValueRef tmp;
1289 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1290 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1291 }
1292
1293 args->attributes = AC_FUNC_ATTR_READNONE;
1294 result = ac_build_image_opcode(ctx, args);
1295
1296 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1297 LLVMValueRef tmp, tmp2;
1298
1299 /* if the cube workaround is in place, f2i the result. */
1300 for (unsigned c = 0; c < 4; c++) {
1301 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1302 if (stype == GLSL_TYPE_UINT)
1303 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1304 else
1305 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1306 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1307 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1308 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1309 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1310 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1311 }
1312 }
1313 return result;
1314 }
1315
1316 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1317 {
1318 nir_deref_instr *texture_deref_instr = NULL;
1319
1320 for (unsigned i = 0; i < instr->num_srcs; i++) {
1321 switch (instr->src[i].src_type) {
1322 case nir_tex_src_texture_deref:
1323 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1324 break;
1325 default:
1326 break;
1327 }
1328 }
1329 return texture_deref_instr;
1330 }
1331
1332 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1333 const nir_tex_instr *instr,
1334 struct ac_image_args *args)
1335 {
1336 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1337 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1338
1339 return ac_build_buffer_load_format(&ctx->ac,
1340 args->resource,
1341 args->coords[0],
1342 ctx->ac.i32_0,
1343 util_last_bit(mask),
1344 0, true);
1345 }
1346
1347 args->opcode = ac_image_sample;
1348
1349 switch (instr->op) {
1350 case nir_texop_txf:
1351 case nir_texop_txf_ms:
1352 case nir_texop_samples_identical:
1353 args->opcode = args->level_zero ||
1354 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1355 ac_image_load : ac_image_load_mip;
1356 args->level_zero = false;
1357 break;
1358 case nir_texop_txs:
1359 case nir_texop_query_levels:
1360 args->opcode = ac_image_get_resinfo;
1361 if (!args->lod)
1362 args->lod = ctx->ac.i32_0;
1363 args->level_zero = false;
1364 break;
1365 case nir_texop_tex:
1366 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1367 assert(!args->lod);
1368 args->level_zero = true;
1369 }
1370 break;
1371 case nir_texop_tg4:
1372 args->opcode = ac_image_gather4;
1373 args->level_zero = true;
1374 break;
1375 case nir_texop_lod:
1376 args->opcode = ac_image_get_lod;
1377 break;
1378 case nir_texop_fragment_fetch:
1379 case nir_texop_fragment_mask_fetch:
1380 args->opcode = ac_image_load;
1381 args->level_zero = false;
1382 break;
1383 default:
1384 break;
1385 }
1386
1387 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1388 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1389 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1390 const struct glsl_type *type = glsl_without_array(var->type);
1391 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1392 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1393 return lower_gather4_integer(&ctx->ac, var, args, instr);
1394 }
1395 }
1396
1397 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1398 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1399 if ((args->dim == ac_image_2darray ||
1400 args->dim == ac_image_2d) && !args->coords[1]) {
1401 args->coords[1] = ctx->ac.i32_0;
1402 }
1403 }
1404
1405 args->attributes = AC_FUNC_ATTR_READNONE;
1406 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1407 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1408 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1409 /* Prevent texture instructions with implicit derivatives from being
1410 * sinked into branches. */
1411 switch (instr->op) {
1412 case nir_texop_tex:
1413 case nir_texop_txb:
1414 case nir_texop_lod:
1415 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1416 break;
1417 default:
1418 break;
1419 }
1420 }
1421
1422 return ac_build_image_opcode(&ctx->ac, args);
1423 }
1424
1425 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1426 nir_intrinsic_instr *instr)
1427 {
1428 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1429 LLVMValueRef index = get_src(ctx, instr->src[1]);
1430
1431 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1432 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1433 return result;
1434 }
1435
1436 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1437 nir_intrinsic_instr *instr)
1438 {
1439 LLVMValueRef ptr, addr;
1440 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1441 unsigned index = nir_intrinsic_base(instr);
1442
1443 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1444 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1445
1446 /* Load constant values from user SGPRS when possible, otherwise
1447 * fallback to the default path that loads directly from memory.
1448 */
1449 if (LLVMIsConstant(src0) &&
1450 instr->dest.ssa.bit_size == 32) {
1451 unsigned count = instr->dest.ssa.num_components;
1452 unsigned offset = index;
1453
1454 offset += LLVMConstIntGetZExtValue(src0);
1455 offset /= 4;
1456
1457 offset -= ctx->args->base_inline_push_consts;
1458
1459 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1460 if (offset + count <= num_inline_push_consts) {
1461 LLVMValueRef push_constants[num_inline_push_consts];
1462 for (unsigned i = 0; i < num_inline_push_consts; i++)
1463 push_constants[i] = ac_get_arg(&ctx->ac,
1464 ctx->args->inline_push_consts[i]);
1465 return ac_build_gather_values(&ctx->ac,
1466 push_constants + offset,
1467 count);
1468 }
1469 }
1470
1471 ptr = LLVMBuildGEP(ctx->ac.builder,
1472 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1473
1474 if (instr->dest.ssa.bit_size == 8) {
1475 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1476 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1477 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1478 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1479
1480 LLVMValueRef params[3];
1481 if (load_dwords > 1) {
1482 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1483 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1484 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1485 } else {
1486 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1487 params[0] = ctx->ac.i32_0;
1488 params[1] = res;
1489 }
1490 params[2] = addr;
1491 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1492
1493 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1494 if (instr->dest.ssa.num_components > 1)
1495 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1496 return res;
1497 } else if (instr->dest.ssa.bit_size == 16) {
1498 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1499 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1500 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1501 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1502 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1503 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1504 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1505 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1506 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1507 LLVMConstInt(ctx->ac.i32, 4, false)};
1508 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1509 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1510 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1511 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1512 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1513 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1514 }
1515
1516 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1517
1518 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1519 }
1520
1521 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1522 const nir_intrinsic_instr *instr)
1523 {
1524 LLVMValueRef index = get_src(ctx, instr->src[0]);
1525
1526 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1527 }
1528
1529 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1530 {
1531 uint32_t new_mask = 0;
1532 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1533 if (mask & (1u << i))
1534 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1535 return new_mask;
1536 }
1537
1538 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1539 unsigned start, unsigned count)
1540 {
1541 LLVMValueRef mask[] = {
1542 ctx->i32_0, ctx->i32_1,
1543 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1544
1545 unsigned src_elements = ac_get_llvm_num_components(src);
1546
1547 if (count == src_elements) {
1548 assert(start == 0);
1549 return src;
1550 } else if (count == 1) {
1551 assert(start < src_elements);
1552 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1553 } else {
1554 assert(start + count <= src_elements);
1555 assert(count <= 4);
1556 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1557 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1558 }
1559 }
1560
1561 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1562 enum gl_access_qualifier access,
1563 bool may_store_unaligned,
1564 bool writeonly_memory)
1565 {
1566 unsigned cache_policy = 0;
1567
1568 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1569 * store opcodes not aligned to a dword are affected. The only way to
1570 * get unaligned stores is through shader images.
1571 */
1572 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1573 /* If this is write-only, don't keep data in L1 to prevent
1574 * evicting L1 cache lines that may be needed by other
1575 * instructions.
1576 */
1577 writeonly_memory ||
1578 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1579 cache_policy |= ac_glc;
1580 }
1581
1582 if (access & ACCESS_STREAM_CACHE_POLICY)
1583 cache_policy |= ac_slc;
1584
1585 return cache_policy;
1586 }
1587
1588 static void visit_store_ssbo(struct ac_nir_context *ctx,
1589 nir_intrinsic_instr *instr)
1590 {
1591 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1592 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1593 unsigned writemask = nir_intrinsic_write_mask(instr);
1594 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1595 bool writeonly_memory = access & ACCESS_NON_READABLE;
1596 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1597
1598 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1599 get_src(ctx, instr->src[1]), true);
1600 LLVMValueRef base_data = src_data;
1601 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1602 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1603
1604 while (writemask) {
1605 int start, count;
1606 LLVMValueRef data, offset;
1607 LLVMTypeRef data_type;
1608
1609 u_bit_scan_consecutive_range(&writemask, &start, &count);
1610
1611 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1612 * writes into a 2-element and a 1-element write. */
1613 if (count == 3 &&
1614 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1615 writemask |= 1 << (start + 2);
1616 count = 2;
1617 }
1618 int num_bytes = count * elem_size_bytes; /* count in bytes */
1619
1620 /* we can only store 4 DWords at the same time.
1621 * can only happen for 64 Bit vectors. */
1622 if (num_bytes > 16) {
1623 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1624 count = 2;
1625 num_bytes = 16;
1626 }
1627
1628 /* check alignment of 16 Bit stores */
1629 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1630 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1631 count = 1;
1632 num_bytes = 2;
1633 }
1634 data = extract_vector_range(&ctx->ac, base_data, start, count);
1635
1636 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1637 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1638
1639 if (num_bytes == 1) {
1640 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1641 offset, ctx->ac.i32_0,
1642 cache_policy);
1643 } else if (num_bytes == 2) {
1644 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1645 offset, ctx->ac.i32_0,
1646 cache_policy);
1647 } else {
1648 int num_channels = num_bytes / 4;
1649
1650 switch (num_bytes) {
1651 case 16: /* v4f32 */
1652 data_type = ctx->ac.v4f32;
1653 break;
1654 case 12: /* v3f32 */
1655 data_type = ctx->ac.v3f32;
1656 break;
1657 case 8: /* v2f32 */
1658 data_type = ctx->ac.v2f32;
1659 break;
1660 case 4: /* f32 */
1661 data_type = ctx->ac.f32;
1662 break;
1663 default:
1664 unreachable("Malformed vector store.");
1665 }
1666 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1667
1668 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1669 num_channels, offset,
1670 ctx->ac.i32_0, 0,
1671 cache_policy);
1672 }
1673 }
1674 }
1675
1676 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1677 LLVMValueRef descriptor,
1678 LLVMValueRef offset,
1679 LLVMValueRef compare,
1680 LLVMValueRef exchange)
1681 {
1682 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1683 if (ctx->abi->robust_buffer_access) {
1684 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1685
1686 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1687 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1688
1689 ac_build_ifcc(&ctx->ac, cond, -1);
1690
1691 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1692 }
1693
1694 LLVMValueRef ptr_parts[2] = {
1695 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1696 LLVMBuildAnd(ctx->ac.builder,
1697 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1698 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1699 };
1700
1701 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1702 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1703
1704 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1705
1706 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1707 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1708 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1709 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1710
1711 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1712 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1713
1714 if (ctx->abi->robust_buffer_access) {
1715 ac_build_endif(&ctx->ac, -1);
1716
1717 LLVMBasicBlockRef incoming_blocks[2] = {
1718 start_block,
1719 then_block,
1720 };
1721
1722 LLVMValueRef incoming_values[2] = {
1723 LLVMConstInt(ctx->ac.i64, 0, 0),
1724 result,
1725 };
1726 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1727 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1728 return ret;
1729 } else {
1730 return result;
1731 }
1732 }
1733
1734 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1735 const nir_intrinsic_instr *instr)
1736 {
1737 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1738 const char *op;
1739 char name[64], type[8];
1740 LLVMValueRef params[6], descriptor;
1741 int arg_count = 0;
1742
1743 switch (instr->intrinsic) {
1744 case nir_intrinsic_ssbo_atomic_add:
1745 op = "add";
1746 break;
1747 case nir_intrinsic_ssbo_atomic_imin:
1748 op = "smin";
1749 break;
1750 case nir_intrinsic_ssbo_atomic_umin:
1751 op = "umin";
1752 break;
1753 case nir_intrinsic_ssbo_atomic_imax:
1754 op = "smax";
1755 break;
1756 case nir_intrinsic_ssbo_atomic_umax:
1757 op = "umax";
1758 break;
1759 case nir_intrinsic_ssbo_atomic_and:
1760 op = "and";
1761 break;
1762 case nir_intrinsic_ssbo_atomic_or:
1763 op = "or";
1764 break;
1765 case nir_intrinsic_ssbo_atomic_xor:
1766 op = "xor";
1767 break;
1768 case nir_intrinsic_ssbo_atomic_exchange:
1769 op = "swap";
1770 break;
1771 case nir_intrinsic_ssbo_atomic_comp_swap:
1772 op = "cmpswap";
1773 break;
1774 default:
1775 abort();
1776 }
1777
1778 descriptor = ctx->abi->load_ssbo(ctx->abi,
1779 get_src(ctx, instr->src[0]),
1780 true);
1781
1782 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1783 return_type == ctx->ac.i64) {
1784 return emit_ssbo_comp_swap_64(ctx, descriptor,
1785 get_src(ctx, instr->src[1]),
1786 get_src(ctx, instr->src[2]),
1787 get_src(ctx, instr->src[3]));
1788 }
1789 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1790 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1791 }
1792 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1793 params[arg_count++] = descriptor;
1794
1795 if (LLVM_VERSION_MAJOR >= 9) {
1796 /* XXX: The new raw/struct atomic intrinsics are buggy with
1797 * LLVM 8, see r358579.
1798 */
1799 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1800 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1801 params[arg_count++] = ctx->ac.i32_0; /* slc */
1802
1803 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1804 snprintf(name, sizeof(name),
1805 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1806 } else {
1807 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1808 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1809 params[arg_count++] = ctx->ac.i1false; /* slc */
1810
1811 assert(return_type == ctx->ac.i32);
1812 snprintf(name, sizeof(name),
1813 "llvm.amdgcn.buffer.atomic.%s", op);
1814 }
1815
1816 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1817 arg_count, 0);
1818 }
1819
1820 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1821 const nir_intrinsic_instr *instr)
1822 {
1823 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1824 int num_components = instr->num_components;
1825 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1826 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1827
1828 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1829 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1830 get_src(ctx, instr->src[0]), false);
1831 LLVMValueRef vindex = ctx->ac.i32_0;
1832
1833 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1834 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1835
1836 LLVMValueRef results[4];
1837 for (int i = 0; i < num_components;) {
1838 int num_elems = num_components - i;
1839 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1840 num_elems = 1;
1841 if (num_elems * elem_size_bytes > 16)
1842 num_elems = 16 / elem_size_bytes;
1843 int load_bytes = num_elems * elem_size_bytes;
1844
1845 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1846
1847 LLVMValueRef ret;
1848
1849 if (load_bytes == 1) {
1850 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1851 rsrc,
1852 offset,
1853 ctx->ac.i32_0,
1854 immoffset,
1855 cache_policy);
1856 } else if (load_bytes == 2) {
1857 ret = ac_build_tbuffer_load_short(&ctx->ac,
1858 rsrc,
1859 offset,
1860 ctx->ac.i32_0,
1861 immoffset,
1862 cache_policy);
1863 } else {
1864 int num_channels = util_next_power_of_two(load_bytes) / 4;
1865 bool can_speculate = access & ACCESS_CAN_REORDER;
1866
1867 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1868 vindex, offset, immoffset, 0,
1869 cache_policy, can_speculate, false);
1870 }
1871
1872 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1873 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1874 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1875
1876 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1877 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1878
1879 for (unsigned j = 0; j < num_elems; j++) {
1880 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1881 }
1882 i += num_elems;
1883 }
1884
1885 return ac_build_gather_values(&ctx->ac, results, num_components);
1886 }
1887
1888 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1889 const nir_intrinsic_instr *instr)
1890 {
1891 LLVMValueRef ret;
1892 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1893 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1894 int num_components = instr->num_components;
1895
1896 if (ctx->abi->load_ubo)
1897 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1898
1899 if (instr->dest.ssa.bit_size == 64)
1900 num_components *= 2;
1901
1902 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1903 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1904 LLVMValueRef results[num_components];
1905 for (unsigned i = 0; i < num_components; ++i) {
1906 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1907 load_bytes * i, 0);
1908
1909 if (load_bytes == 1) {
1910 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1911 rsrc,
1912 offset,
1913 ctx->ac.i32_0,
1914 immoffset,
1915 0);
1916 } else {
1917 assert(load_bytes == 2);
1918 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1919 rsrc,
1920 offset,
1921 ctx->ac.i32_0,
1922 immoffset,
1923 0);
1924 }
1925 }
1926 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1927 } else {
1928 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1929 NULL, 0, 0, true, true);
1930
1931 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1932 }
1933
1934 return LLVMBuildBitCast(ctx->ac.builder, ret,
1935 get_def_type(ctx, &instr->dest.ssa), "");
1936 }
1937
1938 static void
1939 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1940 bool vs_in, unsigned *vertex_index_out,
1941 LLVMValueRef *vertex_index_ref,
1942 unsigned *const_out, LLVMValueRef *indir_out)
1943 {
1944 nir_variable *var = nir_deref_instr_get_variable(instr);
1945 nir_deref_path path;
1946 unsigned idx_lvl = 1;
1947
1948 nir_deref_path_init(&path, instr, NULL);
1949
1950 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1951 if (vertex_index_ref) {
1952 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1953 if (vertex_index_out)
1954 *vertex_index_out = 0;
1955 } else {
1956 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1957 }
1958 ++idx_lvl;
1959 }
1960
1961 uint32_t const_offset = 0;
1962 LLVMValueRef offset = NULL;
1963
1964 if (var->data.compact) {
1965 assert(instr->deref_type == nir_deref_type_array);
1966 const_offset = nir_src_as_uint(instr->arr.index);
1967 goto out;
1968 }
1969
1970 for (; path.path[idx_lvl]; ++idx_lvl) {
1971 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1972 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1973 unsigned index = path.path[idx_lvl]->strct.index;
1974
1975 for (unsigned i = 0; i < index; i++) {
1976 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1977 const_offset += glsl_count_attribute_slots(ft, vs_in);
1978 }
1979 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1980 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1981 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
1982 const_offset += size *
1983 nir_src_as_uint(path.path[idx_lvl]->arr.index);
1984 } else {
1985 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1986 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1987 if (offset)
1988 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1989 else
1990 offset = array_off;
1991 }
1992 } else
1993 unreachable("Uhandled deref type in get_deref_instr_offset");
1994 }
1995
1996 out:
1997 nir_deref_path_finish(&path);
1998
1999 if (const_offset && offset)
2000 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2001 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2002 "");
2003
2004 *const_out = const_offset;
2005 *indir_out = offset;
2006 }
2007
2008 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2009 nir_intrinsic_instr *instr,
2010 bool load_inputs)
2011 {
2012 LLVMValueRef result;
2013 LLVMValueRef vertex_index = NULL;
2014 LLVMValueRef indir_index = NULL;
2015 unsigned const_index = 0;
2016
2017 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2018
2019 unsigned location = var->data.location;
2020 unsigned driver_location = var->data.driver_location;
2021 const bool is_patch = var->data.patch ||
2022 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2023 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2024 const bool is_compact = var->data.compact;
2025
2026 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2027 false, NULL, is_patch ? NULL : &vertex_index,
2028 &const_index, &indir_index);
2029
2030 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2031
2032 LLVMTypeRef src_component_type;
2033 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2034 src_component_type = LLVMGetElementType(dest_type);
2035 else
2036 src_component_type = dest_type;
2037
2038 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2039 vertex_index, indir_index,
2040 const_index, location, driver_location,
2041 var->data.location_frac,
2042 instr->num_components,
2043 is_patch, is_compact, load_inputs);
2044 if (instr->dest.ssa.bit_size == 16) {
2045 result = ac_to_integer(&ctx->ac, result);
2046 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2047 }
2048 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2049 }
2050
2051 static unsigned
2052 type_scalar_size_bytes(const struct glsl_type *type)
2053 {
2054 assert(glsl_type_is_vector_or_scalar(type) ||
2055 glsl_type_is_matrix(type));
2056 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2057 }
2058
2059 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2060 nir_intrinsic_instr *instr)
2061 {
2062 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2063 nir_variable *var = nir_deref_instr_get_variable(deref);
2064
2065 LLVMValueRef values[8];
2066 int idx = 0;
2067 int ve = instr->dest.ssa.num_components;
2068 unsigned comp = 0;
2069 LLVMValueRef indir_index;
2070 LLVMValueRef ret;
2071 unsigned const_index;
2072 unsigned stride = 4;
2073 int mode = deref->mode;
2074
2075 if (var) {
2076 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2077 var->data.mode == nir_var_shader_in;
2078 idx = var->data.driver_location;
2079 comp = var->data.location_frac;
2080 mode = var->data.mode;
2081
2082 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2083 &const_index, &indir_index);
2084
2085 if (var->data.compact) {
2086 stride = 1;
2087 const_index += comp;
2088 comp = 0;
2089 }
2090 }
2091
2092 if (instr->dest.ssa.bit_size == 64 &&
2093 (deref->mode == nir_var_shader_in ||
2094 deref->mode == nir_var_shader_out ||
2095 deref->mode == nir_var_function_temp))
2096 ve *= 2;
2097
2098 switch (mode) {
2099 case nir_var_shader_in:
2100 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2101 ctx->stage == MESA_SHADER_TESS_EVAL) {
2102 return load_tess_varyings(ctx, instr, true);
2103 }
2104
2105 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2106 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2107 LLVMValueRef indir_index;
2108 unsigned const_index, vertex_index;
2109 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2110 &const_index, &indir_index);
2111 assert(indir_index == NULL);
2112
2113 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2114 var->data.driver_location,
2115 var->data.location_frac,
2116 instr->num_components, vertex_index, const_index, type);
2117 }
2118
2119 for (unsigned chan = comp; chan < ve + comp; chan++) {
2120 if (indir_index) {
2121 unsigned count = glsl_count_attribute_slots(
2122 var->type,
2123 ctx->stage == MESA_SHADER_VERTEX);
2124 count -= chan / 4;
2125 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2126 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2127 stride, false, true);
2128
2129 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2130 tmp_vec,
2131 indir_index, "");
2132 } else
2133 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2134 }
2135 break;
2136 case nir_var_function_temp:
2137 for (unsigned chan = 0; chan < ve; chan++) {
2138 if (indir_index) {
2139 unsigned count = glsl_count_attribute_slots(
2140 var->type, false);
2141 count -= chan / 4;
2142 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2143 &ctx->ac, ctx->locals + idx + chan, count,
2144 stride, true, true);
2145
2146 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2147 tmp_vec,
2148 indir_index, "");
2149 } else {
2150 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2151 }
2152 }
2153 break;
2154 case nir_var_shader_out:
2155 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2156 return load_tess_varyings(ctx, instr, false);
2157 }
2158
2159 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2160 var->data.fb_fetch_output &&
2161 ctx->abi->emit_fbfetch)
2162 return ctx->abi->emit_fbfetch(ctx->abi);
2163
2164 for (unsigned chan = comp; chan < ve + comp; chan++) {
2165 if (indir_index) {
2166 unsigned count = glsl_count_attribute_slots(
2167 var->type, false);
2168 count -= chan / 4;
2169 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2170 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2171 stride, true, true);
2172
2173 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2174 tmp_vec,
2175 indir_index, "");
2176 } else {
2177 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2178 ctx->abi->outputs[idx + chan + const_index * stride],
2179 "");
2180 }
2181 }
2182 break;
2183 case nir_var_mem_global: {
2184 LLVMValueRef address = get_src(ctx, instr->src[0]);
2185 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2186 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2187 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2188
2189 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2190 if (stride != natural_stride) {
2191 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2192 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2193 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2194
2195 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2196 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2197 values[i] = LLVMBuildLoad(ctx->ac.builder,
2198 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2199 }
2200 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2201 } else {
2202 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2203 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2204 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2205 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2206 return val;
2207 }
2208 }
2209 default:
2210 unreachable("unhandle variable mode");
2211 }
2212 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2213 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2214 }
2215
2216 static void
2217 visit_store_var(struct ac_nir_context *ctx,
2218 nir_intrinsic_instr *instr)
2219 {
2220 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2221 nir_variable *var = nir_deref_instr_get_variable(deref);
2222
2223 LLVMValueRef temp_ptr, value;
2224 int idx = 0;
2225 unsigned comp = 0;
2226 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2227 int writemask = instr->const_index[0];
2228 LLVMValueRef indir_index;
2229 unsigned const_index;
2230
2231 if (var) {
2232 get_deref_offset(ctx, deref, false,
2233 NULL, NULL, &const_index, &indir_index);
2234 idx = var->data.driver_location;
2235 comp = var->data.location_frac;
2236
2237 if (var->data.compact) {
2238 const_index += comp;
2239 comp = 0;
2240 }
2241 }
2242
2243 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2244 (deref->mode == nir_var_shader_out ||
2245 deref->mode == nir_var_function_temp)) {
2246
2247 src = LLVMBuildBitCast(ctx->ac.builder, src,
2248 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2249 "");
2250
2251 writemask = widen_mask(writemask, 2);
2252 }
2253
2254 writemask = writemask << comp;
2255
2256 switch (deref->mode) {
2257 case nir_var_shader_out:
2258
2259 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2260 LLVMValueRef vertex_index = NULL;
2261 LLVMValueRef indir_index = NULL;
2262 unsigned const_index = 0;
2263 const bool is_patch = var->data.patch ||
2264 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2265 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2266
2267 get_deref_offset(ctx, deref, false, NULL,
2268 is_patch ? NULL : &vertex_index,
2269 &const_index, &indir_index);
2270
2271 ctx->abi->store_tcs_outputs(ctx->abi, var,
2272 vertex_index, indir_index,
2273 const_index, src, writemask);
2274 return;
2275 }
2276
2277 for (unsigned chan = 0; chan < 8; chan++) {
2278 int stride = 4;
2279 if (!(writemask & (1 << chan)))
2280 continue;
2281
2282 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2283
2284 if (var->data.compact)
2285 stride = 1;
2286 if (indir_index) {
2287 unsigned count = glsl_count_attribute_slots(
2288 var->type, false);
2289 count -= chan / 4;
2290 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2291 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2292 stride, true, true);
2293
2294 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2295 value, indir_index, "");
2296 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2297 count, stride, tmp_vec);
2298
2299 } else {
2300 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2301
2302 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2303 }
2304 }
2305 break;
2306 case nir_var_function_temp:
2307 for (unsigned chan = 0; chan < 8; chan++) {
2308 if (!(writemask & (1 << chan)))
2309 continue;
2310
2311 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2312 if (indir_index) {
2313 unsigned count = glsl_count_attribute_slots(
2314 var->type, false);
2315 count -= chan / 4;
2316 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2317 &ctx->ac, ctx->locals + idx + chan, count,
2318 4, true, true);
2319
2320 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2321 value, indir_index, "");
2322 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2323 count, 4, tmp_vec);
2324 } else {
2325 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2326
2327 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2328 }
2329 }
2330 break;
2331
2332 case nir_var_mem_global: {
2333 int writemask = instr->const_index[0];
2334 LLVMValueRef address = get_src(ctx, instr->src[0]);
2335 LLVMValueRef val = get_src(ctx, instr->src[1]);
2336
2337 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2338 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2339 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2340
2341 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2342 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2343 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2344
2345 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2346 stride == natural_stride) {
2347 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2348 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2349 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2350
2351 val = LLVMBuildBitCast(ctx->ac.builder, val,
2352 LLVMGetElementType(LLVMTypeOf(address)), "");
2353 LLVMBuildStore(ctx->ac.builder, val, address);
2354 } else {
2355 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2356 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2357 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2358 for (unsigned chan = 0; chan < 4; chan++) {
2359 if (!(writemask & (1 << chan)))
2360 continue;
2361
2362 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2363
2364 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2365 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2366 chan);
2367 src = LLVMBuildBitCast(ctx->ac.builder, src,
2368 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2369 LLVMBuildStore(ctx->ac.builder, src, ptr);
2370 }
2371 }
2372 break;
2373 }
2374 default:
2375 abort();
2376 break;
2377 }
2378 }
2379
2380 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2381 {
2382 switch (dim) {
2383 case GLSL_SAMPLER_DIM_BUF:
2384 return 1;
2385 case GLSL_SAMPLER_DIM_1D:
2386 return array ? 2 : 1;
2387 case GLSL_SAMPLER_DIM_2D:
2388 return array ? 3 : 2;
2389 case GLSL_SAMPLER_DIM_MS:
2390 return array ? 4 : 3;
2391 case GLSL_SAMPLER_DIM_3D:
2392 case GLSL_SAMPLER_DIM_CUBE:
2393 return 3;
2394 case GLSL_SAMPLER_DIM_RECT:
2395 case GLSL_SAMPLER_DIM_SUBPASS:
2396 return 2;
2397 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2398 return 3;
2399 default:
2400 break;
2401 }
2402 return 0;
2403 }
2404
2405 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2406 LLVMValueRef coord_x, LLVMValueRef coord_y,
2407 LLVMValueRef coord_z,
2408 LLVMValueRef sample_index,
2409 LLVMValueRef fmask_desc_ptr)
2410 {
2411 unsigned sample_chan = coord_z ? 3 : 2;
2412 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2413 addr[sample_chan] = sample_index;
2414
2415 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2416 return addr[sample_chan];
2417 }
2418
2419 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2420 {
2421 assert(instr->src[0].is_ssa);
2422 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2423 }
2424
2425 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2426 const nir_intrinsic_instr *instr,
2427 enum ac_descriptor_type desc_type,
2428 bool write)
2429 {
2430 nir_deref_instr *deref_instr =
2431 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2432 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2433
2434 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2435 }
2436
2437 static void get_image_coords(struct ac_nir_context *ctx,
2438 const nir_intrinsic_instr *instr,
2439 struct ac_image_args *args,
2440 enum glsl_sampler_dim dim,
2441 bool is_array)
2442 {
2443 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2444 LLVMValueRef masks[] = {
2445 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2446 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2447 };
2448 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2449
2450 int count;
2451 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2452 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2453 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2454 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2455 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2456 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2457 count = image_type_to_components_count(dim, is_array);
2458
2459 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2460 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2461 LLVMValueRef fmask_load_address[3];
2462
2463 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2464 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2465 if (is_array)
2466 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2467 else
2468 fmask_load_address[2] = NULL;
2469
2470 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2471 fmask_load_address[0],
2472 fmask_load_address[1],
2473 fmask_load_address[2],
2474 sample_index,
2475 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2476 AC_DESC_FMASK, &instr->instr, true, false));
2477 }
2478 if (count == 1 && !gfx9_1d) {
2479 if (instr->src[1].ssa->num_components)
2480 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2481 else
2482 args->coords[0] = src0;
2483 } else {
2484 int chan;
2485 if (is_ms)
2486 count--;
2487 for (chan = 0; chan < count; ++chan) {
2488 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2489 }
2490
2491 if (gfx9_1d) {
2492 if (is_array) {
2493 args->coords[2] = args->coords[1];
2494 args->coords[1] = ctx->ac.i32_0;
2495 } else
2496 args->coords[1] = ctx->ac.i32_0;
2497 count++;
2498 }
2499 if (ctx->ac.chip_class == GFX9 &&
2500 dim == GLSL_SAMPLER_DIM_2D &&
2501 !is_array) {
2502 /* The hw can't bind a slice of a 3D image as a 2D
2503 * image, because it ignores BASE_ARRAY if the target
2504 * is 3D. The workaround is to read BASE_ARRAY and set
2505 * it as the 3rd address operand for all 2D images.
2506 */
2507 LLVMValueRef first_layer, const5, mask;
2508
2509 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2510 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2511 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2512 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2513
2514 args->coords[count] = first_layer;
2515 count++;
2516 }
2517
2518
2519 if (is_ms) {
2520 args->coords[count] = sample_index;
2521 count++;
2522 }
2523 }
2524 }
2525
2526 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2527 const nir_intrinsic_instr *instr,
2528 bool write, bool atomic)
2529 {
2530 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2531 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2532 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2533 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2534 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2535
2536 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2537 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2538 elem_count, stride, "");
2539
2540 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2541 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2542 }
2543 return rsrc;
2544 }
2545
2546 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2547 const nir_intrinsic_instr *instr,
2548 bool bindless)
2549 {
2550 LLVMValueRef res;
2551
2552 enum glsl_sampler_dim dim;
2553 enum gl_access_qualifier access;
2554 bool is_array;
2555 if (bindless) {
2556 dim = nir_intrinsic_image_dim(instr);
2557 access = nir_intrinsic_access(instr);
2558 is_array = nir_intrinsic_image_array(instr);
2559 } else {
2560 const nir_deref_instr *image_deref = get_image_deref(instr);
2561 const struct glsl_type *type = image_deref->type;
2562 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2563 dim = glsl_get_sampler_dim(type);
2564 access = var->data.access;
2565 is_array = glsl_sampler_type_is_array(type);
2566 }
2567
2568 struct ac_image_args args = {};
2569
2570 args.cache_policy = get_cache_policy(ctx, access, false, false);
2571
2572 if (dim == GLSL_SAMPLER_DIM_BUF) {
2573 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2574 unsigned num_channels = util_last_bit(mask);
2575 LLVMValueRef rsrc, vindex;
2576
2577 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2578 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2579 ctx->ac.i32_0, "");
2580
2581 bool can_speculate = access & ACCESS_CAN_REORDER;
2582 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2583 ctx->ac.i32_0, num_channels,
2584 args.cache_policy,
2585 can_speculate);
2586 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2587
2588 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2589 res = ac_to_integer(&ctx->ac, res);
2590 } else {
2591 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2592
2593 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2594 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2595 get_image_coords(ctx, instr, &args, dim, is_array);
2596 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2597 if (!level_zero)
2598 args.lod = get_src(ctx, instr->src[3]);
2599 args.dmask = 15;
2600 args.attributes = AC_FUNC_ATTR_READONLY;
2601
2602 res = ac_build_image_opcode(&ctx->ac, &args);
2603 }
2604 return res;
2605 }
2606
2607 static void visit_image_store(struct ac_nir_context *ctx,
2608 nir_intrinsic_instr *instr,
2609 bool bindless)
2610 {
2611
2612
2613 enum glsl_sampler_dim dim;
2614 enum gl_access_qualifier access;
2615 bool is_array;
2616 if (bindless) {
2617 dim = nir_intrinsic_image_dim(instr);
2618 access = nir_intrinsic_access(instr);
2619 is_array = nir_intrinsic_image_array(instr);
2620 } else {
2621 const nir_deref_instr *image_deref = get_image_deref(instr);
2622 const struct glsl_type *type = image_deref->type;
2623 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2624 dim = glsl_get_sampler_dim(type);
2625 access = var->data.access;
2626 is_array = glsl_sampler_type_is_array(type);
2627 }
2628
2629 bool writeonly_memory = access & ACCESS_NON_READABLE;
2630 struct ac_image_args args = {};
2631
2632 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2633
2634 if (dim == GLSL_SAMPLER_DIM_BUF) {
2635 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2636 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2637 unsigned src_channels = ac_get_llvm_num_components(src);
2638 LLVMValueRef vindex;
2639
2640 if (src_channels == 3)
2641 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2642
2643 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2644 get_src(ctx, instr->src[1]),
2645 ctx->ac.i32_0, "");
2646
2647 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2648 ctx->ac.i32_0, src_channels,
2649 args.cache_policy);
2650 } else {
2651 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2652
2653 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2654 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2655 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2656 get_image_coords(ctx, instr, &args, dim, is_array);
2657 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2658 if (!level_zero)
2659 args.lod = get_src(ctx, instr->src[4]);
2660 args.dmask = 15;
2661
2662 ac_build_image_opcode(&ctx->ac, &args);
2663 }
2664
2665 }
2666
2667 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2668 const nir_intrinsic_instr *instr,
2669 bool bindless)
2670 {
2671 LLVMValueRef params[7];
2672 int param_count = 0;
2673
2674 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2675 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2676 const char *atomic_name;
2677 char intrinsic_name[64];
2678 enum ac_atomic_op atomic_subop;
2679 ASSERTED int length;
2680
2681 enum glsl_sampler_dim dim;
2682 bool is_array;
2683 if (bindless) {
2684 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2685 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2686 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2687 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2688 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2689 assert(format == GL_R32UI || format == GL_R32I);
2690 }
2691 dim = nir_intrinsic_image_dim(instr);
2692 is_array = nir_intrinsic_image_array(instr);
2693 } else {
2694 const struct glsl_type *type = get_image_deref(instr)->type;
2695 dim = glsl_get_sampler_dim(type);
2696 is_array = glsl_sampler_type_is_array(type);
2697 }
2698
2699 switch (instr->intrinsic) {
2700 case nir_intrinsic_bindless_image_atomic_add:
2701 case nir_intrinsic_image_deref_atomic_add:
2702 atomic_name = "add";
2703 atomic_subop = ac_atomic_add;
2704 break;
2705 case nir_intrinsic_bindless_image_atomic_imin:
2706 case nir_intrinsic_image_deref_atomic_imin:
2707 atomic_name = "smin";
2708 atomic_subop = ac_atomic_smin;
2709 break;
2710 case nir_intrinsic_bindless_image_atomic_umin:
2711 case nir_intrinsic_image_deref_atomic_umin:
2712 atomic_name = "umin";
2713 atomic_subop = ac_atomic_umin;
2714 break;
2715 case nir_intrinsic_bindless_image_atomic_imax:
2716 case nir_intrinsic_image_deref_atomic_imax:
2717 atomic_name = "smax";
2718 atomic_subop = ac_atomic_smax;
2719 break;
2720 case nir_intrinsic_bindless_image_atomic_umax:
2721 case nir_intrinsic_image_deref_atomic_umax:
2722 atomic_name = "umax";
2723 atomic_subop = ac_atomic_umax;
2724 break;
2725 case nir_intrinsic_bindless_image_atomic_and:
2726 case nir_intrinsic_image_deref_atomic_and:
2727 atomic_name = "and";
2728 atomic_subop = ac_atomic_and;
2729 break;
2730 case nir_intrinsic_bindless_image_atomic_or:
2731 case nir_intrinsic_image_deref_atomic_or:
2732 atomic_name = "or";
2733 atomic_subop = ac_atomic_or;
2734 break;
2735 case nir_intrinsic_bindless_image_atomic_xor:
2736 case nir_intrinsic_image_deref_atomic_xor:
2737 atomic_name = "xor";
2738 atomic_subop = ac_atomic_xor;
2739 break;
2740 case nir_intrinsic_bindless_image_atomic_exchange:
2741 case nir_intrinsic_image_deref_atomic_exchange:
2742 atomic_name = "swap";
2743 atomic_subop = ac_atomic_swap;
2744 break;
2745 case nir_intrinsic_bindless_image_atomic_comp_swap:
2746 case nir_intrinsic_image_deref_atomic_comp_swap:
2747 atomic_name = "cmpswap";
2748 atomic_subop = 0; /* not used */
2749 break;
2750 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2751 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2752 atomic_name = "inc";
2753 atomic_subop = ac_atomic_inc_wrap;
2754 /* ATOMIC_INC instruction does:
2755 * value = (value + 1) % (data + 1)
2756 * but we want:
2757 * value = (value + 1) % data
2758 * So replace 'data' by 'data - 1'.
2759 */
2760 ctx->ssa_defs[instr->src[3].ssa->index] =
2761 LLVMBuildSub(ctx->ac.builder,
2762 ctx->ssa_defs[instr->src[3].ssa->index],
2763 ctx->ac.i32_1, "");
2764 break;
2765 }
2766 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2767 case nir_intrinsic_image_deref_atomic_dec_wrap:
2768 atomic_name = "dec";
2769 atomic_subop = ac_atomic_dec_wrap;
2770 break;
2771 default:
2772 abort();
2773 }
2774
2775 if (cmpswap)
2776 params[param_count++] = get_src(ctx, instr->src[4]);
2777 params[param_count++] = get_src(ctx, instr->src[3]);
2778
2779 if (dim == GLSL_SAMPLER_DIM_BUF) {
2780 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2781 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2782 ctx->ac.i32_0, ""); /* vindex */
2783 params[param_count++] = ctx->ac.i32_0; /* voffset */
2784 if (LLVM_VERSION_MAJOR >= 9) {
2785 /* XXX: The new raw/struct atomic intrinsics are buggy
2786 * with LLVM 8, see r358579.
2787 */
2788 params[param_count++] = ctx->ac.i32_0; /* soffset */
2789 params[param_count++] = ctx->ac.i32_0; /* slc */
2790
2791 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2792 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2793 } else {
2794 params[param_count++] = ctx->ac.i1false; /* slc */
2795
2796 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2797 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2798 }
2799
2800 assert(length < sizeof(intrinsic_name));
2801 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2802 params, param_count, 0);
2803 } else {
2804 struct ac_image_args args = {};
2805 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2806 args.atomic = atomic_subop;
2807 args.data[0] = params[0];
2808 if (cmpswap)
2809 args.data[1] = params[1];
2810 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2811 get_image_coords(ctx, instr, &args, dim, is_array);
2812 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2813
2814 return ac_build_image_opcode(&ctx->ac, &args);
2815 }
2816 }
2817
2818 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2819 const nir_intrinsic_instr *instr)
2820 {
2821 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2822
2823 return ac_build_image_get_sample_count(&ctx->ac, rsrc);
2824 }
2825
2826 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2827 const nir_intrinsic_instr *instr,
2828 bool bindless)
2829 {
2830 LLVMValueRef res;
2831
2832 enum glsl_sampler_dim dim;
2833 bool is_array;
2834 if (bindless) {
2835 dim = nir_intrinsic_image_dim(instr);
2836 is_array = nir_intrinsic_image_array(instr);
2837 } else {
2838 const struct glsl_type *type = get_image_deref(instr)->type;
2839 dim = glsl_get_sampler_dim(type);
2840 is_array = glsl_sampler_type_is_array(type);
2841 }
2842
2843 if (dim == GLSL_SAMPLER_DIM_BUF)
2844 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2845
2846 struct ac_image_args args = { 0 };
2847
2848 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2849 args.dmask = 0xf;
2850 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2851 args.opcode = ac_image_get_resinfo;
2852 args.lod = ctx->ac.i32_0;
2853 args.attributes = AC_FUNC_ATTR_READNONE;
2854
2855 res = ac_build_image_opcode(&ctx->ac, &args);
2856
2857 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2858
2859 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2860 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2861 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2862 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2863 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2864 }
2865 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2866 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2867 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2868 ctx->ac.i32_1, "");
2869
2870 }
2871 return res;
2872 }
2873
2874 static void emit_membar(struct ac_llvm_context *ac,
2875 const nir_intrinsic_instr *instr)
2876 {
2877 unsigned wait_flags = 0;
2878
2879 switch (instr->intrinsic) {
2880 case nir_intrinsic_memory_barrier:
2881 case nir_intrinsic_group_memory_barrier:
2882 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2883 break;
2884 case nir_intrinsic_memory_barrier_buffer:
2885 case nir_intrinsic_memory_barrier_image:
2886 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2887 break;
2888 case nir_intrinsic_memory_barrier_shared:
2889 wait_flags = AC_WAIT_LGKM;
2890 break;
2891 default:
2892 break;
2893 }
2894
2895 ac_build_waitcnt(ac, wait_flags);
2896 }
2897
2898 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2899 {
2900 /* GFX6 only (thanks to a hw bug workaround):
2901 * The real barrier instruction isn’t needed, because an entire patch
2902 * always fits into a single wave.
2903 */
2904 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2905 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2906 return;
2907 }
2908 ac_build_s_barrier(ac);
2909 }
2910
2911 static void emit_discard(struct ac_nir_context *ctx,
2912 const nir_intrinsic_instr *instr)
2913 {
2914 LLVMValueRef cond;
2915
2916 if (instr->intrinsic == nir_intrinsic_discard_if) {
2917 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2918 get_src(ctx, instr->src[0]),
2919 ctx->ac.i32_0, "");
2920 } else {
2921 assert(instr->intrinsic == nir_intrinsic_discard);
2922 cond = ctx->ac.i1false;
2923 }
2924
2925 ctx->abi->emit_kill(ctx->abi, cond);
2926 }
2927
2928 static LLVMValueRef
2929 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2930 {
2931 LLVMValueRef result;
2932 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2933 result = LLVMBuildAnd(ctx->ac.builder,
2934 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2935 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2936
2937 if (ctx->ac.wave_size == 32)
2938 result = LLVMBuildLShr(ctx->ac.builder, result,
2939 LLVMConstInt(ctx->ac.i32, 1, false), "");
2940
2941 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2942 }
2943
2944 static LLVMValueRef
2945 visit_load_subgroup_id(struct ac_nir_context *ctx)
2946 {
2947 if (ctx->stage == MESA_SHADER_COMPUTE) {
2948 LLVMValueRef result;
2949 result = LLVMBuildAnd(ctx->ac.builder,
2950 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2951 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2952 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2953 } else {
2954 return LLVMConstInt(ctx->ac.i32, 0, false);
2955 }
2956 }
2957
2958 static LLVMValueRef
2959 visit_load_num_subgroups(struct ac_nir_context *ctx)
2960 {
2961 if (ctx->stage == MESA_SHADER_COMPUTE) {
2962 return LLVMBuildAnd(ctx->ac.builder,
2963 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2964 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2965 } else {
2966 return LLVMConstInt(ctx->ac.i32, 1, false);
2967 }
2968 }
2969
2970 static LLVMValueRef
2971 visit_first_invocation(struct ac_nir_context *ctx)
2972 {
2973 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2974 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2975
2976 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2977 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2978 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2979 ctx->ac.iN_wavemask, args, 2,
2980 AC_FUNC_ATTR_NOUNWIND |
2981 AC_FUNC_ATTR_READNONE);
2982
2983 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2984 }
2985
2986 static LLVMValueRef
2987 visit_load_shared(struct ac_nir_context *ctx,
2988 const nir_intrinsic_instr *instr)
2989 {
2990 LLVMValueRef values[4], derived_ptr, index, ret;
2991
2992 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
2993 instr->dest.ssa.bit_size);
2994
2995 for (int chan = 0; chan < instr->num_components; chan++) {
2996 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2997 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2998 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2999 }
3000
3001 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3002 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3003 }
3004
3005 static void
3006 visit_store_shared(struct ac_nir_context *ctx,
3007 const nir_intrinsic_instr *instr)
3008 {
3009 LLVMValueRef derived_ptr, data,index;
3010 LLVMBuilderRef builder = ctx->ac.builder;
3011
3012 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3013 instr->src[0].ssa->bit_size);
3014 LLVMValueRef src = get_src(ctx, instr->src[0]);
3015
3016 int writemask = nir_intrinsic_write_mask(instr);
3017 for (int chan = 0; chan < 4; chan++) {
3018 if (!(writemask & (1 << chan))) {
3019 continue;
3020 }
3021 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3022 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3023 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3024 LLVMBuildStore(builder, data, derived_ptr);
3025 }
3026 }
3027
3028 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3029 const nir_intrinsic_instr *instr,
3030 LLVMValueRef ptr, int src_idx)
3031 {
3032 LLVMValueRef result;
3033 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3034
3035 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3036
3037 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3038 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3039 if (deref->mode == nir_var_mem_global) {
3040 /* use "singlethread" sync scope to implement relaxed ordering */
3041 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3042
3043 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3044 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3045 }
3046 }
3047
3048 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3049 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3050 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3051 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3052 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3053 } else {
3054 LLVMAtomicRMWBinOp op;
3055 switch (instr->intrinsic) {
3056 case nir_intrinsic_shared_atomic_add:
3057 case nir_intrinsic_deref_atomic_add:
3058 op = LLVMAtomicRMWBinOpAdd;
3059 break;
3060 case nir_intrinsic_shared_atomic_umin:
3061 case nir_intrinsic_deref_atomic_umin:
3062 op = LLVMAtomicRMWBinOpUMin;
3063 break;
3064 case nir_intrinsic_shared_atomic_umax:
3065 case nir_intrinsic_deref_atomic_umax:
3066 op = LLVMAtomicRMWBinOpUMax;
3067 break;
3068 case nir_intrinsic_shared_atomic_imin:
3069 case nir_intrinsic_deref_atomic_imin:
3070 op = LLVMAtomicRMWBinOpMin;
3071 break;
3072 case nir_intrinsic_shared_atomic_imax:
3073 case nir_intrinsic_deref_atomic_imax:
3074 op = LLVMAtomicRMWBinOpMax;
3075 break;
3076 case nir_intrinsic_shared_atomic_and:
3077 case nir_intrinsic_deref_atomic_and:
3078 op = LLVMAtomicRMWBinOpAnd;
3079 break;
3080 case nir_intrinsic_shared_atomic_or:
3081 case nir_intrinsic_deref_atomic_or:
3082 op = LLVMAtomicRMWBinOpOr;
3083 break;
3084 case nir_intrinsic_shared_atomic_xor:
3085 case nir_intrinsic_deref_atomic_xor:
3086 op = LLVMAtomicRMWBinOpXor;
3087 break;
3088 case nir_intrinsic_shared_atomic_exchange:
3089 case nir_intrinsic_deref_atomic_exchange:
3090 op = LLVMAtomicRMWBinOpXchg;
3091 break;
3092 default:
3093 return NULL;
3094 }
3095
3096 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3097 }
3098 return result;
3099 }
3100
3101 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3102 {
3103 LLVMValueRef values[2];
3104 LLVMValueRef pos[2];
3105
3106 pos[0] = ac_to_float(&ctx->ac,
3107 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3108 pos[1] = ac_to_float(&ctx->ac,
3109 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3110
3111 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3112 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3113 return ac_build_gather_values(&ctx->ac, values, 2);
3114 }
3115
3116 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3117 enum glsl_interp_mode interp, unsigned location)
3118 {
3119 switch (interp) {
3120 case INTERP_MODE_FLAT:
3121 default:
3122 return NULL;
3123 case INTERP_MODE_SMOOTH:
3124 case INTERP_MODE_NONE:
3125 if (location == INTERP_CENTER)
3126 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3127 else if (location == INTERP_CENTROID)
3128 return ctx->abi->persp_centroid;
3129 else if (location == INTERP_SAMPLE)
3130 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3131 break;
3132 case INTERP_MODE_NOPERSPECTIVE:
3133 if (location == INTERP_CENTER)
3134 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3135 else if (location == INTERP_CENTROID)
3136 return ctx->abi->linear_centroid;
3137 else if (location == INTERP_SAMPLE)
3138 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3139 break;
3140 }
3141 return NULL;
3142 }
3143
3144 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3145 unsigned mode)
3146 {
3147 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3148 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3149 }
3150
3151 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3152 unsigned mode,
3153 LLVMValueRef offset)
3154 {
3155 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3156 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3157 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3158
3159 LLVMValueRef ij_out[2];
3160 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3161
3162 /*
3163 * take the I then J parameters, and the DDX/Y for it, and
3164 * calculate the IJ inputs for the interpolator.
3165 * temp1 = ddx * offset/sample.x + I;
3166 * interp_param.I = ddy * offset/sample.y + temp1;
3167 * temp1 = ddx * offset/sample.x + J;
3168 * interp_param.J = ddy * offset/sample.y + temp1;
3169 */
3170 for (unsigned i = 0; i < 2; i++) {
3171 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3172 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3173 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3174 ddxy_out, ix_ll, "");
3175 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3176 ddxy_out, iy_ll, "");
3177 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3178 interp_param, ix_ll, "");
3179 LLVMValueRef temp1, temp2;
3180
3181 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3182 ctx->ac.f32, "");
3183
3184 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3185 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3186
3187 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3188 temp2, ctx->ac.i32, "");
3189 }
3190 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3191 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3192 }
3193
3194 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3195 unsigned mode)
3196 {
3197 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3198 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3199 }
3200
3201 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3202 unsigned mode,
3203 LLVMValueRef sample_id)
3204 {
3205 if (ctx->abi->interp_at_sample_force_center)
3206 return barycentric_center(ctx, mode);
3207
3208 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3209
3210 /* fetch sample ID */
3211 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3212
3213 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3214 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3215 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3216 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3217 LLVMValueRef coords[] = { src_c0, src_c1 };
3218 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3219
3220 return barycentric_offset(ctx, mode, offset);
3221 }
3222
3223
3224 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3225 unsigned mode)
3226 {
3227 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3228 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3229 }
3230
3231 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3232 LLVMValueRef interp_param,
3233 unsigned index, unsigned comp_start,
3234 unsigned num_components,
3235 unsigned bitsize)
3236 {
3237 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3238
3239 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3240 interp_param, ctx->ac.v2f32, "");
3241 LLVMValueRef i = LLVMBuildExtractElement(
3242 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3243 LLVMValueRef j = LLVMBuildExtractElement(
3244 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3245
3246 LLVMValueRef values[4];
3247 assert(bitsize == 16 || bitsize == 32);
3248 for (unsigned comp = 0; comp < num_components; comp++) {
3249 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3250 if (bitsize == 16) {
3251 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3252 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3253 } else {
3254 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3255 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3256 }
3257 }
3258
3259 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3260 }
3261
3262 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3263 unsigned index, unsigned comp_start,
3264 unsigned num_components,
3265 unsigned bit_size)
3266 {
3267 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3268
3269 LLVMValueRef values[8];
3270
3271 /* Each component of a 64-bit value takes up two GL-level channels. */
3272 unsigned channels =
3273 bit_size == 64 ? num_components * 2 : num_components;
3274
3275 for (unsigned chan = 0; chan < channels; chan++) {
3276 if (comp_start + chan > 4)
3277 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3278 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3279 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3280 LLVMConstInt(ctx->ac.i32, 2, false),
3281 llvm_chan,
3282 attr_number,
3283 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3284 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3285 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3286 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3287 }
3288
3289 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3290 if (bit_size == 64) {
3291 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3292 LLVMVectorType(ctx->ac.i64, num_components);
3293 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3294 }
3295 return result;
3296 }
3297
3298 static void visit_intrinsic(struct ac_nir_context *ctx,
3299 nir_intrinsic_instr *instr)
3300 {
3301 LLVMValueRef result = NULL;
3302
3303 switch (instr->intrinsic) {
3304 case nir_intrinsic_ballot:
3305 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3306 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3307 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3308 break;
3309 case nir_intrinsic_read_invocation:
3310 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3311 get_src(ctx, instr->src[1]));
3312 break;
3313 case nir_intrinsic_read_first_invocation:
3314 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3315 break;
3316 case nir_intrinsic_load_subgroup_invocation:
3317 result = ac_get_thread_id(&ctx->ac);
3318 break;
3319 case nir_intrinsic_load_work_group_id: {
3320 LLVMValueRef values[3];
3321
3322 for (int i = 0; i < 3; i++) {
3323 values[i] = ctx->args->workgroup_ids[i].used ?
3324 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3325 }
3326
3327 result = ac_build_gather_values(&ctx->ac, values, 3);
3328 break;
3329 }
3330 case nir_intrinsic_load_base_vertex:
3331 case nir_intrinsic_load_first_vertex:
3332 result = ctx->abi->load_base_vertex(ctx->abi);
3333 break;
3334 case nir_intrinsic_load_local_group_size:
3335 result = ctx->abi->load_local_group_size(ctx->abi);
3336 break;
3337 case nir_intrinsic_load_vertex_id:
3338 result = LLVMBuildAdd(ctx->ac.builder,
3339 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3340 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3341 break;
3342 case nir_intrinsic_load_vertex_id_zero_base: {
3343 result = ctx->abi->vertex_id;
3344 break;
3345 }
3346 case nir_intrinsic_load_local_invocation_id: {
3347 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3348 break;
3349 }
3350 case nir_intrinsic_load_base_instance:
3351 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3352 break;
3353 case nir_intrinsic_load_draw_id:
3354 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3355 break;
3356 case nir_intrinsic_load_view_index:
3357 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3358 break;
3359 case nir_intrinsic_load_invocation_id:
3360 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3361 result = ac_unpack_param(&ctx->ac,
3362 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3363 8, 5);
3364 } else {
3365 if (ctx->ac.chip_class >= GFX10) {
3366 result = LLVMBuildAnd(ctx->ac.builder,
3367 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3368 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3369 } else {
3370 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3371 }
3372 }
3373 break;
3374 case nir_intrinsic_load_primitive_id:
3375 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3376 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3377 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3378 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3379 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3380 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3381 } else
3382 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3383 break;
3384 case nir_intrinsic_load_sample_id:
3385 result = ac_unpack_param(&ctx->ac,
3386 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3387 8, 4);
3388 break;
3389 case nir_intrinsic_load_sample_pos:
3390 result = load_sample_pos(ctx);
3391 break;
3392 case nir_intrinsic_load_sample_mask_in:
3393 result = ctx->abi->load_sample_mask_in(ctx->abi);
3394 break;
3395 case nir_intrinsic_load_frag_coord: {
3396 LLVMValueRef values[4] = {
3397 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3398 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3399 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3400 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3401 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3402 };
3403 result = ac_to_integer(&ctx->ac,
3404 ac_build_gather_values(&ctx->ac, values, 4));
3405 break;
3406 }
3407 case nir_intrinsic_load_layer_id:
3408 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3409 break;
3410 case nir_intrinsic_load_front_face:
3411 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3412 break;
3413 case nir_intrinsic_load_helper_invocation:
3414 result = ac_build_load_helper_invocation(&ctx->ac);
3415 break;
3416 case nir_intrinsic_load_color0:
3417 result = ctx->abi->color0;
3418 break;
3419 case nir_intrinsic_load_color1:
3420 result = ctx->abi->color1;
3421 break;
3422 case nir_intrinsic_load_user_data_amd:
3423 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3424 result = ctx->abi->user_data;
3425 break;
3426 case nir_intrinsic_load_instance_id:
3427 result = ctx->abi->instance_id;
3428 break;
3429 case nir_intrinsic_load_num_work_groups:
3430 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3431 break;
3432 case nir_intrinsic_load_local_invocation_index:
3433 result = visit_load_local_invocation_index(ctx);
3434 break;
3435 case nir_intrinsic_load_subgroup_id:
3436 result = visit_load_subgroup_id(ctx);
3437 break;
3438 case nir_intrinsic_load_num_subgroups:
3439 result = visit_load_num_subgroups(ctx);
3440 break;
3441 case nir_intrinsic_first_invocation:
3442 result = visit_first_invocation(ctx);
3443 break;
3444 case nir_intrinsic_load_push_constant:
3445 result = visit_load_push_constant(ctx, instr);
3446 break;
3447 case nir_intrinsic_vulkan_resource_index: {
3448 LLVMValueRef index = get_src(ctx, instr->src[0]);
3449 unsigned desc_set = nir_intrinsic_desc_set(instr);
3450 unsigned binding = nir_intrinsic_binding(instr);
3451
3452 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3453 binding);
3454 break;
3455 }
3456 case nir_intrinsic_vulkan_resource_reindex:
3457 result = visit_vulkan_resource_reindex(ctx, instr);
3458 break;
3459 case nir_intrinsic_store_ssbo:
3460 visit_store_ssbo(ctx, instr);
3461 break;
3462 case nir_intrinsic_load_ssbo:
3463 result = visit_load_buffer(ctx, instr);
3464 break;
3465 case nir_intrinsic_ssbo_atomic_add:
3466 case nir_intrinsic_ssbo_atomic_imin:
3467 case nir_intrinsic_ssbo_atomic_umin:
3468 case nir_intrinsic_ssbo_atomic_imax:
3469 case nir_intrinsic_ssbo_atomic_umax:
3470 case nir_intrinsic_ssbo_atomic_and:
3471 case nir_intrinsic_ssbo_atomic_or:
3472 case nir_intrinsic_ssbo_atomic_xor:
3473 case nir_intrinsic_ssbo_atomic_exchange:
3474 case nir_intrinsic_ssbo_atomic_comp_swap:
3475 result = visit_atomic_ssbo(ctx, instr);
3476 break;
3477 case nir_intrinsic_load_ubo:
3478 result = visit_load_ubo_buffer(ctx, instr);
3479 break;
3480 case nir_intrinsic_get_buffer_size:
3481 result = visit_get_buffer_size(ctx, instr);
3482 break;
3483 case nir_intrinsic_load_deref:
3484 result = visit_load_var(ctx, instr);
3485 break;
3486 case nir_intrinsic_store_deref:
3487 visit_store_var(ctx, instr);
3488 break;
3489 case nir_intrinsic_load_shared:
3490 result = visit_load_shared(ctx, instr);
3491 break;
3492 case nir_intrinsic_store_shared:
3493 visit_store_shared(ctx, instr);
3494 break;
3495 case nir_intrinsic_bindless_image_samples:
3496 case nir_intrinsic_image_deref_samples:
3497 result = visit_image_samples(ctx, instr);
3498 break;
3499 case nir_intrinsic_bindless_image_load:
3500 result = visit_image_load(ctx, instr, true);
3501 break;
3502 case nir_intrinsic_image_deref_load:
3503 result = visit_image_load(ctx, instr, false);
3504 break;
3505 case nir_intrinsic_bindless_image_store:
3506 visit_image_store(ctx, instr, true);
3507 break;
3508 case nir_intrinsic_image_deref_store:
3509 visit_image_store(ctx, instr, false);
3510 break;
3511 case nir_intrinsic_bindless_image_atomic_add:
3512 case nir_intrinsic_bindless_image_atomic_imin:
3513 case nir_intrinsic_bindless_image_atomic_umin:
3514 case nir_intrinsic_bindless_image_atomic_imax:
3515 case nir_intrinsic_bindless_image_atomic_umax:
3516 case nir_intrinsic_bindless_image_atomic_and:
3517 case nir_intrinsic_bindless_image_atomic_or:
3518 case nir_intrinsic_bindless_image_atomic_xor:
3519 case nir_intrinsic_bindless_image_atomic_exchange:
3520 case nir_intrinsic_bindless_image_atomic_comp_swap:
3521 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3522 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3523 result = visit_image_atomic(ctx, instr, true);
3524 break;
3525 case nir_intrinsic_image_deref_atomic_add:
3526 case nir_intrinsic_image_deref_atomic_imin:
3527 case nir_intrinsic_image_deref_atomic_umin:
3528 case nir_intrinsic_image_deref_atomic_imax:
3529 case nir_intrinsic_image_deref_atomic_umax:
3530 case nir_intrinsic_image_deref_atomic_and:
3531 case nir_intrinsic_image_deref_atomic_or:
3532 case nir_intrinsic_image_deref_atomic_xor:
3533 case nir_intrinsic_image_deref_atomic_exchange:
3534 case nir_intrinsic_image_deref_atomic_comp_swap:
3535 case nir_intrinsic_image_deref_atomic_inc_wrap:
3536 case nir_intrinsic_image_deref_atomic_dec_wrap:
3537 result = visit_image_atomic(ctx, instr, false);
3538 break;
3539 case nir_intrinsic_bindless_image_size:
3540 result = visit_image_size(ctx, instr, true);
3541 break;
3542 case nir_intrinsic_image_deref_size:
3543 result = visit_image_size(ctx, instr, false);
3544 break;
3545 case nir_intrinsic_shader_clock:
3546 result = ac_build_shader_clock(&ctx->ac);
3547 break;
3548 case nir_intrinsic_discard:
3549 case nir_intrinsic_discard_if:
3550 emit_discard(ctx, instr);
3551 break;
3552 case nir_intrinsic_memory_barrier:
3553 case nir_intrinsic_group_memory_barrier:
3554 case nir_intrinsic_memory_barrier_buffer:
3555 case nir_intrinsic_memory_barrier_image:
3556 case nir_intrinsic_memory_barrier_shared:
3557 emit_membar(&ctx->ac, instr);
3558 break;
3559 case nir_intrinsic_memory_barrier_tcs_patch:
3560 break;
3561 case nir_intrinsic_control_barrier:
3562 ac_emit_barrier(&ctx->ac, ctx->stage);
3563 break;
3564 case nir_intrinsic_shared_atomic_add:
3565 case nir_intrinsic_shared_atomic_imin:
3566 case nir_intrinsic_shared_atomic_umin:
3567 case nir_intrinsic_shared_atomic_imax:
3568 case nir_intrinsic_shared_atomic_umax:
3569 case nir_intrinsic_shared_atomic_and:
3570 case nir_intrinsic_shared_atomic_or:
3571 case nir_intrinsic_shared_atomic_xor:
3572 case nir_intrinsic_shared_atomic_exchange:
3573 case nir_intrinsic_shared_atomic_comp_swap: {
3574 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3575 instr->src[1].ssa->bit_size);
3576 result = visit_var_atomic(ctx, instr, ptr, 1);
3577 break;
3578 }
3579 case nir_intrinsic_deref_atomic_add:
3580 case nir_intrinsic_deref_atomic_imin:
3581 case nir_intrinsic_deref_atomic_umin:
3582 case nir_intrinsic_deref_atomic_imax:
3583 case nir_intrinsic_deref_atomic_umax:
3584 case nir_intrinsic_deref_atomic_and:
3585 case nir_intrinsic_deref_atomic_or:
3586 case nir_intrinsic_deref_atomic_xor:
3587 case nir_intrinsic_deref_atomic_exchange:
3588 case nir_intrinsic_deref_atomic_comp_swap: {
3589 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3590 result = visit_var_atomic(ctx, instr, ptr, 1);
3591 break;
3592 }
3593 case nir_intrinsic_load_barycentric_pixel:
3594 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3595 break;
3596 case nir_intrinsic_load_barycentric_centroid:
3597 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3598 break;
3599 case nir_intrinsic_load_barycentric_sample:
3600 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3601 break;
3602 case nir_intrinsic_load_barycentric_at_offset: {
3603 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3604 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3605 break;
3606 }
3607 case nir_intrinsic_load_barycentric_at_sample: {
3608 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3609 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3610 break;
3611 }
3612 case nir_intrinsic_load_interpolated_input: {
3613 /* We assume any indirect loads have been lowered away */
3614 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3615 assert(offset);
3616 assert(offset[0].i32 == 0);
3617
3618 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3619 unsigned index = nir_intrinsic_base(instr);
3620 unsigned component = nir_intrinsic_component(instr);
3621 result = load_interpolated_input(ctx, interp_param, index,
3622 component,
3623 instr->dest.ssa.num_components,
3624 instr->dest.ssa.bit_size);
3625 break;
3626 }
3627 case nir_intrinsic_load_input: {
3628 /* We only lower inputs for fragment shaders ATM */
3629 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3630 assert(offset);
3631 assert(offset[0].i32 == 0);
3632
3633 unsigned index = nir_intrinsic_base(instr);
3634 unsigned component = nir_intrinsic_component(instr);
3635 result = load_flat_input(ctx, index, component,
3636 instr->dest.ssa.num_components,
3637 instr->dest.ssa.bit_size);
3638 break;
3639 }
3640 case nir_intrinsic_emit_vertex:
3641 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3642 break;
3643 case nir_intrinsic_end_primitive:
3644 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3645 break;
3646 case nir_intrinsic_load_tess_coord:
3647 result = ctx->abi->load_tess_coord(ctx->abi);
3648 break;
3649 case nir_intrinsic_load_tess_level_outer:
3650 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3651 break;
3652 case nir_intrinsic_load_tess_level_inner:
3653 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3654 break;
3655 case nir_intrinsic_load_tess_level_outer_default:
3656 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3657 break;
3658 case nir_intrinsic_load_tess_level_inner_default:
3659 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3660 break;
3661 case nir_intrinsic_load_patch_vertices_in:
3662 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3663 break;
3664 case nir_intrinsic_vote_all: {
3665 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3666 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3667 break;
3668 }
3669 case nir_intrinsic_vote_any: {
3670 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3671 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3672 break;
3673 }
3674 case nir_intrinsic_shuffle:
3675 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3676 get_src(ctx, instr->src[1]));
3677 break;
3678 case nir_intrinsic_reduce:
3679 result = ac_build_reduce(&ctx->ac,
3680 get_src(ctx, instr->src[0]),
3681 instr->const_index[0],
3682 instr->const_index[1]);
3683 break;
3684 case nir_intrinsic_inclusive_scan:
3685 result = ac_build_inclusive_scan(&ctx->ac,
3686 get_src(ctx, instr->src[0]),
3687 instr->const_index[0]);
3688 break;
3689 case nir_intrinsic_exclusive_scan:
3690 result = ac_build_exclusive_scan(&ctx->ac,
3691 get_src(ctx, instr->src[0]),
3692 instr->const_index[0]);
3693 break;
3694 case nir_intrinsic_quad_broadcast: {
3695 unsigned lane = nir_src_as_uint(instr->src[1]);
3696 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3697 lane, lane, lane, lane);
3698 break;
3699 }
3700 case nir_intrinsic_quad_swap_horizontal:
3701 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3702 break;
3703 case nir_intrinsic_quad_swap_vertical:
3704 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3705 break;
3706 case nir_intrinsic_quad_swap_diagonal:
3707 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3708 break;
3709 case nir_intrinsic_quad_swizzle_amd: {
3710 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3711 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3712 mask & 0x3, (mask >> 2) & 0x3,
3713 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3714 break;
3715 }
3716 case nir_intrinsic_masked_swizzle_amd: {
3717 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3718 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3719 break;
3720 }
3721 case nir_intrinsic_write_invocation_amd:
3722 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3723 get_src(ctx, instr->src[1]),
3724 get_src(ctx, instr->src[2]));
3725 break;
3726 case nir_intrinsic_mbcnt_amd:
3727 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3728 break;
3729 case nir_intrinsic_load_scratch: {
3730 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3731 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3732 offset);
3733 LLVMTypeRef comp_type =
3734 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3735 LLVMTypeRef vec_type =
3736 instr->dest.ssa.num_components == 1 ? comp_type :
3737 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3738 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3739 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3740 LLVMPointerType(vec_type, addr_space), "");
3741 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3742 break;
3743 }
3744 case nir_intrinsic_store_scratch: {
3745 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3746 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3747 offset);
3748 LLVMTypeRef comp_type =
3749 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3750 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3751 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3752 LLVMPointerType(comp_type, addr_space), "");
3753 LLVMValueRef src = get_src(ctx, instr->src[0]);
3754 unsigned wrmask = nir_intrinsic_write_mask(instr);
3755 while (wrmask) {
3756 int start, count;
3757 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3758
3759 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3760 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3761 LLVMTypeRef vec_type =
3762 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3763 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3764 offset_ptr,
3765 LLVMPointerType(vec_type, addr_space),
3766 "");
3767 LLVMValueRef offset_src =
3768 ac_extract_components(&ctx->ac, src, start, count);
3769 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3770 }
3771 break;
3772 }
3773 case nir_intrinsic_load_constant: {
3774 unsigned base = nir_intrinsic_base(instr);
3775 unsigned range = nir_intrinsic_range(instr);
3776
3777 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3778 offset = LLVMBuildAdd(ctx->ac.builder, offset,
3779 LLVMConstInt(ctx->ac.i32, base, false), "");
3780
3781 /* Clamp the offset to avoid out-of-bound access because global
3782 * instructions can't handle them.
3783 */
3784 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
3785 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
3786 offset, size, "");
3787 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
3788
3789 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
3790 offset);
3791 LLVMTypeRef comp_type =
3792 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3793 LLVMTypeRef vec_type =
3794 instr->dest.ssa.num_components == 1 ? comp_type :
3795 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3796 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3797 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3798 LLVMPointerType(vec_type, addr_space), "");
3799 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3800 break;
3801 }
3802 default:
3803 fprintf(stderr, "Unknown intrinsic: ");
3804 nir_print_instr(&instr->instr, stderr);
3805 fprintf(stderr, "\n");
3806 break;
3807 }
3808 if (result) {
3809 ctx->ssa_defs[instr->dest.ssa.index] = result;
3810 }
3811 }
3812
3813 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3814 unsigned base_index,
3815 unsigned constant_index,
3816 LLVMValueRef dynamic_index)
3817 {
3818 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3819 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3820 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3821
3822 /* Bindless uniforms are 64bit so multiple index by 8 */
3823 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3824 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3825
3826 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3827
3828 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3829 NULL, 0, 0, true, true);
3830
3831 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3832 }
3833
3834 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3835 nir_deref_instr *deref_instr,
3836 enum ac_descriptor_type desc_type,
3837 const nir_instr *instr,
3838 bool image, bool write)
3839 {
3840 LLVMValueRef index = NULL;
3841 unsigned constant_index = 0;
3842 unsigned descriptor_set;
3843 unsigned base_index;
3844 bool bindless = false;
3845
3846 if (!deref_instr) {
3847 descriptor_set = 0;
3848 if (image) {
3849 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3850 base_index = 0;
3851 bindless = true;
3852 index = get_src(ctx, img_instr->src[0]);
3853 } else {
3854 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3855 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3856 nir_tex_src_sampler_handle);
3857 if (sampSrcIdx != -1) {
3858 base_index = 0;
3859 bindless = true;
3860 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3861 } else {
3862 assert(tex_instr && !image);
3863 base_index = tex_instr->sampler_index;
3864 }
3865 }
3866 } else {
3867 while(deref_instr->deref_type != nir_deref_type_var) {
3868 if (deref_instr->deref_type == nir_deref_type_array) {
3869 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3870 if (!array_size)
3871 array_size = 1;
3872
3873 if (nir_src_is_const(deref_instr->arr.index)) {
3874 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3875 } else {
3876 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3877
3878 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3879 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3880
3881 if (!index)
3882 index = indirect;
3883 else
3884 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3885 }
3886
3887 deref_instr = nir_src_as_deref(deref_instr->parent);
3888 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3889 unsigned sidx = deref_instr->strct.index;
3890 deref_instr = nir_src_as_deref(deref_instr->parent);
3891 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3892 } else {
3893 unreachable("Unsupported deref type");
3894 }
3895 }
3896 descriptor_set = deref_instr->var->data.descriptor_set;
3897
3898 if (deref_instr->var->data.bindless) {
3899 /* For now just assert on unhandled variable types */
3900 assert(deref_instr->var->data.mode == nir_var_uniform);
3901
3902 base_index = deref_instr->var->data.driver_location;
3903 bindless = true;
3904
3905 index = index ? index : ctx->ac.i32_0;
3906 index = get_bindless_index_from_uniform(ctx, base_index,
3907 constant_index, index);
3908 } else
3909 base_index = deref_instr->var->data.binding;
3910 }
3911
3912 return ctx->abi->load_sampler_desc(ctx->abi,
3913 descriptor_set,
3914 base_index,
3915 constant_index, index,
3916 desc_type, image, write, bindless);
3917 }
3918
3919 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3920 *
3921 * GFX6-GFX7:
3922 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3923 * filtering manually. The driver sets img7 to a mask clearing
3924 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3925 * s_and_b32 samp0, samp0, img7
3926 *
3927 * GFX8:
3928 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3929 */
3930 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3931 LLVMValueRef res, LLVMValueRef samp)
3932 {
3933 LLVMBuilderRef builder = ctx->ac.builder;
3934 LLVMValueRef img7, samp0;
3935
3936 if (ctx->ac.chip_class >= GFX8)
3937 return samp;
3938
3939 img7 = LLVMBuildExtractElement(builder, res,
3940 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3941 samp0 = LLVMBuildExtractElement(builder, samp,
3942 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3943 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3944 return LLVMBuildInsertElement(builder, samp, samp0,
3945 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3946 }
3947
3948 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3949 nir_tex_instr *instr,
3950 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3951 LLVMValueRef *fmask_ptr)
3952 {
3953 nir_deref_instr *texture_deref_instr = NULL;
3954 nir_deref_instr *sampler_deref_instr = NULL;
3955 int plane = -1;
3956
3957 for (unsigned i = 0; i < instr->num_srcs; i++) {
3958 switch (instr->src[i].src_type) {
3959 case nir_tex_src_texture_deref:
3960 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3961 break;
3962 case nir_tex_src_sampler_deref:
3963 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3964 break;
3965 case nir_tex_src_plane:
3966 plane = nir_src_as_int(instr->src[i].src);
3967 break;
3968 default:
3969 break;
3970 }
3971 }
3972
3973 if (!sampler_deref_instr)
3974 sampler_deref_instr = texture_deref_instr;
3975
3976 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3977
3978 if (plane >= 0) {
3979 assert(instr->op != nir_texop_txf_ms &&
3980 instr->op != nir_texop_samples_identical);
3981 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3982
3983 main_descriptor = AC_DESC_PLANE_0 + plane;
3984 }
3985
3986 if (instr->op == nir_texop_fragment_mask_fetch) {
3987 /* The fragment mask is fetched from the compressed
3988 * multisampled surface.
3989 */
3990 main_descriptor = AC_DESC_FMASK;
3991 }
3992
3993 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3994
3995 if (samp_ptr) {
3996 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3997 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3998 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3999 }
4000 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4001 instr->op == nir_texop_samples_identical))
4002 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
4003 }
4004
4005 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4006 LLVMValueRef coord)
4007 {
4008 coord = ac_to_float(ctx, coord);
4009 coord = ac_build_round(ctx, coord);
4010 coord = ac_to_integer(ctx, coord);
4011 return coord;
4012 }
4013
4014 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4015 {
4016 LLVMValueRef result = NULL;
4017 struct ac_image_args args = { 0 };
4018 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4019 LLVMValueRef ddx = NULL, ddy = NULL;
4020 unsigned offset_src = 0;
4021
4022 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
4023
4024 for (unsigned i = 0; i < instr->num_srcs; i++) {
4025 switch (instr->src[i].src_type) {
4026 case nir_tex_src_coord: {
4027 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4028 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4029 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4030 break;
4031 }
4032 case nir_tex_src_projector:
4033 break;
4034 case nir_tex_src_comparator:
4035 if (instr->is_shadow) {
4036 args.compare = get_src(ctx, instr->src[i].src);
4037 args.compare = ac_to_float(&ctx->ac, args.compare);
4038 }
4039 break;
4040 case nir_tex_src_offset:
4041 args.offset = get_src(ctx, instr->src[i].src);
4042 offset_src = i;
4043 break;
4044 case nir_tex_src_bias:
4045 if (instr->op == nir_texop_txb)
4046 args.bias = get_src(ctx, instr->src[i].src);
4047 break;
4048 case nir_tex_src_lod: {
4049 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4050 args.level_zero = true;
4051 else
4052 args.lod = get_src(ctx, instr->src[i].src);
4053 break;
4054 }
4055 case nir_tex_src_ms_index:
4056 sample_index = get_src(ctx, instr->src[i].src);
4057 break;
4058 case nir_tex_src_ms_mcs:
4059 break;
4060 case nir_tex_src_ddx:
4061 ddx = get_src(ctx, instr->src[i].src);
4062 break;
4063 case nir_tex_src_ddy:
4064 ddy = get_src(ctx, instr->src[i].src);
4065 break;
4066 case nir_tex_src_texture_offset:
4067 case nir_tex_src_sampler_offset:
4068 case nir_tex_src_plane:
4069 default:
4070 break;
4071 }
4072 }
4073
4074 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4075 result = get_buffer_size(ctx, args.resource, true);
4076 goto write_result;
4077 }
4078
4079 if (instr->op == nir_texop_texture_samples) {
4080 LLVMValueRef res, samples, is_msaa;
4081 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4082 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4083 LLVMConstInt(ctx->ac.i32, 3, false), "");
4084 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4085 LLVMConstInt(ctx->ac.i32, 28, false), "");
4086 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4087 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4088 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4089 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4090
4091 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4092 LLVMConstInt(ctx->ac.i32, 16, false), "");
4093 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4094 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4095 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4096 samples, "");
4097 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4098 ctx->ac.i32_1, "");
4099 result = samples;
4100 goto write_result;
4101 }
4102
4103 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4104 LLVMValueRef offset[3], pack;
4105 for (unsigned chan = 0; chan < 3; ++chan)
4106 offset[chan] = ctx->ac.i32_0;
4107
4108 unsigned num_components = ac_get_llvm_num_components(args.offset);
4109 for (unsigned chan = 0; chan < num_components; chan++) {
4110 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4111 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4112 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4113 if (chan)
4114 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4115 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4116 }
4117 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4118 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4119 args.offset = pack;
4120 }
4121
4122 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4123 * OpenGL 4.5 spec says:
4124 *
4125 * "If the texture’s internal format indicates a fixed-point
4126 * depth texture, then D_t and D_ref are clamped to the
4127 * range [0, 1]; otherwise no clamping is performed."
4128 *
4129 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4130 * so the depth comparison value isn't clamped for Z16 and
4131 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4132 * an explicitly clamped 32-bit float format.
4133 */
4134 if (args.compare &&
4135 ctx->ac.chip_class >= GFX8 &&
4136 ctx->ac.chip_class <= GFX9 &&
4137 ctx->abi->clamp_shadow_reference) {
4138 LLVMValueRef upgraded, clamped;
4139
4140 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4141 LLVMConstInt(ctx->ac.i32, 3, false), "");
4142 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4143 LLVMConstInt(ctx->ac.i32, 29, false), "");
4144 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4145 clamped = ac_build_clamp(&ctx->ac, args.compare);
4146 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4147 args.compare, "");
4148 }
4149
4150 /* pack derivatives */
4151 if (ddx || ddy) {
4152 int num_src_deriv_channels, num_dest_deriv_channels;
4153 switch (instr->sampler_dim) {
4154 case GLSL_SAMPLER_DIM_3D:
4155 case GLSL_SAMPLER_DIM_CUBE:
4156 num_src_deriv_channels = 3;
4157 num_dest_deriv_channels = 3;
4158 break;
4159 case GLSL_SAMPLER_DIM_2D:
4160 default:
4161 num_src_deriv_channels = 2;
4162 num_dest_deriv_channels = 2;
4163 break;
4164 case GLSL_SAMPLER_DIM_1D:
4165 num_src_deriv_channels = 1;
4166 if (ctx->ac.chip_class == GFX9) {
4167 num_dest_deriv_channels = 2;
4168 } else {
4169 num_dest_deriv_channels = 1;
4170 }
4171 break;
4172 }
4173
4174 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4175 args.derivs[i] = ac_to_float(&ctx->ac,
4176 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4177 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4178 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4179 }
4180 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4181 args.derivs[i] = ctx->ac.f32_0;
4182 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4183 }
4184 }
4185
4186 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4187 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4188 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4189 if (instr->coord_components == 3)
4190 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4191 ac_prepare_cube_coords(&ctx->ac,
4192 instr->op == nir_texop_txd, instr->is_array,
4193 instr->op == nir_texop_lod, args.coords, args.derivs);
4194 }
4195
4196 /* Texture coordinates fixups */
4197 if (instr->coord_components > 1 &&
4198 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4199 instr->is_array &&
4200 instr->op != nir_texop_txf) {
4201 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4202 }
4203
4204 if (instr->coord_components > 2 &&
4205 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4206 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4207 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4208 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4209 instr->is_array &&
4210 instr->op != nir_texop_txf &&
4211 instr->op != nir_texop_txf_ms &&
4212 instr->op != nir_texop_fragment_fetch &&
4213 instr->op != nir_texop_fragment_mask_fetch) {
4214 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4215 }
4216
4217 if (ctx->ac.chip_class == GFX9 &&
4218 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4219 instr->op != nir_texop_lod) {
4220 LLVMValueRef filler;
4221 if (instr->op == nir_texop_txf)
4222 filler = ctx->ac.i32_0;
4223 else
4224 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4225
4226 if (instr->is_array)
4227 args.coords[2] = args.coords[1];
4228 args.coords[1] = filler;
4229 }
4230
4231 /* Pack sample index */
4232 if (sample_index && (instr->op == nir_texop_txf_ms ||
4233 instr->op == nir_texop_fragment_fetch))
4234 args.coords[instr->coord_components] = sample_index;
4235
4236 if (instr->op == nir_texop_samples_identical) {
4237 struct ac_image_args txf_args = { 0 };
4238 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4239
4240 txf_args.dmask = 0xf;
4241 txf_args.resource = fmask_ptr;
4242 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4243 result = build_tex_intrinsic(ctx, instr, &txf_args);
4244
4245 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4246 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4247 goto write_result;
4248 }
4249
4250 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4251 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4252 instr->op != nir_texop_txs &&
4253 instr->op != nir_texop_fragment_fetch &&
4254 instr->op != nir_texop_fragment_mask_fetch) {
4255 unsigned sample_chan = instr->is_array ? 3 : 2;
4256 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4257 &ctx->ac, args.coords[0], args.coords[1],
4258 instr->is_array ? args.coords[2] : NULL,
4259 args.coords[sample_chan], fmask_ptr);
4260 }
4261
4262 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4263 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4264 num_offsets = MIN2(num_offsets, instr->coord_components);
4265 for (unsigned i = 0; i < num_offsets; ++i) {
4266 args.coords[i] = LLVMBuildAdd(
4267 ctx->ac.builder, args.coords[i],
4268 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4269 }
4270 args.offset = NULL;
4271 }
4272
4273 /* DMASK was repurposed for GATHER4. 4 components are always
4274 * returned and DMASK works like a swizzle - it selects
4275 * the component to fetch. The only valid DMASK values are
4276 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4277 * (red,red,red,red) etc.) The ISA document doesn't mention
4278 * this.
4279 */
4280 args.dmask = 0xf;
4281 if (instr->op == nir_texop_tg4) {
4282 if (instr->is_shadow)
4283 args.dmask = 1;
4284 else
4285 args.dmask = 1 << instr->component;
4286 }
4287
4288 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4289 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4290 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4291 }
4292
4293 /* Adjust the number of coordinates because we only need (x,y) for 2D
4294 * multisampled images and (x,y,layer) for 2D multisampled layered
4295 * images or for multisampled input attachments.
4296 */
4297 if (instr->op == nir_texop_fragment_mask_fetch) {
4298 if (args.dim == ac_image_2dmsaa) {
4299 args.dim = ac_image_2d;
4300 } else {
4301 assert(args.dim == ac_image_2darraymsaa);
4302 args.dim = ac_image_2darray;
4303 }
4304 }
4305
4306 result = build_tex_intrinsic(ctx, instr, &args);
4307
4308 if (instr->op == nir_texop_query_levels)
4309 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4310 else if (instr->is_shadow && instr->is_new_style_shadow &&
4311 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4312 instr->op != nir_texop_tg4)
4313 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4314 else if (instr->op == nir_texop_txs &&
4315 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4316 instr->is_array) {
4317 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4318 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4319 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4320 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4321 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4322 } else if (ctx->ac.chip_class == GFX9 &&
4323 instr->op == nir_texop_txs &&
4324 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4325 instr->is_array) {
4326 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4327 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4328 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4329 ctx->ac.i32_1, "");
4330 } else if (instr->dest.ssa.num_components != 4)
4331 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4332
4333 write_result:
4334 if (result) {
4335 assert(instr->dest.is_ssa);
4336 result = ac_to_integer(&ctx->ac, result);
4337 ctx->ssa_defs[instr->dest.ssa.index] = result;
4338 }
4339 }
4340
4341
4342 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4343 {
4344 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4345 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4346
4347 ctx->ssa_defs[instr->dest.ssa.index] = result;
4348 _mesa_hash_table_insert(ctx->phis, instr, result);
4349 }
4350
4351 static void visit_post_phi(struct ac_nir_context *ctx,
4352 nir_phi_instr *instr,
4353 LLVMValueRef llvm_phi)
4354 {
4355 nir_foreach_phi_src(src, instr) {
4356 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4357 LLVMValueRef llvm_src = get_src(ctx, src->src);
4358
4359 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4360 }
4361 }
4362
4363 static void phi_post_pass(struct ac_nir_context *ctx)
4364 {
4365 hash_table_foreach(ctx->phis, entry) {
4366 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4367 (LLVMValueRef)entry->data);
4368 }
4369 }
4370
4371
4372 static void visit_ssa_undef(struct ac_nir_context *ctx,
4373 const nir_ssa_undef_instr *instr)
4374 {
4375 unsigned num_components = instr->def.num_components;
4376 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4377 LLVMValueRef undef;
4378
4379 if (num_components == 1)
4380 undef = LLVMGetUndef(type);
4381 else {
4382 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4383 }
4384 ctx->ssa_defs[instr->def.index] = undef;
4385 }
4386
4387 static void visit_jump(struct ac_llvm_context *ctx,
4388 const nir_jump_instr *instr)
4389 {
4390 switch (instr->type) {
4391 case nir_jump_break:
4392 ac_build_break(ctx);
4393 break;
4394 case nir_jump_continue:
4395 ac_build_continue(ctx);
4396 break;
4397 default:
4398 fprintf(stderr, "Unknown NIR jump instr: ");
4399 nir_print_instr(&instr->instr, stderr);
4400 fprintf(stderr, "\n");
4401 abort();
4402 }
4403 }
4404
4405 static LLVMTypeRef
4406 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4407 enum glsl_base_type type)
4408 {
4409 switch (type) {
4410 case GLSL_TYPE_INT:
4411 case GLSL_TYPE_UINT:
4412 case GLSL_TYPE_BOOL:
4413 case GLSL_TYPE_SUBROUTINE:
4414 return ac->i32;
4415 case GLSL_TYPE_INT8:
4416 case GLSL_TYPE_UINT8:
4417 return ac->i8;
4418 case GLSL_TYPE_INT16:
4419 case GLSL_TYPE_UINT16:
4420 return ac->i16;
4421 case GLSL_TYPE_FLOAT:
4422 return ac->f32;
4423 case GLSL_TYPE_FLOAT16:
4424 return ac->f16;
4425 case GLSL_TYPE_INT64:
4426 case GLSL_TYPE_UINT64:
4427 return ac->i64;
4428 case GLSL_TYPE_DOUBLE:
4429 return ac->f64;
4430 default:
4431 unreachable("unknown GLSL type");
4432 }
4433 }
4434
4435 static LLVMTypeRef
4436 glsl_to_llvm_type(struct ac_llvm_context *ac,
4437 const struct glsl_type *type)
4438 {
4439 if (glsl_type_is_scalar(type)) {
4440 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4441 }
4442
4443 if (glsl_type_is_vector(type)) {
4444 return LLVMVectorType(
4445 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4446 glsl_get_vector_elements(type));
4447 }
4448
4449 if (glsl_type_is_matrix(type)) {
4450 return LLVMArrayType(
4451 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4452 glsl_get_matrix_columns(type));
4453 }
4454
4455 if (glsl_type_is_array(type)) {
4456 return LLVMArrayType(
4457 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4458 glsl_get_length(type));
4459 }
4460
4461 assert(glsl_type_is_struct_or_ifc(type));
4462
4463 LLVMTypeRef member_types[glsl_get_length(type)];
4464
4465 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4466 member_types[i] =
4467 glsl_to_llvm_type(ac,
4468 glsl_get_struct_field(type, i));
4469 }
4470
4471 return LLVMStructTypeInContext(ac->context, member_types,
4472 glsl_get_length(type), false);
4473 }
4474
4475 static void visit_deref(struct ac_nir_context *ctx,
4476 nir_deref_instr *instr)
4477 {
4478 if (instr->mode != nir_var_mem_shared &&
4479 instr->mode != nir_var_mem_global)
4480 return;
4481
4482 LLVMValueRef result = NULL;
4483 switch(instr->deref_type) {
4484 case nir_deref_type_var: {
4485 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4486 result = entry->data;
4487 break;
4488 }
4489 case nir_deref_type_struct:
4490 if (instr->mode == nir_var_mem_global) {
4491 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4492 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4493 instr->strct.index);
4494 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4495 LLVMConstInt(ctx->ac.i32, offset, 0));
4496 } else {
4497 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4498 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4499 }
4500 break;
4501 case nir_deref_type_array:
4502 if (instr->mode == nir_var_mem_global) {
4503 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4504 unsigned stride = glsl_get_explicit_stride(parent->type);
4505
4506 if ((glsl_type_is_matrix(parent->type) &&
4507 glsl_matrix_type_is_row_major(parent->type)) ||
4508 (glsl_type_is_vector(parent->type) && stride == 0))
4509 stride = type_scalar_size_bytes(parent->type);
4510
4511 assert(stride > 0);
4512 LLVMValueRef index = get_src(ctx, instr->arr.index);
4513 if (LLVMTypeOf(index) != ctx->ac.i64)
4514 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4515
4516 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4517
4518 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4519 } else {
4520 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4521 get_src(ctx, instr->arr.index));
4522 }
4523 break;
4524 case nir_deref_type_ptr_as_array:
4525 if (instr->mode == nir_var_mem_global) {
4526 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4527
4528 LLVMValueRef index = get_src(ctx, instr->arr.index);
4529 if (LLVMTypeOf(index) != ctx->ac.i64)
4530 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4531
4532 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4533
4534 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4535 } else {
4536 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4537 get_src(ctx, instr->arr.index));
4538 }
4539 break;
4540 case nir_deref_type_cast: {
4541 result = get_src(ctx, instr->parent);
4542
4543 /* We can't use the structs from LLVM because the shader
4544 * specifies its own offsets. */
4545 LLVMTypeRef pointee_type = ctx->ac.i8;
4546 if (instr->mode == nir_var_mem_shared)
4547 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4548
4549 unsigned address_space;
4550
4551 switch(instr->mode) {
4552 case nir_var_mem_shared:
4553 address_space = AC_ADDR_SPACE_LDS;
4554 break;
4555 case nir_var_mem_global:
4556 address_space = AC_ADDR_SPACE_GLOBAL;
4557 break;
4558 default:
4559 unreachable("Unhandled address space");
4560 }
4561
4562 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4563
4564 if (LLVMTypeOf(result) != type) {
4565 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4566 result = LLVMBuildBitCast(ctx->ac.builder, result,
4567 type, "");
4568 } else {
4569 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4570 type, "");
4571 }
4572 }
4573 break;
4574 }
4575 default:
4576 unreachable("Unhandled deref_instr deref type");
4577 }
4578
4579 ctx->ssa_defs[instr->dest.ssa.index] = result;
4580 }
4581
4582 static void visit_cf_list(struct ac_nir_context *ctx,
4583 struct exec_list *list);
4584
4585 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4586 {
4587 nir_foreach_instr(instr, block)
4588 {
4589 switch (instr->type) {
4590 case nir_instr_type_alu:
4591 visit_alu(ctx, nir_instr_as_alu(instr));
4592 break;
4593 case nir_instr_type_load_const:
4594 visit_load_const(ctx, nir_instr_as_load_const(instr));
4595 break;
4596 case nir_instr_type_intrinsic:
4597 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4598 break;
4599 case nir_instr_type_tex:
4600 visit_tex(ctx, nir_instr_as_tex(instr));
4601 break;
4602 case nir_instr_type_phi:
4603 visit_phi(ctx, nir_instr_as_phi(instr));
4604 break;
4605 case nir_instr_type_ssa_undef:
4606 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4607 break;
4608 case nir_instr_type_jump:
4609 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4610 break;
4611 case nir_instr_type_deref:
4612 visit_deref(ctx, nir_instr_as_deref(instr));
4613 break;
4614 default:
4615 fprintf(stderr, "Unknown NIR instr type: ");
4616 nir_print_instr(instr, stderr);
4617 fprintf(stderr, "\n");
4618 abort();
4619 }
4620 }
4621
4622 _mesa_hash_table_insert(ctx->defs, block,
4623 LLVMGetInsertBlock(ctx->ac.builder));
4624 }
4625
4626 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4627 {
4628 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4629
4630 nir_block *then_block =
4631 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4632
4633 ac_build_uif(&ctx->ac, value, then_block->index);
4634
4635 visit_cf_list(ctx, &if_stmt->then_list);
4636
4637 if (!exec_list_is_empty(&if_stmt->else_list)) {
4638 nir_block *else_block =
4639 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4640
4641 ac_build_else(&ctx->ac, else_block->index);
4642 visit_cf_list(ctx, &if_stmt->else_list);
4643 }
4644
4645 ac_build_endif(&ctx->ac, then_block->index);
4646 }
4647
4648 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4649 {
4650 nir_block *first_loop_block =
4651 (nir_block *) exec_list_get_head(&loop->body);
4652
4653 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4654
4655 visit_cf_list(ctx, &loop->body);
4656
4657 ac_build_endloop(&ctx->ac, first_loop_block->index);
4658 }
4659
4660 static void visit_cf_list(struct ac_nir_context *ctx,
4661 struct exec_list *list)
4662 {
4663 foreach_list_typed(nir_cf_node, node, node, list)
4664 {
4665 switch (node->type) {
4666 case nir_cf_node_block:
4667 visit_block(ctx, nir_cf_node_as_block(node));
4668 break;
4669
4670 case nir_cf_node_if:
4671 visit_if(ctx, nir_cf_node_as_if(node));
4672 break;
4673
4674 case nir_cf_node_loop:
4675 visit_loop(ctx, nir_cf_node_as_loop(node));
4676 break;
4677
4678 default:
4679 assert(0);
4680 }
4681 }
4682 }
4683
4684 void
4685 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4686 struct ac_shader_abi *abi,
4687 struct nir_shader *nir,
4688 struct nir_variable *variable,
4689 gl_shader_stage stage)
4690 {
4691 unsigned output_loc = variable->data.driver_location / 4;
4692 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4693
4694 /* tess ctrl has it's own load/store paths for outputs */
4695 if (stage == MESA_SHADER_TESS_CTRL)
4696 return;
4697
4698 if (stage == MESA_SHADER_VERTEX ||
4699 stage == MESA_SHADER_TESS_EVAL ||
4700 stage == MESA_SHADER_GEOMETRY) {
4701 int idx = variable->data.location + variable->data.index;
4702 if (idx == VARYING_SLOT_CLIP_DIST0) {
4703 int length = nir->info.clip_distance_array_size +
4704 nir->info.cull_distance_array_size;
4705
4706 if (length > 4)
4707 attrib_count = 2;
4708 else
4709 attrib_count = 1;
4710 }
4711 }
4712
4713 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4714 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4715 for (unsigned i = 0; i < attrib_count; ++i) {
4716 for (unsigned chan = 0; chan < 4; chan++) {
4717 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4718 ac_build_alloca_undef(ctx, type, "");
4719 }
4720 }
4721 }
4722
4723 static void
4724 setup_locals(struct ac_nir_context *ctx,
4725 struct nir_function *func)
4726 {
4727 int i, j;
4728 ctx->num_locals = 0;
4729 nir_foreach_variable(variable, &func->impl->locals) {
4730 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4731 variable->data.driver_location = ctx->num_locals * 4;
4732 variable->data.location_frac = 0;
4733 ctx->num_locals += attrib_count;
4734 }
4735 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4736 if (!ctx->locals)
4737 return;
4738
4739 for (i = 0; i < ctx->num_locals; i++) {
4740 for (j = 0; j < 4; j++) {
4741 ctx->locals[i * 4 + j] =
4742 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4743 }
4744 }
4745 }
4746
4747 static void
4748 setup_scratch(struct ac_nir_context *ctx,
4749 struct nir_shader *shader)
4750 {
4751 if (shader->scratch_size == 0)
4752 return;
4753
4754 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4755 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4756 "scratch");
4757 }
4758
4759 static void
4760 setup_constant_data(struct ac_nir_context *ctx,
4761 struct nir_shader *shader)
4762 {
4763 if (!shader->constant_data)
4764 return;
4765
4766 LLVMValueRef data =
4767 LLVMConstStringInContext(ctx->ac.context,
4768 shader->constant_data,
4769 shader->constant_data_size,
4770 true);
4771 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
4772
4773 /* We want to put the constant data in the CONST address space so that
4774 * we can use scalar loads. However, LLVM versions before 10 put these
4775 * variables in the same section as the code, which is unacceptable
4776 * for RadeonSI as it needs to relocate all the data sections after
4777 * the code sections. See https://reviews.llvm.org/D65813.
4778 */
4779 unsigned address_space =
4780 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
4781
4782 LLVMValueRef global =
4783 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4784 "const_data",
4785 address_space);
4786
4787 LLVMSetInitializer(global, data);
4788 LLVMSetGlobalConstant(global, true);
4789 LLVMSetVisibility(global, LLVMHiddenVisibility);
4790 ctx->constant_data = global;
4791 }
4792
4793 static void
4794 setup_shared(struct ac_nir_context *ctx,
4795 struct nir_shader *nir)
4796 {
4797 if (ctx->ac.lds)
4798 return;
4799
4800 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
4801 nir->info.cs.shared_size);
4802
4803 LLVMValueRef lds =
4804 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4805 "compute_lds",
4806 AC_ADDR_SPACE_LDS);
4807 LLVMSetAlignment(lds, 64 * 1024);
4808
4809 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
4810 LLVMPointerType(ctx->ac.i8,
4811 AC_ADDR_SPACE_LDS), "");
4812 }
4813
4814 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4815 const struct ac_shader_args *args, struct nir_shader *nir)
4816 {
4817 struct ac_nir_context ctx = {};
4818 struct nir_function *func;
4819
4820 ctx.ac = *ac;
4821 ctx.abi = abi;
4822 ctx.args = args;
4823
4824 ctx.stage = nir->info.stage;
4825 ctx.info = &nir->info;
4826
4827 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4828
4829 nir_foreach_variable(variable, &nir->outputs)
4830 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4831 ctx.stage);
4832
4833 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4834 _mesa_key_pointer_equal);
4835 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4836 _mesa_key_pointer_equal);
4837 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4838 _mesa_key_pointer_equal);
4839
4840 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4841
4842 nir_index_ssa_defs(func->impl);
4843 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4844
4845 setup_locals(&ctx, func);
4846 setup_scratch(&ctx, nir);
4847 setup_constant_data(&ctx, nir);
4848
4849 if (gl_shader_stage_is_compute(nir->info.stage))
4850 setup_shared(&ctx, nir);
4851
4852 visit_cf_list(&ctx, &func->impl->body);
4853 phi_post_pass(&ctx);
4854
4855 if (!gl_shader_stage_is_compute(nir->info.stage))
4856 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4857 ctx.abi->outputs);
4858
4859 free(ctx.locals);
4860 free(ctx.ssa_defs);
4861 ralloc_free(ctx.defs);
4862 ralloc_free(ctx.phis);
4863 ralloc_free(ctx.vars);
4864 }
4865
4866 bool
4867 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4868 {
4869 bool progress = false;
4870
4871 /* Lower large variables to scratch first so that we won't bloat the
4872 * shader by generating large if ladders for them. We later lower
4873 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4874 */
4875 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
4876 nir_var_function_temp,
4877 256,
4878 glsl_get_natural_size_align_bytes);
4879
4880 /* While it would be nice not to have this flag, we are constrained
4881 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4882 */
4883 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4884
4885 /* TODO: Indirect indexing of GS inputs is unimplemented.
4886 *
4887 * TCS and TES load inputs directly from LDS or offchip memory, so
4888 * indirect indexing is trivial.
4889 */
4890 nir_variable_mode indirect_mask = 0;
4891 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4892 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4893 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4894 !llvm_has_working_vgpr_indexing)) {
4895 indirect_mask |= nir_var_shader_in;
4896 }
4897 if (!llvm_has_working_vgpr_indexing &&
4898 nir->info.stage != MESA_SHADER_TESS_CTRL)
4899 indirect_mask |= nir_var_shader_out;
4900
4901 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4902 * smart enough to handle indirects without causing excess spilling
4903 * causing the gpu to hang.
4904 *
4905 * See the following thread for more details of the problem:
4906 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4907 */
4908 indirect_mask |= nir_var_function_temp;
4909
4910 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
4911 return progress;
4912 }
4913
4914 static unsigned
4915 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4916 {
4917 if (intrin->intrinsic != nir_intrinsic_store_deref)
4918 return 0;
4919
4920 nir_variable *var =
4921 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4922
4923 if (var->data.mode != nir_var_shader_out)
4924 return 0;
4925
4926 unsigned writemask = 0;
4927 const int location = var->data.location;
4928 unsigned first_component = var->data.location_frac;
4929 unsigned num_comps = intrin->dest.ssa.num_components;
4930
4931 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4932 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4933 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4934 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4935
4936 return writemask;
4937 }
4938
4939 static void
4940 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4941 unsigned *cond_block_tf_writemask,
4942 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4943 {
4944 switch (cf_node->type) {
4945 case nir_cf_node_block: {
4946 nir_block *block = nir_cf_node_as_block(cf_node);
4947 nir_foreach_instr(instr, block) {
4948 if (instr->type != nir_instr_type_intrinsic)
4949 continue;
4950
4951 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4952 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
4953
4954 /* If we find a barrier in nested control flow put this in the
4955 * too hard basket. In GLSL this is not possible but it is in
4956 * SPIR-V.
4957 */
4958 if (is_nested_cf) {
4959 *tessfactors_are_def_in_all_invocs = false;
4960 return;
4961 }
4962
4963 /* The following case must be prevented:
4964 * gl_TessLevelInner = ...;
4965 * barrier();
4966 * if (gl_InvocationID == 1)
4967 * gl_TessLevelInner = ...;
4968 *
4969 * If you consider disjoint code segments separated by barriers, each
4970 * such segment that writes tess factor channels should write the same
4971 * channels in all codepaths within that segment.
4972 */
4973 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4974 /* Accumulate the result: */
4975 *tessfactors_are_def_in_all_invocs &=
4976 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4977
4978 /* Analyze the next code segment from scratch. */
4979 *upper_block_tf_writemask = 0;
4980 *cond_block_tf_writemask = 0;
4981 }
4982 } else
4983 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4984 }
4985
4986 break;
4987 }
4988 case nir_cf_node_if: {
4989 unsigned then_tessfactor_writemask = 0;
4990 unsigned else_tessfactor_writemask = 0;
4991
4992 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4993 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4994 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4995 cond_block_tf_writemask,
4996 tessfactors_are_def_in_all_invocs, true);
4997 }
4998
4999 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5000 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5001 cond_block_tf_writemask,
5002 tessfactors_are_def_in_all_invocs, true);
5003 }
5004
5005 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5006 /* If both statements write the same tess factor channels,
5007 * we can say that the upper block writes them too.
5008 */
5009 *upper_block_tf_writemask |= then_tessfactor_writemask &
5010 else_tessfactor_writemask;
5011 *cond_block_tf_writemask |= then_tessfactor_writemask |
5012 else_tessfactor_writemask;
5013 }
5014
5015 break;
5016 }
5017 case nir_cf_node_loop: {
5018 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5019 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5020 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5021 cond_block_tf_writemask,
5022 tessfactors_are_def_in_all_invocs, true);
5023 }
5024
5025 break;
5026 }
5027 default:
5028 unreachable("unknown cf node type");
5029 }
5030 }
5031
5032 bool
5033 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5034 {
5035 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5036
5037 /* The pass works as follows:
5038 * If all codepaths write tess factors, we can say that all
5039 * invocations define tess factors.
5040 *
5041 * Each tess factor channel is tracked separately.
5042 */
5043 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5044 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5045
5046 /* Initial value = true. Here the pass will accumulate results from
5047 * multiple segments surrounded by barriers. If tess factors aren't
5048 * written at all, it's a shader bug and we don't care if this will be
5049 * true.
5050 */
5051 bool tessfactors_are_def_in_all_invocs = true;
5052
5053 nir_foreach_function(function, nir) {
5054 if (function->impl) {
5055 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5056 scan_tess_ctrl(node, &main_block_tf_writemask,
5057 &cond_block_tf_writemask,
5058 &tessfactors_are_def_in_all_invocs,
5059 false);
5060 }
5061 }
5062 }
5063
5064 /* Accumulate the result for the last code segment separated by a
5065 * barrier.
5066 */
5067 if (main_block_tf_writemask || cond_block_tf_writemask) {
5068 tessfactors_are_def_in_all_invocs &=
5069 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5070 }
5071
5072 return tessfactors_are_def_in_all_invocs;
5073 }