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nir,amd: remove trinary_minmax opcodes
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54 struct hash_table *verified_interp;
55
56 LLVMValueRef main_function;
57 LLVMBasicBlockRef continue_block;
58 LLVMBasicBlockRef break_block;
59
60 int num_locals;
61 LLVMValueRef *locals;
62 };
63
64 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
65 nir_deref_instr *deref_instr,
66 const nir_instr *instr,
67 bool image);
68
69 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
70 nir_deref_instr *deref_instr,
71 enum ac_descriptor_type desc_type,
72 const nir_instr *instr,
73 LLVMValueRef index,
74 bool image, bool write);
75
76 static void
77 build_store_values_extended(struct ac_llvm_context *ac,
78 LLVMValueRef *values,
79 unsigned value_count,
80 unsigned value_stride,
81 LLVMValueRef vec)
82 {
83 LLVMBuilderRef builder = ac->builder;
84 unsigned i;
85
86 for (i = 0; i < value_count; i++) {
87 LLVMValueRef ptr = values[i * value_stride];
88 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
89 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
90 LLVMBuildStore(builder, value, ptr);
91 }
92 }
93
94 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
95 const nir_ssa_def *def)
96 {
97 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
98 if (def->num_components > 1) {
99 type = LLVMVectorType(type, def->num_components);
100 }
101 return type;
102 }
103
104 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
105 {
106 assert(src.is_ssa);
107 return nir->ssa_defs[src.ssa->index];
108 }
109
110 static LLVMValueRef
111 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
112 {
113 LLVMValueRef ptr = get_src(ctx, src);
114 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
115 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
116
117 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
118
119 return LLVMBuildBitCast(ctx->ac.builder, ptr,
120 LLVMPointerType(type, addr_space), "");
121 }
122
123 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
124 const struct nir_block *b)
125 {
126 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
127 return (LLVMBasicBlockRef)entry->data;
128 }
129
130 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
131 nir_alu_src src,
132 unsigned num_components)
133 {
134 LLVMValueRef value = get_src(ctx, src.src);
135 bool need_swizzle = false;
136
137 assert(value);
138 unsigned src_components = ac_get_llvm_num_components(value);
139 for (unsigned i = 0; i < num_components; ++i) {
140 assert(src.swizzle[i] < src_components);
141 if (src.swizzle[i] != i)
142 need_swizzle = true;
143 }
144
145 if (need_swizzle || num_components != src_components) {
146 LLVMValueRef masks[] = {
147 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
148 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
149 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
150 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
151
152 if (src_components > 1 && num_components == 1) {
153 value = LLVMBuildExtractElement(ctx->ac.builder, value,
154 masks[0], "");
155 } else if (src_components == 1 && num_components > 1) {
156 LLVMValueRef values[] = {value, value, value, value};
157 value = ac_build_gather_values(&ctx->ac, values, num_components);
158 } else {
159 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
160 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
161 swizzle, "");
162 }
163 }
164 assert(!src.negate);
165 assert(!src.abs);
166 return value;
167 }
168
169 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
170 LLVMIntPredicate pred, LLVMValueRef src0,
171 LLVMValueRef src1)
172 {
173 LLVMTypeRef src0_type = LLVMTypeOf(src0);
174 LLVMTypeRef src1_type = LLVMTypeOf(src1);
175
176 if (LLVMGetTypeKind(src0_type) == LLVMPointerTypeKind &&
177 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
178 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src0_type, "");
179 } else if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
180 LLVMGetTypeKind(src0_type) != LLVMPointerTypeKind) {
181 src0 = LLVMBuildIntToPtr(ctx->builder, src0, src1_type, "");
182 }
183
184 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
185 return LLVMBuildSelect(ctx->builder, result,
186 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
187 ctx->i32_0, "");
188 }
189
190 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
191 LLVMRealPredicate pred, LLVMValueRef src0,
192 LLVMValueRef src1)
193 {
194 LLVMValueRef result;
195 src0 = ac_to_float(ctx, src0);
196 src1 = ac_to_float(ctx, src1);
197 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
198 return LLVMBuildSelect(ctx->builder, result,
199 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
200 ctx->i32_0, "");
201 }
202
203 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
204 const char *intrin,
205 LLVMTypeRef result_type,
206 LLVMValueRef src0)
207 {
208 char name[64], type[64];
209 LLVMValueRef params[] = {
210 ac_to_float(ctx, src0),
211 };
212
213 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
214 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
215 assert(length < sizeof(name));
216 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
217 }
218
219 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
220 const char *intrin,
221 LLVMTypeRef result_type,
222 LLVMValueRef src0, LLVMValueRef src1)
223 {
224 char name[64], type[64];
225 LLVMValueRef params[] = {
226 ac_to_float(ctx, src0),
227 ac_to_float(ctx, src1),
228 };
229
230 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
231 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
237 const char *intrin,
238 LLVMTypeRef result_type,
239 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
240 {
241 char name[64], type[64];
242 LLVMValueRef params[] = {
243 ac_to_float(ctx, src0),
244 ac_to_float(ctx, src1),
245 ac_to_float(ctx, src2),
246 };
247
248 ac_build_type_name_for_intr(LLVMTypeOf(params[0]), type, sizeof(type));
249 ASSERTED const int length = snprintf(name, sizeof(name), "%s.%s", intrin, type);
250 assert(length < sizeof(name));
251 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
252 }
253
254 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
255 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
256 {
257 LLVMTypeRef src1_type = LLVMTypeOf(src1);
258 LLVMTypeRef src2_type = LLVMTypeOf(src2);
259
260 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
261
262 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
263 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
264 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
265 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
266 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
267 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
268 }
269
270 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
271 ctx->i32_0, "");
272 return LLVMBuildSelect(ctx->builder, v,
273 ac_to_integer_or_pointer(ctx, src1),
274 ac_to_integer_or_pointer(ctx, src2), "");
275 }
276
277 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
278 LLVMValueRef src0)
279 {
280 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
281 }
282
283 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
284 const char *intrin,
285 LLVMValueRef src0, LLVMValueRef src1)
286 {
287 LLVMTypeRef ret_type;
288 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
289 LLVMValueRef res;
290 LLVMValueRef params[] = { src0, src1 };
291 ret_type = LLVMStructTypeInContext(ctx->context, types,
292 2, true);
293
294 res = ac_build_intrinsic(ctx, intrin, ret_type,
295 params, 2, AC_FUNC_ATTR_READNONE);
296
297 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
298 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
299 return res;
300 }
301
302 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
303 LLVMValueRef src0,
304 unsigned bitsize)
305 {
306 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
307 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
308 "");
309 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
310
311 switch (bitsize) {
312 case 16:
313 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
314 case 32:
315 return result;
316 case 64:
317 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
318 default:
319 unreachable("Unsupported bit size.");
320 }
321 }
322
323 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
324 LLVMValueRef src0)
325 {
326 src0 = ac_to_float(ctx, src0);
327 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
328 return LLVMBuildSExt(ctx->builder,
329 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
330 ctx->i32, "");
331 }
332
333 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
334 LLVMValueRef src0,
335 unsigned bitsize)
336 {
337 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
338
339 switch (bitsize) {
340 case 8:
341 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
342 case 16:
343 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
344 case 32:
345 return result;
346 case 64:
347 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
348 default:
349 unreachable("Unsupported bit size.");
350 }
351 }
352
353 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
354 LLVMValueRef src0)
355 {
356 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
357 return LLVMBuildSExt(ctx->builder,
358 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
359 ctx->i32, "");
360 }
361
362 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
363 LLVMValueRef src0)
364 {
365 LLVMValueRef result;
366 LLVMValueRef cond = NULL;
367
368 src0 = ac_to_float(ctx, src0);
369 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
370
371 if (ctx->chip_class >= GFX8) {
372 LLVMValueRef args[2];
373 /* Check if the result is a denormal - and flush to 0 if so. */
374 args[0] = result;
375 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
376 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
377 }
378
379 /* need to convert back up to f32 */
380 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
381
382 if (ctx->chip_class >= GFX8)
383 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
384 else {
385 /* for GFX6-GFX7 */
386 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
387 * so compare the result and flush to 0 if it's smaller.
388 */
389 LLVMValueRef temp, cond2;
390 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
391 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
392 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
393 temp, "");
394 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
395 temp, ctx->f32_0, "");
396 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
397 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
398 }
399 return result;
400 }
401
402 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
403 LLVMValueRef src0, LLVMValueRef src1)
404 {
405 LLVMValueRef dst64, result;
406 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
407 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
408
409 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
410 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
411 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
412 return result;
413 }
414
415 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
416 LLVMValueRef src0, LLVMValueRef src1)
417 {
418 LLVMValueRef dst64, result;
419 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
420 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
421
422 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
423 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
424 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
425 return result;
426 }
427
428 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
429 LLVMValueRef bits, LLVMValueRef offset)
430 {
431 /* mask = ((1 << bits) - 1) << offset */
432 return LLVMBuildShl(ctx->builder,
433 LLVMBuildSub(ctx->builder,
434 LLVMBuildShl(ctx->builder,
435 ctx->i32_1,
436 bits, ""),
437 ctx->i32_1, ""),
438 offset, "");
439 }
440
441 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
442 LLVMValueRef mask, LLVMValueRef insert,
443 LLVMValueRef base)
444 {
445 /* Calculate:
446 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
447 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
448 */
449 return LLVMBuildXor(ctx->builder, base,
450 LLVMBuildAnd(ctx->builder, mask,
451 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
452 }
453
454 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
455 LLVMValueRef src0,
456 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
457 LLVMValueRef args[2]))
458 {
459 LLVMValueRef comp[2];
460
461 src0 = ac_to_float(ctx, src0);
462 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
463 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
464
465 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
466 }
467
468 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
469 LLVMValueRef src0)
470 {
471 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
472 LLVMValueRef temps[2], val;
473 int i;
474
475 for (i = 0; i < 2; i++) {
476 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
477 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
478 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
479 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
480 }
481 return ac_build_gather_values(ctx, temps, 2);
482 }
483
484 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
485 nir_op op,
486 LLVMValueRef src0)
487 {
488 unsigned mask;
489 int idx;
490 LLVMValueRef result;
491
492 if (op == nir_op_fddx_fine)
493 mask = AC_TID_MASK_LEFT;
494 else if (op == nir_op_fddy_fine)
495 mask = AC_TID_MASK_TOP;
496 else
497 mask = AC_TID_MASK_TOP_LEFT;
498
499 /* for DDX we want to next X pixel, DDY next Y pixel. */
500 if (op == nir_op_fddx_fine ||
501 op == nir_op_fddx_coarse ||
502 op == nir_op_fddx)
503 idx = 1;
504 else
505 idx = 2;
506
507 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
508 return result;
509 }
510
511 struct waterfall_context {
512 LLVMBasicBlockRef phi_bb[2];
513 bool use_waterfall;
514 };
515
516 /* To deal with divergent descriptors we can create a loop that handles all
517 * lanes with the same descriptor on a given iteration (henceforth a
518 * waterfall loop).
519 *
520 * These helper create the begin and end of the loop leaving the caller
521 * to implement the body.
522 *
523 * params:
524 * - ctx is the usal nir context
525 * - wctx is a temporary struct containing some loop info. Can be left uninitialized.
526 * - value is the possibly divergent value for which we built the loop
527 * - divergent is whether value is actually divergent. If false we just pass
528 * things through.
529 */
530 static LLVMValueRef enter_waterfall(struct ac_nir_context *ctx,
531 struct waterfall_context *wctx,
532 LLVMValueRef value, bool divergent)
533 {
534 /* If the app claims the value is divergent but it is constant we can
535 * end up with a dynamic index of NULL. */
536 if (!value)
537 divergent = false;
538
539 wctx->use_waterfall = divergent;
540 if (!divergent)
541 return value;
542
543 ac_build_bgnloop(&ctx->ac, 6000);
544
545 LLVMValueRef scalar_value = ac_build_readlane(&ctx->ac, value, NULL);
546
547 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, value,
548 scalar_value, "uniform_active");
549
550 wctx->phi_bb[0] = LLVMGetInsertBlock(ctx->ac.builder);
551 ac_build_ifcc(&ctx->ac, active, 6001);
552
553 return scalar_value;
554 }
555
556 static LLVMValueRef exit_waterfall(struct ac_nir_context *ctx,
557 struct waterfall_context *wctx,
558 LLVMValueRef value)
559 {
560 LLVMValueRef ret = NULL;
561 LLVMValueRef phi_src[2];
562 LLVMValueRef cc_phi_src[2] = {
563 LLVMConstInt(ctx->ac.i32, 0, false),
564 LLVMConstInt(ctx->ac.i32, 0xffffffff, false),
565 };
566
567 if (!wctx->use_waterfall)
568 return value;
569
570 wctx->phi_bb[1] = LLVMGetInsertBlock(ctx->ac.builder);
571
572 ac_build_endif(&ctx->ac, 6001);
573
574 if (value) {
575 phi_src[0] = LLVMGetUndef(LLVMTypeOf(value));
576 phi_src[1] = value;
577
578 ret = ac_build_phi(&ctx->ac, LLVMTypeOf(value), 2, phi_src, wctx->phi_bb);
579 }
580
581 /*
582 * By using the optimization barrier on the exit decision, we decouple
583 * the operations from the break, and hence avoid LLVM hoisting the
584 * opteration into the break block.
585 */
586 LLVMValueRef cc = ac_build_phi(&ctx->ac, ctx->ac.i32, 2, cc_phi_src, wctx->phi_bb);
587 ac_build_optimization_barrier(&ctx->ac, &cc);
588
589 LLVMValueRef active = LLVMBuildICmp(ctx->ac.builder, LLVMIntNE, cc, ctx->ac.i32_0, "uniform_active2");
590 ac_build_ifcc(&ctx->ac, active, 6002);
591 ac_build_break(&ctx->ac);
592 ac_build_endif(&ctx->ac, 6002);
593
594 ac_build_endloop(&ctx->ac, 6000);
595 return ret;
596 }
597
598 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
599 {
600 LLVMValueRef src[4], result = NULL;
601 unsigned num_components = instr->dest.dest.ssa.num_components;
602 unsigned src_components;
603 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
604 bool saved_inexact = false;
605
606 if (instr->exact)
607 saved_inexact = ac_disable_inexact_math(ctx->ac.builder);
608
609 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
610 switch (instr->op) {
611 case nir_op_vec2:
612 case nir_op_vec3:
613 case nir_op_vec4:
614 src_components = 1;
615 break;
616 case nir_op_pack_half_2x16:
617 case nir_op_pack_snorm_2x16:
618 case nir_op_pack_unorm_2x16:
619 src_components = 2;
620 break;
621 case nir_op_unpack_half_2x16:
622 src_components = 1;
623 break;
624 case nir_op_cube_face_coord:
625 case nir_op_cube_face_index:
626 src_components = 3;
627 break;
628 default:
629 src_components = num_components;
630 break;
631 }
632 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
633 src[i] = get_alu_src(ctx, instr->src[i], src_components);
634
635 switch (instr->op) {
636 case nir_op_mov:
637 result = src[0];
638 break;
639 case nir_op_fneg:
640 src[0] = ac_to_float(&ctx->ac, src[0]);
641 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
642 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
643 /* fneg will be optimized by backend compiler with sign
644 * bit removed via XOR. This is probably a LLVM bug.
645 */
646 result = ac_build_canonicalize(&ctx->ac, result,
647 instr->dest.dest.ssa.bit_size);
648 }
649 break;
650 case nir_op_ineg:
651 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
652 break;
653 case nir_op_inot:
654 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
655 break;
656 case nir_op_iadd:
657 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
658 break;
659 case nir_op_fadd:
660 src[0] = ac_to_float(&ctx->ac, src[0]);
661 src[1] = ac_to_float(&ctx->ac, src[1]);
662 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
663 break;
664 case nir_op_fsub:
665 src[0] = ac_to_float(&ctx->ac, src[0]);
666 src[1] = ac_to_float(&ctx->ac, src[1]);
667 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
668 break;
669 case nir_op_isub:
670 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
671 break;
672 case nir_op_imul:
673 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
674 break;
675 case nir_op_imod:
676 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
677 break;
678 case nir_op_umod:
679 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
680 break;
681 case nir_op_fmod:
682 /* lower_fmod only lower 16-bit and 32-bit fmod */
683 assert(instr->dest.dest.ssa.bit_size == 64);
684 src[0] = ac_to_float(&ctx->ac, src[0]);
685 src[1] = ac_to_float(&ctx->ac, src[1]);
686 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
687 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
688 ac_to_float_type(&ctx->ac, def_type), result);
689 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
690 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
691 break;
692 case nir_op_irem:
693 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
694 break;
695 case nir_op_idiv:
696 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
697 break;
698 case nir_op_udiv:
699 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
700 break;
701 case nir_op_fmul:
702 src[0] = ac_to_float(&ctx->ac, src[0]);
703 src[1] = ac_to_float(&ctx->ac, src[1]);
704 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
705 break;
706 case nir_op_frcp:
707 /* For doubles, we need precise division to pass GLCTS. */
708 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL &&
709 ac_get_type_size(def_type) == 8) {
710 result = LLVMBuildFDiv(ctx->ac.builder, ctx->ac.f64_1,
711 ac_to_float(&ctx->ac, src[0]), "");
712 } else {
713 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rcp",
714 ac_to_float_type(&ctx->ac, def_type), src[0]);
715 }
716 break;
717 case nir_op_iand:
718 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
719 break;
720 case nir_op_ior:
721 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
722 break;
723 case nir_op_ixor:
724 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
725 break;
726 case nir_op_ishl:
727 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
728 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
729 LLVMTypeOf(src[0]), "");
730 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
731 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
732 LLVMTypeOf(src[0]), "");
733 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
734 break;
735 case nir_op_ishr:
736 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
737 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
738 LLVMTypeOf(src[0]), "");
739 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
740 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
741 LLVMTypeOf(src[0]), "");
742 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
743 break;
744 case nir_op_ushr:
745 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
746 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
747 LLVMTypeOf(src[0]), "");
748 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
749 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
750 LLVMTypeOf(src[0]), "");
751 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
752 break;
753 case nir_op_ilt32:
754 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
755 break;
756 case nir_op_ine32:
757 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
758 break;
759 case nir_op_ieq32:
760 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
761 break;
762 case nir_op_ige32:
763 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
764 break;
765 case nir_op_ult32:
766 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
767 break;
768 case nir_op_uge32:
769 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
770 break;
771 case nir_op_feq32:
772 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
773 break;
774 case nir_op_fneu32:
775 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
776 break;
777 case nir_op_flt32:
778 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
779 break;
780 case nir_op_fge32:
781 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
782 break;
783 case nir_op_fabs:
784 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
785 ac_to_float_type(&ctx->ac, def_type), src[0]);
786 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
787 /* fabs will be optimized by backend compiler with sign
788 * bit removed via AND.
789 */
790 result = ac_build_canonicalize(&ctx->ac, result,
791 instr->dest.dest.ssa.bit_size);
792 }
793 break;
794 case nir_op_iabs:
795 result = emit_iabs(&ctx->ac, src[0]);
796 break;
797 case nir_op_imax:
798 result = ac_build_imax(&ctx->ac, src[0], src[1]);
799 break;
800 case nir_op_imin:
801 result = ac_build_imin(&ctx->ac, src[0], src[1]);
802 break;
803 case nir_op_umax:
804 result = ac_build_umax(&ctx->ac, src[0], src[1]);
805 break;
806 case nir_op_umin:
807 result = ac_build_umin(&ctx->ac, src[0], src[1]);
808 break;
809 case nir_op_isign:
810 result = ac_build_isign(&ctx->ac, src[0],
811 instr->dest.dest.ssa.bit_size);
812 break;
813 case nir_op_fsign:
814 src[0] = ac_to_float(&ctx->ac, src[0]);
815 result = ac_build_fsign(&ctx->ac, src[0],
816 instr->dest.dest.ssa.bit_size);
817 break;
818 case nir_op_ffloor:
819 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
820 ac_to_float_type(&ctx->ac, def_type), src[0]);
821 break;
822 case nir_op_ftrunc:
823 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
824 ac_to_float_type(&ctx->ac, def_type), src[0]);
825 break;
826 case nir_op_fceil:
827 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
828 ac_to_float_type(&ctx->ac, def_type), src[0]);
829 break;
830 case nir_op_fround_even:
831 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
832 ac_to_float_type(&ctx->ac, def_type),src[0]);
833 break;
834 case nir_op_ffract:
835 src[0] = ac_to_float(&ctx->ac, src[0]);
836 result = ac_build_fract(&ctx->ac, src[0],
837 instr->dest.dest.ssa.bit_size);
838 break;
839 case nir_op_fsin:
840 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
841 ac_to_float_type(&ctx->ac, def_type), src[0]);
842 break;
843 case nir_op_fcos:
844 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
845 ac_to_float_type(&ctx->ac, def_type), src[0]);
846 break;
847 case nir_op_fsqrt:
848 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
849 ac_to_float_type(&ctx->ac, def_type), src[0]);
850 break;
851 case nir_op_fexp2:
852 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
853 ac_to_float_type(&ctx->ac, def_type), src[0]);
854 break;
855 case nir_op_flog2:
856 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
857 ac_to_float_type(&ctx->ac, def_type), src[0]);
858 break;
859 case nir_op_frsq:
860 result = emit_intrin_1f_param(&ctx->ac, "llvm.amdgcn.rsq",
861 ac_to_float_type(&ctx->ac, def_type), src[0]);
862 break;
863 case nir_op_frexp_exp:
864 src[0] = ac_to_float(&ctx->ac, src[0]);
865 result = ac_build_frexp_exp(&ctx->ac, src[0],
866 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
867 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
868 result = LLVMBuildSExt(ctx->ac.builder, result,
869 ctx->ac.i32, "");
870 break;
871 case nir_op_frexp_sig:
872 src[0] = ac_to_float(&ctx->ac, src[0]);
873 result = ac_build_frexp_mant(&ctx->ac, src[0],
874 instr->dest.dest.ssa.bit_size);
875 break;
876 case nir_op_fpow:
877 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
878 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
879 break;
880 case nir_op_fmax:
881 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
882 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
883 if (ctx->ac.chip_class < GFX9 &&
884 instr->dest.dest.ssa.bit_size == 32) {
885 /* Only pre-GFX9 chips do not flush denorms. */
886 result = ac_build_canonicalize(&ctx->ac, result,
887 instr->dest.dest.ssa.bit_size);
888 }
889 break;
890 case nir_op_fmin:
891 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
892 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
893 if (ctx->ac.chip_class < GFX9 &&
894 instr->dest.dest.ssa.bit_size == 32) {
895 /* Only pre-GFX9 chips do not flush denorms. */
896 result = ac_build_canonicalize(&ctx->ac, result,
897 instr->dest.dest.ssa.bit_size);
898 }
899 break;
900 case nir_op_ffma:
901 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
902 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
903 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
904 break;
905 case nir_op_ldexp:
906 src[0] = ac_to_float(&ctx->ac, src[0]);
907 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
908 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
909 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
910 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
911 else
912 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
913 break;
914 case nir_op_bfm:
915 result = emit_bfm(&ctx->ac, src[0], src[1]);
916 break;
917 case nir_op_bitfield_select:
918 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
919 break;
920 case nir_op_ubfe:
921 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
922 break;
923 case nir_op_ibfe:
924 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
925 break;
926 case nir_op_bitfield_reverse:
927 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
928 break;
929 case nir_op_bit_count:
930 result = ac_build_bit_count(&ctx->ac, src[0]);
931 break;
932 case nir_op_vec2:
933 case nir_op_vec3:
934 case nir_op_vec4:
935 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
936 src[i] = ac_to_integer(&ctx->ac, src[i]);
937 result = ac_build_gather_values(&ctx->ac, src, num_components);
938 break;
939 case nir_op_f2i8:
940 case nir_op_f2i16:
941 case nir_op_f2i32:
942 case nir_op_f2i64:
943 src[0] = ac_to_float(&ctx->ac, src[0]);
944 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
945 break;
946 case nir_op_f2u8:
947 case nir_op_f2u16:
948 case nir_op_f2u32:
949 case nir_op_f2u64:
950 src[0] = ac_to_float(&ctx->ac, src[0]);
951 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
952 break;
953 case nir_op_i2f16:
954 case nir_op_i2f32:
955 case nir_op_i2f64:
956 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
957 break;
958 case nir_op_u2f16:
959 case nir_op_u2f32:
960 case nir_op_u2f64:
961 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
962 break;
963 case nir_op_f2f16_rtz:
964 case nir_op_f2f16:
965 case nir_op_f2fmp:
966 src[0] = ac_to_float(&ctx->ac, src[0]);
967
968 /* For OpenGL, we want fast packing with v_cvt_pkrtz_f16, but if we use it,
969 * all f32->f16 conversions have to round towards zero, because both scalar
970 * and vec2 down-conversions have to round equally.
971 */
972 if (ctx->ac.float_mode == AC_FLOAT_MODE_DEFAULT_OPENGL ||
973 instr->op == nir_op_f2f16_rtz) {
974 src[0] = ac_to_float(&ctx->ac, src[0]);
975
976 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
977 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
978
979 /* Fast path conversion. This only works if NIR is vectorized
980 * to vec2 16.
981 */
982 if (LLVMTypeOf(src[0]) == ctx->ac.v2f32) {
983 LLVMValueRef args[] = {
984 ac_llvm_extract_elem(&ctx->ac, src[0], 0),
985 ac_llvm_extract_elem(&ctx->ac, src[0], 1),
986 };
987 result = ac_build_cvt_pkrtz_f16(&ctx->ac, args);
988 break;
989 }
990
991 assert(ac_get_llvm_num_components(src[0]) == 1);
992 LLVMValueRef param[2] = { src[0], LLVMGetUndef(ctx->ac.f32) };
993 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
994 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
995 } else {
996 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
997 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
998 else
999 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1000 }
1001 break;
1002 case nir_op_f2f16_rtne:
1003 case nir_op_f2f32:
1004 case nir_op_f2f64:
1005 src[0] = ac_to_float(&ctx->ac, src[0]);
1006 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1007 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1008 else
1009 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
1010 break;
1011 case nir_op_u2u8:
1012 case nir_op_u2u16:
1013 case nir_op_u2ump:
1014 case nir_op_u2u32:
1015 case nir_op_u2u64:
1016 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1017 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
1018 else
1019 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1020 break;
1021 case nir_op_i2i8:
1022 case nir_op_i2i16:
1023 case nir_op_i2imp:
1024 case nir_op_i2i32:
1025 case nir_op_i2i64:
1026 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
1027 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
1028 else
1029 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
1030 break;
1031 case nir_op_b32csel:
1032 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
1033 break;
1034 case nir_op_find_lsb:
1035 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
1036 break;
1037 case nir_op_ufind_msb:
1038 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
1039 break;
1040 case nir_op_ifind_msb:
1041 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
1042 break;
1043 case nir_op_uadd_carry:
1044 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
1045 break;
1046 case nir_op_usub_borrow:
1047 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
1048 break;
1049 case nir_op_b2f16:
1050 case nir_op_b2f32:
1051 case nir_op_b2f64:
1052 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1053 break;
1054 case nir_op_f2b32:
1055 result = emit_f2b(&ctx->ac, src[0]);
1056 break;
1057 case nir_op_b2i8:
1058 case nir_op_b2i16:
1059 case nir_op_b2i32:
1060 case nir_op_b2i64:
1061 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
1062 break;
1063 case nir_op_i2b32:
1064 result = emit_i2b(&ctx->ac, src[0]);
1065 break;
1066 case nir_op_fquantize2f16:
1067 result = emit_f2f16(&ctx->ac, src[0]);
1068 break;
1069 case nir_op_umul_high:
1070 result = emit_umul_high(&ctx->ac, src[0], src[1]);
1071 break;
1072 case nir_op_imul_high:
1073 result = emit_imul_high(&ctx->ac, src[0], src[1]);
1074 break;
1075 case nir_op_pack_half_2x16:
1076 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
1077 break;
1078 case nir_op_pack_snorm_2x16:
1079 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
1080 break;
1081 case nir_op_pack_unorm_2x16:
1082 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
1083 break;
1084 case nir_op_unpack_half_2x16:
1085 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
1086 break;
1087 case nir_op_fddx:
1088 case nir_op_fddy:
1089 case nir_op_fddx_fine:
1090 case nir_op_fddy_fine:
1091 case nir_op_fddx_coarse:
1092 case nir_op_fddy_coarse:
1093 result = emit_ddxy(ctx, instr->op, src[0]);
1094 break;
1095
1096 case nir_op_unpack_64_2x32_split_x: {
1097 assert(ac_get_llvm_num_components(src[0]) == 1);
1098 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1099 ctx->ac.v2i32,
1100 "");
1101 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1102 ctx->ac.i32_0, "");
1103 break;
1104 }
1105
1106 case nir_op_unpack_64_2x32_split_y: {
1107 assert(ac_get_llvm_num_components(src[0]) == 1);
1108 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1109 ctx->ac.v2i32,
1110 "");
1111 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1112 ctx->ac.i32_1, "");
1113 break;
1114 }
1115
1116 case nir_op_pack_64_2x32_split: {
1117 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1118 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
1119 break;
1120 }
1121
1122 case nir_op_pack_32_2x16_split: {
1123 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
1124 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
1125 break;
1126 }
1127
1128 case nir_op_unpack_32_2x16_split_x: {
1129 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1130 ctx->ac.v2i16,
1131 "");
1132 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1133 ctx->ac.i32_0, "");
1134 break;
1135 }
1136
1137 case nir_op_unpack_32_2x16_split_y: {
1138 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
1139 ctx->ac.v2i16,
1140 "");
1141 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
1142 ctx->ac.i32_1, "");
1143 break;
1144 }
1145
1146 case nir_op_cube_face_coord: {
1147 src[0] = ac_to_float(&ctx->ac, src[0]);
1148 LLVMValueRef results[2];
1149 LLVMValueRef in[3];
1150 for (unsigned chan = 0; chan < 3; chan++)
1151 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1152 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1153 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1154 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1155 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1156 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1157 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1158 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1159 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1160 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1161 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1162 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1163 result = ac_build_gather_values(&ctx->ac, results, 2);
1164 break;
1165 }
1166
1167 case nir_op_cube_face_index: {
1168 src[0] = ac_to_float(&ctx->ac, src[0]);
1169 LLVMValueRef in[3];
1170 for (unsigned chan = 0; chan < 3; chan++)
1171 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1172 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1173 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1174 break;
1175 }
1176
1177 default:
1178 fprintf(stderr, "Unknown NIR alu instr: ");
1179 nir_print_instr(&instr->instr, stderr);
1180 fprintf(stderr, "\n");
1181 abort();
1182 }
1183
1184 if (result) {
1185 assert(instr->dest.dest.is_ssa);
1186 result = ac_to_integer_or_pointer(&ctx->ac, result);
1187 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1188 }
1189
1190 if (instr->exact)
1191 ac_restore_inexact_math(ctx->ac.builder, saved_inexact);
1192 }
1193
1194 static void visit_load_const(struct ac_nir_context *ctx,
1195 const nir_load_const_instr *instr)
1196 {
1197 LLVMValueRef values[4], value = NULL;
1198 LLVMTypeRef element_type =
1199 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1200
1201 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1202 switch (instr->def.bit_size) {
1203 case 8:
1204 values[i] = LLVMConstInt(element_type,
1205 instr->value[i].u8, false);
1206 break;
1207 case 16:
1208 values[i] = LLVMConstInt(element_type,
1209 instr->value[i].u16, false);
1210 break;
1211 case 32:
1212 values[i] = LLVMConstInt(element_type,
1213 instr->value[i].u32, false);
1214 break;
1215 case 64:
1216 values[i] = LLVMConstInt(element_type,
1217 instr->value[i].u64, false);
1218 break;
1219 default:
1220 fprintf(stderr,
1221 "unsupported nir load_const bit_size: %d\n",
1222 instr->def.bit_size);
1223 abort();
1224 }
1225 }
1226 if (instr->def.num_components > 1) {
1227 value = LLVMConstVector(values, instr->def.num_components);
1228 } else
1229 value = values[0];
1230
1231 ctx->ssa_defs[instr->def.index] = value;
1232 }
1233
1234 static LLVMValueRef
1235 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1236 {
1237 LLVMValueRef size =
1238 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1239 LLVMConstInt(ctx->ac.i32, 2, false), "");
1240
1241 /* GFX8 only */
1242 if (ctx->ac.chip_class == GFX8 && in_elements) {
1243 /* On GFX8, the descriptor contains the size in bytes,
1244 * but TXQ must return the size in elements.
1245 * The stride is always non-zero for resources using TXQ.
1246 */
1247 LLVMValueRef stride =
1248 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1249 ctx->ac.i32_1, "");
1250 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1251 LLVMConstInt(ctx->ac.i32, 16, false), "");
1252 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1253 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1254
1255 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1256 }
1257 return size;
1258 }
1259
1260 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1261 * incorrectly forces nearest filtering if the texture format is integer.
1262 * The only effect it has on Gather4, which always returns 4 texels for
1263 * bilinear filtering, is that the final coordinates are off by 0.5 of
1264 * the texel size.
1265 *
1266 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1267 * or (0.5 / size) from the normalized coordinates.
1268 *
1269 * However, cube textures with 8_8_8_8 data formats require a different
1270 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1271 * precision in 32-bit data formats, so it needs to be applied dynamically at
1272 * runtime. In this case, return an i1 value that indicates whether the
1273 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1274 */
1275 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1276 nir_variable *var,
1277 struct ac_image_args *args,
1278 const nir_tex_instr *instr)
1279 {
1280 const struct glsl_type *type = glsl_without_array(var->type);
1281 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1282 LLVMValueRef wa_8888 = NULL;
1283 LLVMValueRef half_texel[2];
1284 LLVMValueRef result;
1285
1286 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1287
1288 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1289 LLVMValueRef formats;
1290 LLVMValueRef data_format;
1291 LLVMValueRef wa_formats;
1292
1293 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1294
1295 data_format = LLVMBuildLShr(ctx->builder, formats,
1296 LLVMConstInt(ctx->i32, 20, false), "");
1297 data_format = LLVMBuildAnd(ctx->builder, data_format,
1298 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1299 wa_8888 = LLVMBuildICmp(
1300 ctx->builder, LLVMIntEQ, data_format,
1301 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1302 "");
1303
1304 uint32_t wa_num_format =
1305 stype == GLSL_TYPE_UINT ?
1306 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1307 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1308 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1309 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1310 "");
1311 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1312 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1313
1314 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1315 args->resource = LLVMBuildInsertElement(
1316 ctx->builder, args->resource, formats, ctx->i32_1, "");
1317 }
1318
1319 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1320 assert(!wa_8888);
1321 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1322 } else {
1323 struct ac_image_args resinfo = {};
1324 LLVMBasicBlockRef bbs[2];
1325
1326 LLVMValueRef unnorm = NULL;
1327 LLVMValueRef default_offset = ctx->f32_0;
1328 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1329 !instr->is_array) {
1330 /* In vulkan, whether the sampler uses unnormalized
1331 * coordinates or not is a dynamic property of the
1332 * sampler. Hence, to figure out whether or not we
1333 * need to divide by the texture size, we need to test
1334 * the sampler at runtime. This tests the bit set by
1335 * radv_init_sampler().
1336 */
1337 LLVMValueRef sampler0 =
1338 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1339 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1340 LLVMConstInt(ctx->i32, 15, false), "");
1341 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1342 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1343 default_offset = LLVMConstReal(ctx->f32, -0.5);
1344 }
1345
1346 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1347 if (wa_8888 || unnorm) {
1348 assert(!(wa_8888 && unnorm));
1349 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1350 /* Skip the texture size query entirely if we don't need it. */
1351 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1352 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1353 }
1354
1355 /* Query the texture size. */
1356 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1357 resinfo.opcode = ac_image_get_resinfo;
1358 resinfo.dmask = 0xf;
1359 resinfo.lod = ctx->i32_0;
1360 resinfo.resource = args->resource;
1361 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1362 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1363
1364 /* Compute -0.5 / size. */
1365 for (unsigned c = 0; c < 2; c++) {
1366 half_texel[c] =
1367 LLVMBuildExtractElement(ctx->builder, size,
1368 LLVMConstInt(ctx->i32, c, 0), "");
1369 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1370 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1371 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1372 LLVMConstReal(ctx->f32, -0.5), "");
1373 }
1374
1375 if (wa_8888 || unnorm) {
1376 ac_build_endif(ctx, 2000);
1377
1378 for (unsigned c = 0; c < 2; c++) {
1379 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1380 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1381 values, bbs);
1382 }
1383 }
1384 }
1385
1386 for (unsigned c = 0; c < 2; c++) {
1387 LLVMValueRef tmp;
1388 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1389 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1390 }
1391
1392 args->attributes = AC_FUNC_ATTR_READNONE;
1393 result = ac_build_image_opcode(ctx, args);
1394
1395 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1396 LLVMValueRef tmp, tmp2;
1397
1398 /* if the cube workaround is in place, f2i the result. */
1399 for (unsigned c = 0; c < 4; c++) {
1400 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1401 if (stype == GLSL_TYPE_UINT)
1402 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1403 else
1404 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1405 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1406 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1407 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1408 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1409 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1410 }
1411 }
1412 return result;
1413 }
1414
1415 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1416 {
1417 nir_deref_instr *texture_deref_instr = NULL;
1418
1419 for (unsigned i = 0; i < instr->num_srcs; i++) {
1420 switch (instr->src[i].src_type) {
1421 case nir_tex_src_texture_deref:
1422 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1423 break;
1424 default:
1425 break;
1426 }
1427 }
1428 return texture_deref_instr;
1429 }
1430
1431 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1432 const nir_tex_instr *instr,
1433 struct ac_image_args *args)
1434 {
1435 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1436 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1437
1438 assert(instr->dest.is_ssa);
1439 return ac_build_buffer_load_format(&ctx->ac,
1440 args->resource,
1441 args->coords[0],
1442 ctx->ac.i32_0,
1443 util_last_bit(mask),
1444 0, true,
1445 instr->dest.ssa.bit_size == 16);
1446 }
1447
1448 args->opcode = ac_image_sample;
1449
1450 switch (instr->op) {
1451 case nir_texop_txf:
1452 case nir_texop_txf_ms:
1453 case nir_texop_samples_identical:
1454 args->opcode = args->level_zero ||
1455 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1456 ac_image_load : ac_image_load_mip;
1457 args->level_zero = false;
1458 break;
1459 case nir_texop_txs:
1460 case nir_texop_query_levels:
1461 args->opcode = ac_image_get_resinfo;
1462 if (!args->lod)
1463 args->lod = ctx->ac.i32_0;
1464 args->level_zero = false;
1465 break;
1466 case nir_texop_tex:
1467 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1468 assert(!args->lod);
1469 args->level_zero = true;
1470 }
1471 break;
1472 case nir_texop_tg4:
1473 args->opcode = ac_image_gather4;
1474 if (!args->lod && !args->bias)
1475 args->level_zero = true;
1476 break;
1477 case nir_texop_lod:
1478 args->opcode = ac_image_get_lod;
1479 break;
1480 case nir_texop_fragment_fetch:
1481 case nir_texop_fragment_mask_fetch:
1482 args->opcode = ac_image_load;
1483 args->level_zero = false;
1484 break;
1485 default:
1486 break;
1487 }
1488
1489 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1490 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1491 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1492 const struct glsl_type *type = glsl_without_array(var->type);
1493 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1494 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1495 return lower_gather4_integer(&ctx->ac, var, args, instr);
1496 }
1497 }
1498
1499 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1500 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1501 if ((args->dim == ac_image_2darray ||
1502 args->dim == ac_image_2d) && !args->coords[1]) {
1503 args->coords[1] = ctx->ac.i32_0;
1504 }
1505 }
1506
1507 args->attributes = AC_FUNC_ATTR_READNONE;
1508 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1509 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1510 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1511 /* Prevent texture instructions with implicit derivatives from being
1512 * sinked into branches. */
1513 switch (instr->op) {
1514 case nir_texop_tex:
1515 case nir_texop_txb:
1516 case nir_texop_lod:
1517 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1518 break;
1519 default:
1520 break;
1521 }
1522 }
1523
1524 return ac_build_image_opcode(&ctx->ac, args);
1525 }
1526
1527 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1528 nir_intrinsic_instr *instr)
1529 {
1530 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1531 LLVMValueRef index = get_src(ctx, instr->src[1]);
1532
1533 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1534 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1535 return result;
1536 }
1537
1538 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1539 nir_intrinsic_instr *instr)
1540 {
1541 LLVMValueRef ptr, addr;
1542 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1543 unsigned index = nir_intrinsic_base(instr);
1544
1545 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1546 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1547
1548 /* Load constant values from user SGPRS when possible, otherwise
1549 * fallback to the default path that loads directly from memory.
1550 */
1551 if (LLVMIsConstant(src0) &&
1552 instr->dest.ssa.bit_size == 32) {
1553 unsigned count = instr->dest.ssa.num_components;
1554 unsigned offset = index;
1555
1556 offset += LLVMConstIntGetZExtValue(src0);
1557 offset /= 4;
1558
1559 offset -= ctx->args->base_inline_push_consts;
1560
1561 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1562 if (offset + count <= num_inline_push_consts) {
1563 LLVMValueRef push_constants[num_inline_push_consts];
1564 for (unsigned i = 0; i < num_inline_push_consts; i++)
1565 push_constants[i] = ac_get_arg(&ctx->ac,
1566 ctx->args->inline_push_consts[i]);
1567 return ac_build_gather_values(&ctx->ac,
1568 push_constants + offset,
1569 count);
1570 }
1571 }
1572
1573 ptr = LLVMBuildGEP(ctx->ac.builder,
1574 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1575
1576 if (instr->dest.ssa.bit_size == 8) {
1577 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1578 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i8, 4 * load_dwords);
1579 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1580 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1581
1582 LLVMValueRef params[3];
1583 if (load_dwords > 1) {
1584 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.v2i32, "");
1585 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1586 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1587 } else {
1588 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1589 params[0] = ctx->ac.i32_0;
1590 params[1] = res;
1591 }
1592 params[2] = addr;
1593 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1594
1595 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1596 if (instr->dest.ssa.num_components > 1)
1597 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i8, instr->dest.ssa.num_components), "");
1598 return res;
1599 } else if (instr->dest.ssa.bit_size == 16) {
1600 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1601 LLVMTypeRef vec_type = LLVMVectorType(ctx->ac.i16, 2 * load_dwords);
1602 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1603 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1604 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1605 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1606 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1607 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1608 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1609 LLVMConstInt(ctx->ac.i32, 4, false)};
1610 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1611 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1612 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1613 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1614 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1615 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1616 }
1617
1618 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1619
1620 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1621 }
1622
1623 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1624 const nir_intrinsic_instr *instr)
1625 {
1626 LLVMValueRef index = get_src(ctx, instr->src[0]);
1627
1628 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1629 }
1630
1631 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1632 {
1633 uint32_t new_mask = 0;
1634 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1635 if (mask & (1u << i))
1636 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1637 return new_mask;
1638 }
1639
1640 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1641 unsigned start, unsigned count)
1642 {
1643 LLVMValueRef mask[] = {
1644 ctx->i32_0, ctx->i32_1,
1645 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1646
1647 unsigned src_elements = ac_get_llvm_num_components(src);
1648
1649 if (count == src_elements) {
1650 assert(start == 0);
1651 return src;
1652 } else if (count == 1) {
1653 assert(start < src_elements);
1654 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1655 } else {
1656 assert(start + count <= src_elements);
1657 assert(count <= 4);
1658 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1659 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1660 }
1661 }
1662
1663 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1664 enum gl_access_qualifier access,
1665 bool may_store_unaligned,
1666 bool writeonly_memory)
1667 {
1668 unsigned cache_policy = 0;
1669
1670 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1671 * store opcodes not aligned to a dword are affected. The only way to
1672 * get unaligned stores is through shader images.
1673 */
1674 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1675 /* If this is write-only, don't keep data in L1 to prevent
1676 * evicting L1 cache lines that may be needed by other
1677 * instructions.
1678 */
1679 writeonly_memory ||
1680 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1681 cache_policy |= ac_glc;
1682 }
1683
1684 if (access & ACCESS_STREAM_CACHE_POLICY)
1685 cache_policy |= ac_slc | ac_glc;
1686
1687 return cache_policy;
1688 }
1689
1690 static LLVMValueRef enter_waterfall_ssbo(struct ac_nir_context *ctx,
1691 struct waterfall_context *wctx,
1692 const nir_intrinsic_instr *instr,
1693 nir_src src)
1694 {
1695 return enter_waterfall(ctx, wctx, get_src(ctx, src),
1696 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
1697 }
1698
1699 static void visit_store_ssbo(struct ac_nir_context *ctx,
1700 nir_intrinsic_instr *instr)
1701 {
1702 if (ctx->ac.postponed_kill) {
1703 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1704 ctx->ac.postponed_kill, "");
1705 ac_build_ifcc(&ctx->ac, cond, 7000);
1706 }
1707
1708 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1709 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1710 unsigned writemask = nir_intrinsic_write_mask(instr);
1711 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1712 bool writeonly_memory = access & ACCESS_NON_READABLE;
1713 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1714
1715 struct waterfall_context wctx;
1716 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[1]);
1717
1718 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, true);
1719 LLVMValueRef base_data = src_data;
1720 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1721 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1722
1723 while (writemask) {
1724 int start, count;
1725 LLVMValueRef data, offset;
1726 LLVMTypeRef data_type;
1727
1728 u_bit_scan_consecutive_range(&writemask, &start, &count);
1729
1730 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1731 * writes into a 2-element and a 1-element write. */
1732 if (count == 3 &&
1733 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1734 writemask |= 1 << (start + 2);
1735 count = 2;
1736 }
1737 int num_bytes = count * elem_size_bytes; /* count in bytes */
1738
1739 /* we can only store 4 DWords at the same time.
1740 * can only happen for 64 Bit vectors. */
1741 if (num_bytes > 16) {
1742 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1743 count = 2;
1744 num_bytes = 16;
1745 }
1746
1747 /* check alignment of 16 Bit stores */
1748 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1749 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1750 count = 1;
1751 num_bytes = 2;
1752 }
1753
1754 /* Due to alignment issues, split stores of 8-bit/16-bit
1755 * vectors.
1756 */
1757 if (ctx->ac.chip_class == GFX6 && count > 1 && elem_size_bytes < 4) {
1758 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1759 count = 1;
1760 num_bytes = elem_size_bytes;
1761 }
1762
1763 data = extract_vector_range(&ctx->ac, base_data, start, count);
1764
1765 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1766 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1767
1768 if (num_bytes == 1) {
1769 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1770 offset, ctx->ac.i32_0,
1771 cache_policy);
1772 } else if (num_bytes == 2) {
1773 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1774 offset, ctx->ac.i32_0,
1775 cache_policy);
1776 } else {
1777 int num_channels = num_bytes / 4;
1778
1779 switch (num_bytes) {
1780 case 16: /* v4f32 */
1781 data_type = ctx->ac.v4f32;
1782 break;
1783 case 12: /* v3f32 */
1784 data_type = ctx->ac.v3f32;
1785 break;
1786 case 8: /* v2f32 */
1787 data_type = ctx->ac.v2f32;
1788 break;
1789 case 4: /* f32 */
1790 data_type = ctx->ac.f32;
1791 break;
1792 default:
1793 unreachable("Malformed vector store.");
1794 }
1795 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1796
1797 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1798 num_channels, offset,
1799 ctx->ac.i32_0, 0,
1800 cache_policy);
1801 }
1802 }
1803
1804 exit_waterfall(ctx, &wctx, NULL);
1805
1806 if (ctx->ac.postponed_kill)
1807 ac_build_endif(&ctx->ac, 7000);
1808 }
1809
1810 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1811 LLVMValueRef descriptor,
1812 LLVMValueRef offset,
1813 LLVMValueRef compare,
1814 LLVMValueRef exchange)
1815 {
1816 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1817 if (ctx->abi->robust_buffer_access) {
1818 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1819
1820 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1821 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1822
1823 ac_build_ifcc(&ctx->ac, cond, -1);
1824
1825 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1826 }
1827
1828 LLVMValueRef ptr_parts[2] = {
1829 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1830 LLVMBuildAnd(ctx->ac.builder,
1831 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1832 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1833 };
1834
1835 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1836 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1837
1838 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1839
1840 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1841 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1842 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1843 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1844
1845 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1846 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1847
1848 if (ctx->abi->robust_buffer_access) {
1849 ac_build_endif(&ctx->ac, -1);
1850
1851 LLVMBasicBlockRef incoming_blocks[2] = {
1852 start_block,
1853 then_block,
1854 };
1855
1856 LLVMValueRef incoming_values[2] = {
1857 LLVMConstInt(ctx->ac.i64, 0, 0),
1858 result,
1859 };
1860 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1861 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1862 return ret;
1863 } else {
1864 return result;
1865 }
1866 }
1867
1868 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1869 nir_intrinsic_instr *instr)
1870 {
1871 if (ctx->ac.postponed_kill) {
1872 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
1873 ctx->ac.postponed_kill, "");
1874 ac_build_ifcc(&ctx->ac, cond, 7001);
1875 }
1876
1877 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1878 const char *op;
1879 char name[64], type[8];
1880 LLVMValueRef params[6], descriptor;
1881 LLVMValueRef result;
1882 int arg_count = 0;
1883
1884 struct waterfall_context wctx;
1885 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1886
1887 switch (instr->intrinsic) {
1888 case nir_intrinsic_ssbo_atomic_add:
1889 op = "add";
1890 break;
1891 case nir_intrinsic_ssbo_atomic_imin:
1892 op = "smin";
1893 break;
1894 case nir_intrinsic_ssbo_atomic_umin:
1895 op = "umin";
1896 break;
1897 case nir_intrinsic_ssbo_atomic_imax:
1898 op = "smax";
1899 break;
1900 case nir_intrinsic_ssbo_atomic_umax:
1901 op = "umax";
1902 break;
1903 case nir_intrinsic_ssbo_atomic_and:
1904 op = "and";
1905 break;
1906 case nir_intrinsic_ssbo_atomic_or:
1907 op = "or";
1908 break;
1909 case nir_intrinsic_ssbo_atomic_xor:
1910 op = "xor";
1911 break;
1912 case nir_intrinsic_ssbo_atomic_exchange:
1913 op = "swap";
1914 break;
1915 case nir_intrinsic_ssbo_atomic_comp_swap:
1916 op = "cmpswap";
1917 break;
1918 default:
1919 abort();
1920 }
1921
1922 descriptor = ctx->abi->load_ssbo(ctx->abi,
1923 rsrc_base,
1924 true);
1925
1926 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1927 return_type == ctx->ac.i64) {
1928 result = emit_ssbo_comp_swap_64(ctx, descriptor,
1929 get_src(ctx, instr->src[1]),
1930 get_src(ctx, instr->src[2]),
1931 get_src(ctx, instr->src[3]));
1932 } else {
1933 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1934 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1935 }
1936 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1937 params[arg_count++] = descriptor;
1938
1939 if (LLVM_VERSION_MAJOR >= 9) {
1940 /* XXX: The new raw/struct atomic intrinsics are buggy with
1941 * LLVM 8, see r358579.
1942 */
1943 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1944 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1945 params[arg_count++] = ctx->ac.i32_0; /* slc */
1946
1947 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1948 snprintf(name, sizeof(name),
1949 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1950 } else {
1951 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1952 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1953 params[arg_count++] = ctx->ac.i1false; /* slc */
1954
1955 assert(return_type == ctx->ac.i32);
1956 snprintf(name, sizeof(name),
1957 "llvm.amdgcn.buffer.atomic.%s", op);
1958 }
1959
1960 result = ac_build_intrinsic(&ctx->ac, name, return_type, params,
1961 arg_count, 0);
1962 }
1963
1964 result = exit_waterfall(ctx, &wctx, result);
1965 if (ctx->ac.postponed_kill)
1966 ac_build_endif(&ctx->ac, 7001);
1967 return result;
1968 }
1969
1970 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1971 nir_intrinsic_instr *instr)
1972 {
1973 struct waterfall_context wctx;
1974 LLVMValueRef rsrc_base = enter_waterfall_ssbo(ctx, &wctx, instr, instr->src[0]);
1975
1976 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1977 int num_components = instr->num_components;
1978 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1979 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1980
1981 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1982 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi, rsrc_base, false);
1983 LLVMValueRef vindex = ctx->ac.i32_0;
1984
1985 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1986 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1987
1988 LLVMValueRef results[4];
1989 for (int i = 0; i < num_components;) {
1990 int num_elems = num_components - i;
1991 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1992 num_elems = 1;
1993 if (num_elems * elem_size_bytes > 16)
1994 num_elems = 16 / elem_size_bytes;
1995 int load_bytes = num_elems * elem_size_bytes;
1996
1997 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1998
1999 LLVMValueRef ret;
2000
2001 if (load_bytes == 1) {
2002 ret = ac_build_tbuffer_load_byte(&ctx->ac,
2003 rsrc,
2004 offset,
2005 ctx->ac.i32_0,
2006 immoffset,
2007 cache_policy);
2008 } else if (load_bytes == 2) {
2009 ret = ac_build_tbuffer_load_short(&ctx->ac,
2010 rsrc,
2011 offset,
2012 ctx->ac.i32_0,
2013 immoffset,
2014 cache_policy);
2015 } else {
2016 int num_channels = util_next_power_of_two(load_bytes) / 4;
2017 bool can_speculate = access & ACCESS_CAN_REORDER;
2018
2019 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
2020 vindex, offset, immoffset, 0,
2021 cache_policy, can_speculate, false);
2022 }
2023
2024 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
2025 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
2026 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
2027
2028 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
2029 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
2030
2031 for (unsigned j = 0; j < num_elems; j++) {
2032 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
2033 }
2034 i += num_elems;
2035 }
2036
2037 LLVMValueRef ret = ac_build_gather_values(&ctx->ac, results, num_components);
2038 return exit_waterfall(ctx, &wctx, ret);
2039 }
2040
2041 static LLVMValueRef enter_waterfall_ubo(struct ac_nir_context *ctx,
2042 struct waterfall_context *wctx,
2043 const nir_intrinsic_instr *instr)
2044 {
2045 return enter_waterfall(ctx, wctx, get_src(ctx, instr->src[0]),
2046 nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2047 }
2048
2049 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
2050 nir_intrinsic_instr *instr)
2051 {
2052 struct waterfall_context wctx;
2053 LLVMValueRef rsrc_base = enter_waterfall_ubo(ctx, &wctx, instr);
2054
2055 LLVMValueRef ret;
2056 LLVMValueRef rsrc = rsrc_base;
2057 LLVMValueRef offset = get_src(ctx, instr->src[1]);
2058 int num_components = instr->num_components;
2059
2060 if (ctx->abi->load_ubo)
2061 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
2062
2063 if (instr->dest.ssa.bit_size == 64)
2064 num_components *= 2;
2065
2066 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
2067 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
2068 LLVMValueRef results[num_components];
2069 for (unsigned i = 0; i < num_components; ++i) {
2070 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
2071 load_bytes * i, 0);
2072
2073 if (load_bytes == 1) {
2074 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
2075 rsrc,
2076 offset,
2077 ctx->ac.i32_0,
2078 immoffset,
2079 0);
2080 } else {
2081 assert(load_bytes == 2);
2082 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
2083 rsrc,
2084 offset,
2085 ctx->ac.i32_0,
2086 immoffset,
2087 0);
2088 }
2089 }
2090 ret = ac_build_gather_values(&ctx->ac, results, num_components);
2091 } else {
2092 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
2093 NULL, 0, 0, true, true);
2094
2095 ret = ac_trim_vector(&ctx->ac, ret, num_components);
2096 }
2097
2098 ret = LLVMBuildBitCast(ctx->ac.builder, ret,
2099 get_def_type(ctx, &instr->dest.ssa), "");
2100
2101 return exit_waterfall(ctx, &wctx, ret);
2102 }
2103
2104 static void
2105 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
2106 bool vs_in, unsigned *vertex_index_out,
2107 LLVMValueRef *vertex_index_ref,
2108 unsigned *const_out, LLVMValueRef *indir_out)
2109 {
2110 nir_variable *var = nir_deref_instr_get_variable(instr);
2111 nir_deref_path path;
2112 unsigned idx_lvl = 1;
2113
2114 nir_deref_path_init(&path, instr, NULL);
2115
2116 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
2117 if (vertex_index_ref) {
2118 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
2119 if (vertex_index_out)
2120 *vertex_index_out = 0;
2121 } else {
2122 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
2123 }
2124 ++idx_lvl;
2125 }
2126
2127 uint32_t const_offset = 0;
2128 LLVMValueRef offset = NULL;
2129
2130 if (var->data.compact) {
2131 assert(instr->deref_type == nir_deref_type_array);
2132 const_offset = nir_src_as_uint(instr->arr.index);
2133 goto out;
2134 }
2135
2136 for (; path.path[idx_lvl]; ++idx_lvl) {
2137 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
2138 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
2139 unsigned index = path.path[idx_lvl]->strct.index;
2140
2141 for (unsigned i = 0; i < index; i++) {
2142 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
2143 const_offset += glsl_count_attribute_slots(ft, vs_in);
2144 }
2145 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
2146 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
2147 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
2148 const_offset += size *
2149 nir_src_as_uint(path.path[idx_lvl]->arr.index);
2150 } else {
2151 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
2152 get_src(ctx, path.path[idx_lvl]->arr.index), "");
2153 if (offset)
2154 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
2155 else
2156 offset = array_off;
2157 }
2158 } else
2159 unreachable("Uhandled deref type in get_deref_instr_offset");
2160 }
2161
2162 out:
2163 nir_deref_path_finish(&path);
2164
2165 if (const_offset && offset)
2166 offset = LLVMBuildAdd(ctx->ac.builder, offset,
2167 LLVMConstInt(ctx->ac.i32, const_offset, 0),
2168 "");
2169
2170 *const_out = const_offset;
2171 *indir_out = offset;
2172 }
2173
2174 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2175 nir_intrinsic_instr *instr,
2176 bool load_inputs)
2177 {
2178 LLVMValueRef result;
2179 LLVMValueRef vertex_index = NULL;
2180 LLVMValueRef indir_index = NULL;
2181 unsigned const_index = 0;
2182
2183 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2184
2185 unsigned location = var->data.location;
2186 unsigned driver_location = var->data.driver_location;
2187 const bool is_patch = var->data.patch ||
2188 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2189 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2190 const bool is_compact = var->data.compact;
2191
2192 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2193 false, NULL, is_patch ? NULL : &vertex_index,
2194 &const_index, &indir_index);
2195
2196 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2197
2198 LLVMTypeRef src_component_type;
2199 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2200 src_component_type = LLVMGetElementType(dest_type);
2201 else
2202 src_component_type = dest_type;
2203
2204 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2205 vertex_index, indir_index,
2206 const_index, location, driver_location,
2207 var->data.location_frac,
2208 instr->num_components,
2209 is_patch, is_compact, load_inputs);
2210 if (instr->dest.ssa.bit_size == 16) {
2211 result = ac_to_integer(&ctx->ac, result);
2212 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2213 }
2214 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2215 }
2216
2217 static unsigned
2218 type_scalar_size_bytes(const struct glsl_type *type)
2219 {
2220 assert(glsl_type_is_vector_or_scalar(type) ||
2221 glsl_type_is_matrix(type));
2222 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2223 }
2224
2225 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2226 nir_intrinsic_instr *instr)
2227 {
2228 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2229 nir_variable *var = nir_deref_instr_get_variable(deref);
2230
2231 LLVMValueRef values[8];
2232 int idx = 0;
2233 int ve = instr->dest.ssa.num_components;
2234 unsigned comp = 0;
2235 LLVMValueRef indir_index;
2236 LLVMValueRef ret;
2237 unsigned const_index;
2238 unsigned stride = 4;
2239 int mode = deref->mode;
2240
2241 if (var) {
2242 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2243 var->data.mode == nir_var_shader_in;
2244 idx = var->data.driver_location;
2245 comp = var->data.location_frac;
2246 mode = var->data.mode;
2247
2248 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2249 &const_index, &indir_index);
2250
2251 if (var->data.compact) {
2252 stride = 1;
2253 const_index += comp;
2254 comp = 0;
2255 }
2256 }
2257
2258 if (instr->dest.ssa.bit_size == 64 &&
2259 (deref->mode == nir_var_shader_in ||
2260 deref->mode == nir_var_shader_out ||
2261 deref->mode == nir_var_function_temp))
2262 ve *= 2;
2263
2264 switch (mode) {
2265 case nir_var_shader_in:
2266 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2267 ctx->stage == MESA_SHADER_TESS_EVAL) {
2268 return load_tess_varyings(ctx, instr, true);
2269 }
2270
2271 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2272 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2273 LLVMValueRef indir_index;
2274 unsigned const_index, vertex_index;
2275 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2276 &const_index, &indir_index);
2277 assert(indir_index == NULL);
2278
2279 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2280 var->data.driver_location,
2281 var->data.location_frac,
2282 instr->num_components, vertex_index, const_index, type);
2283 }
2284
2285 for (unsigned chan = comp; chan < ve + comp; chan++) {
2286 if (indir_index) {
2287 unsigned count = glsl_count_attribute_slots(
2288 var->type,
2289 ctx->stage == MESA_SHADER_VERTEX);
2290 count -= chan / 4;
2291 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2292 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2293 stride, false, true);
2294
2295 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2296 tmp_vec,
2297 indir_index, "");
2298 } else
2299 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2300 }
2301 break;
2302 case nir_var_function_temp:
2303 for (unsigned chan = 0; chan < ve; chan++) {
2304 if (indir_index) {
2305 unsigned count = glsl_count_attribute_slots(
2306 var->type, false);
2307 count -= chan / 4;
2308 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2309 &ctx->ac, ctx->locals + idx + chan, count,
2310 stride, true, true);
2311
2312 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2313 tmp_vec,
2314 indir_index, "");
2315 } else {
2316 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2317 }
2318 }
2319 break;
2320 case nir_var_shader_out:
2321 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2322 return load_tess_varyings(ctx, instr, false);
2323 }
2324
2325 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2326 var->data.fb_fetch_output &&
2327 ctx->abi->emit_fbfetch)
2328 return ctx->abi->emit_fbfetch(ctx->abi);
2329
2330 for (unsigned chan = comp; chan < ve + comp; chan++) {
2331 if (indir_index) {
2332 unsigned count = glsl_count_attribute_slots(
2333 var->type, false);
2334 count -= chan / 4;
2335 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2336 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2337 stride, true, true);
2338
2339 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2340 tmp_vec,
2341 indir_index, "");
2342 } else {
2343 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2344 ctx->abi->outputs[idx + chan + const_index * stride],
2345 "");
2346 }
2347 }
2348 break;
2349 case nir_var_mem_global: {
2350 LLVMValueRef address = get_src(ctx, instr->src[0]);
2351 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2352 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2353 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2354 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2355 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, result_type) / 8;
2356 bool split_loads = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2357
2358 if (stride != natural_stride || split_loads) {
2359 if (LLVMGetTypeKind(result_type) == LLVMVectorTypeKind)
2360 result_type = LLVMGetElementType(result_type);
2361
2362 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2363 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2364 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2365
2366 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2367 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2368 values[i] = LLVMBuildLoad(ctx->ac.builder,
2369 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2370
2371 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2372 LLVMSetOrdering(values[i], LLVMAtomicOrderingMonotonic);
2373 }
2374 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2375 } else {
2376 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2377 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2378 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2379 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2380
2381 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2382 LLVMSetOrdering(val, LLVMAtomicOrderingMonotonic);
2383 return val;
2384 }
2385 }
2386 default:
2387 unreachable("unhandle variable mode");
2388 }
2389 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2390 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2391 }
2392
2393 static void
2394 visit_store_var(struct ac_nir_context *ctx,
2395 nir_intrinsic_instr *instr)
2396 {
2397 if (ctx->ac.postponed_kill) {
2398 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2399 ctx->ac.postponed_kill, "");
2400 ac_build_ifcc(&ctx->ac, cond, 7002);
2401 }
2402
2403 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2404 nir_variable *var = nir_deref_instr_get_variable(deref);
2405
2406 LLVMValueRef temp_ptr, value;
2407 int idx = 0;
2408 unsigned comp = 0;
2409 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2410 int writemask = instr->const_index[0];
2411 LLVMValueRef indir_index;
2412 unsigned const_index;
2413
2414 if (var) {
2415 get_deref_offset(ctx, deref, false,
2416 NULL, NULL, &const_index, &indir_index);
2417 idx = var->data.driver_location;
2418 comp = var->data.location_frac;
2419
2420 if (var->data.compact) {
2421 const_index += comp;
2422 comp = 0;
2423 }
2424 }
2425
2426 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2427 (deref->mode == nir_var_shader_out ||
2428 deref->mode == nir_var_function_temp)) {
2429
2430 src = LLVMBuildBitCast(ctx->ac.builder, src,
2431 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2432 "");
2433
2434 writemask = widen_mask(writemask, 2);
2435 }
2436
2437 writemask = writemask << comp;
2438
2439 switch (deref->mode) {
2440 case nir_var_shader_out:
2441
2442 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2443 LLVMValueRef vertex_index = NULL;
2444 LLVMValueRef indir_index = NULL;
2445 unsigned const_index = 0;
2446 const bool is_patch = var->data.patch ||
2447 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2448 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2449
2450 get_deref_offset(ctx, deref, false, NULL,
2451 is_patch ? NULL : &vertex_index,
2452 &const_index, &indir_index);
2453
2454 ctx->abi->store_tcs_outputs(ctx->abi, var,
2455 vertex_index, indir_index,
2456 const_index, src, writemask);
2457 break;
2458 }
2459
2460 for (unsigned chan = 0; chan < 8; chan++) {
2461 int stride = 4;
2462 if (!(writemask & (1 << chan)))
2463 continue;
2464
2465 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2466
2467 if (var->data.compact)
2468 stride = 1;
2469 if (indir_index) {
2470 unsigned count = glsl_count_attribute_slots(
2471 var->type, false);
2472 count -= chan / 4;
2473 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2474 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2475 stride, true, true);
2476
2477 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2478 value, indir_index, "");
2479 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2480 count, stride, tmp_vec);
2481
2482 } else {
2483 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2484
2485 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2486 }
2487 }
2488 break;
2489 case nir_var_function_temp:
2490 for (unsigned chan = 0; chan < 8; chan++) {
2491 if (!(writemask & (1 << chan)))
2492 continue;
2493
2494 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2495 if (indir_index) {
2496 unsigned count = glsl_count_attribute_slots(
2497 var->type, false);
2498 count -= chan / 4;
2499 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2500 &ctx->ac, ctx->locals + idx + chan, count,
2501 4, true, true);
2502
2503 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2504 value, indir_index, "");
2505 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2506 count, 4, tmp_vec);
2507 } else {
2508 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2509
2510 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2511 }
2512 }
2513 break;
2514
2515 case nir_var_mem_global: {
2516 int writemask = instr->const_index[0];
2517 LLVMValueRef address = get_src(ctx, instr->src[0]);
2518 LLVMValueRef val = get_src(ctx, instr->src[1]);
2519
2520 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2521 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2522 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2523 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(val)) / 8;
2524 bool split_stores = ctx->ac.chip_class == GFX6 && elem_size_bytes < 4;
2525
2526 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2527 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2528 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2529
2530 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2531 stride == natural_stride && !split_stores) {
2532 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2533 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2534 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2535
2536 val = LLVMBuildBitCast(ctx->ac.builder, val,
2537 LLVMGetElementType(LLVMTypeOf(address)), "");
2538 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, val, address);
2539
2540 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2541 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2542 } else {
2543 LLVMTypeRef val_type = LLVMTypeOf(val);
2544 if (LLVMGetTypeKind(LLVMTypeOf(val)) == LLVMVectorTypeKind)
2545 val_type = LLVMGetElementType(val_type);
2546
2547 LLVMTypeRef ptr_type = LLVMPointerType(val_type,
2548 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2549 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2550 for (unsigned chan = 0; chan < 4; chan++) {
2551 if (!(writemask & (1 << chan)))
2552 continue;
2553
2554 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2555
2556 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2557 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2558 chan);
2559 src = LLVMBuildBitCast(ctx->ac.builder, src,
2560 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2561 LLVMValueRef store = LLVMBuildStore(ctx->ac.builder, src, ptr);
2562
2563 if (nir_intrinsic_access(instr) & (ACCESS_COHERENT | ACCESS_VOLATILE))
2564 LLVMSetOrdering(store, LLVMAtomicOrderingMonotonic);
2565 }
2566 }
2567 break;
2568 }
2569 default:
2570 abort();
2571 break;
2572 }
2573
2574 if (ctx->ac.postponed_kill)
2575 ac_build_endif(&ctx->ac, 7002);
2576 }
2577
2578 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2579 {
2580 switch (dim) {
2581 case GLSL_SAMPLER_DIM_BUF:
2582 return 1;
2583 case GLSL_SAMPLER_DIM_1D:
2584 return array ? 2 : 1;
2585 case GLSL_SAMPLER_DIM_2D:
2586 return array ? 3 : 2;
2587 case GLSL_SAMPLER_DIM_MS:
2588 return array ? 4 : 3;
2589 case GLSL_SAMPLER_DIM_3D:
2590 case GLSL_SAMPLER_DIM_CUBE:
2591 return 3;
2592 case GLSL_SAMPLER_DIM_RECT:
2593 case GLSL_SAMPLER_DIM_SUBPASS:
2594 return 2;
2595 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2596 return 3;
2597 default:
2598 break;
2599 }
2600 return 0;
2601 }
2602
2603 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2604 LLVMValueRef coord_x, LLVMValueRef coord_y,
2605 LLVMValueRef coord_z,
2606 LLVMValueRef sample_index,
2607 LLVMValueRef fmask_desc_ptr)
2608 {
2609 unsigned sample_chan = coord_z ? 3 : 2;
2610 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2611 addr[sample_chan] = sample_index;
2612
2613 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2614 return addr[sample_chan];
2615 }
2616
2617 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2618 {
2619 assert(instr->src[0].is_ssa);
2620 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2621 }
2622
2623 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2624 const nir_intrinsic_instr *instr,
2625 LLVMValueRef dynamic_index,
2626 enum ac_descriptor_type desc_type,
2627 bool write)
2628 {
2629 nir_deref_instr *deref_instr =
2630 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2631 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2632
2633 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, dynamic_index, true, write);
2634 }
2635
2636 static void get_image_coords(struct ac_nir_context *ctx,
2637 const nir_intrinsic_instr *instr,
2638 LLVMValueRef dynamic_desc_index,
2639 struct ac_image_args *args,
2640 enum glsl_sampler_dim dim,
2641 bool is_array)
2642 {
2643 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2644 LLVMValueRef masks[] = {
2645 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2646 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2647 };
2648 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2649
2650 int count;
2651 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2652 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2653 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2654 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2655 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2656 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2657 count = image_type_to_components_count(dim, is_array);
2658
2659 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2660 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2661 LLVMValueRef fmask_load_address[3];
2662
2663 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2664 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2665 if (is_array)
2666 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2667 else
2668 fmask_load_address[2] = NULL;
2669
2670 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2671 fmask_load_address[0],
2672 fmask_load_address[1],
2673 fmask_load_address[2],
2674 sample_index,
2675 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2676 AC_DESC_FMASK, &instr->instr, dynamic_desc_index, true, false));
2677 }
2678 if (count == 1 && !gfx9_1d) {
2679 if (instr->src[1].ssa->num_components)
2680 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2681 else
2682 args->coords[0] = src0;
2683 } else {
2684 int chan;
2685 if (is_ms)
2686 count--;
2687 for (chan = 0; chan < count; ++chan) {
2688 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2689 }
2690
2691 if (gfx9_1d) {
2692 if (is_array) {
2693 args->coords[2] = args->coords[1];
2694 args->coords[1] = ctx->ac.i32_0;
2695 } else
2696 args->coords[1] = ctx->ac.i32_0;
2697 count++;
2698 }
2699 if (ctx->ac.chip_class == GFX9 &&
2700 dim == GLSL_SAMPLER_DIM_2D &&
2701 !is_array) {
2702 /* The hw can't bind a slice of a 3D image as a 2D
2703 * image, because it ignores BASE_ARRAY if the target
2704 * is 3D. The workaround is to read BASE_ARRAY and set
2705 * it as the 3rd address operand for all 2D images.
2706 */
2707 LLVMValueRef first_layer, const5, mask;
2708
2709 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2710 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2711 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2712 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2713
2714 args->coords[count] = first_layer;
2715 count++;
2716 }
2717
2718
2719 if (is_ms) {
2720 args->coords[count] = sample_index;
2721 count++;
2722 }
2723 }
2724 }
2725
2726 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2727 const nir_intrinsic_instr *instr,
2728 LLVMValueRef dynamic_index,
2729 bool write, bool atomic)
2730 {
2731 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, write);
2732 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2733 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2734 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2735 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2736
2737 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2738 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2739 elem_count, stride, "");
2740
2741 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2742 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2743 }
2744 return rsrc;
2745 }
2746
2747 static LLVMValueRef enter_waterfall_image(struct ac_nir_context *ctx,
2748 struct waterfall_context *wctx,
2749 const nir_intrinsic_instr *instr)
2750 {
2751 nir_deref_instr *deref_instr = NULL;
2752
2753 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref)
2754 deref_instr = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2755
2756 LLVMValueRef value = get_sampler_desc_index(ctx, deref_instr, &instr->instr, true);
2757 return enter_waterfall(ctx, wctx, value, nir_intrinsic_access(instr) & ACCESS_NON_UNIFORM);
2758 }
2759
2760 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2761 const nir_intrinsic_instr *instr,
2762 bool bindless)
2763 {
2764 LLVMValueRef res;
2765
2766 enum glsl_sampler_dim dim;
2767 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2768 bool is_array;
2769 if (bindless) {
2770 dim = nir_intrinsic_image_dim(instr);
2771 is_array = nir_intrinsic_image_array(instr);
2772 } else {
2773 const nir_deref_instr *image_deref = get_image_deref(instr);
2774 const struct glsl_type *type = image_deref->type;
2775 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2776 dim = glsl_get_sampler_dim(type);
2777 access |= var->data.access;
2778 is_array = glsl_sampler_type_is_array(type);
2779 }
2780
2781 struct waterfall_context wctx;
2782 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2783
2784 struct ac_image_args args = {};
2785
2786 args.cache_policy = get_cache_policy(ctx, access, false, false);
2787
2788 if (dim == GLSL_SAMPLER_DIM_BUF) {
2789 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2790 unsigned num_channels = util_last_bit(mask);
2791 LLVMValueRef rsrc, vindex;
2792
2793 rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, false, false);
2794 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2795 ctx->ac.i32_0, "");
2796
2797 assert(instr->dest.is_ssa);
2798 bool can_speculate = access & ACCESS_CAN_REORDER;
2799 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2800 ctx->ac.i32_0, num_channels,
2801 args.cache_policy,
2802 can_speculate,
2803 instr->dest.ssa.bit_size == 16);
2804 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2805
2806 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2807 res = ac_to_integer(&ctx->ac, res);
2808 } else {
2809 bool level_zero = nir_src_is_const(instr->src[3]) && nir_src_as_uint(instr->src[3]) == 0;
2810
2811 args.opcode = level_zero ? ac_image_load : ac_image_load_mip;
2812 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
2813 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2814 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2815 if (!level_zero)
2816 args.lod = get_src(ctx, instr->src[3]);
2817 args.dmask = 15;
2818 args.attributes = AC_FUNC_ATTR_READONLY;
2819
2820 assert(instr->dest.is_ssa);
2821 args.d16 = instr->dest.ssa.bit_size == 16;
2822
2823 res = ac_build_image_opcode(&ctx->ac, &args);
2824 }
2825 return exit_waterfall(ctx, &wctx, res);
2826 }
2827
2828 static void visit_image_store(struct ac_nir_context *ctx,
2829 const nir_intrinsic_instr *instr,
2830 bool bindless)
2831 {
2832 if (ctx->ac.postponed_kill) {
2833 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2834 ctx->ac.postponed_kill, "");
2835 ac_build_ifcc(&ctx->ac, cond, 7003);
2836 }
2837
2838 enum glsl_sampler_dim dim;
2839 enum gl_access_qualifier access = nir_intrinsic_access(instr);
2840 bool is_array;
2841
2842 if (bindless) {
2843 dim = nir_intrinsic_image_dim(instr);
2844 is_array = nir_intrinsic_image_array(instr);
2845 } else {
2846 const nir_deref_instr *image_deref = get_image_deref(instr);
2847 const struct glsl_type *type = image_deref->type;
2848 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2849 dim = glsl_get_sampler_dim(type);
2850 access |= var->data.access;
2851 is_array = glsl_sampler_type_is_array(type);
2852 }
2853
2854 struct waterfall_context wctx;
2855 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2856
2857 bool writeonly_memory = access & ACCESS_NON_READABLE;
2858 struct ac_image_args args = {};
2859
2860 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2861
2862 if (dim == GLSL_SAMPLER_DIM_BUF) {
2863 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, false);
2864 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2865 unsigned src_channels = ac_get_llvm_num_components(src);
2866 LLVMValueRef vindex;
2867
2868 if (src_channels == 3)
2869 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2870
2871 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2872 get_src(ctx, instr->src[1]),
2873 ctx->ac.i32_0, "");
2874
2875 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2876 ctx->ac.i32_0, args.cache_policy);
2877 } else {
2878 bool level_zero = nir_src_is_const(instr->src[4]) && nir_src_as_uint(instr->src[4]) == 0;
2879
2880 args.opcode = level_zero ? ac_image_store : ac_image_store_mip;
2881 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2882 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
2883 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
2884 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2885 if (!level_zero)
2886 args.lod = get_src(ctx, instr->src[4]);
2887 args.dmask = 15;
2888 args.d16 = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(args.data[0])) == 16;
2889
2890 ac_build_image_opcode(&ctx->ac, &args);
2891 }
2892
2893 exit_waterfall(ctx, &wctx, NULL);
2894 if (ctx->ac.postponed_kill)
2895 ac_build_endif(&ctx->ac, 7003);
2896 }
2897
2898 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2899 const nir_intrinsic_instr *instr,
2900 bool bindless)
2901 {
2902 if (ctx->ac.postponed_kill) {
2903 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
2904 ctx->ac.postponed_kill, "");
2905 ac_build_ifcc(&ctx->ac, cond, 7004);
2906 }
2907
2908 LLVMValueRef params[7];
2909 int param_count = 0;
2910
2911 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2912 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2913 const char *atomic_name;
2914 char intrinsic_name[64];
2915 enum ac_atomic_op atomic_subop;
2916 ASSERTED int length;
2917
2918 enum glsl_sampler_dim dim;
2919 bool is_array;
2920 if (bindless) {
2921 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2922 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2923 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2924 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2925 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2926 assert(format == GL_R32UI || format == GL_R32I);
2927 }
2928 dim = nir_intrinsic_image_dim(instr);
2929 is_array = nir_intrinsic_image_array(instr);
2930 } else {
2931 const struct glsl_type *type = get_image_deref(instr)->type;
2932 dim = glsl_get_sampler_dim(type);
2933 is_array = glsl_sampler_type_is_array(type);
2934 }
2935
2936 struct waterfall_context wctx;
2937 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
2938
2939 switch (instr->intrinsic) {
2940 case nir_intrinsic_bindless_image_atomic_add:
2941 case nir_intrinsic_image_deref_atomic_add:
2942 atomic_name = "add";
2943 atomic_subop = ac_atomic_add;
2944 break;
2945 case nir_intrinsic_bindless_image_atomic_imin:
2946 case nir_intrinsic_image_deref_atomic_imin:
2947 atomic_name = "smin";
2948 atomic_subop = ac_atomic_smin;
2949 break;
2950 case nir_intrinsic_bindless_image_atomic_umin:
2951 case nir_intrinsic_image_deref_atomic_umin:
2952 atomic_name = "umin";
2953 atomic_subop = ac_atomic_umin;
2954 break;
2955 case nir_intrinsic_bindless_image_atomic_imax:
2956 case nir_intrinsic_image_deref_atomic_imax:
2957 atomic_name = "smax";
2958 atomic_subop = ac_atomic_smax;
2959 break;
2960 case nir_intrinsic_bindless_image_atomic_umax:
2961 case nir_intrinsic_image_deref_atomic_umax:
2962 atomic_name = "umax";
2963 atomic_subop = ac_atomic_umax;
2964 break;
2965 case nir_intrinsic_bindless_image_atomic_and:
2966 case nir_intrinsic_image_deref_atomic_and:
2967 atomic_name = "and";
2968 atomic_subop = ac_atomic_and;
2969 break;
2970 case nir_intrinsic_bindless_image_atomic_or:
2971 case nir_intrinsic_image_deref_atomic_or:
2972 atomic_name = "or";
2973 atomic_subop = ac_atomic_or;
2974 break;
2975 case nir_intrinsic_bindless_image_atomic_xor:
2976 case nir_intrinsic_image_deref_atomic_xor:
2977 atomic_name = "xor";
2978 atomic_subop = ac_atomic_xor;
2979 break;
2980 case nir_intrinsic_bindless_image_atomic_exchange:
2981 case nir_intrinsic_image_deref_atomic_exchange:
2982 atomic_name = "swap";
2983 atomic_subop = ac_atomic_swap;
2984 break;
2985 case nir_intrinsic_bindless_image_atomic_comp_swap:
2986 case nir_intrinsic_image_deref_atomic_comp_swap:
2987 atomic_name = "cmpswap";
2988 atomic_subop = 0; /* not used */
2989 break;
2990 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2991 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2992 atomic_name = "inc";
2993 atomic_subop = ac_atomic_inc_wrap;
2994 break;
2995 }
2996 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2997 case nir_intrinsic_image_deref_atomic_dec_wrap:
2998 atomic_name = "dec";
2999 atomic_subop = ac_atomic_dec_wrap;
3000 break;
3001 default:
3002 abort();
3003 }
3004
3005 if (cmpswap)
3006 params[param_count++] = get_src(ctx, instr->src[4]);
3007 params[param_count++] = get_src(ctx, instr->src[3]);
3008
3009 LLVMValueRef result;
3010 if (dim == GLSL_SAMPLER_DIM_BUF) {
3011 params[param_count++] = get_image_buffer_descriptor(ctx, instr, dynamic_index, true, true);
3012 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
3013 ctx->ac.i32_0, ""); /* vindex */
3014 params[param_count++] = ctx->ac.i32_0; /* voffset */
3015 if (LLVM_VERSION_MAJOR >= 9) {
3016 /* XXX: The new raw/struct atomic intrinsics are buggy
3017 * with LLVM 8, see r358579.
3018 */
3019 params[param_count++] = ctx->ac.i32_0; /* soffset */
3020 params[param_count++] = ctx->ac.i32_0; /* slc */
3021
3022 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3023 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
3024 } else {
3025 params[param_count++] = ctx->ac.i1false; /* slc */
3026
3027 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
3028 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
3029 }
3030
3031 assert(length < sizeof(intrinsic_name));
3032 result = ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
3033 params, param_count, 0);
3034 } else {
3035 struct ac_image_args args = {};
3036 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
3037 args.atomic = atomic_subop;
3038 args.data[0] = params[0];
3039 if (cmpswap)
3040 args.data[1] = params[1];
3041 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, true);
3042 get_image_coords(ctx, instr, dynamic_index, &args, dim, is_array);
3043 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3044
3045 result = ac_build_image_opcode(&ctx->ac, &args);
3046 }
3047
3048 result = exit_waterfall(ctx, &wctx, result);
3049 if (ctx->ac.postponed_kill)
3050 ac_build_endif(&ctx->ac, 7004);
3051 return result;
3052 }
3053
3054 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
3055 nir_intrinsic_instr *instr)
3056 {
3057 struct waterfall_context wctx;
3058 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3059 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3060
3061 LLVMValueRef ret = ac_build_image_get_sample_count(&ctx->ac, rsrc);
3062
3063 return exit_waterfall(ctx, &wctx, ret);
3064 }
3065
3066 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
3067 const nir_intrinsic_instr *instr,
3068 bool bindless)
3069 {
3070 LLVMValueRef res;
3071
3072 enum glsl_sampler_dim dim;
3073 bool is_array;
3074 if (bindless) {
3075 dim = nir_intrinsic_image_dim(instr);
3076 is_array = nir_intrinsic_image_array(instr);
3077 } else {
3078 const struct glsl_type *type = get_image_deref(instr)->type;
3079 dim = glsl_get_sampler_dim(type);
3080 is_array = glsl_sampler_type_is_array(type);
3081 }
3082
3083 struct waterfall_context wctx;
3084 LLVMValueRef dynamic_index = enter_waterfall_image(ctx, &wctx, instr);
3085
3086 if (dim == GLSL_SAMPLER_DIM_BUF) {
3087 res = get_buffer_size(ctx, get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_BUFFER, false), true);
3088 } else {
3089
3090 struct ac_image_args args = { 0 };
3091
3092 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
3093 args.dmask = 0xf;
3094 args.resource = get_image_descriptor(ctx, instr, dynamic_index, AC_DESC_IMAGE, false);
3095 args.opcode = ac_image_get_resinfo;
3096 assert(nir_src_as_uint(instr->src[1]) == 0);
3097 args.lod = ctx->ac.i32_0;
3098 args.attributes = AC_FUNC_ATTR_READNONE;
3099
3100 res = ac_build_image_opcode(&ctx->ac, &args);
3101
3102 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
3103
3104 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
3105 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
3106 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3107 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
3108 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
3109 }
3110
3111 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
3112 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
3113 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
3114 ctx->ac.i32_1, "");
3115 }
3116 }
3117 return exit_waterfall(ctx, &wctx, res);
3118 }
3119
3120 static void emit_membar(struct ac_llvm_context *ac,
3121 const nir_intrinsic_instr *instr)
3122 {
3123 unsigned wait_flags = 0;
3124
3125 switch (instr->intrinsic) {
3126 case nir_intrinsic_memory_barrier:
3127 case nir_intrinsic_group_memory_barrier:
3128 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3129 break;
3130 case nir_intrinsic_memory_barrier_buffer:
3131 case nir_intrinsic_memory_barrier_image:
3132 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3133 break;
3134 case nir_intrinsic_memory_barrier_shared:
3135 wait_flags = AC_WAIT_LGKM;
3136 break;
3137 default:
3138 break;
3139 }
3140
3141 ac_build_waitcnt(ac, wait_flags);
3142 }
3143
3144 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
3145 {
3146 /* GFX6 only (thanks to a hw bug workaround):
3147 * The real barrier instruction isn’t needed, because an entire patch
3148 * always fits into a single wave.
3149 */
3150 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
3151 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
3152 return;
3153 }
3154 ac_build_s_barrier(ac);
3155 }
3156
3157 static void emit_discard(struct ac_nir_context *ctx,
3158 const nir_intrinsic_instr *instr)
3159 {
3160 LLVMValueRef cond;
3161
3162 if (instr->intrinsic == nir_intrinsic_discard_if) {
3163 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3164 get_src(ctx, instr->src[0]),
3165 ctx->ac.i32_0, "");
3166 } else {
3167 assert(instr->intrinsic == nir_intrinsic_discard);
3168 cond = ctx->ac.i1false;
3169 }
3170
3171 ac_build_kill_if_false(&ctx->ac, cond);
3172 }
3173
3174 static void emit_demote(struct ac_nir_context *ctx,
3175 const nir_intrinsic_instr *instr)
3176 {
3177 LLVMValueRef cond;
3178
3179 if (instr->intrinsic == nir_intrinsic_demote_if) {
3180 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
3181 get_src(ctx, instr->src[0]),
3182 ctx->ac.i32_0, "");
3183 } else {
3184 assert(instr->intrinsic == nir_intrinsic_demote);
3185 cond = ctx->ac.i1false;
3186 }
3187
3188 /* Kill immediately while maintaining WQM. */
3189 ac_build_kill_if_false(&ctx->ac, ac_build_wqm_vote(&ctx->ac, cond));
3190
3191 LLVMValueRef mask = LLVMBuildLoad(ctx->ac.builder, ctx->ac.postponed_kill, "");
3192 mask = LLVMBuildAnd(ctx->ac.builder, mask, cond, "");
3193 LLVMBuildStore(ctx->ac.builder, mask, ctx->ac.postponed_kill);
3194 return;
3195 }
3196
3197 static LLVMValueRef
3198 visit_load_local_invocation_index(struct ac_nir_context *ctx)
3199 {
3200 LLVMValueRef result;
3201 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
3202 result = LLVMBuildAnd(ctx->ac.builder,
3203 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3204 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3205
3206 if (ctx->ac.wave_size == 32)
3207 result = LLVMBuildLShr(ctx->ac.builder, result,
3208 LLVMConstInt(ctx->ac.i32, 1, false), "");
3209
3210 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
3211 }
3212
3213 static LLVMValueRef
3214 visit_load_subgroup_id(struct ac_nir_context *ctx)
3215 {
3216 if (ctx->stage == MESA_SHADER_COMPUTE) {
3217 LLVMValueRef result;
3218 result = LLVMBuildAnd(ctx->ac.builder,
3219 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3220 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
3221 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
3222 } else {
3223 return LLVMConstInt(ctx->ac.i32, 0, false);
3224 }
3225 }
3226
3227 static LLVMValueRef
3228 visit_load_num_subgroups(struct ac_nir_context *ctx)
3229 {
3230 if (ctx->stage == MESA_SHADER_COMPUTE) {
3231 return LLVMBuildAnd(ctx->ac.builder,
3232 ac_get_arg(&ctx->ac, ctx->args->tg_size),
3233 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
3234 } else {
3235 return LLVMConstInt(ctx->ac.i32, 1, false);
3236 }
3237 }
3238
3239 static LLVMValueRef
3240 visit_first_invocation(struct ac_nir_context *ctx)
3241 {
3242 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
3243 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
3244
3245 /* The second argument is whether cttz(0) should be defined, but we do not care. */
3246 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
3247 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
3248 ctx->ac.iN_wavemask, args, 2,
3249 AC_FUNC_ATTR_NOUNWIND |
3250 AC_FUNC_ATTR_READNONE);
3251
3252 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
3253 }
3254
3255 static LLVMValueRef
3256 visit_load_shared(struct ac_nir_context *ctx,
3257 const nir_intrinsic_instr *instr)
3258 {
3259 LLVMValueRef values[4], derived_ptr, index, ret;
3260
3261 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3262 instr->dest.ssa.bit_size);
3263
3264 for (int chan = 0; chan < instr->num_components; chan++) {
3265 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3266 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
3267 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
3268 }
3269
3270 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
3271 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
3272 }
3273
3274 static void
3275 visit_store_shared(struct ac_nir_context *ctx,
3276 const nir_intrinsic_instr *instr)
3277 {
3278 LLVMValueRef derived_ptr, data,index;
3279 LLVMBuilderRef builder = ctx->ac.builder;
3280
3281 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3282 instr->src[0].ssa->bit_size);
3283 LLVMValueRef src = get_src(ctx, instr->src[0]);
3284
3285 int writemask = nir_intrinsic_write_mask(instr);
3286 for (int chan = 0; chan < 4; chan++) {
3287 if (!(writemask & (1 << chan))) {
3288 continue;
3289 }
3290 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3291 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3292 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3293 LLVMBuildStore(builder, data, derived_ptr);
3294 }
3295 }
3296
3297 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3298 const nir_intrinsic_instr *instr,
3299 LLVMValueRef ptr, int src_idx)
3300 {
3301 if (ctx->ac.postponed_kill) {
3302 LLVMValueRef cond = LLVMBuildLoad(ctx->ac.builder,
3303 ctx->ac.postponed_kill, "");
3304 ac_build_ifcc(&ctx->ac, cond, 7005);
3305 }
3306
3307 LLVMValueRef result;
3308 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3309
3310 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3311
3312 if (instr->src[0].ssa->parent_instr->type == nir_instr_type_deref) {
3313 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
3314 if (deref->mode == nir_var_mem_global) {
3315 /* use "singlethread" sync scope to implement relaxed ordering */
3316 sync_scope = LLVM_VERSION_MAJOR >= 9 ? "singlethread-one-as" : "singlethread";
3317
3318 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(src), LLVMGetPointerAddressSpace(LLVMTypeOf(ptr)));
3319 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ptr_type , "");
3320 }
3321 }
3322
3323 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3324 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3325 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3326 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3327 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3328 } else {
3329 LLVMAtomicRMWBinOp op;
3330 switch (instr->intrinsic) {
3331 case nir_intrinsic_shared_atomic_add:
3332 case nir_intrinsic_deref_atomic_add:
3333 op = LLVMAtomicRMWBinOpAdd;
3334 break;
3335 case nir_intrinsic_shared_atomic_umin:
3336 case nir_intrinsic_deref_atomic_umin:
3337 op = LLVMAtomicRMWBinOpUMin;
3338 break;
3339 case nir_intrinsic_shared_atomic_umax:
3340 case nir_intrinsic_deref_atomic_umax:
3341 op = LLVMAtomicRMWBinOpUMax;
3342 break;
3343 case nir_intrinsic_shared_atomic_imin:
3344 case nir_intrinsic_deref_atomic_imin:
3345 op = LLVMAtomicRMWBinOpMin;
3346 break;
3347 case nir_intrinsic_shared_atomic_imax:
3348 case nir_intrinsic_deref_atomic_imax:
3349 op = LLVMAtomicRMWBinOpMax;
3350 break;
3351 case nir_intrinsic_shared_atomic_and:
3352 case nir_intrinsic_deref_atomic_and:
3353 op = LLVMAtomicRMWBinOpAnd;
3354 break;
3355 case nir_intrinsic_shared_atomic_or:
3356 case nir_intrinsic_deref_atomic_or:
3357 op = LLVMAtomicRMWBinOpOr;
3358 break;
3359 case nir_intrinsic_shared_atomic_xor:
3360 case nir_intrinsic_deref_atomic_xor:
3361 op = LLVMAtomicRMWBinOpXor;
3362 break;
3363 case nir_intrinsic_shared_atomic_exchange:
3364 case nir_intrinsic_deref_atomic_exchange:
3365 op = LLVMAtomicRMWBinOpXchg;
3366 break;
3367 #if LLVM_VERSION_MAJOR >= 10
3368 case nir_intrinsic_shared_atomic_fadd:
3369 case nir_intrinsic_deref_atomic_fadd:
3370 op = LLVMAtomicRMWBinOpFAdd;
3371 break;
3372 #endif
3373 default:
3374 return NULL;
3375 }
3376
3377 LLVMValueRef val;
3378
3379 if (instr->intrinsic == nir_intrinsic_shared_atomic_fadd ||
3380 instr->intrinsic == nir_intrinsic_deref_atomic_fadd) {
3381 val = ac_to_float(&ctx->ac, src);
3382 } else {
3383 val = ac_to_integer(&ctx->ac, src);
3384 }
3385
3386 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, val, sync_scope);
3387 }
3388
3389 if (ctx->ac.postponed_kill)
3390 ac_build_endif(&ctx->ac, 7005);
3391 return result;
3392 }
3393
3394 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3395 {
3396 LLVMValueRef values[2];
3397 LLVMValueRef pos[2];
3398
3399 pos[0] = ac_to_float(&ctx->ac,
3400 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3401 pos[1] = ac_to_float(&ctx->ac,
3402 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3403
3404 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3405 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3406 return ac_build_gather_values(&ctx->ac, values, 2);
3407 }
3408
3409 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3410 enum glsl_interp_mode interp, unsigned location)
3411 {
3412 switch (interp) {
3413 case INTERP_MODE_FLAT:
3414 default:
3415 return NULL;
3416 case INTERP_MODE_SMOOTH:
3417 case INTERP_MODE_NONE:
3418 if (location == INTERP_CENTER)
3419 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3420 else if (location == INTERP_CENTROID)
3421 return ctx->abi->persp_centroid;
3422 else if (location == INTERP_SAMPLE)
3423 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3424 break;
3425 case INTERP_MODE_NOPERSPECTIVE:
3426 if (location == INTERP_CENTER)
3427 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3428 else if (location == INTERP_CENTROID)
3429 return ctx->abi->linear_centroid;
3430 else if (location == INTERP_SAMPLE)
3431 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3432 break;
3433 }
3434 return NULL;
3435 }
3436
3437 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3438 unsigned mode)
3439 {
3440 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3441 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3442 }
3443
3444 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3445 unsigned mode,
3446 LLVMValueRef offset)
3447 {
3448 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3449 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3450 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3451
3452 LLVMValueRef ij_out[2];
3453 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3454
3455 /*
3456 * take the I then J parameters, and the DDX/Y for it, and
3457 * calculate the IJ inputs for the interpolator.
3458 * temp1 = ddx * offset/sample.x + I;
3459 * interp_param.I = ddy * offset/sample.y + temp1;
3460 * temp1 = ddx * offset/sample.x + J;
3461 * interp_param.J = ddy * offset/sample.y + temp1;
3462 */
3463 for (unsigned i = 0; i < 2; i++) {
3464 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3465 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3466 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3467 ddxy_out, ix_ll, "");
3468 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3469 ddxy_out, iy_ll, "");
3470 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3471 interp_param, ix_ll, "");
3472 LLVMValueRef temp1, temp2;
3473
3474 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3475 ctx->ac.f32, "");
3476
3477 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3478 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3479
3480 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3481 temp2, ctx->ac.i32, "");
3482 }
3483 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3484 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3485 }
3486
3487 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3488 unsigned mode)
3489 {
3490 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3491 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3492 }
3493
3494 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3495 unsigned mode,
3496 LLVMValueRef sample_id)
3497 {
3498 if (ctx->abi->interp_at_sample_force_center)
3499 return barycentric_center(ctx, mode);
3500
3501 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3502
3503 /* fetch sample ID */
3504 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3505
3506 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3507 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3508 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3509 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3510 LLVMValueRef coords[] = { src_c0, src_c1 };
3511 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3512
3513 return barycentric_offset(ctx, mode, offset);
3514 }
3515
3516
3517 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3518 unsigned mode)
3519 {
3520 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3521 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3522 }
3523
3524 static LLVMValueRef barycentric_model(struct ac_nir_context *ctx)
3525 {
3526 return LLVMBuildBitCast(ctx->ac.builder,
3527 ac_get_arg(&ctx->ac, ctx->args->pull_model),
3528 ctx->ac.v3i32, "");
3529 }
3530
3531 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3532 LLVMValueRef interp_param,
3533 unsigned index, unsigned comp_start,
3534 unsigned num_components,
3535 unsigned bitsize)
3536 {
3537 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3538 LLVMValueRef interp_param_f;
3539
3540 interp_param_f = LLVMBuildBitCast(ctx->ac.builder,
3541 interp_param, ctx->ac.v2f32, "");
3542 LLVMValueRef i = LLVMBuildExtractElement(
3543 ctx->ac.builder, interp_param_f, ctx->ac.i32_0, "");
3544 LLVMValueRef j = LLVMBuildExtractElement(
3545 ctx->ac.builder, interp_param_f, ctx->ac.i32_1, "");
3546
3547 /* Workaround for issue 2647: kill threads with infinite interpolation coeffs */
3548 if (ctx->verified_interp &&
3549 !_mesa_hash_table_search(ctx->verified_interp, interp_param)) {
3550 LLVMValueRef args[2];
3551 args[0] = i;
3552 args[1] = LLVMConstInt(ctx->ac.i32, S_NAN | Q_NAN | N_INFINITY | P_INFINITY, false);
3553 LLVMValueRef cond = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.class.f32", ctx->ac.i1,
3554 args, 2, AC_FUNC_ATTR_READNONE);
3555 ac_build_kill_if_false(&ctx->ac, LLVMBuildNot(ctx->ac.builder, cond, ""));
3556 _mesa_hash_table_insert(ctx->verified_interp, interp_param, interp_param);
3557 }
3558
3559 LLVMValueRef values[4];
3560 assert(bitsize == 16 || bitsize == 32);
3561 for (unsigned comp = 0; comp < num_components; comp++) {
3562 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3563 if (bitsize == 16) {
3564 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3565 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3566 } else {
3567 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3568 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3569 }
3570 }
3571
3572 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3573 }
3574
3575 static LLVMValueRef load_input(struct ac_nir_context *ctx,
3576 nir_intrinsic_instr *instr)
3577 {
3578 unsigned offset_idx = instr->intrinsic == nir_intrinsic_load_input ? 0 : 1;
3579
3580 /* We only lower inputs for fragment shaders ATM */
3581 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[offset_idx]);
3582 assert(offset);
3583 assert(offset[0].i32 == 0);
3584
3585 unsigned component = nir_intrinsic_component(instr);
3586 unsigned index = nir_intrinsic_base(instr);
3587 unsigned vertex_id = 2; /* P0 */
3588
3589 if (instr->intrinsic == nir_intrinsic_load_input_vertex) {
3590 nir_const_value *src0 = nir_src_as_const_value(instr->src[0]);
3591
3592 switch (src0[0].i32) {
3593 case 0:
3594 vertex_id = 2;
3595 break;
3596 case 1:
3597 vertex_id = 0;
3598 break;
3599 case 2:
3600 vertex_id = 1;
3601 break;
3602 default:
3603 unreachable("Invalid vertex index");
3604 }
3605 }
3606
3607 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3608 LLVMValueRef values[8];
3609
3610 /* Each component of a 64-bit value takes up two GL-level channels. */
3611 unsigned num_components = instr->dest.ssa.num_components;
3612 unsigned bit_size = instr->dest.ssa.bit_size;
3613 unsigned channels =
3614 bit_size == 64 ? num_components * 2 : num_components;
3615
3616 for (unsigned chan = 0; chan < channels; chan++) {
3617 if (component + chan > 4)
3618 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3619 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (component + chan) % 4, false);
3620 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3621 LLVMConstInt(ctx->ac.i32, vertex_id, false),
3622 llvm_chan,
3623 attr_number,
3624 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3625 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3626 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3627 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3628 }
3629
3630 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3631 if (bit_size == 64) {
3632 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3633 LLVMVectorType(ctx->ac.i64, num_components);
3634 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3635 }
3636 return result;
3637 }
3638
3639 static void visit_intrinsic(struct ac_nir_context *ctx,
3640 nir_intrinsic_instr *instr)
3641 {
3642 LLVMValueRef result = NULL;
3643
3644 switch (instr->intrinsic) {
3645 case nir_intrinsic_ballot:
3646 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3647 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3648 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3649 break;
3650 case nir_intrinsic_read_invocation:
3651 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3652 get_src(ctx, instr->src[1]));
3653 break;
3654 case nir_intrinsic_read_first_invocation:
3655 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3656 break;
3657 case nir_intrinsic_load_subgroup_invocation:
3658 result = ac_get_thread_id(&ctx->ac);
3659 break;
3660 case nir_intrinsic_load_work_group_id: {
3661 LLVMValueRef values[3];
3662
3663 for (int i = 0; i < 3; i++) {
3664 values[i] = ctx->args->workgroup_ids[i].used ?
3665 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3666 }
3667
3668 result = ac_build_gather_values(&ctx->ac, values, 3);
3669 break;
3670 }
3671 case nir_intrinsic_load_base_vertex:
3672 case nir_intrinsic_load_first_vertex:
3673 result = ctx->abi->load_base_vertex(ctx->abi);
3674 break;
3675 case nir_intrinsic_load_local_group_size:
3676 result = ctx->abi->load_local_group_size(ctx->abi);
3677 break;
3678 case nir_intrinsic_load_vertex_id:
3679 result = LLVMBuildAdd(ctx->ac.builder,
3680 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3681 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3682 break;
3683 case nir_intrinsic_load_vertex_id_zero_base: {
3684 result = ctx->abi->vertex_id;
3685 break;
3686 }
3687 case nir_intrinsic_load_local_invocation_id: {
3688 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3689 break;
3690 }
3691 case nir_intrinsic_load_base_instance:
3692 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3693 break;
3694 case nir_intrinsic_load_draw_id:
3695 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3696 break;
3697 case nir_intrinsic_load_view_index:
3698 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3699 break;
3700 case nir_intrinsic_load_invocation_id:
3701 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3702 result = ac_unpack_param(&ctx->ac,
3703 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3704 8, 5);
3705 } else {
3706 if (ctx->ac.chip_class >= GFX10) {
3707 result = LLVMBuildAnd(ctx->ac.builder,
3708 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3709 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3710 } else {
3711 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3712 }
3713 }
3714 break;
3715 case nir_intrinsic_load_primitive_id:
3716 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3717 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3718 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3719 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3720 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3721 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3722 } else
3723 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3724 break;
3725 case nir_intrinsic_load_sample_id:
3726 result = ac_unpack_param(&ctx->ac,
3727 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3728 8, 4);
3729 break;
3730 case nir_intrinsic_load_sample_pos:
3731 result = load_sample_pos(ctx);
3732 break;
3733 case nir_intrinsic_load_sample_mask_in:
3734 result = ctx->abi->load_sample_mask_in(ctx->abi);
3735 break;
3736 case nir_intrinsic_load_frag_coord: {
3737 LLVMValueRef values[4] = {
3738 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3739 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3740 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3741 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3742 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3743 };
3744 result = ac_to_integer(&ctx->ac,
3745 ac_build_gather_values(&ctx->ac, values, 4));
3746 break;
3747 }
3748 case nir_intrinsic_load_layer_id:
3749 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3750 break;
3751 case nir_intrinsic_load_front_face:
3752 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3753 break;
3754 case nir_intrinsic_load_helper_invocation:
3755 result = ac_build_load_helper_invocation(&ctx->ac);
3756 break;
3757 case nir_intrinsic_is_helper_invocation:
3758 result = ac_build_is_helper_invocation(&ctx->ac);
3759 break;
3760 case nir_intrinsic_load_color0:
3761 result = ctx->abi->color0;
3762 break;
3763 case nir_intrinsic_load_color1:
3764 result = ctx->abi->color1;
3765 break;
3766 case nir_intrinsic_load_user_data_amd:
3767 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3768 result = ctx->abi->user_data;
3769 break;
3770 case nir_intrinsic_load_instance_id:
3771 result = ctx->abi->instance_id;
3772 break;
3773 case nir_intrinsic_load_num_work_groups:
3774 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3775 break;
3776 case nir_intrinsic_load_local_invocation_index:
3777 result = visit_load_local_invocation_index(ctx);
3778 break;
3779 case nir_intrinsic_load_subgroup_id:
3780 result = visit_load_subgroup_id(ctx);
3781 break;
3782 case nir_intrinsic_load_num_subgroups:
3783 result = visit_load_num_subgroups(ctx);
3784 break;
3785 case nir_intrinsic_first_invocation:
3786 result = visit_first_invocation(ctx);
3787 break;
3788 case nir_intrinsic_load_push_constant:
3789 result = visit_load_push_constant(ctx, instr);
3790 break;
3791 case nir_intrinsic_vulkan_resource_index: {
3792 LLVMValueRef index = get_src(ctx, instr->src[0]);
3793 unsigned desc_set = nir_intrinsic_desc_set(instr);
3794 unsigned binding = nir_intrinsic_binding(instr);
3795
3796 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3797 binding);
3798 break;
3799 }
3800 case nir_intrinsic_vulkan_resource_reindex:
3801 result = visit_vulkan_resource_reindex(ctx, instr);
3802 break;
3803 case nir_intrinsic_store_ssbo:
3804 visit_store_ssbo(ctx, instr);
3805 break;
3806 case nir_intrinsic_load_ssbo:
3807 result = visit_load_buffer(ctx, instr);
3808 break;
3809 case nir_intrinsic_ssbo_atomic_add:
3810 case nir_intrinsic_ssbo_atomic_imin:
3811 case nir_intrinsic_ssbo_atomic_umin:
3812 case nir_intrinsic_ssbo_atomic_imax:
3813 case nir_intrinsic_ssbo_atomic_umax:
3814 case nir_intrinsic_ssbo_atomic_and:
3815 case nir_intrinsic_ssbo_atomic_or:
3816 case nir_intrinsic_ssbo_atomic_xor:
3817 case nir_intrinsic_ssbo_atomic_exchange:
3818 case nir_intrinsic_ssbo_atomic_comp_swap:
3819 result = visit_atomic_ssbo(ctx, instr);
3820 break;
3821 case nir_intrinsic_load_ubo:
3822 result = visit_load_ubo_buffer(ctx, instr);
3823 break;
3824 case nir_intrinsic_get_buffer_size:
3825 result = visit_get_buffer_size(ctx, instr);
3826 break;
3827 case nir_intrinsic_load_deref:
3828 result = visit_load_var(ctx, instr);
3829 break;
3830 case nir_intrinsic_store_deref:
3831 visit_store_var(ctx, instr);
3832 break;
3833 case nir_intrinsic_load_shared:
3834 result = visit_load_shared(ctx, instr);
3835 break;
3836 case nir_intrinsic_store_shared:
3837 visit_store_shared(ctx, instr);
3838 break;
3839 case nir_intrinsic_bindless_image_samples:
3840 case nir_intrinsic_image_deref_samples:
3841 result = visit_image_samples(ctx, instr);
3842 break;
3843 case nir_intrinsic_bindless_image_load:
3844 result = visit_image_load(ctx, instr, true);
3845 break;
3846 case nir_intrinsic_image_deref_load:
3847 result = visit_image_load(ctx, instr, false);
3848 break;
3849 case nir_intrinsic_bindless_image_store:
3850 visit_image_store(ctx, instr, true);
3851 break;
3852 case nir_intrinsic_image_deref_store:
3853 visit_image_store(ctx, instr, false);
3854 break;
3855 case nir_intrinsic_bindless_image_atomic_add:
3856 case nir_intrinsic_bindless_image_atomic_imin:
3857 case nir_intrinsic_bindless_image_atomic_umin:
3858 case nir_intrinsic_bindless_image_atomic_imax:
3859 case nir_intrinsic_bindless_image_atomic_umax:
3860 case nir_intrinsic_bindless_image_atomic_and:
3861 case nir_intrinsic_bindless_image_atomic_or:
3862 case nir_intrinsic_bindless_image_atomic_xor:
3863 case nir_intrinsic_bindless_image_atomic_exchange:
3864 case nir_intrinsic_bindless_image_atomic_comp_swap:
3865 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3866 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3867 result = visit_image_atomic(ctx, instr, true);
3868 break;
3869 case nir_intrinsic_image_deref_atomic_add:
3870 case nir_intrinsic_image_deref_atomic_imin:
3871 case nir_intrinsic_image_deref_atomic_umin:
3872 case nir_intrinsic_image_deref_atomic_imax:
3873 case nir_intrinsic_image_deref_atomic_umax:
3874 case nir_intrinsic_image_deref_atomic_and:
3875 case nir_intrinsic_image_deref_atomic_or:
3876 case nir_intrinsic_image_deref_atomic_xor:
3877 case nir_intrinsic_image_deref_atomic_exchange:
3878 case nir_intrinsic_image_deref_atomic_comp_swap:
3879 case nir_intrinsic_image_deref_atomic_inc_wrap:
3880 case nir_intrinsic_image_deref_atomic_dec_wrap:
3881 result = visit_image_atomic(ctx, instr, false);
3882 break;
3883 case nir_intrinsic_bindless_image_size:
3884 result = visit_image_size(ctx, instr, true);
3885 break;
3886 case nir_intrinsic_image_deref_size:
3887 result = visit_image_size(ctx, instr, false);
3888 break;
3889 case nir_intrinsic_shader_clock:
3890 result = ac_build_shader_clock(&ctx->ac,
3891 nir_intrinsic_memory_scope(instr));
3892 break;
3893 case nir_intrinsic_discard:
3894 case nir_intrinsic_discard_if:
3895 emit_discard(ctx, instr);
3896 break;
3897 case nir_intrinsic_demote:
3898 case nir_intrinsic_demote_if:
3899 emit_demote(ctx, instr);
3900 break;
3901 case nir_intrinsic_memory_barrier:
3902 case nir_intrinsic_group_memory_barrier:
3903 case nir_intrinsic_memory_barrier_buffer:
3904 case nir_intrinsic_memory_barrier_image:
3905 case nir_intrinsic_memory_barrier_shared:
3906 emit_membar(&ctx->ac, instr);
3907 break;
3908 case nir_intrinsic_scoped_barrier: {
3909 assert(!(nir_intrinsic_memory_semantics(instr) &
3910 (NIR_MEMORY_MAKE_AVAILABLE | NIR_MEMORY_MAKE_VISIBLE)));
3911
3912 nir_variable_mode modes = nir_intrinsic_memory_modes(instr);
3913
3914 unsigned wait_flags = 0;
3915 if (modes & (nir_var_mem_global | nir_var_mem_ssbo))
3916 wait_flags |= AC_WAIT_VLOAD | AC_WAIT_VSTORE;
3917 if (modes & nir_var_mem_shared)
3918 wait_flags |= AC_WAIT_LGKM;
3919
3920 if (wait_flags)
3921 ac_build_waitcnt(&ctx->ac, wait_flags);
3922
3923 if (nir_intrinsic_execution_scope(instr) == NIR_SCOPE_WORKGROUP)
3924 ac_emit_barrier(&ctx->ac, ctx->stage);
3925 break;
3926 }
3927 case nir_intrinsic_memory_barrier_tcs_patch:
3928 break;
3929 case nir_intrinsic_control_barrier:
3930 ac_emit_barrier(&ctx->ac, ctx->stage);
3931 break;
3932 case nir_intrinsic_shared_atomic_add:
3933 case nir_intrinsic_shared_atomic_imin:
3934 case nir_intrinsic_shared_atomic_umin:
3935 case nir_intrinsic_shared_atomic_imax:
3936 case nir_intrinsic_shared_atomic_umax:
3937 case nir_intrinsic_shared_atomic_and:
3938 case nir_intrinsic_shared_atomic_or:
3939 case nir_intrinsic_shared_atomic_xor:
3940 case nir_intrinsic_shared_atomic_exchange:
3941 case nir_intrinsic_shared_atomic_comp_swap:
3942 case nir_intrinsic_shared_atomic_fadd: {
3943 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3944 instr->src[1].ssa->bit_size);
3945 result = visit_var_atomic(ctx, instr, ptr, 1);
3946 break;
3947 }
3948 case nir_intrinsic_deref_atomic_add:
3949 case nir_intrinsic_deref_atomic_imin:
3950 case nir_intrinsic_deref_atomic_umin:
3951 case nir_intrinsic_deref_atomic_imax:
3952 case nir_intrinsic_deref_atomic_umax:
3953 case nir_intrinsic_deref_atomic_and:
3954 case nir_intrinsic_deref_atomic_or:
3955 case nir_intrinsic_deref_atomic_xor:
3956 case nir_intrinsic_deref_atomic_exchange:
3957 case nir_intrinsic_deref_atomic_comp_swap:
3958 case nir_intrinsic_deref_atomic_fadd: {
3959 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3960 result = visit_var_atomic(ctx, instr, ptr, 1);
3961 break;
3962 }
3963 case nir_intrinsic_load_barycentric_pixel:
3964 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3965 break;
3966 case nir_intrinsic_load_barycentric_centroid:
3967 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3968 break;
3969 case nir_intrinsic_load_barycentric_sample:
3970 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3971 break;
3972 case nir_intrinsic_load_barycentric_model:
3973 result = barycentric_model(ctx);
3974 break;
3975 case nir_intrinsic_load_barycentric_at_offset: {
3976 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3977 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3978 break;
3979 }
3980 case nir_intrinsic_load_barycentric_at_sample: {
3981 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3982 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3983 break;
3984 }
3985 case nir_intrinsic_load_interpolated_input: {
3986 /* We assume any indirect loads have been lowered away */
3987 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3988 assert(offset);
3989 assert(offset[0].i32 == 0);
3990
3991 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3992 unsigned index = nir_intrinsic_base(instr);
3993 unsigned component = nir_intrinsic_component(instr);
3994 result = load_interpolated_input(ctx, interp_param, index,
3995 component,
3996 instr->dest.ssa.num_components,
3997 instr->dest.ssa.bit_size);
3998 break;
3999 }
4000 case nir_intrinsic_load_input:
4001 case nir_intrinsic_load_input_vertex:
4002 result = load_input(ctx, instr);
4003 break;
4004 case nir_intrinsic_emit_vertex:
4005 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
4006 break;
4007 case nir_intrinsic_emit_vertex_with_counter: {
4008 unsigned stream = nir_intrinsic_stream_id(instr);
4009 LLVMValueRef next_vertex = get_src(ctx, instr->src[0]);
4010 ctx->abi->emit_vertex_with_counter(ctx->abi, stream,
4011 next_vertex,
4012 ctx->abi->outputs);
4013 break;
4014 }
4015 case nir_intrinsic_end_primitive:
4016 case nir_intrinsic_end_primitive_with_counter:
4017 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
4018 break;
4019 case nir_intrinsic_load_tess_coord:
4020 result = ctx->abi->load_tess_coord(ctx->abi);
4021 break;
4022 case nir_intrinsic_load_tess_level_outer:
4023 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
4024 break;
4025 case nir_intrinsic_load_tess_level_inner:
4026 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
4027 break;
4028 case nir_intrinsic_load_tess_level_outer_default:
4029 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
4030 break;
4031 case nir_intrinsic_load_tess_level_inner_default:
4032 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
4033 break;
4034 case nir_intrinsic_load_patch_vertices_in:
4035 result = ctx->abi->load_patch_vertices_in(ctx->abi);
4036 break;
4037 case nir_intrinsic_vote_all: {
4038 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
4039 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4040 break;
4041 }
4042 case nir_intrinsic_vote_any: {
4043 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
4044 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
4045 break;
4046 }
4047 case nir_intrinsic_shuffle:
4048 if (ctx->ac.chip_class == GFX8 ||
4049 ctx->ac.chip_class == GFX9 ||
4050 (ctx->ac.chip_class >= GFX10 && ctx->ac.wave_size == 32)) {
4051 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
4052 get_src(ctx, instr->src[1]));
4053 } else {
4054 LLVMValueRef src = get_src(ctx, instr->src[0]);
4055 LLVMValueRef index = get_src(ctx, instr->src[1]);
4056 LLVMTypeRef type = LLVMTypeOf(src);
4057 struct waterfall_context wctx;
4058 LLVMValueRef index_val;
4059
4060 index_val = enter_waterfall(ctx, &wctx, index, true);
4061
4062 src = LLVMBuildZExt(ctx->ac.builder, src,
4063 ctx->ac.i32, "");
4064
4065 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.readlane",
4066 ctx->ac.i32,
4067 (LLVMValueRef []) { src, index_val }, 2,
4068 AC_FUNC_ATTR_READNONE |
4069 AC_FUNC_ATTR_CONVERGENT);
4070
4071 result = LLVMBuildTrunc(ctx->ac.builder, result, type, "");
4072
4073 result = exit_waterfall(ctx, &wctx, result);
4074 }
4075 break;
4076 case nir_intrinsic_reduce:
4077 result = ac_build_reduce(&ctx->ac,
4078 get_src(ctx, instr->src[0]),
4079 instr->const_index[0],
4080 instr->const_index[1]);
4081 break;
4082 case nir_intrinsic_inclusive_scan:
4083 result = ac_build_inclusive_scan(&ctx->ac,
4084 get_src(ctx, instr->src[0]),
4085 instr->const_index[0]);
4086 break;
4087 case nir_intrinsic_exclusive_scan:
4088 result = ac_build_exclusive_scan(&ctx->ac,
4089 get_src(ctx, instr->src[0]),
4090 instr->const_index[0]);
4091 break;
4092 case nir_intrinsic_quad_broadcast: {
4093 unsigned lane = nir_src_as_uint(instr->src[1]);
4094 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4095 lane, lane, lane, lane);
4096 break;
4097 }
4098 case nir_intrinsic_quad_swap_horizontal:
4099 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
4100 break;
4101 case nir_intrinsic_quad_swap_vertical:
4102 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
4103 break;
4104 case nir_intrinsic_quad_swap_diagonal:
4105 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
4106 break;
4107 case nir_intrinsic_quad_swizzle_amd: {
4108 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4109 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
4110 mask & 0x3, (mask >> 2) & 0x3,
4111 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
4112 break;
4113 }
4114 case nir_intrinsic_masked_swizzle_amd: {
4115 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
4116 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
4117 break;
4118 }
4119 case nir_intrinsic_write_invocation_amd:
4120 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
4121 get_src(ctx, instr->src[1]),
4122 get_src(ctx, instr->src[2]));
4123 break;
4124 case nir_intrinsic_mbcnt_amd:
4125 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
4126 break;
4127 case nir_intrinsic_load_scratch: {
4128 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4129 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4130 offset);
4131 LLVMTypeRef comp_type =
4132 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4133 LLVMTypeRef vec_type =
4134 instr->dest.ssa.num_components == 1 ? comp_type :
4135 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4136 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4137 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4138 LLVMPointerType(vec_type, addr_space), "");
4139 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4140 break;
4141 }
4142 case nir_intrinsic_store_scratch: {
4143 LLVMValueRef offset = get_src(ctx, instr->src[1]);
4144 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
4145 offset);
4146 LLVMTypeRef comp_type =
4147 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
4148 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4149 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4150 LLVMPointerType(comp_type, addr_space), "");
4151 LLVMValueRef src = get_src(ctx, instr->src[0]);
4152 unsigned wrmask = nir_intrinsic_write_mask(instr);
4153 while (wrmask) {
4154 int start, count;
4155 u_bit_scan_consecutive_range(&wrmask, &start, &count);
4156
4157 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
4158 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
4159 LLVMTypeRef vec_type =
4160 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
4161 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
4162 offset_ptr,
4163 LLVMPointerType(vec_type, addr_space),
4164 "");
4165 LLVMValueRef offset_src =
4166 ac_extract_components(&ctx->ac, src, start, count);
4167 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
4168 }
4169 break;
4170 }
4171 case nir_intrinsic_load_constant: {
4172 unsigned base = nir_intrinsic_base(instr);
4173 unsigned range = nir_intrinsic_range(instr);
4174
4175 LLVMValueRef offset = get_src(ctx, instr->src[0]);
4176 offset = LLVMBuildAdd(ctx->ac.builder, offset,
4177 LLVMConstInt(ctx->ac.i32, base, false), "");
4178
4179 /* Clamp the offset to avoid out-of-bound access because global
4180 * instructions can't handle them.
4181 */
4182 LLVMValueRef size = LLVMConstInt(ctx->ac.i32, base + range, false);
4183 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT,
4184 offset, size, "");
4185 offset = LLVMBuildSelect(ctx->ac.builder, cond, offset, size, "");
4186
4187 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
4188 offset);
4189 LLVMTypeRef comp_type =
4190 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
4191 LLVMTypeRef vec_type =
4192 instr->dest.ssa.num_components == 1 ? comp_type :
4193 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
4194 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
4195 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
4196 LLVMPointerType(vec_type, addr_space), "");
4197 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
4198 break;
4199 }
4200 default:
4201 fprintf(stderr, "Unknown intrinsic: ");
4202 nir_print_instr(&instr->instr, stderr);
4203 fprintf(stderr, "\n");
4204 break;
4205 }
4206 if (result) {
4207 ctx->ssa_defs[instr->dest.ssa.index] = result;
4208 }
4209 }
4210
4211 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
4212 unsigned base_index,
4213 unsigned constant_index,
4214 LLVMValueRef dynamic_index)
4215 {
4216 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
4217 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
4218 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
4219
4220 /* Bindless uniforms are 64bit so multiple index by 8 */
4221 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
4222 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
4223
4224 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
4225
4226 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
4227 NULL, 0, 0, true, true);
4228
4229 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
4230 }
4231
4232 struct sampler_desc_address {
4233 unsigned descriptor_set;
4234 unsigned base_index; /* binding in vulkan */
4235 unsigned constant_index;
4236 LLVMValueRef dynamic_index;
4237 bool image;
4238 bool bindless;
4239 };
4240
4241 static struct sampler_desc_address
4242 get_sampler_desc_internal(struct ac_nir_context *ctx,
4243 nir_deref_instr *deref_instr,
4244 const nir_instr *instr,
4245 bool image)
4246 {
4247 LLVMValueRef index = NULL;
4248 unsigned constant_index = 0;
4249 unsigned descriptor_set;
4250 unsigned base_index;
4251 bool bindless = false;
4252
4253 if (!deref_instr) {
4254 descriptor_set = 0;
4255 if (image) {
4256 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
4257 base_index = 0;
4258 bindless = true;
4259 index = get_src(ctx, img_instr->src[0]);
4260 } else {
4261 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
4262 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
4263 nir_tex_src_sampler_handle);
4264 if (sampSrcIdx != -1) {
4265 base_index = 0;
4266 bindless = true;
4267 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
4268 } else {
4269 assert(tex_instr && !image);
4270 base_index = tex_instr->sampler_index;
4271 }
4272 }
4273 } else {
4274 while(deref_instr->deref_type != nir_deref_type_var) {
4275 if (deref_instr->deref_type == nir_deref_type_array) {
4276 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
4277 if (!array_size)
4278 array_size = 1;
4279
4280 if (nir_src_is_const(deref_instr->arr.index)) {
4281 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
4282 } else {
4283 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
4284
4285 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
4286 LLVMConstInt(ctx->ac.i32, array_size, false), "");
4287
4288 if (!index)
4289 index = indirect;
4290 else
4291 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
4292 }
4293
4294 deref_instr = nir_src_as_deref(deref_instr->parent);
4295 } else if (deref_instr->deref_type == nir_deref_type_struct) {
4296 unsigned sidx = deref_instr->strct.index;
4297 deref_instr = nir_src_as_deref(deref_instr->parent);
4298 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
4299 } else {
4300 unreachable("Unsupported deref type");
4301 }
4302 }
4303 descriptor_set = deref_instr->var->data.descriptor_set;
4304
4305 if (deref_instr->var->data.bindless) {
4306 /* For now just assert on unhandled variable types */
4307 assert(deref_instr->var->data.mode == nir_var_uniform);
4308
4309 base_index = deref_instr->var->data.driver_location;
4310 bindless = true;
4311
4312 index = index ? index : ctx->ac.i32_0;
4313 index = get_bindless_index_from_uniform(ctx, base_index,
4314 constant_index, index);
4315 } else
4316 base_index = deref_instr->var->data.binding;
4317 }
4318 return (struct sampler_desc_address) {
4319 .descriptor_set = descriptor_set,
4320 .base_index = base_index,
4321 .constant_index = constant_index,
4322 .dynamic_index = index,
4323 .image = image,
4324 .bindless = bindless,
4325 };
4326 }
4327
4328 /* Extract any possibly divergent index into a separate value that can be fed
4329 * into get_sampler_desc with the same arguments. */
4330 static LLVMValueRef get_sampler_desc_index(struct ac_nir_context *ctx,
4331 nir_deref_instr *deref_instr,
4332 const nir_instr *instr,
4333 bool image)
4334 {
4335 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4336 return addr.dynamic_index;
4337 }
4338
4339 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
4340 nir_deref_instr *deref_instr,
4341 enum ac_descriptor_type desc_type,
4342 const nir_instr *instr,
4343 LLVMValueRef index,
4344 bool image, bool write)
4345 {
4346 struct sampler_desc_address addr = get_sampler_desc_internal(ctx, deref_instr, instr, image);
4347 return ctx->abi->load_sampler_desc(ctx->abi,
4348 addr.descriptor_set,
4349 addr.base_index,
4350 addr.constant_index, index,
4351 desc_type, addr.image, write, addr.bindless);
4352 }
4353
4354 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
4355 *
4356 * GFX6-GFX7:
4357 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
4358 * filtering manually. The driver sets img7 to a mask clearing
4359 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
4360 * s_and_b32 samp0, samp0, img7
4361 *
4362 * GFX8:
4363 * The ANISO_OVERRIDE sampler field enables this fix in TA.
4364 */
4365 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
4366 LLVMValueRef res, LLVMValueRef samp)
4367 {
4368 LLVMBuilderRef builder = ctx->ac.builder;
4369 LLVMValueRef img7, samp0;
4370
4371 if (ctx->ac.chip_class >= GFX8)
4372 return samp;
4373
4374 img7 = LLVMBuildExtractElement(builder, res,
4375 LLVMConstInt(ctx->ac.i32, 7, 0), "");
4376 samp0 = LLVMBuildExtractElement(builder, samp,
4377 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4378 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
4379 return LLVMBuildInsertElement(builder, samp, samp0,
4380 LLVMConstInt(ctx->ac.i32, 0, 0), "");
4381 }
4382
4383 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
4384 nir_tex_instr *instr,
4385 struct waterfall_context *wctx,
4386 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
4387 LLVMValueRef *fmask_ptr)
4388 {
4389 nir_deref_instr *texture_deref_instr = NULL;
4390 nir_deref_instr *sampler_deref_instr = NULL;
4391 int plane = -1;
4392
4393 for (unsigned i = 0; i < instr->num_srcs; i++) {
4394 switch (instr->src[i].src_type) {
4395 case nir_tex_src_texture_deref:
4396 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
4397 break;
4398 case nir_tex_src_sampler_deref:
4399 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
4400 break;
4401 case nir_tex_src_plane:
4402 plane = nir_src_as_int(instr->src[i].src);
4403 break;
4404 default:
4405 break;
4406 }
4407 }
4408
4409 LLVMValueRef texture_dynamic_index = get_sampler_desc_index(ctx, texture_deref_instr,
4410 &instr->instr, false);
4411 if (!sampler_deref_instr)
4412 sampler_deref_instr = texture_deref_instr;
4413
4414 LLVMValueRef sampler_dynamic_index = get_sampler_desc_index(ctx, sampler_deref_instr,
4415 &instr->instr, false);
4416 if (instr->texture_non_uniform)
4417 texture_dynamic_index = enter_waterfall(ctx, wctx + 0, texture_dynamic_index, true);
4418
4419 if (instr->sampler_non_uniform)
4420 sampler_dynamic_index = enter_waterfall(ctx, wctx + 1, sampler_dynamic_index, true);
4421
4422 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
4423
4424 if (plane >= 0) {
4425 assert(instr->op != nir_texop_txf_ms &&
4426 instr->op != nir_texop_samples_identical);
4427 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
4428
4429 main_descriptor = AC_DESC_PLANE_0 + plane;
4430 }
4431
4432 if (instr->op == nir_texop_fragment_mask_fetch) {
4433 /* The fragment mask is fetched from the compressed
4434 * multisampled surface.
4435 */
4436 main_descriptor = AC_DESC_FMASK;
4437 }
4438
4439 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr,
4440 texture_dynamic_index, false, false);
4441
4442 if (samp_ptr) {
4443 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr,
4444 sampler_dynamic_index, false, false);
4445 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
4446 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
4447 }
4448 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
4449 instr->op == nir_texop_samples_identical))
4450 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK,
4451 &instr->instr, texture_dynamic_index, false, false);
4452 }
4453
4454 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
4455 LLVMValueRef coord)
4456 {
4457 coord = ac_to_float(ctx, coord);
4458 coord = ac_build_round(ctx, coord);
4459 coord = ac_to_integer(ctx, coord);
4460 return coord;
4461 }
4462
4463 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
4464 {
4465 LLVMValueRef result = NULL;
4466 struct ac_image_args args = { 0 };
4467 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
4468 LLVMValueRef ddx = NULL, ddy = NULL;
4469 unsigned offset_src = 0;
4470 struct waterfall_context wctx[2] = {{{0}}};
4471
4472 tex_fetch_ptrs(ctx, instr, wctx, &args.resource, &args.sampler, &fmask_ptr);
4473
4474 for (unsigned i = 0; i < instr->num_srcs; i++) {
4475 switch (instr->src[i].src_type) {
4476 case nir_tex_src_coord: {
4477 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
4478 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
4479 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
4480 break;
4481 }
4482 case nir_tex_src_projector:
4483 break;
4484 case nir_tex_src_comparator:
4485 if (instr->is_shadow) {
4486 args.compare = get_src(ctx, instr->src[i].src);
4487 args.compare = ac_to_float(&ctx->ac, args.compare);
4488 }
4489 break;
4490 case nir_tex_src_offset:
4491 args.offset = get_src(ctx, instr->src[i].src);
4492 offset_src = i;
4493 break;
4494 case nir_tex_src_bias:
4495 args.bias = get_src(ctx, instr->src[i].src);
4496 break;
4497 case nir_tex_src_lod: {
4498 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4499 args.level_zero = true;
4500 else
4501 args.lod = get_src(ctx, instr->src[i].src);
4502 break;
4503 }
4504 case nir_tex_src_ms_index:
4505 sample_index = get_src(ctx, instr->src[i].src);
4506 break;
4507 case nir_tex_src_ms_mcs:
4508 break;
4509 case nir_tex_src_ddx:
4510 ddx = get_src(ctx, instr->src[i].src);
4511 break;
4512 case nir_tex_src_ddy:
4513 ddy = get_src(ctx, instr->src[i].src);
4514 break;
4515 case nir_tex_src_min_lod:
4516 args.min_lod = get_src(ctx, instr->src[i].src);
4517 break;
4518 case nir_tex_src_texture_offset:
4519 case nir_tex_src_sampler_offset:
4520 case nir_tex_src_plane:
4521 default:
4522 break;
4523 }
4524 }
4525
4526 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4527 result = get_buffer_size(ctx, args.resource, true);
4528 goto write_result;
4529 }
4530
4531 if (instr->op == nir_texop_texture_samples) {
4532 LLVMValueRef res, samples, is_msaa;
4533 LLVMValueRef default_sample;
4534
4535 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4536 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4537 LLVMConstInt(ctx->ac.i32, 3, false), "");
4538 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4539 LLVMConstInt(ctx->ac.i32, 28, false), "");
4540 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4541 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4542 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4543 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4544
4545 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4546 LLVMConstInt(ctx->ac.i32, 16, false), "");
4547 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4548 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4549 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4550 samples, "");
4551
4552 if (ctx->abi->robust_buffer_access) {
4553 LLVMValueRef dword1, is_null_descriptor;
4554
4555 /* Extract the second dword of the descriptor, if it's
4556 * all zero, then it's a null descriptor.
4557 */
4558 dword1 = LLVMBuildExtractElement(ctx->ac.builder, res,
4559 LLVMConstInt(ctx->ac.i32, 1, false), "");
4560 is_null_descriptor =
4561 LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, dword1,
4562 LLVMConstInt(ctx->ac.i32, 0, false), "");
4563 default_sample =
4564 LLVMBuildSelect(ctx->ac.builder, is_null_descriptor,
4565 ctx->ac.i32_0, ctx->ac.i32_1, "");
4566 } else {
4567 default_sample = ctx->ac.i32_1;
4568 }
4569
4570 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4571 default_sample, "");
4572 result = samples;
4573 goto write_result;
4574 }
4575
4576 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4577 LLVMValueRef offset[3], pack;
4578 for (unsigned chan = 0; chan < 3; ++chan)
4579 offset[chan] = ctx->ac.i32_0;
4580
4581 unsigned num_components = ac_get_llvm_num_components(args.offset);
4582 for (unsigned chan = 0; chan < num_components; chan++) {
4583 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4584 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4585 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4586 if (chan)
4587 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4588 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4589 }
4590 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4591 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4592 args.offset = pack;
4593 }
4594
4595 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4596 * OpenGL 4.5 spec says:
4597 *
4598 * "If the texture’s internal format indicates a fixed-point
4599 * depth texture, then D_t and D_ref are clamped to the
4600 * range [0, 1]; otherwise no clamping is performed."
4601 *
4602 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4603 * so the depth comparison value isn't clamped for Z16 and
4604 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4605 * an explicitly clamped 32-bit float format.
4606 */
4607 if (args.compare &&
4608 ctx->ac.chip_class >= GFX8 &&
4609 ctx->ac.chip_class <= GFX9 &&
4610 ctx->abi->clamp_shadow_reference) {
4611 LLVMValueRef upgraded, clamped;
4612
4613 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4614 LLVMConstInt(ctx->ac.i32, 3, false), "");
4615 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4616 LLVMConstInt(ctx->ac.i32, 29, false), "");
4617 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4618 clamped = ac_build_clamp(&ctx->ac, args.compare);
4619 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4620 args.compare, "");
4621 }
4622
4623 /* pack derivatives */
4624 if (ddx || ddy) {
4625 int num_src_deriv_channels, num_dest_deriv_channels;
4626 switch (instr->sampler_dim) {
4627 case GLSL_SAMPLER_DIM_3D:
4628 case GLSL_SAMPLER_DIM_CUBE:
4629 num_src_deriv_channels = 3;
4630 num_dest_deriv_channels = 3;
4631 break;
4632 case GLSL_SAMPLER_DIM_2D:
4633 default:
4634 num_src_deriv_channels = 2;
4635 num_dest_deriv_channels = 2;
4636 break;
4637 case GLSL_SAMPLER_DIM_1D:
4638 num_src_deriv_channels = 1;
4639 if (ctx->ac.chip_class == GFX9) {
4640 num_dest_deriv_channels = 2;
4641 } else {
4642 num_dest_deriv_channels = 1;
4643 }
4644 break;
4645 }
4646
4647 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4648 args.derivs[i] = ac_to_float(&ctx->ac,
4649 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4650 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4651 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4652 }
4653 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4654 args.derivs[i] = ctx->ac.f32_0;
4655 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4656 }
4657 }
4658
4659 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4660 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4661 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4662 if (instr->coord_components == 3)
4663 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4664 ac_prepare_cube_coords(&ctx->ac,
4665 instr->op == nir_texop_txd, instr->is_array,
4666 instr->op == nir_texop_lod, args.coords, args.derivs);
4667 }
4668
4669 /* Texture coordinates fixups */
4670 if (instr->coord_components > 1 &&
4671 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4672 instr->is_array &&
4673 instr->op != nir_texop_txf) {
4674 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4675 }
4676
4677 if (instr->coord_components > 2 &&
4678 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4679 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4680 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4681 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4682 instr->is_array &&
4683 instr->op != nir_texop_txf &&
4684 instr->op != nir_texop_txf_ms &&
4685 instr->op != nir_texop_fragment_fetch &&
4686 instr->op != nir_texop_fragment_mask_fetch) {
4687 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4688 }
4689
4690 if (ctx->ac.chip_class == GFX9 &&
4691 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4692 instr->op != nir_texop_lod) {
4693 LLVMValueRef filler;
4694 if (instr->op == nir_texop_txf)
4695 filler = ctx->ac.i32_0;
4696 else
4697 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4698
4699 if (instr->is_array)
4700 args.coords[2] = args.coords[1];
4701 args.coords[1] = filler;
4702 }
4703
4704 /* Pack sample index */
4705 if (sample_index && (instr->op == nir_texop_txf_ms ||
4706 instr->op == nir_texop_fragment_fetch))
4707 args.coords[instr->coord_components] = sample_index;
4708
4709 if (instr->op == nir_texop_samples_identical) {
4710 struct ac_image_args txf_args = { 0 };
4711 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4712
4713 txf_args.dmask = 0xf;
4714 txf_args.resource = fmask_ptr;
4715 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4716 result = build_tex_intrinsic(ctx, instr, &txf_args);
4717
4718 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4719 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4720 goto write_result;
4721 }
4722
4723 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4724 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4725 instr->op != nir_texop_txs &&
4726 instr->op != nir_texop_fragment_fetch &&
4727 instr->op != nir_texop_fragment_mask_fetch) {
4728 unsigned sample_chan = instr->is_array ? 3 : 2;
4729 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4730 &ctx->ac, args.coords[0], args.coords[1],
4731 instr->is_array ? args.coords[2] : NULL,
4732 args.coords[sample_chan], fmask_ptr);
4733 }
4734
4735 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4736 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4737 num_offsets = MIN2(num_offsets, instr->coord_components);
4738 for (unsigned i = 0; i < num_offsets; ++i) {
4739 args.coords[i] = LLVMBuildAdd(
4740 ctx->ac.builder, args.coords[i],
4741 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4742 }
4743 args.offset = NULL;
4744 }
4745
4746 /* DMASK was repurposed for GATHER4. 4 components are always
4747 * returned and DMASK works like a swizzle - it selects
4748 * the component to fetch. The only valid DMASK values are
4749 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4750 * (red,red,red,red) etc.) The ISA document doesn't mention
4751 * this.
4752 */
4753 args.dmask = 0xf;
4754 if (instr->op == nir_texop_tg4) {
4755 if (instr->is_shadow)
4756 args.dmask = 1;
4757 else
4758 args.dmask = 1 << instr->component;
4759 }
4760
4761 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4762 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4763 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4764 }
4765
4766 /* Adjust the number of coordinates because we only need (x,y) for 2D
4767 * multisampled images and (x,y,layer) for 2D multisampled layered
4768 * images or for multisampled input attachments.
4769 */
4770 if (instr->op == nir_texop_fragment_mask_fetch) {
4771 if (args.dim == ac_image_2dmsaa) {
4772 args.dim = ac_image_2d;
4773 } else {
4774 assert(args.dim == ac_image_2darraymsaa);
4775 args.dim = ac_image_2darray;
4776 }
4777 }
4778
4779 assert(instr->dest.is_ssa);
4780 args.d16 = instr->dest.ssa.bit_size == 16;
4781
4782 result = build_tex_intrinsic(ctx, instr, &args);
4783
4784 if (instr->op == nir_texop_query_levels)
4785 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4786 else if (instr->is_shadow && instr->is_new_style_shadow &&
4787 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4788 instr->op != nir_texop_tg4)
4789 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4790 else if (instr->op == nir_texop_txs &&
4791 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4792 instr->is_array) {
4793 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4794 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4795 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4796 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4797 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4798 } else if (ctx->ac.chip_class == GFX9 &&
4799 instr->op == nir_texop_txs &&
4800 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4801 instr->is_array) {
4802 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4803 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4804 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4805 ctx->ac.i32_1, "");
4806 } else if (instr->dest.ssa.num_components != 4)
4807 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4808
4809 write_result:
4810 if (result) {
4811 assert(instr->dest.is_ssa);
4812 result = ac_to_integer(&ctx->ac, result);
4813
4814 for (int i = ARRAY_SIZE(wctx); --i >= 0;) {
4815 result = exit_waterfall(ctx, wctx + i, result);
4816 }
4817
4818 ctx->ssa_defs[instr->dest.ssa.index] = result;
4819 }
4820 }
4821
4822 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4823 {
4824 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4825 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4826
4827 ctx->ssa_defs[instr->dest.ssa.index] = result;
4828 _mesa_hash_table_insert(ctx->phis, instr, result);
4829 }
4830
4831 static void visit_post_phi(struct ac_nir_context *ctx,
4832 nir_phi_instr *instr,
4833 LLVMValueRef llvm_phi)
4834 {
4835 nir_foreach_phi_src(src, instr) {
4836 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4837 LLVMValueRef llvm_src = get_src(ctx, src->src);
4838
4839 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4840 }
4841 }
4842
4843 static void phi_post_pass(struct ac_nir_context *ctx)
4844 {
4845 hash_table_foreach(ctx->phis, entry) {
4846 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4847 (LLVMValueRef)entry->data);
4848 }
4849 }
4850
4851
4852 static bool is_def_used_in_an_export(const nir_ssa_def* def) {
4853 nir_foreach_use(use_src, def) {
4854 if (use_src->parent_instr->type == nir_instr_type_intrinsic) {
4855 nir_intrinsic_instr *instr = nir_instr_as_intrinsic(use_src->parent_instr);
4856 if (instr->intrinsic == nir_intrinsic_store_deref)
4857 return true;
4858 } else if (use_src->parent_instr->type == nir_instr_type_alu) {
4859 nir_alu_instr *instr = nir_instr_as_alu(use_src->parent_instr);
4860 if (instr->op == nir_op_vec4 &&
4861 is_def_used_in_an_export(&instr->dest.dest.ssa)) {
4862 return true;
4863 }
4864 }
4865 }
4866 return false;
4867 }
4868
4869 static void visit_ssa_undef(struct ac_nir_context *ctx,
4870 const nir_ssa_undef_instr *instr)
4871 {
4872 unsigned num_components = instr->def.num_components;
4873 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4874
4875 if (!ctx->abi->convert_undef_to_zero || is_def_used_in_an_export(&instr->def)) {
4876 LLVMValueRef undef;
4877
4878 if (num_components == 1)
4879 undef = LLVMGetUndef(type);
4880 else {
4881 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4882 }
4883 ctx->ssa_defs[instr->def.index] = undef;
4884 } else {
4885 LLVMValueRef zero = LLVMConstInt(type, 0, false);
4886 if (num_components > 1) {
4887 zero = ac_build_gather_values_extended(
4888 &ctx->ac, &zero, 4, 0, false, false);
4889 }
4890 ctx->ssa_defs[instr->def.index] = zero;
4891 }
4892 }
4893
4894 static void visit_jump(struct ac_llvm_context *ctx,
4895 const nir_jump_instr *instr)
4896 {
4897 switch (instr->type) {
4898 case nir_jump_break:
4899 ac_build_break(ctx);
4900 break;
4901 case nir_jump_continue:
4902 ac_build_continue(ctx);
4903 break;
4904 default:
4905 fprintf(stderr, "Unknown NIR jump instr: ");
4906 nir_print_instr(&instr->instr, stderr);
4907 fprintf(stderr, "\n");
4908 abort();
4909 }
4910 }
4911
4912 static LLVMTypeRef
4913 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4914 enum glsl_base_type type)
4915 {
4916 switch (type) {
4917 case GLSL_TYPE_INT:
4918 case GLSL_TYPE_UINT:
4919 case GLSL_TYPE_BOOL:
4920 case GLSL_TYPE_SUBROUTINE:
4921 return ac->i32;
4922 case GLSL_TYPE_INT8:
4923 case GLSL_TYPE_UINT8:
4924 return ac->i8;
4925 case GLSL_TYPE_INT16:
4926 case GLSL_TYPE_UINT16:
4927 return ac->i16;
4928 case GLSL_TYPE_FLOAT:
4929 return ac->f32;
4930 case GLSL_TYPE_FLOAT16:
4931 return ac->f16;
4932 case GLSL_TYPE_INT64:
4933 case GLSL_TYPE_UINT64:
4934 return ac->i64;
4935 case GLSL_TYPE_DOUBLE:
4936 return ac->f64;
4937 default:
4938 unreachable("unknown GLSL type");
4939 }
4940 }
4941
4942 static LLVMTypeRef
4943 glsl_to_llvm_type(struct ac_llvm_context *ac,
4944 const struct glsl_type *type)
4945 {
4946 if (glsl_type_is_scalar(type)) {
4947 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4948 }
4949
4950 if (glsl_type_is_vector(type)) {
4951 return LLVMVectorType(
4952 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4953 glsl_get_vector_elements(type));
4954 }
4955
4956 if (glsl_type_is_matrix(type)) {
4957 return LLVMArrayType(
4958 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4959 glsl_get_matrix_columns(type));
4960 }
4961
4962 if (glsl_type_is_array(type)) {
4963 return LLVMArrayType(
4964 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4965 glsl_get_length(type));
4966 }
4967
4968 assert(glsl_type_is_struct_or_ifc(type));
4969
4970 LLVMTypeRef member_types[glsl_get_length(type)];
4971
4972 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4973 member_types[i] =
4974 glsl_to_llvm_type(ac,
4975 glsl_get_struct_field(type, i));
4976 }
4977
4978 return LLVMStructTypeInContext(ac->context, member_types,
4979 glsl_get_length(type), false);
4980 }
4981
4982 static void visit_deref(struct ac_nir_context *ctx,
4983 nir_deref_instr *instr)
4984 {
4985 if (instr->mode != nir_var_mem_shared &&
4986 instr->mode != nir_var_mem_global)
4987 return;
4988
4989 LLVMValueRef result = NULL;
4990 switch(instr->deref_type) {
4991 case nir_deref_type_var: {
4992 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4993 result = entry->data;
4994 break;
4995 }
4996 case nir_deref_type_struct:
4997 if (instr->mode == nir_var_mem_global) {
4998 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4999 uint64_t offset = glsl_get_struct_field_offset(parent->type,
5000 instr->strct.index);
5001 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5002 LLVMConstInt(ctx->ac.i32, offset, 0));
5003 } else {
5004 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5005 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
5006 }
5007 break;
5008 case nir_deref_type_array:
5009 if (instr->mode == nir_var_mem_global) {
5010 nir_deref_instr *parent = nir_deref_instr_parent(instr);
5011 unsigned stride = glsl_get_explicit_stride(parent->type);
5012
5013 if ((glsl_type_is_matrix(parent->type) &&
5014 glsl_matrix_type_is_row_major(parent->type)) ||
5015 (glsl_type_is_vector(parent->type) && stride == 0))
5016 stride = type_scalar_size_bytes(parent->type);
5017
5018 assert(stride > 0);
5019 LLVMValueRef index = get_src(ctx, instr->arr.index);
5020 if (LLVMTypeOf(index) != ctx->ac.i64)
5021 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5022
5023 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5024
5025 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5026 } else {
5027 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
5028 get_src(ctx, instr->arr.index));
5029 }
5030 break;
5031 case nir_deref_type_ptr_as_array:
5032 if (instr->mode == nir_var_mem_global) {
5033 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
5034
5035 LLVMValueRef index = get_src(ctx, instr->arr.index);
5036 if (LLVMTypeOf(index) != ctx->ac.i64)
5037 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
5038
5039 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
5040
5041 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
5042 } else {
5043 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
5044 get_src(ctx, instr->arr.index));
5045 }
5046 break;
5047 case nir_deref_type_cast: {
5048 result = get_src(ctx, instr->parent);
5049
5050 /* We can't use the structs from LLVM because the shader
5051 * specifies its own offsets. */
5052 LLVMTypeRef pointee_type = ctx->ac.i8;
5053 if (instr->mode == nir_var_mem_shared)
5054 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
5055
5056 unsigned address_space;
5057
5058 switch(instr->mode) {
5059 case nir_var_mem_shared:
5060 address_space = AC_ADDR_SPACE_LDS;
5061 break;
5062 case nir_var_mem_global:
5063 address_space = AC_ADDR_SPACE_GLOBAL;
5064 break;
5065 default:
5066 unreachable("Unhandled address space");
5067 }
5068
5069 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
5070
5071 if (LLVMTypeOf(result) != type) {
5072 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
5073 result = LLVMBuildBitCast(ctx->ac.builder, result,
5074 type, "");
5075 } else {
5076 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
5077 type, "");
5078 }
5079 }
5080 break;
5081 }
5082 default:
5083 unreachable("Unhandled deref_instr deref type");
5084 }
5085
5086 ctx->ssa_defs[instr->dest.ssa.index] = result;
5087 }
5088
5089 static void visit_cf_list(struct ac_nir_context *ctx,
5090 struct exec_list *list);
5091
5092 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
5093 {
5094 nir_foreach_instr(instr, block)
5095 {
5096 switch (instr->type) {
5097 case nir_instr_type_alu:
5098 visit_alu(ctx, nir_instr_as_alu(instr));
5099 break;
5100 case nir_instr_type_load_const:
5101 visit_load_const(ctx, nir_instr_as_load_const(instr));
5102 break;
5103 case nir_instr_type_intrinsic:
5104 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
5105 break;
5106 case nir_instr_type_tex:
5107 visit_tex(ctx, nir_instr_as_tex(instr));
5108 break;
5109 case nir_instr_type_phi:
5110 visit_phi(ctx, nir_instr_as_phi(instr));
5111 break;
5112 case nir_instr_type_ssa_undef:
5113 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
5114 break;
5115 case nir_instr_type_jump:
5116 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
5117 break;
5118 case nir_instr_type_deref:
5119 visit_deref(ctx, nir_instr_as_deref(instr));
5120 break;
5121 default:
5122 fprintf(stderr, "Unknown NIR instr type: ");
5123 nir_print_instr(instr, stderr);
5124 fprintf(stderr, "\n");
5125 abort();
5126 }
5127 }
5128
5129 _mesa_hash_table_insert(ctx->defs, block,
5130 LLVMGetInsertBlock(ctx->ac.builder));
5131 }
5132
5133 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
5134 {
5135 LLVMValueRef value = get_src(ctx, if_stmt->condition);
5136
5137 nir_block *then_block =
5138 (nir_block *) exec_list_get_head(&if_stmt->then_list);
5139
5140 ac_build_uif(&ctx->ac, value, then_block->index);
5141
5142 visit_cf_list(ctx, &if_stmt->then_list);
5143
5144 if (!exec_list_is_empty(&if_stmt->else_list)) {
5145 nir_block *else_block =
5146 (nir_block *) exec_list_get_head(&if_stmt->else_list);
5147
5148 ac_build_else(&ctx->ac, else_block->index);
5149 visit_cf_list(ctx, &if_stmt->else_list);
5150 }
5151
5152 ac_build_endif(&ctx->ac, then_block->index);
5153 }
5154
5155 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
5156 {
5157 nir_block *first_loop_block =
5158 (nir_block *) exec_list_get_head(&loop->body);
5159
5160 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
5161
5162 visit_cf_list(ctx, &loop->body);
5163
5164 ac_build_endloop(&ctx->ac, first_loop_block->index);
5165 }
5166
5167 static void visit_cf_list(struct ac_nir_context *ctx,
5168 struct exec_list *list)
5169 {
5170 foreach_list_typed(nir_cf_node, node, node, list)
5171 {
5172 switch (node->type) {
5173 case nir_cf_node_block:
5174 visit_block(ctx, nir_cf_node_as_block(node));
5175 break;
5176
5177 case nir_cf_node_if:
5178 visit_if(ctx, nir_cf_node_as_if(node));
5179 break;
5180
5181 case nir_cf_node_loop:
5182 visit_loop(ctx, nir_cf_node_as_loop(node));
5183 break;
5184
5185 default:
5186 assert(0);
5187 }
5188 }
5189 }
5190
5191 void
5192 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
5193 struct ac_shader_abi *abi,
5194 struct nir_shader *nir,
5195 struct nir_variable *variable,
5196 gl_shader_stage stage)
5197 {
5198 unsigned output_loc = variable->data.driver_location / 4;
5199 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5200
5201 /* tess ctrl has it's own load/store paths for outputs */
5202 if (stage == MESA_SHADER_TESS_CTRL)
5203 return;
5204
5205 if (stage == MESA_SHADER_VERTEX ||
5206 stage == MESA_SHADER_TESS_EVAL ||
5207 stage == MESA_SHADER_GEOMETRY) {
5208 int idx = variable->data.location + variable->data.index;
5209 if (idx == VARYING_SLOT_CLIP_DIST0) {
5210 int length = nir->info.clip_distance_array_size +
5211 nir->info.cull_distance_array_size;
5212
5213 if (length > 4)
5214 attrib_count = 2;
5215 else
5216 attrib_count = 1;
5217 }
5218 }
5219
5220 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
5221 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
5222 for (unsigned i = 0; i < attrib_count; ++i) {
5223 for (unsigned chan = 0; chan < 4; chan++) {
5224 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
5225 ac_build_alloca_undef(ctx, type, "");
5226 }
5227 }
5228 }
5229
5230 static void
5231 setup_locals(struct ac_nir_context *ctx,
5232 struct nir_function *func)
5233 {
5234 int i, j;
5235 ctx->num_locals = 0;
5236 nir_foreach_function_temp_variable(variable, func->impl) {
5237 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
5238 variable->data.driver_location = ctx->num_locals * 4;
5239 variable->data.location_frac = 0;
5240 ctx->num_locals += attrib_count;
5241 }
5242 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
5243 if (!ctx->locals)
5244 return;
5245
5246 for (i = 0; i < ctx->num_locals; i++) {
5247 for (j = 0; j < 4; j++) {
5248 ctx->locals[i * 4 + j] =
5249 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
5250 }
5251 }
5252 }
5253
5254 static void
5255 setup_scratch(struct ac_nir_context *ctx,
5256 struct nir_shader *shader)
5257 {
5258 if (shader->scratch_size == 0)
5259 return;
5260
5261 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
5262 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
5263 "scratch");
5264 }
5265
5266 static void
5267 setup_constant_data(struct ac_nir_context *ctx,
5268 struct nir_shader *shader)
5269 {
5270 if (!shader->constant_data)
5271 return;
5272
5273 LLVMValueRef data =
5274 LLVMConstStringInContext(ctx->ac.context,
5275 shader->constant_data,
5276 shader->constant_data_size,
5277 true);
5278 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
5279
5280 /* We want to put the constant data in the CONST address space so that
5281 * we can use scalar loads. However, LLVM versions before 10 put these
5282 * variables in the same section as the code, which is unacceptable
5283 * for RadeonSI as it needs to relocate all the data sections after
5284 * the code sections. See https://reviews.llvm.org/D65813.
5285 */
5286 unsigned address_space =
5287 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
5288
5289 LLVMValueRef global =
5290 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5291 "const_data",
5292 address_space);
5293
5294 LLVMSetInitializer(global, data);
5295 LLVMSetGlobalConstant(global, true);
5296 LLVMSetVisibility(global, LLVMHiddenVisibility);
5297 ctx->constant_data = global;
5298 }
5299
5300 static void
5301 setup_shared(struct ac_nir_context *ctx,
5302 struct nir_shader *nir)
5303 {
5304 if (ctx->ac.lds)
5305 return;
5306
5307 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
5308 nir->info.cs.shared_size);
5309
5310 LLVMValueRef lds =
5311 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
5312 "compute_lds",
5313 AC_ADDR_SPACE_LDS);
5314 LLVMSetAlignment(lds, 64 * 1024);
5315
5316 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
5317 LLVMPointerType(ctx->ac.i8,
5318 AC_ADDR_SPACE_LDS), "");
5319 }
5320
5321 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
5322 const struct ac_shader_args *args, struct nir_shader *nir)
5323 {
5324 struct ac_nir_context ctx = {};
5325 struct nir_function *func;
5326
5327 ctx.ac = *ac;
5328 ctx.abi = abi;
5329 ctx.args = args;
5330
5331 ctx.stage = nir->info.stage;
5332 ctx.info = &nir->info;
5333
5334 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
5335
5336 nir_foreach_shader_out_variable(variable, nir)
5337 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
5338 ctx.stage);
5339
5340 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5341 _mesa_key_pointer_equal);
5342 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5343 _mesa_key_pointer_equal);
5344 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5345 _mesa_key_pointer_equal);
5346
5347 if (ctx.abi->kill_ps_if_inf_interp)
5348 ctx.verified_interp = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
5349 _mesa_key_pointer_equal);
5350
5351 func = (struct nir_function *)exec_list_get_head(&nir->functions);
5352
5353 nir_index_ssa_defs(func->impl);
5354 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
5355
5356 setup_locals(&ctx, func);
5357 setup_scratch(&ctx, nir);
5358 setup_constant_data(&ctx, nir);
5359
5360 if (gl_shader_stage_is_compute(nir->info.stage))
5361 setup_shared(&ctx, nir);
5362
5363 if (nir->info.stage == MESA_SHADER_FRAGMENT && nir->info.fs.uses_demote) {
5364 ctx.ac.postponed_kill = ac_build_alloca_undef(&ctx.ac, ac->i1, "");
5365 /* true = don't kill. */
5366 LLVMBuildStore(ctx.ac.builder, ctx.ac.i1true, ctx.ac.postponed_kill);
5367 }
5368
5369 visit_cf_list(&ctx, &func->impl->body);
5370 phi_post_pass(&ctx);
5371
5372 if (ctx.ac.postponed_kill)
5373 ac_build_kill_if_false(&ctx.ac, LLVMBuildLoad(ctx.ac.builder,
5374 ctx.ac.postponed_kill, ""));
5375
5376 if (!gl_shader_stage_is_compute(nir->info.stage))
5377 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
5378 ctx.abi->outputs);
5379
5380 free(ctx.locals);
5381 free(ctx.ssa_defs);
5382 ralloc_free(ctx.defs);
5383 ralloc_free(ctx.phis);
5384 ralloc_free(ctx.vars);
5385 if (ctx.abi->kill_ps_if_inf_interp)
5386 ralloc_free(ctx.verified_interp);
5387 }
5388
5389 bool
5390 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
5391 {
5392 bool progress = false;
5393
5394 /* Lower large variables to scratch first so that we won't bloat the
5395 * shader by generating large if ladders for them. We later lower
5396 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
5397 */
5398 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
5399 nir_var_function_temp,
5400 256,
5401 glsl_get_natural_size_align_bytes);
5402
5403 /* While it would be nice not to have this flag, we are constrained
5404 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
5405 */
5406 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
5407
5408 /* TODO: Indirect indexing of GS inputs is unimplemented.
5409 *
5410 * TCS and TES load inputs directly from LDS or offchip memory, so
5411 * indirect indexing is trivial.
5412 */
5413 nir_variable_mode indirect_mask = 0;
5414 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
5415 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
5416 nir->info.stage != MESA_SHADER_TESS_EVAL &&
5417 !llvm_has_working_vgpr_indexing)) {
5418 indirect_mask |= nir_var_shader_in;
5419 }
5420 if (!llvm_has_working_vgpr_indexing &&
5421 nir->info.stage != MESA_SHADER_TESS_CTRL)
5422 indirect_mask |= nir_var_shader_out;
5423
5424 /* TODO: We shouldn't need to do this, however LLVM isn't currently
5425 * smart enough to handle indirects without causing excess spilling
5426 * causing the gpu to hang.
5427 *
5428 * See the following thread for more details of the problem:
5429 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
5430 */
5431 indirect_mask |= nir_var_function_temp;
5432
5433 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
5434 return progress;
5435 }
5436
5437 static unsigned
5438 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
5439 {
5440 if (intrin->intrinsic != nir_intrinsic_store_deref)
5441 return 0;
5442
5443 nir_variable *var =
5444 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
5445
5446 if (var->data.mode != nir_var_shader_out)
5447 return 0;
5448
5449 unsigned writemask = 0;
5450 const int location = var->data.location;
5451 unsigned first_component = var->data.location_frac;
5452 unsigned num_comps = intrin->dest.ssa.num_components;
5453
5454 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
5455 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
5456 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
5457 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
5458
5459 return writemask;
5460 }
5461
5462 static void
5463 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
5464 unsigned *cond_block_tf_writemask,
5465 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
5466 {
5467 switch (cf_node->type) {
5468 case nir_cf_node_block: {
5469 nir_block *block = nir_cf_node_as_block(cf_node);
5470 nir_foreach_instr(instr, block) {
5471 if (instr->type != nir_instr_type_intrinsic)
5472 continue;
5473
5474 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
5475 if (intrin->intrinsic == nir_intrinsic_control_barrier) {
5476
5477 /* If we find a barrier in nested control flow put this in the
5478 * too hard basket. In GLSL this is not possible but it is in
5479 * SPIR-V.
5480 */
5481 if (is_nested_cf) {
5482 *tessfactors_are_def_in_all_invocs = false;
5483 return;
5484 }
5485
5486 /* The following case must be prevented:
5487 * gl_TessLevelInner = ...;
5488 * barrier();
5489 * if (gl_InvocationID == 1)
5490 * gl_TessLevelInner = ...;
5491 *
5492 * If you consider disjoint code segments separated by barriers, each
5493 * such segment that writes tess factor channels should write the same
5494 * channels in all codepaths within that segment.
5495 */
5496 if (upper_block_tf_writemask || cond_block_tf_writemask) {
5497 /* Accumulate the result: */
5498 *tessfactors_are_def_in_all_invocs &=
5499 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
5500
5501 /* Analyze the next code segment from scratch. */
5502 *upper_block_tf_writemask = 0;
5503 *cond_block_tf_writemask = 0;
5504 }
5505 } else
5506 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
5507 }
5508
5509 break;
5510 }
5511 case nir_cf_node_if: {
5512 unsigned then_tessfactor_writemask = 0;
5513 unsigned else_tessfactor_writemask = 0;
5514
5515 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
5516 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
5517 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
5518 cond_block_tf_writemask,
5519 tessfactors_are_def_in_all_invocs, true);
5520 }
5521
5522 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
5523 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
5524 cond_block_tf_writemask,
5525 tessfactors_are_def_in_all_invocs, true);
5526 }
5527
5528 if (then_tessfactor_writemask || else_tessfactor_writemask) {
5529 /* If both statements write the same tess factor channels,
5530 * we can say that the upper block writes them too.
5531 */
5532 *upper_block_tf_writemask |= then_tessfactor_writemask &
5533 else_tessfactor_writemask;
5534 *cond_block_tf_writemask |= then_tessfactor_writemask |
5535 else_tessfactor_writemask;
5536 }
5537
5538 break;
5539 }
5540 case nir_cf_node_loop: {
5541 nir_loop *loop = nir_cf_node_as_loop(cf_node);
5542 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
5543 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
5544 cond_block_tf_writemask,
5545 tessfactors_are_def_in_all_invocs, true);
5546 }
5547
5548 break;
5549 }
5550 default:
5551 unreachable("unknown cf node type");
5552 }
5553 }
5554
5555 bool
5556 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
5557 {
5558 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
5559
5560 /* The pass works as follows:
5561 * If all codepaths write tess factors, we can say that all
5562 * invocations define tess factors.
5563 *
5564 * Each tess factor channel is tracked separately.
5565 */
5566 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
5567 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
5568
5569 /* Initial value = true. Here the pass will accumulate results from
5570 * multiple segments surrounded by barriers. If tess factors aren't
5571 * written at all, it's a shader bug and we don't care if this will be
5572 * true.
5573 */
5574 bool tessfactors_are_def_in_all_invocs = true;
5575
5576 nir_foreach_function(function, nir) {
5577 if (function->impl) {
5578 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
5579 scan_tess_ctrl(node, &main_block_tf_writemask,
5580 &cond_block_tf_writemask,
5581 &tessfactors_are_def_in_all_invocs,
5582 false);
5583 }
5584 }
5585 }
5586
5587 /* Accumulate the result for the last code segment separated by a
5588 * barrier.
5589 */
5590 if (main_block_tf_writemask || cond_block_tf_writemask) {
5591 tessfactors_are_def_in_all_invocs &=
5592 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5593 }
5594
5595 return tessfactors_are_def_in_all_invocs;
5596 }