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radv,ac/nir: lower deref operations for shared memory
[mesa.git] / src / amd / llvm / ac_nir_to_llvm.c
1 /*
2 * Copyright © 2016 Bas Nieuwenhuizen
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <llvm/Config/llvm-config.h>
25
26 #include "ac_nir_to_llvm.h"
27 #include "ac_llvm_build.h"
28 #include "ac_llvm_util.h"
29 #include "ac_binary.h"
30 #include "sid.h"
31 #include "nir/nir.h"
32 #include "nir/nir_deref.h"
33 #include "util/bitscan.h"
34 #include "util/u_math.h"
35 #include "ac_shader_abi.h"
36 #include "ac_shader_util.h"
37
38 struct ac_nir_context {
39 struct ac_llvm_context ac;
40 struct ac_shader_abi *abi;
41 const struct ac_shader_args *args;
42
43 gl_shader_stage stage;
44 shader_info *info;
45
46 LLVMValueRef *ssa_defs;
47
48 LLVMValueRef scratch;
49 LLVMValueRef constant_data;
50
51 struct hash_table *defs;
52 struct hash_table *phis;
53 struct hash_table *vars;
54
55 LLVMValueRef main_function;
56 LLVMBasicBlockRef continue_block;
57 LLVMBasicBlockRef break_block;
58
59 int num_locals;
60 LLVMValueRef *locals;
61 };
62
63 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
64 nir_deref_instr *deref_instr,
65 enum ac_descriptor_type desc_type,
66 const nir_instr *instr,
67 bool image, bool write);
68
69 static void
70 build_store_values_extended(struct ac_llvm_context *ac,
71 LLVMValueRef *values,
72 unsigned value_count,
73 unsigned value_stride,
74 LLVMValueRef vec)
75 {
76 LLVMBuilderRef builder = ac->builder;
77 unsigned i;
78
79 for (i = 0; i < value_count; i++) {
80 LLVMValueRef ptr = values[i * value_stride];
81 LLVMValueRef index = LLVMConstInt(ac->i32, i, false);
82 LLVMValueRef value = LLVMBuildExtractElement(builder, vec, index, "");
83 LLVMBuildStore(builder, value, ptr);
84 }
85 }
86
87 static LLVMTypeRef get_def_type(struct ac_nir_context *ctx,
88 const nir_ssa_def *def)
89 {
90 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, def->bit_size);
91 if (def->num_components > 1) {
92 type = LLVMVectorType(type, def->num_components);
93 }
94 return type;
95 }
96
97 static LLVMValueRef get_src(struct ac_nir_context *nir, nir_src src)
98 {
99 assert(src.is_ssa);
100 return nir->ssa_defs[src.ssa->index];
101 }
102
103 static LLVMValueRef
104 get_memory_ptr(struct ac_nir_context *ctx, nir_src src, unsigned bit_size)
105 {
106 LLVMValueRef ptr = get_src(ctx, src);
107 ptr = LLVMBuildGEP(ctx->ac.builder, ctx->ac.lds, &ptr, 1, "");
108 int addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
109
110 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, bit_size);
111
112 return LLVMBuildBitCast(ctx->ac.builder, ptr,
113 LLVMPointerType(type, addr_space), "");
114 }
115
116 static LLVMBasicBlockRef get_block(struct ac_nir_context *nir,
117 const struct nir_block *b)
118 {
119 struct hash_entry *entry = _mesa_hash_table_search(nir->defs, b);
120 return (LLVMBasicBlockRef)entry->data;
121 }
122
123 static LLVMValueRef get_alu_src(struct ac_nir_context *ctx,
124 nir_alu_src src,
125 unsigned num_components)
126 {
127 LLVMValueRef value = get_src(ctx, src.src);
128 bool need_swizzle = false;
129
130 assert(value);
131 unsigned src_components = ac_get_llvm_num_components(value);
132 for (unsigned i = 0; i < num_components; ++i) {
133 assert(src.swizzle[i] < src_components);
134 if (src.swizzle[i] != i)
135 need_swizzle = true;
136 }
137
138 if (need_swizzle || num_components != src_components) {
139 LLVMValueRef masks[] = {
140 LLVMConstInt(ctx->ac.i32, src.swizzle[0], false),
141 LLVMConstInt(ctx->ac.i32, src.swizzle[1], false),
142 LLVMConstInt(ctx->ac.i32, src.swizzle[2], false),
143 LLVMConstInt(ctx->ac.i32, src.swizzle[3], false)};
144
145 if (src_components > 1 && num_components == 1) {
146 value = LLVMBuildExtractElement(ctx->ac.builder, value,
147 masks[0], "");
148 } else if (src_components == 1 && num_components > 1) {
149 LLVMValueRef values[] = {value, value, value, value};
150 value = ac_build_gather_values(&ctx->ac, values, num_components);
151 } else {
152 LLVMValueRef swizzle = LLVMConstVector(masks, num_components);
153 value = LLVMBuildShuffleVector(ctx->ac.builder, value, value,
154 swizzle, "");
155 }
156 }
157 assert(!src.negate);
158 assert(!src.abs);
159 return value;
160 }
161
162 static LLVMValueRef emit_int_cmp(struct ac_llvm_context *ctx,
163 LLVMIntPredicate pred, LLVMValueRef src0,
164 LLVMValueRef src1)
165 {
166 LLVMValueRef result = LLVMBuildICmp(ctx->builder, pred, src0, src1, "");
167 return LLVMBuildSelect(ctx->builder, result,
168 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
169 ctx->i32_0, "");
170 }
171
172 static LLVMValueRef emit_float_cmp(struct ac_llvm_context *ctx,
173 LLVMRealPredicate pred, LLVMValueRef src0,
174 LLVMValueRef src1)
175 {
176 LLVMValueRef result;
177 src0 = ac_to_float(ctx, src0);
178 src1 = ac_to_float(ctx, src1);
179 result = LLVMBuildFCmp(ctx->builder, pred, src0, src1, "");
180 return LLVMBuildSelect(ctx->builder, result,
181 LLVMConstInt(ctx->i32, 0xFFFFFFFF, false),
182 ctx->i32_0, "");
183 }
184
185 static LLVMValueRef emit_intrin_1f_param(struct ac_llvm_context *ctx,
186 const char *intrin,
187 LLVMTypeRef result_type,
188 LLVMValueRef src0)
189 {
190 char name[64];
191 LLVMValueRef params[] = {
192 ac_to_float(ctx, src0),
193 };
194
195 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
196 ac_get_elem_bits(ctx, result_type));
197 assert(length < sizeof(name));
198 return ac_build_intrinsic(ctx, name, result_type, params, 1, AC_FUNC_ATTR_READNONE);
199 }
200
201 static LLVMValueRef emit_intrin_2f_param(struct ac_llvm_context *ctx,
202 const char *intrin,
203 LLVMTypeRef result_type,
204 LLVMValueRef src0, LLVMValueRef src1)
205 {
206 char name[64];
207 LLVMValueRef params[] = {
208 ac_to_float(ctx, src0),
209 ac_to_float(ctx, src1),
210 };
211
212 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
213 ac_get_elem_bits(ctx, result_type));
214 assert(length < sizeof(name));
215 return ac_build_intrinsic(ctx, name, result_type, params, 2, AC_FUNC_ATTR_READNONE);
216 }
217
218 static LLVMValueRef emit_intrin_3f_param(struct ac_llvm_context *ctx,
219 const char *intrin,
220 LLVMTypeRef result_type,
221 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
222 {
223 char name[64];
224 LLVMValueRef params[] = {
225 ac_to_float(ctx, src0),
226 ac_to_float(ctx, src1),
227 ac_to_float(ctx, src2),
228 };
229
230 ASSERTED const int length = snprintf(name, sizeof(name), "%s.f%d", intrin,
231 ac_get_elem_bits(ctx, result_type));
232 assert(length < sizeof(name));
233 return ac_build_intrinsic(ctx, name, result_type, params, 3, AC_FUNC_ATTR_READNONE);
234 }
235
236 static LLVMValueRef emit_bcsel(struct ac_llvm_context *ctx,
237 LLVMValueRef src0, LLVMValueRef src1, LLVMValueRef src2)
238 {
239 LLVMTypeRef src1_type = LLVMTypeOf(src1);
240 LLVMTypeRef src2_type = LLVMTypeOf(src2);
241
242 assert(LLVMGetTypeKind(LLVMTypeOf(src0)) != LLVMVectorTypeKind);
243
244 if (LLVMGetTypeKind(src1_type) == LLVMPointerTypeKind &&
245 LLVMGetTypeKind(src2_type) != LLVMPointerTypeKind) {
246 src2 = LLVMBuildIntToPtr(ctx->builder, src2, src1_type, "");
247 } else if (LLVMGetTypeKind(src2_type) == LLVMPointerTypeKind &&
248 LLVMGetTypeKind(src1_type) != LLVMPointerTypeKind) {
249 src1 = LLVMBuildIntToPtr(ctx->builder, src1, src2_type, "");
250 }
251
252 LLVMValueRef v = LLVMBuildICmp(ctx->builder, LLVMIntNE, src0,
253 ctx->i32_0, "");
254 return LLVMBuildSelect(ctx->builder, v,
255 ac_to_integer_or_pointer(ctx, src1),
256 ac_to_integer_or_pointer(ctx, src2), "");
257 }
258
259 static LLVMValueRef emit_iabs(struct ac_llvm_context *ctx,
260 LLVMValueRef src0)
261 {
262 return ac_build_imax(ctx, src0, LLVMBuildNeg(ctx->builder, src0, ""));
263 }
264
265 static LLVMValueRef emit_uint_carry(struct ac_llvm_context *ctx,
266 const char *intrin,
267 LLVMValueRef src0, LLVMValueRef src1)
268 {
269 LLVMTypeRef ret_type;
270 LLVMTypeRef types[] = { ctx->i32, ctx->i1 };
271 LLVMValueRef res;
272 LLVMValueRef params[] = { src0, src1 };
273 ret_type = LLVMStructTypeInContext(ctx->context, types,
274 2, true);
275
276 res = ac_build_intrinsic(ctx, intrin, ret_type,
277 params, 2, AC_FUNC_ATTR_READNONE);
278
279 res = LLVMBuildExtractValue(ctx->builder, res, 1, "");
280 res = LLVMBuildZExt(ctx->builder, res, ctx->i32, "");
281 return res;
282 }
283
284 static LLVMValueRef emit_b2f(struct ac_llvm_context *ctx,
285 LLVMValueRef src0,
286 unsigned bitsize)
287 {
288 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0,
289 LLVMBuildBitCast(ctx->builder, LLVMConstReal(ctx->f32, 1.0), ctx->i32, ""),
290 "");
291 result = LLVMBuildBitCast(ctx->builder, result, ctx->f32, "");
292
293 switch (bitsize) {
294 case 16:
295 return LLVMBuildFPTrunc(ctx->builder, result, ctx->f16, "");
296 case 32:
297 return result;
298 case 64:
299 return LLVMBuildFPExt(ctx->builder, result, ctx->f64, "");
300 default:
301 unreachable("Unsupported bit size.");
302 }
303 }
304
305 static LLVMValueRef emit_f2b(struct ac_llvm_context *ctx,
306 LLVMValueRef src0)
307 {
308 src0 = ac_to_float(ctx, src0);
309 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
310 return LLVMBuildSExt(ctx->builder,
311 LLVMBuildFCmp(ctx->builder, LLVMRealUNE, src0, zero, ""),
312 ctx->i32, "");
313 }
314
315 static LLVMValueRef emit_b2i(struct ac_llvm_context *ctx,
316 LLVMValueRef src0,
317 unsigned bitsize)
318 {
319 LLVMValueRef result = LLVMBuildAnd(ctx->builder, src0, ctx->i32_1, "");
320
321 switch (bitsize) {
322 case 8:
323 return LLVMBuildTrunc(ctx->builder, result, ctx->i8, "");
324 case 16:
325 return LLVMBuildTrunc(ctx->builder, result, ctx->i16, "");
326 case 32:
327 return result;
328 case 64:
329 return LLVMBuildZExt(ctx->builder, result, ctx->i64, "");
330 default:
331 unreachable("Unsupported bit size.");
332 }
333 }
334
335 static LLVMValueRef emit_i2b(struct ac_llvm_context *ctx,
336 LLVMValueRef src0)
337 {
338 LLVMValueRef zero = LLVMConstNull(LLVMTypeOf(src0));
339 return LLVMBuildSExt(ctx->builder,
340 LLVMBuildICmp(ctx->builder, LLVMIntNE, src0, zero, ""),
341 ctx->i32, "");
342 }
343
344 static LLVMValueRef emit_f2f16(struct ac_llvm_context *ctx,
345 LLVMValueRef src0)
346 {
347 LLVMValueRef result;
348 LLVMValueRef cond = NULL;
349
350 src0 = ac_to_float(ctx, src0);
351 result = LLVMBuildFPTrunc(ctx->builder, src0, ctx->f16, "");
352
353 if (ctx->chip_class >= GFX8) {
354 LLVMValueRef args[2];
355 /* Check if the result is a denormal - and flush to 0 if so. */
356 args[0] = result;
357 args[1] = LLVMConstInt(ctx->i32, N_SUBNORMAL | P_SUBNORMAL, false);
358 cond = ac_build_intrinsic(ctx, "llvm.amdgcn.class.f16", ctx->i1, args, 2, AC_FUNC_ATTR_READNONE);
359 }
360
361 /* need to convert back up to f32 */
362 result = LLVMBuildFPExt(ctx->builder, result, ctx->f32, "");
363
364 if (ctx->chip_class >= GFX8)
365 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
366 else {
367 /* for GFX6-GFX7 */
368 /* 0x38800000 is smallest half float value (2^-14) in 32-bit float,
369 * so compare the result and flush to 0 if it's smaller.
370 */
371 LLVMValueRef temp, cond2;
372 temp = emit_intrin_1f_param(ctx, "llvm.fabs", ctx->f32, result);
373 cond = LLVMBuildFCmp(ctx->builder, LLVMRealOGT,
374 LLVMBuildBitCast(ctx->builder, LLVMConstInt(ctx->i32, 0x38800000, false), ctx->f32, ""),
375 temp, "");
376 cond2 = LLVMBuildFCmp(ctx->builder, LLVMRealONE,
377 temp, ctx->f32_0, "");
378 cond = LLVMBuildAnd(ctx->builder, cond, cond2, "");
379 result = LLVMBuildSelect(ctx->builder, cond, ctx->f32_0, result, "");
380 }
381 return result;
382 }
383
384 static LLVMValueRef emit_umul_high(struct ac_llvm_context *ctx,
385 LLVMValueRef src0, LLVMValueRef src1)
386 {
387 LLVMValueRef dst64, result;
388 src0 = LLVMBuildZExt(ctx->builder, src0, ctx->i64, "");
389 src1 = LLVMBuildZExt(ctx->builder, src1, ctx->i64, "");
390
391 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
392 dst64 = LLVMBuildLShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
393 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
394 return result;
395 }
396
397 static LLVMValueRef emit_imul_high(struct ac_llvm_context *ctx,
398 LLVMValueRef src0, LLVMValueRef src1)
399 {
400 LLVMValueRef dst64, result;
401 src0 = LLVMBuildSExt(ctx->builder, src0, ctx->i64, "");
402 src1 = LLVMBuildSExt(ctx->builder, src1, ctx->i64, "");
403
404 dst64 = LLVMBuildMul(ctx->builder, src0, src1, "");
405 dst64 = LLVMBuildAShr(ctx->builder, dst64, LLVMConstInt(ctx->i64, 32, false), "");
406 result = LLVMBuildTrunc(ctx->builder, dst64, ctx->i32, "");
407 return result;
408 }
409
410 static LLVMValueRef emit_bfm(struct ac_llvm_context *ctx,
411 LLVMValueRef bits, LLVMValueRef offset)
412 {
413 /* mask = ((1 << bits) - 1) << offset */
414 return LLVMBuildShl(ctx->builder,
415 LLVMBuildSub(ctx->builder,
416 LLVMBuildShl(ctx->builder,
417 ctx->i32_1,
418 bits, ""),
419 ctx->i32_1, ""),
420 offset, "");
421 }
422
423 static LLVMValueRef emit_bitfield_select(struct ac_llvm_context *ctx,
424 LLVMValueRef mask, LLVMValueRef insert,
425 LLVMValueRef base)
426 {
427 /* Calculate:
428 * (mask & insert) | (~mask & base) = base ^ (mask & (insert ^ base))
429 * Use the right-hand side, which the LLVM backend can convert to V_BFI.
430 */
431 return LLVMBuildXor(ctx->builder, base,
432 LLVMBuildAnd(ctx->builder, mask,
433 LLVMBuildXor(ctx->builder, insert, base, ""), ""), "");
434 }
435
436 static LLVMValueRef emit_pack_2x16(struct ac_llvm_context *ctx,
437 LLVMValueRef src0,
438 LLVMValueRef (*pack)(struct ac_llvm_context *ctx,
439 LLVMValueRef args[2]))
440 {
441 LLVMValueRef comp[2];
442
443 src0 = ac_to_float(ctx, src0);
444 comp[0] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_0, "");
445 comp[1] = LLVMBuildExtractElement(ctx->builder, src0, ctx->i32_1, "");
446
447 return LLVMBuildBitCast(ctx->builder, pack(ctx, comp), ctx->i32, "");
448 }
449
450 static LLVMValueRef emit_unpack_half_2x16(struct ac_llvm_context *ctx,
451 LLVMValueRef src0)
452 {
453 LLVMValueRef const16 = LLVMConstInt(ctx->i32, 16, false);
454 LLVMValueRef temps[2], val;
455 int i;
456
457 for (i = 0; i < 2; i++) {
458 val = i == 1 ? LLVMBuildLShr(ctx->builder, src0, const16, "") : src0;
459 val = LLVMBuildTrunc(ctx->builder, val, ctx->i16, "");
460 val = LLVMBuildBitCast(ctx->builder, val, ctx->f16, "");
461 temps[i] = LLVMBuildFPExt(ctx->builder, val, ctx->f32, "");
462 }
463 return ac_build_gather_values(ctx, temps, 2);
464 }
465
466 static LLVMValueRef emit_ddxy(struct ac_nir_context *ctx,
467 nir_op op,
468 LLVMValueRef src0)
469 {
470 unsigned mask;
471 int idx;
472 LLVMValueRef result;
473
474 if (op == nir_op_fddx_fine)
475 mask = AC_TID_MASK_LEFT;
476 else if (op == nir_op_fddy_fine)
477 mask = AC_TID_MASK_TOP;
478 else
479 mask = AC_TID_MASK_TOP_LEFT;
480
481 /* for DDX we want to next X pixel, DDY next Y pixel. */
482 if (op == nir_op_fddx_fine ||
483 op == nir_op_fddx_coarse ||
484 op == nir_op_fddx)
485 idx = 1;
486 else
487 idx = 2;
488
489 result = ac_build_ddxy(&ctx->ac, mask, idx, src0);
490 return result;
491 }
492
493 static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
494 {
495 LLVMValueRef src[4], result = NULL;
496 unsigned num_components = instr->dest.dest.ssa.num_components;
497 unsigned src_components;
498 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.dest.ssa);
499
500 assert(nir_op_infos[instr->op].num_inputs <= ARRAY_SIZE(src));
501 switch (instr->op) {
502 case nir_op_vec2:
503 case nir_op_vec3:
504 case nir_op_vec4:
505 src_components = 1;
506 break;
507 case nir_op_pack_half_2x16:
508 case nir_op_pack_snorm_2x16:
509 case nir_op_pack_unorm_2x16:
510 src_components = 2;
511 break;
512 case nir_op_unpack_half_2x16:
513 src_components = 1;
514 break;
515 case nir_op_cube_face_coord:
516 case nir_op_cube_face_index:
517 src_components = 3;
518 break;
519 default:
520 src_components = num_components;
521 break;
522 }
523 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
524 src[i] = get_alu_src(ctx, instr->src[i], src_components);
525
526 switch (instr->op) {
527 case nir_op_mov:
528 result = src[0];
529 break;
530 case nir_op_fneg:
531 src[0] = ac_to_float(&ctx->ac, src[0]);
532 result = LLVMBuildFNeg(ctx->ac.builder, src[0], "");
533 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
534 /* fneg will be optimized by backend compiler with sign
535 * bit removed via XOR. This is probably a LLVM bug.
536 */
537 result = ac_build_canonicalize(&ctx->ac, result,
538 instr->dest.dest.ssa.bit_size);
539 }
540 break;
541 case nir_op_ineg:
542 result = LLVMBuildNeg(ctx->ac.builder, src[0], "");
543 break;
544 case nir_op_inot:
545 result = LLVMBuildNot(ctx->ac.builder, src[0], "");
546 break;
547 case nir_op_iadd:
548 result = LLVMBuildAdd(ctx->ac.builder, src[0], src[1], "");
549 break;
550 case nir_op_fadd:
551 src[0] = ac_to_float(&ctx->ac, src[0]);
552 src[1] = ac_to_float(&ctx->ac, src[1]);
553 result = LLVMBuildFAdd(ctx->ac.builder, src[0], src[1], "");
554 break;
555 case nir_op_fsub:
556 src[0] = ac_to_float(&ctx->ac, src[0]);
557 src[1] = ac_to_float(&ctx->ac, src[1]);
558 result = LLVMBuildFSub(ctx->ac.builder, src[0], src[1], "");
559 break;
560 case nir_op_isub:
561 result = LLVMBuildSub(ctx->ac.builder, src[0], src[1], "");
562 break;
563 case nir_op_imul:
564 result = LLVMBuildMul(ctx->ac.builder, src[0], src[1], "");
565 break;
566 case nir_op_imod:
567 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
568 break;
569 case nir_op_umod:
570 result = LLVMBuildURem(ctx->ac.builder, src[0], src[1], "");
571 break;
572 case nir_op_fmod:
573 /* lower_fmod only lower 16-bit and 32-bit fmod */
574 assert(instr->dest.dest.ssa.bit_size == 64);
575 src[0] = ac_to_float(&ctx->ac, src[0]);
576 src[1] = ac_to_float(&ctx->ac, src[1]);
577 result = ac_build_fdiv(&ctx->ac, src[0], src[1]);
578 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
579 ac_to_float_type(&ctx->ac, def_type), result);
580 result = LLVMBuildFMul(ctx->ac.builder, src[1] , result, "");
581 result = LLVMBuildFSub(ctx->ac.builder, src[0], result, "");
582 break;
583 case nir_op_irem:
584 result = LLVMBuildSRem(ctx->ac.builder, src[0], src[1], "");
585 break;
586 case nir_op_idiv:
587 result = LLVMBuildSDiv(ctx->ac.builder, src[0], src[1], "");
588 break;
589 case nir_op_udiv:
590 result = LLVMBuildUDiv(ctx->ac.builder, src[0], src[1], "");
591 break;
592 case nir_op_fmul:
593 src[0] = ac_to_float(&ctx->ac, src[0]);
594 src[1] = ac_to_float(&ctx->ac, src[1]);
595 result = LLVMBuildFMul(ctx->ac.builder, src[0], src[1], "");
596 break;
597 case nir_op_frcp:
598 src[0] = ac_to_float(&ctx->ac, src[0]);
599 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(src[0]), 1.0), src[0]);
600 break;
601 case nir_op_iand:
602 result = LLVMBuildAnd(ctx->ac.builder, src[0], src[1], "");
603 break;
604 case nir_op_ior:
605 result = LLVMBuildOr(ctx->ac.builder, src[0], src[1], "");
606 break;
607 case nir_op_ixor:
608 result = LLVMBuildXor(ctx->ac.builder, src[0], src[1], "");
609 break;
610 case nir_op_ishl:
611 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
612 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
613 LLVMTypeOf(src[0]), "");
614 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
615 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
616 LLVMTypeOf(src[0]), "");
617 result = LLVMBuildShl(ctx->ac.builder, src[0], src[1], "");
618 break;
619 case nir_op_ishr:
620 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
621 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
622 LLVMTypeOf(src[0]), "");
623 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
624 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
625 LLVMTypeOf(src[0]), "");
626 result = LLVMBuildAShr(ctx->ac.builder, src[0], src[1], "");
627 break;
628 case nir_op_ushr:
629 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) < ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
630 src[1] = LLVMBuildZExt(ctx->ac.builder, src[1],
631 LLVMTypeOf(src[0]), "");
632 else if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[1])) > ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])))
633 src[1] = LLVMBuildTrunc(ctx->ac.builder, src[1],
634 LLVMTypeOf(src[0]), "");
635 result = LLVMBuildLShr(ctx->ac.builder, src[0], src[1], "");
636 break;
637 case nir_op_ilt32:
638 result = emit_int_cmp(&ctx->ac, LLVMIntSLT, src[0], src[1]);
639 break;
640 case nir_op_ine32:
641 result = emit_int_cmp(&ctx->ac, LLVMIntNE, src[0], src[1]);
642 break;
643 case nir_op_ieq32:
644 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, src[0], src[1]);
645 break;
646 case nir_op_ige32:
647 result = emit_int_cmp(&ctx->ac, LLVMIntSGE, src[0], src[1]);
648 break;
649 case nir_op_ult32:
650 result = emit_int_cmp(&ctx->ac, LLVMIntULT, src[0], src[1]);
651 break;
652 case nir_op_uge32:
653 result = emit_int_cmp(&ctx->ac, LLVMIntUGE, src[0], src[1]);
654 break;
655 case nir_op_feq32:
656 result = emit_float_cmp(&ctx->ac, LLVMRealOEQ, src[0], src[1]);
657 break;
658 case nir_op_fne32:
659 result = emit_float_cmp(&ctx->ac, LLVMRealUNE, src[0], src[1]);
660 break;
661 case nir_op_flt32:
662 result = emit_float_cmp(&ctx->ac, LLVMRealOLT, src[0], src[1]);
663 break;
664 case nir_op_fge32:
665 result = emit_float_cmp(&ctx->ac, LLVMRealOGE, src[0], src[1]);
666 break;
667 case nir_op_fabs:
668 result = emit_intrin_1f_param(&ctx->ac, "llvm.fabs",
669 ac_to_float_type(&ctx->ac, def_type), src[0]);
670 if (ctx->ac.float_mode == AC_FLOAT_MODE_DENORM_FLUSH_TO_ZERO) {
671 /* fabs will be optimized by backend compiler with sign
672 * bit removed via AND.
673 */
674 result = ac_build_canonicalize(&ctx->ac, result,
675 instr->dest.dest.ssa.bit_size);
676 }
677 break;
678 case nir_op_iabs:
679 result = emit_iabs(&ctx->ac, src[0]);
680 break;
681 case nir_op_imax:
682 result = ac_build_imax(&ctx->ac, src[0], src[1]);
683 break;
684 case nir_op_imin:
685 result = ac_build_imin(&ctx->ac, src[0], src[1]);
686 break;
687 case nir_op_umax:
688 result = ac_build_umax(&ctx->ac, src[0], src[1]);
689 break;
690 case nir_op_umin:
691 result = ac_build_umin(&ctx->ac, src[0], src[1]);
692 break;
693 case nir_op_isign:
694 result = ac_build_isign(&ctx->ac, src[0],
695 instr->dest.dest.ssa.bit_size);
696 break;
697 case nir_op_fsign:
698 src[0] = ac_to_float(&ctx->ac, src[0]);
699 result = ac_build_fsign(&ctx->ac, src[0],
700 instr->dest.dest.ssa.bit_size);
701 break;
702 case nir_op_ffloor:
703 result = emit_intrin_1f_param(&ctx->ac, "llvm.floor",
704 ac_to_float_type(&ctx->ac, def_type), src[0]);
705 break;
706 case nir_op_ftrunc:
707 result = emit_intrin_1f_param(&ctx->ac, "llvm.trunc",
708 ac_to_float_type(&ctx->ac, def_type), src[0]);
709 break;
710 case nir_op_fceil:
711 result = emit_intrin_1f_param(&ctx->ac, "llvm.ceil",
712 ac_to_float_type(&ctx->ac, def_type), src[0]);
713 break;
714 case nir_op_fround_even:
715 result = emit_intrin_1f_param(&ctx->ac, "llvm.rint",
716 ac_to_float_type(&ctx->ac, def_type),src[0]);
717 break;
718 case nir_op_ffract:
719 src[0] = ac_to_float(&ctx->ac, src[0]);
720 result = ac_build_fract(&ctx->ac, src[0],
721 instr->dest.dest.ssa.bit_size);
722 break;
723 case nir_op_fsin:
724 result = emit_intrin_1f_param(&ctx->ac, "llvm.sin",
725 ac_to_float_type(&ctx->ac, def_type), src[0]);
726 break;
727 case nir_op_fcos:
728 result = emit_intrin_1f_param(&ctx->ac, "llvm.cos",
729 ac_to_float_type(&ctx->ac, def_type), src[0]);
730 break;
731 case nir_op_fsqrt:
732 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
733 ac_to_float_type(&ctx->ac, def_type), src[0]);
734 break;
735 case nir_op_fexp2:
736 result = emit_intrin_1f_param(&ctx->ac, "llvm.exp2",
737 ac_to_float_type(&ctx->ac, def_type), src[0]);
738 break;
739 case nir_op_flog2:
740 result = emit_intrin_1f_param(&ctx->ac, "llvm.log2",
741 ac_to_float_type(&ctx->ac, def_type), src[0]);
742 break;
743 case nir_op_frsq:
744 result = emit_intrin_1f_param(&ctx->ac, "llvm.sqrt",
745 ac_to_float_type(&ctx->ac, def_type), src[0]);
746 result = ac_build_fdiv(&ctx->ac, LLVMConstReal(LLVMTypeOf(result), 1.0), result);
747 break;
748 case nir_op_frexp_exp:
749 src[0] = ac_to_float(&ctx->ac, src[0]);
750 result = ac_build_frexp_exp(&ctx->ac, src[0],
751 ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
752 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
753 result = LLVMBuildSExt(ctx->ac.builder, result,
754 ctx->ac.i32, "");
755 break;
756 case nir_op_frexp_sig:
757 src[0] = ac_to_float(&ctx->ac, src[0]);
758 result = ac_build_frexp_mant(&ctx->ac, src[0],
759 instr->dest.dest.ssa.bit_size);
760 break;
761 case nir_op_fpow:
762 result = emit_intrin_2f_param(&ctx->ac, "llvm.pow",
763 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
764 break;
765 case nir_op_fmax:
766 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
767 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
768 if (ctx->ac.chip_class < GFX9 &&
769 instr->dest.dest.ssa.bit_size == 32) {
770 /* Only pre-GFX9 chips do not flush denorms. */
771 result = ac_build_canonicalize(&ctx->ac, result,
772 instr->dest.dest.ssa.bit_size);
773 }
774 break;
775 case nir_op_fmin:
776 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
777 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
778 if (ctx->ac.chip_class < GFX9 &&
779 instr->dest.dest.ssa.bit_size == 32) {
780 /* Only pre-GFX9 chips do not flush denorms. */
781 result = ac_build_canonicalize(&ctx->ac, result,
782 instr->dest.dest.ssa.bit_size);
783 }
784 break;
785 case nir_op_ffma:
786 /* FMA is better on GFX10, because it has FMA units instead of MUL-ADD units. */
787 result = emit_intrin_3f_param(&ctx->ac, ctx->ac.chip_class >= GFX10 ? "llvm.fma" : "llvm.fmuladd",
788 ac_to_float_type(&ctx->ac, def_type), src[0], src[1], src[2]);
789 break;
790 case nir_op_ldexp:
791 src[0] = ac_to_float(&ctx->ac, src[0]);
792 if (ac_get_elem_bits(&ctx->ac, def_type) == 32)
793 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f32", ctx->ac.f32, src, 2, AC_FUNC_ATTR_READNONE);
794 else if (ac_get_elem_bits(&ctx->ac, def_type) == 16)
795 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f16", ctx->ac.f16, src, 2, AC_FUNC_ATTR_READNONE);
796 else
797 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.ldexp.f64", ctx->ac.f64, src, 2, AC_FUNC_ATTR_READNONE);
798 break;
799 case nir_op_bfm:
800 result = emit_bfm(&ctx->ac, src[0], src[1]);
801 break;
802 case nir_op_bitfield_select:
803 result = emit_bitfield_select(&ctx->ac, src[0], src[1], src[2]);
804 break;
805 case nir_op_ubfe:
806 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], false);
807 break;
808 case nir_op_ibfe:
809 result = ac_build_bfe(&ctx->ac, src[0], src[1], src[2], true);
810 break;
811 case nir_op_bitfield_reverse:
812 result = ac_build_bitfield_reverse(&ctx->ac, src[0]);
813 break;
814 case nir_op_bit_count:
815 result = ac_build_bit_count(&ctx->ac, src[0]);
816 break;
817 case nir_op_vec2:
818 case nir_op_vec3:
819 case nir_op_vec4:
820 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
821 src[i] = ac_to_integer(&ctx->ac, src[i]);
822 result = ac_build_gather_values(&ctx->ac, src, num_components);
823 break;
824 case nir_op_f2i8:
825 case nir_op_f2i16:
826 case nir_op_f2i32:
827 case nir_op_f2i64:
828 src[0] = ac_to_float(&ctx->ac, src[0]);
829 result = LLVMBuildFPToSI(ctx->ac.builder, src[0], def_type, "");
830 break;
831 case nir_op_f2u8:
832 case nir_op_f2u16:
833 case nir_op_f2u32:
834 case nir_op_f2u64:
835 src[0] = ac_to_float(&ctx->ac, src[0]);
836 result = LLVMBuildFPToUI(ctx->ac.builder, src[0], def_type, "");
837 break;
838 case nir_op_i2f16:
839 case nir_op_i2f32:
840 case nir_op_i2f64:
841 result = LLVMBuildSIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
842 break;
843 case nir_op_u2f16:
844 case nir_op_u2f32:
845 case nir_op_u2f64:
846 result = LLVMBuildUIToFP(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
847 break;
848 case nir_op_f2f16_rtz:
849 src[0] = ac_to_float(&ctx->ac, src[0]);
850 if (LLVMTypeOf(src[0]) == ctx->ac.f64)
851 src[0] = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ctx->ac.f32, "");
852 LLVMValueRef param[2] = { src[0], ctx->ac.f32_0 };
853 result = ac_build_cvt_pkrtz_f16(&ctx->ac, param);
854 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
855 break;
856 case nir_op_f2f16_rtne:
857 case nir_op_f2f16:
858 case nir_op_f2f32:
859 case nir_op_f2f64:
860 src[0] = ac_to_float(&ctx->ac, src[0]);
861 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
862 result = LLVMBuildFPExt(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
863 else
864 result = LLVMBuildFPTrunc(ctx->ac.builder, src[0], ac_to_float_type(&ctx->ac, def_type), "");
865 break;
866 case nir_op_u2u8:
867 case nir_op_u2u16:
868 case nir_op_u2u32:
869 case nir_op_u2u64:
870 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
871 result = LLVMBuildZExt(ctx->ac.builder, src[0], def_type, "");
872 else
873 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
874 break;
875 case nir_op_i2i8:
876 case nir_op_i2i16:
877 case nir_op_i2i32:
878 case nir_op_i2i64:
879 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) < ac_get_elem_bits(&ctx->ac, def_type))
880 result = LLVMBuildSExt(ctx->ac.builder, src[0], def_type, "");
881 else
882 result = LLVMBuildTrunc(ctx->ac.builder, src[0], def_type, "");
883 break;
884 case nir_op_b32csel:
885 result = emit_bcsel(&ctx->ac, src[0], src[1], src[2]);
886 break;
887 case nir_op_find_lsb:
888 result = ac_find_lsb(&ctx->ac, ctx->ac.i32, src[0]);
889 break;
890 case nir_op_ufind_msb:
891 result = ac_build_umsb(&ctx->ac, src[0], ctx->ac.i32);
892 break;
893 case nir_op_ifind_msb:
894 result = ac_build_imsb(&ctx->ac, src[0], ctx->ac.i32);
895 break;
896 case nir_op_uadd_carry:
897 result = emit_uint_carry(&ctx->ac, "llvm.uadd.with.overflow.i32", src[0], src[1]);
898 break;
899 case nir_op_usub_borrow:
900 result = emit_uint_carry(&ctx->ac, "llvm.usub.with.overflow.i32", src[0], src[1]);
901 break;
902 case nir_op_b2f16:
903 case nir_op_b2f32:
904 case nir_op_b2f64:
905 result = emit_b2f(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
906 break;
907 case nir_op_f2b32:
908 result = emit_f2b(&ctx->ac, src[0]);
909 break;
910 case nir_op_b2i8:
911 case nir_op_b2i16:
912 case nir_op_b2i32:
913 case nir_op_b2i64:
914 result = emit_b2i(&ctx->ac, src[0], instr->dest.dest.ssa.bit_size);
915 break;
916 case nir_op_i2b32:
917 result = emit_i2b(&ctx->ac, src[0]);
918 break;
919 case nir_op_fquantize2f16:
920 result = emit_f2f16(&ctx->ac, src[0]);
921 break;
922 case nir_op_umul_high:
923 result = emit_umul_high(&ctx->ac, src[0], src[1]);
924 break;
925 case nir_op_imul_high:
926 result = emit_imul_high(&ctx->ac, src[0], src[1]);
927 break;
928 case nir_op_pack_half_2x16:
929 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pkrtz_f16);
930 break;
931 case nir_op_pack_snorm_2x16:
932 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_i16);
933 break;
934 case nir_op_pack_unorm_2x16:
935 result = emit_pack_2x16(&ctx->ac, src[0], ac_build_cvt_pknorm_u16);
936 break;
937 case nir_op_unpack_half_2x16:
938 result = emit_unpack_half_2x16(&ctx->ac, src[0]);
939 break;
940 case nir_op_fddx:
941 case nir_op_fddy:
942 case nir_op_fddx_fine:
943 case nir_op_fddy_fine:
944 case nir_op_fddx_coarse:
945 case nir_op_fddy_coarse:
946 result = emit_ddxy(ctx, instr->op, src[0]);
947 break;
948
949 case nir_op_unpack_64_2x32_split_x: {
950 assert(ac_get_llvm_num_components(src[0]) == 1);
951 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
952 ctx->ac.v2i32,
953 "");
954 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
955 ctx->ac.i32_0, "");
956 break;
957 }
958
959 case nir_op_unpack_64_2x32_split_y: {
960 assert(ac_get_llvm_num_components(src[0]) == 1);
961 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
962 ctx->ac.v2i32,
963 "");
964 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
965 ctx->ac.i32_1, "");
966 break;
967 }
968
969 case nir_op_pack_64_2x32_split: {
970 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
971 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i64, "");
972 break;
973 }
974
975 case nir_op_pack_32_2x16_split: {
976 LLVMValueRef tmp = ac_build_gather_values(&ctx->ac, src, 2);
977 result = LLVMBuildBitCast(ctx->ac.builder, tmp, ctx->ac.i32, "");
978 break;
979 }
980
981 case nir_op_unpack_32_2x16_split_x: {
982 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
983 ctx->ac.v2i16,
984 "");
985 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
986 ctx->ac.i32_0, "");
987 break;
988 }
989
990 case nir_op_unpack_32_2x16_split_y: {
991 LLVMValueRef tmp = LLVMBuildBitCast(ctx->ac.builder, src[0],
992 ctx->ac.v2i16,
993 "");
994 result = LLVMBuildExtractElement(ctx->ac.builder, tmp,
995 ctx->ac.i32_1, "");
996 break;
997 }
998
999 case nir_op_cube_face_coord: {
1000 src[0] = ac_to_float(&ctx->ac, src[0]);
1001 LLVMValueRef results[2];
1002 LLVMValueRef in[3];
1003 for (unsigned chan = 0; chan < 3; chan++)
1004 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1005 results[0] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubesc",
1006 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1007 results[1] = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubetc",
1008 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1009 LLVMValueRef ma = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubema",
1010 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1011 results[0] = ac_build_fdiv(&ctx->ac, results[0], ma);
1012 results[1] = ac_build_fdiv(&ctx->ac, results[1], ma);
1013 LLVMValueRef offset = LLVMConstReal(ctx->ac.f32, 0.5);
1014 results[0] = LLVMBuildFAdd(ctx->ac.builder, results[0], offset, "");
1015 results[1] = LLVMBuildFAdd(ctx->ac.builder, results[1], offset, "");
1016 result = ac_build_gather_values(&ctx->ac, results, 2);
1017 break;
1018 }
1019
1020 case nir_op_cube_face_index: {
1021 src[0] = ac_to_float(&ctx->ac, src[0]);
1022 LLVMValueRef in[3];
1023 for (unsigned chan = 0; chan < 3; chan++)
1024 in[chan] = ac_llvm_extract_elem(&ctx->ac, src[0], chan);
1025 result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.cubeid",
1026 ctx->ac.f32, in, 3, AC_FUNC_ATTR_READNONE);
1027 break;
1028 }
1029
1030 case nir_op_fmin3:
1031 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1032 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1033 result = emit_intrin_2f_param(&ctx->ac, "llvm.minnum",
1034 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1035 break;
1036 case nir_op_umin3:
1037 result = ac_build_umin(&ctx->ac, src[0], src[1]);
1038 result = ac_build_umin(&ctx->ac, result, src[2]);
1039 break;
1040 case nir_op_imin3:
1041 result = ac_build_imin(&ctx->ac, src[0], src[1]);
1042 result = ac_build_imin(&ctx->ac, result, src[2]);
1043 break;
1044 case nir_op_fmax3:
1045 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1046 ac_to_float_type(&ctx->ac, def_type), src[0], src[1]);
1047 result = emit_intrin_2f_param(&ctx->ac, "llvm.maxnum",
1048 ac_to_float_type(&ctx->ac, def_type), result, src[2]);
1049 break;
1050 case nir_op_umax3:
1051 result = ac_build_umax(&ctx->ac, src[0], src[1]);
1052 result = ac_build_umax(&ctx->ac, result, src[2]);
1053 break;
1054 case nir_op_imax3:
1055 result = ac_build_imax(&ctx->ac, src[0], src[1]);
1056 result = ac_build_imax(&ctx->ac, result, src[2]);
1057 break;
1058 case nir_op_fmed3: {
1059 src[0] = ac_to_float(&ctx->ac, src[0]);
1060 src[1] = ac_to_float(&ctx->ac, src[1]);
1061 src[2] = ac_to_float(&ctx->ac, src[2]);
1062 result = ac_build_fmed3(&ctx->ac, src[0], src[1], src[2],
1063 instr->dest.dest.ssa.bit_size);
1064 break;
1065 }
1066 case nir_op_imed3: {
1067 LLVMValueRef tmp1 = ac_build_imin(&ctx->ac, src[0], src[1]);
1068 LLVMValueRef tmp2 = ac_build_imax(&ctx->ac, src[0], src[1]);
1069 tmp2 = ac_build_imin(&ctx->ac, tmp2, src[2]);
1070 result = ac_build_imax(&ctx->ac, tmp1, tmp2);
1071 break;
1072 }
1073 case nir_op_umed3: {
1074 LLVMValueRef tmp1 = ac_build_umin(&ctx->ac, src[0], src[1]);
1075 LLVMValueRef tmp2 = ac_build_umax(&ctx->ac, src[0], src[1]);
1076 tmp2 = ac_build_umin(&ctx->ac, tmp2, src[2]);
1077 result = ac_build_umax(&ctx->ac, tmp1, tmp2);
1078 break;
1079 }
1080
1081 default:
1082 fprintf(stderr, "Unknown NIR alu instr: ");
1083 nir_print_instr(&instr->instr, stderr);
1084 fprintf(stderr, "\n");
1085 abort();
1086 }
1087
1088 if (result) {
1089 assert(instr->dest.dest.is_ssa);
1090 result = ac_to_integer_or_pointer(&ctx->ac, result);
1091 ctx->ssa_defs[instr->dest.dest.ssa.index] = result;
1092 }
1093 }
1094
1095 static void visit_load_const(struct ac_nir_context *ctx,
1096 const nir_load_const_instr *instr)
1097 {
1098 LLVMValueRef values[4], value = NULL;
1099 LLVMTypeRef element_type =
1100 LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
1101
1102 for (unsigned i = 0; i < instr->def.num_components; ++i) {
1103 switch (instr->def.bit_size) {
1104 case 8:
1105 values[i] = LLVMConstInt(element_type,
1106 instr->value[i].u8, false);
1107 break;
1108 case 16:
1109 values[i] = LLVMConstInt(element_type,
1110 instr->value[i].u16, false);
1111 break;
1112 case 32:
1113 values[i] = LLVMConstInt(element_type,
1114 instr->value[i].u32, false);
1115 break;
1116 case 64:
1117 values[i] = LLVMConstInt(element_type,
1118 instr->value[i].u64, false);
1119 break;
1120 default:
1121 fprintf(stderr,
1122 "unsupported nir load_const bit_size: %d\n",
1123 instr->def.bit_size);
1124 abort();
1125 }
1126 }
1127 if (instr->def.num_components > 1) {
1128 value = LLVMConstVector(values, instr->def.num_components);
1129 } else
1130 value = values[0];
1131
1132 ctx->ssa_defs[instr->def.index] = value;
1133 }
1134
1135 static LLVMValueRef
1136 get_buffer_size(struct ac_nir_context *ctx, LLVMValueRef descriptor, bool in_elements)
1137 {
1138 LLVMValueRef size =
1139 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1140 LLVMConstInt(ctx->ac.i32, 2, false), "");
1141
1142 /* GFX8 only */
1143 if (ctx->ac.chip_class == GFX8 && in_elements) {
1144 /* On GFX8, the descriptor contains the size in bytes,
1145 * but TXQ must return the size in elements.
1146 * The stride is always non-zero for resources using TXQ.
1147 */
1148 LLVMValueRef stride =
1149 LLVMBuildExtractElement(ctx->ac.builder, descriptor,
1150 ctx->ac.i32_1, "");
1151 stride = LLVMBuildLShr(ctx->ac.builder, stride,
1152 LLVMConstInt(ctx->ac.i32, 16, false), "");
1153 stride = LLVMBuildAnd(ctx->ac.builder, stride,
1154 LLVMConstInt(ctx->ac.i32, 0x3fff, false), "");
1155
1156 size = LLVMBuildUDiv(ctx->ac.builder, size, stride, "");
1157 }
1158 return size;
1159 }
1160
1161 /* Gather4 should follow the same rules as bilinear filtering, but the hardware
1162 * incorrectly forces nearest filtering if the texture format is integer.
1163 * The only effect it has on Gather4, which always returns 4 texels for
1164 * bilinear filtering, is that the final coordinates are off by 0.5 of
1165 * the texel size.
1166 *
1167 * The workaround is to subtract 0.5 from the unnormalized coordinates,
1168 * or (0.5 / size) from the normalized coordinates.
1169 *
1170 * However, cube textures with 8_8_8_8 data formats require a different
1171 * workaround of overriding the num format to USCALED/SSCALED. This would lose
1172 * precision in 32-bit data formats, so it needs to be applied dynamically at
1173 * runtime. In this case, return an i1 value that indicates whether the
1174 * descriptor was overridden (and hence a fixup of the sampler result is needed).
1175 */
1176 static LLVMValueRef lower_gather4_integer(struct ac_llvm_context *ctx,
1177 nir_variable *var,
1178 struct ac_image_args *args,
1179 const nir_tex_instr *instr)
1180 {
1181 const struct glsl_type *type = glsl_without_array(var->type);
1182 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1183 LLVMValueRef wa_8888 = NULL;
1184 LLVMValueRef half_texel[2];
1185 LLVMValueRef result;
1186
1187 assert(stype == GLSL_TYPE_INT || stype == GLSL_TYPE_UINT);
1188
1189 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1190 LLVMValueRef formats;
1191 LLVMValueRef data_format;
1192 LLVMValueRef wa_formats;
1193
1194 formats = LLVMBuildExtractElement(ctx->builder, args->resource, ctx->i32_1, "");
1195
1196 data_format = LLVMBuildLShr(ctx->builder, formats,
1197 LLVMConstInt(ctx->i32, 20, false), "");
1198 data_format = LLVMBuildAnd(ctx->builder, data_format,
1199 LLVMConstInt(ctx->i32, (1u << 6) - 1, false), "");
1200 wa_8888 = LLVMBuildICmp(
1201 ctx->builder, LLVMIntEQ, data_format,
1202 LLVMConstInt(ctx->i32, V_008F14_IMG_DATA_FORMAT_8_8_8_8, false),
1203 "");
1204
1205 uint32_t wa_num_format =
1206 stype == GLSL_TYPE_UINT ?
1207 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_USCALED) :
1208 S_008F14_NUM_FORMAT(V_008F14_IMG_NUM_FORMAT_SSCALED);
1209 wa_formats = LLVMBuildAnd(ctx->builder, formats,
1210 LLVMConstInt(ctx->i32, C_008F14_NUM_FORMAT, false),
1211 "");
1212 wa_formats = LLVMBuildOr(ctx->builder, wa_formats,
1213 LLVMConstInt(ctx->i32, wa_num_format, false), "");
1214
1215 formats = LLVMBuildSelect(ctx->builder, wa_8888, wa_formats, formats, "");
1216 args->resource = LLVMBuildInsertElement(
1217 ctx->builder, args->resource, formats, ctx->i32_1, "");
1218 }
1219
1220 if (instr->sampler_dim == GLSL_SAMPLER_DIM_RECT) {
1221 assert(!wa_8888);
1222 half_texel[0] = half_texel[1] = LLVMConstReal(ctx->f32, -0.5);
1223 } else {
1224 struct ac_image_args resinfo = {};
1225 LLVMBasicBlockRef bbs[2];
1226
1227 LLVMValueRef unnorm = NULL;
1228 LLVMValueRef default_offset = ctx->f32_0;
1229 if (instr->sampler_dim == GLSL_SAMPLER_DIM_2D &&
1230 !instr->is_array) {
1231 /* In vulkan, whether the sampler uses unnormalized
1232 * coordinates or not is a dynamic property of the
1233 * sampler. Hence, to figure out whether or not we
1234 * need to divide by the texture size, we need to test
1235 * the sampler at runtime. This tests the bit set by
1236 * radv_init_sampler().
1237 */
1238 LLVMValueRef sampler0 =
1239 LLVMBuildExtractElement(ctx->builder, args->sampler, ctx->i32_0, "");
1240 sampler0 = LLVMBuildLShr(ctx->builder, sampler0,
1241 LLVMConstInt(ctx->i32, 15, false), "");
1242 sampler0 = LLVMBuildAnd(ctx->builder, sampler0, ctx->i32_1, "");
1243 unnorm = LLVMBuildICmp(ctx->builder, LLVMIntEQ, sampler0, ctx->i32_1, "");
1244 default_offset = LLVMConstReal(ctx->f32, -0.5);
1245 }
1246
1247 bbs[0] = LLVMGetInsertBlock(ctx->builder);
1248 if (wa_8888 || unnorm) {
1249 assert(!(wa_8888 && unnorm));
1250 LLVMValueRef not_needed = wa_8888 ? wa_8888 : unnorm;
1251 /* Skip the texture size query entirely if we don't need it. */
1252 ac_build_ifcc(ctx, LLVMBuildNot(ctx->builder, not_needed, ""), 2000);
1253 bbs[1] = LLVMGetInsertBlock(ctx->builder);
1254 }
1255
1256 /* Query the texture size. */
1257 resinfo.dim = ac_get_sampler_dim(ctx->chip_class, instr->sampler_dim, instr->is_array);
1258 resinfo.opcode = ac_image_get_resinfo;
1259 resinfo.dmask = 0xf;
1260 resinfo.lod = ctx->i32_0;
1261 resinfo.resource = args->resource;
1262 resinfo.attributes = AC_FUNC_ATTR_READNONE;
1263 LLVMValueRef size = ac_build_image_opcode(ctx, &resinfo);
1264
1265 /* Compute -0.5 / size. */
1266 for (unsigned c = 0; c < 2; c++) {
1267 half_texel[c] =
1268 LLVMBuildExtractElement(ctx->builder, size,
1269 LLVMConstInt(ctx->i32, c, 0), "");
1270 half_texel[c] = LLVMBuildUIToFP(ctx->builder, half_texel[c], ctx->f32, "");
1271 half_texel[c] = ac_build_fdiv(ctx, ctx->f32_1, half_texel[c]);
1272 half_texel[c] = LLVMBuildFMul(ctx->builder, half_texel[c],
1273 LLVMConstReal(ctx->f32, -0.5), "");
1274 }
1275
1276 if (wa_8888 || unnorm) {
1277 ac_build_endif(ctx, 2000);
1278
1279 for (unsigned c = 0; c < 2; c++) {
1280 LLVMValueRef values[2] = { default_offset, half_texel[c] };
1281 half_texel[c] = ac_build_phi(ctx, ctx->f32, 2,
1282 values, bbs);
1283 }
1284 }
1285 }
1286
1287 for (unsigned c = 0; c < 2; c++) {
1288 LLVMValueRef tmp;
1289 tmp = LLVMBuildBitCast(ctx->builder, args->coords[c], ctx->f32, "");
1290 args->coords[c] = LLVMBuildFAdd(ctx->builder, tmp, half_texel[c], "");
1291 }
1292
1293 args->attributes = AC_FUNC_ATTR_READNONE;
1294 result = ac_build_image_opcode(ctx, args);
1295
1296 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE) {
1297 LLVMValueRef tmp, tmp2;
1298
1299 /* if the cube workaround is in place, f2i the result. */
1300 for (unsigned c = 0; c < 4; c++) {
1301 tmp = LLVMBuildExtractElement(ctx->builder, result, LLVMConstInt(ctx->i32, c, false), "");
1302 if (stype == GLSL_TYPE_UINT)
1303 tmp2 = LLVMBuildFPToUI(ctx->builder, tmp, ctx->i32, "");
1304 else
1305 tmp2 = LLVMBuildFPToSI(ctx->builder, tmp, ctx->i32, "");
1306 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->i32, "");
1307 tmp2 = LLVMBuildBitCast(ctx->builder, tmp2, ctx->i32, "");
1308 tmp = LLVMBuildSelect(ctx->builder, wa_8888, tmp2, tmp, "");
1309 tmp = LLVMBuildBitCast(ctx->builder, tmp, ctx->f32, "");
1310 result = LLVMBuildInsertElement(ctx->builder, result, tmp, LLVMConstInt(ctx->i32, c, false), "");
1311 }
1312 }
1313 return result;
1314 }
1315
1316 static nir_deref_instr *get_tex_texture_deref(const nir_tex_instr *instr)
1317 {
1318 nir_deref_instr *texture_deref_instr = NULL;
1319
1320 for (unsigned i = 0; i < instr->num_srcs; i++) {
1321 switch (instr->src[i].src_type) {
1322 case nir_tex_src_texture_deref:
1323 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
1324 break;
1325 default:
1326 break;
1327 }
1328 }
1329 return texture_deref_instr;
1330 }
1331
1332 static LLVMValueRef build_tex_intrinsic(struct ac_nir_context *ctx,
1333 const nir_tex_instr *instr,
1334 struct ac_image_args *args)
1335 {
1336 if (instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
1337 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
1338
1339 return ac_build_buffer_load_format(&ctx->ac,
1340 args->resource,
1341 args->coords[0],
1342 ctx->ac.i32_0,
1343 util_last_bit(mask),
1344 0, true);
1345 }
1346
1347 args->opcode = ac_image_sample;
1348
1349 switch (instr->op) {
1350 case nir_texop_txf:
1351 case nir_texop_txf_ms:
1352 case nir_texop_samples_identical:
1353 args->opcode = args->level_zero ||
1354 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ?
1355 ac_image_load : ac_image_load_mip;
1356 args->level_zero = false;
1357 break;
1358 case nir_texop_txs:
1359 case nir_texop_query_levels:
1360 args->opcode = ac_image_get_resinfo;
1361 if (!args->lod)
1362 args->lod = ctx->ac.i32_0;
1363 args->level_zero = false;
1364 break;
1365 case nir_texop_tex:
1366 if (ctx->stage != MESA_SHADER_FRAGMENT) {
1367 assert(!args->lod);
1368 args->level_zero = true;
1369 }
1370 break;
1371 case nir_texop_tg4:
1372 args->opcode = ac_image_gather4;
1373 args->level_zero = true;
1374 break;
1375 case nir_texop_lod:
1376 args->opcode = ac_image_get_lod;
1377 break;
1378 default:
1379 break;
1380 }
1381
1382 if (instr->op == nir_texop_tg4 && ctx->ac.chip_class <= GFX8) {
1383 nir_deref_instr *texture_deref_instr = get_tex_texture_deref(instr);
1384 nir_variable *var = nir_deref_instr_get_variable(texture_deref_instr);
1385 const struct glsl_type *type = glsl_without_array(var->type);
1386 enum glsl_base_type stype = glsl_get_sampler_result_type(type);
1387 if (stype == GLSL_TYPE_UINT || stype == GLSL_TYPE_INT) {
1388 return lower_gather4_integer(&ctx->ac, var, args, instr);
1389 }
1390 }
1391
1392 /* Fixup for GFX9 which allocates 1D textures as 2D. */
1393 if (instr->op == nir_texop_lod && ctx->ac.chip_class == GFX9) {
1394 if ((args->dim == ac_image_2darray ||
1395 args->dim == ac_image_2d) && !args->coords[1]) {
1396 args->coords[1] = ctx->ac.i32_0;
1397 }
1398 }
1399
1400 args->attributes = AC_FUNC_ATTR_READNONE;
1401 bool cs_derivs = ctx->stage == MESA_SHADER_COMPUTE &&
1402 ctx->info->cs.derivative_group != DERIVATIVE_GROUP_NONE;
1403 if (ctx->stage == MESA_SHADER_FRAGMENT || cs_derivs) {
1404 /* Prevent texture instructions with implicit derivatives from being
1405 * sinked into branches. */
1406 switch (instr->op) {
1407 case nir_texop_tex:
1408 case nir_texop_txb:
1409 case nir_texop_lod:
1410 args->attributes |= AC_FUNC_ATTR_CONVERGENT;
1411 break;
1412 default:
1413 break;
1414 }
1415 }
1416
1417 return ac_build_image_opcode(&ctx->ac, args);
1418 }
1419
1420 static LLVMValueRef visit_vulkan_resource_reindex(struct ac_nir_context *ctx,
1421 nir_intrinsic_instr *instr)
1422 {
1423 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
1424 LLVMValueRef index = get_src(ctx, instr->src[1]);
1425
1426 LLVMValueRef result = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
1427 LLVMSetMetadata(result, ctx->ac.uniform_md_kind, ctx->ac.empty_md);
1428 return result;
1429 }
1430
1431 static LLVMValueRef visit_load_push_constant(struct ac_nir_context *ctx,
1432 nir_intrinsic_instr *instr)
1433 {
1434 LLVMValueRef ptr, addr;
1435 LLVMValueRef src0 = get_src(ctx, instr->src[0]);
1436 unsigned index = nir_intrinsic_base(instr);
1437
1438 addr = LLVMConstInt(ctx->ac.i32, index, 0);
1439 addr = LLVMBuildAdd(ctx->ac.builder, addr, src0, "");
1440
1441 /* Load constant values from user SGPRS when possible, otherwise
1442 * fallback to the default path that loads directly from memory.
1443 */
1444 if (LLVMIsConstant(src0) &&
1445 instr->dest.ssa.bit_size == 32) {
1446 unsigned count = instr->dest.ssa.num_components;
1447 unsigned offset = index;
1448
1449 offset += LLVMConstIntGetZExtValue(src0);
1450 offset /= 4;
1451
1452 offset -= ctx->args->base_inline_push_consts;
1453
1454 unsigned num_inline_push_consts = ctx->args->num_inline_push_consts;
1455 if (offset + count <= num_inline_push_consts) {
1456 LLVMValueRef push_constants[num_inline_push_consts];
1457 for (unsigned i = 0; i < num_inline_push_consts; i++)
1458 push_constants[i] = ac_get_arg(&ctx->ac,
1459 ctx->args->inline_push_consts[i]);
1460 return ac_build_gather_values(&ctx->ac,
1461 push_constants + offset,
1462 count);
1463 }
1464 }
1465
1466 ptr = LLVMBuildGEP(ctx->ac.builder,
1467 ac_get_arg(&ctx->ac, ctx->args->push_constants), &addr, 1, "");
1468
1469 if (instr->dest.ssa.bit_size == 8) {
1470 unsigned load_dwords = instr->dest.ssa.num_components > 1 ? 2 : 1;
1471 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), 4 * load_dwords);
1472 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1473 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1474
1475 LLVMValueRef params[3];
1476 if (load_dwords > 1) {
1477 LLVMValueRef res_vec = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(ctx->ac.i32, 2), "");
1478 params[0] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 1, false), "");
1479 params[1] = LLVMBuildExtractElement(ctx->ac.builder, res_vec, LLVMConstInt(ctx->ac.i32, 0, false), "");
1480 } else {
1481 res = LLVMBuildBitCast(ctx->ac.builder, res, ctx->ac.i32, "");
1482 params[0] = ctx->ac.i32_0;
1483 params[1] = res;
1484 }
1485 params[2] = addr;
1486 res = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.alignbyte", ctx->ac.i32, params, 3, 0);
1487
1488 res = LLVMBuildTrunc(ctx->ac.builder, res, LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.num_components * 8), "");
1489 if (instr->dest.ssa.num_components > 1)
1490 res = LLVMBuildBitCast(ctx->ac.builder, res, LLVMVectorType(LLVMInt8TypeInContext(ctx->ac.context), instr->dest.ssa.num_components), "");
1491 return res;
1492 } else if (instr->dest.ssa.bit_size == 16) {
1493 unsigned load_dwords = instr->dest.ssa.num_components / 2 + 1;
1494 LLVMTypeRef vec_type = LLVMVectorType(LLVMInt16TypeInContext(ctx->ac.context), 2 * load_dwords);
1495 ptr = ac_cast_ptr(&ctx->ac, ptr, vec_type);
1496 LLVMValueRef res = LLVMBuildLoad(ctx->ac.builder, ptr, "");
1497 res = LLVMBuildBitCast(ctx->ac.builder, res, vec_type, "");
1498 LLVMValueRef cond = LLVMBuildLShr(ctx->ac.builder, addr, ctx->ac.i32_1, "");
1499 cond = LLVMBuildTrunc(ctx->ac.builder, cond, ctx->ac.i1, "");
1500 LLVMValueRef mask[] = { LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
1501 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
1502 LLVMConstInt(ctx->ac.i32, 4, false)};
1503 LLVMValueRef swizzle_aligned = LLVMConstVector(&mask[0], instr->dest.ssa.num_components);
1504 LLVMValueRef swizzle_unaligned = LLVMConstVector(&mask[1], instr->dest.ssa.num_components);
1505 LLVMValueRef shuffle_aligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_aligned, "");
1506 LLVMValueRef shuffle_unaligned = LLVMBuildShuffleVector(ctx->ac.builder, res, res, swizzle_unaligned, "");
1507 res = LLVMBuildSelect(ctx->ac.builder, cond, shuffle_unaligned, shuffle_aligned, "");
1508 return LLVMBuildBitCast(ctx->ac.builder, res, get_def_type(ctx, &instr->dest.ssa), "");
1509 }
1510
1511 ptr = ac_cast_ptr(&ctx->ac, ptr, get_def_type(ctx, &instr->dest.ssa));
1512
1513 return LLVMBuildLoad(ctx->ac.builder, ptr, "");
1514 }
1515
1516 static LLVMValueRef visit_get_buffer_size(struct ac_nir_context *ctx,
1517 const nir_intrinsic_instr *instr)
1518 {
1519 LLVMValueRef index = get_src(ctx, instr->src[0]);
1520
1521 return get_buffer_size(ctx, ctx->abi->load_ssbo(ctx->abi, index, false), false);
1522 }
1523
1524 static uint32_t widen_mask(uint32_t mask, unsigned multiplier)
1525 {
1526 uint32_t new_mask = 0;
1527 for(unsigned i = 0; i < 32 && (1u << i) <= mask; ++i)
1528 if (mask & (1u << i))
1529 new_mask |= ((1u << multiplier) - 1u) << (i * multiplier);
1530 return new_mask;
1531 }
1532
1533 static LLVMValueRef extract_vector_range(struct ac_llvm_context *ctx, LLVMValueRef src,
1534 unsigned start, unsigned count)
1535 {
1536 LLVMValueRef mask[] = {
1537 ctx->i32_0, ctx->i32_1,
1538 LLVMConstInt(ctx->i32, 2, false), LLVMConstInt(ctx->i32, 3, false) };
1539
1540 unsigned src_elements = ac_get_llvm_num_components(src);
1541
1542 if (count == src_elements) {
1543 assert(start == 0);
1544 return src;
1545 } else if (count == 1) {
1546 assert(start < src_elements);
1547 return LLVMBuildExtractElement(ctx->builder, src, mask[start], "");
1548 } else {
1549 assert(start + count <= src_elements);
1550 assert(count <= 4);
1551 LLVMValueRef swizzle = LLVMConstVector(&mask[start], count);
1552 return LLVMBuildShuffleVector(ctx->builder, src, src, swizzle, "");
1553 }
1554 }
1555
1556 static unsigned get_cache_policy(struct ac_nir_context *ctx,
1557 enum gl_access_qualifier access,
1558 bool may_store_unaligned,
1559 bool writeonly_memory)
1560 {
1561 unsigned cache_policy = 0;
1562
1563 /* GFX6 has a TC L1 bug causing corruption of 8bit/16bit stores. All
1564 * store opcodes not aligned to a dword are affected. The only way to
1565 * get unaligned stores is through shader images.
1566 */
1567 if (((may_store_unaligned && ctx->ac.chip_class == GFX6) ||
1568 /* If this is write-only, don't keep data in L1 to prevent
1569 * evicting L1 cache lines that may be needed by other
1570 * instructions.
1571 */
1572 writeonly_memory ||
1573 access & (ACCESS_COHERENT | ACCESS_VOLATILE))) {
1574 cache_policy |= ac_glc;
1575 }
1576
1577 if (access & ACCESS_STREAM_CACHE_POLICY)
1578 cache_policy |= ac_slc;
1579
1580 return cache_policy;
1581 }
1582
1583 static void visit_store_ssbo(struct ac_nir_context *ctx,
1584 nir_intrinsic_instr *instr)
1585 {
1586 LLVMValueRef src_data = get_src(ctx, instr->src[0]);
1587 int elem_size_bytes = ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src_data)) / 8;
1588 unsigned writemask = nir_intrinsic_write_mask(instr);
1589 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1590 bool writeonly_memory = access & ACCESS_NON_READABLE;
1591 unsigned cache_policy = get_cache_policy(ctx, access, false, writeonly_memory);
1592
1593 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1594 get_src(ctx, instr->src[1]), true);
1595 LLVMValueRef base_data = src_data;
1596 base_data = ac_trim_vector(&ctx->ac, base_data, instr->num_components);
1597 LLVMValueRef base_offset = get_src(ctx, instr->src[2]);
1598
1599 while (writemask) {
1600 int start, count;
1601 LLVMValueRef data, offset;
1602 LLVMTypeRef data_type;
1603
1604 u_bit_scan_consecutive_range(&writemask, &start, &count);
1605
1606 /* Due to an LLVM limitation with LLVM < 9, split 3-element
1607 * writes into a 2-element and a 1-element write. */
1608 if (count == 3 &&
1609 (elem_size_bytes != 4 || !ac_has_vec3_support(ctx->ac.chip_class, false))) {
1610 writemask |= 1 << (start + 2);
1611 count = 2;
1612 }
1613 int num_bytes = count * elem_size_bytes; /* count in bytes */
1614
1615 /* we can only store 4 DWords at the same time.
1616 * can only happen for 64 Bit vectors. */
1617 if (num_bytes > 16) {
1618 writemask |= ((1u << (count - 2)) - 1u) << (start + 2);
1619 count = 2;
1620 num_bytes = 16;
1621 }
1622
1623 /* check alignment of 16 Bit stores */
1624 if (elem_size_bytes == 2 && num_bytes > 2 && (start % 2) == 1) {
1625 writemask |= ((1u << (count - 1)) - 1u) << (start + 1);
1626 count = 1;
1627 num_bytes = 2;
1628 }
1629 data = extract_vector_range(&ctx->ac, base_data, start, count);
1630
1631 offset = LLVMBuildAdd(ctx->ac.builder, base_offset,
1632 LLVMConstInt(ctx->ac.i32, start * elem_size_bytes, false), "");
1633
1634 if (num_bytes == 1) {
1635 ac_build_tbuffer_store_byte(&ctx->ac, rsrc, data,
1636 offset, ctx->ac.i32_0,
1637 cache_policy);
1638 } else if (num_bytes == 2) {
1639 ac_build_tbuffer_store_short(&ctx->ac, rsrc, data,
1640 offset, ctx->ac.i32_0,
1641 cache_policy);
1642 } else {
1643 int num_channels = num_bytes / 4;
1644
1645 switch (num_bytes) {
1646 case 16: /* v4f32 */
1647 data_type = ctx->ac.v4f32;
1648 break;
1649 case 12: /* v3f32 */
1650 data_type = ctx->ac.v3f32;
1651 break;
1652 case 8: /* v2f32 */
1653 data_type = ctx->ac.v2f32;
1654 break;
1655 case 4: /* f32 */
1656 data_type = ctx->ac.f32;
1657 break;
1658 default:
1659 unreachable("Malformed vector store.");
1660 }
1661 data = LLVMBuildBitCast(ctx->ac.builder, data, data_type, "");
1662
1663 ac_build_buffer_store_dword(&ctx->ac, rsrc, data,
1664 num_channels, offset,
1665 ctx->ac.i32_0, 0,
1666 cache_policy);
1667 }
1668 }
1669 }
1670
1671 static LLVMValueRef emit_ssbo_comp_swap_64(struct ac_nir_context *ctx,
1672 LLVMValueRef descriptor,
1673 LLVMValueRef offset,
1674 LLVMValueRef compare,
1675 LLVMValueRef exchange)
1676 {
1677 LLVMBasicBlockRef start_block = NULL, then_block = NULL;
1678 if (ctx->abi->robust_buffer_access) {
1679 LLVMValueRef size = ac_llvm_extract_elem(&ctx->ac, descriptor, 2);
1680
1681 LLVMValueRef cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntULT, offset, size, "");
1682 start_block = LLVMGetInsertBlock(ctx->ac.builder);
1683
1684 ac_build_ifcc(&ctx->ac, cond, -1);
1685
1686 then_block = LLVMGetInsertBlock(ctx->ac.builder);
1687 }
1688
1689 LLVMValueRef ptr_parts[2] = {
1690 ac_llvm_extract_elem(&ctx->ac, descriptor, 0),
1691 LLVMBuildAnd(ctx->ac.builder,
1692 ac_llvm_extract_elem(&ctx->ac, descriptor, 1),
1693 LLVMConstInt(ctx->ac.i32, 65535, 0), "")
1694 };
1695
1696 ptr_parts[1] = LLVMBuildTrunc(ctx->ac.builder, ptr_parts[1], ctx->ac.i16, "");
1697 ptr_parts[1] = LLVMBuildSExt(ctx->ac.builder, ptr_parts[1], ctx->ac.i32, "");
1698
1699 offset = LLVMBuildZExt(ctx->ac.builder, offset, ctx->ac.i64, "");
1700
1701 LLVMValueRef ptr = ac_build_gather_values(&ctx->ac, ptr_parts, 2);
1702 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr, ctx->ac.i64, "");
1703 ptr = LLVMBuildAdd(ctx->ac.builder, ptr, offset, "");
1704 ptr = LLVMBuildIntToPtr(ctx->ac.builder, ptr, LLVMPointerType(ctx->ac.i64, AC_ADDR_SPACE_GLOBAL), "");
1705
1706 LLVMValueRef result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, compare, exchange, "singlethread-one-as");
1707 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
1708
1709 if (ctx->abi->robust_buffer_access) {
1710 ac_build_endif(&ctx->ac, -1);
1711
1712 LLVMBasicBlockRef incoming_blocks[2] = {
1713 start_block,
1714 then_block,
1715 };
1716
1717 LLVMValueRef incoming_values[2] = {
1718 LLVMConstInt(ctx->ac.i64, 0, 0),
1719 result,
1720 };
1721 LLVMValueRef ret = LLVMBuildPhi(ctx->ac.builder, ctx->ac.i64, "");
1722 LLVMAddIncoming(ret, incoming_values, incoming_blocks, 2);
1723 return ret;
1724 } else {
1725 return result;
1726 }
1727 }
1728
1729 static LLVMValueRef visit_atomic_ssbo(struct ac_nir_context *ctx,
1730 const nir_intrinsic_instr *instr)
1731 {
1732 LLVMTypeRef return_type = LLVMTypeOf(get_src(ctx, instr->src[2]));
1733 const char *op;
1734 char name[64], type[8];
1735 LLVMValueRef params[6], descriptor;
1736 int arg_count = 0;
1737
1738 switch (instr->intrinsic) {
1739 case nir_intrinsic_ssbo_atomic_add:
1740 op = "add";
1741 break;
1742 case nir_intrinsic_ssbo_atomic_imin:
1743 op = "smin";
1744 break;
1745 case nir_intrinsic_ssbo_atomic_umin:
1746 op = "umin";
1747 break;
1748 case nir_intrinsic_ssbo_atomic_imax:
1749 op = "smax";
1750 break;
1751 case nir_intrinsic_ssbo_atomic_umax:
1752 op = "umax";
1753 break;
1754 case nir_intrinsic_ssbo_atomic_and:
1755 op = "and";
1756 break;
1757 case nir_intrinsic_ssbo_atomic_or:
1758 op = "or";
1759 break;
1760 case nir_intrinsic_ssbo_atomic_xor:
1761 op = "xor";
1762 break;
1763 case nir_intrinsic_ssbo_atomic_exchange:
1764 op = "swap";
1765 break;
1766 case nir_intrinsic_ssbo_atomic_comp_swap:
1767 op = "cmpswap";
1768 break;
1769 default:
1770 abort();
1771 }
1772
1773 descriptor = ctx->abi->load_ssbo(ctx->abi,
1774 get_src(ctx, instr->src[0]),
1775 true);
1776
1777 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap &&
1778 return_type == ctx->ac.i64) {
1779 return emit_ssbo_comp_swap_64(ctx, descriptor,
1780 get_src(ctx, instr->src[1]),
1781 get_src(ctx, instr->src[2]),
1782 get_src(ctx, instr->src[3]));
1783 }
1784 if (instr->intrinsic == nir_intrinsic_ssbo_atomic_comp_swap) {
1785 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[3]), 0);
1786 }
1787 params[arg_count++] = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
1788 params[arg_count++] = descriptor;
1789
1790 if (LLVM_VERSION_MAJOR >= 9) {
1791 /* XXX: The new raw/struct atomic intrinsics are buggy with
1792 * LLVM 8, see r358579.
1793 */
1794 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1795 params[arg_count++] = ctx->ac.i32_0; /* soffset */
1796 params[arg_count++] = ctx->ac.i32_0; /* slc */
1797
1798 ac_build_type_name_for_intr(return_type, type, sizeof(type));
1799 snprintf(name, sizeof(name),
1800 "llvm.amdgcn.raw.buffer.atomic.%s.%s", op, type);
1801 } else {
1802 params[arg_count++] = ctx->ac.i32_0; /* vindex */
1803 params[arg_count++] = get_src(ctx, instr->src[1]); /* voffset */
1804 params[arg_count++] = ctx->ac.i1false; /* slc */
1805
1806 assert(return_type == ctx->ac.i32);
1807 snprintf(name, sizeof(name),
1808 "llvm.amdgcn.buffer.atomic.%s", op);
1809 }
1810
1811 return ac_build_intrinsic(&ctx->ac, name, return_type, params,
1812 arg_count, 0);
1813 }
1814
1815 static LLVMValueRef visit_load_buffer(struct ac_nir_context *ctx,
1816 const nir_intrinsic_instr *instr)
1817 {
1818 int elem_size_bytes = instr->dest.ssa.bit_size / 8;
1819 int num_components = instr->num_components;
1820 enum gl_access_qualifier access = nir_intrinsic_access(instr);
1821 unsigned cache_policy = get_cache_policy(ctx, access, false, false);
1822
1823 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1824 LLVMValueRef rsrc = ctx->abi->load_ssbo(ctx->abi,
1825 get_src(ctx, instr->src[0]), false);
1826 LLVMValueRef vindex = ctx->ac.i32_0;
1827
1828 LLVMTypeRef def_type = get_def_type(ctx, &instr->dest.ssa);
1829 LLVMTypeRef def_elem_type = num_components > 1 ? LLVMGetElementType(def_type) : def_type;
1830
1831 LLVMValueRef results[4];
1832 for (int i = 0; i < num_components;) {
1833 int num_elems = num_components - i;
1834 if (elem_size_bytes < 4 && nir_intrinsic_align(instr) % 4 != 0)
1835 num_elems = 1;
1836 if (num_elems * elem_size_bytes > 16)
1837 num_elems = 16 / elem_size_bytes;
1838 int load_bytes = num_elems * elem_size_bytes;
1839
1840 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32, i * elem_size_bytes, false);
1841
1842 LLVMValueRef ret;
1843
1844 if (load_bytes == 1) {
1845 ret = ac_build_tbuffer_load_byte(&ctx->ac,
1846 rsrc,
1847 offset,
1848 ctx->ac.i32_0,
1849 immoffset,
1850 cache_policy);
1851 } else if (load_bytes == 2) {
1852 ret = ac_build_tbuffer_load_short(&ctx->ac,
1853 rsrc,
1854 offset,
1855 ctx->ac.i32_0,
1856 immoffset,
1857 cache_policy);
1858 } else {
1859 int num_channels = util_next_power_of_two(load_bytes) / 4;
1860 bool can_speculate = access & ACCESS_CAN_REORDER;
1861
1862 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_channels,
1863 vindex, offset, immoffset, 0,
1864 cache_policy, can_speculate, false);
1865 }
1866
1867 LLVMTypeRef byte_vec = LLVMVectorType(ctx->ac.i8, ac_get_type_size(LLVMTypeOf(ret)));
1868 ret = LLVMBuildBitCast(ctx->ac.builder, ret, byte_vec, "");
1869 ret = ac_trim_vector(&ctx->ac, ret, load_bytes);
1870
1871 LLVMTypeRef ret_type = LLVMVectorType(def_elem_type, num_elems);
1872 ret = LLVMBuildBitCast(ctx->ac.builder, ret, ret_type, "");
1873
1874 for (unsigned j = 0; j < num_elems; j++) {
1875 results[i + j] = LLVMBuildExtractElement(ctx->ac.builder, ret, LLVMConstInt(ctx->ac.i32, j, false), "");
1876 }
1877 i += num_elems;
1878 }
1879
1880 return ac_build_gather_values(&ctx->ac, results, num_components);
1881 }
1882
1883 static LLVMValueRef visit_load_ubo_buffer(struct ac_nir_context *ctx,
1884 const nir_intrinsic_instr *instr)
1885 {
1886 LLVMValueRef ret;
1887 LLVMValueRef rsrc = get_src(ctx, instr->src[0]);
1888 LLVMValueRef offset = get_src(ctx, instr->src[1]);
1889 int num_components = instr->num_components;
1890
1891 if (ctx->abi->load_ubo)
1892 rsrc = ctx->abi->load_ubo(ctx->abi, rsrc);
1893
1894 if (instr->dest.ssa.bit_size == 64)
1895 num_components *= 2;
1896
1897 if (instr->dest.ssa.bit_size == 16 || instr->dest.ssa.bit_size == 8) {
1898 unsigned load_bytes = instr->dest.ssa.bit_size / 8;
1899 LLVMValueRef results[num_components];
1900 for (unsigned i = 0; i < num_components; ++i) {
1901 LLVMValueRef immoffset = LLVMConstInt(ctx->ac.i32,
1902 load_bytes * i, 0);
1903
1904 if (load_bytes == 1) {
1905 results[i] = ac_build_tbuffer_load_byte(&ctx->ac,
1906 rsrc,
1907 offset,
1908 ctx->ac.i32_0,
1909 immoffset,
1910 0);
1911 } else {
1912 assert(load_bytes == 2);
1913 results[i] = ac_build_tbuffer_load_short(&ctx->ac,
1914 rsrc,
1915 offset,
1916 ctx->ac.i32_0,
1917 immoffset,
1918 0);
1919 }
1920 }
1921 ret = ac_build_gather_values(&ctx->ac, results, num_components);
1922 } else {
1923 ret = ac_build_buffer_load(&ctx->ac, rsrc, num_components, NULL, offset,
1924 NULL, 0, 0, true, true);
1925
1926 ret = ac_trim_vector(&ctx->ac, ret, num_components);
1927 }
1928
1929 return LLVMBuildBitCast(ctx->ac.builder, ret,
1930 get_def_type(ctx, &instr->dest.ssa), "");
1931 }
1932
1933 static void
1934 get_deref_offset(struct ac_nir_context *ctx, nir_deref_instr *instr,
1935 bool vs_in, unsigned *vertex_index_out,
1936 LLVMValueRef *vertex_index_ref,
1937 unsigned *const_out, LLVMValueRef *indir_out)
1938 {
1939 nir_variable *var = nir_deref_instr_get_variable(instr);
1940 nir_deref_path path;
1941 unsigned idx_lvl = 1;
1942
1943 nir_deref_path_init(&path, instr, NULL);
1944
1945 if (vertex_index_out != NULL || vertex_index_ref != NULL) {
1946 if (vertex_index_ref) {
1947 *vertex_index_ref = get_src(ctx, path.path[idx_lvl]->arr.index);
1948 if (vertex_index_out)
1949 *vertex_index_out = 0;
1950 } else {
1951 *vertex_index_out = nir_src_as_uint(path.path[idx_lvl]->arr.index);
1952 }
1953 ++idx_lvl;
1954 }
1955
1956 uint32_t const_offset = 0;
1957 LLVMValueRef offset = NULL;
1958
1959 if (var->data.compact) {
1960 assert(instr->deref_type == nir_deref_type_array);
1961 const_offset = nir_src_as_uint(instr->arr.index);
1962 goto out;
1963 }
1964
1965 for (; path.path[idx_lvl]; ++idx_lvl) {
1966 const struct glsl_type *parent_type = path.path[idx_lvl - 1]->type;
1967 if (path.path[idx_lvl]->deref_type == nir_deref_type_struct) {
1968 unsigned index = path.path[idx_lvl]->strct.index;
1969
1970 for (unsigned i = 0; i < index; i++) {
1971 const struct glsl_type *ft = glsl_get_struct_field(parent_type, i);
1972 const_offset += glsl_count_attribute_slots(ft, vs_in);
1973 }
1974 } else if(path.path[idx_lvl]->deref_type == nir_deref_type_array) {
1975 unsigned size = glsl_count_attribute_slots(path.path[idx_lvl]->type, vs_in);
1976 if (nir_src_is_const(path.path[idx_lvl]->arr.index)) {
1977 const_offset += size *
1978 nir_src_as_uint(path.path[idx_lvl]->arr.index);
1979 } else {
1980 LLVMValueRef array_off = LLVMBuildMul(ctx->ac.builder, LLVMConstInt(ctx->ac.i32, size, 0),
1981 get_src(ctx, path.path[idx_lvl]->arr.index), "");
1982 if (offset)
1983 offset = LLVMBuildAdd(ctx->ac.builder, offset, array_off, "");
1984 else
1985 offset = array_off;
1986 }
1987 } else
1988 unreachable("Uhandled deref type in get_deref_instr_offset");
1989 }
1990
1991 out:
1992 nir_deref_path_finish(&path);
1993
1994 if (const_offset && offset)
1995 offset = LLVMBuildAdd(ctx->ac.builder, offset,
1996 LLVMConstInt(ctx->ac.i32, const_offset, 0),
1997 "");
1998
1999 *const_out = const_offset;
2000 *indir_out = offset;
2001 }
2002
2003 static LLVMValueRef load_tess_varyings(struct ac_nir_context *ctx,
2004 nir_intrinsic_instr *instr,
2005 bool load_inputs)
2006 {
2007 LLVMValueRef result;
2008 LLVMValueRef vertex_index = NULL;
2009 LLVMValueRef indir_index = NULL;
2010 unsigned const_index = 0;
2011
2012 nir_variable *var = nir_deref_instr_get_variable(nir_instr_as_deref(instr->src[0].ssa->parent_instr));
2013
2014 unsigned location = var->data.location;
2015 unsigned driver_location = var->data.driver_location;
2016 const bool is_patch = var->data.patch ||
2017 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2018 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2019 const bool is_compact = var->data.compact;
2020
2021 get_deref_offset(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2022 false, NULL, is_patch ? NULL : &vertex_index,
2023 &const_index, &indir_index);
2024
2025 LLVMTypeRef dest_type = get_def_type(ctx, &instr->dest.ssa);
2026
2027 LLVMTypeRef src_component_type;
2028 if (LLVMGetTypeKind(dest_type) == LLVMVectorTypeKind)
2029 src_component_type = LLVMGetElementType(dest_type);
2030 else
2031 src_component_type = dest_type;
2032
2033 result = ctx->abi->load_tess_varyings(ctx->abi, src_component_type,
2034 vertex_index, indir_index,
2035 const_index, location, driver_location,
2036 var->data.location_frac,
2037 instr->num_components,
2038 is_patch, is_compact, load_inputs);
2039 if (instr->dest.ssa.bit_size == 16) {
2040 result = ac_to_integer(&ctx->ac, result);
2041 result = LLVMBuildTrunc(ctx->ac.builder, result, dest_type, "");
2042 }
2043 return LLVMBuildBitCast(ctx->ac.builder, result, dest_type, "");
2044 }
2045
2046 static unsigned
2047 type_scalar_size_bytes(const struct glsl_type *type)
2048 {
2049 assert(glsl_type_is_vector_or_scalar(type) ||
2050 glsl_type_is_matrix(type));
2051 return glsl_type_is_boolean(type) ? 4 : glsl_get_bit_size(type) / 8;
2052 }
2053
2054 static LLVMValueRef visit_load_var(struct ac_nir_context *ctx,
2055 nir_intrinsic_instr *instr)
2056 {
2057 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2058 nir_variable *var = nir_deref_instr_get_variable(deref);
2059
2060 LLVMValueRef values[8];
2061 int idx = 0;
2062 int ve = instr->dest.ssa.num_components;
2063 unsigned comp = 0;
2064 LLVMValueRef indir_index;
2065 LLVMValueRef ret;
2066 unsigned const_index;
2067 unsigned stride = 4;
2068 int mode = deref->mode;
2069
2070 if (var) {
2071 bool vs_in = ctx->stage == MESA_SHADER_VERTEX &&
2072 var->data.mode == nir_var_shader_in;
2073 idx = var->data.driver_location;
2074 comp = var->data.location_frac;
2075 mode = var->data.mode;
2076
2077 get_deref_offset(ctx, deref, vs_in, NULL, NULL,
2078 &const_index, &indir_index);
2079
2080 if (var->data.compact) {
2081 stride = 1;
2082 const_index += comp;
2083 comp = 0;
2084 }
2085 }
2086
2087 if (instr->dest.ssa.bit_size == 64 &&
2088 (deref->mode == nir_var_shader_in ||
2089 deref->mode == nir_var_shader_out ||
2090 deref->mode == nir_var_function_temp))
2091 ve *= 2;
2092
2093 switch (mode) {
2094 case nir_var_shader_in:
2095 if (ctx->stage == MESA_SHADER_TESS_CTRL ||
2096 ctx->stage == MESA_SHADER_TESS_EVAL) {
2097 return load_tess_varyings(ctx, instr, true);
2098 }
2099
2100 if (ctx->stage == MESA_SHADER_GEOMETRY) {
2101 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
2102 LLVMValueRef indir_index;
2103 unsigned const_index, vertex_index;
2104 get_deref_offset(ctx, deref, false, &vertex_index, NULL,
2105 &const_index, &indir_index);
2106 assert(indir_index == NULL);
2107
2108 return ctx->abi->load_inputs(ctx->abi, var->data.location,
2109 var->data.driver_location,
2110 var->data.location_frac,
2111 instr->num_components, vertex_index, const_index, type);
2112 }
2113
2114 for (unsigned chan = comp; chan < ve + comp; chan++) {
2115 if (indir_index) {
2116 unsigned count = glsl_count_attribute_slots(
2117 var->type,
2118 ctx->stage == MESA_SHADER_VERTEX);
2119 count -= chan / 4;
2120 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2121 &ctx->ac, ctx->abi->inputs + idx + chan, count,
2122 stride, false, true);
2123
2124 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2125 tmp_vec,
2126 indir_index, "");
2127 } else
2128 values[chan] = ctx->abi->inputs[idx + chan + const_index * stride];
2129 }
2130 break;
2131 case nir_var_function_temp:
2132 for (unsigned chan = 0; chan < ve; chan++) {
2133 if (indir_index) {
2134 unsigned count = glsl_count_attribute_slots(
2135 var->type, false);
2136 count -= chan / 4;
2137 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2138 &ctx->ac, ctx->locals + idx + chan, count,
2139 stride, true, true);
2140
2141 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2142 tmp_vec,
2143 indir_index, "");
2144 } else {
2145 values[chan] = LLVMBuildLoad(ctx->ac.builder, ctx->locals[idx + chan + const_index * stride], "");
2146 }
2147 }
2148 break;
2149 case nir_var_shader_out:
2150 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2151 return load_tess_varyings(ctx, instr, false);
2152 }
2153
2154 if (ctx->stage == MESA_SHADER_FRAGMENT &&
2155 var->data.fb_fetch_output &&
2156 ctx->abi->emit_fbfetch)
2157 return ctx->abi->emit_fbfetch(ctx->abi);
2158
2159 for (unsigned chan = comp; chan < ve + comp; chan++) {
2160 if (indir_index) {
2161 unsigned count = glsl_count_attribute_slots(
2162 var->type, false);
2163 count -= chan / 4;
2164 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2165 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2166 stride, true, true);
2167
2168 values[chan] = LLVMBuildExtractElement(ctx->ac.builder,
2169 tmp_vec,
2170 indir_index, "");
2171 } else {
2172 values[chan] = LLVMBuildLoad(ctx->ac.builder,
2173 ctx->abi->outputs[idx + chan + const_index * stride],
2174 "");
2175 }
2176 }
2177 break;
2178 case nir_var_mem_global: {
2179 LLVMValueRef address = get_src(ctx, instr->src[0]);
2180 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2181 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2182 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2183
2184 LLVMTypeRef result_type = get_def_type(ctx, &instr->dest.ssa);
2185 if (stride != natural_stride) {
2186 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(result_type),
2187 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2188 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2189
2190 for (unsigned i = 0; i < instr->dest.ssa.num_components; ++i) {
2191 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, i * stride / natural_stride, 0);
2192 values[i] = LLVMBuildLoad(ctx->ac.builder,
2193 ac_build_gep_ptr(&ctx->ac, address, offset), "");
2194 }
2195 return ac_build_gather_values(&ctx->ac, values, instr->dest.ssa.num_components);
2196 } else {
2197 LLVMTypeRef ptr_type = LLVMPointerType(result_type,
2198 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2199 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2200 LLVMValueRef val = LLVMBuildLoad(ctx->ac.builder, address, "");
2201 return val;
2202 }
2203 }
2204 default:
2205 unreachable("unhandle variable mode");
2206 }
2207 ret = ac_build_varying_gather_values(&ctx->ac, values, ve, comp);
2208 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2209 }
2210
2211 static void
2212 visit_store_var(struct ac_nir_context *ctx,
2213 nir_intrinsic_instr *instr)
2214 {
2215 nir_deref_instr *deref = nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2216 nir_variable *var = nir_deref_instr_get_variable(deref);
2217
2218 LLVMValueRef temp_ptr, value;
2219 int idx = 0;
2220 unsigned comp = 0;
2221 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[1]));
2222 int writemask = instr->const_index[0];
2223 LLVMValueRef indir_index;
2224 unsigned const_index;
2225
2226 if (var) {
2227 get_deref_offset(ctx, deref, false,
2228 NULL, NULL, &const_index, &indir_index);
2229 idx = var->data.driver_location;
2230 comp = var->data.location_frac;
2231
2232 if (var->data.compact) {
2233 const_index += comp;
2234 comp = 0;
2235 }
2236 }
2237
2238 if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src)) == 64 &&
2239 (deref->mode == nir_var_shader_out ||
2240 deref->mode == nir_var_function_temp)) {
2241
2242 src = LLVMBuildBitCast(ctx->ac.builder, src,
2243 LLVMVectorType(ctx->ac.f32, ac_get_llvm_num_components(src) * 2),
2244 "");
2245
2246 writemask = widen_mask(writemask, 2);
2247 }
2248
2249 writemask = writemask << comp;
2250
2251 switch (deref->mode) {
2252 case nir_var_shader_out:
2253
2254 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
2255 LLVMValueRef vertex_index = NULL;
2256 LLVMValueRef indir_index = NULL;
2257 unsigned const_index = 0;
2258 const bool is_patch = var->data.patch ||
2259 var->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
2260 var->data.location == VARYING_SLOT_TESS_LEVEL_OUTER;
2261
2262 get_deref_offset(ctx, deref, false, NULL,
2263 is_patch ? NULL : &vertex_index,
2264 &const_index, &indir_index);
2265
2266 ctx->abi->store_tcs_outputs(ctx->abi, var,
2267 vertex_index, indir_index,
2268 const_index, src, writemask);
2269 return;
2270 }
2271
2272 for (unsigned chan = 0; chan < 8; chan++) {
2273 int stride = 4;
2274 if (!(writemask & (1 << chan)))
2275 continue;
2276
2277 value = ac_llvm_extract_elem(&ctx->ac, src, chan - comp);
2278
2279 if (var->data.compact)
2280 stride = 1;
2281 if (indir_index) {
2282 unsigned count = glsl_count_attribute_slots(
2283 var->type, false);
2284 count -= chan / 4;
2285 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2286 &ctx->ac, ctx->abi->outputs + idx + chan, count,
2287 stride, true, true);
2288
2289 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2290 value, indir_index, "");
2291 build_store_values_extended(&ctx->ac, ctx->abi->outputs + idx + chan,
2292 count, stride, tmp_vec);
2293
2294 } else {
2295 temp_ptr = ctx->abi->outputs[idx + chan + const_index * stride];
2296
2297 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2298 }
2299 }
2300 break;
2301 case nir_var_function_temp:
2302 for (unsigned chan = 0; chan < 8; chan++) {
2303 if (!(writemask & (1 << chan)))
2304 continue;
2305
2306 value = ac_llvm_extract_elem(&ctx->ac, src, chan);
2307 if (indir_index) {
2308 unsigned count = glsl_count_attribute_slots(
2309 var->type, false);
2310 count -= chan / 4;
2311 LLVMValueRef tmp_vec = ac_build_gather_values_extended(
2312 &ctx->ac, ctx->locals + idx + chan, count,
2313 4, true, true);
2314
2315 tmp_vec = LLVMBuildInsertElement(ctx->ac.builder, tmp_vec,
2316 value, indir_index, "");
2317 build_store_values_extended(&ctx->ac, ctx->locals + idx + chan,
2318 count, 4, tmp_vec);
2319 } else {
2320 temp_ptr = ctx->locals[idx + chan + const_index * 4];
2321
2322 LLVMBuildStore(ctx->ac.builder, value, temp_ptr);
2323 }
2324 }
2325 break;
2326
2327 case nir_var_mem_global: {
2328 int writemask = instr->const_index[0];
2329 LLVMValueRef address = get_src(ctx, instr->src[0]);
2330 LLVMValueRef val = get_src(ctx, instr->src[1]);
2331
2332 unsigned explicit_stride = glsl_get_explicit_stride(deref->type);
2333 unsigned natural_stride = type_scalar_size_bytes(deref->type);
2334 unsigned stride = explicit_stride ? explicit_stride : natural_stride;
2335
2336 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2337 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2338 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2339
2340 if (writemask == (1u << ac_get_llvm_num_components(val)) - 1 &&
2341 stride == natural_stride) {
2342 LLVMTypeRef ptr_type = LLVMPointerType(LLVMTypeOf(val),
2343 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2344 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2345
2346 val = LLVMBuildBitCast(ctx->ac.builder, val,
2347 LLVMGetElementType(LLVMTypeOf(address)), "");
2348 LLVMBuildStore(ctx->ac.builder, val, address);
2349 } else {
2350 LLVMTypeRef ptr_type = LLVMPointerType(LLVMGetElementType(LLVMTypeOf(val)),
2351 LLVMGetPointerAddressSpace(LLVMTypeOf(address)));
2352 address = LLVMBuildBitCast(ctx->ac.builder, address, ptr_type , "");
2353 for (unsigned chan = 0; chan < 4; chan++) {
2354 if (!(writemask & (1 << chan)))
2355 continue;
2356
2357 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, chan * stride / natural_stride, 0);
2358
2359 LLVMValueRef ptr = ac_build_gep_ptr(&ctx->ac, address, offset);
2360 LLVMValueRef src = ac_llvm_extract_elem(&ctx->ac, val,
2361 chan);
2362 src = LLVMBuildBitCast(ctx->ac.builder, src,
2363 LLVMGetElementType(LLVMTypeOf(ptr)), "");
2364 LLVMBuildStore(ctx->ac.builder, src, ptr);
2365 }
2366 }
2367 break;
2368 }
2369 default:
2370 abort();
2371 break;
2372 }
2373 }
2374
2375 static int image_type_to_components_count(enum glsl_sampler_dim dim, bool array)
2376 {
2377 switch (dim) {
2378 case GLSL_SAMPLER_DIM_BUF:
2379 return 1;
2380 case GLSL_SAMPLER_DIM_1D:
2381 return array ? 2 : 1;
2382 case GLSL_SAMPLER_DIM_2D:
2383 return array ? 3 : 2;
2384 case GLSL_SAMPLER_DIM_MS:
2385 return array ? 4 : 3;
2386 case GLSL_SAMPLER_DIM_3D:
2387 case GLSL_SAMPLER_DIM_CUBE:
2388 return 3;
2389 case GLSL_SAMPLER_DIM_RECT:
2390 case GLSL_SAMPLER_DIM_SUBPASS:
2391 return 2;
2392 case GLSL_SAMPLER_DIM_SUBPASS_MS:
2393 return 3;
2394 default:
2395 break;
2396 }
2397 return 0;
2398 }
2399
2400 static LLVMValueRef adjust_sample_index_using_fmask(struct ac_llvm_context *ctx,
2401 LLVMValueRef coord_x, LLVMValueRef coord_y,
2402 LLVMValueRef coord_z,
2403 LLVMValueRef sample_index,
2404 LLVMValueRef fmask_desc_ptr)
2405 {
2406 unsigned sample_chan = coord_z ? 3 : 2;
2407 LLVMValueRef addr[4] = {coord_x, coord_y, coord_z};
2408 addr[sample_chan] = sample_index;
2409
2410 ac_apply_fmask_to_sample(ctx, fmask_desc_ptr, addr, coord_z != NULL);
2411 return addr[sample_chan];
2412 }
2413
2414 static nir_deref_instr *get_image_deref(const nir_intrinsic_instr *instr)
2415 {
2416 assert(instr->src[0].is_ssa);
2417 return nir_instr_as_deref(instr->src[0].ssa->parent_instr);
2418 }
2419
2420 static LLVMValueRef get_image_descriptor(struct ac_nir_context *ctx,
2421 const nir_intrinsic_instr *instr,
2422 enum ac_descriptor_type desc_type,
2423 bool write)
2424 {
2425 nir_deref_instr *deref_instr =
2426 instr->src[0].ssa->parent_instr->type == nir_instr_type_deref ?
2427 nir_instr_as_deref(instr->src[0].ssa->parent_instr) : NULL;
2428
2429 return get_sampler_desc(ctx, deref_instr, desc_type, &instr->instr, true, write);
2430 }
2431
2432 static void get_image_coords(struct ac_nir_context *ctx,
2433 const nir_intrinsic_instr *instr,
2434 struct ac_image_args *args,
2435 enum glsl_sampler_dim dim,
2436 bool is_array)
2437 {
2438 LLVMValueRef src0 = get_src(ctx, instr->src[1]);
2439 LLVMValueRef masks[] = {
2440 LLVMConstInt(ctx->ac.i32, 0, false), LLVMConstInt(ctx->ac.i32, 1, false),
2441 LLVMConstInt(ctx->ac.i32, 2, false), LLVMConstInt(ctx->ac.i32, 3, false),
2442 };
2443 LLVMValueRef sample_index = ac_llvm_extract_elem(&ctx->ac, get_src(ctx, instr->src[2]), 0);
2444
2445 int count;
2446 ASSERTED bool add_frag_pos = (dim == GLSL_SAMPLER_DIM_SUBPASS ||
2447 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2448 bool is_ms = (dim == GLSL_SAMPLER_DIM_MS ||
2449 dim == GLSL_SAMPLER_DIM_SUBPASS_MS);
2450 bool gfx9_1d = ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D;
2451 assert(!add_frag_pos && "Input attachments should be lowered by this point.");
2452 count = image_type_to_components_count(dim, is_array);
2453
2454 if (is_ms && (instr->intrinsic == nir_intrinsic_image_deref_load ||
2455 instr->intrinsic == nir_intrinsic_bindless_image_load)) {
2456 LLVMValueRef fmask_load_address[3];
2457
2458 fmask_load_address[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2459 fmask_load_address[1] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[1], "");
2460 if (is_array)
2461 fmask_load_address[2] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[2], "");
2462 else
2463 fmask_load_address[2] = NULL;
2464
2465 sample_index = adjust_sample_index_using_fmask(&ctx->ac,
2466 fmask_load_address[0],
2467 fmask_load_address[1],
2468 fmask_load_address[2],
2469 sample_index,
2470 get_sampler_desc(ctx, nir_instr_as_deref(instr->src[0].ssa->parent_instr),
2471 AC_DESC_FMASK, &instr->instr, true, false));
2472 }
2473 if (count == 1 && !gfx9_1d) {
2474 if (instr->src[1].ssa->num_components)
2475 args->coords[0] = LLVMBuildExtractElement(ctx->ac.builder, src0, masks[0], "");
2476 else
2477 args->coords[0] = src0;
2478 } else {
2479 int chan;
2480 if (is_ms)
2481 count--;
2482 for (chan = 0; chan < count; ++chan) {
2483 args->coords[chan] = ac_llvm_extract_elem(&ctx->ac, src0, chan);
2484 }
2485
2486 if (gfx9_1d) {
2487 if (is_array) {
2488 args->coords[2] = args->coords[1];
2489 args->coords[1] = ctx->ac.i32_0;
2490 } else
2491 args->coords[1] = ctx->ac.i32_0;
2492 count++;
2493 }
2494 if (ctx->ac.chip_class == GFX9 &&
2495 dim == GLSL_SAMPLER_DIM_2D &&
2496 !is_array) {
2497 /* The hw can't bind a slice of a 3D image as a 2D
2498 * image, because it ignores BASE_ARRAY if the target
2499 * is 3D. The workaround is to read BASE_ARRAY and set
2500 * it as the 3rd address operand for all 2D images.
2501 */
2502 LLVMValueRef first_layer, const5, mask;
2503
2504 const5 = LLVMConstInt(ctx->ac.i32, 5, 0);
2505 mask = LLVMConstInt(ctx->ac.i32, S_008F24_BASE_ARRAY(~0), 0);
2506 first_layer = LLVMBuildExtractElement(ctx->ac.builder, args->resource, const5, "");
2507 first_layer = LLVMBuildAnd(ctx->ac.builder, first_layer, mask, "");
2508
2509 args->coords[count] = first_layer;
2510 count++;
2511 }
2512
2513
2514 if (is_ms) {
2515 args->coords[count] = sample_index;
2516 count++;
2517 }
2518 }
2519 }
2520
2521 static LLVMValueRef get_image_buffer_descriptor(struct ac_nir_context *ctx,
2522 const nir_intrinsic_instr *instr,
2523 bool write, bool atomic)
2524 {
2525 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_BUFFER, write);
2526 if (ctx->ac.chip_class == GFX9 && LLVM_VERSION_MAJOR < 9 && atomic) {
2527 LLVMValueRef elem_count = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 2, 0), "");
2528 LLVMValueRef stride = LLVMBuildExtractElement(ctx->ac.builder, rsrc, LLVMConstInt(ctx->ac.i32, 1, 0), "");
2529 stride = LLVMBuildLShr(ctx->ac.builder, stride, LLVMConstInt(ctx->ac.i32, 16, 0), "");
2530
2531 LLVMValueRef new_elem_count = LLVMBuildSelect(ctx->ac.builder,
2532 LLVMBuildICmp(ctx->ac.builder, LLVMIntUGT, elem_count, stride, ""),
2533 elem_count, stride, "");
2534
2535 rsrc = LLVMBuildInsertElement(ctx->ac.builder, rsrc, new_elem_count,
2536 LLVMConstInt(ctx->ac.i32, 2, 0), "");
2537 }
2538 return rsrc;
2539 }
2540
2541 static LLVMValueRef visit_image_load(struct ac_nir_context *ctx,
2542 const nir_intrinsic_instr *instr,
2543 bool bindless)
2544 {
2545 LLVMValueRef res;
2546
2547 enum glsl_sampler_dim dim;
2548 enum gl_access_qualifier access;
2549 bool is_array;
2550 if (bindless) {
2551 dim = nir_intrinsic_image_dim(instr);
2552 access = nir_intrinsic_access(instr);
2553 is_array = nir_intrinsic_image_array(instr);
2554 } else {
2555 const nir_deref_instr *image_deref = get_image_deref(instr);
2556 const struct glsl_type *type = image_deref->type;
2557 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2558 dim = glsl_get_sampler_dim(type);
2559 access = var->data.access;
2560 is_array = glsl_sampler_type_is_array(type);
2561 }
2562
2563 struct ac_image_args args = {};
2564
2565 args.cache_policy = get_cache_policy(ctx, access, false, false);
2566
2567 if (dim == GLSL_SAMPLER_DIM_BUF) {
2568 unsigned mask = nir_ssa_def_components_read(&instr->dest.ssa);
2569 unsigned num_channels = util_last_bit(mask);
2570 LLVMValueRef rsrc, vindex;
2571
2572 rsrc = get_image_buffer_descriptor(ctx, instr, false, false);
2573 vindex = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2574 ctx->ac.i32_0, "");
2575
2576 bool can_speculate = access & ACCESS_CAN_REORDER;
2577 res = ac_build_buffer_load_format(&ctx->ac, rsrc, vindex,
2578 ctx->ac.i32_0, num_channels,
2579 args.cache_policy,
2580 can_speculate);
2581 res = ac_build_expand_to_vec4(&ctx->ac, res, num_channels);
2582
2583 res = ac_trim_vector(&ctx->ac, res, instr->dest.ssa.num_components);
2584 res = ac_to_integer(&ctx->ac, res);
2585 } else {
2586 args.opcode = ac_image_load;
2587 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2588 get_image_coords(ctx, instr, &args, dim, is_array);
2589 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2590 args.dmask = 15;
2591 args.attributes = AC_FUNC_ATTR_READONLY;
2592
2593 res = ac_build_image_opcode(&ctx->ac, &args);
2594 }
2595 return res;
2596 }
2597
2598 static void visit_image_store(struct ac_nir_context *ctx,
2599 nir_intrinsic_instr *instr,
2600 bool bindless)
2601 {
2602
2603
2604 enum glsl_sampler_dim dim;
2605 enum gl_access_qualifier access;
2606 bool is_array;
2607 if (bindless) {
2608 dim = nir_intrinsic_image_dim(instr);
2609 access = nir_intrinsic_access(instr);
2610 is_array = nir_intrinsic_image_array(instr);
2611 } else {
2612 const nir_deref_instr *image_deref = get_image_deref(instr);
2613 const struct glsl_type *type = image_deref->type;
2614 const nir_variable *var = nir_deref_instr_get_variable(image_deref);
2615 dim = glsl_get_sampler_dim(type);
2616 access = var->data.access;
2617 is_array = glsl_sampler_type_is_array(type);
2618 }
2619
2620 bool writeonly_memory = access & ACCESS_NON_READABLE;
2621 struct ac_image_args args = {};
2622
2623 args.cache_policy = get_cache_policy(ctx, access, true, writeonly_memory);
2624
2625 if (dim == GLSL_SAMPLER_DIM_BUF) {
2626 LLVMValueRef rsrc = get_image_buffer_descriptor(ctx, instr, true, false);
2627 LLVMValueRef src = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2628 unsigned src_channels = ac_get_llvm_num_components(src);
2629 LLVMValueRef vindex;
2630
2631 if (src_channels == 3)
2632 src = ac_build_expand_to_vec4(&ctx->ac, src, 3);
2633
2634 vindex = LLVMBuildExtractElement(ctx->ac.builder,
2635 get_src(ctx, instr->src[1]),
2636 ctx->ac.i32_0, "");
2637
2638 ac_build_buffer_store_format(&ctx->ac, rsrc, src, vindex,
2639 ctx->ac.i32_0, src_channels,
2640 args.cache_policy);
2641 } else {
2642 args.opcode = ac_image_store;
2643 args.data[0] = ac_to_float(&ctx->ac, get_src(ctx, instr->src[3]));
2644 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2645 get_image_coords(ctx, instr, &args, dim, is_array);
2646 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2647 args.dmask = 15;
2648
2649 ac_build_image_opcode(&ctx->ac, &args);
2650 }
2651
2652 }
2653
2654 static LLVMValueRef visit_image_atomic(struct ac_nir_context *ctx,
2655 const nir_intrinsic_instr *instr,
2656 bool bindless)
2657 {
2658 LLVMValueRef params[7];
2659 int param_count = 0;
2660
2661 bool cmpswap = instr->intrinsic == nir_intrinsic_image_deref_atomic_comp_swap ||
2662 instr->intrinsic == nir_intrinsic_bindless_image_atomic_comp_swap;
2663 const char *atomic_name;
2664 char intrinsic_name[64];
2665 enum ac_atomic_op atomic_subop;
2666 ASSERTED int length;
2667
2668 enum glsl_sampler_dim dim;
2669 bool is_array;
2670 if (bindless) {
2671 if (instr->intrinsic == nir_intrinsic_bindless_image_atomic_imin ||
2672 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umin ||
2673 instr->intrinsic == nir_intrinsic_bindless_image_atomic_imax ||
2674 instr->intrinsic == nir_intrinsic_bindless_image_atomic_umax) {
2675 ASSERTED const GLenum format = nir_intrinsic_format(instr);
2676 assert(format == GL_R32UI || format == GL_R32I);
2677 }
2678 dim = nir_intrinsic_image_dim(instr);
2679 is_array = nir_intrinsic_image_array(instr);
2680 } else {
2681 const struct glsl_type *type = get_image_deref(instr)->type;
2682 dim = glsl_get_sampler_dim(type);
2683 is_array = glsl_sampler_type_is_array(type);
2684 }
2685
2686 switch (instr->intrinsic) {
2687 case nir_intrinsic_bindless_image_atomic_add:
2688 case nir_intrinsic_image_deref_atomic_add:
2689 atomic_name = "add";
2690 atomic_subop = ac_atomic_add;
2691 break;
2692 case nir_intrinsic_bindless_image_atomic_imin:
2693 case nir_intrinsic_image_deref_atomic_imin:
2694 atomic_name = "smin";
2695 atomic_subop = ac_atomic_smin;
2696 break;
2697 case nir_intrinsic_bindless_image_atomic_umin:
2698 case nir_intrinsic_image_deref_atomic_umin:
2699 atomic_name = "umin";
2700 atomic_subop = ac_atomic_umin;
2701 break;
2702 case nir_intrinsic_bindless_image_atomic_imax:
2703 case nir_intrinsic_image_deref_atomic_imax:
2704 atomic_name = "smax";
2705 atomic_subop = ac_atomic_smax;
2706 break;
2707 case nir_intrinsic_bindless_image_atomic_umax:
2708 case nir_intrinsic_image_deref_atomic_umax:
2709 atomic_name = "umax";
2710 atomic_subop = ac_atomic_umax;
2711 break;
2712 case nir_intrinsic_bindless_image_atomic_and:
2713 case nir_intrinsic_image_deref_atomic_and:
2714 atomic_name = "and";
2715 atomic_subop = ac_atomic_and;
2716 break;
2717 case nir_intrinsic_bindless_image_atomic_or:
2718 case nir_intrinsic_image_deref_atomic_or:
2719 atomic_name = "or";
2720 atomic_subop = ac_atomic_or;
2721 break;
2722 case nir_intrinsic_bindless_image_atomic_xor:
2723 case nir_intrinsic_image_deref_atomic_xor:
2724 atomic_name = "xor";
2725 atomic_subop = ac_atomic_xor;
2726 break;
2727 case nir_intrinsic_bindless_image_atomic_exchange:
2728 case nir_intrinsic_image_deref_atomic_exchange:
2729 atomic_name = "swap";
2730 atomic_subop = ac_atomic_swap;
2731 break;
2732 case nir_intrinsic_bindless_image_atomic_comp_swap:
2733 case nir_intrinsic_image_deref_atomic_comp_swap:
2734 atomic_name = "cmpswap";
2735 atomic_subop = 0; /* not used */
2736 break;
2737 case nir_intrinsic_bindless_image_atomic_inc_wrap:
2738 case nir_intrinsic_image_deref_atomic_inc_wrap: {
2739 atomic_name = "inc";
2740 atomic_subop = ac_atomic_inc_wrap;
2741 /* ATOMIC_INC instruction does:
2742 * value = (value + 1) % (data + 1)
2743 * but we want:
2744 * value = (value + 1) % data
2745 * So replace 'data' by 'data - 1'.
2746 */
2747 ctx->ssa_defs[instr->src[3].ssa->index] =
2748 LLVMBuildSub(ctx->ac.builder,
2749 ctx->ssa_defs[instr->src[3].ssa->index],
2750 ctx->ac.i32_1, "");
2751 break;
2752 }
2753 case nir_intrinsic_bindless_image_atomic_dec_wrap:
2754 case nir_intrinsic_image_deref_atomic_dec_wrap:
2755 atomic_name = "dec";
2756 atomic_subop = ac_atomic_dec_wrap;
2757 break;
2758 default:
2759 abort();
2760 }
2761
2762 if (cmpswap)
2763 params[param_count++] = get_src(ctx, instr->src[4]);
2764 params[param_count++] = get_src(ctx, instr->src[3]);
2765
2766 if (dim == GLSL_SAMPLER_DIM_BUF) {
2767 params[param_count++] = get_image_buffer_descriptor(ctx, instr, true, true);
2768 params[param_count++] = LLVMBuildExtractElement(ctx->ac.builder, get_src(ctx, instr->src[1]),
2769 ctx->ac.i32_0, ""); /* vindex */
2770 params[param_count++] = ctx->ac.i32_0; /* voffset */
2771 if (LLVM_VERSION_MAJOR >= 9) {
2772 /* XXX: The new raw/struct atomic intrinsics are buggy
2773 * with LLVM 8, see r358579.
2774 */
2775 params[param_count++] = ctx->ac.i32_0; /* soffset */
2776 params[param_count++] = ctx->ac.i32_0; /* slc */
2777
2778 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2779 "llvm.amdgcn.struct.buffer.atomic.%s.i32", atomic_name);
2780 } else {
2781 params[param_count++] = ctx->ac.i1false; /* slc */
2782
2783 length = snprintf(intrinsic_name, sizeof(intrinsic_name),
2784 "llvm.amdgcn.buffer.atomic.%s", atomic_name);
2785 }
2786
2787 assert(length < sizeof(intrinsic_name));
2788 return ac_build_intrinsic(&ctx->ac, intrinsic_name, ctx->ac.i32,
2789 params, param_count, 0);
2790 } else {
2791 struct ac_image_args args = {};
2792 args.opcode = cmpswap ? ac_image_atomic_cmpswap : ac_image_atomic;
2793 args.atomic = atomic_subop;
2794 args.data[0] = params[0];
2795 if (cmpswap)
2796 args.data[1] = params[1];
2797 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, true);
2798 get_image_coords(ctx, instr, &args, dim, is_array);
2799 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2800
2801 return ac_build_image_opcode(&ctx->ac, &args);
2802 }
2803 }
2804
2805 static LLVMValueRef visit_image_samples(struct ac_nir_context *ctx,
2806 const nir_intrinsic_instr *instr)
2807 {
2808 LLVMValueRef rsrc = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2809
2810 return ac_build_image_get_sample_count(&ctx->ac, rsrc);
2811 }
2812
2813 static LLVMValueRef visit_image_size(struct ac_nir_context *ctx,
2814 const nir_intrinsic_instr *instr,
2815 bool bindless)
2816 {
2817 LLVMValueRef res;
2818
2819 enum glsl_sampler_dim dim;
2820 bool is_array;
2821 if (bindless) {
2822 dim = nir_intrinsic_image_dim(instr);
2823 is_array = nir_intrinsic_image_array(instr);
2824 } else {
2825 const struct glsl_type *type = get_image_deref(instr)->type;
2826 dim = glsl_get_sampler_dim(type);
2827 is_array = glsl_sampler_type_is_array(type);
2828 }
2829
2830 if (dim == GLSL_SAMPLER_DIM_BUF)
2831 return get_buffer_size(ctx, get_image_descriptor(ctx, instr, AC_DESC_BUFFER, false), true);
2832
2833 struct ac_image_args args = { 0 };
2834
2835 args.dim = ac_get_image_dim(ctx->ac.chip_class, dim, is_array);
2836 args.dmask = 0xf;
2837 args.resource = get_image_descriptor(ctx, instr, AC_DESC_IMAGE, false);
2838 args.opcode = ac_image_get_resinfo;
2839 args.lod = ctx->ac.i32_0;
2840 args.attributes = AC_FUNC_ATTR_READNONE;
2841
2842 res = ac_build_image_opcode(&ctx->ac, &args);
2843
2844 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
2845
2846 if (dim == GLSL_SAMPLER_DIM_CUBE && is_array) {
2847 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
2848 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2849 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
2850 res = LLVMBuildInsertElement(ctx->ac.builder, res, z, two, "");
2851 }
2852 if (ctx->ac.chip_class == GFX9 && dim == GLSL_SAMPLER_DIM_1D && is_array) {
2853 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, res, two, "");
2854 res = LLVMBuildInsertElement(ctx->ac.builder, res, layers,
2855 ctx->ac.i32_1, "");
2856
2857 }
2858 return res;
2859 }
2860
2861 static void emit_membar(struct ac_llvm_context *ac,
2862 const nir_intrinsic_instr *instr)
2863 {
2864 unsigned wait_flags = 0;
2865
2866 switch (instr->intrinsic) {
2867 case nir_intrinsic_memory_barrier:
2868 case nir_intrinsic_group_memory_barrier:
2869 wait_flags = AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2870 break;
2871 case nir_intrinsic_memory_barrier_atomic_counter:
2872 case nir_intrinsic_memory_barrier_buffer:
2873 case nir_intrinsic_memory_barrier_image:
2874 wait_flags = AC_WAIT_VLOAD | AC_WAIT_VSTORE;
2875 break;
2876 case nir_intrinsic_memory_barrier_shared:
2877 wait_flags = AC_WAIT_LGKM;
2878 break;
2879 default:
2880 break;
2881 }
2882
2883 ac_build_waitcnt(ac, wait_flags);
2884 }
2885
2886 void ac_emit_barrier(struct ac_llvm_context *ac, gl_shader_stage stage)
2887 {
2888 /* GFX6 only (thanks to a hw bug workaround):
2889 * The real barrier instruction isn’t needed, because an entire patch
2890 * always fits into a single wave.
2891 */
2892 if (ac->chip_class == GFX6 && stage == MESA_SHADER_TESS_CTRL) {
2893 ac_build_waitcnt(ac, AC_WAIT_LGKM | AC_WAIT_VLOAD | AC_WAIT_VSTORE);
2894 return;
2895 }
2896 ac_build_s_barrier(ac);
2897 }
2898
2899 static void emit_discard(struct ac_nir_context *ctx,
2900 const nir_intrinsic_instr *instr)
2901 {
2902 LLVMValueRef cond;
2903
2904 if (instr->intrinsic == nir_intrinsic_discard_if) {
2905 cond = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ,
2906 get_src(ctx, instr->src[0]),
2907 ctx->ac.i32_0, "");
2908 } else {
2909 assert(instr->intrinsic == nir_intrinsic_discard);
2910 cond = ctx->ac.i1false;
2911 }
2912
2913 ctx->abi->emit_kill(ctx->abi, cond);
2914 }
2915
2916 static LLVMValueRef
2917 visit_load_local_invocation_index(struct ac_nir_context *ctx)
2918 {
2919 LLVMValueRef result;
2920 LLVMValueRef thread_id = ac_get_thread_id(&ctx->ac);
2921 result = LLVMBuildAnd(ctx->ac.builder,
2922 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2923 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2924
2925 if (ctx->ac.wave_size == 32)
2926 result = LLVMBuildLShr(ctx->ac.builder, result,
2927 LLVMConstInt(ctx->ac.i32, 1, false), "");
2928
2929 return LLVMBuildAdd(ctx->ac.builder, result, thread_id, "");
2930 }
2931
2932 static LLVMValueRef
2933 visit_load_subgroup_id(struct ac_nir_context *ctx)
2934 {
2935 if (ctx->stage == MESA_SHADER_COMPUTE) {
2936 LLVMValueRef result;
2937 result = LLVMBuildAnd(ctx->ac.builder,
2938 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2939 LLVMConstInt(ctx->ac.i32, 0xfc0, false), "");
2940 return LLVMBuildLShr(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 6, false), "");
2941 } else {
2942 return LLVMConstInt(ctx->ac.i32, 0, false);
2943 }
2944 }
2945
2946 static LLVMValueRef
2947 visit_load_num_subgroups(struct ac_nir_context *ctx)
2948 {
2949 if (ctx->stage == MESA_SHADER_COMPUTE) {
2950 return LLVMBuildAnd(ctx->ac.builder,
2951 ac_get_arg(&ctx->ac, ctx->args->tg_size),
2952 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
2953 } else {
2954 return LLVMConstInt(ctx->ac.i32, 1, false);
2955 }
2956 }
2957
2958 static LLVMValueRef
2959 visit_first_invocation(struct ac_nir_context *ctx)
2960 {
2961 LLVMValueRef active_set = ac_build_ballot(&ctx->ac, ctx->ac.i32_1);
2962 const char *intr = ctx->ac.wave_size == 32 ? "llvm.cttz.i32" : "llvm.cttz.i64";
2963
2964 /* The second argument is whether cttz(0) should be defined, but we do not care. */
2965 LLVMValueRef args[] = {active_set, ctx->ac.i1false};
2966 LLVMValueRef result = ac_build_intrinsic(&ctx->ac, intr,
2967 ctx->ac.iN_wavemask, args, 2,
2968 AC_FUNC_ATTR_NOUNWIND |
2969 AC_FUNC_ATTR_READNONE);
2970
2971 return LLVMBuildTrunc(ctx->ac.builder, result, ctx->ac.i32, "");
2972 }
2973
2974 static LLVMValueRef
2975 visit_load_shared(struct ac_nir_context *ctx,
2976 const nir_intrinsic_instr *instr)
2977 {
2978 LLVMValueRef values[4], derived_ptr, index, ret;
2979
2980 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
2981 instr->dest.ssa.bit_size);
2982
2983 for (int chan = 0; chan < instr->num_components; chan++) {
2984 index = LLVMConstInt(ctx->ac.i32, chan, 0);
2985 derived_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &index, 1, "");
2986 values[chan] = LLVMBuildLoad(ctx->ac.builder, derived_ptr, "");
2987 }
2988
2989 ret = ac_build_gather_values(&ctx->ac, values, instr->num_components);
2990 return LLVMBuildBitCast(ctx->ac.builder, ret, get_def_type(ctx, &instr->dest.ssa), "");
2991 }
2992
2993 static void
2994 visit_store_shared(struct ac_nir_context *ctx,
2995 const nir_intrinsic_instr *instr)
2996 {
2997 LLVMValueRef derived_ptr, data,index;
2998 LLVMBuilderRef builder = ctx->ac.builder;
2999
3000 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[1],
3001 instr->src[0].ssa->bit_size);
3002 LLVMValueRef src = get_src(ctx, instr->src[0]);
3003
3004 int writemask = nir_intrinsic_write_mask(instr);
3005 for (int chan = 0; chan < 4; chan++) {
3006 if (!(writemask & (1 << chan))) {
3007 continue;
3008 }
3009 data = ac_llvm_extract_elem(&ctx->ac, src, chan);
3010 index = LLVMConstInt(ctx->ac.i32, chan, 0);
3011 derived_ptr = LLVMBuildGEP(builder, ptr, &index, 1, "");
3012 LLVMBuildStore(builder, data, derived_ptr);
3013 }
3014 }
3015
3016 static LLVMValueRef visit_var_atomic(struct ac_nir_context *ctx,
3017 const nir_intrinsic_instr *instr,
3018 LLVMValueRef ptr, int src_idx)
3019 {
3020 LLVMValueRef result;
3021 LLVMValueRef src = get_src(ctx, instr->src[src_idx]);
3022
3023 const char *sync_scope = LLVM_VERSION_MAJOR >= 9 ? "workgroup-one-as" : "workgroup";
3024
3025 if (instr->intrinsic == nir_intrinsic_shared_atomic_comp_swap ||
3026 instr->intrinsic == nir_intrinsic_deref_atomic_comp_swap) {
3027 LLVMValueRef src1 = get_src(ctx, instr->src[src_idx + 1]);
3028 result = ac_build_atomic_cmp_xchg(&ctx->ac, ptr, src, src1, sync_scope);
3029 result = LLVMBuildExtractValue(ctx->ac.builder, result, 0, "");
3030 } else {
3031 LLVMAtomicRMWBinOp op;
3032 switch (instr->intrinsic) {
3033 case nir_intrinsic_shared_atomic_add:
3034 case nir_intrinsic_deref_atomic_add:
3035 op = LLVMAtomicRMWBinOpAdd;
3036 break;
3037 case nir_intrinsic_shared_atomic_umin:
3038 case nir_intrinsic_deref_atomic_umin:
3039 op = LLVMAtomicRMWBinOpUMin;
3040 break;
3041 case nir_intrinsic_shared_atomic_umax:
3042 case nir_intrinsic_deref_atomic_umax:
3043 op = LLVMAtomicRMWBinOpUMax;
3044 break;
3045 case nir_intrinsic_shared_atomic_imin:
3046 case nir_intrinsic_deref_atomic_imin:
3047 op = LLVMAtomicRMWBinOpMin;
3048 break;
3049 case nir_intrinsic_shared_atomic_imax:
3050 case nir_intrinsic_deref_atomic_imax:
3051 op = LLVMAtomicRMWBinOpMax;
3052 break;
3053 case nir_intrinsic_shared_atomic_and:
3054 case nir_intrinsic_deref_atomic_and:
3055 op = LLVMAtomicRMWBinOpAnd;
3056 break;
3057 case nir_intrinsic_shared_atomic_or:
3058 case nir_intrinsic_deref_atomic_or:
3059 op = LLVMAtomicRMWBinOpOr;
3060 break;
3061 case nir_intrinsic_shared_atomic_xor:
3062 case nir_intrinsic_deref_atomic_xor:
3063 op = LLVMAtomicRMWBinOpXor;
3064 break;
3065 case nir_intrinsic_shared_atomic_exchange:
3066 case nir_intrinsic_deref_atomic_exchange:
3067 op = LLVMAtomicRMWBinOpXchg;
3068 break;
3069 default:
3070 return NULL;
3071 }
3072
3073 result = ac_build_atomic_rmw(&ctx->ac, op, ptr, ac_to_integer(&ctx->ac, src), sync_scope);
3074 }
3075 return result;
3076 }
3077
3078 static LLVMValueRef load_sample_pos(struct ac_nir_context *ctx)
3079 {
3080 LLVMValueRef values[2];
3081 LLVMValueRef pos[2];
3082
3083 pos[0] = ac_to_float(&ctx->ac,
3084 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]));
3085 pos[1] = ac_to_float(&ctx->ac,
3086 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]));
3087
3088 values[0] = ac_build_fract(&ctx->ac, pos[0], 32);
3089 values[1] = ac_build_fract(&ctx->ac, pos[1], 32);
3090 return ac_build_gather_values(&ctx->ac, values, 2);
3091 }
3092
3093 static LLVMValueRef lookup_interp_param(struct ac_nir_context *ctx,
3094 enum glsl_interp_mode interp, unsigned location)
3095 {
3096 switch (interp) {
3097 case INTERP_MODE_FLAT:
3098 default:
3099 return NULL;
3100 case INTERP_MODE_SMOOTH:
3101 case INTERP_MODE_NONE:
3102 if (location == INTERP_CENTER)
3103 return ac_get_arg(&ctx->ac, ctx->args->persp_center);
3104 else if (location == INTERP_CENTROID)
3105 return ctx->abi->persp_centroid;
3106 else if (location == INTERP_SAMPLE)
3107 return ac_get_arg(&ctx->ac, ctx->args->persp_sample);
3108 break;
3109 case INTERP_MODE_NOPERSPECTIVE:
3110 if (location == INTERP_CENTER)
3111 return ac_get_arg(&ctx->ac, ctx->args->linear_center);
3112 else if (location == INTERP_CENTROID)
3113 return ctx->abi->linear_centroid;
3114 else if (location == INTERP_SAMPLE)
3115 return ac_get_arg(&ctx->ac, ctx->args->linear_sample);
3116 break;
3117 }
3118 return NULL;
3119 }
3120
3121 static LLVMValueRef barycentric_center(struct ac_nir_context *ctx,
3122 unsigned mode)
3123 {
3124 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3125 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3126 }
3127
3128 static LLVMValueRef barycentric_offset(struct ac_nir_context *ctx,
3129 unsigned mode,
3130 LLVMValueRef offset)
3131 {
3132 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTER);
3133 LLVMValueRef src_c0 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_0, ""));
3134 LLVMValueRef src_c1 = ac_to_float(&ctx->ac, LLVMBuildExtractElement(ctx->ac.builder, offset, ctx->ac.i32_1, ""));
3135
3136 LLVMValueRef ij_out[2];
3137 LLVMValueRef ddxy_out = ac_build_ddxy_interp(&ctx->ac, interp_param);
3138
3139 /*
3140 * take the I then J parameters, and the DDX/Y for it, and
3141 * calculate the IJ inputs for the interpolator.
3142 * temp1 = ddx * offset/sample.x + I;
3143 * interp_param.I = ddy * offset/sample.y + temp1;
3144 * temp1 = ddx * offset/sample.x + J;
3145 * interp_param.J = ddy * offset/sample.y + temp1;
3146 */
3147 for (unsigned i = 0; i < 2; i++) {
3148 LLVMValueRef ix_ll = LLVMConstInt(ctx->ac.i32, i, false);
3149 LLVMValueRef iy_ll = LLVMConstInt(ctx->ac.i32, i + 2, false);
3150 LLVMValueRef ddx_el = LLVMBuildExtractElement(ctx->ac.builder,
3151 ddxy_out, ix_ll, "");
3152 LLVMValueRef ddy_el = LLVMBuildExtractElement(ctx->ac.builder,
3153 ddxy_out, iy_ll, "");
3154 LLVMValueRef interp_el = LLVMBuildExtractElement(ctx->ac.builder,
3155 interp_param, ix_ll, "");
3156 LLVMValueRef temp1, temp2;
3157
3158 interp_el = LLVMBuildBitCast(ctx->ac.builder, interp_el,
3159 ctx->ac.f32, "");
3160
3161 temp1 = ac_build_fmad(&ctx->ac, ddx_el, src_c0, interp_el);
3162 temp2 = ac_build_fmad(&ctx->ac, ddy_el, src_c1, temp1);
3163
3164 ij_out[i] = LLVMBuildBitCast(ctx->ac.builder,
3165 temp2, ctx->ac.i32, "");
3166 }
3167 interp_param = ac_build_gather_values(&ctx->ac, ij_out, 2);
3168 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3169 }
3170
3171 static LLVMValueRef barycentric_centroid(struct ac_nir_context *ctx,
3172 unsigned mode)
3173 {
3174 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_CENTROID);
3175 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3176 }
3177
3178 static LLVMValueRef barycentric_at_sample(struct ac_nir_context *ctx,
3179 unsigned mode,
3180 LLVMValueRef sample_id)
3181 {
3182 if (ctx->abi->interp_at_sample_force_center)
3183 return barycentric_center(ctx, mode);
3184
3185 LLVMValueRef halfval = LLVMConstReal(ctx->ac.f32, 0.5f);
3186
3187 /* fetch sample ID */
3188 LLVMValueRef sample_pos = ctx->abi->load_sample_position(ctx->abi, sample_id);
3189
3190 LLVMValueRef src_c0 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_0, "");
3191 src_c0 = LLVMBuildFSub(ctx->ac.builder, src_c0, halfval, "");
3192 LLVMValueRef src_c1 = LLVMBuildExtractElement(ctx->ac.builder, sample_pos, ctx->ac.i32_1, "");
3193 src_c1 = LLVMBuildFSub(ctx->ac.builder, src_c1, halfval, "");
3194 LLVMValueRef coords[] = { src_c0, src_c1 };
3195 LLVMValueRef offset = ac_build_gather_values(&ctx->ac, coords, 2);
3196
3197 return barycentric_offset(ctx, mode, offset);
3198 }
3199
3200
3201 static LLVMValueRef barycentric_sample(struct ac_nir_context *ctx,
3202 unsigned mode)
3203 {
3204 LLVMValueRef interp_param = lookup_interp_param(ctx, mode, INTERP_SAMPLE);
3205 return LLVMBuildBitCast(ctx->ac.builder, interp_param, ctx->ac.v2i32, "");
3206 }
3207
3208 static LLVMValueRef load_interpolated_input(struct ac_nir_context *ctx,
3209 LLVMValueRef interp_param,
3210 unsigned index, unsigned comp_start,
3211 unsigned num_components,
3212 unsigned bitsize)
3213 {
3214 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3215
3216 interp_param = LLVMBuildBitCast(ctx->ac.builder,
3217 interp_param, ctx->ac.v2f32, "");
3218 LLVMValueRef i = LLVMBuildExtractElement(
3219 ctx->ac.builder, interp_param, ctx->ac.i32_0, "");
3220 LLVMValueRef j = LLVMBuildExtractElement(
3221 ctx->ac.builder, interp_param, ctx->ac.i32_1, "");
3222
3223 LLVMValueRef values[4];
3224 assert(bitsize == 16 || bitsize == 32);
3225 for (unsigned comp = 0; comp < num_components; comp++) {
3226 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, comp_start + comp, false);
3227 if (bitsize == 16) {
3228 values[comp] = ac_build_fs_interp_f16(&ctx->ac, llvm_chan, attr_number,
3229 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3230 } else {
3231 values[comp] = ac_build_fs_interp(&ctx->ac, llvm_chan, attr_number,
3232 ac_get_arg(&ctx->ac, ctx->args->prim_mask), i, j);
3233 }
3234 }
3235
3236 return ac_to_integer(&ctx->ac, ac_build_gather_values(&ctx->ac, values, num_components));
3237 }
3238
3239 static LLVMValueRef load_flat_input(struct ac_nir_context *ctx,
3240 unsigned index, unsigned comp_start,
3241 unsigned num_components,
3242 unsigned bit_size)
3243 {
3244 LLVMValueRef attr_number = LLVMConstInt(ctx->ac.i32, index, false);
3245
3246 LLVMValueRef values[8];
3247
3248 /* Each component of a 64-bit value takes up two GL-level channels. */
3249 unsigned channels =
3250 bit_size == 64 ? num_components * 2 : num_components;
3251
3252 for (unsigned chan = 0; chan < channels; chan++) {
3253 if (comp_start + chan > 4)
3254 attr_number = LLVMConstInt(ctx->ac.i32, index + 1, false);
3255 LLVMValueRef llvm_chan = LLVMConstInt(ctx->ac.i32, (comp_start + chan) % 4, false);
3256 values[chan] = ac_build_fs_interp_mov(&ctx->ac,
3257 LLVMConstInt(ctx->ac.i32, 2, false),
3258 llvm_chan,
3259 attr_number,
3260 ac_get_arg(&ctx->ac, ctx->args->prim_mask));
3261 values[chan] = LLVMBuildBitCast(ctx->ac.builder, values[chan], ctx->ac.i32, "");
3262 values[chan] = LLVMBuildTruncOrBitCast(ctx->ac.builder, values[chan],
3263 bit_size == 16 ? ctx->ac.i16 : ctx->ac.i32, "");
3264 }
3265
3266 LLVMValueRef result = ac_build_gather_values(&ctx->ac, values, channels);
3267 if (bit_size == 64) {
3268 LLVMTypeRef type = num_components == 1 ? ctx->ac.i64 :
3269 LLVMVectorType(ctx->ac.i64, num_components);
3270 result = LLVMBuildBitCast(ctx->ac.builder, result, type, "");
3271 }
3272 return result;
3273 }
3274
3275 static void visit_intrinsic(struct ac_nir_context *ctx,
3276 nir_intrinsic_instr *instr)
3277 {
3278 LLVMValueRef result = NULL;
3279
3280 switch (instr->intrinsic) {
3281 case nir_intrinsic_ballot:
3282 result = ac_build_ballot(&ctx->ac, get_src(ctx, instr->src[0]));
3283 if (ctx->ac.ballot_mask_bits > ctx->ac.wave_size)
3284 result = LLVMBuildZExt(ctx->ac.builder, result, ctx->ac.iN_ballotmask, "");
3285 break;
3286 case nir_intrinsic_read_invocation:
3287 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]),
3288 get_src(ctx, instr->src[1]));
3289 break;
3290 case nir_intrinsic_read_first_invocation:
3291 result = ac_build_readlane(&ctx->ac, get_src(ctx, instr->src[0]), NULL);
3292 break;
3293 case nir_intrinsic_load_subgroup_invocation:
3294 result = ac_get_thread_id(&ctx->ac);
3295 break;
3296 case nir_intrinsic_load_work_group_id: {
3297 LLVMValueRef values[3];
3298
3299 for (int i = 0; i < 3; i++) {
3300 values[i] = ctx->args->workgroup_ids[i].used ?
3301 ac_get_arg(&ctx->ac, ctx->args->workgroup_ids[i]) : ctx->ac.i32_0;
3302 }
3303
3304 result = ac_build_gather_values(&ctx->ac, values, 3);
3305 break;
3306 }
3307 case nir_intrinsic_load_base_vertex:
3308 case nir_intrinsic_load_first_vertex:
3309 result = ctx->abi->load_base_vertex(ctx->abi);
3310 break;
3311 case nir_intrinsic_load_local_group_size:
3312 result = ctx->abi->load_local_group_size(ctx->abi);
3313 break;
3314 case nir_intrinsic_load_vertex_id:
3315 result = LLVMBuildAdd(ctx->ac.builder,
3316 ac_get_arg(&ctx->ac, ctx->args->vertex_id),
3317 ac_get_arg(&ctx->ac, ctx->args->base_vertex), "");
3318 break;
3319 case nir_intrinsic_load_vertex_id_zero_base: {
3320 result = ctx->abi->vertex_id;
3321 break;
3322 }
3323 case nir_intrinsic_load_local_invocation_id: {
3324 result = ac_get_arg(&ctx->ac, ctx->args->local_invocation_ids);
3325 break;
3326 }
3327 case nir_intrinsic_load_base_instance:
3328 result = ac_get_arg(&ctx->ac, ctx->args->start_instance);
3329 break;
3330 case nir_intrinsic_load_draw_id:
3331 result = ac_get_arg(&ctx->ac, ctx->args->draw_id);
3332 break;
3333 case nir_intrinsic_load_view_index:
3334 result = ac_get_arg(&ctx->ac, ctx->args->view_index);
3335 break;
3336 case nir_intrinsic_load_invocation_id:
3337 if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3338 result = ac_unpack_param(&ctx->ac,
3339 ac_get_arg(&ctx->ac, ctx->args->tcs_rel_ids),
3340 8, 5);
3341 } else {
3342 if (ctx->ac.chip_class >= GFX10) {
3343 result = LLVMBuildAnd(ctx->ac.builder,
3344 ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id),
3345 LLVMConstInt(ctx->ac.i32, 127, 0), "");
3346 } else {
3347 result = ac_get_arg(&ctx->ac, ctx->args->gs_invocation_id);
3348 }
3349 }
3350 break;
3351 case nir_intrinsic_load_primitive_id:
3352 if (ctx->stage == MESA_SHADER_GEOMETRY) {
3353 result = ac_get_arg(&ctx->ac, ctx->args->gs_prim_id);
3354 } else if (ctx->stage == MESA_SHADER_TESS_CTRL) {
3355 result = ac_get_arg(&ctx->ac, ctx->args->tcs_patch_id);
3356 } else if (ctx->stage == MESA_SHADER_TESS_EVAL) {
3357 result = ac_get_arg(&ctx->ac, ctx->args->tes_patch_id);
3358 } else
3359 fprintf(stderr, "Unknown primitive id intrinsic: %d", ctx->stage);
3360 break;
3361 case nir_intrinsic_load_sample_id:
3362 result = ac_unpack_param(&ctx->ac,
3363 ac_get_arg(&ctx->ac, ctx->args->ancillary),
3364 8, 4);
3365 break;
3366 case nir_intrinsic_load_sample_pos:
3367 result = load_sample_pos(ctx);
3368 break;
3369 case nir_intrinsic_load_sample_mask_in:
3370 result = ctx->abi->load_sample_mask_in(ctx->abi);
3371 break;
3372 case nir_intrinsic_load_frag_coord: {
3373 LLVMValueRef values[4] = {
3374 ac_get_arg(&ctx->ac, ctx->args->frag_pos[0]),
3375 ac_get_arg(&ctx->ac, ctx->args->frag_pos[1]),
3376 ac_get_arg(&ctx->ac, ctx->args->frag_pos[2]),
3377 ac_build_fdiv(&ctx->ac, ctx->ac.f32_1,
3378 ac_get_arg(&ctx->ac, ctx->args->frag_pos[3]))
3379 };
3380 result = ac_to_integer(&ctx->ac,
3381 ac_build_gather_values(&ctx->ac, values, 4));
3382 break;
3383 }
3384 case nir_intrinsic_load_layer_id:
3385 result = ctx->abi->inputs[ac_llvm_reg_index_soa(VARYING_SLOT_LAYER, 0)];
3386 break;
3387 case nir_intrinsic_load_front_face:
3388 result = ac_get_arg(&ctx->ac, ctx->args->front_face);
3389 break;
3390 case nir_intrinsic_load_helper_invocation:
3391 result = ac_build_load_helper_invocation(&ctx->ac);
3392 break;
3393 case nir_intrinsic_load_color0:
3394 result = ctx->abi->color0;
3395 break;
3396 case nir_intrinsic_load_color1:
3397 result = ctx->abi->color1;
3398 break;
3399 case nir_intrinsic_load_user_data_amd:
3400 assert(LLVMTypeOf(ctx->abi->user_data) == ctx->ac.v4i32);
3401 result = ctx->abi->user_data;
3402 break;
3403 case nir_intrinsic_load_instance_id:
3404 result = ctx->abi->instance_id;
3405 break;
3406 case nir_intrinsic_load_num_work_groups:
3407 result = ac_get_arg(&ctx->ac, ctx->args->num_work_groups);
3408 break;
3409 case nir_intrinsic_load_local_invocation_index:
3410 result = visit_load_local_invocation_index(ctx);
3411 break;
3412 case nir_intrinsic_load_subgroup_id:
3413 result = visit_load_subgroup_id(ctx);
3414 break;
3415 case nir_intrinsic_load_num_subgroups:
3416 result = visit_load_num_subgroups(ctx);
3417 break;
3418 case nir_intrinsic_first_invocation:
3419 result = visit_first_invocation(ctx);
3420 break;
3421 case nir_intrinsic_load_push_constant:
3422 result = visit_load_push_constant(ctx, instr);
3423 break;
3424 case nir_intrinsic_vulkan_resource_index: {
3425 LLVMValueRef index = get_src(ctx, instr->src[0]);
3426 unsigned desc_set = nir_intrinsic_desc_set(instr);
3427 unsigned binding = nir_intrinsic_binding(instr);
3428
3429 result = ctx->abi->load_resource(ctx->abi, index, desc_set,
3430 binding);
3431 break;
3432 }
3433 case nir_intrinsic_vulkan_resource_reindex:
3434 result = visit_vulkan_resource_reindex(ctx, instr);
3435 break;
3436 case nir_intrinsic_store_ssbo:
3437 visit_store_ssbo(ctx, instr);
3438 break;
3439 case nir_intrinsic_load_ssbo:
3440 result = visit_load_buffer(ctx, instr);
3441 break;
3442 case nir_intrinsic_ssbo_atomic_add:
3443 case nir_intrinsic_ssbo_atomic_imin:
3444 case nir_intrinsic_ssbo_atomic_umin:
3445 case nir_intrinsic_ssbo_atomic_imax:
3446 case nir_intrinsic_ssbo_atomic_umax:
3447 case nir_intrinsic_ssbo_atomic_and:
3448 case nir_intrinsic_ssbo_atomic_or:
3449 case nir_intrinsic_ssbo_atomic_xor:
3450 case nir_intrinsic_ssbo_atomic_exchange:
3451 case nir_intrinsic_ssbo_atomic_comp_swap:
3452 result = visit_atomic_ssbo(ctx, instr);
3453 break;
3454 case nir_intrinsic_load_ubo:
3455 result = visit_load_ubo_buffer(ctx, instr);
3456 break;
3457 case nir_intrinsic_get_buffer_size:
3458 result = visit_get_buffer_size(ctx, instr);
3459 break;
3460 case nir_intrinsic_load_deref:
3461 result = visit_load_var(ctx, instr);
3462 break;
3463 case nir_intrinsic_store_deref:
3464 visit_store_var(ctx, instr);
3465 break;
3466 case nir_intrinsic_load_shared:
3467 result = visit_load_shared(ctx, instr);
3468 break;
3469 case nir_intrinsic_store_shared:
3470 visit_store_shared(ctx, instr);
3471 break;
3472 case nir_intrinsic_bindless_image_samples:
3473 case nir_intrinsic_image_deref_samples:
3474 result = visit_image_samples(ctx, instr);
3475 break;
3476 case nir_intrinsic_bindless_image_load:
3477 result = visit_image_load(ctx, instr, true);
3478 break;
3479 case nir_intrinsic_image_deref_load:
3480 result = visit_image_load(ctx, instr, false);
3481 break;
3482 case nir_intrinsic_bindless_image_store:
3483 visit_image_store(ctx, instr, true);
3484 break;
3485 case nir_intrinsic_image_deref_store:
3486 visit_image_store(ctx, instr, false);
3487 break;
3488 case nir_intrinsic_bindless_image_atomic_add:
3489 case nir_intrinsic_bindless_image_atomic_imin:
3490 case nir_intrinsic_bindless_image_atomic_umin:
3491 case nir_intrinsic_bindless_image_atomic_imax:
3492 case nir_intrinsic_bindless_image_atomic_umax:
3493 case nir_intrinsic_bindless_image_atomic_and:
3494 case nir_intrinsic_bindless_image_atomic_or:
3495 case nir_intrinsic_bindless_image_atomic_xor:
3496 case nir_intrinsic_bindless_image_atomic_exchange:
3497 case nir_intrinsic_bindless_image_atomic_comp_swap:
3498 case nir_intrinsic_bindless_image_atomic_inc_wrap:
3499 case nir_intrinsic_bindless_image_atomic_dec_wrap:
3500 result = visit_image_atomic(ctx, instr, true);
3501 break;
3502 case nir_intrinsic_image_deref_atomic_add:
3503 case nir_intrinsic_image_deref_atomic_imin:
3504 case nir_intrinsic_image_deref_atomic_umin:
3505 case nir_intrinsic_image_deref_atomic_imax:
3506 case nir_intrinsic_image_deref_atomic_umax:
3507 case nir_intrinsic_image_deref_atomic_and:
3508 case nir_intrinsic_image_deref_atomic_or:
3509 case nir_intrinsic_image_deref_atomic_xor:
3510 case nir_intrinsic_image_deref_atomic_exchange:
3511 case nir_intrinsic_image_deref_atomic_comp_swap:
3512 case nir_intrinsic_image_deref_atomic_inc_wrap:
3513 case nir_intrinsic_image_deref_atomic_dec_wrap:
3514 result = visit_image_atomic(ctx, instr, false);
3515 break;
3516 case nir_intrinsic_bindless_image_size:
3517 result = visit_image_size(ctx, instr, true);
3518 break;
3519 case nir_intrinsic_image_deref_size:
3520 result = visit_image_size(ctx, instr, false);
3521 break;
3522 case nir_intrinsic_shader_clock:
3523 result = ac_build_shader_clock(&ctx->ac);
3524 break;
3525 case nir_intrinsic_discard:
3526 case nir_intrinsic_discard_if:
3527 emit_discard(ctx, instr);
3528 break;
3529 case nir_intrinsic_memory_barrier:
3530 case nir_intrinsic_group_memory_barrier:
3531 case nir_intrinsic_memory_barrier_atomic_counter:
3532 case nir_intrinsic_memory_barrier_buffer:
3533 case nir_intrinsic_memory_barrier_image:
3534 case nir_intrinsic_memory_barrier_shared:
3535 emit_membar(&ctx->ac, instr);
3536 break;
3537 case nir_intrinsic_barrier:
3538 ac_emit_barrier(&ctx->ac, ctx->stage);
3539 break;
3540 case nir_intrinsic_shared_atomic_add:
3541 case nir_intrinsic_shared_atomic_imin:
3542 case nir_intrinsic_shared_atomic_umin:
3543 case nir_intrinsic_shared_atomic_imax:
3544 case nir_intrinsic_shared_atomic_umax:
3545 case nir_intrinsic_shared_atomic_and:
3546 case nir_intrinsic_shared_atomic_or:
3547 case nir_intrinsic_shared_atomic_xor:
3548 case nir_intrinsic_shared_atomic_exchange:
3549 case nir_intrinsic_shared_atomic_comp_swap: {
3550 LLVMValueRef ptr = get_memory_ptr(ctx, instr->src[0],
3551 instr->src[1].ssa->bit_size);
3552 result = visit_var_atomic(ctx, instr, ptr, 1);
3553 break;
3554 }
3555 case nir_intrinsic_deref_atomic_add:
3556 case nir_intrinsic_deref_atomic_imin:
3557 case nir_intrinsic_deref_atomic_umin:
3558 case nir_intrinsic_deref_atomic_imax:
3559 case nir_intrinsic_deref_atomic_umax:
3560 case nir_intrinsic_deref_atomic_and:
3561 case nir_intrinsic_deref_atomic_or:
3562 case nir_intrinsic_deref_atomic_xor:
3563 case nir_intrinsic_deref_atomic_exchange:
3564 case nir_intrinsic_deref_atomic_comp_swap: {
3565 LLVMValueRef ptr = get_src(ctx, instr->src[0]);
3566 result = visit_var_atomic(ctx, instr, ptr, 1);
3567 break;
3568 }
3569 case nir_intrinsic_load_barycentric_pixel:
3570 result = barycentric_center(ctx, nir_intrinsic_interp_mode(instr));
3571 break;
3572 case nir_intrinsic_load_barycentric_centroid:
3573 result = barycentric_centroid(ctx, nir_intrinsic_interp_mode(instr));
3574 break;
3575 case nir_intrinsic_load_barycentric_sample:
3576 result = barycentric_sample(ctx, nir_intrinsic_interp_mode(instr));
3577 break;
3578 case nir_intrinsic_load_barycentric_at_offset: {
3579 LLVMValueRef offset = ac_to_float(&ctx->ac, get_src(ctx, instr->src[0]));
3580 result = barycentric_offset(ctx, nir_intrinsic_interp_mode(instr), offset);
3581 break;
3582 }
3583 case nir_intrinsic_load_barycentric_at_sample: {
3584 LLVMValueRef sample_id = get_src(ctx, instr->src[0]);
3585 result = barycentric_at_sample(ctx, nir_intrinsic_interp_mode(instr), sample_id);
3586 break;
3587 }
3588 case nir_intrinsic_load_interpolated_input: {
3589 /* We assume any indirect loads have been lowered away */
3590 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[1]);
3591 assert(offset);
3592 assert(offset[0].i32 == 0);
3593
3594 LLVMValueRef interp_param = get_src(ctx, instr->src[0]);
3595 unsigned index = nir_intrinsic_base(instr);
3596 unsigned component = nir_intrinsic_component(instr);
3597 result = load_interpolated_input(ctx, interp_param, index,
3598 component,
3599 instr->dest.ssa.num_components,
3600 instr->dest.ssa.bit_size);
3601 break;
3602 }
3603 case nir_intrinsic_load_input: {
3604 /* We only lower inputs for fragment shaders ATM */
3605 ASSERTED nir_const_value *offset = nir_src_as_const_value(instr->src[0]);
3606 assert(offset);
3607 assert(offset[0].i32 == 0);
3608
3609 unsigned index = nir_intrinsic_base(instr);
3610 unsigned component = nir_intrinsic_component(instr);
3611 result = load_flat_input(ctx, index, component,
3612 instr->dest.ssa.num_components,
3613 instr->dest.ssa.bit_size);
3614 break;
3615 }
3616 case nir_intrinsic_emit_vertex:
3617 ctx->abi->emit_vertex(ctx->abi, nir_intrinsic_stream_id(instr), ctx->abi->outputs);
3618 break;
3619 case nir_intrinsic_end_primitive:
3620 ctx->abi->emit_primitive(ctx->abi, nir_intrinsic_stream_id(instr));
3621 break;
3622 case nir_intrinsic_load_tess_coord:
3623 result = ctx->abi->load_tess_coord(ctx->abi);
3624 break;
3625 case nir_intrinsic_load_tess_level_outer:
3626 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, false);
3627 break;
3628 case nir_intrinsic_load_tess_level_inner:
3629 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, false);
3630 break;
3631 case nir_intrinsic_load_tess_level_outer_default:
3632 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_OUTER, true);
3633 break;
3634 case nir_intrinsic_load_tess_level_inner_default:
3635 result = ctx->abi->load_tess_level(ctx->abi, VARYING_SLOT_TESS_LEVEL_INNER, true);
3636 break;
3637 case nir_intrinsic_load_patch_vertices_in:
3638 result = ctx->abi->load_patch_vertices_in(ctx->abi);
3639 break;
3640 case nir_intrinsic_vote_all: {
3641 LLVMValueRef tmp = ac_build_vote_all(&ctx->ac, get_src(ctx, instr->src[0]));
3642 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3643 break;
3644 }
3645 case nir_intrinsic_vote_any: {
3646 LLVMValueRef tmp = ac_build_vote_any(&ctx->ac, get_src(ctx, instr->src[0]));
3647 result = LLVMBuildSExt(ctx->ac.builder, tmp, ctx->ac.i32, "");
3648 break;
3649 }
3650 case nir_intrinsic_shuffle:
3651 result = ac_build_shuffle(&ctx->ac, get_src(ctx, instr->src[0]),
3652 get_src(ctx, instr->src[1]));
3653 break;
3654 case nir_intrinsic_reduce:
3655 result = ac_build_reduce(&ctx->ac,
3656 get_src(ctx, instr->src[0]),
3657 instr->const_index[0],
3658 instr->const_index[1]);
3659 break;
3660 case nir_intrinsic_inclusive_scan:
3661 result = ac_build_inclusive_scan(&ctx->ac,
3662 get_src(ctx, instr->src[0]),
3663 instr->const_index[0]);
3664 break;
3665 case nir_intrinsic_exclusive_scan:
3666 result = ac_build_exclusive_scan(&ctx->ac,
3667 get_src(ctx, instr->src[0]),
3668 instr->const_index[0]);
3669 break;
3670 case nir_intrinsic_quad_broadcast: {
3671 unsigned lane = nir_src_as_uint(instr->src[1]);
3672 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3673 lane, lane, lane, lane);
3674 break;
3675 }
3676 case nir_intrinsic_quad_swap_horizontal:
3677 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 1, 0, 3 ,2);
3678 break;
3679 case nir_intrinsic_quad_swap_vertical:
3680 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 2, 3, 0 ,1);
3681 break;
3682 case nir_intrinsic_quad_swap_diagonal:
3683 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), 3, 2, 1 ,0);
3684 break;
3685 case nir_intrinsic_quad_swizzle_amd: {
3686 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3687 result = ac_build_quad_swizzle(&ctx->ac, get_src(ctx, instr->src[0]),
3688 mask & 0x3, (mask >> 2) & 0x3,
3689 (mask >> 4) & 0x3, (mask >> 6) & 0x3);
3690 break;
3691 }
3692 case nir_intrinsic_masked_swizzle_amd: {
3693 uint32_t mask = nir_intrinsic_swizzle_mask(instr);
3694 result = ac_build_ds_swizzle(&ctx->ac, get_src(ctx, instr->src[0]), mask);
3695 break;
3696 }
3697 case nir_intrinsic_write_invocation_amd:
3698 result = ac_build_writelane(&ctx->ac, get_src(ctx, instr->src[0]),
3699 get_src(ctx, instr->src[1]),
3700 get_src(ctx, instr->src[2]));
3701 break;
3702 case nir_intrinsic_mbcnt_amd:
3703 result = ac_build_mbcnt(&ctx->ac, get_src(ctx, instr->src[0]));
3704 break;
3705 case nir_intrinsic_load_scratch: {
3706 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3707 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3708 offset);
3709 LLVMTypeRef comp_type =
3710 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3711 LLVMTypeRef vec_type =
3712 instr->dest.ssa.num_components == 1 ? comp_type :
3713 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3714 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3715 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3716 LLVMPointerType(vec_type, addr_space), "");
3717 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3718 break;
3719 }
3720 case nir_intrinsic_store_scratch: {
3721 LLVMValueRef offset = get_src(ctx, instr->src[1]);
3722 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->scratch,
3723 offset);
3724 LLVMTypeRef comp_type =
3725 LLVMIntTypeInContext(ctx->ac.context, instr->src[0].ssa->bit_size);
3726 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3727 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3728 LLVMPointerType(comp_type, addr_space), "");
3729 LLVMValueRef src = get_src(ctx, instr->src[0]);
3730 unsigned wrmask = nir_intrinsic_write_mask(instr);
3731 while (wrmask) {
3732 int start, count;
3733 u_bit_scan_consecutive_range(&wrmask, &start, &count);
3734
3735 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, start, false);
3736 LLVMValueRef offset_ptr = LLVMBuildGEP(ctx->ac.builder, ptr, &offset, 1, "");
3737 LLVMTypeRef vec_type =
3738 count == 1 ? comp_type : LLVMVectorType(comp_type, count);
3739 offset_ptr = LLVMBuildBitCast(ctx->ac.builder,
3740 offset_ptr,
3741 LLVMPointerType(vec_type, addr_space),
3742 "");
3743 LLVMValueRef offset_src =
3744 ac_extract_components(&ctx->ac, src, start, count);
3745 LLVMBuildStore(ctx->ac.builder, offset_src, offset_ptr);
3746 }
3747 break;
3748 }
3749 case nir_intrinsic_load_constant: {
3750 LLVMValueRef offset = get_src(ctx, instr->src[0]);
3751 LLVMValueRef base = LLVMConstInt(ctx->ac.i32,
3752 nir_intrinsic_base(instr),
3753 false);
3754 offset = LLVMBuildAdd(ctx->ac.builder, offset, base, "");
3755 LLVMValueRef ptr = ac_build_gep0(&ctx->ac, ctx->constant_data,
3756 offset);
3757 LLVMTypeRef comp_type =
3758 LLVMIntTypeInContext(ctx->ac.context, instr->dest.ssa.bit_size);
3759 LLVMTypeRef vec_type =
3760 instr->dest.ssa.num_components == 1 ? comp_type :
3761 LLVMVectorType(comp_type, instr->dest.ssa.num_components);
3762 unsigned addr_space = LLVMGetPointerAddressSpace(LLVMTypeOf(ptr));
3763 ptr = LLVMBuildBitCast(ctx->ac.builder, ptr,
3764 LLVMPointerType(vec_type, addr_space), "");
3765 result = LLVMBuildLoad(ctx->ac.builder, ptr, "");
3766 break;
3767 }
3768 default:
3769 fprintf(stderr, "Unknown intrinsic: ");
3770 nir_print_instr(&instr->instr, stderr);
3771 fprintf(stderr, "\n");
3772 break;
3773 }
3774 if (result) {
3775 ctx->ssa_defs[instr->dest.ssa.index] = result;
3776 }
3777 }
3778
3779 static LLVMValueRef get_bindless_index_from_uniform(struct ac_nir_context *ctx,
3780 unsigned base_index,
3781 unsigned constant_index,
3782 LLVMValueRef dynamic_index)
3783 {
3784 LLVMValueRef offset = LLVMConstInt(ctx->ac.i32, base_index * 4, 0);
3785 LLVMValueRef index = LLVMBuildAdd(ctx->ac.builder, dynamic_index,
3786 LLVMConstInt(ctx->ac.i32, constant_index, 0), "");
3787
3788 /* Bindless uniforms are 64bit so multiple index by 8 */
3789 index = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i32, 8, 0), "");
3790 offset = LLVMBuildAdd(ctx->ac.builder, offset, index, "");
3791
3792 LLVMValueRef ubo_index = ctx->abi->load_ubo(ctx->abi, ctx->ac.i32_0);
3793
3794 LLVMValueRef ret = ac_build_buffer_load(&ctx->ac, ubo_index, 1, NULL, offset,
3795 NULL, 0, 0, true, true);
3796
3797 return LLVMBuildBitCast(ctx->ac.builder, ret, ctx->ac.i32, "");
3798 }
3799
3800 static LLVMValueRef get_sampler_desc(struct ac_nir_context *ctx,
3801 nir_deref_instr *deref_instr,
3802 enum ac_descriptor_type desc_type,
3803 const nir_instr *instr,
3804 bool image, bool write)
3805 {
3806 LLVMValueRef index = NULL;
3807 unsigned constant_index = 0;
3808 unsigned descriptor_set;
3809 unsigned base_index;
3810 bool bindless = false;
3811
3812 if (!deref_instr) {
3813 descriptor_set = 0;
3814 if (image) {
3815 nir_intrinsic_instr *img_instr = nir_instr_as_intrinsic(instr);
3816 base_index = 0;
3817 bindless = true;
3818 index = get_src(ctx, img_instr->src[0]);
3819 } else {
3820 nir_tex_instr *tex_instr = nir_instr_as_tex(instr);
3821 int sampSrcIdx = nir_tex_instr_src_index(tex_instr,
3822 nir_tex_src_sampler_handle);
3823 if (sampSrcIdx != -1) {
3824 base_index = 0;
3825 bindless = true;
3826 index = get_src(ctx, tex_instr->src[sampSrcIdx].src);
3827 } else {
3828 assert(tex_instr && !image);
3829 base_index = tex_instr->sampler_index;
3830 }
3831 }
3832 } else {
3833 while(deref_instr->deref_type != nir_deref_type_var) {
3834 if (deref_instr->deref_type == nir_deref_type_array) {
3835 unsigned array_size = glsl_get_aoa_size(deref_instr->type);
3836 if (!array_size)
3837 array_size = 1;
3838
3839 if (nir_src_is_const(deref_instr->arr.index)) {
3840 constant_index += array_size * nir_src_as_uint(deref_instr->arr.index);
3841 } else {
3842 LLVMValueRef indirect = get_src(ctx, deref_instr->arr.index);
3843
3844 indirect = LLVMBuildMul(ctx->ac.builder, indirect,
3845 LLVMConstInt(ctx->ac.i32, array_size, false), "");
3846
3847 if (!index)
3848 index = indirect;
3849 else
3850 index = LLVMBuildAdd(ctx->ac.builder, index, indirect, "");
3851 }
3852
3853 deref_instr = nir_src_as_deref(deref_instr->parent);
3854 } else if (deref_instr->deref_type == nir_deref_type_struct) {
3855 unsigned sidx = deref_instr->strct.index;
3856 deref_instr = nir_src_as_deref(deref_instr->parent);
3857 constant_index += glsl_get_struct_location_offset(deref_instr->type, sidx);
3858 } else {
3859 unreachable("Unsupported deref type");
3860 }
3861 }
3862 descriptor_set = deref_instr->var->data.descriptor_set;
3863
3864 if (deref_instr->var->data.bindless) {
3865 /* For now just assert on unhandled variable types */
3866 assert(deref_instr->var->data.mode == nir_var_uniform);
3867
3868 base_index = deref_instr->var->data.driver_location;
3869 bindless = true;
3870
3871 index = index ? index : ctx->ac.i32_0;
3872 index = get_bindless_index_from_uniform(ctx, base_index,
3873 constant_index, index);
3874 } else
3875 base_index = deref_instr->var->data.binding;
3876 }
3877
3878 return ctx->abi->load_sampler_desc(ctx->abi,
3879 descriptor_set,
3880 base_index,
3881 constant_index, index,
3882 desc_type, image, write, bindless);
3883 }
3884
3885 /* Disable anisotropic filtering if BASE_LEVEL == LAST_LEVEL.
3886 *
3887 * GFX6-GFX7:
3888 * If BASE_LEVEL == LAST_LEVEL, the shader must disable anisotropic
3889 * filtering manually. The driver sets img7 to a mask clearing
3890 * MAX_ANISO_RATIO if BASE_LEVEL == LAST_LEVEL. The shader must do:
3891 * s_and_b32 samp0, samp0, img7
3892 *
3893 * GFX8:
3894 * The ANISO_OVERRIDE sampler field enables this fix in TA.
3895 */
3896 static LLVMValueRef sici_fix_sampler_aniso(struct ac_nir_context *ctx,
3897 LLVMValueRef res, LLVMValueRef samp)
3898 {
3899 LLVMBuilderRef builder = ctx->ac.builder;
3900 LLVMValueRef img7, samp0;
3901
3902 if (ctx->ac.chip_class >= GFX8)
3903 return samp;
3904
3905 img7 = LLVMBuildExtractElement(builder, res,
3906 LLVMConstInt(ctx->ac.i32, 7, 0), "");
3907 samp0 = LLVMBuildExtractElement(builder, samp,
3908 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3909 samp0 = LLVMBuildAnd(builder, samp0, img7, "");
3910 return LLVMBuildInsertElement(builder, samp, samp0,
3911 LLVMConstInt(ctx->ac.i32, 0, 0), "");
3912 }
3913
3914 static void tex_fetch_ptrs(struct ac_nir_context *ctx,
3915 nir_tex_instr *instr,
3916 LLVMValueRef *res_ptr, LLVMValueRef *samp_ptr,
3917 LLVMValueRef *fmask_ptr)
3918 {
3919 nir_deref_instr *texture_deref_instr = NULL;
3920 nir_deref_instr *sampler_deref_instr = NULL;
3921 int plane = -1;
3922
3923 for (unsigned i = 0; i < instr->num_srcs; i++) {
3924 switch (instr->src[i].src_type) {
3925 case nir_tex_src_texture_deref:
3926 texture_deref_instr = nir_src_as_deref(instr->src[i].src);
3927 break;
3928 case nir_tex_src_sampler_deref:
3929 sampler_deref_instr = nir_src_as_deref(instr->src[i].src);
3930 break;
3931 case nir_tex_src_plane:
3932 plane = nir_src_as_int(instr->src[i].src);
3933 break;
3934 default:
3935 break;
3936 }
3937 }
3938
3939 if (!sampler_deref_instr)
3940 sampler_deref_instr = texture_deref_instr;
3941
3942 enum ac_descriptor_type main_descriptor = instr->sampler_dim == GLSL_SAMPLER_DIM_BUF ? AC_DESC_BUFFER : AC_DESC_IMAGE;
3943
3944 if (plane >= 0) {
3945 assert(instr->op != nir_texop_txf_ms &&
3946 instr->op != nir_texop_samples_identical);
3947 assert(instr->sampler_dim != GLSL_SAMPLER_DIM_BUF);
3948
3949 main_descriptor = AC_DESC_PLANE_0 + plane;
3950 }
3951
3952 *res_ptr = get_sampler_desc(ctx, texture_deref_instr, main_descriptor, &instr->instr, false, false);
3953
3954 if (samp_ptr) {
3955 *samp_ptr = get_sampler_desc(ctx, sampler_deref_instr, AC_DESC_SAMPLER, &instr->instr, false, false);
3956 if (instr->sampler_dim < GLSL_SAMPLER_DIM_RECT)
3957 *samp_ptr = sici_fix_sampler_aniso(ctx, *res_ptr, *samp_ptr);
3958 }
3959 if (fmask_ptr && (instr->op == nir_texop_txf_ms ||
3960 instr->op == nir_texop_samples_identical))
3961 *fmask_ptr = get_sampler_desc(ctx, texture_deref_instr, AC_DESC_FMASK, &instr->instr, false, false);
3962 }
3963
3964 static LLVMValueRef apply_round_slice(struct ac_llvm_context *ctx,
3965 LLVMValueRef coord)
3966 {
3967 coord = ac_to_float(ctx, coord);
3968 coord = ac_build_round(ctx, coord);
3969 coord = ac_to_integer(ctx, coord);
3970 return coord;
3971 }
3972
3973 static void visit_tex(struct ac_nir_context *ctx, nir_tex_instr *instr)
3974 {
3975 LLVMValueRef result = NULL;
3976 struct ac_image_args args = { 0 };
3977 LLVMValueRef fmask_ptr = NULL, sample_index = NULL;
3978 LLVMValueRef ddx = NULL, ddy = NULL;
3979 unsigned offset_src = 0;
3980
3981 tex_fetch_ptrs(ctx, instr, &args.resource, &args.sampler, &fmask_ptr);
3982
3983 for (unsigned i = 0; i < instr->num_srcs; i++) {
3984 switch (instr->src[i].src_type) {
3985 case nir_tex_src_coord: {
3986 LLVMValueRef coord = get_src(ctx, instr->src[i].src);
3987 for (unsigned chan = 0; chan < instr->coord_components; ++chan)
3988 args.coords[chan] = ac_llvm_extract_elem(&ctx->ac, coord, chan);
3989 break;
3990 }
3991 case nir_tex_src_projector:
3992 break;
3993 case nir_tex_src_comparator:
3994 if (instr->is_shadow) {
3995 args.compare = get_src(ctx, instr->src[i].src);
3996 args.compare = ac_to_float(&ctx->ac, args.compare);
3997 }
3998 break;
3999 case nir_tex_src_offset:
4000 args.offset = get_src(ctx, instr->src[i].src);
4001 offset_src = i;
4002 break;
4003 case nir_tex_src_bias:
4004 if (instr->op == nir_texop_txb)
4005 args.bias = get_src(ctx, instr->src[i].src);
4006 break;
4007 case nir_tex_src_lod: {
4008 if (nir_src_is_const(instr->src[i].src) && nir_src_as_uint(instr->src[i].src) == 0)
4009 args.level_zero = true;
4010 else
4011 args.lod = get_src(ctx, instr->src[i].src);
4012 break;
4013 }
4014 case nir_tex_src_ms_index:
4015 sample_index = get_src(ctx, instr->src[i].src);
4016 break;
4017 case nir_tex_src_ms_mcs:
4018 break;
4019 case nir_tex_src_ddx:
4020 ddx = get_src(ctx, instr->src[i].src);
4021 break;
4022 case nir_tex_src_ddy:
4023 ddy = get_src(ctx, instr->src[i].src);
4024 break;
4025 case nir_tex_src_texture_offset:
4026 case nir_tex_src_sampler_offset:
4027 case nir_tex_src_plane:
4028 default:
4029 break;
4030 }
4031 }
4032
4033 if (instr->op == nir_texop_txs && instr->sampler_dim == GLSL_SAMPLER_DIM_BUF) {
4034 result = get_buffer_size(ctx, args.resource, true);
4035 goto write_result;
4036 }
4037
4038 if (instr->op == nir_texop_texture_samples) {
4039 LLVMValueRef res, samples, is_msaa;
4040 res = LLVMBuildBitCast(ctx->ac.builder, args.resource, ctx->ac.v8i32, "");
4041 samples = LLVMBuildExtractElement(ctx->ac.builder, res,
4042 LLVMConstInt(ctx->ac.i32, 3, false), "");
4043 is_msaa = LLVMBuildLShr(ctx->ac.builder, samples,
4044 LLVMConstInt(ctx->ac.i32, 28, false), "");
4045 is_msaa = LLVMBuildAnd(ctx->ac.builder, is_msaa,
4046 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4047 is_msaa = LLVMBuildICmp(ctx->ac.builder, LLVMIntEQ, is_msaa,
4048 LLVMConstInt(ctx->ac.i32, 0xe, false), "");
4049
4050 samples = LLVMBuildLShr(ctx->ac.builder, samples,
4051 LLVMConstInt(ctx->ac.i32, 16, false), "");
4052 samples = LLVMBuildAnd(ctx->ac.builder, samples,
4053 LLVMConstInt(ctx->ac.i32, 0xf, false), "");
4054 samples = LLVMBuildShl(ctx->ac.builder, ctx->ac.i32_1,
4055 samples, "");
4056 samples = LLVMBuildSelect(ctx->ac.builder, is_msaa, samples,
4057 ctx->ac.i32_1, "");
4058 result = samples;
4059 goto write_result;
4060 }
4061
4062 if (args.offset && instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4063 LLVMValueRef offset[3], pack;
4064 for (unsigned chan = 0; chan < 3; ++chan)
4065 offset[chan] = ctx->ac.i32_0;
4066
4067 unsigned num_components = ac_get_llvm_num_components(args.offset);
4068 for (unsigned chan = 0; chan < num_components; chan++) {
4069 offset[chan] = ac_llvm_extract_elem(&ctx->ac, args.offset, chan);
4070 offset[chan] = LLVMBuildAnd(ctx->ac.builder, offset[chan],
4071 LLVMConstInt(ctx->ac.i32, 0x3f, false), "");
4072 if (chan)
4073 offset[chan] = LLVMBuildShl(ctx->ac.builder, offset[chan],
4074 LLVMConstInt(ctx->ac.i32, chan * 8, false), "");
4075 }
4076 pack = LLVMBuildOr(ctx->ac.builder, offset[0], offset[1], "");
4077 pack = LLVMBuildOr(ctx->ac.builder, pack, offset[2], "");
4078 args.offset = pack;
4079 }
4080
4081 /* Section 8.23.1 (Depth Texture Comparison Mode) of the
4082 * OpenGL 4.5 spec says:
4083 *
4084 * "If the texture’s internal format indicates a fixed-point
4085 * depth texture, then D_t and D_ref are clamped to the
4086 * range [0, 1]; otherwise no clamping is performed."
4087 *
4088 * TC-compatible HTILE promotes Z16 and Z24 to Z32_FLOAT,
4089 * so the depth comparison value isn't clamped for Z16 and
4090 * Z24 anymore. Do it manually here for GFX8-9; GFX10 has
4091 * an explicitly clamped 32-bit float format.
4092 */
4093 if (args.compare &&
4094 ctx->ac.chip_class >= GFX8 &&
4095 ctx->ac.chip_class <= GFX9 &&
4096 ctx->abi->clamp_shadow_reference) {
4097 LLVMValueRef upgraded, clamped;
4098
4099 upgraded = LLVMBuildExtractElement(ctx->ac.builder, args.sampler,
4100 LLVMConstInt(ctx->ac.i32, 3, false), "");
4101 upgraded = LLVMBuildLShr(ctx->ac.builder, upgraded,
4102 LLVMConstInt(ctx->ac.i32, 29, false), "");
4103 upgraded = LLVMBuildTrunc(ctx->ac.builder, upgraded, ctx->ac.i1, "");
4104 clamped = ac_build_clamp(&ctx->ac, args.compare);
4105 args.compare = LLVMBuildSelect(ctx->ac.builder, upgraded, clamped,
4106 args.compare, "");
4107 }
4108
4109 /* pack derivatives */
4110 if (ddx || ddy) {
4111 int num_src_deriv_channels, num_dest_deriv_channels;
4112 switch (instr->sampler_dim) {
4113 case GLSL_SAMPLER_DIM_3D:
4114 case GLSL_SAMPLER_DIM_CUBE:
4115 num_src_deriv_channels = 3;
4116 num_dest_deriv_channels = 3;
4117 break;
4118 case GLSL_SAMPLER_DIM_2D:
4119 default:
4120 num_src_deriv_channels = 2;
4121 num_dest_deriv_channels = 2;
4122 break;
4123 case GLSL_SAMPLER_DIM_1D:
4124 num_src_deriv_channels = 1;
4125 if (ctx->ac.chip_class == GFX9) {
4126 num_dest_deriv_channels = 2;
4127 } else {
4128 num_dest_deriv_channels = 1;
4129 }
4130 break;
4131 }
4132
4133 for (unsigned i = 0; i < num_src_deriv_channels; i++) {
4134 args.derivs[i] = ac_to_float(&ctx->ac,
4135 ac_llvm_extract_elem(&ctx->ac, ddx, i));
4136 args.derivs[num_dest_deriv_channels + i] = ac_to_float(&ctx->ac,
4137 ac_llvm_extract_elem(&ctx->ac, ddy, i));
4138 }
4139 for (unsigned i = num_src_deriv_channels; i < num_dest_deriv_channels; i++) {
4140 args.derivs[i] = ctx->ac.f32_0;
4141 args.derivs[num_dest_deriv_channels + i] = ctx->ac.f32_0;
4142 }
4143 }
4144
4145 if (instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE && args.coords[0]) {
4146 for (unsigned chan = 0; chan < instr->coord_components; chan++)
4147 args.coords[chan] = ac_to_float(&ctx->ac, args.coords[chan]);
4148 if (instr->coord_components == 3)
4149 args.coords[3] = LLVMGetUndef(ctx->ac.f32);
4150 ac_prepare_cube_coords(&ctx->ac,
4151 instr->op == nir_texop_txd, instr->is_array,
4152 instr->op == nir_texop_lod, args.coords, args.derivs);
4153 }
4154
4155 /* Texture coordinates fixups */
4156 if (instr->coord_components > 1 &&
4157 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4158 instr->is_array &&
4159 instr->op != nir_texop_txf) {
4160 args.coords[1] = apply_round_slice(&ctx->ac, args.coords[1]);
4161 }
4162
4163 if (instr->coord_components > 2 &&
4164 (instr->sampler_dim == GLSL_SAMPLER_DIM_2D ||
4165 instr->sampler_dim == GLSL_SAMPLER_DIM_MS ||
4166 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS ||
4167 instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS) &&
4168 instr->is_array &&
4169 instr->op != nir_texop_txf && instr->op != nir_texop_txf_ms) {
4170 args.coords[2] = apply_round_slice(&ctx->ac, args.coords[2]);
4171 }
4172
4173 if (ctx->ac.chip_class == GFX9 &&
4174 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4175 instr->op != nir_texop_lod) {
4176 LLVMValueRef filler;
4177 if (instr->op == nir_texop_txf)
4178 filler = ctx->ac.i32_0;
4179 else
4180 filler = LLVMConstReal(ctx->ac.f32, 0.5);
4181
4182 if (instr->is_array)
4183 args.coords[2] = args.coords[1];
4184 args.coords[1] = filler;
4185 }
4186
4187 /* Pack sample index */
4188 if (instr->op == nir_texop_txf_ms && sample_index)
4189 args.coords[instr->coord_components] = sample_index;
4190
4191 if (instr->op == nir_texop_samples_identical) {
4192 struct ac_image_args txf_args = { 0 };
4193 memcpy(txf_args.coords, args.coords, sizeof(txf_args.coords));
4194
4195 txf_args.dmask = 0xf;
4196 txf_args.resource = fmask_ptr;
4197 txf_args.dim = instr->is_array ? ac_image_2darray : ac_image_2d;
4198 result = build_tex_intrinsic(ctx, instr, &txf_args);
4199
4200 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4201 result = emit_int_cmp(&ctx->ac, LLVMIntEQ, result, ctx->ac.i32_0);
4202 goto write_result;
4203 }
4204
4205 if ((instr->sampler_dim == GLSL_SAMPLER_DIM_SUBPASS_MS ||
4206 instr->sampler_dim == GLSL_SAMPLER_DIM_MS) &&
4207 instr->op != nir_texop_txs) {
4208 unsigned sample_chan = instr->is_array ? 3 : 2;
4209 args.coords[sample_chan] = adjust_sample_index_using_fmask(
4210 &ctx->ac, args.coords[0], args.coords[1],
4211 instr->is_array ? args.coords[2] : NULL,
4212 args.coords[sample_chan], fmask_ptr);
4213 }
4214
4215 if (args.offset && (instr->op == nir_texop_txf || instr->op == nir_texop_txf_ms)) {
4216 int num_offsets = instr->src[offset_src].src.ssa->num_components;
4217 num_offsets = MIN2(num_offsets, instr->coord_components);
4218 for (unsigned i = 0; i < num_offsets; ++i) {
4219 args.coords[i] = LLVMBuildAdd(
4220 ctx->ac.builder, args.coords[i],
4221 LLVMConstInt(ctx->ac.i32, nir_src_comp_as_uint(instr->src[offset_src].src, i), false), "");
4222 }
4223 args.offset = NULL;
4224 }
4225
4226 /* DMASK was repurposed for GATHER4. 4 components are always
4227 * returned and DMASK works like a swizzle - it selects
4228 * the component to fetch. The only valid DMASK values are
4229 * 1=red, 2=green, 4=blue, 8=alpha. (e.g. 1 returns
4230 * (red,red,red,red) etc.) The ISA document doesn't mention
4231 * this.
4232 */
4233 args.dmask = 0xf;
4234 if (instr->op == nir_texop_tg4) {
4235 if (instr->is_shadow)
4236 args.dmask = 1;
4237 else
4238 args.dmask = 1 << instr->component;
4239 }
4240
4241 if (instr->sampler_dim != GLSL_SAMPLER_DIM_BUF) {
4242 args.dim = ac_get_sampler_dim(ctx->ac.chip_class, instr->sampler_dim, instr->is_array);
4243 args.unorm = instr->sampler_dim == GLSL_SAMPLER_DIM_RECT;
4244 }
4245 result = build_tex_intrinsic(ctx, instr, &args);
4246
4247 if (instr->op == nir_texop_query_levels)
4248 result = LLVMBuildExtractElement(ctx->ac.builder, result, LLVMConstInt(ctx->ac.i32, 3, false), "");
4249 else if (instr->is_shadow && instr->is_new_style_shadow &&
4250 instr->op != nir_texop_txs && instr->op != nir_texop_lod &&
4251 instr->op != nir_texop_tg4)
4252 result = LLVMBuildExtractElement(ctx->ac.builder, result, ctx->ac.i32_0, "");
4253 else if (instr->op == nir_texop_txs &&
4254 instr->sampler_dim == GLSL_SAMPLER_DIM_CUBE &&
4255 instr->is_array) {
4256 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4257 LLVMValueRef six = LLVMConstInt(ctx->ac.i32, 6, false);
4258 LLVMValueRef z = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4259 z = LLVMBuildSDiv(ctx->ac.builder, z, six, "");
4260 result = LLVMBuildInsertElement(ctx->ac.builder, result, z, two, "");
4261 } else if (ctx->ac.chip_class == GFX9 &&
4262 instr->op == nir_texop_txs &&
4263 instr->sampler_dim == GLSL_SAMPLER_DIM_1D &&
4264 instr->is_array) {
4265 LLVMValueRef two = LLVMConstInt(ctx->ac.i32, 2, false);
4266 LLVMValueRef layers = LLVMBuildExtractElement(ctx->ac.builder, result, two, "");
4267 result = LLVMBuildInsertElement(ctx->ac.builder, result, layers,
4268 ctx->ac.i32_1, "");
4269 } else if (instr->dest.ssa.num_components != 4)
4270 result = ac_trim_vector(&ctx->ac, result, instr->dest.ssa.num_components);
4271
4272 write_result:
4273 if (result) {
4274 assert(instr->dest.is_ssa);
4275 result = ac_to_integer(&ctx->ac, result);
4276 ctx->ssa_defs[instr->dest.ssa.index] = result;
4277 }
4278 }
4279
4280
4281 static void visit_phi(struct ac_nir_context *ctx, nir_phi_instr *instr)
4282 {
4283 LLVMTypeRef type = get_def_type(ctx, &instr->dest.ssa);
4284 LLVMValueRef result = LLVMBuildPhi(ctx->ac.builder, type, "");
4285
4286 ctx->ssa_defs[instr->dest.ssa.index] = result;
4287 _mesa_hash_table_insert(ctx->phis, instr, result);
4288 }
4289
4290 static void visit_post_phi(struct ac_nir_context *ctx,
4291 nir_phi_instr *instr,
4292 LLVMValueRef llvm_phi)
4293 {
4294 nir_foreach_phi_src(src, instr) {
4295 LLVMBasicBlockRef block = get_block(ctx, src->pred);
4296 LLVMValueRef llvm_src = get_src(ctx, src->src);
4297
4298 LLVMAddIncoming(llvm_phi, &llvm_src, &block, 1);
4299 }
4300 }
4301
4302 static void phi_post_pass(struct ac_nir_context *ctx)
4303 {
4304 hash_table_foreach(ctx->phis, entry) {
4305 visit_post_phi(ctx, (nir_phi_instr*)entry->key,
4306 (LLVMValueRef)entry->data);
4307 }
4308 }
4309
4310
4311 static void visit_ssa_undef(struct ac_nir_context *ctx,
4312 const nir_ssa_undef_instr *instr)
4313 {
4314 unsigned num_components = instr->def.num_components;
4315 LLVMTypeRef type = LLVMIntTypeInContext(ctx->ac.context, instr->def.bit_size);
4316 LLVMValueRef undef;
4317
4318 if (num_components == 1)
4319 undef = LLVMGetUndef(type);
4320 else {
4321 undef = LLVMGetUndef(LLVMVectorType(type, num_components));
4322 }
4323 ctx->ssa_defs[instr->def.index] = undef;
4324 }
4325
4326 static void visit_jump(struct ac_llvm_context *ctx,
4327 const nir_jump_instr *instr)
4328 {
4329 switch (instr->type) {
4330 case nir_jump_break:
4331 ac_build_break(ctx);
4332 break;
4333 case nir_jump_continue:
4334 ac_build_continue(ctx);
4335 break;
4336 default:
4337 fprintf(stderr, "Unknown NIR jump instr: ");
4338 nir_print_instr(&instr->instr, stderr);
4339 fprintf(stderr, "\n");
4340 abort();
4341 }
4342 }
4343
4344 static LLVMTypeRef
4345 glsl_base_to_llvm_type(struct ac_llvm_context *ac,
4346 enum glsl_base_type type)
4347 {
4348 switch (type) {
4349 case GLSL_TYPE_INT:
4350 case GLSL_TYPE_UINT:
4351 case GLSL_TYPE_BOOL:
4352 case GLSL_TYPE_SUBROUTINE:
4353 return ac->i32;
4354 case GLSL_TYPE_INT8:
4355 case GLSL_TYPE_UINT8:
4356 return ac->i8;
4357 case GLSL_TYPE_INT16:
4358 case GLSL_TYPE_UINT16:
4359 return ac->i16;
4360 case GLSL_TYPE_FLOAT:
4361 return ac->f32;
4362 case GLSL_TYPE_FLOAT16:
4363 return ac->f16;
4364 case GLSL_TYPE_INT64:
4365 case GLSL_TYPE_UINT64:
4366 return ac->i64;
4367 case GLSL_TYPE_DOUBLE:
4368 return ac->f64;
4369 default:
4370 unreachable("unknown GLSL type");
4371 }
4372 }
4373
4374 static LLVMTypeRef
4375 glsl_to_llvm_type(struct ac_llvm_context *ac,
4376 const struct glsl_type *type)
4377 {
4378 if (glsl_type_is_scalar(type)) {
4379 return glsl_base_to_llvm_type(ac, glsl_get_base_type(type));
4380 }
4381
4382 if (glsl_type_is_vector(type)) {
4383 return LLVMVectorType(
4384 glsl_base_to_llvm_type(ac, glsl_get_base_type(type)),
4385 glsl_get_vector_elements(type));
4386 }
4387
4388 if (glsl_type_is_matrix(type)) {
4389 return LLVMArrayType(
4390 glsl_to_llvm_type(ac, glsl_get_column_type(type)),
4391 glsl_get_matrix_columns(type));
4392 }
4393
4394 if (glsl_type_is_array(type)) {
4395 return LLVMArrayType(
4396 glsl_to_llvm_type(ac, glsl_get_array_element(type)),
4397 glsl_get_length(type));
4398 }
4399
4400 assert(glsl_type_is_struct_or_ifc(type));
4401
4402 LLVMTypeRef member_types[glsl_get_length(type)];
4403
4404 for (unsigned i = 0; i < glsl_get_length(type); i++) {
4405 member_types[i] =
4406 glsl_to_llvm_type(ac,
4407 glsl_get_struct_field(type, i));
4408 }
4409
4410 return LLVMStructTypeInContext(ac->context, member_types,
4411 glsl_get_length(type), false);
4412 }
4413
4414 static void visit_deref(struct ac_nir_context *ctx,
4415 nir_deref_instr *instr)
4416 {
4417 if (instr->mode != nir_var_mem_shared &&
4418 instr->mode != nir_var_mem_global)
4419 return;
4420
4421 LLVMValueRef result = NULL;
4422 switch(instr->deref_type) {
4423 case nir_deref_type_var: {
4424 struct hash_entry *entry = _mesa_hash_table_search(ctx->vars, instr->var);
4425 result = entry->data;
4426 break;
4427 }
4428 case nir_deref_type_struct:
4429 if (instr->mode == nir_var_mem_global) {
4430 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4431 uint64_t offset = glsl_get_struct_field_offset(parent->type,
4432 instr->strct.index);
4433 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4434 LLVMConstInt(ctx->ac.i32, offset, 0));
4435 } else {
4436 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4437 LLVMConstInt(ctx->ac.i32, instr->strct.index, 0));
4438 }
4439 break;
4440 case nir_deref_type_array:
4441 if (instr->mode == nir_var_mem_global) {
4442 nir_deref_instr *parent = nir_deref_instr_parent(instr);
4443 unsigned stride = glsl_get_explicit_stride(parent->type);
4444
4445 if ((glsl_type_is_matrix(parent->type) &&
4446 glsl_matrix_type_is_row_major(parent->type)) ||
4447 (glsl_type_is_vector(parent->type) && stride == 0))
4448 stride = type_scalar_size_bytes(parent->type);
4449
4450 assert(stride > 0);
4451 LLVMValueRef index = get_src(ctx, instr->arr.index);
4452 if (LLVMTypeOf(index) != ctx->ac.i64)
4453 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4454
4455 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4456
4457 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4458 } else {
4459 result = ac_build_gep0(&ctx->ac, get_src(ctx, instr->parent),
4460 get_src(ctx, instr->arr.index));
4461 }
4462 break;
4463 case nir_deref_type_ptr_as_array:
4464 if (instr->mode == nir_var_mem_global) {
4465 unsigned stride = nir_deref_instr_ptr_as_array_stride(instr);
4466
4467 LLVMValueRef index = get_src(ctx, instr->arr.index);
4468 if (LLVMTypeOf(index) != ctx->ac.i64)
4469 index = LLVMBuildZExt(ctx->ac.builder, index, ctx->ac.i64, "");
4470
4471 LLVMValueRef offset = LLVMBuildMul(ctx->ac.builder, index, LLVMConstInt(ctx->ac.i64, stride, 0), "");
4472
4473 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent), offset);
4474 } else {
4475 result = ac_build_gep_ptr(&ctx->ac, get_src(ctx, instr->parent),
4476 get_src(ctx, instr->arr.index));
4477 }
4478 break;
4479 case nir_deref_type_cast: {
4480 result = get_src(ctx, instr->parent);
4481
4482 /* We can't use the structs from LLVM because the shader
4483 * specifies its own offsets. */
4484 LLVMTypeRef pointee_type = ctx->ac.i8;
4485 if (instr->mode == nir_var_mem_shared)
4486 pointee_type = glsl_to_llvm_type(&ctx->ac, instr->type);
4487
4488 unsigned address_space;
4489
4490 switch(instr->mode) {
4491 case nir_var_mem_shared:
4492 address_space = AC_ADDR_SPACE_LDS;
4493 break;
4494 case nir_var_mem_global:
4495 address_space = AC_ADDR_SPACE_GLOBAL;
4496 break;
4497 default:
4498 unreachable("Unhandled address space");
4499 }
4500
4501 LLVMTypeRef type = LLVMPointerType(pointee_type, address_space);
4502
4503 if (LLVMTypeOf(result) != type) {
4504 if (LLVMGetTypeKind(LLVMTypeOf(result)) == LLVMVectorTypeKind) {
4505 result = LLVMBuildBitCast(ctx->ac.builder, result,
4506 type, "");
4507 } else {
4508 result = LLVMBuildIntToPtr(ctx->ac.builder, result,
4509 type, "");
4510 }
4511 }
4512 break;
4513 }
4514 default:
4515 unreachable("Unhandled deref_instr deref type");
4516 }
4517
4518 ctx->ssa_defs[instr->dest.ssa.index] = result;
4519 }
4520
4521 static void visit_cf_list(struct ac_nir_context *ctx,
4522 struct exec_list *list);
4523
4524 static void visit_block(struct ac_nir_context *ctx, nir_block *block)
4525 {
4526 nir_foreach_instr(instr, block)
4527 {
4528 switch (instr->type) {
4529 case nir_instr_type_alu:
4530 visit_alu(ctx, nir_instr_as_alu(instr));
4531 break;
4532 case nir_instr_type_load_const:
4533 visit_load_const(ctx, nir_instr_as_load_const(instr));
4534 break;
4535 case nir_instr_type_intrinsic:
4536 visit_intrinsic(ctx, nir_instr_as_intrinsic(instr));
4537 break;
4538 case nir_instr_type_tex:
4539 visit_tex(ctx, nir_instr_as_tex(instr));
4540 break;
4541 case nir_instr_type_phi:
4542 visit_phi(ctx, nir_instr_as_phi(instr));
4543 break;
4544 case nir_instr_type_ssa_undef:
4545 visit_ssa_undef(ctx, nir_instr_as_ssa_undef(instr));
4546 break;
4547 case nir_instr_type_jump:
4548 visit_jump(&ctx->ac, nir_instr_as_jump(instr));
4549 break;
4550 case nir_instr_type_deref:
4551 visit_deref(ctx, nir_instr_as_deref(instr));
4552 break;
4553 default:
4554 fprintf(stderr, "Unknown NIR instr type: ");
4555 nir_print_instr(instr, stderr);
4556 fprintf(stderr, "\n");
4557 abort();
4558 }
4559 }
4560
4561 _mesa_hash_table_insert(ctx->defs, block,
4562 LLVMGetInsertBlock(ctx->ac.builder));
4563 }
4564
4565 static void visit_if(struct ac_nir_context *ctx, nir_if *if_stmt)
4566 {
4567 LLVMValueRef value = get_src(ctx, if_stmt->condition);
4568
4569 nir_block *then_block =
4570 (nir_block *) exec_list_get_head(&if_stmt->then_list);
4571
4572 ac_build_uif(&ctx->ac, value, then_block->index);
4573
4574 visit_cf_list(ctx, &if_stmt->then_list);
4575
4576 if (!exec_list_is_empty(&if_stmt->else_list)) {
4577 nir_block *else_block =
4578 (nir_block *) exec_list_get_head(&if_stmt->else_list);
4579
4580 ac_build_else(&ctx->ac, else_block->index);
4581 visit_cf_list(ctx, &if_stmt->else_list);
4582 }
4583
4584 ac_build_endif(&ctx->ac, then_block->index);
4585 }
4586
4587 static void visit_loop(struct ac_nir_context *ctx, nir_loop *loop)
4588 {
4589 nir_block *first_loop_block =
4590 (nir_block *) exec_list_get_head(&loop->body);
4591
4592 ac_build_bgnloop(&ctx->ac, first_loop_block->index);
4593
4594 visit_cf_list(ctx, &loop->body);
4595
4596 ac_build_endloop(&ctx->ac, first_loop_block->index);
4597 }
4598
4599 static void visit_cf_list(struct ac_nir_context *ctx,
4600 struct exec_list *list)
4601 {
4602 foreach_list_typed(nir_cf_node, node, node, list)
4603 {
4604 switch (node->type) {
4605 case nir_cf_node_block:
4606 visit_block(ctx, nir_cf_node_as_block(node));
4607 break;
4608
4609 case nir_cf_node_if:
4610 visit_if(ctx, nir_cf_node_as_if(node));
4611 break;
4612
4613 case nir_cf_node_loop:
4614 visit_loop(ctx, nir_cf_node_as_loop(node));
4615 break;
4616
4617 default:
4618 assert(0);
4619 }
4620 }
4621 }
4622
4623 void
4624 ac_handle_shader_output_decl(struct ac_llvm_context *ctx,
4625 struct ac_shader_abi *abi,
4626 struct nir_shader *nir,
4627 struct nir_variable *variable,
4628 gl_shader_stage stage)
4629 {
4630 unsigned output_loc = variable->data.driver_location / 4;
4631 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4632
4633 /* tess ctrl has it's own load/store paths for outputs */
4634 if (stage == MESA_SHADER_TESS_CTRL)
4635 return;
4636
4637 if (stage == MESA_SHADER_VERTEX ||
4638 stage == MESA_SHADER_TESS_EVAL ||
4639 stage == MESA_SHADER_GEOMETRY) {
4640 int idx = variable->data.location + variable->data.index;
4641 if (idx == VARYING_SLOT_CLIP_DIST0) {
4642 int length = nir->info.clip_distance_array_size +
4643 nir->info.cull_distance_array_size;
4644
4645 if (length > 4)
4646 attrib_count = 2;
4647 else
4648 attrib_count = 1;
4649 }
4650 }
4651
4652 bool is_16bit = glsl_type_is_16bit(glsl_without_array(variable->type));
4653 LLVMTypeRef type = is_16bit ? ctx->f16 : ctx->f32;
4654 for (unsigned i = 0; i < attrib_count; ++i) {
4655 for (unsigned chan = 0; chan < 4; chan++) {
4656 abi->outputs[ac_llvm_reg_index_soa(output_loc + i, chan)] =
4657 ac_build_alloca_undef(ctx, type, "");
4658 }
4659 }
4660 }
4661
4662 static void
4663 setup_locals(struct ac_nir_context *ctx,
4664 struct nir_function *func)
4665 {
4666 int i, j;
4667 ctx->num_locals = 0;
4668 nir_foreach_variable(variable, &func->impl->locals) {
4669 unsigned attrib_count = glsl_count_attribute_slots(variable->type, false);
4670 variable->data.driver_location = ctx->num_locals * 4;
4671 variable->data.location_frac = 0;
4672 ctx->num_locals += attrib_count;
4673 }
4674 ctx->locals = malloc(4 * ctx->num_locals * sizeof(LLVMValueRef));
4675 if (!ctx->locals)
4676 return;
4677
4678 for (i = 0; i < ctx->num_locals; i++) {
4679 for (j = 0; j < 4; j++) {
4680 ctx->locals[i * 4 + j] =
4681 ac_build_alloca_undef(&ctx->ac, ctx->ac.f32, "temp");
4682 }
4683 }
4684 }
4685
4686 static void
4687 setup_scratch(struct ac_nir_context *ctx,
4688 struct nir_shader *shader)
4689 {
4690 if (shader->scratch_size == 0)
4691 return;
4692
4693 ctx->scratch = ac_build_alloca_undef(&ctx->ac,
4694 LLVMArrayType(ctx->ac.i8, shader->scratch_size),
4695 "scratch");
4696 }
4697
4698 static void
4699 setup_constant_data(struct ac_nir_context *ctx,
4700 struct nir_shader *shader)
4701 {
4702 if (!shader->constant_data)
4703 return;
4704
4705 LLVMValueRef data =
4706 LLVMConstStringInContext(ctx->ac.context,
4707 shader->constant_data,
4708 shader->constant_data_size,
4709 true);
4710 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8, shader->constant_data_size);
4711
4712 /* We want to put the constant data in the CONST address space so that
4713 * we can use scalar loads. However, LLVM versions before 10 put these
4714 * variables in the same section as the code, which is unacceptable
4715 * for RadeonSI as it needs to relocate all the data sections after
4716 * the code sections. See https://reviews.llvm.org/D65813.
4717 */
4718 unsigned address_space =
4719 LLVM_VERSION_MAJOR < 10 ? AC_ADDR_SPACE_GLOBAL : AC_ADDR_SPACE_CONST;
4720
4721 LLVMValueRef global =
4722 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4723 "const_data",
4724 address_space);
4725
4726 LLVMSetInitializer(global, data);
4727 LLVMSetGlobalConstant(global, true);
4728 LLVMSetVisibility(global, LLVMHiddenVisibility);
4729 ctx->constant_data = global;
4730 }
4731
4732 static void
4733 setup_shared(struct ac_nir_context *ctx,
4734 struct nir_shader *nir)
4735 {
4736 if (ctx->ac.lds)
4737 return;
4738
4739 LLVMTypeRef type = LLVMArrayType(ctx->ac.i8,
4740 nir->info.cs.shared_size);
4741
4742 LLVMValueRef lds =
4743 LLVMAddGlobalInAddressSpace(ctx->ac.module, type,
4744 "compute_lds",
4745 AC_ADDR_SPACE_LDS);
4746 LLVMSetAlignment(lds, 64 * 1024);
4747
4748 ctx->ac.lds = LLVMBuildBitCast(ctx->ac.builder, lds,
4749 LLVMPointerType(ctx->ac.i8,
4750 AC_ADDR_SPACE_LDS), "");
4751 }
4752
4753 void ac_nir_translate(struct ac_llvm_context *ac, struct ac_shader_abi *abi,
4754 const struct ac_shader_args *args, struct nir_shader *nir)
4755 {
4756 struct ac_nir_context ctx = {};
4757 struct nir_function *func;
4758
4759 ctx.ac = *ac;
4760 ctx.abi = abi;
4761 ctx.args = args;
4762
4763 ctx.stage = nir->info.stage;
4764 ctx.info = &nir->info;
4765
4766 ctx.main_function = LLVMGetBasicBlockParent(LLVMGetInsertBlock(ctx.ac.builder));
4767
4768 nir_foreach_variable(variable, &nir->outputs)
4769 ac_handle_shader_output_decl(&ctx.ac, ctx.abi, nir, variable,
4770 ctx.stage);
4771
4772 ctx.defs = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4773 _mesa_key_pointer_equal);
4774 ctx.phis = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4775 _mesa_key_pointer_equal);
4776 ctx.vars = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
4777 _mesa_key_pointer_equal);
4778
4779 func = (struct nir_function *)exec_list_get_head(&nir->functions);
4780
4781 nir_index_ssa_defs(func->impl);
4782 ctx.ssa_defs = calloc(func->impl->ssa_alloc, sizeof(LLVMValueRef));
4783
4784 setup_locals(&ctx, func);
4785 setup_scratch(&ctx, nir);
4786 setup_constant_data(&ctx, nir);
4787
4788 if (gl_shader_stage_is_compute(nir->info.stage))
4789 setup_shared(&ctx, nir);
4790
4791 visit_cf_list(&ctx, &func->impl->body);
4792 phi_post_pass(&ctx);
4793
4794 if (!gl_shader_stage_is_compute(nir->info.stage))
4795 ctx.abi->emit_outputs(ctx.abi, AC_LLVM_MAX_OUTPUTS,
4796 ctx.abi->outputs);
4797
4798 free(ctx.locals);
4799 free(ctx.ssa_defs);
4800 ralloc_free(ctx.defs);
4801 ralloc_free(ctx.phis);
4802 ralloc_free(ctx.vars);
4803 }
4804
4805 bool
4806 ac_lower_indirect_derefs(struct nir_shader *nir, enum chip_class chip_class)
4807 {
4808 bool progress = false;
4809
4810 /* Lower large variables to scratch first so that we won't bloat the
4811 * shader by generating large if ladders for them. We later lower
4812 * scratch to alloca's, assuming LLVM won't generate VGPR indexing.
4813 */
4814 NIR_PASS(progress, nir, nir_lower_vars_to_scratch,
4815 nir_var_function_temp,
4816 256,
4817 glsl_get_natural_size_align_bytes);
4818
4819 /* While it would be nice not to have this flag, we are constrained
4820 * by the reality that LLVM 9.0 has buggy VGPR indexing on GFX9.
4821 */
4822 bool llvm_has_working_vgpr_indexing = chip_class != GFX9;
4823
4824 /* TODO: Indirect indexing of GS inputs is unimplemented.
4825 *
4826 * TCS and TES load inputs directly from LDS or offchip memory, so
4827 * indirect indexing is trivial.
4828 */
4829 nir_variable_mode indirect_mask = 0;
4830 if (nir->info.stage == MESA_SHADER_GEOMETRY ||
4831 (nir->info.stage != MESA_SHADER_TESS_CTRL &&
4832 nir->info.stage != MESA_SHADER_TESS_EVAL &&
4833 !llvm_has_working_vgpr_indexing)) {
4834 indirect_mask |= nir_var_shader_in;
4835 }
4836 if (!llvm_has_working_vgpr_indexing &&
4837 nir->info.stage != MESA_SHADER_TESS_CTRL)
4838 indirect_mask |= nir_var_shader_out;
4839
4840 /* TODO: We shouldn't need to do this, however LLVM isn't currently
4841 * smart enough to handle indirects without causing excess spilling
4842 * causing the gpu to hang.
4843 *
4844 * See the following thread for more details of the problem:
4845 * https://lists.freedesktop.org/archives/mesa-dev/2017-July/162106.html
4846 */
4847 indirect_mask |= nir_var_function_temp;
4848
4849 progress |= nir_lower_indirect_derefs(nir, indirect_mask);
4850 return progress;
4851 }
4852
4853 static unsigned
4854 get_inst_tessfactor_writemask(nir_intrinsic_instr *intrin)
4855 {
4856 if (intrin->intrinsic != nir_intrinsic_store_deref)
4857 return 0;
4858
4859 nir_variable *var =
4860 nir_deref_instr_get_variable(nir_src_as_deref(intrin->src[0]));
4861
4862 if (var->data.mode != nir_var_shader_out)
4863 return 0;
4864
4865 unsigned writemask = 0;
4866 const int location = var->data.location;
4867 unsigned first_component = var->data.location_frac;
4868 unsigned num_comps = intrin->dest.ssa.num_components;
4869
4870 if (location == VARYING_SLOT_TESS_LEVEL_INNER)
4871 writemask = ((1 << (num_comps + 1)) - 1) << first_component;
4872 else if (location == VARYING_SLOT_TESS_LEVEL_OUTER)
4873 writemask = (((1 << (num_comps + 1)) - 1) << first_component) << 4;
4874
4875 return writemask;
4876 }
4877
4878 static void
4879 scan_tess_ctrl(nir_cf_node *cf_node, unsigned *upper_block_tf_writemask,
4880 unsigned *cond_block_tf_writemask,
4881 bool *tessfactors_are_def_in_all_invocs, bool is_nested_cf)
4882 {
4883 switch (cf_node->type) {
4884 case nir_cf_node_block: {
4885 nir_block *block = nir_cf_node_as_block(cf_node);
4886 nir_foreach_instr(instr, block) {
4887 if (instr->type != nir_instr_type_intrinsic)
4888 continue;
4889
4890 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
4891 if (intrin->intrinsic == nir_intrinsic_barrier) {
4892
4893 /* If we find a barrier in nested control flow put this in the
4894 * too hard basket. In GLSL this is not possible but it is in
4895 * SPIR-V.
4896 */
4897 if (is_nested_cf) {
4898 *tessfactors_are_def_in_all_invocs = false;
4899 return;
4900 }
4901
4902 /* The following case must be prevented:
4903 * gl_TessLevelInner = ...;
4904 * barrier();
4905 * if (gl_InvocationID == 1)
4906 * gl_TessLevelInner = ...;
4907 *
4908 * If you consider disjoint code segments separated by barriers, each
4909 * such segment that writes tess factor channels should write the same
4910 * channels in all codepaths within that segment.
4911 */
4912 if (upper_block_tf_writemask || cond_block_tf_writemask) {
4913 /* Accumulate the result: */
4914 *tessfactors_are_def_in_all_invocs &=
4915 !(*cond_block_tf_writemask & ~(*upper_block_tf_writemask));
4916
4917 /* Analyze the next code segment from scratch. */
4918 *upper_block_tf_writemask = 0;
4919 *cond_block_tf_writemask = 0;
4920 }
4921 } else
4922 *upper_block_tf_writemask |= get_inst_tessfactor_writemask(intrin);
4923 }
4924
4925 break;
4926 }
4927 case nir_cf_node_if: {
4928 unsigned then_tessfactor_writemask = 0;
4929 unsigned else_tessfactor_writemask = 0;
4930
4931 nir_if *if_stmt = nir_cf_node_as_if(cf_node);
4932 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->then_list) {
4933 scan_tess_ctrl(nested_node, &then_tessfactor_writemask,
4934 cond_block_tf_writemask,
4935 tessfactors_are_def_in_all_invocs, true);
4936 }
4937
4938 foreach_list_typed(nir_cf_node, nested_node, node, &if_stmt->else_list) {
4939 scan_tess_ctrl(nested_node, &else_tessfactor_writemask,
4940 cond_block_tf_writemask,
4941 tessfactors_are_def_in_all_invocs, true);
4942 }
4943
4944 if (then_tessfactor_writemask || else_tessfactor_writemask) {
4945 /* If both statements write the same tess factor channels,
4946 * we can say that the upper block writes them too.
4947 */
4948 *upper_block_tf_writemask |= then_tessfactor_writemask &
4949 else_tessfactor_writemask;
4950 *cond_block_tf_writemask |= then_tessfactor_writemask |
4951 else_tessfactor_writemask;
4952 }
4953
4954 break;
4955 }
4956 case nir_cf_node_loop: {
4957 nir_loop *loop = nir_cf_node_as_loop(cf_node);
4958 foreach_list_typed(nir_cf_node, nested_node, node, &loop->body) {
4959 scan_tess_ctrl(nested_node, cond_block_tf_writemask,
4960 cond_block_tf_writemask,
4961 tessfactors_are_def_in_all_invocs, true);
4962 }
4963
4964 break;
4965 }
4966 default:
4967 unreachable("unknown cf node type");
4968 }
4969 }
4970
4971 bool
4972 ac_are_tessfactors_def_in_all_invocs(const struct nir_shader *nir)
4973 {
4974 assert(nir->info.stage == MESA_SHADER_TESS_CTRL);
4975
4976 /* The pass works as follows:
4977 * If all codepaths write tess factors, we can say that all
4978 * invocations define tess factors.
4979 *
4980 * Each tess factor channel is tracked separately.
4981 */
4982 unsigned main_block_tf_writemask = 0; /* if main block writes tess factors */
4983 unsigned cond_block_tf_writemask = 0; /* if cond block writes tess factors */
4984
4985 /* Initial value = true. Here the pass will accumulate results from
4986 * multiple segments surrounded by barriers. If tess factors aren't
4987 * written at all, it's a shader bug and we don't care if this will be
4988 * true.
4989 */
4990 bool tessfactors_are_def_in_all_invocs = true;
4991
4992 nir_foreach_function(function, nir) {
4993 if (function->impl) {
4994 foreach_list_typed(nir_cf_node, node, node, &function->impl->body) {
4995 scan_tess_ctrl(node, &main_block_tf_writemask,
4996 &cond_block_tf_writemask,
4997 &tessfactors_are_def_in_all_invocs,
4998 false);
4999 }
5000 }
5001 }
5002
5003 /* Accumulate the result for the last code segment separated by a
5004 * barrier.
5005 */
5006 if (main_block_tf_writemask || cond_block_tf_writemask) {
5007 tessfactors_are_def_in_all_invocs &=
5008 !(cond_block_tf_writemask & ~main_block_tf_writemask);
5009 }
5010
5011 return tessfactors_are_def_in_all_invocs;
5012 }