src/amd/registers/gfx8.json

   1 {
   2  "enums": {
   3   "ArrayMode": {
   4    "entries": [
   5     {"name": "ARRAY_LINEAR_GENERAL", "value": 0},
   6     {"name": "ARRAY_LINEAR_ALIGNED", "value": 1},
   7     {"name": "ARRAY_1D_TILED_THIN1", "value": 2},
   8     {"name": "ARRAY_1D_TILED_THICK", "value": 3},
   9     {"name": "ARRAY_2D_TILED_THIN1", "value": 4},
  10     {"name": "ARRAY_PRT_TILED_THIN1", "value": 5},
  11     {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6},
  12     {"name": "ARRAY_2D_TILED_THICK", "value": 7},
  13     {"name": "ARRAY_2D_TILED_XTHICK", "value": 8},
  14     {"name": "ARRAY_PRT_TILED_THICK", "value": 9},
  15     {"name": "ARRAY_PRT_2D_TILED_THICK", "value": 10},
  16     {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11},
  17     {"name": "ARRAY_3D_TILED_THIN1", "value": 12},
  18     {"name": "ARRAY_3D_TILED_THICK", "value": 13},
  19     {"name": "ARRAY_3D_TILED_XTHICK", "value": 14},
  20     {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15}
  21    ]
  22   },
  23   "BUF_DATA_FORMAT": {
  24    "entries": [
  25     {"name": "BUF_DATA_FORMAT_INVALID", "value": 0},
  26     {"name": "BUF_DATA_FORMAT_8", "value": 1},
  27     {"name": "BUF_DATA_FORMAT_16", "value": 2},
  28     {"name": "BUF_DATA_FORMAT_8_8", "value": 3},
  29     {"name": "BUF_DATA_FORMAT_32", "value": 4},
  30     {"name": "BUF_DATA_FORMAT_16_16", "value": 5},
  31     {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6},
  32     {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7},
  33     {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8},
  34     {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9},
  35     {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10},
  36     {"name": "BUF_DATA_FORMAT_32_32", "value": 11},
  37     {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12},
  38     {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13},
  39     {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14},
  40     {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15}
  41    ]
  42   },
  43   "BUF_NUM_FORMAT": {
  44    "entries": [
  45     {"name": "BUF_NUM_FORMAT_UNORM", "value": 0},
  46     {"name": "BUF_NUM_FORMAT_SNORM", "value": 1},
  47     {"name": "BUF_NUM_FORMAT_USCALED", "value": 2},
  48     {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3},
  49     {"name": "BUF_NUM_FORMAT_UINT", "value": 4},
  50     {"name": "BUF_NUM_FORMAT_SINT", "value": 5},
  51     {"name": "BUF_NUM_FORMAT_RESERVED_6", "value": 6},
  52     {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7}
  53    ]
  54   },
  55   "BankHeight": {
  56    "entries": [
  57     {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0},
  58     {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1},
  59     {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2},
  60     {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3}
  61    ]
  62   },
  63   "BankWidth": {
  64    "entries": [
  65     {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0},
  66     {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1},
  67     {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2},
  68     {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3}
  69    ]
  70   },
  71   "BlendOp": {
  72    "entries": [
  73     {"name": "BLEND_ZERO", "value": 0},
  74     {"name": "BLEND_ONE", "value": 1},
  75     {"name": "BLEND_SRC_COLOR", "value": 2},
  76     {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3},
  77     {"name": "BLEND_SRC_ALPHA", "value": 4},
  78     {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5},
  79     {"name": "BLEND_DST_ALPHA", "value": 6},
  80     {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7},
  81     {"name": "BLEND_DST_COLOR", "value": 8},
  82     {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9},
  83     {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10},
  84     {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11},
  85     {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12},
  86     {"name": "BLEND_CONSTANT_COLOR", "value": 13},
  87     {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14},
  88     {"name": "BLEND_SRC1_COLOR", "value": 15},
  89     {"name": "BLEND_INV_SRC1_COLOR", "value": 16},
  90     {"name": "BLEND_SRC1_ALPHA", "value": 17},
  91     {"name": "BLEND_INV_SRC1_ALPHA", "value": 18},
  92     {"name": "BLEND_CONSTANT_ALPHA", "value": 19},
  93     {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20}
  94    ]
  95   },
  96   "BlendOpt": {
  97    "entries": [
  98     {"name": "FORCE_OPT_AUTO", "value": 0},
  99     {"name": "FORCE_OPT_DISABLE", "value": 1},
 100     {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2},
 101     {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3},
 102     {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},
 103     {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5},
 104     {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6},
 105     {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7}
 106    ]
 107   },
 108   "CBMode": {
 109    "entries": [
 110     {"name": "CB_DISABLE", "value": 0},
 111     {"name": "CB_NORMAL", "value": 1},
 112     {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2},
 113     {"name": "CB_RESOLVE", "value": 3},
 114     {"name": "CB_DECOMPRESS", "value": 4},
 115     {"name": "CB_FMASK_DECOMPRESS", "value": 5},
 116     {"name": "CB_DCC_DECOMPRESS", "value": 6}
 117    ]
 118   },
 119   "CBPerfClearFilterSel": {
 120    "entries": [
 121     {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0},
 122     {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1}
 123    ]
 124   },
 125   "CBPerfOpFilterSel": {
 126    "entries": [
 127     {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0},
 128     {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},
 129     {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2},
 130     {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3},
 131     {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4},
 132     {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5}
 133    ]
 134   },
 135   "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE": {
 136    "entries": [
 137     {"name": "MAX_BLOCK_SIZE_64B", "value": 0},
 138     {"name": "MAX_BLOCK_SIZE_128B", "value": 1},
 139     {"name": "MAX_BLOCK_SIZE_256B", "value": 2}
 140    ]
 141   },
 142   "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE": {
 143    "entries": [
 144     {"name": "MIN_BLOCK_SIZE_32B", "value": 0},
 145     {"name": "MIN_BLOCK_SIZE_64B", "value": 1}
 146    ]
 147   },
 148   "CLIP_RULE": {
 149    "entries": [
 150     {"name": "OUT", "value": 1},
 151     {"name": "IN_0", "value": 2},
 152     {"name": "IN_1", "value": 4},
 153     {"name": "IN_10", "value": 8},
 154     {"name": "IN_2", "value": 16},
 155     {"name": "IN_20", "value": 32},
 156     {"name": "IN_21", "value": 64},
 157     {"name": "IN_210", "value": 128},
 158     {"name": "IN_3", "value": 256},
 159     {"name": "IN_30", "value": 512},
 160     {"name": "IN_31", "value": 1024},
 161     {"name": "IN_310", "value": 2048},
 162     {"name": "IN_32", "value": 4096},
 163     {"name": "IN_320", "value": 8192},
 164     {"name": "IN_321", "value": 16384},
 165     {"name": "IN_3210", "value": 32768}
 166    ]
 167   },
 168   "CP_PERFMON_ENABLE_MODE": {
 169    "entries": [
 170     {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0},
 171     {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1},
 172     {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2},
 173     {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3}
 174    ]
 175   },
 176   "CP_PERFMON_STATE": {
 177    "entries": [
 178     {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
 179     {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1},
 180     {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2},
 181     {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3},
 182     {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
 183     {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
 184    ]
 185   },
 186   "CmaskAddr": {
 187    "entries": [
 188     {"name": "CMASK_ADDR_TILED", "value": 0},
 189     {"name": "CMASK_ADDR_LINEAR", "value": 1},
 190     {"name": "CMASK_ADDR_COMPATIBLE", "value": 2}
 191    ]
 192   },
 193   "ColorFormat": {
 194    "entries": [
 195     {"name": "COLOR_INVALID", "value": 0},
 196     {"name": "COLOR_8", "value": 1},
 197     {"name": "COLOR_16", "value": 2},
 198     {"name": "COLOR_8_8", "value": 3},
 199     {"name": "COLOR_32", "value": 4},
 200     {"name": "COLOR_16_16", "value": 5},
 201     {"name": "COLOR_10_11_11", "value": 6},
 202     {"name": "COLOR_11_11_10", "value": 7},
 203     {"name": "COLOR_10_10_10_2", "value": 8},
 204     {"name": "COLOR_2_10_10_10", "value": 9},
 205     {"name": "COLOR_8_8_8_8", "value": 10},
 206     {"name": "COLOR_32_32", "value": 11},
 207     {"name": "COLOR_16_16_16_16", "value": 12},
 208     {"name": "COLOR_RESERVED_13", "value": 13},
 209     {"name": "COLOR_32_32_32_32", "value": 14},
 210     {"name": "COLOR_RESERVED_15", "value": 15},
 211     {"name": "COLOR_5_6_5", "value": 16},
 212     {"name": "COLOR_1_5_5_5", "value": 17},
 213     {"name": "COLOR_5_5_5_1", "value": 18},
 214     {"name": "COLOR_4_4_4_4", "value": 19},
 215     {"name": "COLOR_8_24", "value": 20},
 216     {"name": "COLOR_24_8", "value": 21},
 217     {"name": "COLOR_X24_8_32_FLOAT", "value": 22},
 218     {"name": "COLOR_RESERVED_23", "value": 23}
 219    ]
 220   },
 221   "CombFunc": {
 222    "entries": [
 223     {"name": "COMB_DST_PLUS_SRC", "value": 0},
 224     {"name": "COMB_SRC_MINUS_DST", "value": 1},
 225     {"name": "COMB_MIN_DST_SRC", "value": 2},
 226     {"name": "COMB_MAX_DST_SRC", "value": 3},
 227     {"name": "COMB_DST_MINUS_SRC", "value": 4}
 228    ]
 229   },
 230   "CompareFrag": {
 231    "entries": [
 232     {"name": "FRAG_NEVER", "value": 0},
 233     {"name": "FRAG_LESS", "value": 1},
 234     {"name": "FRAG_EQUAL", "value": 2},
 235     {"name": "FRAG_LEQUAL", "value": 3},
 236     {"name": "FRAG_GREATER", "value": 4},
 237     {"name": "FRAG_NOTEQUAL", "value": 5},
 238     {"name": "FRAG_GEQUAL", "value": 6},
 239     {"name": "FRAG_ALWAYS", "value": 7}
 240    ]
 241   },
 242   "ConservativeZExport": {
 243    "entries": [
 244     {"name": "EXPORT_ANY_Z", "value": 0},
 245     {"name": "EXPORT_LESS_THAN_Z", "value": 1},
 246     {"name": "EXPORT_GREATER_THAN_Z", "value": 2},
 247     {"name": "EXPORT_RESERVED", "value": 3}
 248    ]
 249   },
 250   "DbPSLControl": {
 251    "entries": [
 252     {"name": "PSLC_AUTO", "value": 0},
 253     {"name": "PSLC_ON_HANG_ONLY", "value": 1},
 254     {"name": "PSLC_ASAP", "value": 2},
 255     {"name": "PSLC_COUNTDOWN", "value": 3}
 256    ]
 257   },
 258   "EXCP_EN": {
 259    "entries": [
 260     {"name": "INVALID", "value": 1},
 261     {"name": "INPUT_DENORMAL", "value": 2},
 262     {"name": "DIVIDE_BY_ZERO", "value": 4},
 263     {"name": "OVERFLOW", "value": 8},
 264     {"name": "UNDERFLOW", "value": 16},
 265     {"name": "INEXACT", "value": 32},
 266     {"name": "INT_DIVIDE_BY_ZERO", "value": 64},
 267     {"name": "ADDRESS_WATCH", "value": 128},
 268     {"name": "MEMORY_VIOLATION", "value": 256}
 269    ]
 270   },
 271   "FLOAT_MODE": {
 272    "entries": [
 273     {"name": "FP_32_DENORMS", "value": 48},
 274     {"name": "FP_64_DENORMS", "value": 192},
 275     {"name": "FP_ALL_DENORMS", "value": 240}
 276    ]
 277   },
 278   "ForceControl": {
 279    "entries": [
 280     {"name": "FORCE_OFF", "value": 0},
 281     {"name": "FORCE_ENABLE", "value": 1},
 282     {"name": "FORCE_DISABLE", "value": 2},
 283     {"name": "FORCE_RESERVED", "value": 3}
 284    ]
 285   },
 286   "IMG_DATA_FORMAT": {
 287    "entries": [
 288     {"name": "IMG_DATA_FORMAT_INVALID", "value": 0},
 289     {"name": "IMG_DATA_FORMAT_8", "value": 1},
 290     {"name": "IMG_DATA_FORMAT_16", "value": 2},
 291     {"name": "IMG_DATA_FORMAT_8_8", "value": 3},
 292     {"name": "IMG_DATA_FORMAT_32", "value": 4},
 293     {"name": "IMG_DATA_FORMAT_16_16", "value": 5},
 294     {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6},
 295     {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7},
 296     {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8},
 297     {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9},
 298     {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10},
 299     {"name": "IMG_DATA_FORMAT_32_32", "value": 11},
 300     {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12},
 301     {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13},
 302     {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14},
 303     {"name": "IMG_DATA_FORMAT_RESERVED_15", "value": 15},
 304     {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16},
 305     {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17},
 306     {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18},
 307     {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19},
 308     {"name": "IMG_DATA_FORMAT_8_24", "value": 20},
 309     {"name": "IMG_DATA_FORMAT_24_8", "value": 21},
 310     {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22},
 311     {"name": "IMG_DATA_FORMAT_RESERVED_23", "value": 23},
 312     {"name": "IMG_DATA_FORMAT_RESERVED_24", "value": 24},
 313     {"name": "IMG_DATA_FORMAT_RESERVED_25", "value": 25},
 314     {"name": "IMG_DATA_FORMAT_RESERVED_26", "value": 26},
 315     {"name": "IMG_DATA_FORMAT_RESERVED_27", "value": 27},
 316     {"name": "IMG_DATA_FORMAT_RESERVED_28", "value": 28},
 317     {"name": "IMG_DATA_FORMAT_RESERVED_29", "value": 29},
 318     {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30},
 319     {"name": "IMG_DATA_FORMAT_RESERVED_31", "value": 31},
 320     {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32},
 321     {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},
 322     {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},
 323     {"name": "IMG_DATA_FORMAT_BC1", "value": 35},
 324     {"name": "IMG_DATA_FORMAT_BC2", "value": 36},
 325     {"name": "IMG_DATA_FORMAT_BC3", "value": 37},
 326     {"name": "IMG_DATA_FORMAT_BC4", "value": 38},
 327     {"name": "IMG_DATA_FORMAT_BC5", "value": 39},
 328     {"name": "IMG_DATA_FORMAT_BC6", "value": 40},
 329     {"name": "IMG_DATA_FORMAT_BC7", "value": 41},
 330     {"name": "IMG_DATA_FORMAT_RESERVED_42", "value": 42},
 331     {"name": "IMG_DATA_FORMAT_RESERVED_43", "value": 43},
 332     {"name": "IMG_DATA_FORMAT_FMASK8_S2_F1", "value": 44},
 333     {"name": "IMG_DATA_FORMAT_FMASK8_S4_F1", "value": 45},
 334     {"name": "IMG_DATA_FORMAT_FMASK8_S8_F1", "value": 46},
 335     {"name": "IMG_DATA_FORMAT_FMASK8_S2_F2", "value": 47},
 336     {"name": "IMG_DATA_FORMAT_FMASK8_S4_F2", "value": 48},
 337     {"name": "IMG_DATA_FORMAT_FMASK8_S4_F4", "value": 49},
 338     {"name": "IMG_DATA_FORMAT_FMASK16_S16_F1", "value": 50},
 339     {"name": "IMG_DATA_FORMAT_FMASK16_S8_F2", "value": 51},
 340     {"name": "IMG_DATA_FORMAT_FMASK32_S16_F2", "value": 52},
 341     {"name": "IMG_DATA_FORMAT_FMASK32_S8_F4", "value": 53},
 342     {"name": "IMG_DATA_FORMAT_FMASK32_S8_F8", "value": 54},
 343     {"name": "IMG_DATA_FORMAT_FMASK64_S16_F4", "value": 55},
 344     {"name": "IMG_DATA_FORMAT_FMASK64_S16_F8", "value": 56},
 345     {"name": "IMG_DATA_FORMAT_4_4", "value": 57},
 346     {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},
 347     {"name": "IMG_DATA_FORMAT_1", "value": 59},
 348     {"name": "IMG_DATA_FORMAT_1_REVERSED", "value": 60},
 349     {"name": "IMG_DATA_FORMAT_32_AS_8", "value": 61},
 350     {"name": "IMG_DATA_FORMAT_32_AS_8_8", "value": 62},
 351     {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}
 352    ]
 353   },
 354   "IMG_NUM_FORMAT": {
 355    "entries": [
 356     {"name": "IMG_NUM_FORMAT_UNORM", "value": 0},
 357     {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},
 358     {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},
 359     {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},
 360     {"name": "IMG_NUM_FORMAT_UINT", "value": 4},
 361     {"name": "IMG_NUM_FORMAT_SINT", "value": 5},
 362     {"name": "IMG_NUM_FORMAT_RESERVED_6", "value": 6},
 363     {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},
 364     {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},
 365     {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},
 366     {"name": "IMG_NUM_FORMAT_RESERVED_10", "value": 10},
 367     {"name": "IMG_NUM_FORMAT_RESERVED_11", "value": 11},
 368     {"name": "IMG_NUM_FORMAT_RESERVED_12", "value": 12},
 369     {"name": "IMG_NUM_FORMAT_RESERVED_13", "value": 13},
 370     {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},
 371     {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}
 372    ]
 373   },
 374   "MacroTileAspect": {
 375    "entries": [
 376     {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0},
 377     {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},
 378     {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},
 379     {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}
 380    ]
 381   },
 382   "MicroTileMode": {
 383    "entries": [
 384     {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},
 385     {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},
 386     {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},
 387     {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},
 388     {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}
 389    ]
 390   },
 391   "NumBanks": {
 392    "entries": [
 393     {"name": "ADDR_SURF_2_BANK", "value": 0},
 394     {"name": "ADDR_SURF_4_BANK", "value": 1},
 395     {"name": "ADDR_SURF_8_BANK", "value": 2},
 396     {"name": "ADDR_SURF_16_BANK", "value": 3}
 397    ]
 398   },
 399   "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE": {
 400    "entries": [
 401     {"name": "X_DRAW_POINTS", "value": 0},
 402     {"name": "X_DRAW_LINES", "value": 1},
 403     {"name": "X_DRAW_TRIANGLES", "value": 2}
 404    ]
 405   },
 406   "PA_SU_SC_MODE_CNTL__POLY_MODE": {
 407    "entries": [
 408     {"name": "X_DISABLE_POLY_MODE", "value": 0},
 409     {"name": "X_DUAL_MODE", "value": 1}
 410    ]
 411   },
 412   "PA_SU_VTX_CNTL__ROUND_MODE": {
 413    "entries": [
 414     {"name": "X_TRUNCATE", "value": 0},
 415     {"name": "X_ROUND", "value": 1},
 416     {"name": "X_ROUND_TO_EVEN", "value": 2},
 417     {"name": "X_ROUND_TO_ODD", "value": 3}
 418    ]
 419   },
 420   "PipeConfig": {
 421    "entries": [
 422     {"name": "ADDR_SURF_P2", "value": 0},
 423     {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},
 424     {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},
 425     {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},
 426     {"name": "ADDR_SURF_P4_8x16", "value": 4},
 427     {"name": "ADDR_SURF_P4_16x16", "value": 5},
 428     {"name": "ADDR_SURF_P4_16x32", "value": 6},
 429     {"name": "ADDR_SURF_P4_32x32", "value": 7},
 430     {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},
 431     {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},
 432     {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},
 433     {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},
 434     {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},
 435     {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},
 436     {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},
 437     {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},
 438     {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},
 439     {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}
 440    ]
 441   },
 442   "PkrMap": {
 443    "entries": [
 444     {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},
 445     {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},
 446     {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},
 447     {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}
 448    ]
 449   },
 450   "PkrXsel": {
 451    "entries": [
 452     {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},
 453     {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},
 454     {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},
 455     {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}
 456    ]
 457   },
 458   "PkrXsel2": {
 459    "entries": [
 460     {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},
 461     {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},
 462     {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},
 463     {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}
 464    ]
 465   },
 466   "PkrYsel": {
 467    "entries": [
 468     {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},
 469     {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},
 470     {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},
 471     {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}
 472    ]
 473   },
 474   "QUANT_MODE": {
 475    "entries": [
 476     {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},
 477     {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},
 478     {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},
 479     {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},
 480     {"name": "X_16_8_FIXED_POINT_1", "value": 4},
 481     {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},
 482     {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},
 483     {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}
 484    ]
 485   },
 486   "ROP3": {
 487    "entries": [
 488     {"name": "ROP3_CLEAR", "value": 0},
 489     {"name": "X_0X05", "value": 5},
 490     {"name": "X_0X0A", "value": 10},
 491     {"name": "X_0X0F", "value": 15},
 492     {"name": "ROP3_NOR", "value": 17},
 493     {"name": "ROP3_AND_INVERTED", "value": 34},
 494     {"name": "ROP3_COPY_INVERTED", "value": 51},
 495     {"name": "ROP3_AND_REVERSE", "value": 68},
 496     {"name": "X_0X50", "value": 80},
 497     {"name": "ROP3_INVERT", "value": 85},
 498     {"name": "X_0X5A", "value": 90},
 499     {"name": "X_0X5F", "value": 95},
 500     {"name": "ROP3_XOR", "value": 102},
 501     {"name": "ROP3_NAND", "value": 119},
 502     {"name": "ROP3_AND", "value": 136},
 503     {"name": "ROP3_EQUIVALENT", "value": 153},
 504     {"name": "X_0XA0", "value": 160},
 505     {"name": "X_0XA5", "value": 165},
 506     {"name": "ROP3_NO_OP", "value": 170},
 507     {"name": "X_0XAF", "value": 175},
 508     {"name": "ROP3_OR_INVERTED", "value": 187},
 509     {"name": "ROP3_COPY", "value": 204},
 510     {"name": "ROP3_OR_REVERSE", "value": 221},
 511     {"name": "ROP3_OR", "value": 238},
 512     {"name": "X_0XF0", "value": 240},
 513     {"name": "X_0XF5", "value": 245},
 514     {"name": "X_0XFA", "value": 250},
 515     {"name": "ROP3_SET", "value": 255}
 516    ]
 517   },
 518   "RbMap": {
 519    "entries": [
 520     {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},
 521     {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},
 522     {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},
 523     {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}
 524    ]
 525   },
 526   "RbXsel": {
 527    "entries": [
 528     {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},
 529     {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}
 530    ]
 531   },
 532   "RbXsel2": {
 533    "entries": [
 534     {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},
 535     {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},
 536     {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},
 537     {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}
 538    ]
 539   },
 540   "RbYsel": {
 541    "entries": [
 542     {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},
 543     {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}
 544    ]
 545   },
 546   "SPI_PNT_SPRITE_OVERRIDE": {
 547    "entries": [
 548     {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},
 549     {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},
 550     {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},
 551     {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},
 552     {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}
 553    ]
 554   },
 555   "SPI_SHADER_EX_FORMAT": {
 556    "entries": [
 557     {"name": "SPI_SHADER_ZERO", "value": 0},
 558     {"name": "SPI_SHADER_32_R", "value": 1},
 559     {"name": "SPI_SHADER_32_GR", "value": 2},
 560     {"name": "SPI_SHADER_32_AR", "value": 3},
 561     {"name": "SPI_SHADER_FP16_ABGR", "value": 4},
 562     {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},
 563     {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},
 564     {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},
 565     {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},
 566     {"name": "SPI_SHADER_32_ABGR", "value": 9}
 567    ]
 568   },
 569   "SPI_SHADER_FORMAT": {
 570    "entries": [
 571     {"name": "SPI_SHADER_NONE", "value": 0},
 572     {"name": "SPI_SHADER_1COMP", "value": 1},
 573     {"name": "SPI_SHADER_2COMP", "value": 2},
 574     {"name": "SPI_SHADER_4COMPRESS", "value": 3},
 575     {"name": "SPI_SHADER_4COMP", "value": 4}
 576    ]
 577   },
 578   "SPM_PERFMON_STATE": {
 579    "entries": [
 580     {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
 581     {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},
 582     {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},
 583     {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},
 584     {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
 585     {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
 586    ]
 587   },
 588   "SQ_IMG_FILTER_TYPE": {
 589    "entries": [
 590     {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},
 591     {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},
 592     {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}
 593    ]
 594   },
 595   "SQ_RSRC_BUF_TYPE": {
 596    "entries": [
 597     {"name": "SQ_RSRC_BUF", "value": 0},
 598     {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},
 599     {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},
 600     {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}
 601    ]
 602   },
 603   "SQ_RSRC_IMG_TYPE": {
 604    "entries": [
 605     {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},
 606     {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},
 607     {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},
 608     {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},
 609     {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},
 610     {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},
 611     {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},
 612     {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},
 613     {"name": "SQ_RSRC_IMG_1D", "value": 8},
 614     {"name": "SQ_RSRC_IMG_2D", "value": 9},
 615     {"name": "SQ_RSRC_IMG_3D", "value": 10},
 616     {"name": "SQ_RSRC_IMG_CUBE", "value": 11},
 617     {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},
 618     {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},
 619     {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},
 620     {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}
 621    ]
 622   },
 623   "SQ_SEL_XYZW01": {
 624    "entries": [
 625     {"name": "SQ_SEL_0", "value": 0},
 626     {"name": "SQ_SEL_1", "value": 1},
 627     {"name": "SQ_SEL_RESERVED_0", "value": 2},
 628     {"name": "SQ_SEL_RESERVED_1", "value": 3},
 629     {"name": "SQ_SEL_X", "value": 4},
 630     {"name": "SQ_SEL_Y", "value": 5},
 631     {"name": "SQ_SEL_Z", "value": 6},
 632     {"name": "SQ_SEL_W", "value": 7}
 633    ]
 634   },
 635   "SQ_TEX_BORDER_COLOR": {
 636    "entries": [
 637     {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},
 638     {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},
 639     {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},
 640     {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}
 641    ]
 642   },
 643   "SQ_TEX_CLAMP": {
 644    "entries": [
 645     {"name": "SQ_TEX_WRAP", "value": 0},
 646     {"name": "SQ_TEX_MIRROR", "value": 1},
 647     {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},
 648     {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},
 649     {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},
 650     {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},
 651     {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},
 652     {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}
 653    ]
 654   },
 655   "SQ_TEX_DEPTH_COMPARE": {
 656    "entries": [
 657     {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},
 658     {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},
 659     {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},
 660     {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},
 661     {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},
 662     {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},
 663     {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},
 664     {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}
 665    ]
 666   },
 667   "SQ_TEX_MIP_FILTER": {
 668    "entries": [
 669     {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},
 670     {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},
 671     {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2},
 672     {"name": "SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ", "value": 3}
 673    ]
 674   },
 675   "SQ_TEX_XY_FILTER": {
 676    "entries": [
 677     {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},
 678     {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},
 679     {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},
 680     {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}
 681    ]
 682   },
 683   "SQ_TEX_Z_FILTER": {
 684    "entries": [
 685     {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},
 686     {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},
 687     {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}
 688    ]
 689   },
 690   "ScMap": {
 691    "entries": [
 692     {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},
 693     {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},
 694     {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},
 695     {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}
 696    ]
 697   },
 698   "ScXsel": {
 699    "entries": [
 700     {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},
 701     {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},
 702     {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},
 703     {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}
 704    ]
 705   },
 706   "ScYsel": {
 707    "entries": [
 708     {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},
 709     {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},
 710     {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},
 711     {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}
 712    ]
 713   },
 714   "SeMap": {
 715    "entries": [
 716     {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},
 717     {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},
 718     {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},
 719     {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}
 720    ]
 721   },
 722   "SePairMap": {
 723    "entries": [
 724     {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},
 725     {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},
 726     {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},
 727     {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}
 728    ]
 729   },
 730   "SePairXsel": {
 731    "entries": [
 732     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},
 733     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},
 734     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},
 735     {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3}
 736    ]
 737   },
 738   "SePairYsel": {
 739    "entries": [
 740     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},
 741     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},
 742     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},
 743     {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3}
 744    ]
 745   },
 746   "SeXsel": {
 747    "entries": [
 748     {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},
 749     {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},
 750     {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},
 751     {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3}
 752    ]
 753   },
 754   "SeYsel": {
 755    "entries": [
 756     {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},
 757     {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},
 758     {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},
 759     {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3}
 760    ]
 761   },
 762   "StencilFormat": {
 763    "entries": [
 764     {"name": "STENCIL_INVALID", "value": 0},
 765     {"name": "STENCIL_8", "value": 1}
 766    ]
 767   },
 768   "StencilOp": {
 769    "entries": [
 770     {"name": "STENCIL_KEEP", "value": 0},
 771     {"name": "STENCIL_ZERO", "value": 1},
 772     {"name": "STENCIL_ONES", "value": 2},
 773     {"name": "STENCIL_REPLACE_TEST", "value": 3},
 774     {"name": "STENCIL_REPLACE_OP", "value": 4},
 775     {"name": "STENCIL_ADD_CLAMP", "value": 5},
 776     {"name": "STENCIL_SUB_CLAMP", "value": 6},
 777     {"name": "STENCIL_INVERT", "value": 7},
 778     {"name": "STENCIL_ADD_WRAP", "value": 8},
 779     {"name": "STENCIL_SUB_WRAP", "value": 9},
 780     {"name": "STENCIL_AND", "value": 10},
 781     {"name": "STENCIL_OR", "value": 11},
 782     {"name": "STENCIL_XOR", "value": 12},
 783     {"name": "STENCIL_NAND", "value": 13},
 784     {"name": "STENCIL_NOR", "value": 14},
 785     {"name": "STENCIL_XNOR", "value": 15}
 786    ]
 787   },
 788   "SurfaceEndian": {
 789    "entries": [
 790     {"name": "ENDIAN_NONE", "value": 0},
 791     {"name": "ENDIAN_8IN16", "value": 1},
 792     {"name": "ENDIAN_8IN32", "value": 2},
 793     {"name": "ENDIAN_8IN64", "value": 3}
 794    ]
 795   },
 796   "SurfaceNumber": {
 797    "entries": [
 798     {"name": "NUMBER_UNORM", "value": 0},
 799     {"name": "NUMBER_SNORM", "value": 1},
 800     {"name": "NUMBER_USCALED", "value": 2},
 801     {"name": "NUMBER_SSCALED", "value": 3},
 802     {"name": "NUMBER_UINT", "value": 4},
 803     {"name": "NUMBER_SINT", "value": 5},
 804     {"name": "NUMBER_SRGB", "value": 6},
 805     {"name": "NUMBER_FLOAT", "value": 7}
 806    ]
 807   },
 808   "SurfaceSwap": {
 809    "entries": [
 810     {"name": "SWAP_STD", "value": 0},
 811     {"name": "SWAP_ALT", "value": 1},
 812     {"name": "SWAP_STD_REV", "value": 2},
 813     {"name": "SWAP_ALT_REV", "value": 3}
 814    ]
 815   },
 816   "TileSplit": {
 817    "entries": [
 818     {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},
 819     {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},
 820     {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},
 821     {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},
 822     {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},
 823     {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},
 824     {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}
 825    ]
 826   },
 827   "VGT_DIST_MODE": {
 828    "entries": [
 829     {"name": "NO_DIST", "value": 0},
 830     {"name": "PATCHES", "value": 1},
 831     {"name": "DONUTS", "value": 2}
 832    ]
 833   },
 834   "VGT_DI_MAJOR_MODE_SELECT": {
 835    "entries": [
 836     {"name": "DI_MAJOR_MODE_0", "value": 0},
 837     {"name": "DI_MAJOR_MODE_1", "value": 1}
 838    ]
 839   },
 840   "VGT_DI_PRIM_TYPE": {
 841    "entries": [
 842     {"name": "DI_PT_NONE", "value": 0},
 843     {"name": "DI_PT_POINTLIST", "value": 1},
 844     {"name": "DI_PT_LINELIST", "value": 2},
 845     {"name": "DI_PT_LINESTRIP", "value": 3},
 846     {"name": "DI_PT_TRILIST", "value": 4},
 847     {"name": "DI_PT_TRIFAN", "value": 5},
 848     {"name": "DI_PT_TRISTRIP", "value": 6},
 849     {"name": "DI_PT_UNUSED_0", "value": 7},
 850     {"name": "DI_PT_UNUSED_1", "value": 8},
 851     {"name": "DI_PT_PATCH", "value": 9},
 852     {"name": "DI_PT_LINELIST_ADJ", "value": 10},
 853     {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},
 854     {"name": "DI_PT_TRILIST_ADJ", "value": 12},
 855     {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},
 856     {"name": "DI_PT_UNUSED_3", "value": 14},
 857     {"name": "DI_PT_UNUSED_4", "value": 15},
 858     {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},
 859     {"name": "DI_PT_RECTLIST", "value": 17},
 860     {"name": "DI_PT_LINELOOP", "value": 18},
 861     {"name": "DI_PT_QUADLIST", "value": 19},
 862     {"name": "DI_PT_QUADSTRIP", "value": 20},
 863     {"name": "DI_PT_POLYGON", "value": 21},
 864     {"name": "DI_PT_2D_COPY_RECT_LIST_V0", "value": 22},
 865     {"name": "DI_PT_2D_COPY_RECT_LIST_V1", "value": 23},
 866     {"name": "DI_PT_2D_COPY_RECT_LIST_V2", "value": 24},
 867     {"name": "DI_PT_2D_COPY_RECT_LIST_V3", "value": 25},
 868     {"name": "DI_PT_2D_FILL_RECT_LIST", "value": 26},
 869     {"name": "DI_PT_2D_LINE_STRIP", "value": 27},
 870     {"name": "DI_PT_2D_TRI_STRIP", "value": 28}
 871    ]
 872   },
 873   "VGT_DI_SOURCE_SELECT": {
 874    "entries": [
 875     {"name": "DI_SRC_SEL_DMA", "value": 0},
 876     {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},
 877     {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},
 878     {"name": "DI_SRC_SEL_RESERVED", "value": 3}
 879    ]
 880   },
 881   "VGT_DMA_BUF_TYPE": {
 882    "entries": [
 883     {"name": "VGT_DMA_BUF_MEM", "value": 0},
 884     {"name": "VGT_DMA_BUF_RING", "value": 1},
 885     {"name": "VGT_DMA_BUF_SETUP", "value": 2},
 886     {"name": "VGT_DMA_PTR_UPDATE", "value": 3}
 887    ]
 888   },
 889   "VGT_DMA_SWAP_MODE": {
 890    "entries": [
 891     {"name": "VGT_DMA_SWAP_NONE", "value": 0},
 892     {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},
 893     {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},
 894     {"name": "VGT_DMA_SWAP_WORD", "value": 3}
 895    ]
 896   },
 897   "VGT_EVENT_TYPE": {
 898    "entries": [
 899     {"name": "Reserved_0x00", "value": 0},
 900     {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
 901     {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
 902     {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
 903     {"name": "CACHE_FLUSH_TS", "value": 4},
 904     {"name": "CONTEXT_DONE", "value": 5},
 905     {"name": "CACHE_FLUSH", "value": 6},
 906     {"name": "CS_PARTIAL_FLUSH", "value": 7},
 907     {"name": "VGT_STREAMOUT_SYNC", "value": 8},
 908     {"name": "Reserved_0x09", "value": 9},
 909     {"name": "VGT_STREAMOUT_RESET", "value": 10},
 910     {"name": "END_OF_PIPE_INCR_DE", "value": 11},
 911     {"name": "END_OF_PIPE_IB_END", "value": 12},
 912     {"name": "RST_PIX_CNT", "value": 13},
 913     {"name": "Reserved_0x0E", "value": 14},
 914     {"name": "VS_PARTIAL_FLUSH", "value": 15},
 915     {"name": "PS_PARTIAL_FLUSH", "value": 16},
 916     {"name": "FLUSH_HS_OUTPUT", "value": 17},
 917     {"name": "FLUSH_LS_OUTPUT", "value": 18},
 918     {"name": "Reserved_0x13", "value": 19},
 919     {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
 920     {"name": "ZPASS_DONE", "value": 21},
 921     {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
 922     {"name": "PERFCOUNTER_START", "value": 23},
 923     {"name": "PERFCOUNTER_STOP", "value": 24},
 924     {"name": "PIPELINESTAT_START", "value": 25},
 925     {"name": "PIPELINESTAT_STOP", "value": 26},
 926     {"name": "PERFCOUNTER_SAMPLE", "value": 27},
 927     {"name": "FLUSH_ES_OUTPUT", "value": 28},
 928     {"name": "FLUSH_GS_OUTPUT", "value": 29},
 929     {"name": "SAMPLE_PIPELINESTAT", "value": 30},
 930     {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
 931     {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
 932     {"name": "RESET_VTX_CNT", "value": 33},
 933     {"name": "BLOCK_CONTEXT_DONE", "value": 34},
 934     {"name": "CS_CONTEXT_DONE", "value": 35},
 935     {"name": "VGT_FLUSH", "value": 36},
 936     {"name": "TGID_ROLLOVER", "value": 37},
 937     {"name": "SQ_NON_EVENT", "value": 38},
 938     {"name": "SC_SEND_DB_VPZ", "value": 39},
 939     {"name": "BOTTOM_OF_PIPE_TS", "value": 40},
 940     {"name": "FLUSH_SX_TS", "value": 41},
 941     {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
 942     {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
 943     {"name": "FLUSH_AND_INV_DB_META", "value": 44},
 944     {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
 945     {"name": "FLUSH_AND_INV_CB_META", "value": 46},
 946     {"name": "CS_DONE", "value": 47},
 947     {"name": "PS_DONE", "value": 48},
 948     {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
 949     {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
 950     {"name": "THREAD_TRACE_START", "value": 51},
 951     {"name": "THREAD_TRACE_STOP", "value": 52},
 952     {"name": "THREAD_TRACE_MARKER", "value": 53},
 953     {"name": "THREAD_TRACE_FLUSH", "value": 54},
 954     {"name": "THREAD_TRACE_FINISH", "value": 55},
 955     {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
 956     {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
 957     {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
 958     {"name": "CONTEXT_SUSPEND", "value": 59},
 959     {"name": "OFFCHIP_HS_DEALLOC", "value": 60}
 960    ]
 961   },
 962   "VGT_GS_CUT_MODE": {
 963    "entries": [
 964     {"name": "GS_CUT_1024", "value": 0},
 965     {"name": "GS_CUT_512", "value": 1},
 966     {"name": "GS_CUT_256", "value": 2},
 967     {"name": "GS_CUT_128", "value": 3}
 968    ]
 969   },
 970   "VGT_GS_MODE_TYPE": {
 971    "entries": [
 972     {"name": "GS_OFF", "value": 0},
 973     {"name": "GS_SCENARIO_A", "value": 1},
 974     {"name": "GS_SCENARIO_B", "value": 2},
 975     {"name": "GS_SCENARIO_G", "value": 3},
 976     {"name": "GS_SCENARIO_C", "value": 4},
 977     {"name": "SPRITE_EN", "value": 5}
 978    ]
 979   },
 980   "VGT_GS_OUTPRIM_TYPE": {
 981    "entries": [
 982     {"name": "POINTLIST", "value": 0},
 983     {"name": "LINESTRIP", "value": 1},
 984     {"name": "TRISTRIP", "value": 2}
 985    ]
 986   },
 987   "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY": {
 988    "entries": [
 989     {"name": "X_8K_DWORDS", "value": 0},
 990     {"name": "X_4K_DWORDS", "value": 1},
 991     {"name": "X_2K_DWORDS", "value": 2},
 992     {"name": "X_1K_DWORDS", "value": 3}
 993    ]
 994   },
 995   "VGT_INDEX_TYPE_MODE": {
 996    "entries": [
 997     {"name": "VGT_INDEX_16", "value": 0},
 998     {"name": "VGT_INDEX_32", "value": 1},
 999     {"name": "VGT_INDEX_8", "value": 2}
1000    ]
1001   },
1002   "VGT_RDREQ_POLICY": {
1003    "entries": [
1004     {"name": "VGT_POLICY_LRU", "value": 0},
1005     {"name": "VGT_POLICY_STREAM", "value": 1}
1006    ]
1007   },
1008   "VGT_STAGES_ES_EN": {
1009    "entries": [
1010     {"name": "ES_STAGE_OFF", "value": 0},
1011     {"name": "ES_STAGE_DS", "value": 1},
1012     {"name": "ES_STAGE_REAL", "value": 2},
1013     {"name": "RESERVED_ES", "value": 3}
1014    ]
1015   },
1016   "VGT_STAGES_GS_EN": {
1017    "entries": [
1018     {"name": "GS_STAGE_OFF", "value": 0},
1019     {"name": "GS_STAGE_ON", "value": 1}
1020    ]
1021   },
1022   "VGT_STAGES_HS_EN": {
1023    "entries": [
1024     {"name": "HS_STAGE_OFF", "value": 0},
1025     {"name": "HS_STAGE_ON", "value": 1}
1026    ]
1027   },
1028   "VGT_STAGES_LS_EN": {
1029    "entries": [
1030     {"name": "LS_STAGE_OFF", "value": 0},
1031     {"name": "LS_STAGE_ON", "value": 1},
1032     {"name": "CS_STAGE_ON", "value": 2},
1033     {"name": "RESERVED_LS", "value": 3}
1034    ]
1035   },
1036   "VGT_STAGES_VS_EN": {
1037    "entries": [
1038     {"name": "VS_STAGE_REAL", "value": 0},
1039     {"name": "VS_STAGE_DS", "value": 1},
1040     {"name": "VS_STAGE_COPY_SHADER", "value": 2},
1041     {"name": "RESERVED_VS", "value": 3}
1042    ]
1043   },
1044   "VGT_TESS_PARTITION": {
1045    "entries": [
1046     {"name": "PART_INTEGER", "value": 0},
1047     {"name": "PART_POW2", "value": 1},
1048     {"name": "PART_FRAC_ODD", "value": 2},
1049     {"name": "PART_FRAC_EVEN", "value": 3}
1050    ]
1051   },
1052   "VGT_TESS_TOPOLOGY": {
1053    "entries": [
1054     {"name": "OUTPUT_POINT", "value": 0},
1055     {"name": "OUTPUT_LINE", "value": 1},
1056     {"name": "OUTPUT_TRIANGLE_CW", "value": 2},
1057     {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}
1058    ]
1059   },
1060   "VGT_TESS_TYPE": {
1061    "entries": [
1062     {"name": "TESS_ISOLINE", "value": 0},
1063     {"name": "TESS_TRIANGLE", "value": 1},
1064     {"name": "TESS_QUAD", "value": 2}
1065    ]
1066   },
1067   "ZFormat": {
1068    "entries": [
1069     {"name": "Z_INVALID", "value": 0},
1070     {"name": "Z_16", "value": 1},
1071     {"name": "Z_24", "value": 2},
1072     {"name": "Z_32_FLOAT", "value": 3}
1073    ]
1074   },
1075   "ZLimitSumm": {
1076    "entries": [
1077     {"name": "FORCE_SUMM_OFF", "value": 0},
1078     {"name": "FORCE_SUMM_MINZ", "value": 1},
1079     {"name": "FORCE_SUMM_MAXZ", "value": 2},
1080     {"name": "FORCE_SUMM_BOTH", "value": 3}
1081    ]
1082   },
1083   "ZOrder": {
1084    "entries": [
1085     {"name": "LATE_Z", "value": 0},
1086     {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},
1087     {"name": "RE_Z", "value": 2},
1088     {"name": "EARLY_Z_THEN_RE_Z", "value": 3}
1089    ]
1090   }
1091  },
1092  "register_mappings": [
1093   {
1094    "chips": ["gfx8"],
1095    "map": {"at": 68, "to": "mm"},
1096    "name": "SQ_WAVE_MODE",
1097    "type_ref": "SQ_WAVE_MODE"
1098   },
1099   {
1100    "chips": ["gfx8"],
1101    "map": {"at": 72, "to": "mm"},
1102    "name": "SQ_WAVE_STATUS",
1103    "type_ref": "SQ_WAVE_STATUS"
1104   },
1105   {
1106    "chips": ["gfx8"],
1107    "map": {"at": 76, "to": "mm"},
1108    "name": "SQ_WAVE_TRAPSTS",
1109    "type_ref": "SQ_WAVE_TRAPSTS"
1110   },
1111   {
1112    "chips": ["gfx8"],
1113    "map": {"at": 80, "to": "mm"},
1114    "name": "SQ_WAVE_HW_ID",
1115    "type_ref": "SQ_WAVE_HW_ID"
1116   },
1117   {
1118    "chips": ["gfx8"],
1119    "map": {"at": 84, "to": "mm"},
1120    "name": "SQ_WAVE_GPR_ALLOC",
1121    "type_ref": "SQ_WAVE_GPR_ALLOC"
1122   },
1123   {
1124    "chips": ["gfx8"],
1125    "map": {"at": 88, "to": "mm"},
1126    "name": "SQ_WAVE_LDS_ALLOC",
1127    "type_ref": "SQ_WAVE_LDS_ALLOC"
1128   },
1129   {
1130    "chips": ["gfx8"],
1131    "map": {"at": 92, "to": "mm"},
1132    "name": "SQ_WAVE_IB_STS",
1133    "type_ref": "SQ_WAVE_IB_STS"
1134   },
1135   {
1136    "chips": ["gfx8"],
1137    "map": {"at": 96, "to": "mm"},
1138    "name": "SQ_WAVE_PC_LO",
1139    "type_ref": "SQ_WAVE_PC_LO"
1140   },
1141   {
1142    "chips": ["gfx8"],
1143    "map": {"at": 100, "to": "mm"},
1144    "name": "SQ_WAVE_PC_HI",
1145    "type_ref": "SQ_WAVE_PC_HI"
1146   },
1147   {
1148    "chips": ["gfx8"],
1149    "map": {"at": 104, "to": "mm"},
1150    "name": "SQ_WAVE_INST_DW0",
1151    "type_ref": "SQ_WAVE_INST_DW0"
1152   },
1153   {
1154    "chips": ["gfx8"],
1155    "map": {"at": 108, "to": "mm"},
1156    "name": "SQ_WAVE_INST_DW1",
1157    "type_ref": "SQ_WAVE_INST_DW1"
1158   },
1159   {
1160    "chips": ["gfx8"],
1161    "map": {"at": 112, "to": "mm"},
1162    "name": "SQ_WAVE_IB_DBG0",
1163    "type_ref": "SQ_WAVE_IB_DBG0"
1164   },
1165   {
1166    "chips": ["gfx8"],
1167    "map": {"at": 116, "to": "mm"},
1168    "name": "SQ_WAVE_IB_DBG1",
1169    "type_ref": "SQ_WAVE_IB_DBG1"
1170   },
1171   {
1172    "chips": ["gfx8"],
1173    "map": {"at": 2480, "to": "mm"},
1174    "name": "SQ_WAVE_TBA_LO",
1175    "type_ref": "CP_PFP_METADATA_BASE_ADDR"
1176   },
1177   {
1178    "chips": ["gfx8"],
1179    "map": {"at": 2484, "to": "mm"},
1180    "name": "SQ_WAVE_TBA_HI",
1181    "type_ref": "SQ_WAVE_TBA_HI"
1182   },
1183   {
1184    "chips": ["gfx8"],
1185    "map": {"at": 2488, "to": "mm"},
1186    "name": "SQ_WAVE_TMA_LO",
1187    "type_ref": "CP_PFP_METADATA_BASE_ADDR"
1188   },
1189   {
1190    "chips": ["gfx8"],
1191    "map": {"at": 2492, "to": "mm"},
1192    "name": "SQ_WAVE_TMA_HI",
1193    "type_ref": "SQ_WAVE_TBA_HI"
1194   },
1195   {
1196    "chips": ["gfx8"],
1197    "map": {"at": 2496, "to": "mm"},
1198    "name": "SQ_WAVE_TTMP0",
1199    "type_ref": "CP_APPEND_DATA"
1200   },
1201   {
1202    "chips": ["gfx8"],
1203    "map": {"at": 2500, "to": "mm"},
1204    "name": "SQ_WAVE_TTMP1",
1205    "type_ref": "CP_APPEND_DATA"
1206   },
1207   {
1208    "chips": ["gfx8"],
1209    "map": {"at": 2504, "to": "mm"},
1210    "name": "SQ_WAVE_TTMP2",
1211    "type_ref": "CP_APPEND_DATA"
1212   },
1213   {
1214    "chips": ["gfx8"],
1215    "map": {"at": 2508, "to": "mm"},
1216    "name": "SQ_WAVE_TTMP3",
1217    "type_ref": "CP_APPEND_DATA"
1218   },
1219   {
1220    "chips": ["gfx8"],
1221    "map": {"at": 2512, "to": "mm"},
1222    "name": "SQ_WAVE_TTMP4",
1223    "type_ref": "CP_APPEND_DATA"
1224   },
1225   {
1226    "chips": ["gfx8"],
1227    "map": {"at": 2516, "to": "mm"},
1228    "name": "SQ_WAVE_TTMP5",
1229    "type_ref": "CP_APPEND_DATA"
1230   },
1231   {
1232    "chips": ["gfx8"],
1233    "map": {"at": 2520, "to": "mm"},
1234    "name": "SQ_WAVE_TTMP6",
1235    "type_ref": "CP_APPEND_DATA"
1236   },
1237   {
1238    "chips": ["gfx8"],
1239    "map": {"at": 2524, "to": "mm"},
1240    "name": "SQ_WAVE_TTMP7",
1241    "type_ref": "CP_APPEND_DATA"
1242   },
1243   {
1244    "chips": ["gfx8"],
1245    "map": {"at": 2528, "to": "mm"},
1246    "name": "SQ_WAVE_TTMP8",
1247    "type_ref": "CP_APPEND_DATA"
1248   },
1249   {
1250    "chips": ["gfx8"],
1251    "map": {"at": 2532, "to": "mm"},
1252    "name": "SQ_WAVE_TTMP9",
1253    "type_ref": "CP_APPEND_DATA"
1254   },
1255   {
1256    "chips": ["gfx8"],
1257    "map": {"at": 2536, "to": "mm"},
1258    "name": "SQ_WAVE_TTMP10",
1259    "type_ref": "CP_APPEND_DATA"
1260   },
1261   {
1262    "chips": ["gfx8"],
1263    "map": {"at": 2540, "to": "mm"},
1264    "name": "SQ_WAVE_TTMP11",
1265    "type_ref": "CP_APPEND_DATA"
1266   },
1267   {
1268    "chips": ["gfx8"],
1269    "map": {"at": 2544, "to": "mm"},
1270    "name": "SQ_WAVE_M0",
1271    "type_ref": "SQ_WAVE_M0"
1272   },
1273   {
1274    "chips": ["gfx8"],
1275    "map": {"at": 2552, "to": "mm"},
1276    "name": "SQ_WAVE_EXEC_LO",
1277    "type_ref": "SQ_WAVE_EXEC_LO"
1278   },
1279   {
1280    "chips": ["gfx8"],
1281    "map": {"at": 2556, "to": "mm"},
1282    "name": "SQ_WAVE_EXEC_HI",
1283    "type_ref": "SQ_WAVE_EXEC_HI"
1284   },
1285   {
1286    "chips": ["gfx8"],
1287    "map": {"at": 32776, "to": "mm"},
1288    "name": "GRBM_STATUS2",
1289    "type_ref": "GRBM_STATUS2"
1290   },
1291   {
1292    "chips": ["gfx8"],
1293    "map": {"at": 32784, "to": "mm"},
1294    "name": "GRBM_STATUS",
1295    "type_ref": "GRBM_STATUS"
1296   },
1297   {
1298    "chips": ["gfx8"],
1299    "map": {"at": 32788, "to": "mm"},
1300    "name": "GRBM_STATUS_SE0",
1301    "type_ref": "GRBM_STATUS_SE0"
1302   },
1303   {
1304    "chips": ["gfx8"],
1305    "map": {"at": 32792, "to": "mm"},
1306    "name": "GRBM_STATUS_SE1",
1307    "type_ref": "GRBM_STATUS_SE0"
1308   },
1309   {
1310    "chips": ["gfx8"],
1311    "map": {"at": 32824, "to": "mm"},
1312    "name": "GRBM_STATUS_SE2",
1313    "type_ref": "GRBM_STATUS_SE0"
1314   },
1315   {
1316    "chips": ["gfx8"],
1317    "map": {"at": 32828, "to": "mm"},
1318    "name": "GRBM_STATUS_SE3",
1319    "type_ref": "GRBM_STATUS_SE0"
1320   },
1321   {
1322    "chips": ["gfx8"],
1323    "map": {"at": 33296, "to": "mm"},
1324    "name": "CP_CPC_STATUS",
1325    "type_ref": "CP_CPC_STATUS"
1326   },
1327   {
1328    "chips": ["gfx8"],
1329    "map": {"at": 33300, "to": "mm"},
1330    "name": "CP_CPC_BUSY_STAT",
1331    "type_ref": "CP_CPC_BUSY_STAT"
1332   },
1333   {
1334    "chips": ["gfx8"],
1335    "map": {"at": 33304, "to": "mm"},
1336    "name": "CP_CPC_STALLED_STAT1",
1337    "type_ref": "CP_CPC_STALLED_STAT1"
1338   },
1339   {
1340    "chips": ["gfx8"],
1341    "map": {"at": 33308, "to": "mm"},
1342    "name": "CP_CPF_STATUS",
1343    "type_ref": "CP_CPF_STATUS"
1344   },
1345   {
1346    "chips": ["gfx8"],
1347    "map": {"at": 33312, "to": "mm"},
1348    "name": "CP_CPF_BUSY_STAT",
1349    "type_ref": "CP_CPF_BUSY_STAT"
1350   },
1351   {
1352    "chips": ["gfx8"],
1353    "map": {"at": 33316, "to": "mm"},
1354    "name": "CP_CPF_STALLED_STAT1",
1355    "type_ref": "CP_CPF_STALLED_STAT1"
1356   },
1357   {
1358    "chips": ["gfx8"],
1359    "map": {"at": 33324, "to": "mm"},
1360    "name": "CP_CPC_GRBM_FREE_COUNT",
1361    "type_ref": "CP_CPC_GRBM_FREE_COUNT"
1362   },
1363   {
1364    "chips": ["gfx8"],
1365    "map": {"at": 33344, "to": "mm"},
1366    "name": "CP_CPC_SCRATCH_INDEX",
1367    "type_ref": "CP_CPC_SCRATCH_INDEX"
1368   },
1369   {
1370    "chips": ["gfx8"],
1371    "map": {"at": 33348, "to": "mm"},
1372    "name": "CP_CPC_SCRATCH_DATA",
1373    "type_ref": "CP_CPC_SCRATCH_DATA"
1374   },
1375   {
1376    "chips": ["gfx8"],
1377    "map": {"at": 33436, "to": "mm"},
1378    "name": "CP_CPC_HALT_HYST_COUNT",
1379    "type_ref": "CP_CPC_HALT_HYST_COUNT"
1380   },
1381   {
1382    "chips": ["gfx8"],
1383    "map": {"at": 36416, "to": "mm"},
1384    "name": "SQ_THREAD_TRACE_CNTR",
1385    "type_ref": "SQ_THREAD_TRACE_CNTR"
1386   },
1387   {
1388    "chips": ["gfx8"],
1389    "map": {"at": 36608, "to": "mm"},
1390    "name": "SQ_BUF_RSRC_WORD0",
1391    "type_ref": "SQ_BUF_RSRC_WORD0"
1392   },
1393   {
1394    "chips": ["gfx8"],
1395    "map": {"at": 36612, "to": "mm"},
1396    "name": "SQ_BUF_RSRC_WORD1",
1397    "type_ref": "SQ_BUF_RSRC_WORD1"
1398   },
1399   {
1400    "chips": ["gfx8"],
1401    "map": {"at": 36616, "to": "mm"},
1402    "name": "SQ_BUF_RSRC_WORD2",
1403    "type_ref": "SQ_BUF_RSRC_WORD2"
1404   },
1405   {
1406    "chips": ["gfx8"],
1407    "map": {"at": 36620, "to": "mm"},
1408    "name": "SQ_BUF_RSRC_WORD3",
1409    "type_ref": "SQ_BUF_RSRC_WORD3"
1410   },
1411   {
1412    "chips": ["gfx8"],
1413    "map": {"at": 36624, "to": "mm"},
1414    "name": "SQ_IMG_RSRC_WORD0",
1415    "type_ref": "SQ_BUF_RSRC_WORD0"
1416   },
1417   {
1418    "chips": ["gfx8"],
1419    "map": {"at": 36628, "to": "mm"},
1420    "name": "SQ_IMG_RSRC_WORD1",
1421    "type_ref": "SQ_IMG_RSRC_WORD1"
1422   },
1423   {
1424    "chips": ["gfx8"],
1425    "map": {"at": 36632, "to": "mm"},
1426    "name": "SQ_IMG_RSRC_WORD2",
1427    "type_ref": "SQ_IMG_RSRC_WORD2"
1428   },
1429   {
1430    "chips": ["gfx8"],
1431    "map": {"at": 36636, "to": "mm"},
1432    "name": "SQ_IMG_RSRC_WORD3",
1433    "type_ref": "SQ_IMG_RSRC_WORD3"
1434   },
1435   {
1436    "chips": ["gfx8"],
1437    "map": {"at": 36640, "to": "mm"},
1438    "name": "SQ_IMG_RSRC_WORD4",
1439    "type_ref": "SQ_IMG_RSRC_WORD4"
1440   },
1441   {
1442    "chips": ["gfx8"],
1443    "map": {"at": 36644, "to": "mm"},
1444    "name": "SQ_IMG_RSRC_WORD5",
1445    "type_ref": "SQ_IMG_RSRC_WORD5"
1446   },
1447   {
1448    "chips": ["gfx8"],
1449    "map": {"at": 36648, "to": "mm"},
1450    "name": "SQ_IMG_RSRC_WORD6",
1451    "type_ref": "SQ_IMG_RSRC_WORD6"
1452   },
1453   {
1454    "chips": ["gfx8"],
1455    "map": {"at": 36652, "to": "mm"},
1456    "name": "SQ_IMG_RSRC_WORD7",
1457    "type_ref": "SQ_IMG_RSRC_WORD7"
1458   },
1459   {
1460    "chips": ["gfx8"],
1461    "map": {"at": 36656, "to": "mm"},
1462    "name": "SQ_IMG_SAMP_WORD0",
1463    "type_ref": "SQ_IMG_SAMP_WORD0"
1464   },
1465   {
1466    "chips": ["gfx8"],
1467    "map": {"at": 36660, "to": "mm"},
1468    "name": "SQ_IMG_SAMP_WORD1",
1469    "type_ref": "SQ_IMG_SAMP_WORD1"
1470   },
1471   {
1472    "chips": ["gfx8"],
1473    "map": {"at": 36664, "to": "mm"},
1474    "name": "SQ_IMG_SAMP_WORD2",
1475    "type_ref": "SQ_IMG_SAMP_WORD2"
1476   },
1477   {
1478    "chips": ["gfx8"],
1479    "map": {"at": 36668, "to": "mm"},
1480    "name": "SQ_IMG_SAMP_WORD3",
1481    "type_ref": "SQ_IMG_SAMP_WORD3"
1482   },
1483   {
1484    "chips": ["gfx8"],
1485    "map": {"at": 37120, "to": "mm"},
1486    "name": "SPI_CONFIG_CNTL",
1487    "type_ref": "SPI_CONFIG_CNTL"
1488   },
1489   {
1490    "chips": ["gfx8"],
1491    "map": {"at": 39160, "to": "mm"},
1492    "name": "GB_ADDR_CONFIG",
1493    "type_ref": "GB_ADDR_CONFIG"
1494   },
1495   {
1496    "chips": ["gfx8"],
1497    "map": {"at": 39184, "to": "mm"},
1498    "name": "GB_TILE_MODE0",
1499    "type_ref": "GB_TILE_MODE0"
1500   },
1501   {
1502    "chips": ["gfx8"],
1503    "map": {"at": 39188, "to": "mm"},
1504    "name": "GB_TILE_MODE1",
1505    "type_ref": "GB_TILE_MODE0"
1506   },
1507   {
1508    "chips": ["gfx8"],
1509    "map": {"at": 39192, "to": "mm"},
1510    "name": "GB_TILE_MODE2",
1511    "type_ref": "GB_TILE_MODE0"
1512   },
1513   {
1514    "chips": ["gfx8"],
1515    "map": {"at": 39196, "to": "mm"},
1516    "name": "GB_TILE_MODE3",
1517    "type_ref": "GB_TILE_MODE0"
1518   },
1519   {
1520    "chips": ["gfx8"],
1521    "map": {"at": 39200, "to": "mm"},
1522    "name": "GB_TILE_MODE4",
1523    "type_ref": "GB_TILE_MODE0"
1524   },
1525   {
1526    "chips": ["gfx8"],
1527    "map": {"at": 39204, "to": "mm"},
1528    "name": "GB_TILE_MODE5",
1529    "type_ref": "GB_TILE_MODE0"
1530   },
1531   {
1532    "chips": ["gfx8"],
1533    "map": {"at": 39208, "to": "mm"},
1534    "name": "GB_TILE_MODE6",
1535    "type_ref": "GB_TILE_MODE0"
1536   },
1537   {
1538    "chips": ["gfx8"],
1539    "map": {"at": 39212, "to": "mm"},
1540    "name": "GB_TILE_MODE7",
1541    "type_ref": "GB_TILE_MODE0"
1542   },
1543   {
1544    "chips": ["gfx8"],
1545    "map": {"at": 39216, "to": "mm"},
1546    "name": "GB_TILE_MODE8",
1547    "type_ref": "GB_TILE_MODE0"
1548   },
1549   {
1550    "chips": ["gfx8"],
1551    "map": {"at": 39220, "to": "mm"},
1552    "name": "GB_TILE_MODE9",
1553    "type_ref": "GB_TILE_MODE0"
1554   },
1555   {
1556    "chips": ["gfx8"],
1557    "map": {"at": 39224, "to": "mm"},
1558    "name": "GB_TILE_MODE10",
1559    "type_ref": "GB_TILE_MODE0"
1560   },
1561   {
1562    "chips": ["gfx8"],
1563    "map": {"at": 39228, "to": "mm"},
1564    "name": "GB_TILE_MODE11",
1565    "type_ref": "GB_TILE_MODE0"
1566   },
1567   {
1568    "chips": ["gfx8"],
1569    "map": {"at": 39232, "to": "mm"},
1570    "name": "GB_TILE_MODE12",
1571    "type_ref": "GB_TILE_MODE0"
1572   },
1573   {
1574    "chips": ["gfx8"],
1575    "map": {"at": 39236, "to": "mm"},
1576    "name": "GB_TILE_MODE13",
1577    "type_ref": "GB_TILE_MODE0"
1578   },
1579   {
1580    "chips": ["gfx8"],
1581    "map": {"at": 39240, "to": "mm"},
1582    "name": "GB_TILE_MODE14",
1583    "type_ref": "GB_TILE_MODE0"
1584   },
1585   {
1586    "chips": ["gfx8"],
1587    "map": {"at": 39244, "to": "mm"},
1588    "name": "GB_TILE_MODE15",
1589    "type_ref": "GB_TILE_MODE0"
1590   },
1591   {
1592    "chips": ["gfx8"],
1593    "map": {"at": 39248, "to": "mm"},
1594    "name": "GB_TILE_MODE16",
1595    "type_ref": "GB_TILE_MODE0"
1596   },
1597   {
1598    "chips": ["gfx8"],
1599    "map": {"at": 39252, "to": "mm"},
1600    "name": "GB_TILE_MODE17",
1601    "type_ref": "GB_TILE_MODE0"
1602   },
1603   {
1604    "chips": ["gfx8"],
1605    "map": {"at": 39256, "to": "mm"},
1606    "name": "GB_TILE_MODE18",
1607    "type_ref": "GB_TILE_MODE0"
1608   },
1609   {
1610    "chips": ["gfx8"],
1611    "map": {"at": 39260, "to": "mm"},
1612    "name": "GB_TILE_MODE19",
1613    "type_ref": "GB_TILE_MODE0"
1614   },
1615   {
1616    "chips": ["gfx8"],
1617    "map": {"at": 39264, "to": "mm"},
1618    "name": "GB_TILE_MODE20",
1619    "type_ref": "GB_TILE_MODE0"
1620   },
1621   {
1622    "chips": ["gfx8"],
1623    "map": {"at": 39268, "to": "mm"},
1624    "name": "GB_TILE_MODE21",
1625    "type_ref": "GB_TILE_MODE0"
1626   },
1627   {
1628    "chips": ["gfx8"],
1629    "map": {"at": 39272, "to": "mm"},
1630    "name": "GB_TILE_MODE22",
1631    "type_ref": "GB_TILE_MODE0"
1632   },
1633   {
1634    "chips": ["gfx8"],
1635    "map": {"at": 39276, "to": "mm"},
1636    "name": "GB_TILE_MODE23",
1637    "type_ref": "GB_TILE_MODE0"
1638   },
1639   {
1640    "chips": ["gfx8"],
1641    "map": {"at": 39280, "to": "mm"},
1642    "name": "GB_TILE_MODE24",
1643    "type_ref": "GB_TILE_MODE0"
1644   },
1645   {
1646    "chips": ["gfx8"],
1647    "map": {"at": 39284, "to": "mm"},
1648    "name": "GB_TILE_MODE25",
1649    "type_ref": "GB_TILE_MODE0"
1650   },
1651   {
1652    "chips": ["gfx8"],
1653    "map": {"at": 39288, "to": "mm"},
1654    "name": "GB_TILE_MODE26",
1655    "type_ref": "GB_TILE_MODE0"
1656   },
1657   {
1658    "chips": ["gfx8"],
1659    "map": {"at": 39292, "to": "mm"},
1660    "name": "GB_TILE_MODE27",
1661    "type_ref": "GB_TILE_MODE0"
1662   },
1663   {
1664    "chips": ["gfx8"],
1665    "map": {"at": 39296, "to": "mm"},
1666    "name": "GB_TILE_MODE28",
1667    "type_ref": "GB_TILE_MODE0"
1668   },
1669   {
1670    "chips": ["gfx8"],
1671    "map": {"at": 39300, "to": "mm"},
1672    "name": "GB_TILE_MODE29",
1673    "type_ref": "GB_TILE_MODE0"
1674   },
1675   {
1676    "chips": ["gfx8"],
1677    "map": {"at": 39304, "to": "mm"},
1678    "name": "GB_TILE_MODE30",
1679    "type_ref": "GB_TILE_MODE0"
1680   },
1681   {
1682    "chips": ["gfx8"],
1683    "map": {"at": 39308, "to": "mm"},
1684    "name": "GB_TILE_MODE31",
1685    "type_ref": "GB_TILE_MODE0"
1686   },
1687   {
1688    "chips": ["gfx8"],
1689    "map": {"at": 39312, "to": "mm"},
1690    "name": "GB_MACROTILE_MODE0",
1691    "type_ref": "GB_MACROTILE_MODE0"
1692   },
1693   {
1694    "chips": ["gfx8"],
1695    "map": {"at": 39316, "to": "mm"},
1696    "name": "GB_MACROTILE_MODE1",
1697    "type_ref": "GB_MACROTILE_MODE0"
1698   },
1699   {
1700    "chips": ["gfx8"],
1701    "map": {"at": 39320, "to": "mm"},
1702    "name": "GB_MACROTILE_MODE2",
1703    "type_ref": "GB_MACROTILE_MODE0"
1704   },
1705   {
1706    "chips": ["gfx8"],
1707    "map": {"at": 39324, "to": "mm"},
1708    "name": "GB_MACROTILE_MODE3",
1709    "type_ref": "GB_MACROTILE_MODE0"
1710   },
1711   {
1712    "chips": ["gfx8"],
1713    "map": {"at": 39328, "to": "mm"},
1714    "name": "GB_MACROTILE_MODE4",
1715    "type_ref": "GB_MACROTILE_MODE0"
1716   },
1717   {
1718    "chips": ["gfx8"],
1719    "map": {"at": 39332, "to": "mm"},
1720    "name": "GB_MACROTILE_MODE5",
1721    "type_ref": "GB_MACROTILE_MODE0"
1722   },
1723   {
1724    "chips": ["gfx8"],
1725    "map": {"at": 39336, "to": "mm"},
1726    "name": "GB_MACROTILE_MODE6",
1727    "type_ref": "GB_MACROTILE_MODE0"
1728   },
1729   {
1730    "chips": ["gfx8"],
1731    "map": {"at": 39340, "to": "mm"},
1732    "name": "GB_MACROTILE_MODE7",
1733    "type_ref": "GB_MACROTILE_MODE0"
1734   },
1735   {
1736    "chips": ["gfx8"],
1737    "map": {"at": 39344, "to": "mm"},
1738    "name": "GB_MACROTILE_MODE8",
1739    "type_ref": "GB_MACROTILE_MODE0"
1740   },
1741   {
1742    "chips": ["gfx8"],
1743    "map": {"at": 39348, "to": "mm"},
1744    "name": "GB_MACROTILE_MODE9",
1745    "type_ref": "GB_MACROTILE_MODE0"
1746   },
1747   {
1748    "chips": ["gfx8"],
1749    "map": {"at": 39352, "to": "mm"},
1750    "name": "GB_MACROTILE_MODE10",
1751    "type_ref": "GB_MACROTILE_MODE0"
1752   },
1753   {
1754    "chips": ["gfx8"],
1755    "map": {"at": 39356, "to": "mm"},
1756    "name": "GB_MACROTILE_MODE11",
1757    "type_ref": "GB_MACROTILE_MODE0"
1758   },
1759   {
1760    "chips": ["gfx8"],
1761    "map": {"at": 39360, "to": "mm"},
1762    "name": "GB_MACROTILE_MODE12",
1763    "type_ref": "GB_MACROTILE_MODE0"
1764   },
1765   {
1766    "chips": ["gfx8"],
1767    "map": {"at": 39364, "to": "mm"},
1768    "name": "GB_MACROTILE_MODE13",
1769    "type_ref": "GB_MACROTILE_MODE0"
1770   },
1771   {
1772    "chips": ["gfx8"],
1773    "map": {"at": 39368, "to": "mm"},
1774    "name": "GB_MACROTILE_MODE14",
1775    "type_ref": "GB_MACROTILE_MODE0"
1776   },
1777   {
1778    "chips": ["gfx8"],
1779    "map": {"at": 39372, "to": "mm"},
1780    "name": "GB_MACROTILE_MODE15",
1781    "type_ref": "GB_MACROTILE_MODE0"
1782   },
1783   {
1784    "chips": ["gfx8"],
1785    "map": {"at": 45056, "to": "mm"},
1786    "name": "SPI_SHADER_TBA_LO_PS",
1787    "type_ref": "SPI_SHADER_TBA_LO_PS"
1788   },
1789   {
1790    "chips": ["gfx8"],
1791    "map": {"at": 45060, "to": "mm"},
1792    "name": "SPI_SHADER_TBA_HI_PS",
1793    "type_ref": "SPI_SHADER_TBA_HI_PS"
1794   },
1795   {
1796    "chips": ["gfx8"],
1797    "map": {"at": 45064, "to": "mm"},
1798    "name": "SPI_SHADER_TMA_LO_PS",
1799    "type_ref": "SPI_SHADER_TBA_LO_PS"
1800   },
1801   {
1802    "chips": ["gfx8"],
1803    "map": {"at": 45068, "to": "mm"},
1804    "name": "SPI_SHADER_TMA_HI_PS",
1805    "type_ref": "SPI_SHADER_TBA_HI_PS"
1806   },
1807   {
1808    "chips": ["gfx8"],
1809    "map": {"at": 45084, "to": "mm"},
1810    "name": "SPI_SHADER_PGM_RSRC3_PS",
1811    "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
1812   },
1813   {
1814    "chips": ["gfx8"],
1815    "map": {"at": 45088, "to": "mm"},
1816    "name": "SPI_SHADER_PGM_LO_PS",
1817    "type_ref": "SPI_SHADER_TBA_LO_PS"
1818   },
1819   {
1820    "chips": ["gfx8"],
1821    "map": {"at": 45092, "to": "mm"},
1822    "name": "SPI_SHADER_PGM_HI_PS",
1823    "type_ref": "SPI_SHADER_TBA_HI_PS"
1824   },
1825   {
1826    "chips": ["gfx8"],
1827    "map": {"at": 45096, "to": "mm"},
1828    "name": "SPI_SHADER_PGM_RSRC1_PS",
1829    "type_ref": "SPI_SHADER_PGM_RSRC1_PS"
1830   },
1831   {
1832    "chips": ["gfx8"],
1833    "map": {"at": 45100, "to": "mm"},
1834    "name": "SPI_SHADER_PGM_RSRC2_PS",
1835    "type_ref": "SPI_SHADER_PGM_RSRC2_PS"
1836   },
1837   {
1838    "chips": ["gfx8"],
1839    "map": {"at": 45104, "to": "mm"},
1840    "name": "SPI_SHADER_USER_DATA_PS_0",
1841    "type_ref": "CP_APPEND_DATA"
1842   },
1843   {
1844    "chips": ["gfx8"],
1845    "map": {"at": 45108, "to": "mm"},
1846    "name": "SPI_SHADER_USER_DATA_PS_1",
1847    "type_ref": "CP_APPEND_DATA"
1848   },
1849   {
1850    "chips": ["gfx8"],
1851    "map": {"at": 45112, "to": "mm"},
1852    "name": "SPI_SHADER_USER_DATA_PS_2",
1853    "type_ref": "CP_APPEND_DATA"
1854   },
1855   {
1856    "chips": ["gfx8"],
1857    "map": {"at": 45116, "to": "mm"},
1858    "name": "SPI_SHADER_USER_DATA_PS_3",
1859    "type_ref": "CP_APPEND_DATA"
1860   },
1861   {
1862    "chips": ["gfx8"],
1863    "map": {"at": 45120, "to": "mm"},
1864    "name": "SPI_SHADER_USER_DATA_PS_4",
1865    "type_ref": "CP_APPEND_DATA"
1866   },
1867   {
1868    "chips": ["gfx8"],
1869    "map": {"at": 45124, "to": "mm"},
1870    "name": "SPI_SHADER_USER_DATA_PS_5",
1871    "type_ref": "CP_APPEND_DATA"
1872   },
1873   {
1874    "chips": ["gfx8"],
1875    "map": {"at": 45128, "to": "mm"},
1876    "name": "SPI_SHADER_USER_DATA_PS_6",
1877    "type_ref": "CP_APPEND_DATA"
1878   },
1879   {
1880    "chips": ["gfx8"],
1881    "map": {"at": 45132, "to": "mm"},
1882    "name": "SPI_SHADER_USER_DATA_PS_7",
1883    "type_ref": "CP_APPEND_DATA"
1884   },
1885   {
1886    "chips": ["gfx8"],
1887    "map": {"at": 45136, "to": "mm"},
1888    "name": "SPI_SHADER_USER_DATA_PS_8",
1889    "type_ref": "CP_APPEND_DATA"
1890   },
1891   {
1892    "chips": ["gfx8"],
1893    "map": {"at": 45140, "to": "mm"},
1894    "name": "SPI_SHADER_USER_DATA_PS_9",
1895    "type_ref": "CP_APPEND_DATA"
1896   },
1897   {
1898    "chips": ["gfx8"],
1899    "map": {"at": 45144, "to": "mm"},
1900    "name": "SPI_SHADER_USER_DATA_PS_10",
1901    "type_ref": "CP_APPEND_DATA"
1902   },
1903   {
1904    "chips": ["gfx8"],
1905    "map": {"at": 45148, "to": "mm"},
1906    "name": "SPI_SHADER_USER_DATA_PS_11",
1907    "type_ref": "CP_APPEND_DATA"
1908   },
1909   {
1910    "chips": ["gfx8"],
1911    "map": {"at": 45152, "to": "mm"},
1912    "name": "SPI_SHADER_USER_DATA_PS_12",
1913    "type_ref": "CP_APPEND_DATA"
1914   },
1915   {
1916    "chips": ["gfx8"],
1917    "map": {"at": 45156, "to": "mm"},
1918    "name": "SPI_SHADER_USER_DATA_PS_13",
1919    "type_ref": "CP_APPEND_DATA"
1920   },
1921   {
1922    "chips": ["gfx8"],
1923    "map": {"at": 45160, "to": "mm"},
1924    "name": "SPI_SHADER_USER_DATA_PS_14",
1925    "type_ref": "CP_APPEND_DATA"
1926   },
1927   {
1928    "chips": ["gfx8"],
1929    "map": {"at": 45164, "to": "mm"},
1930    "name": "SPI_SHADER_USER_DATA_PS_15",
1931    "type_ref": "CP_APPEND_DATA"
1932   },
1933   {
1934    "chips": ["gfx8"],
1935    "map": {"at": 45312, "to": "mm"},
1936    "name": "SPI_SHADER_TBA_LO_VS",
1937    "type_ref": "SPI_SHADER_TBA_LO_PS"
1938   },
1939   {
1940    "chips": ["gfx8"],
1941    "map": {"at": 45316, "to": "mm"},
1942    "name": "SPI_SHADER_TBA_HI_VS",
1943    "type_ref": "SPI_SHADER_TBA_HI_PS"
1944   },
1945   {
1946    "chips": ["gfx8"],
1947    "map": {"at": 45320, "to": "mm"},
1948    "name": "SPI_SHADER_TMA_LO_VS",
1949    "type_ref": "SPI_SHADER_TBA_LO_PS"
1950   },
1951   {
1952    "chips": ["gfx8"],
1953    "map": {"at": 45324, "to": "mm"},
1954    "name": "SPI_SHADER_TMA_HI_VS",
1955    "type_ref": "SPI_SHADER_TBA_HI_PS"
1956   },
1957   {
1958    "chips": ["gfx8"],
1959    "map": {"at": 45336, "to": "mm"},
1960    "name": "SPI_SHADER_PGM_RSRC3_VS",
1961    "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
1962   },
1963   {
1964    "chips": ["gfx8"],
1965    "map": {"at": 45340, "to": "mm"},
1966    "name": "SPI_SHADER_LATE_ALLOC_VS",
1967    "type_ref": "SPI_SHADER_LATE_ALLOC_VS"
1968   },
1969   {
1970    "chips": ["gfx8"],
1971    "map": {"at": 45344, "to": "mm"},
1972    "name": "SPI_SHADER_PGM_LO_VS",
1973    "type_ref": "SPI_SHADER_TBA_LO_PS"
1974   },
1975   {
1976    "chips": ["gfx8"],
1977    "map": {"at": 45348, "to": "mm"},
1978    "name": "SPI_SHADER_PGM_HI_VS",
1979    "type_ref": "SPI_SHADER_TBA_HI_PS"
1980   },
1981   {
1982    "chips": ["gfx8"],
1983    "map": {"at": 45352, "to": "mm"},
1984    "name": "SPI_SHADER_PGM_RSRC1_VS",
1985    "type_ref": "SPI_SHADER_PGM_RSRC1_VS"
1986   },
1987   {
1988    "chips": ["gfx8"],
1989    "map": {"at": 45356, "to": "mm"},
1990    "name": "SPI_SHADER_PGM_RSRC2_VS",
1991    "type_ref": "SPI_SHADER_PGM_RSRC2_VS"
1992   },
1993   {
1994    "chips": ["gfx8"],
1995    "map": {"at": 45360, "to": "mm"},
1996    "name": "SPI_SHADER_USER_DATA_VS_0",
1997    "type_ref": "CP_APPEND_DATA"
1998   },
1999   {
2000    "chips": ["gfx8"],
2001    "map": {"at": 45364, "to": "mm"},
2002    "name": "SPI_SHADER_USER_DATA_VS_1",
2003    "type_ref": "CP_APPEND_DATA"
2004   },
2005   {
2006    "chips": ["gfx8"],
2007    "map": {"at": 45368, "to": "mm"},
2008    "name": "SPI_SHADER_USER_DATA_VS_2",
2009    "type_ref": "CP_APPEND_DATA"
2010   },
2011   {
2012    "chips": ["gfx8"],
2013    "map": {"at": 45372, "to": "mm"},
2014    "name": "SPI_SHADER_USER_DATA_VS_3",
2015    "type_ref": "CP_APPEND_DATA"
2016   },
2017   {
2018    "chips": ["gfx8"],
2019    "map": {"at": 45376, "to": "mm"},
2020    "name": "SPI_SHADER_USER_DATA_VS_4",
2021    "type_ref": "CP_APPEND_DATA"
2022   },
2023   {
2024    "chips": ["gfx8"],
2025    "map": {"at": 45380, "to": "mm"},
2026    "name": "SPI_SHADER_USER_DATA_VS_5",
2027    "type_ref": "CP_APPEND_DATA"
2028   },
2029   {
2030    "chips": ["gfx8"],
2031    "map": {"at": 45384, "to": "mm"},
2032    "name": "SPI_SHADER_USER_DATA_VS_6",
2033    "type_ref": "CP_APPEND_DATA"
2034   },
2035   {
2036    "chips": ["gfx8"],
2037    "map": {"at": 45388, "to": "mm"},
2038    "name": "SPI_SHADER_USER_DATA_VS_7",
2039    "type_ref": "CP_APPEND_DATA"
2040   },
2041   {
2042    "chips": ["gfx8"],
2043    "map": {"at": 45392, "to": "mm"},
2044    "name": "SPI_SHADER_USER_DATA_VS_8",
2045    "type_ref": "CP_APPEND_DATA"
2046   },
2047   {
2048    "chips": ["gfx8"],
2049    "map": {"at": 45396, "to": "mm"},
2050    "name": "SPI_SHADER_USER_DATA_VS_9",
2051    "type_ref": "CP_APPEND_DATA"
2052   },
2053   {
2054    "chips": ["gfx8"],
2055    "map": {"at": 45400, "to": "mm"},
2056    "name": "SPI_SHADER_USER_DATA_VS_10",
2057    "type_ref": "CP_APPEND_DATA"
2058   },
2059   {
2060    "chips": ["gfx8"],
2061    "map": {"at": 45404, "to": "mm"},
2062    "name": "SPI_SHADER_USER_DATA_VS_11",
2063    "type_ref": "CP_APPEND_DATA"
2064   },
2065   {
2066    "chips": ["gfx8"],
2067    "map": {"at": 45408, "to": "mm"},
2068    "name": "SPI_SHADER_USER_DATA_VS_12",
2069    "type_ref": "CP_APPEND_DATA"
2070   },
2071   {
2072    "chips": ["gfx8"],
2073    "map": {"at": 45412, "to": "mm"},
2074    "name": "SPI_SHADER_USER_DATA_VS_13",
2075    "type_ref": "CP_APPEND_DATA"
2076   },
2077   {
2078    "chips": ["gfx8"],
2079    "map": {"at": 45416, "to": "mm"},
2080    "name": "SPI_SHADER_USER_DATA_VS_14",
2081    "type_ref": "CP_APPEND_DATA"
2082   },
2083   {
2084    "chips": ["gfx8"],
2085    "map": {"at": 45420, "to": "mm"},
2086    "name": "SPI_SHADER_USER_DATA_VS_15",
2087    "type_ref": "CP_APPEND_DATA"
2088   },
2089   {
2090    "chips": ["gfx8"],
2091    "map": {"at": 45552, "to": "mm"},
2092    "name": "SPI_SHADER_PGM_RSRC2_ES_VS",
2093    "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"
2094   },
2095   {
2096    "chips": ["gfx8"],
2097    "map": {"at": 45556, "to": "mm"},
2098    "name": "SPI_SHADER_PGM_RSRC2_LS_VS",
2099    "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2100   },
2101   {
2102    "chips": ["gfx8"],
2103    "map": {"at": 45568, "to": "mm"},
2104    "name": "SPI_SHADER_TBA_LO_GS",
2105    "type_ref": "SPI_SHADER_TBA_LO_PS"
2106   },
2107   {
2108    "chips": ["gfx8"],
2109    "map": {"at": 45572, "to": "mm"},
2110    "name": "SPI_SHADER_TBA_HI_GS",
2111    "type_ref": "SPI_SHADER_TBA_HI_PS"
2112   },
2113   {
2114    "chips": ["gfx8"],
2115    "map": {"at": 45576, "to": "mm"},
2116    "name": "SPI_SHADER_TMA_LO_GS",
2117    "type_ref": "SPI_SHADER_TBA_LO_PS"
2118   },
2119   {
2120    "chips": ["gfx8"],
2121    "map": {"at": 45580, "to": "mm"},
2122    "name": "SPI_SHADER_TMA_HI_GS",
2123    "type_ref": "SPI_SHADER_TBA_HI_PS"
2124   },
2125   {
2126    "chips": ["gfx8"],
2127    "map": {"at": 45596, "to": "mm"},
2128    "name": "SPI_SHADER_PGM_RSRC3_GS",
2129    "type_ref": "SPI_SHADER_PGM_RSRC3_GS"
2130   },
2131   {
2132    "chips": ["gfx8"],
2133    "map": {"at": 45600, "to": "mm"},
2134    "name": "SPI_SHADER_PGM_LO_GS",
2135    "type_ref": "SPI_SHADER_TBA_LO_PS"
2136   },
2137   {
2138    "chips": ["gfx8"],
2139    "map": {"at": 45604, "to": "mm"},
2140    "name": "SPI_SHADER_PGM_HI_GS",
2141    "type_ref": "SPI_SHADER_TBA_HI_PS"
2142   },
2143   {
2144    "chips": ["gfx8"],
2145    "map": {"at": 45608, "to": "mm"},
2146    "name": "SPI_SHADER_PGM_RSRC1_GS",
2147    "type_ref": "SPI_SHADER_PGM_RSRC1_GS"
2148   },
2149   {
2150    "chips": ["gfx8"],
2151    "map": {"at": 45612, "to": "mm"},
2152    "name": "SPI_SHADER_PGM_RSRC2_GS",
2153    "type_ref": "SPI_SHADER_PGM_RSRC2_GS"
2154   },
2155   {
2156    "chips": ["gfx8"],
2157    "map": {"at": 45616, "to": "mm"},
2158    "name": "SPI_SHADER_USER_DATA_GS_0",
2159    "type_ref": "CP_APPEND_DATA"
2160   },
2161   {
2162    "chips": ["gfx8"],
2163    "map": {"at": 45620, "to": "mm"},
2164    "name": "SPI_SHADER_USER_DATA_GS_1",
2165    "type_ref": "CP_APPEND_DATA"
2166   },
2167   {
2168    "chips": ["gfx8"],
2169    "map": {"at": 45624, "to": "mm"},
2170    "name": "SPI_SHADER_USER_DATA_GS_2",
2171    "type_ref": "CP_APPEND_DATA"
2172   },
2173   {
2174    "chips": ["gfx8"],
2175    "map": {"at": 45628, "to": "mm"},
2176    "name": "SPI_SHADER_USER_DATA_GS_3",
2177    "type_ref": "CP_APPEND_DATA"
2178   },
2179   {
2180    "chips": ["gfx8"],
2181    "map": {"at": 45632, "to": "mm"},
2182    "name": "SPI_SHADER_USER_DATA_GS_4",
2183    "type_ref": "CP_APPEND_DATA"
2184   },
2185   {
2186    "chips": ["gfx8"],
2187    "map": {"at": 45636, "to": "mm"},
2188    "name": "SPI_SHADER_USER_DATA_GS_5",
2189    "type_ref": "CP_APPEND_DATA"
2190   },
2191   {
2192    "chips": ["gfx8"],
2193    "map": {"at": 45640, "to": "mm"},
2194    "name": "SPI_SHADER_USER_DATA_GS_6",
2195    "type_ref": "CP_APPEND_DATA"
2196   },
2197   {
2198    "chips": ["gfx8"],
2199    "map": {"at": 45644, "to": "mm"},
2200    "name": "SPI_SHADER_USER_DATA_GS_7",
2201    "type_ref": "CP_APPEND_DATA"
2202   },
2203   {
2204    "chips": ["gfx8"],
2205    "map": {"at": 45648, "to": "mm"},
2206    "name": "SPI_SHADER_USER_DATA_GS_8",
2207    "type_ref": "CP_APPEND_DATA"
2208   },
2209   {
2210    "chips": ["gfx8"],
2211    "map": {"at": 45652, "to": "mm"},
2212    "name": "SPI_SHADER_USER_DATA_GS_9",
2213    "type_ref": "CP_APPEND_DATA"
2214   },
2215   {
2216    "chips": ["gfx8"],
2217    "map": {"at": 45656, "to": "mm"},
2218    "name": "SPI_SHADER_USER_DATA_GS_10",
2219    "type_ref": "CP_APPEND_DATA"
2220   },
2221   {
2222    "chips": ["gfx8"],
2223    "map": {"at": 45660, "to": "mm"},
2224    "name": "SPI_SHADER_USER_DATA_GS_11",
2225    "type_ref": "CP_APPEND_DATA"
2226   },
2227   {
2228    "chips": ["gfx8"],
2229    "map": {"at": 45664, "to": "mm"},
2230    "name": "SPI_SHADER_USER_DATA_GS_12",
2231    "type_ref": "CP_APPEND_DATA"
2232   },
2233   {
2234    "chips": ["gfx8"],
2235    "map": {"at": 45668, "to": "mm"},
2236    "name": "SPI_SHADER_USER_DATA_GS_13",
2237    "type_ref": "CP_APPEND_DATA"
2238   },
2239   {
2240    "chips": ["gfx8"],
2241    "map": {"at": 45672, "to": "mm"},
2242    "name": "SPI_SHADER_USER_DATA_GS_14",
2243    "type_ref": "CP_APPEND_DATA"
2244   },
2245   {
2246    "chips": ["gfx8"],
2247    "map": {"at": 45676, "to": "mm"},
2248    "name": "SPI_SHADER_USER_DATA_GS_15",
2249    "type_ref": "CP_APPEND_DATA"
2250   },
2251   {
2252    "chips": ["gfx8"],
2253    "map": {"at": 45808, "to": "mm"},
2254    "name": "SPI_SHADER_PGM_RSRC2_ES_GS",
2255    "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"
2256   },
2257   {
2258    "chips": ["gfx8"],
2259    "map": {"at": 45824, "to": "mm"},
2260    "name": "SPI_SHADER_TBA_LO_ES",
2261    "type_ref": "SPI_SHADER_TBA_LO_PS"
2262   },
2263   {
2264    "chips": ["gfx8"],
2265    "map": {"at": 45828, "to": "mm"},
2266    "name": "SPI_SHADER_TBA_HI_ES",
2267    "type_ref": "SPI_SHADER_TBA_HI_PS"
2268   },
2269   {
2270    "chips": ["gfx8"],
2271    "map": {"at": 45832, "to": "mm"},
2272    "name": "SPI_SHADER_TMA_LO_ES",
2273    "type_ref": "SPI_SHADER_TBA_LO_PS"
2274   },
2275   {
2276    "chips": ["gfx8"],
2277    "map": {"at": 45836, "to": "mm"},
2278    "name": "SPI_SHADER_TMA_HI_ES",
2279    "type_ref": "SPI_SHADER_TBA_HI_PS"
2280   },
2281   {
2282    "chips": ["gfx8"],
2283    "map": {"at": 45852, "to": "mm"},
2284    "name": "SPI_SHADER_PGM_RSRC3_ES",
2285    "type_ref": "SPI_SHADER_PGM_RSRC3_GS"
2286   },
2287   {
2288    "chips": ["gfx8"],
2289    "map": {"at": 45856, "to": "mm"},
2290    "name": "SPI_SHADER_PGM_LO_ES",
2291    "type_ref": "SPI_SHADER_TBA_LO_PS"
2292   },
2293   {
2294    "chips": ["gfx8"],
2295    "map": {"at": 45860, "to": "mm"},
2296    "name": "SPI_SHADER_PGM_HI_ES",
2297    "type_ref": "SPI_SHADER_TBA_HI_PS"
2298   },
2299   {
2300    "chips": ["gfx8"],
2301    "map": {"at": 45864, "to": "mm"},
2302    "name": "SPI_SHADER_PGM_RSRC1_ES",
2303    "type_ref": "SPI_SHADER_PGM_RSRC1_VS"
2304   },
2305   {
2306    "chips": ["gfx8"],
2307    "map": {"at": 45868, "to": "mm"},
2308    "name": "SPI_SHADER_PGM_RSRC2_ES",
2309    "type_ref": "SPI_SHADER_PGM_RSRC2_ES_VS"
2310   },
2311   {
2312    "chips": ["gfx8"],
2313    "map": {"at": 45872, "to": "mm"},
2314    "name": "SPI_SHADER_USER_DATA_ES_0",
2315    "type_ref": "CP_APPEND_DATA"
2316   },
2317   {
2318    "chips": ["gfx8"],
2319    "map": {"at": 45876, "to": "mm"},
2320    "name": "SPI_SHADER_USER_DATA_ES_1",
2321    "type_ref": "CP_APPEND_DATA"
2322   },
2323   {
2324    "chips": ["gfx8"],
2325    "map": {"at": 45880, "to": "mm"},
2326    "name": "SPI_SHADER_USER_DATA_ES_2",
2327    "type_ref": "CP_APPEND_DATA"
2328   },
2329   {
2330    "chips": ["gfx8"],
2331    "map": {"at": 45884, "to": "mm"},
2332    "name": "SPI_SHADER_USER_DATA_ES_3",
2333    "type_ref": "CP_APPEND_DATA"
2334   },
2335   {
2336    "chips": ["gfx8"],
2337    "map": {"at": 45888, "to": "mm"},
2338    "name": "SPI_SHADER_USER_DATA_ES_4",
2339    "type_ref": "CP_APPEND_DATA"
2340   },
2341   {
2342    "chips": ["gfx8"],
2343    "map": {"at": 45892, "to": "mm"},
2344    "name": "SPI_SHADER_USER_DATA_ES_5",
2345    "type_ref": "CP_APPEND_DATA"
2346   },
2347   {
2348    "chips": ["gfx8"],
2349    "map": {"at": 45896, "to": "mm"},
2350    "name": "SPI_SHADER_USER_DATA_ES_6",
2351    "type_ref": "CP_APPEND_DATA"
2352   },
2353   {
2354    "chips": ["gfx8"],
2355    "map": {"at": 45900, "to": "mm"},
2356    "name": "SPI_SHADER_USER_DATA_ES_7",
2357    "type_ref": "CP_APPEND_DATA"
2358   },
2359   {
2360    "chips": ["gfx8"],
2361    "map": {"at": 45904, "to": "mm"},
2362    "name": "SPI_SHADER_USER_DATA_ES_8",
2363    "type_ref": "CP_APPEND_DATA"
2364   },
2365   {
2366    "chips": ["gfx8"],
2367    "map": {"at": 45908, "to": "mm"},
2368    "name": "SPI_SHADER_USER_DATA_ES_9",
2369    "type_ref": "CP_APPEND_DATA"
2370   },
2371   {
2372    "chips": ["gfx8"],
2373    "map": {"at": 45912, "to": "mm"},
2374    "name": "SPI_SHADER_USER_DATA_ES_10",
2375    "type_ref": "CP_APPEND_DATA"
2376   },
2377   {
2378    "chips": ["gfx8"],
2379    "map": {"at": 45916, "to": "mm"},
2380    "name": "SPI_SHADER_USER_DATA_ES_11",
2381    "type_ref": "CP_APPEND_DATA"
2382   },
2383   {
2384    "chips": ["gfx8"],
2385    "map": {"at": 45920, "to": "mm"},
2386    "name": "SPI_SHADER_USER_DATA_ES_12",
2387    "type_ref": "CP_APPEND_DATA"
2388   },
2389   {
2390    "chips": ["gfx8"],
2391    "map": {"at": 45924, "to": "mm"},
2392    "name": "SPI_SHADER_USER_DATA_ES_13",
2393    "type_ref": "CP_APPEND_DATA"
2394   },
2395   {
2396    "chips": ["gfx8"],
2397    "map": {"at": 45928, "to": "mm"},
2398    "name": "SPI_SHADER_USER_DATA_ES_14",
2399    "type_ref": "CP_APPEND_DATA"
2400   },
2401   {
2402    "chips": ["gfx8"],
2403    "map": {"at": 45932, "to": "mm"},
2404    "name": "SPI_SHADER_USER_DATA_ES_15",
2405    "type_ref": "CP_APPEND_DATA"
2406   },
2407   {
2408    "chips": ["gfx8"],
2409    "map": {"at": 46068, "to": "mm"},
2410    "name": "SPI_SHADER_PGM_RSRC2_LS_ES",
2411    "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2412   },
2413   {
2414    "chips": ["gfx8"],
2415    "map": {"at": 46080, "to": "mm"},
2416    "name": "SPI_SHADER_TBA_LO_HS",
2417    "type_ref": "SPI_SHADER_TBA_LO_PS"
2418   },
2419   {
2420    "chips": ["gfx8"],
2421    "map": {"at": 46084, "to": "mm"},
2422    "name": "SPI_SHADER_TBA_HI_HS",
2423    "type_ref": "SPI_SHADER_TBA_HI_PS"
2424   },
2425   {
2426    "chips": ["gfx8"],
2427    "map": {"at": 46088, "to": "mm"},
2428    "name": "SPI_SHADER_TMA_LO_HS",
2429    "type_ref": "SPI_SHADER_TBA_LO_PS"
2430   },
2431   {
2432    "chips": ["gfx8"],
2433    "map": {"at": 46092, "to": "mm"},
2434    "name": "SPI_SHADER_TMA_HI_HS",
2435    "type_ref": "SPI_SHADER_TBA_HI_PS"
2436   },
2437   {
2438    "chips": ["gfx8"],
2439    "map": {"at": 46108, "to": "mm"},
2440    "name": "SPI_SHADER_PGM_RSRC3_HS",
2441    "type_ref": "SPI_SHADER_PGM_RSRC3_HS"
2442   },
2443   {
2444    "chips": ["gfx8"],
2445    "map": {"at": 46112, "to": "mm"},
2446    "name": "SPI_SHADER_PGM_LO_HS",
2447    "type_ref": "SPI_SHADER_TBA_LO_PS"
2448   },
2449   {
2450    "chips": ["gfx8"],
2451    "map": {"at": 46116, "to": "mm"},
2452    "name": "SPI_SHADER_PGM_HI_HS",
2453    "type_ref": "SPI_SHADER_TBA_HI_PS"
2454   },
2455   {
2456    "chips": ["gfx8"],
2457    "map": {"at": 46120, "to": "mm"},
2458    "name": "SPI_SHADER_PGM_RSRC1_HS",
2459    "type_ref": "SPI_SHADER_PGM_RSRC1_HS"
2460   },
2461   {
2462    "chips": ["gfx8"],
2463    "map": {"at": 46124, "to": "mm"},
2464    "name": "SPI_SHADER_PGM_RSRC2_HS",
2465    "type_ref": "SPI_SHADER_PGM_RSRC2_HS"
2466   },
2467   {
2468    "chips": ["gfx8"],
2469    "map": {"at": 46128, "to": "mm"},
2470    "name": "SPI_SHADER_USER_DATA_HS_0",
2471    "type_ref": "CP_APPEND_DATA"
2472   },
2473   {
2474    "chips": ["gfx8"],
2475    "map": {"at": 46132, "to": "mm"},
2476    "name": "SPI_SHADER_USER_DATA_HS_1",
2477    "type_ref": "CP_APPEND_DATA"
2478   },
2479   {
2480    "chips": ["gfx8"],
2481    "map": {"at": 46136, "to": "mm"},
2482    "name": "SPI_SHADER_USER_DATA_HS_2",
2483    "type_ref": "CP_APPEND_DATA"
2484   },
2485   {
2486    "chips": ["gfx8"],
2487    "map": {"at": 46140, "to": "mm"},
2488    "name": "SPI_SHADER_USER_DATA_HS_3",
2489    "type_ref": "CP_APPEND_DATA"
2490   },
2491   {
2492    "chips": ["gfx8"],
2493    "map": {"at": 46144, "to": "mm"},
2494    "name": "SPI_SHADER_USER_DATA_HS_4",
2495    "type_ref": "CP_APPEND_DATA"
2496   },
2497   {
2498    "chips": ["gfx8"],
2499    "map": {"at": 46148, "to": "mm"},
2500    "name": "SPI_SHADER_USER_DATA_HS_5",
2501    "type_ref": "CP_APPEND_DATA"
2502   },
2503   {
2504    "chips": ["gfx8"],
2505    "map": {"at": 46152, "to": "mm"},
2506    "name": "SPI_SHADER_USER_DATA_HS_6",
2507    "type_ref": "CP_APPEND_DATA"
2508   },
2509   {
2510    "chips": ["gfx8"],
2511    "map": {"at": 46156, "to": "mm"},
2512    "name": "SPI_SHADER_USER_DATA_HS_7",
2513    "type_ref": "CP_APPEND_DATA"
2514   },
2515   {
2516    "chips": ["gfx8"],
2517    "map": {"at": 46160, "to": "mm"},
2518    "name": "SPI_SHADER_USER_DATA_HS_8",
2519    "type_ref": "CP_APPEND_DATA"
2520   },
2521   {
2522    "chips": ["gfx8"],
2523    "map": {"at": 46164, "to": "mm"},
2524    "name": "SPI_SHADER_USER_DATA_HS_9",
2525    "type_ref": "CP_APPEND_DATA"
2526   },
2527   {
2528    "chips": ["gfx8"],
2529    "map": {"at": 46168, "to": "mm"},
2530    "name": "SPI_SHADER_USER_DATA_HS_10",
2531    "type_ref": "CP_APPEND_DATA"
2532   },
2533   {
2534    "chips": ["gfx8"],
2535    "map": {"at": 46172, "to": "mm"},
2536    "name": "SPI_SHADER_USER_DATA_HS_11",
2537    "type_ref": "CP_APPEND_DATA"
2538   },
2539   {
2540    "chips": ["gfx8"],
2541    "map": {"at": 46176, "to": "mm"},
2542    "name": "SPI_SHADER_USER_DATA_HS_12",
2543    "type_ref": "CP_APPEND_DATA"
2544   },
2545   {
2546    "chips": ["gfx8"],
2547    "map": {"at": 46180, "to": "mm"},
2548    "name": "SPI_SHADER_USER_DATA_HS_13",
2549    "type_ref": "CP_APPEND_DATA"
2550   },
2551   {
2552    "chips": ["gfx8"],
2553    "map": {"at": 46184, "to": "mm"},
2554    "name": "SPI_SHADER_USER_DATA_HS_14",
2555    "type_ref": "CP_APPEND_DATA"
2556   },
2557   {
2558    "chips": ["gfx8"],
2559    "map": {"at": 46188, "to": "mm"},
2560    "name": "SPI_SHADER_USER_DATA_HS_15",
2561    "type_ref": "CP_APPEND_DATA"
2562   },
2563   {
2564    "chips": ["gfx8"],
2565    "map": {"at": 46324, "to": "mm"},
2566    "name": "SPI_SHADER_PGM_RSRC2_LS_HS",
2567    "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2568   },
2569   {
2570    "chips": ["gfx8"],
2571    "map": {"at": 46336, "to": "mm"},
2572    "name": "SPI_SHADER_TBA_LO_LS",
2573    "type_ref": "SPI_SHADER_TBA_LO_PS"
2574   },
2575   {
2576    "chips": ["gfx8"],
2577    "map": {"at": 46340, "to": "mm"},
2578    "name": "SPI_SHADER_TBA_HI_LS",
2579    "type_ref": "SPI_SHADER_TBA_HI_PS"
2580   },
2581   {
2582    "chips": ["gfx8"],
2583    "map": {"at": 46344, "to": "mm"},
2584    "name": "SPI_SHADER_TMA_LO_LS",
2585    "type_ref": "SPI_SHADER_TBA_LO_PS"
2586   },
2587   {
2588    "chips": ["gfx8"],
2589    "map": {"at": 46348, "to": "mm"},
2590    "name": "SPI_SHADER_TMA_HI_LS",
2591    "type_ref": "SPI_SHADER_TBA_HI_PS"
2592   },
2593   {
2594    "chips": ["gfx8"],
2595    "map": {"at": 46364, "to": "mm"},
2596    "name": "SPI_SHADER_PGM_RSRC3_LS",
2597    "type_ref": "SPI_SHADER_PGM_RSRC3_GS"
2598   },
2599   {
2600    "chips": ["gfx8"],
2601    "map": {"at": 46368, "to": "mm"},
2602    "name": "SPI_SHADER_PGM_LO_LS",
2603    "type_ref": "SPI_SHADER_TBA_LO_PS"
2604   },
2605   {
2606    "chips": ["gfx8"],
2607    "map": {"at": 46372, "to": "mm"},
2608    "name": "SPI_SHADER_PGM_HI_LS",
2609    "type_ref": "SPI_SHADER_TBA_HI_PS"
2610   },
2611   {
2612    "chips": ["gfx8"],
2613    "map": {"at": 46376, "to": "mm"},
2614    "name": "SPI_SHADER_PGM_RSRC1_LS",
2615    "type_ref": "SPI_SHADER_PGM_RSRC1_LS"
2616   },
2617   {
2618    "chips": ["gfx8"],
2619    "map": {"at": 46380, "to": "mm"},
2620    "name": "SPI_SHADER_PGM_RSRC2_LS",
2621    "type_ref": "SPI_SHADER_PGM_RSRC2_LS_VS"
2622   },
2623   {
2624    "chips": ["gfx8"],
2625    "map": {"at": 46384, "to": "mm"},
2626    "name": "SPI_SHADER_USER_DATA_LS_0",
2627    "type_ref": "CP_APPEND_DATA"
2628   },
2629   {
2630    "chips": ["gfx8"],
2631    "map": {"at": 46388, "to": "mm"},
2632    "name": "SPI_SHADER_USER_DATA_LS_1",
2633    "type_ref": "CP_APPEND_DATA"
2634   },
2635   {
2636    "chips": ["gfx8"],
2637    "map": {"at": 46392, "to": "mm"},
2638    "name": "SPI_SHADER_USER_DATA_LS_2",
2639    "type_ref": "CP_APPEND_DATA"
2640   },
2641   {
2642    "chips": ["gfx8"],
2643    "map": {"at": 46396, "to": "mm"},
2644    "name": "SPI_SHADER_USER_DATA_LS_3",
2645    "type_ref": "CP_APPEND_DATA"
2646   },
2647   {
2648    "chips": ["gfx8"],
2649    "map": {"at": 46400, "to": "mm"},
2650    "name": "SPI_SHADER_USER_DATA_LS_4",
2651    "type_ref": "CP_APPEND_DATA"
2652   },
2653   {
2654    "chips": ["gfx8"],
2655    "map": {"at": 46404, "to": "mm"},
2656    "name": "SPI_SHADER_USER_DATA_LS_5",
2657    "type_ref": "CP_APPEND_DATA"
2658   },
2659   {
2660    "chips": ["gfx8"],
2661    "map": {"at": 46408, "to": "mm"},
2662    "name": "SPI_SHADER_USER_DATA_LS_6",
2663    "type_ref": "CP_APPEND_DATA"
2664   },
2665   {
2666    "chips": ["gfx8"],
2667    "map": {"at": 46412, "to": "mm"},
2668    "name": "SPI_SHADER_USER_DATA_LS_7",
2669    "type_ref": "CP_APPEND_DATA"
2670   },
2671   {
2672    "chips": ["gfx8"],
2673    "map": {"at": 46416, "to": "mm"},
2674    "name": "SPI_SHADER_USER_DATA_LS_8",
2675    "type_ref": "CP_APPEND_DATA"
2676   },
2677   {
2678    "chips": ["gfx8"],
2679    "map": {"at": 46420, "to": "mm"},
2680    "name": "SPI_SHADER_USER_DATA_LS_9",
2681    "type_ref": "CP_APPEND_DATA"
2682   },
2683   {
2684    "chips": ["gfx8"],
2685    "map": {"at": 46424, "to": "mm"},
2686    "name": "SPI_SHADER_USER_DATA_LS_10",
2687    "type_ref": "CP_APPEND_DATA"
2688   },
2689   {
2690    "chips": ["gfx8"],
2691    "map": {"at": 46428, "to": "mm"},
2692    "name": "SPI_SHADER_USER_DATA_LS_11",
2693    "type_ref": "CP_APPEND_DATA"
2694   },
2695   {
2696    "chips": ["gfx8"],
2697    "map": {"at": 46432, "to": "mm"},
2698    "name": "SPI_SHADER_USER_DATA_LS_12",
2699    "type_ref": "CP_APPEND_DATA"
2700   },
2701   {
2702    "chips": ["gfx8"],
2703    "map": {"at": 46436, "to": "mm"},
2704    "name": "SPI_SHADER_USER_DATA_LS_13",
2705    "type_ref": "CP_APPEND_DATA"
2706   },
2707   {
2708    "chips": ["gfx8"],
2709    "map": {"at": 46440, "to": "mm"},
2710    "name": "SPI_SHADER_USER_DATA_LS_14",
2711    "type_ref": "CP_APPEND_DATA"
2712   },
2713   {
2714    "chips": ["gfx8"],
2715    "map": {"at": 46444, "to": "mm"},
2716    "name": "SPI_SHADER_USER_DATA_LS_15",
2717    "type_ref": "CP_APPEND_DATA"
2718   },
2719   {
2720    "chips": ["gfx8"],
2721    "map": {"at": 47104, "to": "mm"},
2722    "name": "COMPUTE_DISPATCH_INITIATOR",
2723    "type_ref": "COMPUTE_DISPATCH_INITIATOR"
2724   },
2725   {
2726    "chips": ["gfx8"],
2727    "map": {"at": 47108, "to": "mm"},
2728    "name": "COMPUTE_DIM_X",
2729    "type_ref": "COMPUTE_DIM_X"
2730   },
2731   {
2732    "chips": ["gfx8"],
2733    "map": {"at": 47112, "to": "mm"},
2734    "name": "COMPUTE_DIM_Y",
2735    "type_ref": "COMPUTE_DIM_X"
2736   },
2737   {
2738    "chips": ["gfx8"],
2739    "map": {"at": 47116, "to": "mm"},
2740    "name": "COMPUTE_DIM_Z",
2741    "type_ref": "COMPUTE_DIM_X"
2742   },
2743   {
2744    "chips": ["gfx8"],
2745    "map": {"at": 47120, "to": "mm"},
2746    "name": "COMPUTE_START_X",
2747    "type_ref": "COMPUTE_START_X"
2748   },
2749   {
2750    "chips": ["gfx8"],
2751    "map": {"at": 47124, "to": "mm"},
2752    "name": "COMPUTE_START_Y",
2753    "type_ref": "COMPUTE_START_X"
2754   },
2755   {
2756    "chips": ["gfx8"],
2757    "map": {"at": 47128, "to": "mm"},
2758    "name": "COMPUTE_START_Z",
2759    "type_ref": "COMPUTE_START_X"
2760   },
2761   {
2762    "chips": ["gfx8"],
2763    "map": {"at": 47132, "to": "mm"},
2764    "name": "COMPUTE_NUM_THREAD_X",
2765    "type_ref": "COMPUTE_NUM_THREAD_X"
2766   },
2767   {
2768    "chips": ["gfx8"],
2769    "map": {"at": 47136, "to": "mm"},
2770    "name": "COMPUTE_NUM_THREAD_Y",
2771    "type_ref": "COMPUTE_NUM_THREAD_X"
2772   },
2773   {
2774    "chips": ["gfx8"],
2775    "map": {"at": 47140, "to": "mm"},
2776    "name": "COMPUTE_NUM_THREAD_Z",
2777    "type_ref": "COMPUTE_NUM_THREAD_X"
2778   },
2779   {
2780    "chips": ["gfx8"],
2781    "map": {"at": 47144, "to": "mm"},
2782    "name": "COMPUTE_PIPELINESTAT_ENABLE",
2783    "type_ref": "COMPUTE_PIPELINESTAT_ENABLE"
2784   },
2785   {
2786    "chips": ["gfx8"],
2787    "map": {"at": 47148, "to": "mm"},
2788    "name": "COMPUTE_PERFCOUNT_ENABLE",
2789    "type_ref": "COMPUTE_PERFCOUNT_ENABLE"
2790   },
2791   {
2792    "chips": ["gfx8"],
2793    "map": {"at": 47152, "to": "mm"},
2794    "name": "COMPUTE_PGM_LO",
2795    "type_ref": "CP_APPEND_DATA"
2796   },
2797   {
2798    "chips": ["gfx8"],
2799    "map": {"at": 47156, "to": "mm"},
2800    "name": "COMPUTE_PGM_HI",
2801    "type_ref": "COMPUTE_PGM_HI"
2802   },
2803   {
2804    "chips": ["gfx8"],
2805    "map": {"at": 47160, "to": "mm"},
2806    "name": "COMPUTE_TBA_LO",
2807    "type_ref": "CP_APPEND_DATA"
2808   },
2809   {
2810    "chips": ["gfx8"],
2811    "map": {"at": 47164, "to": "mm"},
2812    "name": "COMPUTE_TBA_HI",
2813    "type_ref": "COMPUTE_TBA_HI"
2814   },
2815   {
2816    "chips": ["gfx8"],
2817    "map": {"at": 47168, "to": "mm"},
2818    "name": "COMPUTE_TMA_LO",
2819    "type_ref": "CP_APPEND_DATA"
2820   },
2821   {
2822    "chips": ["gfx8"],
2823    "map": {"at": 47172, "to": "mm"},
2824    "name": "COMPUTE_TMA_HI",
2825    "type_ref": "COMPUTE_TBA_HI"
2826   },
2827   {
2828    "chips": ["gfx8"],
2829    "map": {"at": 47176, "to": "mm"},
2830    "name": "COMPUTE_PGM_RSRC1",
2831    "type_ref": "COMPUTE_PGM_RSRC1"
2832   },
2833   {
2834    "chips": ["gfx8"],
2835    "map": {"at": 47180, "to": "mm"},
2836    "name": "COMPUTE_PGM_RSRC2",
2837    "type_ref": "COMPUTE_PGM_RSRC2"
2838   },
2839   {
2840    "chips": ["gfx8"],
2841    "map": {"at": 47184, "to": "mm"},
2842    "name": "COMPUTE_VMID",
2843    "type_ref": "COMPUTE_VMID"
2844   },
2845   {
2846    "chips": ["gfx8"],
2847    "map": {"at": 47188, "to": "mm"},
2848    "name": "COMPUTE_RESOURCE_LIMITS",
2849    "type_ref": "COMPUTE_RESOURCE_LIMITS"
2850   },
2851   {
2852    "chips": ["gfx8"],
2853    "map": {"at": 47192, "to": "mm"},
2854    "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",
2855    "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2856   },
2857   {
2858    "chips": ["gfx8"],
2859    "map": {"at": 47196, "to": "mm"},
2860    "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",
2861    "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2862   },
2863   {
2864    "chips": ["gfx8"],
2865    "map": {"at": 47200, "to": "mm"},
2866    "name": "COMPUTE_TMPRING_SIZE",
2867    "type_ref": "COMPUTE_TMPRING_SIZE"
2868   },
2869   {
2870    "chips": ["gfx8"],
2871    "map": {"at": 47204, "to": "mm"},
2872    "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",
2873    "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2874   },
2875   {
2876    "chips": ["gfx8"],
2877    "map": {"at": 47208, "to": "mm"},
2878    "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",
2879    "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
2880   },
2881   {
2882    "chips": ["gfx8"],
2883    "map": {"at": 47212, "to": "mm"},
2884    "name": "COMPUTE_RESTART_X",
2885    "type_ref": "COMPUTE_RESTART_X"
2886   },
2887   {
2888    "chips": ["gfx8"],
2889    "map": {"at": 47216, "to": "mm"},
2890    "name": "COMPUTE_RESTART_Y",
2891    "type_ref": "COMPUTE_RESTART_X"
2892   },
2893   {
2894    "chips": ["gfx8"],
2895    "map": {"at": 47220, "to": "mm"},
2896    "name": "COMPUTE_RESTART_Z",
2897    "type_ref": "COMPUTE_RESTART_X"
2898   },
2899   {
2900    "chips": ["gfx8"],
2901    "map": {"at": 47224, "to": "mm"},
2902    "name": "COMPUTE_THREAD_TRACE_ENABLE",
2903    "type_ref": "COMPUTE_THREAD_TRACE_ENABLE"
2904   },
2905   {
2906    "chips": ["gfx8"],
2907    "map": {"at": 47228, "to": "mm"},
2908    "name": "COMPUTE_MISC_RESERVED",
2909    "type_ref": "COMPUTE_MISC_RESERVED"
2910   },
2911   {
2912    "chips": ["gfx8"],
2913    "map": {"at": 47232, "to": "mm"},
2914    "name": "COMPUTE_DISPATCH_ID",
2915    "type_ref": "COMPUTE_DISPATCH_ID"
2916   },
2917   {
2918    "chips": ["gfx8"],
2919    "map": {"at": 47236, "to": "mm"},
2920    "name": "COMPUTE_THREADGROUP_ID",
2921    "type_ref": "COMPUTE_THREADGROUP_ID"
2922   },
2923   {
2924    "chips": ["gfx8"],
2925    "map": {"at": 47240, "to": "mm"},
2926    "name": "COMPUTE_RELAUNCH",
2927    "type_ref": "COMPUTE_RELAUNCH"
2928   },
2929   {
2930    "chips": ["gfx8"],
2931    "map": {"at": 47244, "to": "mm"},
2932    "name": "COMPUTE_WAVE_RESTORE_ADDR_LO",
2933    "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_LO"
2934   },
2935   {
2936    "chips": ["gfx8"],
2937    "map": {"at": 47248, "to": "mm"},
2938    "name": "COMPUTE_WAVE_RESTORE_ADDR_HI",
2939    "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_HI"
2940   },
2941   {
2942    "chips": ["gfx8"],
2943    "map": {"at": 47252, "to": "mm"},
2944    "name": "COMPUTE_WAVE_RESTORE_CONTROL",
2945    "type_ref": "COMPUTE_WAVE_RESTORE_CONTROL"
2946   },
2947   {
2948    "chips": ["gfx8"],
2949    "map": {"at": 47360, "to": "mm"},
2950    "name": "COMPUTE_USER_DATA_0",
2951    "type_ref": "CP_APPEND_DATA"
2952   },
2953   {
2954    "chips": ["gfx8"],
2955    "map": {"at": 47364, "to": "mm"},
2956    "name": "COMPUTE_USER_DATA_1",
2957    "type_ref": "CP_APPEND_DATA"
2958   },
2959   {
2960    "chips": ["gfx8"],
2961    "map": {"at": 47368, "to": "mm"},
2962    "name": "COMPUTE_USER_DATA_2",
2963    "type_ref": "CP_APPEND_DATA"
2964   },
2965   {
2966    "chips": ["gfx8"],
2967    "map": {"at": 47372, "to": "mm"},
2968    "name": "COMPUTE_USER_DATA_3",
2969    "type_ref": "CP_APPEND_DATA"
2970   },
2971   {
2972    "chips": ["gfx8"],
2973    "map": {"at": 47376, "to": "mm"},
2974    "name": "COMPUTE_USER_DATA_4",
2975    "type_ref": "CP_APPEND_DATA"
2976   },
2977   {
2978    "chips": ["gfx8"],
2979    "map": {"at": 47380, "to": "mm"},
2980    "name": "COMPUTE_USER_DATA_5",
2981    "type_ref": "CP_APPEND_DATA"
2982   },
2983   {
2984    "chips": ["gfx8"],
2985    "map": {"at": 47384, "to": "mm"},
2986    "name": "COMPUTE_USER_DATA_6",
2987    "type_ref": "CP_APPEND_DATA"
2988   },
2989   {
2990    "chips": ["gfx8"],
2991    "map": {"at": 47388, "to": "mm"},
2992    "name": "COMPUTE_USER_DATA_7",
2993    "type_ref": "CP_APPEND_DATA"
2994   },
2995   {
2996    "chips": ["gfx8"],
2997    "map": {"at": 47392, "to": "mm"},
2998    "name": "COMPUTE_USER_DATA_8",
2999    "type_ref": "CP_APPEND_DATA"
3000   },
3001   {
3002    "chips": ["gfx8"],
3003    "map": {"at": 47396, "to": "mm"},
3004    "name": "COMPUTE_USER_DATA_9",
3005    "type_ref": "CP_APPEND_DATA"
3006   },
3007   {
3008    "chips": ["gfx8"],
3009    "map": {"at": 47400, "to": "mm"},
3010    "name": "COMPUTE_USER_DATA_10",
3011    "type_ref": "CP_APPEND_DATA"
3012   },
3013   {
3014    "chips": ["gfx8"],
3015    "map": {"at": 47404, "to": "mm"},
3016    "name": "COMPUTE_USER_DATA_11",
3017    "type_ref": "CP_APPEND_DATA"
3018   },
3019   {
3020    "chips": ["gfx8"],
3021    "map": {"at": 47408, "to": "mm"},
3022    "name": "COMPUTE_USER_DATA_12",
3023    "type_ref": "CP_APPEND_DATA"
3024   },
3025   {
3026    "chips": ["gfx8"],
3027    "map": {"at": 47412, "to": "mm"},
3028    "name": "COMPUTE_USER_DATA_13",
3029    "type_ref": "CP_APPEND_DATA"
3030   },
3031   {
3032    "chips": ["gfx8"],
3033    "map": {"at": 47416, "to": "mm"},
3034    "name": "COMPUTE_USER_DATA_14",
3035    "type_ref": "CP_APPEND_DATA"
3036   },
3037   {
3038    "chips": ["gfx8"],
3039    "map": {"at": 47420, "to": "mm"},
3040    "name": "COMPUTE_USER_DATA_15",
3041    "type_ref": "CP_APPEND_DATA"
3042   },
3043   {
3044    "chips": ["gfx8"],
3045    "map": {"at": 47612, "to": "mm"},
3046    "name": "COMPUTE_NOWHERE",
3047    "type_ref": "CP_APPEND_DATA"
3048   },
3049   {
3050    "chips": ["gfx8"],
3051    "map": {"at": 163840, "to": "mm"},
3052    "name": "DB_RENDER_CONTROL",
3053    "type_ref": "DB_RENDER_CONTROL"
3054   },
3055   {
3056    "chips": ["gfx8"],
3057    "map": {"at": 163844, "to": "mm"},
3058    "name": "DB_COUNT_CONTROL",
3059    "type_ref": "DB_COUNT_CONTROL"
3060   },
3061   {
3062    "chips": ["gfx8"],
3063    "map": {"at": 163848, "to": "mm"},
3064    "name": "DB_DEPTH_VIEW",
3065    "type_ref": "DB_DEPTH_VIEW"
3066   },
3067   {
3068    "chips": ["gfx8"],
3069    "map": {"at": 163852, "to": "mm"},
3070    "name": "DB_RENDER_OVERRIDE",
3071    "type_ref": "DB_RENDER_OVERRIDE"
3072   },
3073   {
3074    "chips": ["gfx8"],
3075    "map": {"at": 163856, "to": "mm"},
3076    "name": "DB_RENDER_OVERRIDE2",
3077    "type_ref": "DB_RENDER_OVERRIDE2"
3078   },
3079   {
3080    "chips": ["gfx8"],
3081    "map": {"at": 163860, "to": "mm"},
3082    "name": "DB_HTILE_DATA_BASE",
3083    "type_ref": "CB_COLOR0_BASE"
3084   },
3085   {
3086    "chips": ["gfx8"],
3087    "map": {"at": 163872, "to": "mm"},
3088    "name": "DB_DEPTH_BOUNDS_MIN",
3089    "type_ref": "DB_DEPTH_BOUNDS_MIN"
3090   },
3091   {
3092    "chips": ["gfx8"],
3093    "map": {"at": 163876, "to": "mm"},
3094    "name": "DB_DEPTH_BOUNDS_MAX",
3095    "type_ref": "DB_DEPTH_BOUNDS_MAX"
3096   },
3097   {
3098    "chips": ["gfx8"],
3099    "map": {"at": 163880, "to": "mm"},
3100    "name": "DB_STENCIL_CLEAR",
3101    "type_ref": "DB_STENCIL_CLEAR"
3102   },
3103   {
3104    "chips": ["gfx8"],
3105    "map": {"at": 163884, "to": "mm"},
3106    "name": "DB_DEPTH_CLEAR",
3107    "type_ref": "DB_DEPTH_CLEAR"
3108   },
3109   {
3110    "chips": ["gfx8"],
3111    "map": {"at": 163888, "to": "mm"},
3112    "name": "PA_SC_SCREEN_SCISSOR_TL",
3113    "type_ref": "PA_SC_SCREEN_SCISSOR_TL"
3114   },
3115   {
3116    "chips": ["gfx8"],
3117    "map": {"at": 163892, "to": "mm"},
3118    "name": "PA_SC_SCREEN_SCISSOR_BR",
3119    "type_ref": "PA_SC_SCREEN_SCISSOR_BR"
3120   },
3121   {
3122    "chips": ["gfx8"],
3123    "map": {"at": 163900, "to": "mm"},
3124    "name": "DB_DEPTH_INFO",
3125    "type_ref": "DB_DEPTH_INFO"
3126   },
3127   {
3128    "chips": ["gfx8"],
3129    "map": {"at": 163904, "to": "mm"},
3130    "name": "DB_Z_INFO",
3131    "type_ref": "DB_Z_INFO"
3132   },
3133   {
3134    "chips": ["gfx8"],
3135    "map": {"at": 163908, "to": "mm"},
3136    "name": "DB_STENCIL_INFO",
3137    "type_ref": "DB_STENCIL_INFO"
3138   },
3139   {
3140    "chips": ["gfx8"],
3141    "map": {"at": 163912, "to": "mm"},
3142    "name": "DB_Z_READ_BASE",
3143    "type_ref": "CB_COLOR0_BASE"
3144   },
3145   {
3146    "chips": ["gfx8"],
3147    "map": {"at": 163916, "to": "mm"},
3148    "name": "DB_STENCIL_READ_BASE",
3149    "type_ref": "CB_COLOR0_BASE"
3150   },
3151   {
3152    "chips": ["gfx8"],
3153    "map": {"at": 163920, "to": "mm"},
3154    "name": "DB_Z_WRITE_BASE",
3155    "type_ref": "CB_COLOR0_BASE"
3156   },
3157   {
3158    "chips": ["gfx8"],
3159    "map": {"at": 163924, "to": "mm"},
3160    "name": "DB_STENCIL_WRITE_BASE",
3161    "type_ref": "CB_COLOR0_BASE"
3162   },
3163   {
3164    "chips": ["gfx8"],
3165    "map": {"at": 163928, "to": "mm"},
3166    "name": "DB_DEPTH_SIZE",
3167    "type_ref": "DB_DEPTH_SIZE"
3168   },
3169   {
3170    "chips": ["gfx8"],
3171    "map": {"at": 163932, "to": "mm"},
3172    "name": "DB_DEPTH_SLICE",
3173    "type_ref": "DB_DEPTH_SLICE"
3174   },
3175   {
3176    "chips": ["gfx8"],
3177    "map": {"at": 163968, "to": "mm"},
3178    "name": "TA_BC_BASE_ADDR",
3179    "type_ref": "TA_BC_BASE_ADDR"
3180   },
3181   {
3182    "chips": ["gfx8"],
3183    "map": {"at": 163972, "to": "mm"},
3184    "name": "TA_BC_BASE_ADDR_HI",
3185    "type_ref": "TA_BC_BASE_ADDR_HI"
3186   },
3187   {
3188    "chips": ["gfx8"],
3189    "map": {"at": 164328, "to": "mm"},
3190    "name": "COHER_DEST_BASE_HI_0",
3191    "type_ref": "COHER_DEST_BASE_HI_0"
3192   },
3193   {
3194    "chips": ["gfx8"],
3195    "map": {"at": 164332, "to": "mm"},
3196    "name": "COHER_DEST_BASE_HI_1",
3197    "type_ref": "COHER_DEST_BASE_HI_0"
3198   },
3199   {
3200    "chips": ["gfx8"],
3201    "map": {"at": 164336, "to": "mm"},
3202    "name": "COHER_DEST_BASE_HI_2",
3203    "type_ref": "COHER_DEST_BASE_HI_0"
3204   },
3205   {
3206    "chips": ["gfx8"],
3207    "map": {"at": 164340, "to": "mm"},
3208    "name": "COHER_DEST_BASE_HI_3",
3209    "type_ref": "COHER_DEST_BASE_HI_0"
3210   },
3211   {
3212    "chips": ["gfx8"],
3213    "map": {"at": 164344, "to": "mm"},
3214    "name": "COHER_DEST_BASE_2",
3215    "type_ref": "COHER_DEST_BASE_0"
3216   },
3217   {
3218    "chips": ["gfx8"],
3219    "map": {"at": 164348, "to": "mm"},
3220    "name": "COHER_DEST_BASE_3",
3221    "type_ref": "COHER_DEST_BASE_0"
3222   },
3223   {
3224    "chips": ["gfx8"],
3225    "map": {"at": 164352, "to": "mm"},
3226    "name": "PA_SC_WINDOW_OFFSET",
3227    "type_ref": "PA_SC_WINDOW_OFFSET"
3228   },
3229   {
3230    "chips": ["gfx8"],
3231    "map": {"at": 164356, "to": "mm"},
3232    "name": "PA_SC_WINDOW_SCISSOR_TL",
3233    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3234   },
3235   {
3236    "chips": ["gfx8"],
3237    "map": {"at": 164360, "to": "mm"},
3238    "name": "PA_SC_WINDOW_SCISSOR_BR",
3239    "type_ref": "PA_SC_CLIPRECT_0_BR"
3240   },
3241   {
3242    "chips": ["gfx8"],
3243    "map": {"at": 164364, "to": "mm"},
3244    "name": "PA_SC_CLIPRECT_RULE",
3245    "type_ref": "PA_SC_CLIPRECT_RULE"
3246   },
3247   {
3248    "chips": ["gfx8"],
3249    "map": {"at": 164368, "to": "mm"},
3250    "name": "PA_SC_CLIPRECT_0_TL",
3251    "type_ref": "PA_SC_CLIPRECT_0_TL"
3252   },
3253   {
3254    "chips": ["gfx8"],
3255    "map": {"at": 164372, "to": "mm"},
3256    "name": "PA_SC_CLIPRECT_0_BR",
3257    "type_ref": "PA_SC_CLIPRECT_0_BR"
3258   },
3259   {
3260    "chips": ["gfx8"],
3261    "map": {"at": 164376, "to": "mm"},
3262    "name": "PA_SC_CLIPRECT_1_TL",
3263    "type_ref": "PA_SC_CLIPRECT_0_TL"
3264   },
3265   {
3266    "chips": ["gfx8"],
3267    "map": {"at": 164380, "to": "mm"},
3268    "name": "PA_SC_CLIPRECT_1_BR",
3269    "type_ref": "PA_SC_CLIPRECT_0_BR"
3270   },
3271   {
3272    "chips": ["gfx8"],
3273    "map": {"at": 164384, "to": "mm"},
3274    "name": "PA_SC_CLIPRECT_2_TL",
3275    "type_ref": "PA_SC_CLIPRECT_0_TL"
3276   },
3277   {
3278    "chips": ["gfx8"],
3279    "map": {"at": 164388, "to": "mm"},
3280    "name": "PA_SC_CLIPRECT_2_BR",
3281    "type_ref": "PA_SC_CLIPRECT_0_BR"
3282   },
3283   {
3284    "chips": ["gfx8"],
3285    "map": {"at": 164392, "to": "mm"},
3286    "name": "PA_SC_CLIPRECT_3_TL",
3287    "type_ref": "PA_SC_CLIPRECT_0_TL"
3288   },
3289   {
3290    "chips": ["gfx8"],
3291    "map": {"at": 164396, "to": "mm"},
3292    "name": "PA_SC_CLIPRECT_3_BR",
3293    "type_ref": "PA_SC_CLIPRECT_0_BR"
3294   },
3295   {
3296    "chips": ["gfx8"],
3297    "map": {"at": 164400, "to": "mm"},
3298    "name": "PA_SC_EDGERULE",
3299    "type_ref": "PA_SC_EDGERULE"
3300   },
3301   {
3302    "chips": ["gfx8"],
3303    "map": {"at": 164404, "to": "mm"},
3304    "name": "PA_SU_HARDWARE_SCREEN_OFFSET",
3305    "type_ref": "PA_SU_HARDWARE_SCREEN_OFFSET"
3306   },
3307   {
3308    "chips": ["gfx8"],
3309    "map": {"at": 164408, "to": "mm"},
3310    "name": "CB_TARGET_MASK",
3311    "type_ref": "CB_TARGET_MASK"
3312   },
3313   {
3314    "chips": ["gfx8"],
3315    "map": {"at": 164412, "to": "mm"},
3316    "name": "CB_SHADER_MASK",
3317    "type_ref": "CB_SHADER_MASK"
3318   },
3319   {
3320    "chips": ["gfx8"],
3321    "map": {"at": 164416, "to": "mm"},
3322    "name": "PA_SC_GENERIC_SCISSOR_TL",
3323    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3324   },
3325   {
3326    "chips": ["gfx8"],
3327    "map": {"at": 164420, "to": "mm"},
3328    "name": "PA_SC_GENERIC_SCISSOR_BR",
3329    "type_ref": "PA_SC_CLIPRECT_0_BR"
3330   },
3331   {
3332    "chips": ["gfx8"],
3333    "map": {"at": 164424, "to": "mm"},
3334    "name": "COHER_DEST_BASE_0",
3335    "type_ref": "COHER_DEST_BASE_0"
3336   },
3337   {
3338    "chips": ["gfx8"],
3339    "map": {"at": 164428, "to": "mm"},
3340    "name": "COHER_DEST_BASE_1",
3341    "type_ref": "COHER_DEST_BASE_0"
3342   },
3343   {
3344    "chips": ["gfx8"],
3345    "map": {"at": 164432, "to": "mm"},
3346    "name": "PA_SC_VPORT_SCISSOR_0_TL",
3347    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3348   },
3349   {
3350    "chips": ["gfx8"],
3351    "map": {"at": 164436, "to": "mm"},
3352    "name": "PA_SC_VPORT_SCISSOR_0_BR",
3353    "type_ref": "PA_SC_CLIPRECT_0_BR"
3354   },
3355   {
3356    "chips": ["gfx8"],
3357    "map": {"at": 164440, "to": "mm"},
3358    "name": "PA_SC_VPORT_SCISSOR_1_TL",
3359    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3360   },
3361   {
3362    "chips": ["gfx8"],
3363    "map": {"at": 164444, "to": "mm"},
3364    "name": "PA_SC_VPORT_SCISSOR_1_BR",
3365    "type_ref": "PA_SC_CLIPRECT_0_BR"
3366   },
3367   {
3368    "chips": ["gfx8"],
3369    "map": {"at": 164448, "to": "mm"},
3370    "name": "PA_SC_VPORT_SCISSOR_2_TL",
3371    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3372   },
3373   {
3374    "chips": ["gfx8"],
3375    "map": {"at": 164452, "to": "mm"},
3376    "name": "PA_SC_VPORT_SCISSOR_2_BR",
3377    "type_ref": "PA_SC_CLIPRECT_0_BR"
3378   },
3379   {
3380    "chips": ["gfx8"],
3381    "map": {"at": 164456, "to": "mm"},
3382    "name": "PA_SC_VPORT_SCISSOR_3_TL",
3383    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3384   },
3385   {
3386    "chips": ["gfx8"],
3387    "map": {"at": 164460, "to": "mm"},
3388    "name": "PA_SC_VPORT_SCISSOR_3_BR",
3389    "type_ref": "PA_SC_CLIPRECT_0_BR"
3390   },
3391   {
3392    "chips": ["gfx8"],
3393    "map": {"at": 164464, "to": "mm"},
3394    "name": "PA_SC_VPORT_SCISSOR_4_TL",
3395    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3396   },
3397   {
3398    "chips": ["gfx8"],
3399    "map": {"at": 164468, "to": "mm"},
3400    "name": "PA_SC_VPORT_SCISSOR_4_BR",
3401    "type_ref": "PA_SC_CLIPRECT_0_BR"
3402   },
3403   {
3404    "chips": ["gfx8"],
3405    "map": {"at": 164472, "to": "mm"},
3406    "name": "PA_SC_VPORT_SCISSOR_5_TL",
3407    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3408   },
3409   {
3410    "chips": ["gfx8"],
3411    "map": {"at": 164476, "to": "mm"},
3412    "name": "PA_SC_VPORT_SCISSOR_5_BR",
3413    "type_ref": "PA_SC_CLIPRECT_0_BR"
3414   },
3415   {
3416    "chips": ["gfx8"],
3417    "map": {"at": 164480, "to": "mm"},
3418    "name": "PA_SC_VPORT_SCISSOR_6_TL",
3419    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3420   },
3421   {
3422    "chips": ["gfx8"],
3423    "map": {"at": 164484, "to": "mm"},
3424    "name": "PA_SC_VPORT_SCISSOR_6_BR",
3425    "type_ref": "PA_SC_CLIPRECT_0_BR"
3426   },
3427   {
3428    "chips": ["gfx8"],
3429    "map": {"at": 164488, "to": "mm"},
3430    "name": "PA_SC_VPORT_SCISSOR_7_TL",
3431    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3432   },
3433   {
3434    "chips": ["gfx8"],
3435    "map": {"at": 164492, "to": "mm"},
3436    "name": "PA_SC_VPORT_SCISSOR_7_BR",
3437    "type_ref": "PA_SC_CLIPRECT_0_BR"
3438   },
3439   {
3440    "chips": ["gfx8"],
3441    "map": {"at": 164496, "to": "mm"},
3442    "name": "PA_SC_VPORT_SCISSOR_8_TL",
3443    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3444   },
3445   {
3446    "chips": ["gfx8"],
3447    "map": {"at": 164500, "to": "mm"},
3448    "name": "PA_SC_VPORT_SCISSOR_8_BR",
3449    "type_ref": "PA_SC_CLIPRECT_0_BR"
3450   },
3451   {
3452    "chips": ["gfx8"],
3453    "map": {"at": 164504, "to": "mm"},
3454    "name": "PA_SC_VPORT_SCISSOR_9_TL",
3455    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3456   },
3457   {
3458    "chips": ["gfx8"],
3459    "map": {"at": 164508, "to": "mm"},
3460    "name": "PA_SC_VPORT_SCISSOR_9_BR",
3461    "type_ref": "PA_SC_CLIPRECT_0_BR"
3462   },
3463   {
3464    "chips": ["gfx8"],
3465    "map": {"at": 164512, "to": "mm"},
3466    "name": "PA_SC_VPORT_SCISSOR_10_TL",
3467    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3468   },
3469   {
3470    "chips": ["gfx8"],
3471    "map": {"at": 164516, "to": "mm"},
3472    "name": "PA_SC_VPORT_SCISSOR_10_BR",
3473    "type_ref": "PA_SC_CLIPRECT_0_BR"
3474   },
3475   {
3476    "chips": ["gfx8"],
3477    "map": {"at": 164520, "to": "mm"},
3478    "name": "PA_SC_VPORT_SCISSOR_11_TL",
3479    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3480   },
3481   {
3482    "chips": ["gfx8"],
3483    "map": {"at": 164524, "to": "mm"},
3484    "name": "PA_SC_VPORT_SCISSOR_11_BR",
3485    "type_ref": "PA_SC_CLIPRECT_0_BR"
3486   },
3487   {
3488    "chips": ["gfx8"],
3489    "map": {"at": 164528, "to": "mm"},
3490    "name": "PA_SC_VPORT_SCISSOR_12_TL",
3491    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3492   },
3493   {
3494    "chips": ["gfx8"],
3495    "map": {"at": 164532, "to": "mm"},
3496    "name": "PA_SC_VPORT_SCISSOR_12_BR",
3497    "type_ref": "PA_SC_CLIPRECT_0_BR"
3498   },
3499   {
3500    "chips": ["gfx8"],
3501    "map": {"at": 164536, "to": "mm"},
3502    "name": "PA_SC_VPORT_SCISSOR_13_TL",
3503    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3504   },
3505   {
3506    "chips": ["gfx8"],
3507    "map": {"at": 164540, "to": "mm"},
3508    "name": "PA_SC_VPORT_SCISSOR_13_BR",
3509    "type_ref": "PA_SC_CLIPRECT_0_BR"
3510   },
3511   {
3512    "chips": ["gfx8"],
3513    "map": {"at": 164544, "to": "mm"},
3514    "name": "PA_SC_VPORT_SCISSOR_14_TL",
3515    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3516   },
3517   {
3518    "chips": ["gfx8"],
3519    "map": {"at": 164548, "to": "mm"},
3520    "name": "PA_SC_VPORT_SCISSOR_14_BR",
3521    "type_ref": "PA_SC_CLIPRECT_0_BR"
3522   },
3523   {
3524    "chips": ["gfx8"],
3525    "map": {"at": 164552, "to": "mm"},
3526    "name": "PA_SC_VPORT_SCISSOR_15_TL",
3527    "type_ref": "PA_SC_GENERIC_SCISSOR_TL"
3528   },
3529   {
3530    "chips": ["gfx8"],
3531    "map": {"at": 164556, "to": "mm"},
3532    "name": "PA_SC_VPORT_SCISSOR_15_BR",
3533    "type_ref": "PA_SC_CLIPRECT_0_BR"
3534   },
3535   {
3536    "chips": ["gfx8"],
3537    "map": {"at": 164560, "to": "mm"},
3538    "name": "PA_SC_VPORT_ZMIN_0",
3539    "type_ref": "PA_SC_VPORT_ZMIN_0"
3540   },
3541   {
3542    "chips": ["gfx8"],
3543    "map": {"at": 164564, "to": "mm"},
3544    "name": "PA_SC_VPORT_ZMAX_0",
3545    "type_ref": "PA_SC_VPORT_ZMAX_0"
3546   },
3547   {
3548    "chips": ["gfx8"],
3549    "map": {"at": 164568, "to": "mm"},
3550    "name": "PA_SC_VPORT_ZMIN_1",
3551    "type_ref": "PA_SC_VPORT_ZMIN_0"
3552   },
3553   {
3554    "chips": ["gfx8"],
3555    "map": {"at": 164572, "to": "mm"},
3556    "name": "PA_SC_VPORT_ZMAX_1",
3557    "type_ref": "PA_SC_VPORT_ZMAX_0"
3558   },
3559   {
3560    "chips": ["gfx8"],
3561    "map": {"at": 164576, "to": "mm"},
3562    "name": "PA_SC_VPORT_ZMIN_2",
3563    "type_ref": "PA_SC_VPORT_ZMIN_0"
3564   },
3565   {
3566    "chips": ["gfx8"],
3567    "map": {"at": 164580, "to": "mm"},
3568    "name": "PA_SC_VPORT_ZMAX_2",
3569    "type_ref": "PA_SC_VPORT_ZMAX_0"
3570   },
3571   {
3572    "chips": ["gfx8"],
3573    "map": {"at": 164584, "to": "mm"},
3574    "name": "PA_SC_VPORT_ZMIN_3",
3575    "type_ref": "PA_SC_VPORT_ZMIN_0"
3576   },
3577   {
3578    "chips": ["gfx8"],
3579    "map": {"at": 164588, "to": "mm"},
3580    "name": "PA_SC_VPORT_ZMAX_3",
3581    "type_ref": "PA_SC_VPORT_ZMAX_0"
3582   },
3583   {
3584    "chips": ["gfx8"],
3585    "map": {"at": 164592, "to": "mm"},
3586    "name": "PA_SC_VPORT_ZMIN_4",
3587    "type_ref": "PA_SC_VPORT_ZMIN_0"
3588   },
3589   {
3590    "chips": ["gfx8"],
3591    "map": {"at": 164596, "to": "mm"},
3592    "name": "PA_SC_VPORT_ZMAX_4",
3593    "type_ref": "PA_SC_VPORT_ZMAX_0"
3594   },
3595   {
3596    "chips": ["gfx8"],
3597    "map": {"at": 164600, "to": "mm"},
3598    "name": "PA_SC_VPORT_ZMIN_5",
3599    "type_ref": "PA_SC_VPORT_ZMIN_0"
3600   },
3601   {
3602    "chips": ["gfx8"],
3603    "map": {"at": 164604, "to": "mm"},
3604    "name": "PA_SC_VPORT_ZMAX_5",
3605    "type_ref": "PA_SC_VPORT_ZMAX_0"
3606   },
3607   {
3608    "chips": ["gfx8"],
3609    "map": {"at": 164608, "to": "mm"},
3610    "name": "PA_SC_VPORT_ZMIN_6",
3611    "type_ref": "PA_SC_VPORT_ZMIN_0"
3612   },
3613   {
3614    "chips": ["gfx8"],
3615    "map": {"at": 164612, "to": "mm"},
3616    "name": "PA_SC_VPORT_ZMAX_6",
3617    "type_ref": "PA_SC_VPORT_ZMAX_0"
3618   },
3619   {
3620    "chips": ["gfx8"],
3621    "map": {"at": 164616, "to": "mm"},
3622    "name": "PA_SC_VPORT_ZMIN_7",
3623    "type_ref": "PA_SC_VPORT_ZMIN_0"
3624   },
3625   {
3626    "chips": ["gfx8"],
3627    "map": {"at": 164620, "to": "mm"},
3628    "name": "PA_SC_VPORT_ZMAX_7",
3629    "type_ref": "PA_SC_VPORT_ZMAX_0"
3630   },
3631   {
3632    "chips": ["gfx8"],
3633    "map": {"at": 164624, "to": "mm"},
3634    "name": "PA_SC_VPORT_ZMIN_8",
3635    "type_ref": "PA_SC_VPORT_ZMIN_0"
3636   },
3637   {
3638    "chips": ["gfx8"],
3639    "map": {"at": 164628, "to": "mm"},
3640    "name": "PA_SC_VPORT_ZMAX_8",
3641    "type_ref": "PA_SC_VPORT_ZMAX_0"
3642   },
3643   {
3644    "chips": ["gfx8"],
3645    "map": {"at": 164632, "to": "mm"},
3646    "name": "PA_SC_VPORT_ZMIN_9",
3647    "type_ref": "PA_SC_VPORT_ZMIN_0"
3648   },
3649   {
3650    "chips": ["gfx8"],
3651    "map": {"at": 164636, "to": "mm"},
3652    "name": "PA_SC_VPORT_ZMAX_9",
3653    "type_ref": "PA_SC_VPORT_ZMAX_0"
3654   },
3655   {
3656    "chips": ["gfx8"],
3657    "map": {"at": 164640, "to": "mm"},
3658    "name": "PA_SC_VPORT_ZMIN_10",
3659    "type_ref": "PA_SC_VPORT_ZMIN_0"
3660   },
3661   {
3662    "chips": ["gfx8"],
3663    "map": {"at": 164644, "to": "mm"},
3664    "name": "PA_SC_VPORT_ZMAX_10",
3665    "type_ref": "PA_SC_VPORT_ZMAX_0"
3666   },
3667   {
3668    "chips": ["gfx8"],
3669    "map": {"at": 164648, "to": "mm"},
3670    "name": "PA_SC_VPORT_ZMIN_11",
3671    "type_ref": "PA_SC_VPORT_ZMIN_0"
3672   },
3673   {
3674    "chips": ["gfx8"],
3675    "map": {"at": 164652, "to": "mm"},
3676    "name": "PA_SC_VPORT_ZMAX_11",
3677    "type_ref": "PA_SC_VPORT_ZMAX_0"
3678   },
3679   {
3680    "chips": ["gfx8"],
3681    "map": {"at": 164656, "to": "mm"},
3682    "name": "PA_SC_VPORT_ZMIN_12",
3683    "type_ref": "PA_SC_VPORT_ZMIN_0"
3684   },
3685   {
3686    "chips": ["gfx8"],
3687    "map": {"at": 164660, "to": "mm"},
3688    "name": "PA_SC_VPORT_ZMAX_12",
3689    "type_ref": "PA_SC_VPORT_ZMAX_0"
3690   },
3691   {
3692    "chips": ["gfx8"],
3693    "map": {"at": 164664, "to": "mm"},
3694    "name": "PA_SC_VPORT_ZMIN_13",
3695    "type_ref": "PA_SC_VPORT_ZMIN_0"
3696   },
3697   {
3698    "chips": ["gfx8"],
3699    "map": {"at": 164668, "to": "mm"},
3700    "name": "PA_SC_VPORT_ZMAX_13",
3701    "type_ref": "PA_SC_VPORT_ZMAX_0"
3702   },
3703   {
3704    "chips": ["gfx8"],
3705    "map": {"at": 164672, "to": "mm"},
3706    "name": "PA_SC_VPORT_ZMIN_14",
3707    "type_ref": "PA_SC_VPORT_ZMIN_0"
3708   },
3709   {
3710    "chips": ["gfx8"],
3711    "map": {"at": 164676, "to": "mm"},
3712    "name": "PA_SC_VPORT_ZMAX_14",
3713    "type_ref": "PA_SC_VPORT_ZMAX_0"
3714   },
3715   {
3716    "chips": ["gfx8"],
3717    "map": {"at": 164680, "to": "mm"},
3718    "name": "PA_SC_VPORT_ZMIN_15",
3719    "type_ref": "PA_SC_VPORT_ZMIN_0"
3720   },
3721   {
3722    "chips": ["gfx8"],
3723    "map": {"at": 164684, "to": "mm"},
3724    "name": "PA_SC_VPORT_ZMAX_15",
3725    "type_ref": "PA_SC_VPORT_ZMAX_0"
3726   },
3727   {
3728    "chips": ["gfx8"],
3729    "map": {"at": 164688, "to": "mm"},
3730    "name": "PA_SC_RASTER_CONFIG",
3731    "type_ref": "PA_SC_RASTER_CONFIG"
3732   },
3733   {
3734    "chips": ["gfx8"],
3735    "map": {"at": 164692, "to": "mm"},
3736    "name": "PA_SC_RASTER_CONFIG_1",
3737    "type_ref": "PA_SC_RASTER_CONFIG_1"
3738   },
3739   {
3740    "chips": ["gfx8"],
3741    "map": {"at": 164696, "to": "mm"},
3742    "name": "PA_SC_SCREEN_EXTENT_CONTROL",
3743    "type_ref": "PA_SC_SCREEN_EXTENT_CONTROL"
3744   },
3745   {
3746    "chips": ["gfx8"],
3747    "map": {"at": 164704, "to": "mm"},
3748    "name": "CP_PERFMON_CNTX_CNTL",
3749    "type_ref": "CP_PERFMON_CNTX_CNTL"
3750   },
3751   {
3752    "chips": ["gfx8"],
3753    "map": {"at": 164708, "to": "mm"},
3754    "name": "CP_RINGID",
3755    "type_ref": "CP_RINGID"
3756   },
3757   {
3758    "chips": ["gfx8"],
3759    "map": {"at": 164712, "to": "mm"},
3760    "name": "CP_VMID",
3761    "type_ref": "CP_VMID"
3762   },
3763   {
3764    "chips": ["gfx8"],
3765    "map": {"at": 164864, "to": "mm"},
3766    "name": "VGT_MAX_VTX_INDX",
3767    "type_ref": "VGT_MAX_VTX_INDX"
3768   },
3769   {
3770    "chips": ["gfx8"],
3771    "map": {"at": 164868, "to": "mm"},
3772    "name": "VGT_MIN_VTX_INDX",
3773    "type_ref": "VGT_MIN_VTX_INDX"
3774   },
3775   {
3776    "chips": ["gfx8"],
3777    "map": {"at": 164872, "to": "mm"},
3778    "name": "VGT_INDX_OFFSET",
3779    "type_ref": "VGT_INDX_OFFSET"
3780   },
3781   {
3782    "chips": ["gfx8"],
3783    "map": {"at": 164876, "to": "mm"},
3784    "name": "VGT_MULTI_PRIM_IB_RESET_INDX",
3785    "type_ref": "VGT_MULTI_PRIM_IB_RESET_INDX"
3786   },
3787   {
3788    "chips": ["gfx8"],
3789    "map": {"at": 164884, "to": "mm"},
3790    "name": "CB_BLEND_RED",
3791    "type_ref": "CB_BLEND_RED"
3792   },
3793   {
3794    "chips": ["gfx8"],
3795    "map": {"at": 164888, "to": "mm"},
3796    "name": "CB_BLEND_GREEN",
3797    "type_ref": "CB_BLEND_GREEN"
3798   },
3799   {
3800    "chips": ["gfx8"],
3801    "map": {"at": 164892, "to": "mm"},
3802    "name": "CB_BLEND_BLUE",
3803    "type_ref": "CB_BLEND_BLUE"
3804   },
3805   {
3806    "chips": ["gfx8"],
3807    "map": {"at": 164896, "to": "mm"},
3808    "name": "CB_BLEND_ALPHA",
3809    "type_ref": "CB_BLEND_ALPHA"
3810   },
3811   {
3812    "chips": ["gfx8"],
3813    "map": {"at": 164900, "to": "mm"},
3814    "name": "CB_DCC_CONTROL",
3815    "type_ref": "CB_DCC_CONTROL"
3816   },
3817   {
3818    "chips": ["gfx8"],
3819    "map": {"at": 164908, "to": "mm"},
3820    "name": "DB_STENCIL_CONTROL",
3821    "type_ref": "DB_STENCIL_CONTROL"
3822   },
3823   {
3824    "chips": ["gfx8"],
3825    "map": {"at": 164912, "to": "mm"},
3826    "name": "DB_STENCILREFMASK",
3827    "type_ref": "DB_STENCILREFMASK"
3828   },
3829   {
3830    "chips": ["gfx8"],
3831    "map": {"at": 164916, "to": "mm"},
3832    "name": "DB_STENCILREFMASK_BF",
3833    "type_ref": "DB_STENCILREFMASK_BF"
3834   },
3835   {
3836    "chips": ["gfx8"],
3837    "map": {"at": 164924, "to": "mm"},
3838    "name": "PA_CL_VPORT_XSCALE",
3839    "type_ref": "PA_CL_VPORT_XSCALE"
3840   },
3841   {
3842    "chips": ["gfx8"],
3843    "map": {"at": 164928, "to": "mm"},
3844    "name": "PA_CL_VPORT_XOFFSET",
3845    "type_ref": "PA_CL_VPORT_XOFFSET"
3846   },
3847   {
3848    "chips": ["gfx8"],
3849    "map": {"at": 164932, "to": "mm"},
3850    "name": "PA_CL_VPORT_YSCALE",
3851    "type_ref": "PA_CL_VPORT_YSCALE"
3852   },
3853   {
3854    "chips": ["gfx8"],
3855    "map": {"at": 164936, "to": "mm"},
3856    "name": "PA_CL_VPORT_YOFFSET",
3857    "type_ref": "PA_CL_VPORT_YOFFSET"
3858   },
3859   {
3860    "chips": ["gfx8"],
3861    "map": {"at": 164940, "to": "mm"},
3862    "name": "PA_CL_VPORT_ZSCALE",
3863    "type_ref": "PA_CL_VPORT_ZSCALE"
3864   },
3865   {
3866    "chips": ["gfx8"],
3867    "map": {"at": 164944, "to": "mm"},
3868    "name": "PA_CL_VPORT_ZOFFSET",
3869    "type_ref": "PA_CL_VPORT_ZOFFSET"
3870   },
3871   {
3872    "chips": ["gfx8"],
3873    "map": {"at": 164948, "to": "mm"},
3874    "name": "PA_CL_VPORT_XSCALE_1",
3875    "type_ref": "PA_CL_VPORT_XSCALE"
3876   },
3877   {
3878    "chips": ["gfx8"],
3879    "map": {"at": 164952, "to": "mm"},
3880    "name": "PA_CL_VPORT_XOFFSET_1",
3881    "type_ref": "PA_CL_VPORT_XOFFSET"
3882   },
3883   {
3884    "chips": ["gfx8"],
3885    "map": {"at": 164956, "to": "mm"},
3886    "name": "PA_CL_VPORT_YSCALE_1",
3887    "type_ref": "PA_CL_VPORT_YSCALE"
3888   },
3889   {
3890    "chips": ["gfx8"],
3891    "map": {"at": 164960, "to": "mm"},
3892    "name": "PA_CL_VPORT_YOFFSET_1",
3893    "type_ref": "PA_CL_VPORT_YOFFSET"
3894   },
3895   {
3896    "chips": ["gfx8"],
3897    "map": {"at": 164964, "to": "mm"},
3898    "name": "PA_CL_VPORT_ZSCALE_1",
3899    "type_ref": "PA_CL_VPORT_ZSCALE"
3900   },
3901   {
3902    "chips": ["gfx8"],
3903    "map": {"at": 164968, "to": "mm"},
3904    "name": "PA_CL_VPORT_ZOFFSET_1",
3905    "type_ref": "PA_CL_VPORT_ZOFFSET"
3906   },
3907   {
3908    "chips": ["gfx8"],
3909    "map": {"at": 164972, "to": "mm"},
3910    "name": "PA_CL_VPORT_XSCALE_2",
3911    "type_ref": "PA_CL_VPORT_XSCALE"
3912   },
3913   {
3914    "chips": ["gfx8"],
3915    "map": {"at": 164976, "to": "mm"},
3916    "name": "PA_CL_VPORT_XOFFSET_2",
3917    "type_ref": "PA_CL_VPORT_XOFFSET"
3918   },
3919   {
3920    "chips": ["gfx8"],
3921    "map": {"at": 164980, "to": "mm"},
3922    "name": "PA_CL_VPORT_YSCALE_2",
3923    "type_ref": "PA_CL_VPORT_YSCALE"
3924   },
3925   {
3926    "chips": ["gfx8"],
3927    "map": {"at": 164984, "to": "mm"},
3928    "name": "PA_CL_VPORT_YOFFSET_2",
3929    "type_ref": "PA_CL_VPORT_YOFFSET"
3930   },
3931   {
3932    "chips": ["gfx8"],
3933    "map": {"at": 164988, "to": "mm"},
3934    "name": "PA_CL_VPORT_ZSCALE_2",
3935    "type_ref": "PA_CL_VPORT_ZSCALE"
3936   },
3937   {
3938    "chips": ["gfx8"],
3939    "map": {"at": 164992, "to": "mm"},
3940    "name": "PA_CL_VPORT_ZOFFSET_2",
3941    "type_ref": "PA_CL_VPORT_ZOFFSET"
3942   },
3943   {
3944    "chips": ["gfx8"],
3945    "map": {"at": 164996, "to": "mm"},
3946    "name": "PA_CL_VPORT_XSCALE_3",
3947    "type_ref": "PA_CL_VPORT_XSCALE"
3948   },
3949   {
3950    "chips": ["gfx8"],
3951    "map": {"at": 165000, "to": "mm"},
3952    "name": "PA_CL_VPORT_XOFFSET_3",
3953    "type_ref": "PA_CL_VPORT_XOFFSET"
3954   },
3955   {
3956    "chips": ["gfx8"],
3957    "map": {"at": 165004, "to": "mm"},
3958    "name": "PA_CL_VPORT_YSCALE_3",
3959    "type_ref": "PA_CL_VPORT_YSCALE"
3960   },
3961   {
3962    "chips": ["gfx8"],
3963    "map": {"at": 165008, "to": "mm"},
3964    "name": "PA_CL_VPORT_YOFFSET_3",
3965    "type_ref": "PA_CL_VPORT_YOFFSET"
3966   },
3967   {
3968    "chips": ["gfx8"],
3969    "map": {"at": 165012, "to": "mm"},
3970    "name": "PA_CL_VPORT_ZSCALE_3",
3971    "type_ref": "PA_CL_VPORT_ZSCALE"
3972   },
3973   {
3974    "chips": ["gfx8"],
3975    "map": {"at": 165016, "to": "mm"},
3976    "name": "PA_CL_VPORT_ZOFFSET_3",
3977    "type_ref": "PA_CL_VPORT_ZOFFSET"
3978   },
3979   {
3980    "chips": ["gfx8"],
3981    "map": {"at": 165020, "to": "mm"},
3982    "name": "PA_CL_VPORT_XSCALE_4",
3983    "type_ref": "PA_CL_VPORT_XSCALE"
3984   },
3985   {
3986    "chips": ["gfx8"],
3987    "map": {"at": 165024, "to": "mm"},
3988    "name": "PA_CL_VPORT_XOFFSET_4",
3989    "type_ref": "PA_CL_VPORT_XOFFSET"
3990   },
3991   {
3992    "chips": ["gfx8"],
3993    "map": {"at": 165028, "to": "mm"},
3994    "name": "PA_CL_VPORT_YSCALE_4",
3995    "type_ref": "PA_CL_VPORT_YSCALE"
3996   },
3997   {
3998    "chips": ["gfx8"],
3999    "map": {"at": 165032, "to": "mm"},
4000    "name": "PA_CL_VPORT_YOFFSET_4",
4001    "type_ref": "PA_CL_VPORT_YOFFSET"
4002   },
4003   {
4004    "chips": ["gfx8"],
4005    "map": {"at": 165036, "to": "mm"},
4006    "name": "PA_CL_VPORT_ZSCALE_4",
4007    "type_ref": "PA_CL_VPORT_ZSCALE"
4008   },
4009   {
4010    "chips": ["gfx8"],
4011    "map": {"at": 165040, "to": "mm"},
4012    "name": "PA_CL_VPORT_ZOFFSET_4",
4013    "type_ref": "PA_CL_VPORT_ZOFFSET"
4014   },
4015   {
4016    "chips": ["gfx8"],
4017    "map": {"at": 165044, "to": "mm"},
4018    "name": "PA_CL_VPORT_XSCALE_5",
4019    "type_ref": "PA_CL_VPORT_XSCALE"
4020   },
4021   {
4022    "chips": ["gfx8"],
4023    "map": {"at": 165048, "to": "mm"},
4024    "name": "PA_CL_VPORT_XOFFSET_5",
4025    "type_ref": "PA_CL_VPORT_XOFFSET"
4026   },
4027   {
4028    "chips": ["gfx8"],
4029    "map": {"at": 165052, "to": "mm"},
4030    "name": "PA_CL_VPORT_YSCALE_5",
4031    "type_ref": "PA_CL_VPORT_YSCALE"
4032   },
4033   {
4034    "chips": ["gfx8"],
4035    "map": {"at": 165056, "to": "mm"},
4036    "name": "PA_CL_VPORT_YOFFSET_5",
4037    "type_ref": "PA_CL_VPORT_YOFFSET"
4038   },
4039   {
4040    "chips": ["gfx8"],
4041    "map": {"at": 165060, "to": "mm"},
4042    "name": "PA_CL_VPORT_ZSCALE_5",
4043    "type_ref": "PA_CL_VPORT_ZSCALE"
4044   },
4045   {
4046    "chips": ["gfx8"],
4047    "map": {"at": 165064, "to": "mm"},
4048    "name": "PA_CL_VPORT_ZOFFSET_5",
4049    "type_ref": "PA_CL_VPORT_ZOFFSET"
4050   },
4051   {
4052    "chips": ["gfx8"],
4053    "map": {"at": 165068, "to": "mm"},
4054    "name": "PA_CL_VPORT_XSCALE_6",
4055    "type_ref": "PA_CL_VPORT_XSCALE"
4056   },
4057   {
4058    "chips": ["gfx8"],
4059    "map": {"at": 165072, "to": "mm"},
4060    "name": "PA_CL_VPORT_XOFFSET_6",
4061    "type_ref": "PA_CL_VPORT_XOFFSET"
4062   },
4063   {
4064    "chips": ["gfx8"],
4065    "map": {"at": 165076, "to": "mm"},
4066    "name": "PA_CL_VPORT_YSCALE_6",
4067    "type_ref": "PA_CL_VPORT_YSCALE"
4068   },
4069   {
4070    "chips": ["gfx8"],
4071    "map": {"at": 165080, "to": "mm"},
4072    "name": "PA_CL_VPORT_YOFFSET_6",
4073    "type_ref": "PA_CL_VPORT_YOFFSET"
4074   },
4075   {
4076    "chips": ["gfx8"],
4077    "map": {"at": 165084, "to": "mm"},
4078    "name": "PA_CL_VPORT_ZSCALE_6",
4079    "type_ref": "PA_CL_VPORT_ZSCALE"
4080   },
4081   {
4082    "chips": ["gfx8"],
4083    "map": {"at": 165088, "to": "mm"},
4084    "name": "PA_CL_VPORT_ZOFFSET_6",
4085    "type_ref": "PA_CL_VPORT_ZOFFSET"
4086   },
4087   {
4088    "chips": ["gfx8"],
4089    "map": {"at": 165092, "to": "mm"},
4090    "name": "PA_CL_VPORT_XSCALE_7",
4091    "type_ref": "PA_CL_VPORT_XSCALE"
4092   },
4093   {
4094    "chips": ["gfx8"],
4095    "map": {"at": 165096, "to": "mm"},
4096    "name": "PA_CL_VPORT_XOFFSET_7",
4097    "type_ref": "PA_CL_VPORT_XOFFSET"
4098   },
4099   {
4100    "chips": ["gfx8"],
4101    "map": {"at": 165100, "to": "mm"},
4102    "name": "PA_CL_VPORT_YSCALE_7",
4103    "type_ref": "PA_CL_VPORT_YSCALE"
4104   },
4105   {
4106    "chips": ["gfx8"],
4107    "map": {"at": 165104, "to": "mm"},
4108    "name": "PA_CL_VPORT_YOFFSET_7",
4109    "type_ref": "PA_CL_VPORT_YOFFSET"
4110   },
4111   {
4112    "chips": ["gfx8"],
4113    "map": {"at": 165108, "to": "mm"},
4114    "name": "PA_CL_VPORT_ZSCALE_7",
4115    "type_ref": "PA_CL_VPORT_ZSCALE"
4116   },
4117   {
4118    "chips": ["gfx8"],
4119    "map": {"at": 165112, "to": "mm"},
4120    "name": "PA_CL_VPORT_ZOFFSET_7",
4121    "type_ref": "PA_CL_VPORT_ZOFFSET"
4122   },
4123   {
4124    "chips": ["gfx8"],
4125    "map": {"at": 165116, "to": "mm"},
4126    "name": "PA_CL_VPORT_XSCALE_8",
4127    "type_ref": "PA_CL_VPORT_XSCALE"
4128   },
4129   {
4130    "chips": ["gfx8"],
4131    "map": {"at": 165120, "to": "mm"},
4132    "name": "PA_CL_VPORT_XOFFSET_8",
4133    "type_ref": "PA_CL_VPORT_XOFFSET"
4134   },
4135   {
4136    "chips": ["gfx8"],
4137    "map": {"at": 165124, "to": "mm"},
4138    "name": "PA_CL_VPORT_YSCALE_8",
4139    "type_ref": "PA_CL_VPORT_YSCALE"
4140   },
4141   {
4142    "chips": ["gfx8"],
4143    "map": {"at": 165128, "to": "mm"},
4144    "name": "PA_CL_VPORT_YOFFSET_8",
4145    "type_ref": "PA_CL_VPORT_YOFFSET"
4146   },
4147   {
4148    "chips": ["gfx8"],
4149    "map": {"at": 165132, "to": "mm"},
4150    "name": "PA_CL_VPORT_ZSCALE_8",
4151    "type_ref": "PA_CL_VPORT_ZSCALE"
4152   },
4153   {
4154    "chips": ["gfx8"],
4155    "map": {"at": 165136, "to": "mm"},
4156    "name": "PA_CL_VPORT_ZOFFSET_8",
4157    "type_ref": "PA_CL_VPORT_ZOFFSET"
4158   },
4159   {
4160    "chips": ["gfx8"],
4161    "map": {"at": 165140, "to": "mm"},
4162    "name": "PA_CL_VPORT_XSCALE_9",
4163    "type_ref": "PA_CL_VPORT_XSCALE"
4164   },
4165   {
4166    "chips": ["gfx8"],
4167    "map": {"at": 165144, "to": "mm"},
4168    "name": "PA_CL_VPORT_XOFFSET_9",
4169    "type_ref": "PA_CL_VPORT_XOFFSET"
4170   },
4171   {
4172    "chips": ["gfx8"],
4173    "map": {"at": 165148, "to": "mm"},
4174    "name": "PA_CL_VPORT_YSCALE_9",
4175    "type_ref": "PA_CL_VPORT_YSCALE"
4176   },
4177   {
4178    "chips": ["gfx8"],
4179    "map": {"at": 165152, "to": "mm"},
4180    "name": "PA_CL_VPORT_YOFFSET_9",
4181    "type_ref": "PA_CL_VPORT_YOFFSET"
4182   },
4183   {
4184    "chips": ["gfx8"],
4185    "map": {"at": 165156, "to": "mm"},
4186    "name": "PA_CL_VPORT_ZSCALE_9",
4187    "type_ref": "PA_CL_VPORT_ZSCALE"
4188   },
4189   {
4190    "chips": ["gfx8"],
4191    "map": {"at": 165160, "to": "mm"},
4192    "name": "PA_CL_VPORT_ZOFFSET_9",
4193    "type_ref": "PA_CL_VPORT_ZOFFSET"
4194   },
4195   {
4196    "chips": ["gfx8"],
4197    "map": {"at": 165164, "to": "mm"},
4198    "name": "PA_CL_VPORT_XSCALE_10",
4199    "type_ref": "PA_CL_VPORT_XSCALE"
4200   },
4201   {
4202    "chips": ["gfx8"],
4203    "map": {"at": 165168, "to": "mm"},
4204    "name": "PA_CL_VPORT_XOFFSET_10",
4205    "type_ref": "PA_CL_VPORT_XOFFSET"
4206   },
4207   {
4208    "chips": ["gfx8"],
4209    "map": {"at": 165172, "to": "mm"},
4210    "name": "PA_CL_VPORT_YSCALE_10",
4211    "type_ref": "PA_CL_VPORT_YSCALE"
4212   },
4213   {
4214    "chips": ["gfx8"],
4215    "map": {"at": 165176, "to": "mm"},
4216    "name": "PA_CL_VPORT_YOFFSET_10",
4217    "type_ref": "PA_CL_VPORT_YOFFSET"
4218   },
4219   {
4220    "chips": ["gfx8"],
4221    "map": {"at": 165180, "to": "mm"},
4222    "name": "PA_CL_VPORT_ZSCALE_10",
4223    "type_ref": "PA_CL_VPORT_ZSCALE"
4224   },
4225   {
4226    "chips": ["gfx8"],
4227    "map": {"at": 165184, "to": "mm"},
4228    "name": "PA_CL_VPORT_ZOFFSET_10",
4229    "type_ref": "PA_CL_VPORT_ZOFFSET"
4230   },
4231   {
4232    "chips": ["gfx8"],
4233    "map": {"at": 165188, "to": "mm"},
4234    "name": "PA_CL_VPORT_XSCALE_11",
4235    "type_ref": "PA_CL_VPORT_XSCALE"
4236   },
4237   {
4238    "chips": ["gfx8"],
4239    "map": {"at": 165192, "to": "mm"},
4240    "name": "PA_CL_VPORT_XOFFSET_11",
4241    "type_ref": "PA_CL_VPORT_XOFFSET"
4242   },
4243   {
4244    "chips": ["gfx8"],
4245    "map": {"at": 165196, "to": "mm"},
4246    "name": "PA_CL_VPORT_YSCALE_11",
4247    "type_ref": "PA_CL_VPORT_YSCALE"
4248   },
4249   {
4250    "chips": ["gfx8"],
4251    "map": {"at": 165200, "to": "mm"},
4252    "name": "PA_CL_VPORT_YOFFSET_11",
4253    "type_ref": "PA_CL_VPORT_YOFFSET"
4254   },
4255   {
4256    "chips": ["gfx8"],
4257    "map": {"at": 165204, "to": "mm"},
4258    "name": "PA_CL_VPORT_ZSCALE_11",
4259    "type_ref": "PA_CL_VPORT_ZSCALE"
4260   },
4261   {
4262    "chips": ["gfx8"],
4263    "map": {"at": 165208, "to": "mm"},
4264    "name": "PA_CL_VPORT_ZOFFSET_11",
4265    "type_ref": "PA_CL_VPORT_ZOFFSET"
4266   },
4267   {
4268    "chips": ["gfx8"],
4269    "map": {"at": 165212, "to": "mm"},
4270    "name": "PA_CL_VPORT_XSCALE_12",
4271    "type_ref": "PA_CL_VPORT_XSCALE"
4272   },
4273   {
4274    "chips": ["gfx8"],
4275    "map": {"at": 165216, "to": "mm"},
4276    "name": "PA_CL_VPORT_XOFFSET_12",
4277    "type_ref": "PA_CL_VPORT_XOFFSET"
4278   },
4279   {
4280    "chips": ["gfx8"],
4281    "map": {"at": 165220, "to": "mm"},
4282    "name": "PA_CL_VPORT_YSCALE_12",
4283    "type_ref": "PA_CL_VPORT_YSCALE"
4284   },
4285   {
4286    "chips": ["gfx8"],
4287    "map": {"at": 165224, "to": "mm"},
4288    "name": "PA_CL_VPORT_YOFFSET_12",
4289    "type_ref": "PA_CL_VPORT_YOFFSET"
4290   },
4291   {
4292    "chips": ["gfx8"],
4293    "map": {"at": 165228, "to": "mm"},
4294    "name": "PA_CL_VPORT_ZSCALE_12",
4295    "type_ref": "PA_CL_VPORT_ZSCALE"
4296   },
4297   {
4298    "chips": ["gfx8"],
4299    "map": {"at": 165232, "to": "mm"},
4300    "name": "PA_CL_VPORT_ZOFFSET_12",
4301    "type_ref": "PA_CL_VPORT_ZOFFSET"
4302   },
4303   {
4304    "chips": ["gfx8"],
4305    "map": {"at": 165236, "to": "mm"},
4306    "name": "PA_CL_VPORT_XSCALE_13",
4307    "type_ref": "PA_CL_VPORT_XSCALE"
4308   },
4309   {
4310    "chips": ["gfx8"],
4311    "map": {"at": 165240, "to": "mm"},
4312    "name": "PA_CL_VPORT_XOFFSET_13",
4313    "type_ref": "PA_CL_VPORT_XOFFSET"
4314   },
4315   {
4316    "chips": ["gfx8"],
4317    "map": {"at": 165244, "to": "mm"},
4318    "name": "PA_CL_VPORT_YSCALE_13",
4319    "type_ref": "PA_CL_VPORT_YSCALE"
4320   },
4321   {
4322    "chips": ["gfx8"],
4323    "map": {"at": 165248, "to": "mm"},
4324    "name": "PA_CL_VPORT_YOFFSET_13",
4325    "type_ref": "PA_CL_VPORT_YOFFSET"
4326   },
4327   {
4328    "chips": ["gfx8"],
4329    "map": {"at": 165252, "to": "mm"},
4330    "name": "PA_CL_VPORT_ZSCALE_13",
4331    "type_ref": "PA_CL_VPORT_ZSCALE"
4332   },
4333   {
4334    "chips": ["gfx8"],
4335    "map": {"at": 165256, "to": "mm"},
4336    "name": "PA_CL_VPORT_ZOFFSET_13",
4337    "type_ref": "PA_CL_VPORT_ZOFFSET"
4338   },
4339   {
4340    "chips": ["gfx8"],
4341    "map": {"at": 165260, "to": "mm"},
4342    "name": "PA_CL_VPORT_XSCALE_14",
4343    "type_ref": "PA_CL_VPORT_XSCALE"
4344   },
4345   {
4346    "chips": ["gfx8"],
4347    "map": {"at": 165264, "to": "mm"},
4348    "name": "PA_CL_VPORT_XOFFSET_14",
4349    "type_ref": "PA_CL_VPORT_XOFFSET"
4350   },
4351   {
4352    "chips": ["gfx8"],
4353    "map": {"at": 165268, "to": "mm"},
4354    "name": "PA_CL_VPORT_YSCALE_14",
4355    "type_ref": "PA_CL_VPORT_YSCALE"
4356   },
4357   {
4358    "chips": ["gfx8"],
4359    "map": {"at": 165272, "to": "mm"},
4360    "name": "PA_CL_VPORT_YOFFSET_14",
4361    "type_ref": "PA_CL_VPORT_YOFFSET"
4362   },
4363   {
4364    "chips": ["gfx8"],
4365    "map": {"at": 165276, "to": "mm"},
4366    "name": "PA_CL_VPORT_ZSCALE_14",
4367    "type_ref": "PA_CL_VPORT_ZSCALE"
4368   },
4369   {
4370    "chips": ["gfx8"],
4371    "map": {"at": 165280, "to": "mm"},
4372    "name": "PA_CL_VPORT_ZOFFSET_14",
4373    "type_ref": "PA_CL_VPORT_ZOFFSET"
4374   },
4375   {
4376    "chips": ["gfx8"],
4377    "map": {"at": 165284, "to": "mm"},
4378    "name": "PA_CL_VPORT_XSCALE_15",
4379    "type_ref": "PA_CL_VPORT_XSCALE"
4380   },
4381   {
4382    "chips": ["gfx8"],
4383    "map": {"at": 165288, "to": "mm"},
4384    "name": "PA_CL_VPORT_XOFFSET_15",
4385    "type_ref": "PA_CL_VPORT_XOFFSET"
4386   },
4387   {
4388    "chips": ["gfx8"],
4389    "map": {"at": 165292, "to": "mm"},
4390    "name": "PA_CL_VPORT_YSCALE_15",
4391    "type_ref": "PA_CL_VPORT_YSCALE"
4392   },
4393   {
4394    "chips": ["gfx8"],
4395    "map": {"at": 165296, "to": "mm"},
4396    "name": "PA_CL_VPORT_YOFFSET_15",
4397    "type_ref": "PA_CL_VPORT_YOFFSET"
4398   },
4399   {
4400    "chips": ["gfx8"],
4401    "map": {"at": 165300, "to": "mm"},
4402    "name": "PA_CL_VPORT_ZSCALE_15",
4403    "type_ref": "PA_CL_VPORT_ZSCALE"
4404   },
4405   {
4406    "chips": ["gfx8"],
4407    "map": {"at": 165304, "to": "mm"},
4408    "name": "PA_CL_VPORT_ZOFFSET_15",
4409    "type_ref": "PA_CL_VPORT_ZOFFSET"
4410   },
4411   {
4412    "chips": ["gfx8"],
4413    "map": {"at": 165308, "to": "mm"},
4414    "name": "PA_CL_UCP_0_X",
4415    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4416   },
4417   {
4418    "chips": ["gfx8"],
4419    "map": {"at": 165312, "to": "mm"},
4420    "name": "PA_CL_UCP_0_Y",
4421    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4422   },
4423   {
4424    "chips": ["gfx8"],
4425    "map": {"at": 165316, "to": "mm"},
4426    "name": "PA_CL_UCP_0_Z",
4427    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4428   },
4429   {
4430    "chips": ["gfx8"],
4431    "map": {"at": 165320, "to": "mm"},
4432    "name": "PA_CL_UCP_0_W",
4433    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4434   },
4435   {
4436    "chips": ["gfx8"],
4437    "map": {"at": 165324, "to": "mm"},
4438    "name": "PA_CL_UCP_1_X",
4439    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4440   },
4441   {
4442    "chips": ["gfx8"],
4443    "map": {"at": 165328, "to": "mm"},
4444    "name": "PA_CL_UCP_1_Y",
4445    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4446   },
4447   {
4448    "chips": ["gfx8"],
4449    "map": {"at": 165332, "to": "mm"},
4450    "name": "PA_CL_UCP_1_Z",
4451    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4452   },
4453   {
4454    "chips": ["gfx8"],
4455    "map": {"at": 165336, "to": "mm"},
4456    "name": "PA_CL_UCP_1_W",
4457    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4458   },
4459   {
4460    "chips": ["gfx8"],
4461    "map": {"at": 165340, "to": "mm"},
4462    "name": "PA_CL_UCP_2_X",
4463    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4464   },
4465   {
4466    "chips": ["gfx8"],
4467    "map": {"at": 165344, "to": "mm"},
4468    "name": "PA_CL_UCP_2_Y",
4469    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4470   },
4471   {
4472    "chips": ["gfx8"],
4473    "map": {"at": 165348, "to": "mm"},
4474    "name": "PA_CL_UCP_2_Z",
4475    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4476   },
4477   {
4478    "chips": ["gfx8"],
4479    "map": {"at": 165352, "to": "mm"},
4480    "name": "PA_CL_UCP_2_W",
4481    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4482   },
4483   {
4484    "chips": ["gfx8"],
4485    "map": {"at": 165356, "to": "mm"},
4486    "name": "PA_CL_UCP_3_X",
4487    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4488   },
4489   {
4490    "chips": ["gfx8"],
4491    "map": {"at": 165360, "to": "mm"},
4492    "name": "PA_CL_UCP_3_Y",
4493    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4494   },
4495   {
4496    "chips": ["gfx8"],
4497    "map": {"at": 165364, "to": "mm"},
4498    "name": "PA_CL_UCP_3_Z",
4499    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4500   },
4501   {
4502    "chips": ["gfx8"],
4503    "map": {"at": 165368, "to": "mm"},
4504    "name": "PA_CL_UCP_3_W",
4505    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4506   },
4507   {
4508    "chips": ["gfx8"],
4509    "map": {"at": 165372, "to": "mm"},
4510    "name": "PA_CL_UCP_4_X",
4511    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4512   },
4513   {
4514    "chips": ["gfx8"],
4515    "map": {"at": 165376, "to": "mm"},
4516    "name": "PA_CL_UCP_4_Y",
4517    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4518   },
4519   {
4520    "chips": ["gfx8"],
4521    "map": {"at": 165380, "to": "mm"},
4522    "name": "PA_CL_UCP_4_Z",
4523    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4524   },
4525   {
4526    "chips": ["gfx8"],
4527    "map": {"at": 165384, "to": "mm"},
4528    "name": "PA_CL_UCP_4_W",
4529    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4530   },
4531   {
4532    "chips": ["gfx8"],
4533    "map": {"at": 165388, "to": "mm"},
4534    "name": "PA_CL_UCP_5_X",
4535    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4536   },
4537   {
4538    "chips": ["gfx8"],
4539    "map": {"at": 165392, "to": "mm"},
4540    "name": "PA_CL_UCP_5_Y",
4541    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4542   },
4543   {
4544    "chips": ["gfx8"],
4545    "map": {"at": 165396, "to": "mm"},
4546    "name": "PA_CL_UCP_5_Z",
4547    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4548   },
4549   {
4550    "chips": ["gfx8"],
4551    "map": {"at": 165400, "to": "mm"},
4552    "name": "PA_CL_UCP_5_W",
4553    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4554   },
4555   {
4556    "chips": ["gfx8"],
4557    "map": {"at": 165444, "to": "mm"},
4558    "name": "SPI_PS_INPUT_CNTL_0",
4559    "type_ref": "SPI_PS_INPUT_CNTL_0"
4560   },
4561   {
4562    "chips": ["gfx8"],
4563    "map": {"at": 165448, "to": "mm"},
4564    "name": "SPI_PS_INPUT_CNTL_1",
4565    "type_ref": "SPI_PS_INPUT_CNTL_0"
4566   },
4567   {
4568    "chips": ["gfx8"],
4569    "map": {"at": 165452, "to": "mm"},
4570    "name": "SPI_PS_INPUT_CNTL_2",
4571    "type_ref": "SPI_PS_INPUT_CNTL_0"
4572   },
4573   {
4574    "chips": ["gfx8"],
4575    "map": {"at": 165456, "to": "mm"},
4576    "name": "SPI_PS_INPUT_CNTL_3",
4577    "type_ref": "SPI_PS_INPUT_CNTL_0"
4578   },
4579   {
4580    "chips": ["gfx8"],
4581    "map": {"at": 165460, "to": "mm"},
4582    "name": "SPI_PS_INPUT_CNTL_4",
4583    "type_ref": "SPI_PS_INPUT_CNTL_0"
4584   },
4585   {
4586    "chips": ["gfx8"],
4587    "map": {"at": 165464, "to": "mm"},
4588    "name": "SPI_PS_INPUT_CNTL_5",
4589    "type_ref": "SPI_PS_INPUT_CNTL_0"
4590   },
4591   {
4592    "chips": ["gfx8"],
4593    "map": {"at": 165468, "to": "mm"},
4594    "name": "SPI_PS_INPUT_CNTL_6",
4595    "type_ref": "SPI_PS_INPUT_CNTL_0"
4596   },
4597   {
4598    "chips": ["gfx8"],
4599    "map": {"at": 165472, "to": "mm"},
4600    "name": "SPI_PS_INPUT_CNTL_7",
4601    "type_ref": "SPI_PS_INPUT_CNTL_0"
4602   },
4603   {
4604    "chips": ["gfx8"],
4605    "map": {"at": 165476, "to": "mm"},
4606    "name": "SPI_PS_INPUT_CNTL_8",
4607    "type_ref": "SPI_PS_INPUT_CNTL_0"
4608   },
4609   {
4610    "chips": ["gfx8"],
4611    "map": {"at": 165480, "to": "mm"},
4612    "name": "SPI_PS_INPUT_CNTL_9",
4613    "type_ref": "SPI_PS_INPUT_CNTL_0"
4614   },
4615   {
4616    "chips": ["gfx8"],
4617    "map": {"at": 165484, "to": "mm"},
4618    "name": "SPI_PS_INPUT_CNTL_10",
4619    "type_ref": "SPI_PS_INPUT_CNTL_0"
4620   },
4621   {
4622    "chips": ["gfx8"],
4623    "map": {"at": 165488, "to": "mm"},
4624    "name": "SPI_PS_INPUT_CNTL_11",
4625    "type_ref": "SPI_PS_INPUT_CNTL_0"
4626   },
4627   {
4628    "chips": ["gfx8"],
4629    "map": {"at": 165492, "to": "mm"},
4630    "name": "SPI_PS_INPUT_CNTL_12",
4631    "type_ref": "SPI_PS_INPUT_CNTL_0"
4632   },
4633   {
4634    "chips": ["gfx8"],
4635    "map": {"at": 165496, "to": "mm"},
4636    "name": "SPI_PS_INPUT_CNTL_13",
4637    "type_ref": "SPI_PS_INPUT_CNTL_0"
4638   },
4639   {
4640    "chips": ["gfx8"],
4641    "map": {"at": 165500, "to": "mm"},
4642    "name": "SPI_PS_INPUT_CNTL_14",
4643    "type_ref": "SPI_PS_INPUT_CNTL_0"
4644   },
4645   {
4646    "chips": ["gfx8"],
4647    "map": {"at": 165504, "to": "mm"},
4648    "name": "SPI_PS_INPUT_CNTL_15",
4649    "type_ref": "SPI_PS_INPUT_CNTL_0"
4650   },
4651   {
4652    "chips": ["gfx8"],
4653    "map": {"at": 165508, "to": "mm"},
4654    "name": "SPI_PS_INPUT_CNTL_16",
4655    "type_ref": "SPI_PS_INPUT_CNTL_0"
4656   },
4657   {
4658    "chips": ["gfx8"],
4659    "map": {"at": 165512, "to": "mm"},
4660    "name": "SPI_PS_INPUT_CNTL_17",
4661    "type_ref": "SPI_PS_INPUT_CNTL_0"
4662   },
4663   {
4664    "chips": ["gfx8"],
4665    "map": {"at": 165516, "to": "mm"},
4666    "name": "SPI_PS_INPUT_CNTL_18",
4667    "type_ref": "SPI_PS_INPUT_CNTL_0"
4668   },
4669   {
4670    "chips": ["gfx8"],
4671    "map": {"at": 165520, "to": "mm"},
4672    "name": "SPI_PS_INPUT_CNTL_19",
4673    "type_ref": "SPI_PS_INPUT_CNTL_0"
4674   },
4675   {
4676    "chips": ["gfx8"],
4677    "map": {"at": 165524, "to": "mm"},
4678    "name": "SPI_PS_INPUT_CNTL_20",
4679    "type_ref": "SPI_PS_INPUT_CNTL_20"
4680   },
4681   {
4682    "chips": ["gfx8"],
4683    "map": {"at": 165528, "to": "mm"},
4684    "name": "SPI_PS_INPUT_CNTL_21",
4685    "type_ref": "SPI_PS_INPUT_CNTL_20"
4686   },
4687   {
4688    "chips": ["gfx8"],
4689    "map": {"at": 165532, "to": "mm"},
4690    "name": "SPI_PS_INPUT_CNTL_22",
4691    "type_ref": "SPI_PS_INPUT_CNTL_20"
4692   },
4693   {
4694    "chips": ["gfx8"],
4695    "map": {"at": 165536, "to": "mm"},
4696    "name": "SPI_PS_INPUT_CNTL_23",
4697    "type_ref": "SPI_PS_INPUT_CNTL_20"
4698   },
4699   {
4700    "chips": ["gfx8"],
4701    "map": {"at": 165540, "to": "mm"},
4702    "name": "SPI_PS_INPUT_CNTL_24",
4703    "type_ref": "SPI_PS_INPUT_CNTL_20"
4704   },
4705   {
4706    "chips": ["gfx8"],
4707    "map": {"at": 165544, "to": "mm"},
4708    "name": "SPI_PS_INPUT_CNTL_25",
4709    "type_ref": "SPI_PS_INPUT_CNTL_20"
4710   },
4711   {
4712    "chips": ["gfx8"],
4713    "map": {"at": 165548, "to": "mm"},
4714    "name": "SPI_PS_INPUT_CNTL_26",
4715    "type_ref": "SPI_PS_INPUT_CNTL_20"
4716   },
4717   {
4718    "chips": ["gfx8"],
4719    "map": {"at": 165552, "to": "mm"},
4720    "name": "SPI_PS_INPUT_CNTL_27",
4721    "type_ref": "SPI_PS_INPUT_CNTL_20"
4722   },
4723   {
4724    "chips": ["gfx8"],
4725    "map": {"at": 165556, "to": "mm"},
4726    "name": "SPI_PS_INPUT_CNTL_28",
4727    "type_ref": "SPI_PS_INPUT_CNTL_20"
4728   },
4729   {
4730    "chips": ["gfx8"],
4731    "map": {"at": 165560, "to": "mm"},
4732    "name": "SPI_PS_INPUT_CNTL_29",
4733    "type_ref": "SPI_PS_INPUT_CNTL_20"
4734   },
4735   {
4736    "chips": ["gfx8"],
4737    "map": {"at": 165564, "to": "mm"},
4738    "name": "SPI_PS_INPUT_CNTL_30",
4739    "type_ref": "SPI_PS_INPUT_CNTL_20"
4740   },
4741   {
4742    "chips": ["gfx8"],
4743    "map": {"at": 165568, "to": "mm"},
4744    "name": "SPI_PS_INPUT_CNTL_31",
4745    "type_ref": "SPI_PS_INPUT_CNTL_20"
4746   },
4747   {
4748    "chips": ["gfx8"],
4749    "map": {"at": 165572, "to": "mm"},
4750    "name": "SPI_VS_OUT_CONFIG",
4751    "type_ref": "SPI_VS_OUT_CONFIG"
4752   },
4753   {
4754    "chips": ["gfx8"],
4755    "map": {"at": 165580, "to": "mm"},
4756    "name": "SPI_PS_INPUT_ENA",
4757    "type_ref": "SPI_PS_INPUT_ENA"
4758   },
4759   {
4760    "chips": ["gfx8"],
4761    "map": {"at": 165584, "to": "mm"},
4762    "name": "SPI_PS_INPUT_ADDR",
4763    "type_ref": "SPI_PS_INPUT_ENA"
4764   },
4765   {
4766    "chips": ["gfx8"],
4767    "map": {"at": 165588, "to": "mm"},
4768    "name": "SPI_INTERP_CONTROL_0",
4769    "type_ref": "SPI_INTERP_CONTROL_0"
4770   },
4771   {
4772    "chips": ["gfx8"],
4773    "map": {"at": 165592, "to": "mm"},
4774    "name": "SPI_PS_IN_CONTROL",
4775    "type_ref": "SPI_PS_IN_CONTROL"
4776   },
4777   {
4778    "chips": ["gfx8"],
4779    "map": {"at": 165600, "to": "mm"},
4780    "name": "SPI_BARYC_CNTL",
4781    "type_ref": "SPI_BARYC_CNTL"
4782   },
4783   {
4784    "chips": ["gfx8"],
4785    "map": {"at": 165608, "to": "mm"},
4786    "name": "SPI_TMPRING_SIZE",
4787    "type_ref": "COMPUTE_TMPRING_SIZE"
4788   },
4789   {
4790    "chips": ["gfx8"],
4791    "map": {"at": 165644, "to": "mm"},
4792    "name": "SPI_SHADER_POS_FORMAT",
4793    "type_ref": "SPI_SHADER_POS_FORMAT"
4794   },
4795   {
4796    "chips": ["gfx8"],
4797    "map": {"at": 165648, "to": "mm"},
4798    "name": "SPI_SHADER_Z_FORMAT",
4799    "type_ref": "SPI_SHADER_Z_FORMAT"
4800   },
4801   {
4802    "chips": ["gfx8"],
4803    "map": {"at": 165652, "to": "mm"},
4804    "name": "SPI_SHADER_COL_FORMAT",
4805    "type_ref": "SPI_SHADER_COL_FORMAT"
4806   },
4807   {
4808    "chips": ["gfx8"],
4809    "map": {"at": 165760, "to": "mm"},
4810    "name": "CB_BLEND0_CONTROL",
4811    "type_ref": "CB_BLEND0_CONTROL"
4812   },
4813   {
4814    "chips": ["gfx8"],
4815    "map": {"at": 165764, "to": "mm"},
4816    "name": "CB_BLEND1_CONTROL",
4817    "type_ref": "CB_BLEND0_CONTROL"
4818   },
4819   {
4820    "chips": ["gfx8"],
4821    "map": {"at": 165768, "to": "mm"},
4822    "name": "CB_BLEND2_CONTROL",
4823    "type_ref": "CB_BLEND0_CONTROL"
4824   },
4825   {
4826    "chips": ["gfx8"],
4827    "map": {"at": 165772, "to": "mm"},
4828    "name": "CB_BLEND3_CONTROL",
4829    "type_ref": "CB_BLEND0_CONTROL"
4830   },
4831   {
4832    "chips": ["gfx8"],
4833    "map": {"at": 165776, "to": "mm"},
4834    "name": "CB_BLEND4_CONTROL",
4835    "type_ref": "CB_BLEND0_CONTROL"
4836   },
4837   {
4838    "chips": ["gfx8"],
4839    "map": {"at": 165780, "to": "mm"},
4840    "name": "CB_BLEND5_CONTROL",
4841    "type_ref": "CB_BLEND0_CONTROL"
4842   },
4843   {
4844    "chips": ["gfx8"],
4845    "map": {"at": 165784, "to": "mm"},
4846    "name": "CB_BLEND6_CONTROL",
4847    "type_ref": "CB_BLEND0_CONTROL"
4848   },
4849   {
4850    "chips": ["gfx8"],
4851    "map": {"at": 165788, "to": "mm"},
4852    "name": "CB_BLEND7_CONTROL",
4853    "type_ref": "CB_BLEND0_CONTROL"
4854   },
4855   {
4856    "chips": ["gfx8"],
4857    "map": {"at": 165836, "to": "mm"},
4858    "name": "CS_COPY_STATE",
4859    "type_ref": "CS_COPY_STATE"
4860   },
4861   {
4862    "chips": ["gfx8"],
4863    "map": {"at": 165840, "to": "mm"},
4864    "name": "GFX_COPY_STATE",
4865    "type_ref": "CS_COPY_STATE"
4866   },
4867   {
4868    "chips": ["gfx8"],
4869    "map": {"at": 165844, "to": "mm"},
4870    "name": "PA_CL_POINT_X_RAD",
4871    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4872   },
4873   {
4874    "chips": ["gfx8"],
4875    "map": {"at": 165848, "to": "mm"},
4876    "name": "PA_CL_POINT_Y_RAD",
4877    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4878   },
4879   {
4880    "chips": ["gfx8"],
4881    "map": {"at": 165852, "to": "mm"},
4882    "name": "PA_CL_POINT_SIZE",
4883    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4884   },
4885   {
4886    "chips": ["gfx8"],
4887    "map": {"at": 165856, "to": "mm"},
4888    "name": "PA_CL_POINT_CULL_RAD",
4889    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
4890   },
4891   {
4892    "chips": ["gfx8"],
4893    "map": {"at": 165860, "to": "mm"},
4894    "name": "VGT_DMA_BASE_HI",
4895    "type_ref": "VGT_DMA_BASE_HI"
4896   },
4897   {
4898    "chips": ["gfx8"],
4899    "map": {"at": 165864, "to": "mm"},
4900    "name": "VGT_DMA_BASE",
4901    "type_ref": "VGT_DMA_BASE"
4902   },
4903   {
4904    "chips": ["gfx8"],
4905    "map": {"at": 165872, "to": "mm"},
4906    "name": "VGT_DRAW_INITIATOR",
4907    "type_ref": "VGT_DRAW_INITIATOR"
4908   },
4909   {
4910    "chips": ["gfx8"],
4911    "map": {"at": 165876, "to": "mm"},
4912    "name": "VGT_IMMED_DATA",
4913    "type_ref": "CP_APPEND_DATA"
4914   },
4915   {
4916    "chips": ["gfx8"],
4917    "map": {"at": 165880, "to": "mm"},
4918    "name": "VGT_EVENT_ADDRESS_REG",
4919    "type_ref": "VGT_EVENT_ADDRESS_REG"
4920   },
4921   {
4922    "chips": ["gfx8"],
4923    "map": {"at": 165888, "to": "mm"},
4924    "name": "DB_DEPTH_CONTROL",
4925    "type_ref": "DB_DEPTH_CONTROL"
4926   },
4927   {
4928    "chips": ["gfx8"],
4929    "map": {"at": 165892, "to": "mm"},
4930    "name": "DB_EQAA",
4931    "type_ref": "DB_EQAA"
4932   },
4933   {
4934    "chips": ["gfx8"],
4935    "map": {"at": 165896, "to": "mm"},
4936    "name": "CB_COLOR_CONTROL",
4937    "type_ref": "CB_COLOR_CONTROL"
4938   },
4939   {
4940    "chips": ["gfx8"],
4941    "map": {"at": 165900, "to": "mm"},
4942    "name": "DB_SHADER_CONTROL",
4943    "type_ref": "DB_SHADER_CONTROL"
4944   },
4945   {
4946    "chips": ["gfx8"],
4947    "map": {"at": 165904, "to": "mm"},
4948    "name": "PA_CL_CLIP_CNTL",
4949    "type_ref": "PA_CL_CLIP_CNTL"
4950   },
4951   {
4952    "chips": ["gfx8"],
4953    "map": {"at": 165908, "to": "mm"},
4954    "name": "PA_SU_SC_MODE_CNTL",
4955    "type_ref": "PA_SU_SC_MODE_CNTL"
4956   },
4957   {
4958    "chips": ["gfx8"],
4959    "map": {"at": 165912, "to": "mm"},
4960    "name": "PA_CL_VTE_CNTL",
4961    "type_ref": "PA_CL_VTE_CNTL"
4962   },
4963   {
4964    "chips": ["gfx8"],
4965    "map": {"at": 165916, "to": "mm"},
4966    "name": "PA_CL_VS_OUT_CNTL",
4967    "type_ref": "PA_CL_VS_OUT_CNTL"
4968   },
4969   {
4970    "chips": ["gfx8"],
4971    "map": {"at": 165920, "to": "mm"},
4972    "name": "PA_CL_NANINF_CNTL",
4973    "type_ref": "PA_CL_NANINF_CNTL"
4974   },
4975   {
4976    "chips": ["gfx8"],
4977    "map": {"at": 165924, "to": "mm"},
4978    "name": "PA_SU_LINE_STIPPLE_CNTL",
4979    "type_ref": "PA_SU_LINE_STIPPLE_CNTL"
4980   },
4981   {
4982    "chips": ["gfx8"],
4983    "map": {"at": 165928, "to": "mm"},
4984    "name": "PA_SU_LINE_STIPPLE_SCALE",
4985    "type_ref": "PA_SU_LINE_STIPPLE_SCALE"
4986   },
4987   {
4988    "chips": ["gfx8"],
4989    "map": {"at": 165932, "to": "mm"},
4990    "name": "PA_SU_PRIM_FILTER_CNTL",
4991    "type_ref": "PA_SU_PRIM_FILTER_CNTL"
4992   },
4993   {
4994    "chips": ["gfx8"],
4995    "map": {"at": 166400, "to": "mm"},
4996    "name": "PA_SU_POINT_SIZE",
4997    "type_ref": "PA_SU_POINT_SIZE"
4998   },
4999   {
5000    "chips": ["gfx8"],
5001    "map": {"at": 166404, "to": "mm"},
5002    "name": "PA_SU_POINT_MINMAX",
5003    "type_ref": "PA_SU_POINT_MINMAX"
5004   },
5005   {
5006    "chips": ["gfx8"],
5007    "map": {"at": 166408, "to": "mm"},
5008    "name": "PA_SU_LINE_CNTL",
5009    "type_ref": "PA_SU_LINE_CNTL"
5010   },
5011   {
5012    "chips": ["gfx8"],
5013    "map": {"at": 166412, "to": "mm"},
5014    "name": "PA_SC_LINE_STIPPLE",
5015    "type_ref": "PA_SC_LINE_STIPPLE"
5016   },
5017   {
5018    "chips": ["gfx8"],
5019    "map": {"at": 166416, "to": "mm"},
5020    "name": "VGT_OUTPUT_PATH_CNTL",
5021    "type_ref": "VGT_OUTPUT_PATH_CNTL"
5022   },
5023   {
5024    "chips": ["gfx8"],
5025    "map": {"at": 166420, "to": "mm"},
5026    "name": "VGT_HOS_CNTL",
5027    "type_ref": "VGT_HOS_CNTL"
5028   },
5029   {
5030    "chips": ["gfx8"],
5031    "map": {"at": 166424, "to": "mm"},
5032    "name": "VGT_HOS_MAX_TESS_LEVEL",
5033    "type_ref": "VGT_HOS_MAX_TESS_LEVEL"
5034   },
5035   {
5036    "chips": ["gfx8"],
5037    "map": {"at": 166428, "to": "mm"},
5038    "name": "VGT_HOS_MIN_TESS_LEVEL",
5039    "type_ref": "VGT_HOS_MIN_TESS_LEVEL"
5040   },
5041   {
5042    "chips": ["gfx8"],
5043    "map": {"at": 166432, "to": "mm"},
5044    "name": "VGT_HOS_REUSE_DEPTH",
5045    "type_ref": "VGT_HOS_REUSE_DEPTH"
5046   },
5047   {
5048    "chips": ["gfx8"],
5049    "map": {"at": 166436, "to": "mm"},
5050    "name": "VGT_GROUP_PRIM_TYPE",
5051    "type_ref": "VGT_GROUP_PRIM_TYPE"
5052   },
5053   {
5054    "chips": ["gfx8"],
5055    "map": {"at": 166440, "to": "mm"},
5056    "name": "VGT_GROUP_FIRST_DECR",
5057    "type_ref": "VGT_GROUP_FIRST_DECR"
5058   },
5059   {
5060    "chips": ["gfx8"],
5061    "map": {"at": 166444, "to": "mm"},
5062    "name": "VGT_GROUP_DECR",
5063    "type_ref": "VGT_GROUP_DECR"
5064   },
5065   {
5066    "chips": ["gfx8"],
5067    "map": {"at": 166448, "to": "mm"},
5068    "name": "VGT_GROUP_VECT_0_CNTL",
5069    "type_ref": "VGT_GROUP_VECT_0_CNTL"
5070   },
5071   {
5072    "chips": ["gfx8"],
5073    "map": {"at": 166452, "to": "mm"},
5074    "name": "VGT_GROUP_VECT_1_CNTL",
5075    "type_ref": "VGT_GROUP_VECT_0_CNTL"
5076   },
5077   {
5078    "chips": ["gfx8"],
5079    "map": {"at": 166456, "to": "mm"},
5080    "name": "VGT_GROUP_VECT_0_FMT_CNTL",
5081    "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
5082   },
5083   {
5084    "chips": ["gfx8"],
5085    "map": {"at": 166460, "to": "mm"},
5086    "name": "VGT_GROUP_VECT_1_FMT_CNTL",
5087    "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
5088   },
5089   {
5090    "chips": ["gfx8"],
5091    "map": {"at": 166464, "to": "mm"},
5092    "name": "VGT_GS_MODE",
5093    "type_ref": "VGT_GS_MODE"
5094   },
5095   {
5096    "chips": ["gfx8"],
5097    "map": {"at": 166468, "to": "mm"},
5098    "name": "VGT_GS_ONCHIP_CNTL",
5099    "type_ref": "VGT_GS_ONCHIP_CNTL"
5100   },
5101   {
5102    "chips": ["gfx8"],
5103    "map": {"at": 166472, "to": "mm"},
5104    "name": "PA_SC_MODE_CNTL_0",
5105    "type_ref": "PA_SC_MODE_CNTL_0"
5106   },
5107   {
5108    "chips": ["gfx8"],
5109    "map": {"at": 166476, "to": "mm"},
5110    "name": "PA_SC_MODE_CNTL_1",
5111    "type_ref": "PA_SC_MODE_CNTL_1"
5112   },
5113   {
5114    "chips": ["gfx8"],
5115    "map": {"at": 166480, "to": "mm"},
5116    "name": "VGT_ENHANCE",
5117    "type_ref": "IA_ENHANCE"
5118   },
5119   {
5120    "chips": ["gfx8"],
5121    "map": {"at": 166484, "to": "mm"},
5122    "name": "VGT_GS_PER_ES",
5123    "type_ref": "VGT_GS_PER_ES"
5124   },
5125   {
5126    "chips": ["gfx8"],
5127    "map": {"at": 166488, "to": "mm"},
5128    "name": "VGT_ES_PER_GS",
5129    "type_ref": "VGT_ES_PER_GS"
5130   },
5131   {
5132    "chips": ["gfx8"],
5133    "map": {"at": 166492, "to": "mm"},
5134    "name": "VGT_GS_PER_VS",
5135    "type_ref": "VGT_GS_PER_VS"
5136   },
5137   {
5138    "chips": ["gfx8"],
5139    "map": {"at": 166496, "to": "mm"},
5140    "name": "VGT_GSVS_RING_OFFSET_1",
5141    "type_ref": "VGT_GSVS_RING_OFFSET_1"
5142   },
5143   {
5144    "chips": ["gfx8"],
5145    "map": {"at": 166500, "to": "mm"},
5146    "name": "VGT_GSVS_RING_OFFSET_2",
5147    "type_ref": "VGT_GSVS_RING_OFFSET_1"
5148   },
5149   {
5150    "chips": ["gfx8"],
5151    "map": {"at": 166504, "to": "mm"},
5152    "name": "VGT_GSVS_RING_OFFSET_3",
5153    "type_ref": "VGT_GSVS_RING_OFFSET_1"
5154   },
5155   {
5156    "chips": ["gfx8"],
5157    "map": {"at": 166508, "to": "mm"},
5158    "name": "VGT_GS_OUT_PRIM_TYPE",
5159    "type_ref": "VGT_GS_OUT_PRIM_TYPE"
5160   },
5161   {
5162    "chips": ["gfx8"],
5163    "map": {"at": 166512, "to": "mm"},
5164    "name": "IA_ENHANCE",
5165    "type_ref": "IA_ENHANCE"
5166   },
5167   {
5168    "chips": ["gfx8"],
5169    "map": {"at": 166516, "to": "mm"},
5170    "name": "VGT_DMA_SIZE",
5171    "type_ref": "VGT_DMA_SIZE"
5172   },
5173   {
5174    "chips": ["gfx8"],
5175    "map": {"at": 166520, "to": "mm"},
5176    "name": "VGT_DMA_MAX_SIZE",
5177    "type_ref": "VGT_DMA_MAX_SIZE"
5178   },
5179   {
5180    "chips": ["gfx8"],
5181    "map": {"at": 166524, "to": "mm"},
5182    "name": "VGT_DMA_INDEX_TYPE",
5183    "type_ref": "VGT_DMA_INDEX_TYPE"
5184   },
5185   {
5186    "chips": ["gfx8"],
5187    "map": {"at": 166528, "to": "mm"},
5188    "name": "WD_ENHANCE",
5189    "type_ref": "IA_ENHANCE"
5190   },
5191   {
5192    "chips": ["gfx8"],
5193    "map": {"at": 166532, "to": "mm"},
5194    "name": "VGT_PRIMITIVEID_EN",
5195    "type_ref": "VGT_PRIMITIVEID_EN"
5196   },
5197   {
5198    "chips": ["gfx8"],
5199    "map": {"at": 166536, "to": "mm"},
5200    "name": "VGT_DMA_NUM_INSTANCES",
5201    "type_ref": "VGT_DMA_NUM_INSTANCES"
5202   },
5203   {
5204    "chips": ["gfx8"],
5205    "map": {"at": 166540, "to": "mm"},
5206    "name": "VGT_PRIMITIVEID_RESET",
5207    "type_ref": "VGT_PRIMITIVEID_RESET"
5208   },
5209   {
5210    "chips": ["gfx8"],
5211    "map": {"at": 166544, "to": "mm"},
5212    "name": "VGT_EVENT_INITIATOR",
5213    "type_ref": "VGT_EVENT_INITIATOR"
5214   },
5215   {
5216    "chips": ["gfx8"],
5217    "map": {"at": 166548, "to": "mm"},
5218    "name": "VGT_MULTI_PRIM_IB_RESET_EN",
5219    "type_ref": "VGT_MULTI_PRIM_IB_RESET_EN"
5220   },
5221   {
5222    "chips": ["gfx8"],
5223    "map": {"at": 166560, "to": "mm"},
5224    "name": "VGT_INSTANCE_STEP_RATE_0",
5225    "type_ref": "VGT_INSTANCE_STEP_RATE_0"
5226   },
5227   {
5228    "chips": ["gfx8"],
5229    "map": {"at": 166564, "to": "mm"},
5230    "name": "VGT_INSTANCE_STEP_RATE_1",
5231    "type_ref": "VGT_INSTANCE_STEP_RATE_0"
5232   },
5233   {
5234    "chips": ["gfx8"],
5235    "map": {"at": 166568, "to": "mm"},
5236    "name": "IA_MULTI_VGT_PARAM",
5237    "type_ref": "IA_MULTI_VGT_PARAM"
5238   },
5239   {
5240    "chips": ["gfx8"],
5241    "map": {"at": 166572, "to": "mm"},
5242    "name": "VGT_ESGS_RING_ITEMSIZE",
5243    "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5244   },
5245   {
5246    "chips": ["gfx8"],
5247    "map": {"at": 166576, "to": "mm"},
5248    "name": "VGT_GSVS_RING_ITEMSIZE",
5249    "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5250   },
5251   {
5252    "chips": ["gfx8"],
5253    "map": {"at": 166580, "to": "mm"},
5254    "name": "VGT_REUSE_OFF",
5255    "type_ref": "VGT_REUSE_OFF"
5256   },
5257   {
5258    "chips": ["gfx8"],
5259    "map": {"at": 166584, "to": "mm"},
5260    "name": "VGT_VTX_CNT_EN",
5261    "type_ref": "VGT_VTX_CNT_EN"
5262   },
5263   {
5264    "chips": ["gfx8"],
5265    "map": {"at": 166588, "to": "mm"},
5266    "name": "DB_HTILE_SURFACE",
5267    "type_ref": "DB_HTILE_SURFACE"
5268   },
5269   {
5270    "chips": ["gfx8"],
5271    "map": {"at": 166592, "to": "mm"},
5272    "name": "DB_SRESULTS_COMPARE_STATE0",
5273    "type_ref": "DB_SRESULTS_COMPARE_STATE0"
5274   },
5275   {
5276    "chips": ["gfx8"],
5277    "map": {"at": 166596, "to": "mm"},
5278    "name": "DB_SRESULTS_COMPARE_STATE1",
5279    "type_ref": "DB_SRESULTS_COMPARE_STATE1"
5280   },
5281   {
5282    "chips": ["gfx8"],
5283    "map": {"at": 166600, "to": "mm"},
5284    "name": "DB_PRELOAD_CONTROL",
5285    "type_ref": "DB_PRELOAD_CONTROL"
5286   },
5287   {
5288    "chips": ["gfx8"],
5289    "map": {"at": 166608, "to": "mm"},
5290    "name": "VGT_STRMOUT_BUFFER_SIZE_0",
5291    "type_ref": "COMPUTE_DIM_X"
5292   },
5293   {
5294    "chips": ["gfx8"],
5295    "map": {"at": 166612, "to": "mm"},
5296    "name": "VGT_STRMOUT_VTX_STRIDE_0",
5297    "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5298   },
5299   {
5300    "chips": ["gfx8"],
5301    "map": {"at": 166620, "to": "mm"},
5302    "name": "VGT_STRMOUT_BUFFER_OFFSET_0",
5303    "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5304   },
5305   {
5306    "chips": ["gfx8"],
5307    "map": {"at": 166624, "to": "mm"},
5308    "name": "VGT_STRMOUT_BUFFER_SIZE_1",
5309    "type_ref": "COMPUTE_DIM_X"
5310   },
5311   {
5312    "chips": ["gfx8"],
5313    "map": {"at": 166628, "to": "mm"},
5314    "name": "VGT_STRMOUT_VTX_STRIDE_1",
5315    "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5316   },
5317   {
5318    "chips": ["gfx8"],
5319    "map": {"at": 166636, "to": "mm"},
5320    "name": "VGT_STRMOUT_BUFFER_OFFSET_1",
5321    "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5322   },
5323   {
5324    "chips": ["gfx8"],
5325    "map": {"at": 166640, "to": "mm"},
5326    "name": "VGT_STRMOUT_BUFFER_SIZE_2",
5327    "type_ref": "COMPUTE_DIM_X"
5328   },
5329   {
5330    "chips": ["gfx8"],
5331    "map": {"at": 166644, "to": "mm"},
5332    "name": "VGT_STRMOUT_VTX_STRIDE_2",
5333    "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5334   },
5335   {
5336    "chips": ["gfx8"],
5337    "map": {"at": 166652, "to": "mm"},
5338    "name": "VGT_STRMOUT_BUFFER_OFFSET_2",
5339    "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5340   },
5341   {
5342    "chips": ["gfx8"],
5343    "map": {"at": 166656, "to": "mm"},
5344    "name": "VGT_STRMOUT_BUFFER_SIZE_3",
5345    "type_ref": "COMPUTE_DIM_X"
5346   },
5347   {
5348    "chips": ["gfx8"],
5349    "map": {"at": 166660, "to": "mm"},
5350    "name": "VGT_STRMOUT_VTX_STRIDE_3",
5351    "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5352   },
5353   {
5354    "chips": ["gfx8"],
5355    "map": {"at": 166668, "to": "mm"},
5356    "name": "VGT_STRMOUT_BUFFER_OFFSET_3",
5357    "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5358   },
5359   {
5360    "chips": ["gfx8"],
5361    "map": {"at": 166696, "to": "mm"},
5362    "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET",
5363    "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5364   },
5365   {
5366    "chips": ["gfx8"],
5367    "map": {"at": 166700, "to": "mm"},
5368    "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE",
5369    "type_ref": "COMPUTE_DIM_X"
5370   },
5371   {
5372    "chips": ["gfx8"],
5373    "map": {"at": 166704, "to": "mm"},
5374    "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",
5375    "type_ref": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE"
5376   },
5377   {
5378    "chips": ["gfx8"],
5379    "map": {"at": 166712, "to": "mm"},
5380    "name": "VGT_GS_MAX_VERT_OUT",
5381    "type_ref": "VGT_GS_MAX_VERT_OUT"
5382   },
5383   {
5384    "chips": ["gfx8"],
5385    "map": {"at": 166736, "to": "mm"},
5386    "name": "VGT_TESS_DISTRIBUTION",
5387    "type_ref": "VGT_TESS_DISTRIBUTION"
5388   },
5389   {
5390    "chips": ["gfx8"],
5391    "map": {"at": 166740, "to": "mm"},
5392    "name": "VGT_SHADER_STAGES_EN",
5393    "type_ref": "VGT_SHADER_STAGES_EN"
5394   },
5395   {
5396    "chips": ["gfx8"],
5397    "map": {"at": 166744, "to": "mm"},
5398    "name": "VGT_LS_HS_CONFIG",
5399    "type_ref": "VGT_LS_HS_CONFIG"
5400   },
5401   {
5402    "chips": ["gfx8"],
5403    "map": {"at": 166748, "to": "mm"},
5404    "name": "VGT_GS_VERT_ITEMSIZE",
5405    "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5406   },
5407   {
5408    "chips": ["gfx8"],
5409    "map": {"at": 166752, "to": "mm"},
5410    "name": "VGT_GS_VERT_ITEMSIZE_1",
5411    "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5412   },
5413   {
5414    "chips": ["gfx8"],
5415    "map": {"at": 166756, "to": "mm"},
5416    "name": "VGT_GS_VERT_ITEMSIZE_2",
5417    "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5418   },
5419   {
5420    "chips": ["gfx8"],
5421    "map": {"at": 166760, "to": "mm"},
5422    "name": "VGT_GS_VERT_ITEMSIZE_3",
5423    "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5424   },
5425   {
5426    "chips": ["gfx8"],
5427    "map": {"at": 166764, "to": "mm"},
5428    "name": "VGT_TF_PARAM",
5429    "type_ref": "VGT_TF_PARAM"
5430   },
5431   {
5432    "chips": ["gfx8"],
5433    "map": {"at": 166768, "to": "mm"},
5434    "name": "DB_ALPHA_TO_MASK",
5435    "type_ref": "DB_ALPHA_TO_MASK"
5436   },
5437   {
5438    "chips": ["gfx8"],
5439    "map": {"at": 166772, "to": "mm"},
5440    "name": "VGT_DISPATCH_DRAW_INDEX",
5441    "type_ref": "VGT_DISPATCH_DRAW_INDEX"
5442   },
5443   {
5444    "chips": ["gfx8"],
5445    "map": {"at": 166776, "to": "mm"},
5446    "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",
5447    "type_ref": "PA_SU_POLY_OFFSET_DB_FMT_CNTL"
5448   },
5449   {
5450    "chips": ["gfx8"],
5451    "map": {"at": 166780, "to": "mm"},
5452    "name": "PA_SU_POLY_OFFSET_CLAMP",
5453    "type_ref": "PA_SU_POLY_OFFSET_CLAMP"
5454   },
5455   {
5456    "chips": ["gfx8"],
5457    "map": {"at": 166784, "to": "mm"},
5458    "name": "PA_SU_POLY_OFFSET_FRONT_SCALE",
5459    "type_ref": "PA_SU_POLY_OFFSET_FRONT_SCALE"
5460   },
5461   {
5462    "chips": ["gfx8"],
5463    "map": {"at": 166788, "to": "mm"},
5464    "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET",
5465    "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5466   },
5467   {
5468    "chips": ["gfx8"],
5469    "map": {"at": 166792, "to": "mm"},
5470    "name": "PA_SU_POLY_OFFSET_BACK_SCALE",
5471    "type_ref": "PA_SU_POLY_OFFSET_FRONT_SCALE"
5472   },
5473   {
5474    "chips": ["gfx8"],
5475    "map": {"at": 166796, "to": "mm"},
5476    "name": "PA_SU_POLY_OFFSET_BACK_OFFSET",
5477    "type_ref": "PA_SU_POLY_OFFSET_FRONT_OFFSET"
5478   },
5479   {
5480    "chips": ["gfx8"],
5481    "map": {"at": 166800, "to": "mm"},
5482    "name": "VGT_GS_INSTANCE_CNT",
5483    "type_ref": "VGT_GS_INSTANCE_CNT"
5484   },
5485   {
5486    "chips": ["gfx8"],
5487    "map": {"at": 166804, "to": "mm"},
5488    "name": "VGT_STRMOUT_CONFIG",
5489    "type_ref": "VGT_STRMOUT_CONFIG"
5490   },
5491   {
5492    "chips": ["gfx8"],
5493    "map": {"at": 166808, "to": "mm"},
5494    "name": "VGT_STRMOUT_BUFFER_CONFIG",
5495    "type_ref": "VGT_STRMOUT_BUFFER_CONFIG"
5496   },
5497   {
5498    "chips": ["gfx8"],
5499    "map": {"at": 166868, "to": "mm"},
5500    "name": "PA_SC_CENTROID_PRIORITY_0",
5501    "type_ref": "PA_SC_CENTROID_PRIORITY_0"
5502   },
5503   {
5504    "chips": ["gfx8"],
5505    "map": {"at": 166872, "to": "mm"},
5506    "name": "PA_SC_CENTROID_PRIORITY_1",
5507    "type_ref": "PA_SC_CENTROID_PRIORITY_1"
5508   },
5509   {
5510    "chips": ["gfx8"],
5511    "map": {"at": 166876, "to": "mm"},
5512    "name": "PA_SC_LINE_CNTL",
5513    "type_ref": "PA_SC_LINE_CNTL"
5514   },
5515   {
5516    "chips": ["gfx8"],
5517    "map": {"at": 166880, "to": "mm"},
5518    "name": "PA_SC_AA_CONFIG",
5519    "type_ref": "PA_SC_AA_CONFIG"
5520   },
5521   {
5522    "chips": ["gfx8"],
5523    "map": {"at": 166884, "to": "mm"},
5524    "name": "PA_SU_VTX_CNTL",
5525    "type_ref": "PA_SU_VTX_CNTL"
5526   },
5527   {
5528    "chips": ["gfx8"],
5529    "map": {"at": 166888, "to": "mm"},
5530    "name": "PA_CL_GB_VERT_CLIP_ADJ",
5531    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
5532   },
5533   {
5534    "chips": ["gfx8"],
5535    "map": {"at": 166892, "to": "mm"},
5536    "name": "PA_CL_GB_VERT_DISC_ADJ",
5537    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
5538   },
5539   {
5540    "chips": ["gfx8"],
5541    "map": {"at": 166896, "to": "mm"},
5542    "name": "PA_CL_GB_HORZ_CLIP_ADJ",
5543    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
5544   },
5545   {
5546    "chips": ["gfx8"],
5547    "map": {"at": 166900, "to": "mm"},
5548    "name": "PA_CL_GB_HORZ_DISC_ADJ",
5549    "type_ref": "PA_CL_GB_VERT_CLIP_ADJ"
5550   },
5551   {
5552    "chips": ["gfx8"],
5553    "map": {"at": 166904, "to": "mm"},
5554    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",
5555    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5556   },
5557   {
5558    "chips": ["gfx8"],
5559    "map": {"at": 166908, "to": "mm"},
5560    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",
5561    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5562   },
5563   {
5564    "chips": ["gfx8"],
5565    "map": {"at": 166912, "to": "mm"},
5566    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",
5567    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5568   },
5569   {
5570    "chips": ["gfx8"],
5571    "map": {"at": 166916, "to": "mm"},
5572    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",
5573    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5574   },
5575   {
5576    "chips": ["gfx8"],
5577    "map": {"at": 166920, "to": "mm"},
5578    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",
5579    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5580   },
5581   {
5582    "chips": ["gfx8"],
5583    "map": {"at": 166924, "to": "mm"},
5584    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",
5585    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5586   },
5587   {
5588    "chips": ["gfx8"],
5589    "map": {"at": 166928, "to": "mm"},
5590    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",
5591    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5592   },
5593   {
5594    "chips": ["gfx8"],
5595    "map": {"at": 166932, "to": "mm"},
5596    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",
5597    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5598   },
5599   {
5600    "chips": ["gfx8"],
5601    "map": {"at": 166936, "to": "mm"},
5602    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",
5603    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5604   },
5605   {
5606    "chips": ["gfx8"],
5607    "map": {"at": 166940, "to": "mm"},
5608    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",
5609    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5610   },
5611   {
5612    "chips": ["gfx8"],
5613    "map": {"at": 166944, "to": "mm"},
5614    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",
5615    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5616   },
5617   {
5618    "chips": ["gfx8"],
5619    "map": {"at": 166948, "to": "mm"},
5620    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",
5621    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5622   },
5623   {
5624    "chips": ["gfx8"],
5625    "map": {"at": 166952, "to": "mm"},
5626    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",
5627    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
5628   },
5629   {
5630    "chips": ["gfx8"],
5631    "map": {"at": 166956, "to": "mm"},
5632    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",
5633    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
5634   },
5635   {
5636    "chips": ["gfx8"],
5637    "map": {"at": 166960, "to": "mm"},
5638    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",
5639    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
5640   },
5641   {
5642    "chips": ["gfx8"],
5643    "map": {"at": 166964, "to": "mm"},
5644    "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",
5645    "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
5646   },
5647   {
5648    "chips": ["gfx8"],
5649    "map": {"at": 166968, "to": "mm"},
5650    "name": "PA_SC_AA_MASK_X0Y0_X1Y0",
5651    "type_ref": "PA_SC_AA_MASK_X0Y0_X1Y0"
5652   },
5653   {
5654    "chips": ["gfx8"],
5655    "map": {"at": 166972, "to": "mm"},
5656    "name": "PA_SC_AA_MASK_X0Y1_X1Y1",
5657    "type_ref": "PA_SC_AA_MASK_X0Y1_X1Y1"
5658   },
5659   {
5660    "chips": ["gfx8"],
5661    "map": {"at": 167000, "to": "mm"},
5662    "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",
5663    "type_ref": "VGT_VERTEX_REUSE_BLOCK_CNTL"
5664   },
5665   {
5666    "chips": ["gfx8"],
5667    "map": {"at": 167004, "to": "mm"},
5668    "name": "VGT_OUT_DEALLOC_CNTL",
5669    "type_ref": "VGT_OUT_DEALLOC_CNTL"
5670   },
5671   {
5672    "chips": ["gfx8"],
5673    "map": {"at": 167008, "to": "mm"},
5674    "name": "CB_COLOR0_BASE",
5675    "type_ref": "CB_COLOR0_BASE"
5676   },
5677   {
5678    "chips": ["gfx8"],
5679    "map": {"at": 167012, "to": "mm"},
5680    "name": "CB_COLOR0_PITCH",
5681    "type_ref": "CB_COLOR0_PITCH"
5682   },
5683   {
5684    "chips": ["gfx8"],
5685    "map": {"at": 167016, "to": "mm"},
5686    "name": "CB_COLOR0_SLICE",
5687    "type_ref": "CB_COLOR0_SLICE"
5688   },
5689   {
5690    "chips": ["gfx8"],
5691    "map": {"at": 167020, "to": "mm"},
5692    "name": "CB_COLOR0_VIEW",
5693    "type_ref": "CB_COLOR0_VIEW"
5694   },
5695   {
5696    "chips": ["gfx8"],
5697    "map": {"at": 167024, "to": "mm"},
5698    "name": "CB_COLOR0_INFO",
5699    "type_ref": "CB_COLOR0_INFO"
5700   },
5701   {
5702    "chips": ["gfx8"],
5703    "map": {"at": 167028, "to": "mm"},
5704    "name": "CB_COLOR0_ATTRIB",
5705    "type_ref": "CB_COLOR0_ATTRIB"
5706   },
5707   {
5708    "chips": ["gfx8"],
5709    "map": {"at": 167032, "to": "mm"},
5710    "name": "CB_COLOR0_DCC_CONTROL",
5711    "type_ref": "CB_COLOR0_DCC_CONTROL"
5712   },
5713   {
5714    "chips": ["gfx8"],
5715    "map": {"at": 167036, "to": "mm"},
5716    "name": "CB_COLOR0_CMASK",
5717    "type_ref": "CB_COLOR0_BASE"
5718   },
5719   {
5720    "chips": ["gfx8"],
5721    "map": {"at": 167040, "to": "mm"},
5722    "name": "CB_COLOR0_CMASK_SLICE",
5723    "type_ref": "CB_COLOR0_CMASK_SLICE"
5724   },
5725   {
5726    "chips": ["gfx8"],
5727    "map": {"at": 167044, "to": "mm"},
5728    "name": "CB_COLOR0_FMASK",
5729    "type_ref": "CB_COLOR0_BASE"
5730   },
5731   {
5732    "chips": ["gfx8"],
5733    "map": {"at": 167048, "to": "mm"},
5734    "name": "CB_COLOR0_FMASK_SLICE",
5735    "type_ref": "CB_COLOR0_SLICE"
5736   },
5737   {
5738    "chips": ["gfx8"],
5739    "map": {"at": 167052, "to": "mm"},
5740    "name": "CB_COLOR0_CLEAR_WORD0",
5741    "type_ref": "CB_COLOR0_CLEAR_WORD0"
5742   },
5743   {
5744    "chips": ["gfx8"],
5745    "map": {"at": 167056, "to": "mm"},
5746    "name": "CB_COLOR0_CLEAR_WORD1",
5747    "type_ref": "CB_COLOR0_CLEAR_WORD1"
5748   },
5749   {
5750    "chips": ["gfx8"],
5751    "map": {"at": 167060, "to": "mm"},
5752    "name": "CB_COLOR0_DCC_BASE",
5753    "type_ref": "CB_COLOR0_BASE"
5754   },
5755   {
5756    "chips": ["gfx8"],
5757    "map": {"at": 167068, "to": "mm"},
5758    "name": "CB_COLOR1_BASE",
5759    "type_ref": "CB_COLOR0_BASE"
5760   },
5761   {
5762    "chips": ["gfx8"],
5763    "map": {"at": 167072, "to": "mm"},
5764    "name": "CB_COLOR1_PITCH",
5765    "type_ref": "CB_COLOR0_PITCH"
5766   },
5767   {
5768    "chips": ["gfx8"],
5769    "map": {"at": 167076, "to": "mm"},
5770    "name": "CB_COLOR1_SLICE",
5771    "type_ref": "CB_COLOR0_SLICE"
5772   },
5773   {
5774    "chips": ["gfx8"],
5775    "map": {"at": 167080, "to": "mm"},
5776    "name": "CB_COLOR1_VIEW",
5777    "type_ref": "CB_COLOR0_VIEW"
5778   },
5779   {
5780    "chips": ["gfx8"],
5781    "map": {"at": 167084, "to": "mm"},
5782    "name": "CB_COLOR1_INFO",
5783    "type_ref": "CB_COLOR0_INFO"
5784   },
5785   {
5786    "chips": ["gfx8"],
5787    "map": {"at": 167088, "to": "mm"},
5788    "name": "CB_COLOR1_ATTRIB",
5789    "type_ref": "CB_COLOR0_ATTRIB"
5790   },
5791   {
5792    "chips": ["gfx8"],
5793    "map": {"at": 167092, "to": "mm"},
5794    "name": "CB_COLOR1_DCC_CONTROL",
5795    "type_ref": "CB_COLOR0_DCC_CONTROL"
5796   },
5797   {
5798    "chips": ["gfx8"],
5799    "map": {"at": 167096, "to": "mm"},
5800    "name": "CB_COLOR1_CMASK",
5801    "type_ref": "CB_COLOR0_BASE"
5802   },
5803   {
5804    "chips": ["gfx8"],
5805    "map": {"at": 167100, "to": "mm"},
5806    "name": "CB_COLOR1_CMASK_SLICE",
5807    "type_ref": "CB_COLOR0_CMASK_SLICE"
5808   },
5809   {
5810    "chips": ["gfx8"],
5811    "map": {"at": 167104, "to": "mm"},
5812    "name": "CB_COLOR1_FMASK",
5813    "type_ref": "CB_COLOR0_BASE"
5814   },
5815   {
5816    "chips": ["gfx8"],
5817    "map": {"at": 167108, "to": "mm"},
5818    "name": "CB_COLOR1_FMASK_SLICE",
5819    "type_ref": "CB_COLOR0_SLICE"
5820   },
5821   {
5822    "chips": ["gfx8"],
5823    "map": {"at": 167112, "to": "mm"},
5824    "name": "CB_COLOR1_CLEAR_WORD0",
5825    "type_ref": "CB_COLOR0_CLEAR_WORD0"
5826   },
5827   {
5828    "chips": ["gfx8"],
5829    "map": {"at": 167116, "to": "mm"},
5830    "name": "CB_COLOR1_CLEAR_WORD1",
5831    "type_ref": "CB_COLOR0_CLEAR_WORD1"
5832   },
5833   {
5834    "chips": ["gfx8"],
5835    "map": {"at": 167120, "to": "mm"},
5836    "name": "CB_COLOR1_DCC_BASE",
5837    "type_ref": "CB_COLOR0_BASE"
5838   },
5839   {
5840    "chips": ["gfx8"],
5841    "map": {"at": 167128, "to": "mm"},
5842    "name": "CB_COLOR2_BASE",
5843    "type_ref": "CB_COLOR0_BASE"
5844   },
5845   {
5846    "chips": ["gfx8"],
5847    "map": {"at": 167132, "to": "mm"},
5848    "name": "CB_COLOR2_PITCH",
5849    "type_ref": "CB_COLOR0_PITCH"
5850   },
5851   {
5852    "chips": ["gfx8"],
5853    "map": {"at": 167136, "to": "mm"},
5854    "name": "CB_COLOR2_SLICE",
5855    "type_ref": "CB_COLOR0_SLICE"
5856   },
5857   {
5858    "chips": ["gfx8"],
5859    "map": {"at": 167140, "to": "mm"},
5860    "name": "CB_COLOR2_VIEW",
5861    "type_ref": "CB_COLOR0_VIEW"
5862   },
5863   {
5864    "chips": ["gfx8"],
5865    "map": {"at": 167144, "to": "mm"},
5866    "name": "CB_COLOR2_INFO",
5867    "type_ref": "CB_COLOR0_INFO"
5868   },
5869   {
5870    "chips": ["gfx8"],
5871    "map": {"at": 167148, "to": "mm"},
5872    "name": "CB_COLOR2_ATTRIB",
5873    "type_ref": "CB_COLOR0_ATTRIB"
5874   },
5875   {
5876    "chips": ["gfx8"],
5877    "map": {"at": 167152, "to": "mm"},
5878    "name": "CB_COLOR2_DCC_CONTROL",
5879    "type_ref": "CB_COLOR0_DCC_CONTROL"
5880   },
5881   {
5882    "chips": ["gfx8"],
5883    "map": {"at": 167156, "to": "mm"},
5884    "name": "CB_COLOR2_CMASK",
5885    "type_ref": "CB_COLOR0_BASE"
5886   },
5887   {
5888    "chips": ["gfx8"],
5889    "map": {"at": 167160, "to": "mm"},
5890    "name": "CB_COLOR2_CMASK_SLICE",
5891    "type_ref": "CB_COLOR0_CMASK_SLICE"
5892   },
5893   {
5894    "chips": ["gfx8"],
5895    "map": {"at": 167164, "to": "mm"},
5896    "name": "CB_COLOR2_FMASK",
5897    "type_ref": "CB_COLOR0_BASE"
5898   },
5899   {
5900    "chips": ["gfx8"],
5901    "map": {"at": 167168, "to": "mm"},
5902    "name": "CB_COLOR2_FMASK_SLICE",
5903    "type_ref": "CB_COLOR0_SLICE"
5904   },
5905   {
5906    "chips": ["gfx8"],
5907    "map": {"at": 167172, "to": "mm"},
5908    "name": "CB_COLOR2_CLEAR_WORD0",
5909    "type_ref": "CB_COLOR0_CLEAR_WORD0"
5910   },
5911   {
5912    "chips": ["gfx8"],
5913    "map": {"at": 167176, "to": "mm"},
5914    "name": "CB_COLOR2_CLEAR_WORD1",
5915    "type_ref": "CB_COLOR0_CLEAR_WORD1"
5916   },
5917   {
5918    "chips": ["gfx8"],
5919    "map": {"at": 167180, "to": "mm"},
5920    "name": "CB_COLOR2_DCC_BASE",
5921    "type_ref": "CB_COLOR0_BASE"
5922   },
5923   {
5924    "chips": ["gfx8"],
5925    "map": {"at": 167188, "to": "mm"},
5926    "name": "CB_COLOR3_BASE",
5927    "type_ref": "CB_COLOR0_BASE"
5928   },
5929   {
5930    "chips": ["gfx8"],
5931    "map": {"at": 167192, "to": "mm"},
5932    "name": "CB_COLOR3_PITCH",
5933    "type_ref": "CB_COLOR0_PITCH"
5934   },
5935   {
5936    "chips": ["gfx8"],
5937    "map": {"at": 167196, "to": "mm"},
5938    "name": "CB_COLOR3_SLICE",
5939    "type_ref": "CB_COLOR0_SLICE"
5940   },
5941   {
5942    "chips": ["gfx8"],
5943    "map": {"at": 167200, "to": "mm"},
5944    "name": "CB_COLOR3_VIEW",
5945    "type_ref": "CB_COLOR0_VIEW"
5946   },
5947   {
5948    "chips": ["gfx8"],
5949    "map": {"at": 167204, "to": "mm"},
5950    "name": "CB_COLOR3_INFO",
5951    "type_ref": "CB_COLOR0_INFO"
5952   },
5953   {
5954    "chips": ["gfx8"],
5955    "map": {"at": 167208, "to": "mm"},
5956    "name": "CB_COLOR3_ATTRIB",
5957    "type_ref": "CB_COLOR0_ATTRIB"
5958   },
5959   {
5960    "chips": ["gfx8"],
5961    "map": {"at": 167212, "to": "mm"},
5962    "name": "CB_COLOR3_DCC_CONTROL",
5963    "type_ref": "CB_COLOR0_DCC_CONTROL"
5964   },
5965   {
5966    "chips": ["gfx8"],
5967    "map": {"at": 167216, "to": "mm"},
5968    "name": "CB_COLOR3_CMASK",
5969    "type_ref": "CB_COLOR0_BASE"
5970   },
5971   {
5972    "chips": ["gfx8"],
5973    "map": {"at": 167220, "to": "mm"},
5974    "name": "CB_COLOR3_CMASK_SLICE",
5975    "type_ref": "CB_COLOR0_CMASK_SLICE"
5976   },
5977   {
5978    "chips": ["gfx8"],
5979    "map": {"at": 167224, "to": "mm"},
5980    "name": "CB_COLOR3_FMASK",
5981    "type_ref": "CB_COLOR0_BASE"
5982   },
5983   {
5984    "chips": ["gfx8"],
5985    "map": {"at": 167228, "to": "mm"},
5986    "name": "CB_COLOR3_FMASK_SLICE",
5987    "type_ref": "CB_COLOR0_SLICE"
5988   },
5989   {
5990    "chips": ["gfx8"],
5991    "map": {"at": 167232, "to": "mm"},
5992    "name": "CB_COLOR3_CLEAR_WORD0",
5993    "type_ref": "CB_COLOR0_CLEAR_WORD0"
5994   },
5995   {
5996    "chips": ["gfx8"],
5997    "map": {"at": 167236, "to": "mm"},
5998    "name": "CB_COLOR3_CLEAR_WORD1",
5999    "type_ref": "CB_COLOR0_CLEAR_WORD1"
6000   },
6001   {
6002    "chips": ["gfx8"],
6003    "map": {"at": 167240, "to": "mm"},
6004    "name": "CB_COLOR3_DCC_BASE",
6005    "type_ref": "CB_COLOR0_BASE"
6006   },
6007   {
6008    "chips": ["gfx8"],
6009    "map": {"at": 167248, "to": "mm"},
6010    "name": "CB_COLOR4_BASE",
6011    "type_ref": "CB_COLOR0_BASE"
6012   },
6013   {
6014    "chips": ["gfx8"],
6015    "map": {"at": 167252, "to": "mm"},
6016    "name": "CB_COLOR4_PITCH",
6017    "type_ref": "CB_COLOR0_PITCH"
6018   },
6019   {
6020    "chips": ["gfx8"],
6021    "map": {"at": 167256, "to": "mm"},
6022    "name": "CB_COLOR4_SLICE",
6023    "type_ref": "CB_COLOR0_SLICE"
6024   },
6025   {
6026    "chips": ["gfx8"],
6027    "map": {"at": 167260, "to": "mm"},
6028    "name": "CB_COLOR4_VIEW",
6029    "type_ref": "CB_COLOR0_VIEW"
6030   },
6031   {
6032    "chips": ["gfx8"],
6033    "map": {"at": 167264, "to": "mm"},
6034    "name": "CB_COLOR4_INFO",
6035    "type_ref": "CB_COLOR0_INFO"
6036   },
6037   {
6038    "chips": ["gfx8"],
6039    "map": {"at": 167268, "to": "mm"},
6040    "name": "CB_COLOR4_ATTRIB",
6041    "type_ref": "CB_COLOR0_ATTRIB"
6042   },
6043   {
6044    "chips": ["gfx8"],
6045    "map": {"at": 167272, "to": "mm"},
6046    "name": "CB_COLOR4_DCC_CONTROL",
6047    "type_ref": "CB_COLOR0_DCC_CONTROL"
6048   },
6049   {
6050    "chips": ["gfx8"],
6051    "map": {"at": 167276, "to": "mm"},
6052    "name": "CB_COLOR4_CMASK",
6053    "type_ref": "CB_COLOR0_BASE"
6054   },
6055   {
6056    "chips": ["gfx8"],
6057    "map": {"at": 167280, "to": "mm"},
6058    "name": "CB_COLOR4_CMASK_SLICE",
6059    "type_ref": "CB_COLOR0_CMASK_SLICE"
6060   },
6061   {
6062    "chips": ["gfx8"],
6063    "map": {"at": 167284, "to": "mm"},
6064    "name": "CB_COLOR4_FMASK",
6065    "type_ref": "CB_COLOR0_BASE"
6066   },
6067   {
6068    "chips": ["gfx8"],
6069    "map": {"at": 167288, "to": "mm"},
6070    "name": "CB_COLOR4_FMASK_SLICE",
6071    "type_ref": "CB_COLOR0_SLICE"
6072   },
6073   {
6074    "chips": ["gfx8"],
6075    "map": {"at": 167292, "to": "mm"},
6076    "name": "CB_COLOR4_CLEAR_WORD0",
6077    "type_ref": "CB_COLOR0_CLEAR_WORD0"
6078   },
6079   {
6080    "chips": ["gfx8"],
6081    "map": {"at": 167296, "to": "mm"},
6082    "name": "CB_COLOR4_CLEAR_WORD1",
6083    "type_ref": "CB_COLOR0_CLEAR_WORD1"
6084   },
6085   {
6086    "chips": ["gfx8"],
6087    "map": {"at": 167300, "to": "mm"},
6088    "name": "CB_COLOR4_DCC_BASE",
6089    "type_ref": "CB_COLOR0_BASE"
6090   },
6091   {
6092    "chips": ["gfx8"],
6093    "map": {"at": 167308, "to": "mm"},
6094    "name": "CB_COLOR5_BASE",
6095    "type_ref": "CB_COLOR0_BASE"
6096   },
6097   {
6098    "chips": ["gfx8"],
6099    "map": {"at": 167312, "to": "mm"},
6100    "name": "CB_COLOR5_PITCH",
6101    "type_ref": "CB_COLOR0_PITCH"
6102   },
6103   {
6104    "chips": ["gfx8"],
6105    "map": {"at": 167316, "to": "mm"},
6106    "name": "CB_COLOR5_SLICE",
6107    "type_ref": "CB_COLOR0_SLICE"
6108   },
6109   {
6110    "chips": ["gfx8"],
6111    "map": {"at": 167320, "to": "mm"},
6112    "name": "CB_COLOR5_VIEW",
6113    "type_ref": "CB_COLOR0_VIEW"
6114   },
6115   {
6116    "chips": ["gfx8"],
6117    "map": {"at": 167324, "to": "mm"},
6118    "name": "CB_COLOR5_INFO",
6119    "type_ref": "CB_COLOR0_INFO"
6120   },
6121   {
6122    "chips": ["gfx8"],
6123    "map": {"at": 167328, "to": "mm"},
6124    "name": "CB_COLOR5_ATTRIB",
6125    "type_ref": "CB_COLOR0_ATTRIB"
6126   },
6127   {
6128    "chips": ["gfx8"],
6129    "map": {"at": 167332, "to": "mm"},
6130    "name": "CB_COLOR5_DCC_CONTROL",
6131    "type_ref": "CB_COLOR0_DCC_CONTROL"
6132   },
6133   {
6134    "chips": ["gfx8"],
6135    "map": {"at": 167336, "to": "mm"},
6136    "name": "CB_COLOR5_CMASK",
6137    "type_ref": "CB_COLOR0_BASE"
6138   },
6139   {
6140    "chips": ["gfx8"],
6141    "map": {"at": 167340, "to": "mm"},
6142    "name": "CB_COLOR5_CMASK_SLICE",
6143    "type_ref": "CB_COLOR0_CMASK_SLICE"
6144   },
6145   {
6146    "chips": ["gfx8"],
6147    "map": {"at": 167344, "to": "mm"},
6148    "name": "CB_COLOR5_FMASK",
6149    "type_ref": "CB_COLOR0_BASE"
6150   },
6151   {
6152    "chips": ["gfx8"],
6153    "map": {"at": 167348, "to": "mm"},
6154    "name": "CB_COLOR5_FMASK_SLICE",
6155    "type_ref": "CB_COLOR0_SLICE"
6156   },
6157   {
6158    "chips": ["gfx8"],
6159    "map": {"at": 167352, "to": "mm"},
6160    "name": "CB_COLOR5_CLEAR_WORD0",
6161    "type_ref": "CB_COLOR0_CLEAR_WORD0"
6162   },
6163   {
6164    "chips": ["gfx8"],
6165    "map": {"at": 167356, "to": "mm"},
6166    "name": "CB_COLOR5_CLEAR_WORD1",
6167    "type_ref": "CB_COLOR0_CLEAR_WORD1"
6168   },
6169   {
6170    "chips": ["gfx8"],
6171    "map": {"at": 167360, "to": "mm"},
6172    "name": "CB_COLOR5_DCC_BASE",
6173    "type_ref": "CB_COLOR0_BASE"
6174   },
6175   {
6176    "chips": ["gfx8"],
6177    "map": {"at": 167368, "to": "mm"},
6178    "name": "CB_COLOR6_BASE",
6179    "type_ref": "CB_COLOR0_BASE"
6180   },
6181   {
6182    "chips": ["gfx8"],
6183    "map": {"at": 167372, "to": "mm"},
6184    "name": "CB_COLOR6_PITCH",
6185    "type_ref": "CB_COLOR0_PITCH"
6186   },
6187   {
6188    "chips": ["gfx8"],
6189    "map": {"at": 167376, "to": "mm"},
6190    "name": "CB_COLOR6_SLICE",
6191    "type_ref": "CB_COLOR0_SLICE"
6192   },
6193   {
6194    "chips": ["gfx8"],
6195    "map": {"at": 167380, "to": "mm"},
6196    "name": "CB_COLOR6_VIEW",
6197    "type_ref": "CB_COLOR0_VIEW"
6198   },
6199   {
6200    "chips": ["gfx8"],
6201    "map": {"at": 167384, "to": "mm"},
6202    "name": "CB_COLOR6_INFO",
6203    "type_ref": "CB_COLOR0_INFO"
6204   },
6205   {
6206    "chips": ["gfx8"],
6207    "map": {"at": 167388, "to": "mm"},
6208    "name": "CB_COLOR6_ATTRIB",
6209    "type_ref": "CB_COLOR0_ATTRIB"
6210   },
6211   {
6212    "chips": ["gfx8"],
6213    "map": {"at": 167392, "to": "mm"},
6214    "name": "CB_COLOR6_DCC_CONTROL",
6215    "type_ref": "CB_COLOR0_DCC_CONTROL"
6216   },
6217   {
6218    "chips": ["gfx8"],
6219    "map": {"at": 167396, "to": "mm"},
6220    "name": "CB_COLOR6_CMASK",
6221    "type_ref": "CB_COLOR0_BASE"
6222   },
6223   {
6224    "chips": ["gfx8"],
6225    "map": {"at": 167400, "to": "mm"},
6226    "name": "CB_COLOR6_CMASK_SLICE",
6227    "type_ref": "CB_COLOR0_CMASK_SLICE"
6228   },
6229   {
6230    "chips": ["gfx8"],
6231    "map": {"at": 167404, "to": "mm"},
6232    "name": "CB_COLOR6_FMASK",
6233    "type_ref": "CB_COLOR0_BASE"
6234   },
6235   {
6236    "chips": ["gfx8"],
6237    "map": {"at": 167408, "to": "mm"},
6238    "name": "CB_COLOR6_FMASK_SLICE",
6239    "type_ref": "CB_COLOR0_SLICE"
6240   },
6241   {
6242    "chips": ["gfx8"],
6243    "map": {"at": 167412, "to": "mm"},
6244    "name": "CB_COLOR6_CLEAR_WORD0",
6245    "type_ref": "CB_COLOR0_CLEAR_WORD0"
6246   },
6247   {
6248    "chips": ["gfx8"],
6249    "map": {"at": 167416, "to": "mm"},
6250    "name": "CB_COLOR6_CLEAR_WORD1",
6251    "type_ref": "CB_COLOR0_CLEAR_WORD1"
6252   },
6253   {
6254    "chips": ["gfx8"],
6255    "map": {"at": 167420, "to": "mm"},
6256    "name": "CB_COLOR6_DCC_BASE",
6257    "type_ref": "CB_COLOR0_BASE"
6258   },
6259   {
6260    "chips": ["gfx8"],
6261    "map": {"at": 167428, "to": "mm"},
6262    "name": "CB_COLOR7_BASE",
6263    "type_ref": "CB_COLOR0_BASE"
6264   },
6265   {
6266    "chips": ["gfx8"],
6267    "map": {"at": 167432, "to": "mm"},
6268    "name": "CB_COLOR7_PITCH",
6269    "type_ref": "CB_COLOR0_PITCH"
6270   },
6271   {
6272    "chips": ["gfx8"],
6273    "map": {"at": 167436, "to": "mm"},
6274    "name": "CB_COLOR7_SLICE",
6275    "type_ref": "CB_COLOR0_SLICE"
6276   },
6277   {
6278    "chips": ["gfx8"],
6279    "map": {"at": 167440, "to": "mm"},
6280    "name": "CB_COLOR7_VIEW",
6281    "type_ref": "CB_COLOR0_VIEW"
6282   },
6283   {
6284    "chips": ["gfx8"],
6285    "map": {"at": 167444, "to": "mm"},
6286    "name": "CB_COLOR7_INFO",
6287    "type_ref": "CB_COLOR0_INFO"
6288   },
6289   {
6290    "chips": ["gfx8"],
6291    "map": {"at": 167448, "to": "mm"},
6292    "name": "CB_COLOR7_ATTRIB",
6293    "type_ref": "CB_COLOR0_ATTRIB"
6294   },
6295   {
6296    "chips": ["gfx8"],
6297    "map": {"at": 167452, "to": "mm"},
6298    "name": "CB_COLOR7_DCC_CONTROL",
6299    "type_ref": "CB_COLOR0_DCC_CONTROL"
6300   },
6301   {
6302    "chips": ["gfx8"],
6303    "map": {"at": 167456, "to": "mm"},
6304    "name": "CB_COLOR7_CMASK",
6305    "type_ref": "CB_COLOR0_BASE"
6306   },
6307   {
6308    "chips": ["gfx8"],
6309    "map": {"at": 167460, "to": "mm"},
6310    "name": "CB_COLOR7_CMASK_SLICE",
6311    "type_ref": "CB_COLOR0_CMASK_SLICE"
6312   },
6313   {
6314    "chips": ["gfx8"],
6315    "map": {"at": 167464, "to": "mm"},
6316    "name": "CB_COLOR7_FMASK",
6317    "type_ref": "CB_COLOR0_BASE"
6318   },
6319   {
6320    "chips": ["gfx8"],
6321    "map": {"at": 167468, "to": "mm"},
6322    "name": "CB_COLOR7_FMASK_SLICE",
6323    "type_ref": "CB_COLOR0_SLICE"
6324   },
6325   {
6326    "chips": ["gfx8"],
6327    "map": {"at": 167472, "to": "mm"},
6328    "name": "CB_COLOR7_CLEAR_WORD0",
6329    "type_ref": "CB_COLOR0_CLEAR_WORD0"
6330   },
6331   {
6332    "chips": ["gfx8"],
6333    "map": {"at": 167476, "to": "mm"},
6334    "name": "CB_COLOR7_CLEAR_WORD1",
6335    "type_ref": "CB_COLOR0_CLEAR_WORD1"
6336   },
6337   {
6338    "chips": ["gfx8"],
6339    "map": {"at": 167480, "to": "mm"},
6340    "name": "CB_COLOR7_DCC_BASE",
6341    "type_ref": "CB_COLOR0_BASE"
6342   },
6343   {
6344    "chips": ["gfx8"],
6345    "map": {"at": 196608, "to": "mm"},
6346    "name": "CP_EOP_DONE_ADDR_LO",
6347    "type_ref": "CP_EOP_DONE_ADDR_LO"
6348   },
6349   {
6350    "chips": ["gfx8"],
6351    "map": {"at": 196612, "to": "mm"},
6352    "name": "CP_EOP_DONE_ADDR_HI",
6353    "type_ref": "CP_EOP_DONE_ADDR_HI"
6354   },
6355   {
6356    "chips": ["gfx8"],
6357    "map": {"at": 196616, "to": "mm"},
6358    "name": "CP_EOP_DONE_DATA_LO",
6359    "type_ref": "CP_EOP_DONE_DATA_LO"
6360   },
6361   {
6362    "chips": ["gfx8"],
6363    "map": {"at": 196620, "to": "mm"},
6364    "name": "CP_EOP_DONE_DATA_HI",
6365    "type_ref": "CP_EOP_DONE_DATA_HI"
6366   },
6367   {
6368    "chips": ["gfx8"],
6369    "map": {"at": 196624, "to": "mm"},
6370    "name": "CP_EOP_LAST_FENCE_LO",
6371    "type_ref": "CP_EOP_LAST_FENCE_LO"
6372   },
6373   {
6374    "chips": ["gfx8"],
6375    "map": {"at": 196628, "to": "mm"},
6376    "name": "CP_EOP_LAST_FENCE_HI",
6377    "type_ref": "CP_EOP_LAST_FENCE_HI"
6378   },
6379   {
6380    "chips": ["gfx8"],
6381    "map": {"at": 196632, "to": "mm"},
6382    "name": "CP_STREAM_OUT_ADDR_LO",
6383    "type_ref": "CP_STREAM_OUT_ADDR_LO"
6384   },
6385   {
6386    "chips": ["gfx8"],
6387    "map": {"at": 196636, "to": "mm"},
6388    "name": "CP_STREAM_OUT_ADDR_HI",
6389    "type_ref": "CP_STREAM_OUT_ADDR_HI"
6390   },
6391   {
6392    "chips": ["gfx8"],
6393    "map": {"at": 196640, "to": "mm"},
6394    "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO",
6395    "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"
6396   },
6397   {
6398    "chips": ["gfx8"],
6399    "map": {"at": 196644, "to": "mm"},
6400    "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI",
6401    "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"
6402   },
6403   {
6404    "chips": ["gfx8"],
6405    "map": {"at": 196648, "to": "mm"},
6406    "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO",
6407    "type_ref": "CP_NUM_PRIM_NEEDED_COUNT0_LO"
6408   },
6409   {
6410    "chips": ["gfx8"],
6411    "map": {"at": 196652, "to": "mm"},
6412    "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI",
6413    "type_ref": "CP_NUM_PRIM_NEEDED_COUNT0_HI"
6414   },
6415   {
6416    "chips": ["gfx8"],
6417    "map": {"at": 196656, "to": "mm"},
6418    "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO",
6419    "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"
6420   },
6421   {
6422    "chips": ["gfx8"],
6423    "map": {"at": 196660, "to": "mm"},
6424    "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI",
6425    "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"
6426   },
6427   {
6428    "chips": ["gfx8"],
6429    "map": {"at": 196664, "to": "mm"},
6430    "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO",
6431    "type_ref": "CP_NUM_PRIM_NEEDED_COUNT1_LO"
6432   },
6433   {
6434    "chips": ["gfx8"],
6435    "map": {"at": 196668, "to": "mm"},
6436    "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI",
6437    "type_ref": "CP_NUM_PRIM_NEEDED_COUNT1_HI"
6438   },
6439   {
6440    "chips": ["gfx8"],
6441    "map": {"at": 196672, "to": "mm"},
6442    "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO",
6443    "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"
6444   },
6445   {
6446    "chips": ["gfx8"],
6447    "map": {"at": 196676, "to": "mm"},
6448    "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI",
6449    "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"
6450   },
6451   {
6452    "chips": ["gfx8"],
6453    "map": {"at": 196680, "to": "mm"},
6454    "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO",
6455    "type_ref": "CP_NUM_PRIM_NEEDED_COUNT2_LO"
6456   },
6457   {
6458    "chips": ["gfx8"],
6459    "map": {"at": 196684, "to": "mm"},
6460    "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI",
6461    "type_ref": "CP_NUM_PRIM_NEEDED_COUNT2_HI"
6462   },
6463   {
6464    "chips": ["gfx8"],
6465    "map": {"at": 196688, "to": "mm"},
6466    "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO",
6467    "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"
6468   },
6469   {
6470    "chips": ["gfx8"],
6471    "map": {"at": 196692, "to": "mm"},
6472    "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI",
6473    "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"
6474   },
6475   {
6476    "chips": ["gfx8"],
6477    "map": {"at": 196696, "to": "mm"},
6478    "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO",
6479    "type_ref": "CP_NUM_PRIM_NEEDED_COUNT3_LO"
6480   },
6481   {
6482    "chips": ["gfx8"],
6483    "map": {"at": 196700, "to": "mm"},
6484    "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI",
6485    "type_ref": "CP_NUM_PRIM_NEEDED_COUNT3_HI"
6486   },
6487   {
6488    "chips": ["gfx8"],
6489    "map": {"at": 196704, "to": "mm"},
6490    "name": "CP_PIPE_STATS_ADDR_LO",
6491    "type_ref": "CP_PIPE_STATS_ADDR_LO"
6492   },
6493   {
6494    "chips": ["gfx8"],
6495    "map": {"at": 196708, "to": "mm"},
6496    "name": "CP_PIPE_STATS_ADDR_HI",
6497    "type_ref": "CP_PIPE_STATS_ADDR_HI"
6498   },
6499   {
6500    "chips": ["gfx8"],
6501    "map": {"at": 196712, "to": "mm"},
6502    "name": "CP_VGT_IAVERT_COUNT_LO",
6503    "type_ref": "CP_VGT_IAVERT_COUNT_LO"
6504   },
6505   {
6506    "chips": ["gfx8"],
6507    "map": {"at": 196716, "to": "mm"},
6508    "name": "CP_VGT_IAVERT_COUNT_HI",
6509    "type_ref": "CP_VGT_IAVERT_COUNT_HI"
6510   },
6511   {
6512    "chips": ["gfx8"],
6513    "map": {"at": 196720, "to": "mm"},
6514    "name": "CP_VGT_IAPRIM_COUNT_LO",
6515    "type_ref": "CP_VGT_IAPRIM_COUNT_LO"
6516   },
6517   {
6518    "chips": ["gfx8"],
6519    "map": {"at": 196724, "to": "mm"},
6520    "name": "CP_VGT_IAPRIM_COUNT_HI",
6521    "type_ref": "CP_VGT_IAPRIM_COUNT_HI"
6522   },
6523   {
6524    "chips": ["gfx8"],
6525    "map": {"at": 196728, "to": "mm"},
6526    "name": "CP_VGT_GSPRIM_COUNT_LO",
6527    "type_ref": "CP_VGT_GSPRIM_COUNT_LO"
6528   },
6529   {
6530    "chips": ["gfx8"],
6531    "map": {"at": 196732, "to": "mm"},
6532    "name": "CP_VGT_GSPRIM_COUNT_HI",
6533    "type_ref": "CP_VGT_GSPRIM_COUNT_HI"
6534   },
6535   {
6536    "chips": ["gfx8"],
6537    "map": {"at": 196736, "to": "mm"},
6538    "name": "CP_VGT_VSINVOC_COUNT_LO",
6539    "type_ref": "CP_VGT_VSINVOC_COUNT_LO"
6540   },
6541   {
6542    "chips": ["gfx8"],
6543    "map": {"at": 196740, "to": "mm"},
6544    "name": "CP_VGT_VSINVOC_COUNT_HI",
6545    "type_ref": "CP_VGT_VSINVOC_COUNT_HI"
6546   },
6547   {
6548    "chips": ["gfx8"],
6549    "map": {"at": 196744, "to": "mm"},
6550    "name": "CP_VGT_GSINVOC_COUNT_LO",
6551    "type_ref": "CP_VGT_GSINVOC_COUNT_LO"
6552   },
6553   {
6554    "chips": ["gfx8"],
6555    "map": {"at": 196748, "to": "mm"},
6556    "name": "CP_VGT_GSINVOC_COUNT_HI",
6557    "type_ref": "CP_VGT_GSINVOC_COUNT_HI"
6558   },
6559   {
6560    "chips": ["gfx8"],
6561    "map": {"at": 196752, "to": "mm"},
6562    "name": "CP_VGT_HSINVOC_COUNT_LO",
6563    "type_ref": "CP_VGT_HSINVOC_COUNT_LO"
6564   },
6565   {
6566    "chips": ["gfx8"],
6567    "map": {"at": 196756, "to": "mm"},
6568    "name": "CP_VGT_HSINVOC_COUNT_HI",
6569    "type_ref": "CP_VGT_HSINVOC_COUNT_HI"
6570   },
6571   {
6572    "chips": ["gfx8"],
6573    "map": {"at": 196760, "to": "mm"},
6574    "name": "CP_VGT_DSINVOC_COUNT_LO",
6575    "type_ref": "CP_VGT_DSINVOC_COUNT_LO"
6576   },
6577   {
6578    "chips": ["gfx8"],
6579    "map": {"at": 196764, "to": "mm"},
6580    "name": "CP_VGT_DSINVOC_COUNT_HI",
6581    "type_ref": "CP_VGT_DSINVOC_COUNT_HI"
6582   },
6583   {
6584    "chips": ["gfx8"],
6585    "map": {"at": 196768, "to": "mm"},
6586    "name": "CP_PA_CINVOC_COUNT_LO",
6587    "type_ref": "CP_PA_CINVOC_COUNT_LO"
6588   },
6589   {
6590    "chips": ["gfx8"],
6591    "map": {"at": 196772, "to": "mm"},
6592    "name": "CP_PA_CINVOC_COUNT_HI",
6593    "type_ref": "CP_PA_CINVOC_COUNT_HI"
6594   },
6595   {
6596    "chips": ["gfx8"],
6597    "map": {"at": 196776, "to": "mm"},
6598    "name": "CP_PA_CPRIM_COUNT_LO",
6599    "type_ref": "CP_PA_CPRIM_COUNT_LO"
6600   },
6601   {
6602    "chips": ["gfx8"],
6603    "map": {"at": 196780, "to": "mm"},
6604    "name": "CP_PA_CPRIM_COUNT_HI",
6605    "type_ref": "CP_PA_CPRIM_COUNT_HI"
6606   },
6607   {
6608    "chips": ["gfx8"],
6609    "map": {"at": 196784, "to": "mm"},
6610    "name": "CP_SC_PSINVOC_COUNT0_LO",
6611    "type_ref": "CP_SC_PSINVOC_COUNT0_LO"
6612   },
6613   {
6614    "chips": ["gfx8"],
6615    "map": {"at": 196788, "to": "mm"},
6616    "name": "CP_SC_PSINVOC_COUNT0_HI",
6617    "type_ref": "CP_SC_PSINVOC_COUNT0_HI"
6618   },
6619   {
6620    "chips": ["gfx8"],
6621    "map": {"at": 196792, "to": "mm"},
6622    "name": "CP_SC_PSINVOC_COUNT1_LO",
6623    "type_ref": "CP_SC_PSINVOC_COUNT1_LO"
6624   },
6625   {
6626    "chips": ["gfx8"],
6627    "map": {"at": 196796, "to": "mm"},
6628    "name": "CP_SC_PSINVOC_COUNT1_HI",
6629    "type_ref": "CP_SC_PSINVOC_COUNT1_LO"
6630   },
6631   {
6632    "chips": ["gfx8"],
6633    "map": {"at": 196800, "to": "mm"},
6634    "name": "CP_VGT_CSINVOC_COUNT_LO",
6635    "type_ref": "CP_VGT_CSINVOC_COUNT_LO"
6636   },
6637   {
6638    "chips": ["gfx8"],
6639    "map": {"at": 196804, "to": "mm"},
6640    "name": "CP_VGT_CSINVOC_COUNT_HI",
6641    "type_ref": "CP_VGT_CSINVOC_COUNT_HI"
6642   },
6643   {
6644    "chips": ["gfx8"],
6645    "map": {"at": 196852, "to": "mm"},
6646    "name": "CP_PIPE_STATS_CONTROL",
6647    "type_ref": "CP_PIPE_STATS_CONTROL"
6648   },
6649   {
6650    "chips": ["gfx8"],
6651    "map": {"at": 196856, "to": "mm"},
6652    "name": "CP_STREAM_OUT_CONTROL",
6653    "type_ref": "CP_PIPE_STATS_CONTROL"
6654   },
6655   {
6656    "chips": ["gfx8"],
6657    "map": {"at": 196860, "to": "mm"},
6658    "name": "CP_STRMOUT_CNTL",
6659    "type_ref": "CP_STRMOUT_CNTL"
6660   },
6661   {
6662    "chips": ["gfx8"],
6663    "map": {"at": 196864, "to": "mm"},
6664    "name": "SCRATCH_REG0",
6665    "type_ref": "SCRATCH_REG0"
6666   },
6667   {
6668    "chips": ["gfx8"],
6669    "map": {"at": 196868, "to": "mm"},
6670    "name": "SCRATCH_REG1",
6671    "type_ref": "SCRATCH_REG1"
6672   },
6673   {
6674    "chips": ["gfx8"],
6675    "map": {"at": 196872, "to": "mm"},
6676    "name": "SCRATCH_REG2",
6677    "type_ref": "SCRATCH_REG2"
6678   },
6679   {
6680    "chips": ["gfx8"],
6681    "map": {"at": 196876, "to": "mm"},
6682    "name": "SCRATCH_REG3",
6683    "type_ref": "SCRATCH_REG3"
6684   },
6685   {
6686    "chips": ["gfx8"],
6687    "map": {"at": 196880, "to": "mm"},
6688    "name": "SCRATCH_REG4",
6689    "type_ref": "SCRATCH_REG4"
6690   },
6691   {
6692    "chips": ["gfx8"],
6693    "map": {"at": 196884, "to": "mm"},
6694    "name": "SCRATCH_REG5",
6695    "type_ref": "SCRATCH_REG5"
6696   },
6697   {
6698    "chips": ["gfx8"],
6699    "map": {"at": 196888, "to": "mm"},
6700    "name": "SCRATCH_REG6",
6701    "type_ref": "SCRATCH_REG6"
6702   },
6703   {
6704    "chips": ["gfx8"],
6705    "map": {"at": 196892, "to": "mm"},
6706    "name": "SCRATCH_REG7",
6707    "type_ref": "SCRATCH_REG7"
6708   },
6709   {
6710    "chips": ["gfx8"],
6711    "map": {"at": 196928, "to": "mm"},
6712    "name": "SCRATCH_UMSK",
6713    "type_ref": "SCRATCH_UMSK"
6714   },
6715   {
6716    "chips": ["gfx8"],
6717    "map": {"at": 196932, "to": "mm"},
6718    "name": "SCRATCH_ADDR",
6719    "type_ref": "SCRATCH_ADDR"
6720   },
6721   {
6722    "chips": ["gfx8"],
6723    "map": {"at": 196936, "to": "mm"},
6724    "name": "CP_PFP_ATOMIC_PREOP_LO",
6725    "type_ref": "CP_PFP_ATOMIC_PREOP_LO"
6726   },
6727   {
6728    "chips": ["gfx8"],
6729    "map": {"at": 196940, "to": "mm"},
6730    "name": "CP_PFP_ATOMIC_PREOP_HI",
6731    "type_ref": "CP_PFP_ATOMIC_PREOP_HI"
6732   },
6733   {
6734    "chips": ["gfx8"],
6735    "map": {"at": 196944, "to": "mm"},
6736    "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO",
6737    "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
6738   },
6739   {
6740    "chips": ["gfx8"],
6741    "map": {"at": 196948, "to": "mm"},
6742    "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI",
6743    "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
6744   },
6745   {
6746    "chips": ["gfx8"],
6747    "map": {"at": 196952, "to": "mm"},
6748    "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO",
6749    "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
6750   },
6751   {
6752    "chips": ["gfx8"],
6753    "map": {"at": 196956, "to": "mm"},
6754    "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI",
6755    "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
6756   },
6757   {
6758    "chips": ["gfx8"],
6759    "map": {"at": 196960, "to": "mm"},
6760    "name": "CP_APPEND_ADDR_LO",
6761    "type_ref": "CP_APPEND_ADDR_LO"
6762   },
6763   {
6764    "chips": ["gfx8"],
6765    "map": {"at": 196964, "to": "mm"},
6766    "name": "CP_APPEND_ADDR_HI",
6767    "type_ref": "CP_APPEND_ADDR_HI"
6768   },
6769   {
6770    "chips": ["gfx8"],
6771    "map": {"at": 196968, "to": "mm"},
6772    "name": "CP_APPEND_DATA",
6773    "type_ref": "CP_APPEND_DATA"
6774   },
6775   {
6776    "chips": ["gfx8"],
6777    "map": {"at": 196972, "to": "mm"},
6778    "name": "CP_APPEND_LAST_CS_FENCE",
6779    "type_ref": "CP_APPEND_LAST_CS_FENCE"
6780   },
6781   {
6782    "chips": ["gfx8"],
6783    "map": {"at": 196976, "to": "mm"},
6784    "name": "CP_APPEND_LAST_PS_FENCE",
6785    "type_ref": "CP_APPEND_LAST_CS_FENCE"
6786   },
6787   {
6788    "chips": ["gfx8"],
6789    "map": {"at": 196980, "to": "mm"},
6790    "name": "CP_ATOMIC_PREOP_LO",
6791    "type_ref": "CP_PFP_ATOMIC_PREOP_LO"
6792   },
6793   {
6794    "chips": ["gfx8"],
6795    "map": {"at": 196984, "to": "mm"},
6796    "name": "CP_ATOMIC_PREOP_HI",
6797    "type_ref": "CP_PFP_ATOMIC_PREOP_HI"
6798   },
6799   {
6800    "chips": ["gfx8"],
6801    "map": {"at": 196988, "to": "mm"},
6802    "name": "CP_GDS_ATOMIC0_PREOP_LO",
6803    "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
6804   },
6805   {
6806    "chips": ["gfx8"],
6807    "map": {"at": 196992, "to": "mm"},
6808    "name": "CP_GDS_ATOMIC0_PREOP_HI",
6809    "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
6810   },
6811   {
6812    "chips": ["gfx8"],
6813    "map": {"at": 196996, "to": "mm"},
6814    "name": "CP_GDS_ATOMIC1_PREOP_LO",
6815    "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
6816   },
6817   {
6818    "chips": ["gfx8"],
6819    "map": {"at": 197000, "to": "mm"},
6820    "name": "CP_GDS_ATOMIC1_PREOP_HI",
6821    "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
6822   },
6823   {
6824    "chips": ["gfx8"],
6825    "map": {"at": 197028, "to": "mm"},
6826    "name": "CP_ME_MC_WADDR_LO",
6827    "type_ref": "CP_ME_MC_WADDR_LO"
6828   },
6829   {
6830    "chips": ["gfx8"],
6831    "map": {"at": 197032, "to": "mm"},
6832    "name": "CP_ME_MC_WADDR_HI",
6833    "type_ref": "CP_ME_MC_WADDR_HI"
6834   },
6835   {
6836    "chips": ["gfx8"],
6837    "map": {"at": 197036, "to": "mm"},
6838    "name": "CP_ME_MC_WDATA_LO",
6839    "type_ref": "CP_ME_MC_WDATA_LO"
6840   },
6841   {
6842    "chips": ["gfx8"],
6843    "map": {"at": 197040, "to": "mm"},
6844    "name": "CP_ME_MC_WDATA_HI",
6845    "type_ref": "CP_ME_MC_WDATA_HI"
6846   },
6847   {
6848    "chips": ["gfx8"],
6849    "map": {"at": 197044, "to": "mm"},
6850    "name": "CP_ME_MC_RADDR_LO",
6851    "type_ref": "CP_ME_MC_RADDR_LO"
6852   },
6853   {
6854    "chips": ["gfx8"],
6855    "map": {"at": 197048, "to": "mm"},
6856    "name": "CP_ME_MC_RADDR_HI",
6857    "type_ref": "CP_ME_MC_RADDR_HI"
6858   },
6859   {
6860    "chips": ["gfx8"],
6861    "map": {"at": 197052, "to": "mm"},
6862    "name": "CP_SEM_WAIT_TIMER",
6863    "type_ref": "CP_SEM_WAIT_TIMER"
6864   },
6865   {
6866    "chips": ["gfx8"],
6867    "map": {"at": 197056, "to": "mm"},
6868    "name": "CP_SIG_SEM_ADDR_LO",
6869    "type_ref": "CP_SIG_SEM_ADDR_LO"
6870   },
6871   {
6872    "chips": ["gfx8"],
6873    "map": {"at": 197060, "to": "mm"},
6874    "name": "CP_SIG_SEM_ADDR_HI",
6875    "type_ref": "CP_SIG_SEM_ADDR_HI"
6876   },
6877   {
6878    "chips": ["gfx8"],
6879    "map": {"at": 197072, "to": "mm"},
6880    "name": "CP_WAIT_REG_MEM_TIMEOUT",
6881    "type_ref": "CP_WAIT_REG_MEM_TIMEOUT"
6882   },
6883   {
6884    "chips": ["gfx8"],
6885    "map": {"at": 197076, "to": "mm"},
6886    "name": "CP_WAIT_SEM_ADDR_LO",
6887    "type_ref": "CP_SIG_SEM_ADDR_LO"
6888   },
6889   {
6890    "chips": ["gfx8"],
6891    "map": {"at": 197080, "to": "mm"},
6892    "name": "CP_WAIT_SEM_ADDR_HI",
6893    "type_ref": "CP_SIG_SEM_ADDR_HI"
6894   },
6895   {
6896    "chips": ["gfx8"],
6897    "map": {"at": 197084, "to": "mm"},
6898    "name": "CP_DMA_PFP_CONTROL",
6899    "type_ref": "CP_DMA_ME_CONTROL"
6900   },
6901   {
6902    "chips": ["gfx8"],
6903    "map": {"at": 197088, "to": "mm"},
6904    "name": "CP_DMA_ME_CONTROL",
6905    "type_ref": "CP_DMA_ME_CONTROL"
6906   },
6907   {
6908    "chips": ["gfx8"],
6909    "map": {"at": 197092, "to": "mm"},
6910    "name": "CP_COHER_BASE_HI",
6911    "type_ref": "CP_COHER_BASE_HI"
6912   },
6913   {
6914    "chips": ["gfx8"],
6915    "map": {"at": 197100, "to": "mm"},
6916    "name": "CP_COHER_START_DELAY",
6917    "type_ref": "CP_COHER_START_DELAY"
6918   },
6919   {
6920    "chips": ["gfx8"],
6921    "map": {"at": 197104, "to": "mm"},
6922    "name": "CP_COHER_CNTL",
6923    "type_ref": "CP_COHER_CNTL"
6924   },
6925   {
6926    "chips": ["gfx8"],
6927    "map": {"at": 197108, "to": "mm"},
6928    "name": "CP_COHER_SIZE",
6929    "type_ref": "CP_COHER_SIZE"
6930   },
6931   {
6932    "chips": ["gfx8"],
6933    "map": {"at": 197112, "to": "mm"},
6934    "name": "CP_COHER_BASE",
6935    "type_ref": "CP_COHER_BASE"
6936   },
6937   {
6938    "chips": ["gfx8"],
6939    "map": {"at": 197116, "to": "mm"},
6940    "name": "CP_COHER_STATUS",
6941    "type_ref": "CP_COHER_STATUS"
6942   },
6943   {
6944    "chips": ["gfx8"],
6945    "map": {"at": 197120, "to": "mm"},
6946    "name": "CP_DMA_ME_SRC_ADDR",
6947    "type_ref": "CP_DMA_ME_SRC_ADDR"
6948   },
6949   {
6950    "chips": ["gfx8"],
6951    "map": {"at": 197124, "to": "mm"},
6952    "name": "CP_DMA_ME_SRC_ADDR_HI",
6953    "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
6954   },
6955   {
6956    "chips": ["gfx8"],
6957    "map": {"at": 197128, "to": "mm"},
6958    "name": "CP_DMA_ME_DST_ADDR",
6959    "type_ref": "CP_DMA_ME_DST_ADDR"
6960   },
6961   {
6962    "chips": ["gfx8"],
6963    "map": {"at": 197132, "to": "mm"},
6964    "name": "CP_DMA_ME_DST_ADDR_HI",
6965    "type_ref": "CP_DMA_ME_DST_ADDR_HI"
6966   },
6967   {
6968    "chips": ["gfx8"],
6969    "map": {"at": 197136, "to": "mm"},
6970    "name": "CP_DMA_ME_COMMAND",
6971    "type_ref": "CP_DMA_ME_COMMAND"
6972   },
6973   {
6974    "chips": ["gfx8"],
6975    "map": {"at": 197140, "to": "mm"},
6976    "name": "CP_DMA_PFP_SRC_ADDR",
6977    "type_ref": "CP_DMA_ME_SRC_ADDR"
6978   },
6979   {
6980    "chips": ["gfx8"],
6981    "map": {"at": 197144, "to": "mm"},
6982    "name": "CP_DMA_PFP_SRC_ADDR_HI",
6983    "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
6984   },
6985   {
6986    "chips": ["gfx8"],
6987    "map": {"at": 197148, "to": "mm"},
6988    "name": "CP_DMA_PFP_DST_ADDR",
6989    "type_ref": "CP_DMA_ME_DST_ADDR"
6990   },
6991   {
6992    "chips": ["gfx8"],
6993    "map": {"at": 197152, "to": "mm"},
6994    "name": "CP_DMA_PFP_DST_ADDR_HI",
6995    "type_ref": "CP_DMA_ME_DST_ADDR_HI"
6996   },
6997   {
6998    "chips": ["gfx8"],
6999    "map": {"at": 197156, "to": "mm"},
7000    "name": "CP_DMA_PFP_COMMAND",
7001    "type_ref": "CP_DMA_ME_COMMAND"
7002   },
7003   {
7004    "chips": ["gfx8"],
7005    "map": {"at": 197160, "to": "mm"},
7006    "name": "CP_DMA_CNTL",
7007    "type_ref": "CP_DMA_CNTL"
7008   },
7009   {
7010    "chips": ["gfx8"],
7011    "map": {"at": 197164, "to": "mm"},
7012    "name": "CP_DMA_READ_TAGS",
7013    "type_ref": "CP_DMA_READ_TAGS"
7014   },
7015   {
7016    "chips": ["gfx8"],
7017    "map": {"at": 197168, "to": "mm"},
7018    "name": "CP_COHER_SIZE_HI",
7019    "type_ref": "CP_COHER_SIZE_HI"
7020   },
7021   {
7022    "chips": ["gfx8"],
7023    "map": {"at": 197172, "to": "mm"},
7024    "name": "CP_PFP_IB_CONTROL",
7025    "type_ref": "CP_PFP_IB_CONTROL"
7026   },
7027   {
7028    "chips": ["gfx8"],
7029    "map": {"at": 197176, "to": "mm"},
7030    "name": "CP_PFP_LOAD_CONTROL",
7031    "type_ref": "CP_PFP_LOAD_CONTROL"
7032   },
7033   {
7034    "chips": ["gfx8"],
7035    "map": {"at": 197180, "to": "mm"},
7036    "name": "CP_SCRATCH_INDEX",
7037    "type_ref": "CP_SCRATCH_INDEX"
7038   },
7039   {
7040    "chips": ["gfx8"],
7041    "map": {"at": 197184, "to": "mm"},
7042    "name": "CP_SCRATCH_DATA",
7043    "type_ref": "CP_CPC_SCRATCH_DATA"
7044   },
7045   {
7046    "chips": ["gfx8"],
7047    "map": {"at": 197188, "to": "mm"},
7048    "name": "CP_RB_OFFSET",
7049    "type_ref": "CP_RB_OFFSET"
7050   },
7051   {
7052    "chips": ["gfx8"],
7053    "map": {"at": 197192, "to": "mm"},
7054    "name": "CP_IB1_OFFSET",
7055    "type_ref": "CP_IB1_OFFSET"
7056   },
7057   {
7058    "chips": ["gfx8"],
7059    "map": {"at": 197196, "to": "mm"},
7060    "name": "CP_IB2_OFFSET",
7061    "type_ref": "CP_IB2_OFFSET"
7062   },
7063   {
7064    "chips": ["gfx8"],
7065    "map": {"at": 197200, "to": "mm"},
7066    "name": "CP_IB1_PREAMBLE_BEGIN",
7067    "type_ref": "CP_IB1_PREAMBLE_BEGIN"
7068   },
7069   {
7070    "chips": ["gfx8"],
7071    "map": {"at": 197204, "to": "mm"},
7072    "name": "CP_IB1_PREAMBLE_END",
7073    "type_ref": "CP_IB1_PREAMBLE_END"
7074   },
7075   {
7076    "chips": ["gfx8"],
7077    "map": {"at": 197208, "to": "mm"},
7078    "name": "CP_IB2_PREAMBLE_BEGIN",
7079    "type_ref": "CP_IB2_PREAMBLE_BEGIN"
7080   },
7081   {
7082    "chips": ["gfx8"],
7083    "map": {"at": 197212, "to": "mm"},
7084    "name": "CP_IB2_PREAMBLE_END",
7085    "type_ref": "CP_IB2_PREAMBLE_END"
7086   },
7087   {
7088    "chips": ["gfx8"],
7089    "map": {"at": 197216, "to": "mm"},
7090    "name": "CP_CE_IB1_OFFSET",
7091    "type_ref": "CP_IB1_OFFSET"
7092   },
7093   {
7094    "chips": ["gfx8"],
7095    "map": {"at": 197220, "to": "mm"},
7096    "name": "CP_CE_IB2_OFFSET",
7097    "type_ref": "CP_IB2_OFFSET"
7098   },
7099   {
7100    "chips": ["gfx8"],
7101    "map": {"at": 197224, "to": "mm"},
7102    "name": "CP_CE_COUNTER",
7103    "type_ref": "CP_CE_COUNTER"
7104   },
7105   {
7106    "chips": ["gfx8"],
7107    "map": {"at": 197228, "to": "mm"},
7108    "name": "CP_CE_RB_OFFSET",
7109    "type_ref": "CP_RB_OFFSET"
7110   },
7111   {
7112    "chips": ["gfx8"],
7113    "map": {"at": 197388, "to": "mm"},
7114    "name": "CP_CE_INIT_BASE_LO",
7115    "type_ref": "CP_CE_INIT_BASE_LO"
7116   },
7117   {
7118    "chips": ["gfx8"],
7119    "map": {"at": 197392, "to": "mm"},
7120    "name": "CP_CE_INIT_BASE_HI",
7121    "type_ref": "CP_CE_INIT_BASE_HI"
7122   },
7123   {
7124    "chips": ["gfx8"],
7125    "map": {"at": 197396, "to": "mm"},
7126    "name": "CP_CE_INIT_BUFSZ",
7127    "type_ref": "CP_CE_INIT_BUFSZ"
7128   },
7129   {
7130    "chips": ["gfx8"],
7131    "map": {"at": 197400, "to": "mm"},
7132    "name": "CP_CE_IB1_BASE_LO",
7133    "type_ref": "CP_CE_IB1_BASE_LO"
7134   },
7135   {
7136    "chips": ["gfx8"],
7137    "map": {"at": 197404, "to": "mm"},
7138    "name": "CP_CE_IB1_BASE_HI",
7139    "type_ref": "CP_CE_IB1_BASE_HI"
7140   },
7141   {
7142    "chips": ["gfx8"],
7143    "map": {"at": 197408, "to": "mm"},
7144    "name": "CP_CE_IB1_BUFSZ",
7145    "type_ref": "CP_CE_IB1_BUFSZ"
7146   },
7147   {
7148    "chips": ["gfx8"],
7149    "map": {"at": 197412, "to": "mm"},
7150    "name": "CP_CE_IB2_BASE_LO",
7151    "type_ref": "CP_CE_IB2_BASE_LO"
7152   },
7153   {
7154    "chips": ["gfx8"],
7155    "map": {"at": 197416, "to": "mm"},
7156    "name": "CP_CE_IB2_BASE_HI",
7157    "type_ref": "CP_CE_IB2_BASE_HI"
7158   },
7159   {
7160    "chips": ["gfx8"],
7161    "map": {"at": 197420, "to": "mm"},
7162    "name": "CP_CE_IB2_BUFSZ",
7163    "type_ref": "CP_CE_IB2_BUFSZ"
7164   },
7165   {
7166    "chips": ["gfx8"],
7167    "map": {"at": 197424, "to": "mm"},
7168    "name": "CP_IB1_BASE_LO",
7169    "type_ref": "CP_CE_IB1_BASE_LO"
7170   },
7171   {
7172    "chips": ["gfx8"],
7173    "map": {"at": 197428, "to": "mm"},
7174    "name": "CP_IB1_BASE_HI",
7175    "type_ref": "CP_CE_IB1_BASE_HI"
7176   },
7177   {
7178    "chips": ["gfx8"],
7179    "map": {"at": 197432, "to": "mm"},
7180    "name": "CP_IB1_BUFSZ",
7181    "type_ref": "CP_CE_IB1_BUFSZ"
7182   },
7183   {
7184    "chips": ["gfx8"],
7185    "map": {"at": 197436, "to": "mm"},
7186    "name": "CP_IB2_BASE_LO",
7187    "type_ref": "CP_CE_IB2_BASE_LO"
7188   },
7189   {
7190    "chips": ["gfx8"],
7191    "map": {"at": 197440, "to": "mm"},
7192    "name": "CP_IB2_BASE_HI",
7193    "type_ref": "CP_CE_IB2_BASE_HI"
7194   },
7195   {
7196    "chips": ["gfx8"],
7197    "map": {"at": 197444, "to": "mm"},
7198    "name": "CP_IB2_BUFSZ",
7199    "type_ref": "CP_CE_IB2_BUFSZ"
7200   },
7201   {
7202    "chips": ["gfx8"],
7203    "map": {"at": 197448, "to": "mm"},
7204    "name": "CP_ST_BASE_LO",
7205    "type_ref": "CP_ST_BASE_LO"
7206   },
7207   {
7208    "chips": ["gfx8"],
7209    "map": {"at": 197452, "to": "mm"},
7210    "name": "CP_ST_BASE_HI",
7211    "type_ref": "CP_ST_BASE_HI"
7212   },
7213   {
7214    "chips": ["gfx8"],
7215    "map": {"at": 197456, "to": "mm"},
7216    "name": "CP_ST_BUFSZ",
7217    "type_ref": "CP_ST_BUFSZ"
7218   },
7219   {
7220    "chips": ["gfx8"],
7221    "map": {"at": 197460, "to": "mm"},
7222    "name": "CP_EOP_DONE_EVENT_CNTL",
7223    "type_ref": "CP_EOP_DONE_EVENT_CNTL"
7224   },
7225   {
7226    "chips": ["gfx8"],
7227    "map": {"at": 197464, "to": "mm"},
7228    "name": "CP_EOP_DONE_DATA_CNTL",
7229    "type_ref": "CP_EOP_DONE_DATA_CNTL"
7230   },
7231   {
7232    "chips": ["gfx8"],
7233    "map": {"at": 197468, "to": "mm"},
7234    "name": "CP_EOP_DONE_CNTX_ID",
7235    "type_ref": "CP_EOP_DONE_CNTX_ID"
7236   },
7237   {
7238    "chips": ["gfx8"],
7239    "map": {"at": 197552, "to": "mm"},
7240    "name": "CP_PFP_COMPLETION_STATUS",
7241    "type_ref": "CP_PFP_COMPLETION_STATUS"
7242   },
7243   {
7244    "chips": ["gfx8"],
7245    "map": {"at": 197556, "to": "mm"},
7246    "name": "CP_CE_COMPLETION_STATUS",
7247    "type_ref": "CP_PFP_COMPLETION_STATUS"
7248   },
7249   {
7250    "chips": ["gfx8"],
7251    "map": {"at": 197560, "to": "mm"},
7252    "name": "CP_PRED_NOT_VISIBLE",
7253    "type_ref": "CP_PRED_NOT_VISIBLE"
7254   },
7255   {
7256    "chips": ["gfx8"],
7257    "map": {"at": 197568, "to": "mm"},
7258    "name": "CP_PFP_METADATA_BASE_ADDR",
7259    "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7260   },
7261   {
7262    "chips": ["gfx8"],
7263    "map": {"at": 197572, "to": "mm"},
7264    "name": "CP_PFP_METADATA_BASE_ADDR_HI",
7265    "type_ref": "CP_EOP_DONE_ADDR_HI"
7266   },
7267   {
7268    "chips": ["gfx8"],
7269    "map": {"at": 197576, "to": "mm"},
7270    "name": "CP_CE_METADATA_BASE_ADDR",
7271    "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7272   },
7273   {
7274    "chips": ["gfx8"],
7275    "map": {"at": 197580, "to": "mm"},
7276    "name": "CP_CE_METADATA_BASE_ADDR_HI",
7277    "type_ref": "CP_EOP_DONE_ADDR_HI"
7278   },
7279   {
7280    "chips": ["gfx8"],
7281    "map": {"at": 197584, "to": "mm"},
7282    "name": "CP_DRAW_INDX_INDR_ADDR",
7283    "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7284   },
7285   {
7286    "chips": ["gfx8"],
7287    "map": {"at": 197588, "to": "mm"},
7288    "name": "CP_DRAW_INDX_INDR_ADDR_HI",
7289    "type_ref": "CP_EOP_DONE_ADDR_HI"
7290   },
7291   {
7292    "chips": ["gfx8"],
7293    "map": {"at": 197592, "to": "mm"},
7294    "name": "CP_DISPATCH_INDR_ADDR",
7295    "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7296   },
7297   {
7298    "chips": ["gfx8"],
7299    "map": {"at": 197596, "to": "mm"},
7300    "name": "CP_DISPATCH_INDR_ADDR_HI",
7301    "type_ref": "CP_EOP_DONE_ADDR_HI"
7302   },
7303   {
7304    "chips": ["gfx8"],
7305    "map": {"at": 197600, "to": "mm"},
7306    "name": "CP_INDEX_BASE_ADDR",
7307    "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7308   },
7309   {
7310    "chips": ["gfx8"],
7311    "map": {"at": 197604, "to": "mm"},
7312    "name": "CP_INDEX_BASE_ADDR_HI",
7313    "type_ref": "CP_EOP_DONE_ADDR_HI"
7314   },
7315   {
7316    "chips": ["gfx8"],
7317    "map": {"at": 197608, "to": "mm"},
7318    "name": "CP_INDEX_TYPE",
7319    "type_ref": "CP_INDEX_TYPE"
7320   },
7321   {
7322    "chips": ["gfx8"],
7323    "map": {"at": 197612, "to": "mm"},
7324    "name": "CP_GDS_BKUP_ADDR",
7325    "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7326   },
7327   {
7328    "chips": ["gfx8"],
7329    "map": {"at": 197616, "to": "mm"},
7330    "name": "CP_GDS_BKUP_ADDR_HI",
7331    "type_ref": "CP_EOP_DONE_ADDR_HI"
7332   },
7333   {
7334    "chips": ["gfx8"],
7335    "map": {"at": 197620, "to": "mm"},
7336    "name": "CP_SAMPLE_STATUS",
7337    "type_ref": "CP_SAMPLE_STATUS"
7338   },
7339   {
7340    "chips": ["gfx8"],
7341    "map": {"at": 198656, "to": "mm"},
7342    "name": "GRBM_GFX_INDEX",
7343    "type_ref": "GRBM_GFX_INDEX"
7344   },
7345   {
7346    "chips": ["gfx8"],
7347    "map": {"at": 198912, "to": "mm"},
7348    "name": "VGT_ESGS_RING_SIZE",
7349    "type_ref": "VGT_ESGS_RING_SIZE"
7350   },
7351   {
7352    "chips": ["gfx8"],
7353    "map": {"at": 198916, "to": "mm"},
7354    "name": "VGT_GSVS_RING_SIZE",
7355    "type_ref": "VGT_ESGS_RING_SIZE"
7356   },
7357   {
7358    "chips": ["gfx8"],
7359    "map": {"at": 198920, "to": "mm"},
7360    "name": "VGT_PRIMITIVE_TYPE",
7361    "type_ref": "VGT_PRIMITIVE_TYPE"
7362   },
7363   {
7364    "chips": ["gfx8"],
7365    "map": {"at": 198924, "to": "mm"},
7366    "name": "VGT_INDEX_TYPE",
7367    "type_ref": "CP_INDEX_TYPE"
7368   },
7369   {
7370    "chips": ["gfx8"],
7371    "map": {"at": 198928, "to": "mm"},
7372    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0",
7373    "type_ref": "COMPUTE_DIM_X"
7374   },
7375   {
7376    "chips": ["gfx8"],
7377    "map": {"at": 198932, "to": "mm"},
7378    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1",
7379    "type_ref": "COMPUTE_DIM_X"
7380   },
7381   {
7382    "chips": ["gfx8"],
7383    "map": {"at": 198936, "to": "mm"},
7384    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2",
7385    "type_ref": "COMPUTE_DIM_X"
7386   },
7387   {
7388    "chips": ["gfx8"],
7389    "map": {"at": 198940, "to": "mm"},
7390    "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3",
7391    "type_ref": "COMPUTE_DIM_X"
7392   },
7393   {
7394    "chips": ["gfx8"],
7395    "map": {"at": 198960, "to": "mm"},
7396    "name": "VGT_NUM_INDICES",
7397    "type_ref": "VGT_DMA_SIZE"
7398   },
7399   {
7400    "chips": ["gfx8"],
7401    "map": {"at": 198964, "to": "mm"},
7402    "name": "VGT_NUM_INSTANCES",
7403    "type_ref": "VGT_DMA_NUM_INSTANCES"
7404   },
7405   {
7406    "chips": ["gfx8"],
7407    "map": {"at": 198968, "to": "mm"},
7408    "name": "VGT_TF_RING_SIZE",
7409    "type_ref": "VGT_TF_RING_SIZE"
7410   },
7411   {
7412    "chips": ["gfx8"],
7413    "map": {"at": 198972, "to": "mm"},
7414    "name": "VGT_HS_OFFCHIP_PARAM",
7415    "type_ref": "VGT_HS_OFFCHIP_PARAM"
7416   },
7417   {
7418    "chips": ["gfx8"],
7419    "map": {"at": 198976, "to": "mm"},
7420    "name": "VGT_TF_MEMORY_BASE",
7421    "type_ref": "VGT_TF_MEMORY_BASE"
7422   },
7423   {
7424    "chips": ["gfx8"],
7425    "map": {"at": 199168, "to": "mm"},
7426    "name": "PA_SU_LINE_STIPPLE_VALUE",
7427    "type_ref": "PA_SU_LINE_STIPPLE_VALUE"
7428   },
7429   {
7430    "chips": ["gfx8"],
7431    "map": {"at": 199172, "to": "mm"},
7432    "name": "PA_SC_LINE_STIPPLE_STATE",
7433    "type_ref": "PA_SC_LINE_STIPPLE_STATE"
7434   },
7435   {
7436    "chips": ["gfx8"],
7437    "map": {"at": 199184, "to": "mm"},
7438    "name": "PA_SC_SCREEN_EXTENT_MIN_0",
7439    "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
7440   },
7441   {
7442    "chips": ["gfx8"],
7443    "map": {"at": 199188, "to": "mm"},
7444    "name": "PA_SC_SCREEN_EXTENT_MAX_0",
7445    "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
7446   },
7447   {
7448    "chips": ["gfx8"],
7449    "map": {"at": 199192, "to": "mm"},
7450    "name": "PA_SC_SCREEN_EXTENT_MIN_1",
7451    "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
7452   },
7453   {
7454    "chips": ["gfx8"],
7455    "map": {"at": 199212, "to": "mm"},
7456    "name": "PA_SC_SCREEN_EXTENT_MAX_1",
7457    "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
7458   },
7459   {
7460    "chips": ["gfx8"],
7461    "map": {"at": 199296, "to": "mm"},
7462    "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",
7463    "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
7464   },
7465   {
7466    "chips": ["gfx8"],
7467    "map": {"at": 199300, "to": "mm"},
7468    "name": "PA_SC_P3D_TRAP_SCREEN_H",
7469    "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
7470   },
7471   {
7472    "chips": ["gfx8"],
7473    "map": {"at": 199304, "to": "mm"},
7474    "name": "PA_SC_P3D_TRAP_SCREEN_V",
7475    "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
7476   },
7477   {
7478    "chips": ["gfx8"],
7479    "map": {"at": 199308, "to": "mm"},
7480    "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",
7481    "type_ref": "CP_DRAW_OBJECT_COUNTER"
7482   },
7483   {
7484    "chips": ["gfx8"],
7485    "map": {"at": 199312, "to": "mm"},
7486    "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",
7487    "type_ref": "CP_DRAW_OBJECT_COUNTER"
7488   },
7489   {
7490    "chips": ["gfx8"],
7491    "map": {"at": 199328, "to": "mm"},
7492    "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",
7493    "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
7494   },
7495   {
7496    "chips": ["gfx8"],
7497    "map": {"at": 199332, "to": "mm"},
7498    "name": "PA_SC_HP3D_TRAP_SCREEN_H",
7499    "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
7500   },
7501   {
7502    "chips": ["gfx8"],
7503    "map": {"at": 199336, "to": "mm"},
7504    "name": "PA_SC_HP3D_TRAP_SCREEN_V",
7505    "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
7506   },
7507   {
7508    "chips": ["gfx8"],
7509    "map": {"at": 199340, "to": "mm"},
7510    "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",
7511    "type_ref": "CP_DRAW_OBJECT_COUNTER"
7512   },
7513   {
7514    "chips": ["gfx8"],
7515    "map": {"at": 199344, "to": "mm"},
7516    "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",
7517    "type_ref": "CP_DRAW_OBJECT_COUNTER"
7518   },
7519   {
7520    "chips": ["gfx8"],
7521    "map": {"at": 199360, "to": "mm"},
7522    "name": "PA_SC_TRAP_SCREEN_HV_EN",
7523    "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
7524   },
7525   {
7526    "chips": ["gfx8"],
7527    "map": {"at": 199364, "to": "mm"},
7528    "name": "PA_SC_TRAP_SCREEN_H",
7529    "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
7530   },
7531   {
7532    "chips": ["gfx8"],
7533    "map": {"at": 199368, "to": "mm"},
7534    "name": "PA_SC_TRAP_SCREEN_V",
7535    "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
7536   },
7537   {
7538    "chips": ["gfx8"],
7539    "map": {"at": 199372, "to": "mm"},
7540    "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",
7541    "type_ref": "CP_DRAW_OBJECT_COUNTER"
7542   },
7543   {
7544    "chips": ["gfx8"],
7545    "map": {"at": 199376, "to": "mm"},
7546    "name": "PA_SC_TRAP_SCREEN_COUNT",
7547    "type_ref": "CP_DRAW_OBJECT_COUNTER"
7548   },
7549   {
7550    "chips": ["gfx8"],
7551    "map": {"at": 199872, "to": "mm"},
7552    "name": "SQ_THREAD_TRACE_BASE",
7553    "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_LO"
7554   },
7555   {
7556    "chips": ["gfx8"],
7557    "map": {"at": 199876, "to": "mm"},
7558    "name": "SQ_THREAD_TRACE_SIZE",
7559    "type_ref": "SQ_THREAD_TRACE_SIZE"
7560   },
7561   {
7562    "chips": ["gfx8"],
7563    "map": {"at": 199880, "to": "mm"},
7564    "name": "SQ_THREAD_TRACE_MASK",
7565    "type_ref": "SQ_THREAD_TRACE_MASK"
7566   },
7567   {
7568    "chips": ["gfx8"],
7569    "map": {"at": 199884, "to": "mm"},
7570    "name": "SQ_THREAD_TRACE_TOKEN_MASK",
7571    "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK"
7572   },
7573   {
7574    "chips": ["gfx8"],
7575    "map": {"at": 199888, "to": "mm"},
7576    "name": "SQ_THREAD_TRACE_PERF_MASK",
7577    "type_ref": "SQ_PERFCOUNTER_MASK"
7578   },
7579   {
7580    "chips": ["gfx8"],
7581    "map": {"at": 199892, "to": "mm"},
7582    "name": "SQ_THREAD_TRACE_CTRL",
7583    "type_ref": "SQ_THREAD_TRACE_CTRL"
7584   },
7585   {
7586    "chips": ["gfx8"],
7587    "map": {"at": 199896, "to": "mm"},
7588    "name": "SQ_THREAD_TRACE_MODE",
7589    "type_ref": "SQ_THREAD_TRACE_MODE"
7590   },
7591   {
7592    "chips": ["gfx8"],
7593    "map": {"at": 199900, "to": "mm"},
7594    "name": "SQ_THREAD_TRACE_BASE2",
7595    "type_ref": "SQ_THREAD_TRACE_BASE2"
7596   },
7597   {
7598    "chips": ["gfx8"],
7599    "map": {"at": 199904, "to": "mm"},
7600    "name": "SQ_THREAD_TRACE_TOKEN_MASK2",
7601    "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK2"
7602   },
7603   {
7604    "chips": ["gfx8"],
7605    "map": {"at": 199908, "to": "mm"},
7606    "name": "SQ_THREAD_TRACE_WPTR",
7607    "type_ref": "SQ_THREAD_TRACE_WPTR"
7608   },
7609   {
7610    "chips": ["gfx8"],
7611    "map": {"at": 199912, "to": "mm"},
7612    "name": "SQ_THREAD_TRACE_STATUS",
7613    "type_ref": "SQ_THREAD_TRACE_STATUS"
7614   },
7615   {
7616    "chips": ["gfx8"],
7617    "map": {"at": 199916, "to": "mm"},
7618    "name": "SQ_THREAD_TRACE_HIWATER",
7619    "type_ref": "SQ_THREAD_TRACE_HIWATER"
7620   },
7621   {
7622    "chips": ["gfx8"],
7623    "map": {"at": 199936, "to": "mm"},
7624    "name": "SQ_THREAD_TRACE_USERDATA_0",
7625    "type_ref": "CP_APPEND_DATA"
7626   },
7627   {
7628    "chips": ["gfx8"],
7629    "map": {"at": 199940, "to": "mm"},
7630    "name": "SQ_THREAD_TRACE_USERDATA_1",
7631    "type_ref": "CP_APPEND_DATA"
7632   },
7633   {
7634    "chips": ["gfx8"],
7635    "map": {"at": 199944, "to": "mm"},
7636    "name": "SQ_THREAD_TRACE_USERDATA_2",
7637    "type_ref": "CP_APPEND_DATA"
7638   },
7639   {
7640    "chips": ["gfx8"],
7641    "map": {"at": 199948, "to": "mm"},
7642    "name": "SQ_THREAD_TRACE_USERDATA_3",
7643    "type_ref": "CP_APPEND_DATA"
7644   },
7645   {
7646    "chips": ["gfx8"],
7647    "map": {"at": 199968, "to": "mm"},
7648    "name": "SQC_CACHES",
7649    "type_ref": "SQC_CACHES"
7650   },
7651   {
7652    "chips": ["gfx8"],
7653    "map": {"at": 199972, "to": "mm"},
7654    "name": "SQC_WRITEBACK",
7655    "type_ref": "SQC_WRITEBACK"
7656   },
7657   {
7658    "chips": ["gfx8"],
7659    "map": {"at": 200192, "to": "mm"},
7660    "name": "TA_CS_BC_BASE_ADDR",
7661    "type_ref": "TA_BC_BASE_ADDR"
7662   },
7663   {
7664    "chips": ["gfx8"],
7665    "map": {"at": 200196, "to": "mm"},
7666    "name": "TA_CS_BC_BASE_ADDR_HI",
7667    "type_ref": "TA_BC_BASE_ADDR_HI"
7668   },
7669   {
7670    "chips": ["gfx8"],
7671    "map": {"at": 200448, "to": "mm"},
7672    "name": "DB_OCCLUSION_COUNT0_LOW",
7673    "type_ref": "DB_ZPASS_COUNT_LOW"
7674   },
7675   {
7676    "chips": ["gfx8"],
7677    "map": {"at": 200452, "to": "mm"},
7678    "name": "DB_OCCLUSION_COUNT0_HI",
7679    "type_ref": "DB_ZPASS_COUNT_HI"
7680   },
7681   {
7682    "chips": ["gfx8"],
7683    "map": {"at": 200456, "to": "mm"},
7684    "name": "DB_OCCLUSION_COUNT1_LOW",
7685    "type_ref": "DB_ZPASS_COUNT_LOW"
7686   },
7687   {
7688    "chips": ["gfx8"],
7689    "map": {"at": 200460, "to": "mm"},
7690    "name": "DB_OCCLUSION_COUNT1_HI",
7691    "type_ref": "DB_ZPASS_COUNT_HI"
7692   },
7693   {
7694    "chips": ["gfx8"],
7695    "map": {"at": 200464, "to": "mm"},
7696    "name": "DB_OCCLUSION_COUNT2_LOW",
7697    "type_ref": "DB_ZPASS_COUNT_LOW"
7698   },
7699   {
7700    "chips": ["gfx8"],
7701    "map": {"at": 200468, "to": "mm"},
7702    "name": "DB_OCCLUSION_COUNT2_HI",
7703    "type_ref": "DB_ZPASS_COUNT_HI"
7704   },
7705   {
7706    "chips": ["gfx8"],
7707    "map": {"at": 200472, "to": "mm"},
7708    "name": "DB_OCCLUSION_COUNT3_LOW",
7709    "type_ref": "DB_ZPASS_COUNT_LOW"
7710   },
7711   {
7712    "chips": ["gfx8"],
7713    "map": {"at": 200476, "to": "mm"},
7714    "name": "DB_OCCLUSION_COUNT3_HI",
7715    "type_ref": "DB_ZPASS_COUNT_HI"
7716   },
7717   {
7718    "chips": ["gfx8"],
7719    "map": {"at": 200696, "to": "mm"},
7720    "name": "DB_ZPASS_COUNT_LOW",
7721    "type_ref": "DB_ZPASS_COUNT_LOW"
7722   },
7723   {
7724    "chips": ["gfx8"],
7725    "map": {"at": 200700, "to": "mm"},
7726    "name": "DB_ZPASS_COUNT_HI",
7727    "type_ref": "DB_ZPASS_COUNT_HI"
7728   },
7729   {
7730    "chips": ["gfx8"],
7731    "map": {"at": 200704, "to": "mm"},
7732    "name": "GDS_RD_ADDR",
7733    "type_ref": "GDS_RD_ADDR"
7734   },
7735   {
7736    "chips": ["gfx8"],
7737    "map": {"at": 200708, "to": "mm"},
7738    "name": "GDS_RD_DATA",
7739    "type_ref": "GDS_RD_DATA"
7740   },
7741   {
7742    "chips": ["gfx8"],
7743    "map": {"at": 200712, "to": "mm"},
7744    "name": "GDS_RD_BURST_ADDR",
7745    "type_ref": "GDS_RD_BURST_ADDR"
7746   },
7747   {
7748    "chips": ["gfx8"],
7749    "map": {"at": 200716, "to": "mm"},
7750    "name": "GDS_RD_BURST_COUNT",
7751    "type_ref": "GDS_RD_BURST_COUNT"
7752   },
7753   {
7754    "chips": ["gfx8"],
7755    "map": {"at": 200720, "to": "mm"},
7756    "name": "GDS_RD_BURST_DATA",
7757    "type_ref": "GDS_RD_BURST_DATA"
7758   },
7759   {
7760    "chips": ["gfx8"],
7761    "map": {"at": 200724, "to": "mm"},
7762    "name": "GDS_WR_ADDR",
7763    "type_ref": "GDS_WR_ADDR"
7764   },
7765   {
7766    "chips": ["gfx8"],
7767    "map": {"at": 200728, "to": "mm"},
7768    "name": "GDS_WR_DATA",
7769    "type_ref": "GDS_WR_DATA"
7770   },
7771   {
7772    "chips": ["gfx8"],
7773    "map": {"at": 200732, "to": "mm"},
7774    "name": "GDS_WR_BURST_ADDR",
7775    "type_ref": "GDS_WR_ADDR"
7776   },
7777   {
7778    "chips": ["gfx8"],
7779    "map": {"at": 200736, "to": "mm"},
7780    "name": "GDS_WR_BURST_DATA",
7781    "type_ref": "GDS_WR_DATA"
7782   },
7783   {
7784    "chips": ["gfx8"],
7785    "map": {"at": 200740, "to": "mm"},
7786    "name": "GDS_WRITE_COMPLETE",
7787    "type_ref": "GDS_WRITE_COMPLETE"
7788   },
7789   {
7790    "chips": ["gfx8"],
7791    "map": {"at": 200744, "to": "mm"},
7792    "name": "GDS_ATOM_CNTL",
7793    "type_ref": "GDS_ATOM_CNTL"
7794   },
7795   {
7796    "chips": ["gfx8"],
7797    "map": {"at": 200748, "to": "mm"},
7798    "name": "GDS_ATOM_COMPLETE",
7799    "type_ref": "GDS_ATOM_COMPLETE"
7800   },
7801   {
7802    "chips": ["gfx8"],
7803    "map": {"at": 200752, "to": "mm"},
7804    "name": "GDS_ATOM_BASE",
7805    "type_ref": "GDS_ATOM_BASE"
7806   },
7807   {
7808    "chips": ["gfx8"],
7809    "map": {"at": 200756, "to": "mm"},
7810    "name": "GDS_ATOM_SIZE",
7811    "type_ref": "GDS_ATOM_SIZE"
7812   },
7813   {
7814    "chips": ["gfx8"],
7815    "map": {"at": 200760, "to": "mm"},
7816    "name": "GDS_ATOM_OFFSET0",
7817    "type_ref": "GDS_ATOM_OFFSET0"
7818   },
7819   {
7820    "chips": ["gfx8"],
7821    "map": {"at": 200764, "to": "mm"},
7822    "name": "GDS_ATOM_OFFSET1",
7823    "type_ref": "GDS_ATOM_OFFSET1"
7824   },
7825   {
7826    "chips": ["gfx8"],
7827    "map": {"at": 200768, "to": "mm"},
7828    "name": "GDS_ATOM_DST",
7829    "type_ref": "GDS_ATOM_DST"
7830   },
7831   {
7832    "chips": ["gfx8"],
7833    "map": {"at": 200772, "to": "mm"},
7834    "name": "GDS_ATOM_OP",
7835    "type_ref": "GDS_ATOM_OP"
7836   },
7837   {
7838    "chips": ["gfx8"],
7839    "map": {"at": 200776, "to": "mm"},
7840    "name": "GDS_ATOM_SRC0",
7841    "type_ref": "CP_APPEND_DATA"
7842   },
7843   {
7844    "chips": ["gfx8"],
7845    "map": {"at": 200780, "to": "mm"},
7846    "name": "GDS_ATOM_SRC0_U",
7847    "type_ref": "CP_APPEND_DATA"
7848   },
7849   {
7850    "chips": ["gfx8"],
7851    "map": {"at": 200784, "to": "mm"},
7852    "name": "GDS_ATOM_SRC1",
7853    "type_ref": "CP_APPEND_DATA"
7854   },
7855   {
7856    "chips": ["gfx8"],
7857    "map": {"at": 200788, "to": "mm"},
7858    "name": "GDS_ATOM_SRC1_U",
7859    "type_ref": "CP_APPEND_DATA"
7860   },
7861   {
7862    "chips": ["gfx8"],
7863    "map": {"at": 200792, "to": "mm"},
7864    "name": "GDS_ATOM_READ0",
7865    "type_ref": "CP_APPEND_DATA"
7866   },
7867   {
7868    "chips": ["gfx8"],
7869    "map": {"at": 200796, "to": "mm"},
7870    "name": "GDS_ATOM_READ0_U",
7871    "type_ref": "CP_APPEND_DATA"
7872   },
7873   {
7874    "chips": ["gfx8"],
7875    "map": {"at": 200800, "to": "mm"},
7876    "name": "GDS_ATOM_READ1",
7877    "type_ref": "CP_APPEND_DATA"
7878   },
7879   {
7880    "chips": ["gfx8"],
7881    "map": {"at": 200804, "to": "mm"},
7882    "name": "GDS_ATOM_READ1_U",
7883    "type_ref": "CP_APPEND_DATA"
7884   },
7885   {
7886    "chips": ["gfx8"],
7887    "map": {"at": 200808, "to": "mm"},
7888    "name": "GDS_GWS_RESOURCE_CNTL",
7889    "type_ref": "GDS_GWS_RESOURCE_CNTL"
7890   },
7891   {
7892    "chips": ["gfx8"],
7893    "map": {"at": 200812, "to": "mm"},
7894    "name": "GDS_GWS_RESOURCE",
7895    "type_ref": "GDS_GWS_RESOURCE"
7896   },
7897   {
7898    "chips": ["gfx8"],
7899    "map": {"at": 200816, "to": "mm"},
7900    "name": "GDS_GWS_RESOURCE_CNT",
7901    "type_ref": "GDS_GWS_RESOURCE_CNT"
7902   },
7903   {
7904    "chips": ["gfx8"],
7905    "map": {"at": 200820, "to": "mm"},
7906    "name": "GDS_OA_CNTL",
7907    "type_ref": "GDS_OA_CNTL"
7908   },
7909   {
7910    "chips": ["gfx8"],
7911    "map": {"at": 200824, "to": "mm"},
7912    "name": "GDS_OA_COUNTER",
7913    "type_ref": "GDS_OA_COUNTER"
7914   },
7915   {
7916    "chips": ["gfx8"],
7917    "map": {"at": 200828, "to": "mm"},
7918    "name": "GDS_OA_ADDRESS",
7919    "type_ref": "GDS_OA_ADDRESS"
7920   },
7921   {
7922    "chips": ["gfx8"],
7923    "map": {"at": 200832, "to": "mm"},
7924    "name": "GDS_OA_INCDEC",
7925    "type_ref": "GDS_OA_INCDEC"
7926   },
7927   {
7928    "chips": ["gfx8"],
7929    "map": {"at": 200836, "to": "mm"},
7930    "name": "GDS_OA_RING_SIZE",
7931    "type_ref": "GDS_OA_RING_SIZE"
7932   },
7933   {
7934    "chips": ["gfx8"],
7935    "map": {"at": 212992, "to": "mm"},
7936    "name": "CPG_PERFCOUNTER1_LO",
7937    "type_ref": "CB_PERFCOUNTER0_LO"
7938   },
7939   {
7940    "chips": ["gfx8"],
7941    "map": {"at": 212996, "to": "mm"},
7942    "name": "CPG_PERFCOUNTER1_HI",
7943    "type_ref": "CB_PERFCOUNTER0_HI"
7944   },
7945   {
7946    "chips": ["gfx8"],
7947    "map": {"at": 213000, "to": "mm"},
7948    "name": "CPG_PERFCOUNTER0_LO",
7949    "type_ref": "CB_PERFCOUNTER0_LO"
7950   },
7951   {
7952    "chips": ["gfx8"],
7953    "map": {"at": 213004, "to": "mm"},
7954    "name": "CPG_PERFCOUNTER0_HI",
7955    "type_ref": "CB_PERFCOUNTER0_HI"
7956   },
7957   {
7958    "chips": ["gfx8"],
7959    "map": {"at": 213008, "to": "mm"},
7960    "name": "CPC_PERFCOUNTER1_LO",
7961    "type_ref": "CB_PERFCOUNTER0_LO"
7962   },
7963   {
7964    "chips": ["gfx8"],
7965    "map": {"at": 213012, "to": "mm"},
7966    "name": "CPC_PERFCOUNTER1_HI",
7967    "type_ref": "CB_PERFCOUNTER0_HI"
7968   },
7969   {
7970    "chips": ["gfx8"],
7971    "map": {"at": 213016, "to": "mm"},
7972    "name": "CPC_PERFCOUNTER0_LO",
7973    "type_ref": "CB_PERFCOUNTER0_LO"
7974   },
7975   {
7976    "chips": ["gfx8"],
7977    "map": {"at": 213020, "to": "mm"},
7978    "name": "CPC_PERFCOUNTER0_HI",
7979    "type_ref": "CB_PERFCOUNTER0_HI"
7980   },
7981   {
7982    "chips": ["gfx8"],
7983    "map": {"at": 213024, "to": "mm"},
7984    "name": "CPF_PERFCOUNTER1_LO",
7985    "type_ref": "CB_PERFCOUNTER0_LO"
7986   },
7987   {
7988    "chips": ["gfx8"],
7989    "map": {"at": 213028, "to": "mm"},
7990    "name": "CPF_PERFCOUNTER1_HI",
7991    "type_ref": "CB_PERFCOUNTER0_HI"
7992   },
7993   {
7994    "chips": ["gfx8"],
7995    "map": {"at": 213032, "to": "mm"},
7996    "name": "CPF_PERFCOUNTER0_LO",
7997    "type_ref": "CB_PERFCOUNTER0_LO"
7998   },
7999   {
8000    "chips": ["gfx8"],
8001    "map": {"at": 213036, "to": "mm"},
8002    "name": "CPF_PERFCOUNTER0_HI",
8003    "type_ref": "CB_PERFCOUNTER0_HI"
8004   },
8005   {
8006    "chips": ["gfx8"],
8007    "map": {"at": 213248, "to": "mm"},
8008    "name": "GRBM_PERFCOUNTER0_LO",
8009    "type_ref": "CB_PERFCOUNTER0_LO"
8010   },
8011   {
8012    "chips": ["gfx8"],
8013    "map": {"at": 213252, "to": "mm"},
8014    "name": "GRBM_PERFCOUNTER0_HI",
8015    "type_ref": "CB_PERFCOUNTER0_HI"
8016   },
8017   {
8018    "chips": ["gfx8"],
8019    "map": {"at": 213260, "to": "mm"},
8020    "name": "GRBM_PERFCOUNTER1_LO",
8021    "type_ref": "CB_PERFCOUNTER0_LO"
8022   },
8023   {
8024    "chips": ["gfx8"],
8025    "map": {"at": 213264, "to": "mm"},
8026    "name": "GRBM_PERFCOUNTER1_HI",
8027    "type_ref": "CB_PERFCOUNTER0_HI"
8028   },
8029   {
8030    "chips": ["gfx8"],
8031    "map": {"at": 213268, "to": "mm"},
8032    "name": "GRBM_SE0_PERFCOUNTER_LO",
8033    "type_ref": "CB_PERFCOUNTER0_LO"
8034   },
8035   {
8036    "chips": ["gfx8"],
8037    "map": {"at": 213272, "to": "mm"},
8038    "name": "GRBM_SE0_PERFCOUNTER_HI",
8039    "type_ref": "CB_PERFCOUNTER0_HI"
8040   },
8041   {
8042    "chips": ["gfx8"],
8043    "map": {"at": 213276, "to": "mm"},
8044    "name": "GRBM_SE1_PERFCOUNTER_LO",
8045    "type_ref": "CB_PERFCOUNTER0_LO"
8046   },
8047   {
8048    "chips": ["gfx8"],
8049    "map": {"at": 213280, "to": "mm"},
8050    "name": "GRBM_SE1_PERFCOUNTER_HI",
8051    "type_ref": "CB_PERFCOUNTER0_HI"
8052   },
8053   {
8054    "chips": ["gfx8"],
8055    "map": {"at": 213284, "to": "mm"},
8056    "name": "GRBM_SE2_PERFCOUNTER_LO",
8057    "type_ref": "CB_PERFCOUNTER0_LO"
8058   },
8059   {
8060    "chips": ["gfx8"],
8061    "map": {"at": 213288, "to": "mm"},
8062    "name": "GRBM_SE2_PERFCOUNTER_HI",
8063    "type_ref": "CB_PERFCOUNTER0_HI"
8064   },
8065   {
8066    "chips": ["gfx8"],
8067    "map": {"at": 213292, "to": "mm"},
8068    "name": "GRBM_SE3_PERFCOUNTER_LO",
8069    "type_ref": "CB_PERFCOUNTER0_LO"
8070   },
8071   {
8072    "chips": ["gfx8"],
8073    "map": {"at": 213296, "to": "mm"},
8074    "name": "GRBM_SE3_PERFCOUNTER_HI",
8075    "type_ref": "CB_PERFCOUNTER0_HI"
8076   },
8077   {
8078    "chips": ["gfx8"],
8079    "map": {"at": 213504, "to": "mm"},
8080    "name": "WD_PERFCOUNTER0_LO",
8081    "type_ref": "CB_PERFCOUNTER0_LO"
8082   },
8083   {
8084    "chips": ["gfx8"],
8085    "map": {"at": 213508, "to": "mm"},
8086    "name": "WD_PERFCOUNTER0_HI",
8087    "type_ref": "CB_PERFCOUNTER0_HI"
8088   },
8089   {
8090    "chips": ["gfx8"],
8091    "map": {"at": 213512, "to": "mm"},
8092    "name": "WD_PERFCOUNTER1_LO",
8093    "type_ref": "CB_PERFCOUNTER0_LO"
8094   },
8095   {
8096    "chips": ["gfx8"],
8097    "map": {"at": 213516, "to": "mm"},
8098    "name": "WD_PERFCOUNTER1_HI",
8099    "type_ref": "CB_PERFCOUNTER0_HI"
8100   },
8101   {
8102    "chips": ["gfx8"],
8103    "map": {"at": 213520, "to": "mm"},
8104    "name": "WD_PERFCOUNTER2_LO",
8105    "type_ref": "CB_PERFCOUNTER0_LO"
8106   },
8107   {
8108    "chips": ["gfx8"],
8109    "map": {"at": 213524, "to": "mm"},
8110    "name": "WD_PERFCOUNTER2_HI",
8111    "type_ref": "CB_PERFCOUNTER0_HI"
8112   },
8113   {
8114    "chips": ["gfx8"],
8115    "map": {"at": 213528, "to": "mm"},
8116    "name": "WD_PERFCOUNTER3_LO",
8117    "type_ref": "CB_PERFCOUNTER0_LO"
8118   },
8119   {
8120    "chips": ["gfx8"],
8121    "map": {"at": 213532, "to": "mm"},
8122    "name": "WD_PERFCOUNTER3_HI",
8123    "type_ref": "CB_PERFCOUNTER0_HI"
8124   },
8125   {
8126    "chips": ["gfx8"],
8127    "map": {"at": 213536, "to": "mm"},
8128    "name": "IA_PERFCOUNTER0_LO",
8129    "type_ref": "CB_PERFCOUNTER0_LO"
8130   },
8131   {
8132    "chips": ["gfx8"],
8133    "map": {"at": 213540, "to": "mm"},
8134    "name": "IA_PERFCOUNTER0_HI",
8135    "type_ref": "CB_PERFCOUNTER0_HI"
8136   },
8137   {
8138    "chips": ["gfx8"],
8139    "map": {"at": 213544, "to": "mm"},
8140    "name": "IA_PERFCOUNTER1_LO",
8141    "type_ref": "CB_PERFCOUNTER0_LO"
8142   },
8143   {
8144    "chips": ["gfx8"],
8145    "map": {"at": 213548, "to": "mm"},
8146    "name": "IA_PERFCOUNTER1_HI",
8147    "type_ref": "CB_PERFCOUNTER0_HI"
8148   },
8149   {
8150    "chips": ["gfx8"],
8151    "map": {"at": 213552, "to": "mm"},
8152    "name": "IA_PERFCOUNTER2_LO",
8153    "type_ref": "CB_PERFCOUNTER0_LO"
8154   },
8155   {
8156    "chips": ["gfx8"],
8157    "map": {"at": 213556, "to": "mm"},
8158    "name": "IA_PERFCOUNTER2_HI",
8159    "type_ref": "CB_PERFCOUNTER0_HI"
8160   },
8161   {
8162    "chips": ["gfx8"],
8163    "map": {"at": 213560, "to": "mm"},
8164    "name": "IA_PERFCOUNTER3_LO",
8165    "type_ref": "CB_PERFCOUNTER0_LO"
8166   },
8167   {
8168    "chips": ["gfx8"],
8169    "map": {"at": 213564, "to": "mm"},
8170    "name": "IA_PERFCOUNTER3_HI",
8171    "type_ref": "CB_PERFCOUNTER0_HI"
8172   },
8173   {
8174    "chips": ["gfx8"],
8175    "map": {"at": 213568, "to": "mm"},
8176    "name": "VGT_PERFCOUNTER0_LO",
8177    "type_ref": "CB_PERFCOUNTER0_LO"
8178   },
8179   {
8180    "chips": ["gfx8"],
8181    "map": {"at": 213572, "to": "mm"},
8182    "name": "VGT_PERFCOUNTER0_HI",
8183    "type_ref": "CB_PERFCOUNTER0_HI"
8184   },
8185   {
8186    "chips": ["gfx8"],
8187    "map": {"at": 213576, "to": "mm"},
8188    "name": "VGT_PERFCOUNTER1_LO",
8189    "type_ref": "CB_PERFCOUNTER0_LO"
8190   },
8191   {
8192    "chips": ["gfx8"],
8193    "map": {"at": 213580, "to": "mm"},
8194    "name": "VGT_PERFCOUNTER1_HI",
8195    "type_ref": "CB_PERFCOUNTER0_HI"
8196   },
8197   {
8198    "chips": ["gfx8"],
8199    "map": {"at": 213584, "to": "mm"},
8200    "name": "VGT_PERFCOUNTER2_LO",
8201    "type_ref": "CB_PERFCOUNTER0_LO"
8202   },
8203   {
8204    "chips": ["gfx8"],
8205    "map": {"at": 213588, "to": "mm"},
8206    "name": "VGT_PERFCOUNTER2_HI",
8207    "type_ref": "CB_PERFCOUNTER0_HI"
8208   },
8209   {
8210    "chips": ["gfx8"],
8211    "map": {"at": 213592, "to": "mm"},
8212    "name": "VGT_PERFCOUNTER3_LO",
8213    "type_ref": "CB_PERFCOUNTER0_LO"
8214   },
8215   {
8216    "chips": ["gfx8"],
8217    "map": {"at": 213596, "to": "mm"},
8218    "name": "VGT_PERFCOUNTER3_HI",
8219    "type_ref": "CB_PERFCOUNTER0_HI"
8220   },
8221   {
8222    "chips": ["gfx8"],
8223    "map": {"at": 214016, "to": "mm"},
8224    "name": "PA_SU_PERFCOUNTER0_LO",
8225    "type_ref": "CB_PERFCOUNTER0_LO"
8226   },
8227   {
8228    "chips": ["gfx8"],
8229    "map": {"at": 214020, "to": "mm"},
8230    "name": "PA_SU_PERFCOUNTER0_HI",
8231    "type_ref": "PA_SU_PERFCOUNTER0_HI"
8232   },
8233   {
8234    "chips": ["gfx8"],
8235    "map": {"at": 214024, "to": "mm"},
8236    "name": "PA_SU_PERFCOUNTER1_LO",
8237    "type_ref": "CB_PERFCOUNTER0_LO"
8238   },
8239   {
8240    "chips": ["gfx8"],
8241    "map": {"at": 214028, "to": "mm"},
8242    "name": "PA_SU_PERFCOUNTER1_HI",
8243    "type_ref": "PA_SU_PERFCOUNTER0_HI"
8244   },
8245   {
8246    "chips": ["gfx8"],
8247    "map": {"at": 214032, "to": "mm"},
8248    "name": "PA_SU_PERFCOUNTER2_LO",
8249    "type_ref": "CB_PERFCOUNTER0_LO"
8250   },
8251   {
8252    "chips": ["gfx8"],
8253    "map": {"at": 214036, "to": "mm"},
8254    "name": "PA_SU_PERFCOUNTER2_HI",
8255    "type_ref": "PA_SU_PERFCOUNTER0_HI"
8256   },
8257   {
8258    "chips": ["gfx8"],
8259    "map": {"at": 214040, "to": "mm"},
8260    "name": "PA_SU_PERFCOUNTER3_LO",
8261    "type_ref": "CB_PERFCOUNTER0_LO"
8262   },
8263   {
8264    "chips": ["gfx8"],
8265    "map": {"at": 214044, "to": "mm"},
8266    "name": "PA_SU_PERFCOUNTER3_HI",
8267    "type_ref": "PA_SU_PERFCOUNTER0_HI"
8268   },
8269   {
8270    "chips": ["gfx8"],
8271    "map": {"at": 214272, "to": "mm"},
8272    "name": "PA_SC_PERFCOUNTER0_LO",
8273    "type_ref": "CB_PERFCOUNTER0_LO"
8274   },
8275   {
8276    "chips": ["gfx8"],
8277    "map": {"at": 214276, "to": "mm"},
8278    "name": "PA_SC_PERFCOUNTER0_HI",
8279    "type_ref": "CB_PERFCOUNTER0_HI"
8280   },
8281   {
8282    "chips": ["gfx8"],
8283    "map": {"at": 214280, "to": "mm"},
8284    "name": "PA_SC_PERFCOUNTER1_LO",
8285    "type_ref": "CB_PERFCOUNTER0_LO"
8286   },
8287   {
8288    "chips": ["gfx8"],
8289    "map": {"at": 214284, "to": "mm"},
8290    "name": "PA_SC_PERFCOUNTER1_HI",
8291    "type_ref": "CB_PERFCOUNTER0_HI"
8292   },
8293   {
8294    "chips": ["gfx8"],
8295    "map": {"at": 214288, "to": "mm"},
8296    "name": "PA_SC_PERFCOUNTER2_LO",
8297    "type_ref": "CB_PERFCOUNTER0_LO"
8298   },
8299   {
8300    "chips": ["gfx8"],
8301    "map": {"at": 214292, "to": "mm"},
8302    "name": "PA_SC_PERFCOUNTER2_HI",
8303    "type_ref": "CB_PERFCOUNTER0_HI"
8304   },
8305   {
8306    "chips": ["gfx8"],
8307    "map": {"at": 214296, "to": "mm"},
8308    "name": "PA_SC_PERFCOUNTER3_LO",
8309    "type_ref": "CB_PERFCOUNTER0_LO"
8310   },
8311   {
8312    "chips": ["gfx8"],
8313    "map": {"at": 214300, "to": "mm"},
8314    "name": "PA_SC_PERFCOUNTER3_HI",
8315    "type_ref": "CB_PERFCOUNTER0_HI"
8316   },
8317   {
8318    "chips": ["gfx8"],
8319    "map": {"at": 214304, "to": "mm"},
8320    "name": "PA_SC_PERFCOUNTER4_LO",
8321    "type_ref": "CB_PERFCOUNTER0_LO"
8322   },
8323   {
8324    "chips": ["gfx8"],
8325    "map": {"at": 214308, "to": "mm"},
8326    "name": "PA_SC_PERFCOUNTER4_HI",
8327    "type_ref": "CB_PERFCOUNTER0_HI"
8328   },
8329   {
8330    "chips": ["gfx8"],
8331    "map": {"at": 214312, "to": "mm"},
8332    "name": "PA_SC_PERFCOUNTER5_LO",
8333    "type_ref": "CB_PERFCOUNTER0_LO"
8334   },
8335   {
8336    "chips": ["gfx8"],
8337    "map": {"at": 214316, "to": "mm"},
8338    "name": "PA_SC_PERFCOUNTER5_HI",
8339    "type_ref": "CB_PERFCOUNTER0_HI"
8340   },
8341   {
8342    "chips": ["gfx8"],
8343    "map": {"at": 214320, "to": "mm"},
8344    "name": "PA_SC_PERFCOUNTER6_LO",
8345    "type_ref": "CB_PERFCOUNTER0_LO"
8346   },
8347   {
8348    "chips": ["gfx8"],
8349    "map": {"at": 214324, "to": "mm"},
8350    "name": "PA_SC_PERFCOUNTER6_HI",
8351    "type_ref": "CB_PERFCOUNTER0_HI"
8352   },
8353   {
8354    "chips": ["gfx8"],
8355    "map": {"at": 214328, "to": "mm"},
8356    "name": "PA_SC_PERFCOUNTER7_LO",
8357    "type_ref": "CB_PERFCOUNTER0_LO"
8358   },
8359   {
8360    "chips": ["gfx8"],
8361    "map": {"at": 214332, "to": "mm"},
8362    "name": "PA_SC_PERFCOUNTER7_HI",
8363    "type_ref": "CB_PERFCOUNTER0_HI"
8364   },
8365   {
8366    "chips": ["gfx8"],
8367    "map": {"at": 214528, "to": "mm"},
8368    "name": "SPI_PERFCOUNTER0_HI",
8369    "type_ref": "CB_PERFCOUNTER0_HI"
8370   },
8371   {
8372    "chips": ["gfx8"],
8373    "map": {"at": 214532, "to": "mm"},
8374    "name": "SPI_PERFCOUNTER0_LO",
8375    "type_ref": "CB_PERFCOUNTER0_LO"
8376   },
8377   {
8378    "chips": ["gfx8"],
8379    "map": {"at": 214536, "to": "mm"},
8380    "name": "SPI_PERFCOUNTER1_HI",
8381    "type_ref": "CB_PERFCOUNTER0_HI"
8382   },
8383   {
8384    "chips": ["gfx8"],
8385    "map": {"at": 214540, "to": "mm"},
8386    "name": "SPI_PERFCOUNTER1_LO",
8387    "type_ref": "CB_PERFCOUNTER0_LO"
8388   },
8389   {
8390    "chips": ["gfx8"],
8391    "map": {"at": 214544, "to": "mm"},
8392    "name": "SPI_PERFCOUNTER2_HI",
8393    "type_ref": "CB_PERFCOUNTER0_HI"
8394   },
8395   {
8396    "chips": ["gfx8"],
8397    "map": {"at": 214548, "to": "mm"},
8398    "name": "SPI_PERFCOUNTER2_LO",
8399    "type_ref": "CB_PERFCOUNTER0_LO"
8400   },
8401   {
8402    "chips": ["gfx8"],
8403    "map": {"at": 214552, "to": "mm"},
8404    "name": "SPI_PERFCOUNTER3_HI",
8405    "type_ref": "CB_PERFCOUNTER0_HI"
8406   },
8407   {
8408    "chips": ["gfx8"],
8409    "map": {"at": 214556, "to": "mm"},
8410    "name": "SPI_PERFCOUNTER3_LO",
8411    "type_ref": "CB_PERFCOUNTER0_LO"
8412   },
8413   {
8414    "chips": ["gfx8"],
8415    "map": {"at": 214560, "to": "mm"},
8416    "name": "SPI_PERFCOUNTER4_HI",
8417    "type_ref": "CB_PERFCOUNTER0_HI"
8418   },
8419   {
8420    "chips": ["gfx8"],
8421    "map": {"at": 214564, "to": "mm"},
8422    "name": "SPI_PERFCOUNTER4_LO",
8423    "type_ref": "CB_PERFCOUNTER0_LO"
8424   },
8425   {
8426    "chips": ["gfx8"],
8427    "map": {"at": 214568, "to": "mm"},
8428    "name": "SPI_PERFCOUNTER5_HI",
8429    "type_ref": "CB_PERFCOUNTER0_HI"
8430   },
8431   {
8432    "chips": ["gfx8"],
8433    "map": {"at": 214572, "to": "mm"},
8434    "name": "SPI_PERFCOUNTER5_LO",
8435    "type_ref": "CB_PERFCOUNTER0_LO"
8436   },
8437   {
8438    "chips": ["gfx8"],
8439    "map": {"at": 214784, "to": "mm"},
8440    "name": "SQ_PERFCOUNTER0_LO",
8441    "type_ref": "CB_PERFCOUNTER0_LO"
8442   },
8443   {
8444    "chips": ["gfx8"],
8445    "map": {"at": 214788, "to": "mm"},
8446    "name": "SQ_PERFCOUNTER0_HI",
8447    "type_ref": "CB_PERFCOUNTER0_HI"
8448   },
8449   {
8450    "chips": ["gfx8"],
8451    "map": {"at": 214792, "to": "mm"},
8452    "name": "SQ_PERFCOUNTER1_LO",
8453    "type_ref": "CB_PERFCOUNTER0_LO"
8454   },
8455   {
8456    "chips": ["gfx8"],
8457    "map": {"at": 214796, "to": "mm"},
8458    "name": "SQ_PERFCOUNTER1_HI",
8459    "type_ref": "CB_PERFCOUNTER0_HI"
8460   },
8461   {
8462    "chips": ["gfx8"],
8463    "map": {"at": 214800, "to": "mm"},
8464    "name": "SQ_PERFCOUNTER2_LO",
8465    "type_ref": "CB_PERFCOUNTER0_LO"
8466   },
8467   {
8468    "chips": ["gfx8"],
8469    "map": {"at": 214804, "to": "mm"},
8470    "name": "SQ_PERFCOUNTER2_HI",
8471    "type_ref": "CB_PERFCOUNTER0_HI"
8472   },
8473   {
8474    "chips": ["gfx8"],
8475    "map": {"at": 214808, "to": "mm"},
8476    "name": "SQ_PERFCOUNTER3_LO",
8477    "type_ref": "CB_PERFCOUNTER0_LO"
8478   },
8479   {
8480    "chips": ["gfx8"],
8481    "map": {"at": 214812, "to": "mm"},
8482    "name": "SQ_PERFCOUNTER3_HI",
8483    "type_ref": "CB_PERFCOUNTER0_HI"
8484   },
8485   {
8486    "chips": ["gfx8"],
8487    "map": {"at": 214816, "to": "mm"},
8488    "name": "SQ_PERFCOUNTER4_LO",
8489    "type_ref": "CB_PERFCOUNTER0_LO"
8490   },
8491   {
8492    "chips": ["gfx8"],
8493    "map": {"at": 214820, "to": "mm"},
8494    "name": "SQ_PERFCOUNTER4_HI",
8495    "type_ref": "CB_PERFCOUNTER0_HI"
8496   },
8497   {
8498    "chips": ["gfx8"],
8499    "map": {"at": 214824, "to": "mm"},
8500    "name": "SQ_PERFCOUNTER5_LO",
8501    "type_ref": "CB_PERFCOUNTER0_LO"
8502   },
8503   {
8504    "chips": ["gfx8"],
8505    "map": {"at": 214828, "to": "mm"},
8506    "name": "SQ_PERFCOUNTER5_HI",
8507    "type_ref": "CB_PERFCOUNTER0_HI"
8508   },
8509   {
8510    "chips": ["gfx8"],
8511    "map": {"at": 214832, "to": "mm"},
8512    "name": "SQ_PERFCOUNTER6_LO",
8513    "type_ref": "CB_PERFCOUNTER0_LO"
8514   },
8515   {
8516    "chips": ["gfx8"],
8517    "map": {"at": 214836, "to": "mm"},
8518    "name": "SQ_PERFCOUNTER6_HI",
8519    "type_ref": "CB_PERFCOUNTER0_HI"
8520   },
8521   {
8522    "chips": ["gfx8"],
8523    "map": {"at": 214840, "to": "mm"},
8524    "name": "SQ_PERFCOUNTER7_LO",
8525    "type_ref": "CB_PERFCOUNTER0_LO"
8526   },
8527   {
8528    "chips": ["gfx8"],
8529    "map": {"at": 214844, "to": "mm"},
8530    "name": "SQ_PERFCOUNTER7_HI",
8531    "type_ref": "CB_PERFCOUNTER0_HI"
8532   },
8533   {
8534    "chips": ["gfx8"],
8535    "map": {"at": 214848, "to": "mm"},
8536    "name": "SQ_PERFCOUNTER8_LO",
8537    "type_ref": "CB_PERFCOUNTER0_LO"
8538   },
8539   {
8540    "chips": ["gfx8"],
8541    "map": {"at": 214852, "to": "mm"},
8542    "name": "SQ_PERFCOUNTER8_HI",
8543    "type_ref": "CB_PERFCOUNTER0_HI"
8544   },
8545   {
8546    "chips": ["gfx8"],
8547    "map": {"at": 214856, "to": "mm"},
8548    "name": "SQ_PERFCOUNTER9_LO",
8549    "type_ref": "CB_PERFCOUNTER0_LO"
8550   },
8551   {
8552    "chips": ["gfx8"],
8553    "map": {"at": 214860, "to": "mm"},
8554    "name": "SQ_PERFCOUNTER9_HI",
8555    "type_ref": "CB_PERFCOUNTER0_HI"
8556   },
8557   {
8558    "chips": ["gfx8"],
8559    "map": {"at": 214864, "to": "mm"},
8560    "name": "SQ_PERFCOUNTER10_LO",
8561    "type_ref": "CB_PERFCOUNTER0_LO"
8562   },
8563   {
8564    "chips": ["gfx8"],
8565    "map": {"at": 214868, "to": "mm"},
8566    "name": "SQ_PERFCOUNTER10_HI",
8567    "type_ref": "CB_PERFCOUNTER0_HI"
8568   },
8569   {
8570    "chips": ["gfx8"],
8571    "map": {"at": 214872, "to": "mm"},
8572    "name": "SQ_PERFCOUNTER11_LO",
8573    "type_ref": "CB_PERFCOUNTER0_LO"
8574   },
8575   {
8576    "chips": ["gfx8"],
8577    "map": {"at": 214876, "to": "mm"},
8578    "name": "SQ_PERFCOUNTER11_HI",
8579    "type_ref": "CB_PERFCOUNTER0_HI"
8580   },
8581   {
8582    "chips": ["gfx8"],
8583    "map": {"at": 214880, "to": "mm"},
8584    "name": "SQ_PERFCOUNTER12_LO",
8585    "type_ref": "CB_PERFCOUNTER0_LO"
8586   },
8587   {
8588    "chips": ["gfx8"],
8589    "map": {"at": 214884, "to": "mm"},
8590    "name": "SQ_PERFCOUNTER12_HI",
8591    "type_ref": "CB_PERFCOUNTER0_HI"
8592   },
8593   {
8594    "chips": ["gfx8"],
8595    "map": {"at": 214888, "to": "mm"},
8596    "name": "SQ_PERFCOUNTER13_LO",
8597    "type_ref": "CB_PERFCOUNTER0_LO"
8598   },
8599   {
8600    "chips": ["gfx8"],
8601    "map": {"at": 214892, "to": "mm"},
8602    "name": "SQ_PERFCOUNTER13_HI",
8603    "type_ref": "CB_PERFCOUNTER0_HI"
8604   },
8605   {
8606    "chips": ["gfx8"],
8607    "map": {"at": 214896, "to": "mm"},
8608    "name": "SQ_PERFCOUNTER14_LO",
8609    "type_ref": "CB_PERFCOUNTER0_LO"
8610   },
8611   {
8612    "chips": ["gfx8"],
8613    "map": {"at": 214900, "to": "mm"},
8614    "name": "SQ_PERFCOUNTER14_HI",
8615    "type_ref": "CB_PERFCOUNTER0_HI"
8616   },
8617   {
8618    "chips": ["gfx8"],
8619    "map": {"at": 214904, "to": "mm"},
8620    "name": "SQ_PERFCOUNTER15_LO",
8621    "type_ref": "CB_PERFCOUNTER0_LO"
8622   },
8623   {
8624    "chips": ["gfx8"],
8625    "map": {"at": 214908, "to": "mm"},
8626    "name": "SQ_PERFCOUNTER15_HI",
8627    "type_ref": "CB_PERFCOUNTER0_HI"
8628   },
8629   {
8630    "chips": ["gfx8"],
8631    "map": {"at": 215296, "to": "mm"},
8632    "name": "SX_PERFCOUNTER0_LO",
8633    "type_ref": "CB_PERFCOUNTER0_LO"
8634   },
8635   {
8636    "chips": ["gfx8"],
8637    "map": {"at": 215300, "to": "mm"},
8638    "name": "SX_PERFCOUNTER0_HI",
8639    "type_ref": "CB_PERFCOUNTER0_HI"
8640   },
8641   {
8642    "chips": ["gfx8"],
8643    "map": {"at": 215304, "to": "mm"},
8644    "name": "SX_PERFCOUNTER1_LO",
8645    "type_ref": "CB_PERFCOUNTER0_LO"
8646   },
8647   {
8648    "chips": ["gfx8"],
8649    "map": {"at": 215308, "to": "mm"},
8650    "name": "SX_PERFCOUNTER1_HI",
8651    "type_ref": "CB_PERFCOUNTER0_HI"
8652   },
8653   {
8654    "chips": ["gfx8"],
8655    "map": {"at": 215312, "to": "mm"},
8656    "name": "SX_PERFCOUNTER2_LO",
8657    "type_ref": "CB_PERFCOUNTER0_LO"
8658   },
8659   {
8660    "chips": ["gfx8"],
8661    "map": {"at": 215316, "to": "mm"},
8662    "name": "SX_PERFCOUNTER2_HI",
8663    "type_ref": "CB_PERFCOUNTER0_HI"
8664   },
8665   {
8666    "chips": ["gfx8"],
8667    "map": {"at": 215320, "to": "mm"},
8668    "name": "SX_PERFCOUNTER3_LO",
8669    "type_ref": "CB_PERFCOUNTER0_LO"
8670   },
8671   {
8672    "chips": ["gfx8"],
8673    "map": {"at": 215324, "to": "mm"},
8674    "name": "SX_PERFCOUNTER3_HI",
8675    "type_ref": "CB_PERFCOUNTER0_HI"
8676   },
8677   {
8678    "chips": ["gfx8"],
8679    "map": {"at": 215552, "to": "mm"},
8680    "name": "GDS_PERFCOUNTER0_LO",
8681    "type_ref": "CB_PERFCOUNTER0_LO"
8682   },
8683   {
8684    "chips": ["gfx8"],
8685    "map": {"at": 215556, "to": "mm"},
8686    "name": "GDS_PERFCOUNTER0_HI",
8687    "type_ref": "CB_PERFCOUNTER0_HI"
8688   },
8689   {
8690    "chips": ["gfx8"],
8691    "map": {"at": 215560, "to": "mm"},
8692    "name": "GDS_PERFCOUNTER1_LO",
8693    "type_ref": "CB_PERFCOUNTER0_LO"
8694   },
8695   {
8696    "chips": ["gfx8"],
8697    "map": {"at": 215564, "to": "mm"},
8698    "name": "GDS_PERFCOUNTER1_HI",
8699    "type_ref": "CB_PERFCOUNTER0_HI"
8700   },
8701   {
8702    "chips": ["gfx8"],
8703    "map": {"at": 215568, "to": "mm"},
8704    "name": "GDS_PERFCOUNTER2_LO",
8705    "type_ref": "CB_PERFCOUNTER0_LO"
8706   },
8707   {
8708    "chips": ["gfx8"],
8709    "map": {"at": 215572, "to": "mm"},
8710    "name": "GDS_PERFCOUNTER2_HI",
8711    "type_ref": "CB_PERFCOUNTER0_HI"
8712   },
8713   {
8714    "chips": ["gfx8"],
8715    "map": {"at": 215576, "to": "mm"},
8716    "name": "GDS_PERFCOUNTER3_LO",
8717    "type_ref": "CB_PERFCOUNTER0_LO"
8718   },
8719   {
8720    "chips": ["gfx8"],
8721    "map": {"at": 215580, "to": "mm"},
8722    "name": "GDS_PERFCOUNTER3_HI",
8723    "type_ref": "CB_PERFCOUNTER0_HI"
8724   },
8725   {
8726    "chips": ["gfx8"],
8727    "map": {"at": 215808, "to": "mm"},
8728    "name": "TA_PERFCOUNTER0_LO",
8729    "type_ref": "CB_PERFCOUNTER0_LO"
8730   },
8731   {
8732    "chips": ["gfx8"],
8733    "map": {"at": 215812, "to": "mm"},
8734    "name": "TA_PERFCOUNTER0_HI",
8735    "type_ref": "CB_PERFCOUNTER0_HI"
8736   },
8737   {
8738    "chips": ["gfx8"],
8739    "map": {"at": 215816, "to": "mm"},
8740    "name": "TA_PERFCOUNTER1_LO",
8741    "type_ref": "CB_PERFCOUNTER0_LO"
8742   },
8743   {
8744    "chips": ["gfx8"],
8745    "map": {"at": 215820, "to": "mm"},
8746    "name": "TA_PERFCOUNTER1_HI",
8747    "type_ref": "CB_PERFCOUNTER0_HI"
8748   },
8749   {
8750    "chips": ["gfx8"],
8751    "map": {"at": 216064, "to": "mm"},
8752    "name": "TD_PERFCOUNTER0_LO",
8753    "type_ref": "CB_PERFCOUNTER0_LO"
8754   },
8755   {
8756    "chips": ["gfx8"],
8757    "map": {"at": 216068, "to": "mm"},
8758    "name": "TD_PERFCOUNTER0_HI",
8759    "type_ref": "CB_PERFCOUNTER0_HI"
8760   },
8761   {
8762    "chips": ["gfx8"],
8763    "map": {"at": 216072, "to": "mm"},
8764    "name": "TD_PERFCOUNTER1_LO",
8765    "type_ref": "CB_PERFCOUNTER0_LO"
8766   },
8767   {
8768    "chips": ["gfx8"],
8769    "map": {"at": 216076, "to": "mm"},
8770    "name": "TD_PERFCOUNTER1_HI",
8771    "type_ref": "CB_PERFCOUNTER0_HI"
8772   },
8773   {
8774    "chips": ["gfx8"],
8775    "map": {"at": 216320, "to": "mm"},
8776    "name": "TCP_PERFCOUNTER0_LO",
8777    "type_ref": "CB_PERFCOUNTER0_LO"
8778   },
8779   {
8780    "chips": ["gfx8"],
8781    "map": {"at": 216324, "to": "mm"},
8782    "name": "TCP_PERFCOUNTER0_HI",
8783    "type_ref": "CB_PERFCOUNTER0_HI"
8784   },
8785   {
8786    "chips": ["gfx8"],
8787    "map": {"at": 216328, "to": "mm"},
8788    "name": "TCP_PERFCOUNTER1_LO",
8789    "type_ref": "CB_PERFCOUNTER0_LO"
8790   },
8791   {
8792    "chips": ["gfx8"],
8793    "map": {"at": 216332, "to": "mm"},
8794    "name": "TCP_PERFCOUNTER1_HI",
8795    "type_ref": "CB_PERFCOUNTER0_HI"
8796   },
8797   {
8798    "chips": ["gfx8"],
8799    "map": {"at": 216336, "to": "mm"},
8800    "name": "TCP_PERFCOUNTER2_LO",
8801    "type_ref": "CB_PERFCOUNTER0_LO"
8802   },
8803   {
8804    "chips": ["gfx8"],
8805    "map": {"at": 216340, "to": "mm"},
8806    "name": "TCP_PERFCOUNTER2_HI",
8807    "type_ref": "CB_PERFCOUNTER0_HI"
8808   },
8809   {
8810    "chips": ["gfx8"],
8811    "map": {"at": 216344, "to": "mm"},
8812    "name": "TCP_PERFCOUNTER3_LO",
8813    "type_ref": "CB_PERFCOUNTER0_LO"
8814   },
8815   {
8816    "chips": ["gfx8"],
8817    "map": {"at": 216348, "to": "mm"},
8818    "name": "TCP_PERFCOUNTER3_HI",
8819    "type_ref": "CB_PERFCOUNTER0_HI"
8820   },
8821   {
8822    "chips": ["gfx8"],
8823    "map": {"at": 216576, "to": "mm"},
8824    "name": "TCC_PERFCOUNTER0_LO",
8825    "type_ref": "CB_PERFCOUNTER0_LO"
8826   },
8827   {
8828    "chips": ["gfx8"],
8829    "map": {"at": 216580, "to": "mm"},
8830    "name": "TCC_PERFCOUNTER0_HI",
8831    "type_ref": "CB_PERFCOUNTER0_HI"
8832   },
8833   {
8834    "chips": ["gfx8"],
8835    "map": {"at": 216584, "to": "mm"},
8836    "name": "TCC_PERFCOUNTER1_LO",
8837    "type_ref": "CB_PERFCOUNTER0_LO"
8838   },
8839   {
8840    "chips": ["gfx8"],
8841    "map": {"at": 216588, "to": "mm"},
8842    "name": "TCC_PERFCOUNTER1_HI",
8843    "type_ref": "CB_PERFCOUNTER0_HI"
8844   },
8845   {
8846    "chips": ["gfx8"],
8847    "map": {"at": 216592, "to": "mm"},
8848    "name": "TCC_PERFCOUNTER2_LO",
8849    "type_ref": "CB_PERFCOUNTER0_LO"
8850   },
8851   {
8852    "chips": ["gfx8"],
8853    "map": {"at": 216596, "to": "mm"},
8854    "name": "TCC_PERFCOUNTER2_HI",
8855    "type_ref": "CB_PERFCOUNTER0_HI"
8856   },
8857   {
8858    "chips": ["gfx8"],
8859    "map": {"at": 216600, "to": "mm"},
8860    "name": "TCC_PERFCOUNTER3_LO",
8861    "type_ref": "CB_PERFCOUNTER0_LO"
8862   },
8863   {
8864    "chips": ["gfx8"],
8865    "map": {"at": 216604, "to": "mm"},
8866    "name": "TCC_PERFCOUNTER3_HI",
8867    "type_ref": "CB_PERFCOUNTER0_HI"
8868   },
8869   {
8870    "chips": ["gfx8"],
8871    "map": {"at": 216640, "to": "mm"},
8872    "name": "TCA_PERFCOUNTER0_LO",
8873    "type_ref": "CB_PERFCOUNTER0_LO"
8874   },
8875   {
8876    "chips": ["gfx8"],
8877    "map": {"at": 216644, "to": "mm"},
8878    "name": "TCA_PERFCOUNTER0_HI",
8879    "type_ref": "CB_PERFCOUNTER0_HI"
8880   },
8881   {
8882    "chips": ["gfx8"],
8883    "map": {"at": 216648, "to": "mm"},
8884    "name": "TCA_PERFCOUNTER1_LO",
8885    "type_ref": "CB_PERFCOUNTER0_LO"
8886   },
8887   {
8888    "chips": ["gfx8"],
8889    "map": {"at": 216652, "to": "mm"},
8890    "name": "TCA_PERFCOUNTER1_HI",
8891    "type_ref": "CB_PERFCOUNTER0_HI"
8892   },
8893   {
8894    "chips": ["gfx8"],
8895    "map": {"at": 216656, "to": "mm"},
8896    "name": "TCA_PERFCOUNTER2_LO",
8897    "type_ref": "CB_PERFCOUNTER0_LO"
8898   },
8899   {
8900    "chips": ["gfx8"],
8901    "map": {"at": 216660, "to": "mm"},
8902    "name": "TCA_PERFCOUNTER2_HI",
8903    "type_ref": "CB_PERFCOUNTER0_HI"
8904   },
8905   {
8906    "chips": ["gfx8"],
8907    "map": {"at": 216664, "to": "mm"},
8908    "name": "TCA_PERFCOUNTER3_LO",
8909    "type_ref": "CB_PERFCOUNTER0_LO"
8910   },
8911   {
8912    "chips": ["gfx8"],
8913    "map": {"at": 216668, "to": "mm"},
8914    "name": "TCA_PERFCOUNTER3_HI",
8915    "type_ref": "CB_PERFCOUNTER0_HI"
8916   },
8917   {
8918    "chips": ["gfx8"],
8919    "map": {"at": 217112, "to": "mm"},
8920    "name": "CB_PERFCOUNTER0_LO",
8921    "type_ref": "CB_PERFCOUNTER0_LO"
8922   },
8923   {
8924    "chips": ["gfx8"],
8925    "map": {"at": 217116, "to": "mm"},
8926    "name": "CB_PERFCOUNTER0_HI",
8927    "type_ref": "CB_PERFCOUNTER0_HI"
8928   },
8929   {
8930    "chips": ["gfx8"],
8931    "map": {"at": 217120, "to": "mm"},
8932    "name": "CB_PERFCOUNTER1_LO",
8933    "type_ref": "CB_PERFCOUNTER0_LO"
8934   },
8935   {
8936    "chips": ["gfx8"],
8937    "map": {"at": 217124, "to": "mm"},
8938    "name": "CB_PERFCOUNTER1_HI",
8939    "type_ref": "CB_PERFCOUNTER0_HI"
8940   },
8941   {
8942    "chips": ["gfx8"],
8943    "map": {"at": 217128, "to": "mm"},
8944    "name": "CB_PERFCOUNTER2_LO",
8945    "type_ref": "CB_PERFCOUNTER0_LO"
8946   },
8947   {
8948    "chips": ["gfx8"],
8949    "map": {"at": 217132, "to": "mm"},
8950    "name": "CB_PERFCOUNTER2_HI",
8951    "type_ref": "CB_PERFCOUNTER0_HI"
8952   },
8953   {
8954    "chips": ["gfx8"],
8955    "map": {"at": 217136, "to": "mm"},
8956    "name": "CB_PERFCOUNTER3_LO",
8957    "type_ref": "CB_PERFCOUNTER0_LO"
8958   },
8959   {
8960    "chips": ["gfx8"],
8961    "map": {"at": 217140, "to": "mm"},
8962    "name": "CB_PERFCOUNTER3_HI",
8963    "type_ref": "CB_PERFCOUNTER0_HI"
8964   },
8965   {
8966    "chips": ["gfx8"],
8967    "map": {"at": 217344, "to": "mm"},
8968    "name": "DB_PERFCOUNTER0_LO",
8969    "type_ref": "CB_PERFCOUNTER0_LO"
8970   },
8971   {
8972    "chips": ["gfx8"],
8973    "map": {"at": 217348, "to": "mm"},
8974    "name": "DB_PERFCOUNTER0_HI",
8975    "type_ref": "CB_PERFCOUNTER0_HI"
8976   },
8977   {
8978    "chips": ["gfx8"],
8979    "map": {"at": 217352, "to": "mm"},
8980    "name": "DB_PERFCOUNTER1_LO",
8981    "type_ref": "CB_PERFCOUNTER0_LO"
8982   },
8983   {
8984    "chips": ["gfx8"],
8985    "map": {"at": 217356, "to": "mm"},
8986    "name": "DB_PERFCOUNTER1_HI",
8987    "type_ref": "CB_PERFCOUNTER0_HI"
8988   },
8989   {
8990    "chips": ["gfx8"],
8991    "map": {"at": 217360, "to": "mm"},
8992    "name": "DB_PERFCOUNTER2_LO",
8993    "type_ref": "CB_PERFCOUNTER0_LO"
8994   },
8995   {
8996    "chips": ["gfx8"],
8997    "map": {"at": 217364, "to": "mm"},
8998    "name": "DB_PERFCOUNTER2_HI",
8999    "type_ref": "CB_PERFCOUNTER0_HI"
9000   },
9001   {
9002    "chips": ["gfx8"],
9003    "map": {"at": 217368, "to": "mm"},
9004    "name": "DB_PERFCOUNTER3_LO",
9005    "type_ref": "CB_PERFCOUNTER0_LO"
9006   },
9007   {
9008    "chips": ["gfx8"],
9009    "map": {"at": 217372, "to": "mm"},
9010    "name": "DB_PERFCOUNTER3_HI",
9011    "type_ref": "CB_PERFCOUNTER0_HI"
9012   },
9013   {
9014    "chips": ["gfx8"],
9015    "map": {"at": 217600, "to": "mm"},
9016    "name": "RLC_PERFCOUNTER0_LO",
9017    "type_ref": "CB_PERFCOUNTER0_LO"
9018   },
9019   {
9020    "chips": ["gfx8"],
9021    "map": {"at": 217604, "to": "mm"},
9022    "name": "RLC_PERFCOUNTER0_HI",
9023    "type_ref": "CB_PERFCOUNTER0_HI"
9024   },
9025   {
9026    "chips": ["gfx8"],
9027    "map": {"at": 217608, "to": "mm"},
9028    "name": "RLC_PERFCOUNTER1_LO",
9029    "type_ref": "CB_PERFCOUNTER0_LO"
9030   },
9031   {
9032    "chips": ["gfx8"],
9033    "map": {"at": 217612, "to": "mm"},
9034    "name": "RLC_PERFCOUNTER1_HI",
9035    "type_ref": "CB_PERFCOUNTER0_HI"
9036   },
9037   {
9038    "chips": ["gfx8"],
9039    "map": {"at": 221184, "to": "mm"},
9040    "name": "CPG_PERFCOUNTER1_SELECT",
9041    "type_ref": "CPG_PERFCOUNTER1_SELECT"
9042   },
9043   {
9044    "chips": ["gfx8"],
9045    "map": {"at": 221188, "to": "mm"},
9046    "name": "CPG_PERFCOUNTER0_SELECT1",
9047    "type_ref": "CPG_PERFCOUNTER0_SELECT1"
9048   },
9049   {
9050    "chips": ["gfx8"],
9051    "map": {"at": 221192, "to": "mm"},
9052    "name": "CPG_PERFCOUNTER0_SELECT",
9053    "type_ref": "CPG_PERFCOUNTER0_SELECT"
9054   },
9055   {
9056    "chips": ["gfx8"],
9057    "map": {"at": 221196, "to": "mm"},
9058    "name": "CPC_PERFCOUNTER1_SELECT",
9059    "type_ref": "CPG_PERFCOUNTER1_SELECT"
9060   },
9061   {
9062    "chips": ["gfx8"],
9063    "map": {"at": 221200, "to": "mm"},
9064    "name": "CPC_PERFCOUNTER0_SELECT1",
9065    "type_ref": "CPG_PERFCOUNTER0_SELECT1"
9066   },
9067   {
9068    "chips": ["gfx8"],
9069    "map": {"at": 221204, "to": "mm"},
9070    "name": "CPF_PERFCOUNTER1_SELECT",
9071    "type_ref": "CPG_PERFCOUNTER1_SELECT"
9072   },
9073   {
9074    "chips": ["gfx8"],
9075    "map": {"at": 221208, "to": "mm"},
9076    "name": "CPF_PERFCOUNTER0_SELECT1",
9077    "type_ref": "CPG_PERFCOUNTER0_SELECT1"
9078   },
9079   {
9080    "chips": ["gfx8"],
9081    "map": {"at": 221212, "to": "mm"},
9082    "name": "CPF_PERFCOUNTER0_SELECT",
9083    "type_ref": "CPG_PERFCOUNTER0_SELECT"
9084   },
9085   {
9086    "chips": ["gfx8"],
9087    "map": {"at": 221216, "to": "mm"},
9088    "name": "CP_PERFMON_CNTL",
9089    "type_ref": "CP_PERFMON_CNTL"
9090   },
9091   {
9092    "chips": ["gfx8"],
9093    "map": {"at": 221220, "to": "mm"},
9094    "name": "CPC_PERFCOUNTER0_SELECT",
9095    "type_ref": "CPG_PERFCOUNTER0_SELECT"
9096   },
9097   {
9098    "chips": ["gfx8"],
9099    "map": {"at": 221248, "to": "mm"},
9100    "name": "CP_DRAW_OBJECT",
9101    "type_ref": "CP_DRAW_OBJECT"
9102   },
9103   {
9104    "chips": ["gfx8"],
9105    "map": {"at": 221252, "to": "mm"},
9106    "name": "CP_DRAW_OBJECT_COUNTER",
9107    "type_ref": "CP_DRAW_OBJECT_COUNTER"
9108   },
9109   {
9110    "chips": ["gfx8"],
9111    "map": {"at": 221256, "to": "mm"},
9112    "name": "CP_DRAW_WINDOW_MASK_HI",
9113    "type_ref": "CP_DRAW_WINDOW_MASK_HI"
9114   },
9115   {
9116    "chips": ["gfx8"],
9117    "map": {"at": 221260, "to": "mm"},
9118    "name": "CP_DRAW_WINDOW_HI",
9119    "type_ref": "CP_DRAW_WINDOW_HI"
9120   },
9121   {
9122    "chips": ["gfx8"],
9123    "map": {"at": 221264, "to": "mm"},
9124    "name": "CP_DRAW_WINDOW_LO",
9125    "type_ref": "CP_DRAW_WINDOW_LO"
9126   },
9127   {
9128    "chips": ["gfx8"],
9129    "map": {"at": 221268, "to": "mm"},
9130    "name": "CP_DRAW_WINDOW_CNTL",
9131    "type_ref": "CP_DRAW_WINDOW_CNTL"
9132   },
9133   {
9134    "chips": ["gfx8"],
9135    "map": {"at": 221440, "to": "mm"},
9136    "name": "GRBM_PERFCOUNTER0_SELECT",
9137    "type_ref": "GRBM_PERFCOUNTER0_SELECT"
9138   },
9139   {
9140    "chips": ["gfx8"],
9141    "map": {"at": 221444, "to": "mm"},
9142    "name": "GRBM_PERFCOUNTER1_SELECT",
9143    "type_ref": "GRBM_PERFCOUNTER0_SELECT"
9144   },
9145   {
9146    "chips": ["gfx8"],
9147    "map": {"at": 221448, "to": "mm"},
9148    "name": "GRBM_SE0_PERFCOUNTER_SELECT",
9149    "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
9150   },
9151   {
9152    "chips": ["gfx8"],
9153    "map": {"at": 221452, "to": "mm"},
9154    "name": "GRBM_SE1_PERFCOUNTER_SELECT",
9155    "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
9156   },
9157   {
9158    "chips": ["gfx8"],
9159    "map": {"at": 221456, "to": "mm"},
9160    "name": "GRBM_SE2_PERFCOUNTER_SELECT",
9161    "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
9162   },
9163   {
9164    "chips": ["gfx8"],
9165    "map": {"at": 221460, "to": "mm"},
9166    "name": "GRBM_SE3_PERFCOUNTER_SELECT",
9167    "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
9168   },
9169   {
9170    "chips": ["gfx8"],
9171    "map": {"at": 221696, "to": "mm"},
9172    "name": "WD_PERFCOUNTER0_SELECT",
9173    "type_ref": "VGT_PERFCOUNTER2_SELECT"
9174   },
9175   {
9176    "chips": ["gfx8"],
9177    "map": {"at": 221700, "to": "mm"},
9178    "name": "WD_PERFCOUNTER1_SELECT",
9179    "type_ref": "VGT_PERFCOUNTER2_SELECT"
9180   },
9181   {
9182    "chips": ["gfx8"],
9183    "map": {"at": 221704, "to": "mm"},
9184    "name": "WD_PERFCOUNTER2_SELECT",
9185    "type_ref": "VGT_PERFCOUNTER2_SELECT"
9186   },
9187   {
9188    "chips": ["gfx8"],
9189    "map": {"at": 221708, "to": "mm"},
9190    "name": "WD_PERFCOUNTER3_SELECT",
9191    "type_ref": "VGT_PERFCOUNTER2_SELECT"
9192   },
9193   {
9194    "chips": ["gfx8"],
9195    "map": {"at": 221712, "to": "mm"},
9196    "name": "IA_PERFCOUNTER0_SELECT",
9197    "type_ref": "DB_PERFCOUNTER0_SELECT"
9198   },
9199   {
9200    "chips": ["gfx8"],
9201    "map": {"at": 221716, "to": "mm"},
9202    "name": "IA_PERFCOUNTER1_SELECT",
9203    "type_ref": "VGT_PERFCOUNTER2_SELECT"
9204   },
9205   {
9206    "chips": ["gfx8"],
9207    "map": {"at": 221720, "to": "mm"},
9208    "name": "IA_PERFCOUNTER2_SELECT",
9209    "type_ref": "VGT_PERFCOUNTER2_SELECT"
9210   },
9211   {
9212    "chips": ["gfx8"],
9213    "map": {"at": 221724, "to": "mm"},
9214    "name": "IA_PERFCOUNTER3_SELECT",
9215    "type_ref": "VGT_PERFCOUNTER2_SELECT"
9216   },
9217   {
9218    "chips": ["gfx8"],
9219    "map": {"at": 221728, "to": "mm"},
9220    "name": "IA_PERFCOUNTER0_SELECT1",
9221    "type_ref": "DB_PERFCOUNTER0_SELECT1"
9222   },
9223   {
9224    "chips": ["gfx8"],
9225    "map": {"at": 221744, "to": "mm"},
9226    "name": "VGT_PERFCOUNTER0_SELECT",
9227    "type_ref": "DB_PERFCOUNTER0_SELECT"
9228   },
9229   {
9230    "chips": ["gfx8"],
9231    "map": {"at": 221748, "to": "mm"},
9232    "name": "VGT_PERFCOUNTER1_SELECT",
9233    "type_ref": "DB_PERFCOUNTER0_SELECT"
9234   },
9235   {
9236    "chips": ["gfx8"],
9237    "map": {"at": 221752, "to": "mm"},
9238    "name": "VGT_PERFCOUNTER2_SELECT",
9239    "type_ref": "VGT_PERFCOUNTER2_SELECT"
9240   },
9241   {
9242    "chips": ["gfx8"],
9243    "map": {"at": 221756, "to": "mm"},
9244    "name": "VGT_PERFCOUNTER3_SELECT",
9245    "type_ref": "VGT_PERFCOUNTER2_SELECT"
9246   },
9247   {
9248    "chips": ["gfx8"],
9249    "map": {"at": 221760, "to": "mm"},
9250    "name": "VGT_PERFCOUNTER0_SELECT1",
9251    "type_ref": "DB_PERFCOUNTER0_SELECT1"
9252   },
9253   {
9254    "chips": ["gfx8"],
9255    "map": {"at": 221764, "to": "mm"},
9256    "name": "VGT_PERFCOUNTER1_SELECT1",
9257    "type_ref": "DB_PERFCOUNTER0_SELECT1"
9258   },
9259   {
9260    "chips": ["gfx8"],
9261    "map": {"at": 221776, "to": "mm"},
9262    "name": "VGT_PERFCOUNTER_SEID_MASK",
9263    "type_ref": "VGT_PERFCOUNTER_SEID_MASK"
9264   },
9265   {
9266    "chips": ["gfx8"],
9267    "map": {"at": 222208, "to": "mm"},
9268    "name": "PA_SU_PERFCOUNTER0_SELECT",
9269    "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
9270   },
9271   {
9272    "chips": ["gfx8"],
9273    "map": {"at": 222212, "to": "mm"},
9274    "name": "PA_SU_PERFCOUNTER0_SELECT1",
9275    "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
9276   },
9277   {
9278    "chips": ["gfx8"],
9279    "map": {"at": 222216, "to": "mm"},
9280    "name": "PA_SU_PERFCOUNTER1_SELECT",
9281    "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
9282   },
9283   {
9284    "chips": ["gfx8"],
9285    "map": {"at": 222220, "to": "mm"},
9286    "name": "PA_SU_PERFCOUNTER1_SELECT1",
9287    "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
9288   },
9289   {
9290    "chips": ["gfx8"],
9291    "map": {"at": 222224, "to": "mm"},
9292    "name": "PA_SU_PERFCOUNTER2_SELECT",
9293    "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9294   },
9295   {
9296    "chips": ["gfx8"],
9297    "map": {"at": 222228, "to": "mm"},
9298    "name": "PA_SU_PERFCOUNTER3_SELECT",
9299    "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
9300   },
9301   {
9302    "chips": ["gfx8"],
9303    "map": {"at": 222464, "to": "mm"},
9304    "name": "PA_SC_PERFCOUNTER0_SELECT",
9305    "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
9306   },
9307   {
9308    "chips": ["gfx8"],
9309    "map": {"at": 222468, "to": "mm"},
9310    "name": "PA_SC_PERFCOUNTER0_SELECT1",
9311    "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
9312   },
9313   {
9314    "chips": ["gfx8"],
9315    "map": {"at": 222472, "to": "mm"},
9316    "name": "PA_SC_PERFCOUNTER1_SELECT",
9317    "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9318   },
9319   {
9320    "chips": ["gfx8"],
9321    "map": {"at": 222476, "to": "mm"},
9322    "name": "PA_SC_PERFCOUNTER2_SELECT",
9323    "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9324   },
9325   {
9326    "chips": ["gfx8"],
9327    "map": {"at": 222480, "to": "mm"},
9328    "name": "PA_SC_PERFCOUNTER3_SELECT",
9329    "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9330   },
9331   {
9332    "chips": ["gfx8"],
9333    "map": {"at": 222484, "to": "mm"},
9334    "name": "PA_SC_PERFCOUNTER4_SELECT",
9335    "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9336   },
9337   {
9338    "chips": ["gfx8"],
9339    "map": {"at": 222488, "to": "mm"},
9340    "name": "PA_SC_PERFCOUNTER5_SELECT",
9341    "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9342   },
9343   {
9344    "chips": ["gfx8"],
9345    "map": {"at": 222492, "to": "mm"},
9346    "name": "PA_SC_PERFCOUNTER6_SELECT",
9347    "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9348   },
9349   {
9350    "chips": ["gfx8"],
9351    "map": {"at": 222496, "to": "mm"},
9352    "name": "PA_SC_PERFCOUNTER7_SELECT",
9353    "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
9354   },
9355   {
9356    "chips": ["gfx8"],
9357    "map": {"at": 222720, "to": "mm"},
9358    "name": "SPI_PERFCOUNTER0_SELECT",
9359    "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
9360   },
9361   {
9362    "chips": ["gfx8"],
9363    "map": {"at": 222724, "to": "mm"},
9364    "name": "SPI_PERFCOUNTER1_SELECT",
9365    "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
9366   },
9367   {
9368    "chips": ["gfx8"],
9369    "map": {"at": 222728, "to": "mm"},
9370    "name": "SPI_PERFCOUNTER2_SELECT",
9371    "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
9372   },
9373   {
9374    "chips": ["gfx8"],
9375    "map": {"at": 222732, "to": "mm"},
9376    "name": "SPI_PERFCOUNTER3_SELECT",
9377    "type_ref": "PA_SU_PERFCOUNTER0_SELECT"
9378   },
9379   {
9380    "chips": ["gfx8"],
9381    "map": {"at": 222736, "to": "mm"},
9382    "name": "SPI_PERFCOUNTER0_SELECT1",
9383    "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
9384   },
9385   {
9386    "chips": ["gfx8"],
9387    "map": {"at": 222740, "to": "mm"},
9388    "name": "SPI_PERFCOUNTER1_SELECT1",
9389    "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
9390   },
9391   {
9392    "chips": ["gfx8"],
9393    "map": {"at": 222744, "to": "mm"},
9394    "name": "SPI_PERFCOUNTER2_SELECT1",
9395    "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
9396   },
9397   {
9398    "chips": ["gfx8"],
9399    "map": {"at": 222748, "to": "mm"},
9400    "name": "SPI_PERFCOUNTER3_SELECT1",
9401    "type_ref": "PA_SU_PERFCOUNTER0_SELECT1"
9402   },
9403   {
9404    "chips": ["gfx8"],
9405    "map": {"at": 222752, "to": "mm"},
9406    "name": "SPI_PERFCOUNTER4_SELECT",
9407    "type_ref": "SPI_PERFCOUNTER4_SELECT"
9408   },
9409   {
9410    "chips": ["gfx8"],
9411    "map": {"at": 222756, "to": "mm"},
9412    "name": "SPI_PERFCOUNTER5_SELECT",
9413    "type_ref": "SPI_PERFCOUNTER4_SELECT"
9414   },
9415   {
9416    "chips": ["gfx8"],
9417    "map": {"at": 222760, "to": "mm"},
9418    "name": "SPI_PERFCOUNTER_BINS",
9419    "type_ref": "SPI_PERFCOUNTER_BINS"
9420   },
9421   {
9422    "chips": ["gfx8"],
9423    "map": {"at": 222976, "to": "mm"},
9424    "name": "SQ_PERFCOUNTER0_SELECT",
9425    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9426   },
9427   {
9428    "chips": ["gfx8"],
9429    "map": {"at": 222980, "to": "mm"},
9430    "name": "SQ_PERFCOUNTER1_SELECT",
9431    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9432   },
9433   {
9434    "chips": ["gfx8"],
9435    "map": {"at": 222984, "to": "mm"},
9436    "name": "SQ_PERFCOUNTER2_SELECT",
9437    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9438   },
9439   {
9440    "chips": ["gfx8"],
9441    "map": {"at": 222988, "to": "mm"},
9442    "name": "SQ_PERFCOUNTER3_SELECT",
9443    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9444   },
9445   {
9446    "chips": ["gfx8"],
9447    "map": {"at": 222992, "to": "mm"},
9448    "name": "SQ_PERFCOUNTER4_SELECT",
9449    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9450   },
9451   {
9452    "chips": ["gfx8"],
9453    "map": {"at": 222996, "to": "mm"},
9454    "name": "SQ_PERFCOUNTER5_SELECT",
9455    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9456   },
9457   {
9458    "chips": ["gfx8"],
9459    "map": {"at": 223000, "to": "mm"},
9460    "name": "SQ_PERFCOUNTER6_SELECT",
9461    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9462   },
9463   {
9464    "chips": ["gfx8"],
9465    "map": {"at": 223004, "to": "mm"},
9466    "name": "SQ_PERFCOUNTER7_SELECT",
9467    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9468   },
9469   {
9470    "chips": ["gfx8"],
9471    "map": {"at": 223008, "to": "mm"},
9472    "name": "SQ_PERFCOUNTER8_SELECT",
9473    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9474   },
9475   {
9476    "chips": ["gfx8"],
9477    "map": {"at": 223012, "to": "mm"},
9478    "name": "SQ_PERFCOUNTER9_SELECT",
9479    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9480   },
9481   {
9482    "chips": ["gfx8"],
9483    "map": {"at": 223016, "to": "mm"},
9484    "name": "SQ_PERFCOUNTER10_SELECT",
9485    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9486   },
9487   {
9488    "chips": ["gfx8"],
9489    "map": {"at": 223020, "to": "mm"},
9490    "name": "SQ_PERFCOUNTER11_SELECT",
9491    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9492   },
9493   {
9494    "chips": ["gfx8"],
9495    "map": {"at": 223024, "to": "mm"},
9496    "name": "SQ_PERFCOUNTER12_SELECT",
9497    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9498   },
9499   {
9500    "chips": ["gfx8"],
9501    "map": {"at": 223028, "to": "mm"},
9502    "name": "SQ_PERFCOUNTER13_SELECT",
9503    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9504   },
9505   {
9506    "chips": ["gfx8"],
9507    "map": {"at": 223032, "to": "mm"},
9508    "name": "SQ_PERFCOUNTER14_SELECT",
9509    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9510   },
9511   {
9512    "chips": ["gfx8"],
9513    "map": {"at": 223036, "to": "mm"},
9514    "name": "SQ_PERFCOUNTER15_SELECT",
9515    "type_ref": "SQ_PERFCOUNTER0_SELECT"
9516   },
9517   {
9518    "chips": ["gfx8"],
9519    "map": {"at": 223104, "to": "mm"},
9520    "name": "SQ_PERFCOUNTER_CTRL",
9521    "type_ref": "SQ_PERFCOUNTER_CTRL"
9522   },
9523   {
9524    "chips": ["gfx8"],
9525    "map": {"at": 223108, "to": "mm"},
9526    "name": "SQ_PERFCOUNTER_MASK",
9527    "type_ref": "SQ_PERFCOUNTER_MASK"
9528   },
9529   {
9530    "chips": ["gfx8"],
9531    "map": {"at": 223112, "to": "mm"},
9532    "name": "SQ_PERFCOUNTER_CTRL2",
9533    "type_ref": "SQ_PERFCOUNTER_CTRL2"
9534   },
9535   {
9536    "chips": ["gfx8"],
9537    "map": {"at": 223488, "to": "mm"},
9538    "name": "SX_PERFCOUNTER0_SELECT",
9539    "type_ref": "SX_PERFCOUNTER0_SELECT"
9540   },
9541   {
9542    "chips": ["gfx8"],
9543    "map": {"at": 223492, "to": "mm"},
9544    "name": "SX_PERFCOUNTER1_SELECT",
9545    "type_ref": "SX_PERFCOUNTER0_SELECT"
9546   },
9547   {
9548    "chips": ["gfx8"],
9549    "map": {"at": 223496, "to": "mm"},
9550    "name": "SX_PERFCOUNTER2_SELECT",
9551    "type_ref": "SX_PERFCOUNTER0_SELECT"
9552   },
9553   {
9554    "chips": ["gfx8"],
9555    "map": {"at": 223500, "to": "mm"},
9556    "name": "SX_PERFCOUNTER3_SELECT",
9557    "type_ref": "SX_PERFCOUNTER0_SELECT"
9558   },
9559   {
9560    "chips": ["gfx8"],
9561    "map": {"at": 223504, "to": "mm"},
9562    "name": "SX_PERFCOUNTER0_SELECT1",
9563    "type_ref": "SX_PERFCOUNTER0_SELECT1"
9564   },
9565   {
9566    "chips": ["gfx8"],
9567    "map": {"at": 223508, "to": "mm"},
9568    "name": "SX_PERFCOUNTER1_SELECT1",
9569    "type_ref": "SX_PERFCOUNTER0_SELECT1"
9570   },
9571   {
9572    "chips": ["gfx8"],
9573    "map": {"at": 223744, "to": "mm"},
9574    "name": "GDS_PERFCOUNTER0_SELECT",
9575    "type_ref": "SX_PERFCOUNTER0_SELECT"
9576   },
9577   {
9578    "chips": ["gfx8"],
9579    "map": {"at": 223748, "to": "mm"},
9580    "name": "GDS_PERFCOUNTER1_SELECT",
9581    "type_ref": "SX_PERFCOUNTER0_SELECT"
9582   },
9583   {
9584    "chips": ["gfx8"],
9585    "map": {"at": 223752, "to": "mm"},
9586    "name": "GDS_PERFCOUNTER2_SELECT",
9587    "type_ref": "SX_PERFCOUNTER0_SELECT"
9588   },
9589   {
9590    "chips": ["gfx8"],
9591    "map": {"at": 223756, "to": "mm"},
9592    "name": "GDS_PERFCOUNTER3_SELECT",
9593    "type_ref": "SX_PERFCOUNTER0_SELECT"
9594   },
9595   {
9596    "chips": ["gfx8"],
9597    "map": {"at": 223760, "to": "mm"},
9598    "name": "GDS_PERFCOUNTER0_SELECT1",
9599    "type_ref": "SX_PERFCOUNTER0_SELECT1"
9600   },
9601   {
9602    "chips": ["gfx8"],
9603    "map": {"at": 224000, "to": "mm"},
9604    "name": "TA_PERFCOUNTER0_SELECT",
9605    "type_ref": "TD_PERFCOUNTER0_SELECT"
9606   },
9607   {
9608    "chips": ["gfx8"],
9609    "map": {"at": 224004, "to": "mm"},
9610    "name": "TA_PERFCOUNTER0_SELECT1",
9611    "type_ref": "TD_PERFCOUNTER0_SELECT1"
9612   },
9613   {
9614    "chips": ["gfx8"],
9615    "map": {"at": 224008, "to": "mm"},
9616    "name": "TA_PERFCOUNTER1_SELECT",
9617    "type_ref": "TD_PERFCOUNTER0_SELECT"
9618   },
9619   {
9620    "chips": ["gfx8"],
9621    "map": {"at": 224256, "to": "mm"},
9622    "name": "TD_PERFCOUNTER0_SELECT",
9623    "type_ref": "TD_PERFCOUNTER0_SELECT"
9624   },
9625   {
9626    "chips": ["gfx8"],
9627    "map": {"at": 224260, "to": "mm"},
9628    "name": "TD_PERFCOUNTER0_SELECT1",
9629    "type_ref": "TD_PERFCOUNTER0_SELECT1"
9630   },
9631   {
9632    "chips": ["gfx8"],
9633    "map": {"at": 224264, "to": "mm"},
9634    "name": "TD_PERFCOUNTER1_SELECT",
9635    "type_ref": "TD_PERFCOUNTER0_SELECT"
9636   },
9637   {
9638    "chips": ["gfx8"],
9639    "map": {"at": 224512, "to": "mm"},
9640    "name": "TCP_PERFCOUNTER0_SELECT",
9641    "type_ref": "DB_PERFCOUNTER0_SELECT"
9642   },
9643   {
9644    "chips": ["gfx8"],
9645    "map": {"at": 224516, "to": "mm"},
9646    "name": "TCP_PERFCOUNTER0_SELECT1",
9647    "type_ref": "DB_PERFCOUNTER0_SELECT1"
9648   },
9649   {
9650    "chips": ["gfx8"],
9651    "map": {"at": 224520, "to": "mm"},
9652    "name": "TCP_PERFCOUNTER1_SELECT",
9653    "type_ref": "DB_PERFCOUNTER0_SELECT"
9654   },
9655   {
9656    "chips": ["gfx8"],
9657    "map": {"at": 224524, "to": "mm"},
9658    "name": "TCP_PERFCOUNTER1_SELECT1",
9659    "type_ref": "DB_PERFCOUNTER0_SELECT1"
9660   },
9661   {
9662    "chips": ["gfx8"],
9663    "map": {"at": 224528, "to": "mm"},
9664    "name": "TCP_PERFCOUNTER2_SELECT",
9665    "type_ref": "TCC_PERFCOUNTER2_SELECT"
9666   },
9667   {
9668    "chips": ["gfx8"],
9669    "map": {"at": 224532, "to": "mm"},
9670    "name": "TCP_PERFCOUNTER3_SELECT",
9671    "type_ref": "TCC_PERFCOUNTER2_SELECT"
9672   },
9673   {
9674    "chips": ["gfx8"],
9675    "map": {"at": 224768, "to": "mm"},
9676    "name": "TCC_PERFCOUNTER0_SELECT",
9677    "type_ref": "DB_PERFCOUNTER0_SELECT"
9678   },
9679   {
9680    "chips": ["gfx8"],
9681    "map": {"at": 224772, "to": "mm"},
9682    "name": "TCC_PERFCOUNTER0_SELECT1",
9683    "type_ref": "TCC_PERFCOUNTER0_SELECT1"
9684   },
9685   {
9686    "chips": ["gfx8"],
9687    "map": {"at": 224776, "to": "mm"},
9688    "name": "TCC_PERFCOUNTER1_SELECT",
9689    "type_ref": "DB_PERFCOUNTER0_SELECT"
9690   },
9691   {
9692    "chips": ["gfx8"],
9693    "map": {"at": 224780, "to": "mm"},
9694    "name": "TCC_PERFCOUNTER1_SELECT1",
9695    "type_ref": "TCC_PERFCOUNTER0_SELECT1"
9696   },
9697   {
9698    "chips": ["gfx8"],
9699    "map": {"at": 224784, "to": "mm"},
9700    "name": "TCC_PERFCOUNTER2_SELECT",
9701    "type_ref": "TCC_PERFCOUNTER2_SELECT"
9702   },
9703   {
9704    "chips": ["gfx8"],
9705    "map": {"at": 224788, "to": "mm"},
9706    "name": "TCC_PERFCOUNTER3_SELECT",
9707    "type_ref": "TCC_PERFCOUNTER2_SELECT"
9708   },
9709   {
9710    "chips": ["gfx8"],
9711    "map": {"at": 224832, "to": "mm"},
9712    "name": "TCA_PERFCOUNTER0_SELECT",
9713    "type_ref": "DB_PERFCOUNTER0_SELECT"
9714   },
9715   {
9716    "chips": ["gfx8"],
9717    "map": {"at": 224836, "to": "mm"},
9718    "name": "TCA_PERFCOUNTER0_SELECT1",
9719    "type_ref": "TCC_PERFCOUNTER0_SELECT1"
9720   },
9721   {
9722    "chips": ["gfx8"],
9723    "map": {"at": 224840, "to": "mm"},
9724    "name": "TCA_PERFCOUNTER1_SELECT",
9725    "type_ref": "DB_PERFCOUNTER0_SELECT"
9726   },
9727   {
9728    "chips": ["gfx8"],
9729    "map": {"at": 224844, "to": "mm"},
9730    "name": "TCA_PERFCOUNTER1_SELECT1",
9731    "type_ref": "TCC_PERFCOUNTER0_SELECT1"
9732   },
9733   {
9734    "chips": ["gfx8"],
9735    "map": {"at": 224848, "to": "mm"},
9736    "name": "TCA_PERFCOUNTER2_SELECT",
9737    "type_ref": "TCC_PERFCOUNTER2_SELECT"
9738   },
9739   {
9740    "chips": ["gfx8"],
9741    "map": {"at": 224852, "to": "mm"},
9742    "name": "TCA_PERFCOUNTER3_SELECT",
9743    "type_ref": "TCC_PERFCOUNTER2_SELECT"
9744   },
9745   {
9746    "chips": ["gfx8"],
9747    "map": {"at": 225280, "to": "mm"},
9748    "name": "CB_PERFCOUNTER_FILTER",
9749    "type_ref": "CB_PERFCOUNTER_FILTER"
9750   },
9751   {
9752    "chips": ["gfx8"],
9753    "map": {"at": 225284, "to": "mm"},
9754    "name": "CB_PERFCOUNTER0_SELECT",
9755    "type_ref": "CB_PERFCOUNTER0_SELECT"
9756   },
9757   {
9758    "chips": ["gfx8"],
9759    "map": {"at": 225288, "to": "mm"},
9760    "name": "CB_PERFCOUNTER0_SELECT1",
9761    "type_ref": "CB_PERFCOUNTER0_SELECT1"
9762   },
9763   {
9764    "chips": ["gfx8"],
9765    "map": {"at": 225292, "to": "mm"},
9766    "name": "CB_PERFCOUNTER1_SELECT",
9767    "type_ref": "CB_PERFCOUNTER1_SELECT"
9768   },
9769   {
9770    "chips": ["gfx8"],
9771    "map": {"at": 225296, "to": "mm"},
9772    "name": "CB_PERFCOUNTER2_SELECT",
9773    "type_ref": "CB_PERFCOUNTER1_SELECT"
9774   },
9775   {
9776    "chips": ["gfx8"],
9777    "map": {"at": 225300, "to": "mm"},
9778    "name": "CB_PERFCOUNTER3_SELECT",
9779    "type_ref": "CB_PERFCOUNTER1_SELECT"
9780   },
9781   {
9782    "chips": ["gfx8"],
9783    "map": {"at": 225536, "to": "mm"},
9784    "name": "DB_PERFCOUNTER0_SELECT",
9785    "type_ref": "DB_PERFCOUNTER0_SELECT"
9786   },
9787   {
9788    "chips": ["gfx8"],
9789    "map": {"at": 225540, "to": "mm"},
9790    "name": "DB_PERFCOUNTER0_SELECT1",
9791    "type_ref": "DB_PERFCOUNTER0_SELECT1"
9792   },
9793   {
9794    "chips": ["gfx8"],
9795    "map": {"at": 225544, "to": "mm"},
9796    "name": "DB_PERFCOUNTER1_SELECT",
9797    "type_ref": "DB_PERFCOUNTER0_SELECT"
9798   },
9799   {
9800    "chips": ["gfx8"],
9801    "map": {"at": 225548, "to": "mm"},
9802    "name": "DB_PERFCOUNTER1_SELECT1",
9803    "type_ref": "DB_PERFCOUNTER0_SELECT1"
9804   },
9805   {
9806    "chips": ["gfx8"],
9807    "map": {"at": 225552, "to": "mm"},
9808    "name": "DB_PERFCOUNTER2_SELECT",
9809    "type_ref": "DB_PERFCOUNTER0_SELECT"
9810   },
9811   {
9812    "chips": ["gfx8"],
9813    "map": {"at": 225560, "to": "mm"},
9814    "name": "DB_PERFCOUNTER3_SELECT",
9815    "type_ref": "DB_PERFCOUNTER0_SELECT"
9816   },
9817   {
9818    "chips": ["gfx8"],
9819    "map": {"at": 225792, "to": "mm"},
9820    "name": "RLC_SPM_PERFMON_CNTL",
9821    "type_ref": "RLC_SPM_PERFMON_CNTL"
9822   },
9823   {
9824    "chips": ["gfx8"],
9825    "map": {"at": 225796, "to": "mm"},
9826    "name": "RLC_SPM_PERFMON_RING_BASE_LO",
9827    "type_ref": "RLC_SPM_PERFMON_RING_BASE_LO"
9828   },
9829   {
9830    "chips": ["gfx8"],
9831    "map": {"at": 225800, "to": "mm"},
9832    "name": "RLC_SPM_PERFMON_RING_BASE_HI",
9833    "type_ref": "RLC_SPM_PERFMON_RING_BASE_HI"
9834   },
9835   {
9836    "chips": ["gfx8"],
9837    "map": {"at": 225804, "to": "mm"},
9838    "name": "RLC_SPM_PERFMON_RING_SIZE",
9839    "type_ref": "RLC_SPM_PERFMON_RING_SIZE"
9840   },
9841   {
9842    "chips": ["gfx8"],
9843    "map": {"at": 225808, "to": "mm"},
9844    "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",
9845    "type_ref": "RLC_SPM_PERFMON_SEGMENT_SIZE"
9846   },
9847   {
9848    "chips": ["gfx8"],
9849    "map": {"at": 225812, "to": "mm"},
9850    "name": "RLC_SPM_SE_MUXSEL_ADDR",
9851    "type_ref": "RLC_SPM_SE_MUXSEL_ADDR"
9852   },
9853   {
9854    "chips": ["gfx8"],
9855    "map": {"at": 225816, "to": "mm"},
9856    "name": "RLC_SPM_SE_MUXSEL_DATA",
9857    "type_ref": "RLC_SPM_SE_MUXSEL_DATA"
9858   },
9859   {
9860    "chips": ["gfx8"],
9861    "map": {"at": 225820, "to": "mm"},
9862    "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",
9863    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9864   },
9865   {
9866    "chips": ["gfx8"],
9867    "map": {"at": 225824, "to": "mm"},
9868    "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",
9869    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9870   },
9871   {
9872    "chips": ["gfx8"],
9873    "map": {"at": 225828, "to": "mm"},
9874    "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",
9875    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9876   },
9877   {
9878    "chips": ["gfx8"],
9879    "map": {"at": 225832, "to": "mm"},
9880    "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",
9881    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9882   },
9883   {
9884    "chips": ["gfx8"],
9885    "map": {"at": 225836, "to": "mm"},
9886    "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",
9887    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9888   },
9889   {
9890    "chips": ["gfx8"],
9891    "map": {"at": 225840, "to": "mm"},
9892    "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",
9893    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9894   },
9895   {
9896    "chips": ["gfx8"],
9897    "map": {"at": 225844, "to": "mm"},
9898    "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",
9899    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9900   },
9901   {
9902    "chips": ["gfx8"],
9903    "map": {"at": 225848, "to": "mm"},
9904    "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",
9905    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9906   },
9907   {
9908    "chips": ["gfx8"],
9909    "map": {"at": 225856, "to": "mm"},
9910    "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",
9911    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9912   },
9913   {
9914    "chips": ["gfx8"],
9915    "map": {"at": 225860, "to": "mm"},
9916    "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",
9917    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9918   },
9919   {
9920    "chips": ["gfx8"],
9921    "map": {"at": 225864, "to": "mm"},
9922    "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",
9923    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9924   },
9925   {
9926    "chips": ["gfx8"],
9927    "map": {"at": 225868, "to": "mm"},
9928    "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",
9929    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9930   },
9931   {
9932    "chips": ["gfx8"],
9933    "map": {"at": 225872, "to": "mm"},
9934    "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",
9935    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9936   },
9937   {
9938    "chips": ["gfx8"],
9939    "map": {"at": 225876, "to": "mm"},
9940    "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",
9941    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9942   },
9943   {
9944    "chips": ["gfx8"],
9945    "map": {"at": 225880, "to": "mm"},
9946    "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",
9947    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9948   },
9949   {
9950    "chips": ["gfx8"],
9951    "map": {"at": 225884, "to": "mm"},
9952    "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",
9953    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9954   },
9955   {
9956    "chips": ["gfx8"],
9957    "map": {"at": 225888, "to": "mm"},
9958    "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",
9959    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9960   },
9961   {
9962    "chips": ["gfx8"],
9963    "map": {"at": 225896, "to": "mm"},
9964    "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",
9965    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9966   },
9967   {
9968    "chips": ["gfx8"],
9969    "map": {"at": 225900, "to": "mm"},
9970    "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR",
9971    "type_ref": "RLC_SPM_SE_MUXSEL_ADDR"
9972   },
9973   {
9974    "chips": ["gfx8"],
9975    "map": {"at": 225904, "to": "mm"},
9976    "name": "RLC_SPM_GLOBAL_MUXSEL_DATA",
9977    "type_ref": "RLC_SPM_SE_MUXSEL_DATA"
9978   },
9979   {
9980    "chips": ["gfx8"],
9981    "map": {"at": 225908, "to": "mm"},
9982    "name": "RLC_SPM_RING_RDPTR",
9983    "type_ref": "RLC_SPM_RING_RDPTR"
9984   },
9985   {
9986    "chips": ["gfx8"],
9987    "map": {"at": 225912, "to": "mm"},
9988    "name": "RLC_SPM_SEGMENT_THRESHOLD",
9989    "type_ref": "RLC_SPM_SEGMENT_THRESHOLD"
9990   },
9991   {
9992    "chips": ["gfx8"],
9993    "map": {"at": 225916, "to": "mm"},
9994    "name": "RLC_SPM_DBR0_PERFMON_SAMPLE_DELAY",
9995    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
9996   },
9997   {
9998    "chips": ["gfx8"],
9999    "map": {"at": 225920, "to": "mm"},
10000    "name": "RLC_SPM_DBR1_PERFMON_SAMPLE_DELAY",
10001    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10002   },
10003   {
10004    "chips": ["gfx8"],
10005    "map": {"at": 225924, "to": "mm"},
10006    "name": "RLC_SPM_CBR0_PERFMON_SAMPLE_DELAY",
10007    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10008   },
10009   {
10010    "chips": ["gfx8"],
10011    "map": {"at": 225928, "to": "mm"},
10012    "name": "RLC_SPM_CBR1_PERFMON_SAMPLE_DELAY",
10013    "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10014   },
10015   {
10016    "chips": ["gfx8"],
10017    "map": {"at": 226044, "to": "mm"},
10018    "name": "RLC_PERFMON_CLK_CNTL",
10019    "type_ref": "RLC_PERFMON_CLK_CNTL"
10020   },
10021   {
10022    "chips": ["gfx8"],
10023    "map": {"at": 226048, "to": "mm"},
10024    "name": "RLC_PERFMON_CNTL",
10025    "type_ref": "RLC_PERFMON_CNTL"
10026   },
10027   {
10028    "chips": ["gfx8"],
10029    "map": {"at": 226052, "to": "mm"},
10030    "name": "RLC_PERFCOUNTER0_SELECT",
10031    "type_ref": "RLC_PERFCOUNTER0_SELECT"
10032   },
10033   {
10034    "chips": ["gfx8"],
10035    "map": {"at": 226056, "to": "mm"},
10036    "name": "RLC_PERFCOUNTER1_SELECT",
10037    "type_ref": "RLC_PERFCOUNTER0_SELECT"
10038   }
10039  ],
10040  "register_types": {
10041   "CB_BLEND0_CONTROL": {
10042    "fields": [
10043     {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},
10044     {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},
10045     {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},
10046     {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},
10047     {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},
10048     {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},
10049     {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},
10050     {"bits": [30, 30], "name": "ENABLE"},
10051     {"bits": [31, 31], "name": "DISABLE_ROP3"}
10052    ]
10053   },
10054   "CB_BLEND_ALPHA": {
10055    "fields": [
10056     {"bits": [0, 31], "name": "BLEND_ALPHA"}
10057    ]
10058   },
10059   "CB_BLEND_BLUE": {
10060    "fields": [
10061     {"bits": [0, 31], "name": "BLEND_BLUE"}
10062    ]
10063   },
10064   "CB_BLEND_GREEN": {
10065    "fields": [
10066     {"bits": [0, 31], "name": "BLEND_GREEN"}
10067    ]
10068   },
10069   "CB_BLEND_RED": {
10070    "fields": [
10071     {"bits": [0, 31], "name": "BLEND_RED"}
10072    ]
10073   },
10074   "CB_COLOR0_ATTRIB": {
10075    "fields": [
10076     {"bits": [0, 4], "name": "TILE_MODE_INDEX"},
10077     {"bits": [5, 9], "name": "FMASK_TILE_MODE_INDEX"},
10078     {"bits": [10, 11], "name": "FMASK_BANK_HEIGHT"},
10079     {"bits": [12, 14], "name": "NUM_SAMPLES"},
10080     {"bits": [15, 16], "name": "NUM_FRAGMENTS"},
10081     {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"}
10082    ]
10083   },
10084   "CB_COLOR0_BASE": {
10085    "fields": [
10086     {"bits": [0, 31], "name": "BASE_256B"}
10087    ]
10088   },
10089   "CB_COLOR0_CLEAR_WORD0": {
10090    "fields": [
10091     {"bits": [0, 31], "name": "CLEAR_WORD0"}
10092    ]
10093   },
10094   "CB_COLOR0_CLEAR_WORD1": {
10095    "fields": [
10096     {"bits": [0, 31], "name": "CLEAR_WORD1"}
10097    ]
10098   },
10099   "CB_COLOR0_CMASK_SLICE": {
10100    "fields": [
10101     {"bits": [0, 13], "name": "TILE_MAX"}
10102    ]
10103   },
10104   "CB_COLOR0_DCC_CONTROL": {
10105    "fields": [
10106     {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
10107     {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"},
10108     {"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNCOMPRESSED_BLOCK_SIZE"},
10109     {"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPRESSED_BLOCK_SIZE"},
10110     {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"},
10111     {"bits": [7, 8], "name": "COLOR_TRANSFORM"},
10112     {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"},
10113     {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"},
10114     {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"}
10115    ]
10116   },
10117   "CB_COLOR0_INFO": {
10118    "fields": [
10119     {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},
10120     {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},
10121     {"bits": [7, 7], "name": "LINEAR_GENERAL"},
10122     {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},
10123     {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},
10124     {"bits": [13, 13], "name": "FAST_CLEAR"},
10125     {"bits": [14, 14], "name": "COMPRESSION"},
10126     {"bits": [15, 15], "name": "BLEND_CLAMP"},
10127     {"bits": [16, 16], "name": "BLEND_BYPASS"},
10128     {"bits": [17, 17], "name": "SIMPLE_FLOAT"},
10129     {"bits": [18, 18], "name": "ROUND_MODE"},
10130     {"bits": [19, 19], "name": "CMASK_IS_LINEAR"},
10131     {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},
10132     {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},
10133     {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"},
10134     {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"},
10135     {"bits": [28, 28], "name": "DCC_ENABLE"},
10136     {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}
10137    ]
10138   },
10139   "CB_COLOR0_PITCH": {
10140    "fields": [
10141     {"bits": [0, 10], "name": "TILE_MAX"},
10142     {"bits": [20, 30], "name": "FMASK_TILE_MAX"}
10143    ]
10144   },
10145   "CB_COLOR0_SLICE": {
10146    "fields": [
10147     {"bits": [0, 21], "name": "TILE_MAX"}
10148    ]
10149   },
10150   "CB_COLOR0_VIEW": {
10151    "fields": [
10152     {"bits": [0, 10], "name": "SLICE_START"},
10153     {"bits": [13, 23], "name": "SLICE_MAX"}
10154    ]
10155   },
10156   "CB_COLOR_CONTROL": {
10157    "fields": [
10158     {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},
10159     {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},
10160     {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}
10161    ]
10162   },
10163   "CB_DCC_CONTROL": {
10164    "fields": [
10165     {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
10166     {"bits": [1, 1], "name": "OVERWRITE_COMBINER_MRT_SHARING_DISABLE"},
10167     {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"}
10168    ]
10169   },
10170   "CB_PERFCOUNTER0_HI": {
10171    "fields": [
10172     {"bits": [0, 31], "name": "PERFCOUNTER_HI"}
10173    ]
10174   },
10175   "CB_PERFCOUNTER0_LO": {
10176    "fields": [
10177     {"bits": [0, 31], "name": "PERFCOUNTER_LO"}
10178    ]
10179   },
10180   "CB_PERFCOUNTER0_SELECT": {
10181    "fields": [
10182     {"bits": [0, 8], "name": "PERF_SEL"},
10183     {"bits": [10, 18], "name": "PERF_SEL1"},
10184     {"bits": [20, 23], "name": "CNTR_MODE"},
10185     {"bits": [24, 27], "name": "PERF_MODE1"},
10186     {"bits": [28, 31], "name": "PERF_MODE"}
10187    ]
10188   },
10189   "CB_PERFCOUNTER0_SELECT1": {
10190    "fields": [
10191     {"bits": [0, 8], "name": "PERF_SEL2"},
10192     {"bits": [10, 18], "name": "PERF_SEL3"},
10193     {"bits": [24, 27], "name": "PERF_MODE3"},
10194     {"bits": [28, 31], "name": "PERF_MODE2"}
10195    ]
10196   },
10197   "CB_PERFCOUNTER1_SELECT": {
10198    "fields": [
10199     {"bits": [0, 8], "name": "PERF_SEL"},
10200     {"bits": [28, 31], "name": "PERF_MODE"}
10201    ]
10202   },
10203   "CB_PERFCOUNTER_FILTER": {
10204    "fields": [
10205     {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},
10206     {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},
10207     {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},
10208     {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},
10209     {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},
10210     {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},
10211     {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},
10212     {"bits": [13, 15], "name": "MRT_FILTER_SEL"},
10213     {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},
10214     {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},
10215     {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},
10216     {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}
10217    ]
10218   },
10219   "CB_SHADER_MASK": {
10220    "fields": [
10221     {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},
10222     {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},
10223     {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},
10224     {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},
10225     {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},
10226     {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},
10227     {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},
10228     {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}
10229    ]
10230   },
10231   "CB_TARGET_MASK": {
10232    "fields": [
10233     {"bits": [0, 3], "name": "TARGET0_ENABLE"},
10234     {"bits": [4, 7], "name": "TARGET1_ENABLE"},
10235     {"bits": [8, 11], "name": "TARGET2_ENABLE"},
10236     {"bits": [12, 15], "name": "TARGET3_ENABLE"},
10237     {"bits": [16, 19], "name": "TARGET4_ENABLE"},
10238     {"bits": [20, 23], "name": "TARGET5_ENABLE"},
10239     {"bits": [24, 27], "name": "TARGET6_ENABLE"},
10240     {"bits": [28, 31], "name": "TARGET7_ENABLE"}
10241    ]
10242   },
10243   "COHER_DEST_BASE_0": {
10244    "fields": [
10245     {"bits": [0, 31], "name": "DEST_BASE_256B"}
10246    ]
10247   },
10248   "COHER_DEST_BASE_HI_0": {
10249    "fields": [
10250     {"bits": [0, 31], "name": "DEST_BASE_HI_256B"}
10251    ]
10252   },
10253   "COMPUTE_DIM_X": {
10254    "fields": [
10255     {"bits": [0, 31], "name": "SIZE"}
10256    ]
10257   },
10258   "COMPUTE_DISPATCH_ID": {
10259    "fields": [
10260     {"bits": [0, 31], "name": "DISPATCH_ID"}
10261    ]
10262   },
10263   "COMPUTE_DISPATCH_INITIATOR": {
10264    "fields": [
10265     {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},
10266     {"bits": [1, 1], "name": "PARTIAL_TG_EN"},
10267     {"bits": [2, 2], "name": "FORCE_START_AT_000"},
10268     {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},
10269     {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},
10270     {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},
10271     {"bits": [6, 6], "name": "ORDER_MODE"},
10272     {"bits": [7, 9], "name": "DISPATCH_CACHE_CNTL"},
10273     {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},
10274     {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},
10275     {"bits": [12, 12], "name": "DATA_ATC"},
10276     {"bits": [14, 14], "name": "RESTORE"}
10277    ]
10278   },
10279   "COMPUTE_MISC_RESERVED": {
10280    "fields": [
10281     {"bits": [0, 1], "name": "SEND_SEID"},
10282     {"bits": [2, 2], "name": "RESERVED2"},
10283     {"bits": [3, 3], "name": "RESERVED3"},
10284     {"bits": [4, 4], "name": "RESERVED4"},
10285     {"bits": [5, 16], "name": "WAVE_ID_BASE"}
10286    ]
10287   },
10288   "COMPUTE_NUM_THREAD_X": {
10289    "fields": [
10290     {"bits": [0, 15], "name": "NUM_THREAD_FULL"},
10291     {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}
10292    ]
10293   },
10294   "COMPUTE_PERFCOUNT_ENABLE": {
10295    "fields": [
10296     {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}
10297    ]
10298   },
10299   "COMPUTE_PGM_HI": {
10300    "fields": [
10301     {"bits": [0, 7], "name": "DATA"},
10302     {"bits": [8, 8], "name": "INST_ATC"}
10303    ]
10304   },
10305   "COMPUTE_PGM_RSRC1": {
10306    "fields": [
10307     {"bits": [0, 5], "name": "VGPRS"},
10308     {"bits": [6, 9], "name": "SGPRS"},
10309     {"bits": [10, 11], "name": "PRIORITY"},
10310     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
10311     {"bits": [20, 20], "name": "PRIV"},
10312     {"bits": [21, 21], "name": "DX10_CLAMP"},
10313     {"bits": [22, 22], "name": "DEBUG_MODE"},
10314     {"bits": [23, 23], "name": "IEEE_MODE"},
10315     {"bits": [24, 24], "name": "BULKY"},
10316     {"bits": [25, 25], "name": "CDBG_USER"}
10317    ]
10318   },
10319   "COMPUTE_PGM_RSRC2": {
10320    "fields": [
10321     {"bits": [0, 0], "name": "SCRATCH_EN"},
10322     {"bits": [1, 5], "name": "USER_SGPR"},
10323     {"bits": [6, 6], "name": "TRAP_PRESENT"},
10324     {"bits": [7, 7], "name": "TGID_X_EN"},
10325     {"bits": [8, 8], "name": "TGID_Y_EN"},
10326     {"bits": [9, 9], "name": "TGID_Z_EN"},
10327     {"bits": [10, 10], "name": "TG_SIZE_EN"},
10328     {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},
10329     {"bits": [13, 14], "name": "EXCP_EN_MSB"},
10330     {"bits": [15, 23], "name": "LDS_SIZE"},
10331     {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
10332    ]
10333   },
10334   "COMPUTE_PIPELINESTAT_ENABLE": {
10335    "fields": [
10336     {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}
10337    ]
10338   },
10339   "COMPUTE_RELAUNCH": {
10340    "fields": [
10341     {"bits": [0, 29], "name": "PAYLOAD"},
10342     {"bits": [30, 30], "name": "IS_EVENT"},
10343     {"bits": [31, 31], "name": "IS_STATE"}
10344    ]
10345   },
10346   "COMPUTE_RESOURCE_LIMITS": {
10347    "fields": [
10348     {"bits": [0, 9], "name": "WAVES_PER_SH"},
10349     {"bits": [12, 15], "name": "TG_PER_CU"},
10350     {"bits": [16, 21], "name": "LOCK_THRESHOLD"},
10351     {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},
10352     {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},
10353     {"bits": [24, 26], "name": "CU_GROUP_COUNT"}
10354    ]
10355   },
10356   "COMPUTE_RESTART_X": {
10357    "fields": [
10358     {"bits": [0, 31], "name": "RESTART"}
10359    ]
10360   },
10361   "COMPUTE_START_X": {
10362    "fields": [
10363     {"bits": [0, 31], "name": "START"}
10364    ]
10365   },
10366   "COMPUTE_STATIC_THREAD_MGMT_SE0": {
10367    "fields": [
10368     {"bits": [0, 15], "name": "SH0_CU_EN"},
10369     {"bits": [16, 31], "name": "SH1_CU_EN"}
10370    ]
10371   },
10372   "COMPUTE_TBA_HI": {
10373    "fields": [
10374     {"bits": [0, 7], "name": "DATA"}
10375    ]
10376   },
10377   "COMPUTE_THREADGROUP_ID": {
10378    "fields": [
10379     {"bits": [0, 31], "name": "THREADGROUP_ID"}
10380    ]
10381   },
10382   "COMPUTE_THREAD_TRACE_ENABLE": {
10383    "fields": [
10384     {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}
10385    ]
10386   },
10387   "COMPUTE_TMPRING_SIZE": {
10388    "fields": [
10389     {"bits": [0, 11], "name": "WAVES"},
10390     {"bits": [12, 24], "name": "WAVESIZE"}
10391    ]
10392   },
10393   "COMPUTE_VMID": {
10394    "fields": [
10395     {"bits": [0, 3], "name": "DATA"}
10396    ]
10397   },
10398   "COMPUTE_WAVE_RESTORE_ADDR_HI": {
10399    "fields": [
10400     {"bits": [0, 15], "name": "ADDR"}
10401    ]
10402   },
10403   "COMPUTE_WAVE_RESTORE_ADDR_LO": {
10404    "fields": [
10405     {"bits": [0, 31], "name": "ADDR"}
10406    ]
10407   },
10408   "COMPUTE_WAVE_RESTORE_CONTROL": {
10409    "fields": [
10410     {"bits": [0, 0], "name": "ATC"},
10411     {"bits": [1, 2], "name": "MTYPE"}
10412    ]
10413   },
10414   "CPG_PERFCOUNTER0_SELECT": {
10415    "fields": [
10416     {"bits": [0, 5], "name": "PERF_SEL"},
10417     {"bits": [10, 15], "name": "PERF_SEL1"},
10418     {"bits": [20, 23], "name": "CNTR_MODE"}
10419    ]
10420   },
10421   "CPG_PERFCOUNTER0_SELECT1": {
10422    "fields": [
10423     {"bits": [0, 5], "name": "PERF_SEL2"},
10424     {"bits": [10, 15], "name": "PERF_SEL3"}
10425    ]
10426   },
10427   "CPG_PERFCOUNTER1_SELECT": {
10428    "fields": [
10429     {"bits": [0, 5], "name": "PERF_SEL"}
10430    ]
10431   },
10432   "CP_APPEND_ADDR_HI": {
10433    "fields": [
10434     {"bits": [0, 15], "name": "MEM_ADDR_HI"},
10435     {"bits": [16, 16], "name": "CS_PS_SEL"},
10436     {"bits": [25, 25], "name": "CACHE_POLICY"},
10437     {"bits": [27, 28], "name": "MTYPE"},
10438     {"bits": [29, 31], "name": "COMMAND"}
10439    ]
10440   },
10441   "CP_APPEND_ADDR_LO": {
10442    "fields": [
10443     {"bits": [2, 31], "name": "MEM_ADDR_LO"}
10444    ]
10445   },
10446   "CP_APPEND_DATA": {
10447    "fields": [
10448     {"bits": [0, 31], "name": "DATA"}
10449    ]
10450   },
10451   "CP_APPEND_LAST_CS_FENCE": {
10452    "fields": [
10453     {"bits": [0, 31], "name": "LAST_FENCE"}
10454    ]
10455   },
10456   "CP_CE_COUNTER": {
10457    "fields": [
10458     {"bits": [0, 31], "name": "CONST_ENGINE_COUNT"}
10459    ]
10460   },
10461   "CP_CE_IB1_BASE_HI": {
10462    "fields": [
10463     {"bits": [0, 15], "name": "IB1_BASE_HI"}
10464    ]
10465   },
10466   "CP_CE_IB1_BASE_LO": {
10467    "fields": [
10468     {"bits": [2, 31], "name": "IB1_BASE_LO"}
10469    ]
10470   },
10471   "CP_CE_IB1_BUFSZ": {
10472    "fields": [
10473     {"bits": [0, 19], "name": "IB1_BUFSZ"}
10474    ]
10475   },
10476   "CP_CE_IB2_BASE_HI": {
10477    "fields": [
10478     {"bits": [0, 15], "name": "IB2_BASE_HI"}
10479    ]
10480   },
10481   "CP_CE_IB2_BASE_LO": {
10482    "fields": [
10483     {"bits": [2, 31], "name": "IB2_BASE_LO"}
10484    ]
10485   },
10486   "CP_CE_IB2_BUFSZ": {
10487    "fields": [
10488     {"bits": [0, 19], "name": "IB2_BUFSZ"}
10489    ]
10490   },
10491   "CP_CE_INIT_BASE_HI": {
10492    "fields": [
10493     {"bits": [0, 15], "name": "INIT_BASE_HI"}
10494    ]
10495   },
10496   "CP_CE_INIT_BASE_LO": {
10497    "fields": [
10498     {"bits": [5, 31], "name": "INIT_BASE_LO"}
10499    ]
10500   },
10501   "CP_CE_INIT_BUFSZ": {
10502    "fields": [
10503     {"bits": [0, 11], "name": "INIT_BUFSZ"}
10504    ]
10505   },
10506   "CP_COHER_BASE": {
10507    "fields": [
10508     {"bits": [0, 31], "name": "COHER_BASE_256B"}
10509    ]
10510   },
10511   "CP_COHER_BASE_HI": {
10512    "fields": [
10513     {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}
10514    ]
10515   },
10516   "CP_COHER_CNTL": {
10517    "fields": [
10518     {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},
10519     {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},
10520     {"bits": [2, 2], "name": "TC_SD_ACTION_ENA"},
10521     {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"},
10522     {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},
10523     {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},
10524     {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},
10525     {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},
10526     {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},
10527     {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},
10528     {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},
10529     {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},
10530     {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},
10531     {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},
10532     {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},
10533     {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},
10534     {"bits": [21, 21], "name": "DEST_BASE_3_ENA"},
10535     {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},
10536     {"bits": [23, 23], "name": "TC_ACTION_ENA"},
10537     {"bits": [25, 25], "name": "CB_ACTION_ENA"},
10538     {"bits": [26, 26], "name": "DB_ACTION_ENA"},
10539     {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},
10540     {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},
10541     {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"},
10542     {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"},
10543     {"bits": [31, 31], "name": "SH_SD_ACTION_ENA"}
10544    ]
10545   },
10546   "CP_COHER_SIZE": {
10547    "fields": [
10548     {"bits": [0, 31], "name": "COHER_SIZE_256B"}
10549    ]
10550   },
10551   "CP_COHER_SIZE_HI": {
10552    "fields": [
10553     {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}
10554    ]
10555   },
10556   "CP_COHER_START_DELAY": {
10557    "fields": [
10558     {"bits": [0, 5], "name": "START_DELAY_COUNT"}
10559    ]
10560   },
10561   "CP_COHER_STATUS": {
10562    "fields": [
10563     {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},
10564     {"bits": [24, 25], "name": "MEID"},
10565     {"bits": [30, 30], "name": "PHASE1_STATUS"},
10566     {"bits": [31, 31], "name": "STATUS"}
10567    ]
10568   },
10569   "CP_CPC_BUSY_STAT": {
10570    "fields": [
10571     {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},
10572     {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},
10573     {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},
10574     {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},
10575     {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},
10576     {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},
10577     {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},
10578     {"bits": [7, 7], "name": "MEC1_TC_BUSY"},
10579     {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},
10580     {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},
10581     {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},
10582     {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},
10583     {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},
10584     {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},
10585     {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},
10586     {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},
10587     {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},
10588     {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},
10589     {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},
10590     {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},
10591     {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},
10592     {"bits": [23, 23], "name": "MEC2_TC_BUSY"},
10593     {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},
10594     {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},
10595     {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},
10596     {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},
10597     {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},
10598     {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}
10599    ]
10600   },
10601   "CP_CPC_GRBM_FREE_COUNT": {
10602    "fields": [
10603     {"bits": [0, 5], "name": "FREE_COUNT"}
10604    ]
10605   },
10606   "CP_CPC_HALT_HYST_COUNT": {
10607    "fields": [
10608     {"bits": [0, 3], "name": "COUNT"}
10609    ]
10610   },
10611   "CP_CPC_SCRATCH_DATA": {
10612    "fields": [
10613     {"bits": [0, 31], "name": "SCRATCH_DATA"}
10614    ]
10615   },
10616   "CP_CPC_SCRATCH_INDEX": {
10617    "fields": [
10618     {"bits": [0, 8], "name": "SCRATCH_INDEX"}
10619    ]
10620   },
10621   "CP_CPC_STALLED_STAT1": {
10622    "fields": [
10623     {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},
10624     {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},
10625     {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},
10626     {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},
10627     {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},
10628     {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},
10629     {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},
10630     {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},
10631     {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},
10632     {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},
10633     {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"},
10634     {"bits": [22, 22], "name": "ATCL2IU_WAITING_ON_FREE"},
10635     {"bits": [23, 23], "name": "ATCL2IU_WAITING_ON_TAGS"},
10636     {"bits": [24, 24], "name": "ATCL1_WAITING_ON_TRANS"}
10637    ]
10638   },
10639   "CP_CPC_STATUS": {
10640    "fields": [
10641     {"bits": [0, 0], "name": "MEC1_BUSY"},
10642     {"bits": [1, 1], "name": "MEC2_BUSY"},
10643     {"bits": [2, 2], "name": "DC0_BUSY"},
10644     {"bits": [3, 3], "name": "DC1_BUSY"},
10645     {"bits": [4, 4], "name": "RCIU1_BUSY"},
10646     {"bits": [5, 5], "name": "RCIU2_BUSY"},
10647     {"bits": [6, 6], "name": "ROQ1_BUSY"},
10648     {"bits": [7, 7], "name": "ROQ2_BUSY"},
10649     {"bits": [10, 10], "name": "TCIU_BUSY"},
10650     {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},
10651     {"bits": [12, 12], "name": "QU_BUSY"},
10652     {"bits": [13, 13], "name": "ATCL2IU_BUSY"},
10653     {"bits": [29, 29], "name": "CPG_CPC_BUSY"},
10654     {"bits": [30, 30], "name": "CPF_CPC_BUSY"},
10655     {"bits": [31, 31], "name": "CPC_BUSY"}
10656    ]
10657   },
10658   "CP_CPF_BUSY_STAT": {
10659    "fields": [
10660     {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},
10661     {"bits": [1, 1], "name": "CSF_RING_BUSY"},
10662     {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},
10663     {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},
10664     {"bits": [4, 4], "name": "CSF_STATE_BUSY"},
10665     {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},
10666     {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},
10667     {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},
10668     {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},
10669     {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},
10670     {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},
10671     {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},
10672     {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},
10673     {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},
10674     {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},
10675     {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},
10676     {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},
10677     {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},
10678     {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},
10679     {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},
10680     {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},
10681     {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},
10682     {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},
10683     {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},
10684     {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},
10685     {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},
10686     {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},
10687     {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},
10688     {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},
10689     {"bits": [30, 30], "name": "HQD_PQ_BUSY"},
10690     {"bits": [31, 31], "name": "HQD_IB_BUSY"}
10691    ]
10692   },
10693   "CP_CPF_STALLED_STAT1": {
10694    "fields": [
10695     {"bits": [0, 0], "name": "RING_FETCHING_DATA"},
10696     {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},
10697     {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},
10698     {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},
10699     {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},
10700     {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"},
10701     {"bits": [7, 7], "name": "ATCL2IU_WAITING_ON_FREE"},
10702     {"bits": [8, 8], "name": "ATCL2IU_WAITING_ON_TAGS"},
10703     {"bits": [9, 9], "name": "ATCL1_WAITING_ON_TRANS"}
10704    ]
10705   },
10706   "CP_CPF_STATUS": {
10707    "fields": [
10708     {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},
10709     {"bits": [1, 1], "name": "CSF_BUSY"},
10710     {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},
10711     {"bits": [5, 5], "name": "ROQ_RING_BUSY"},
10712     {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},
10713     {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},
10714     {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},
10715     {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},
10716     {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},
10717     {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},
10718     {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},
10719     {"bits": [13, 13], "name": "INTERRUPT_BUSY"},
10720     {"bits": [14, 14], "name": "TCIU_BUSY"},
10721     {"bits": [15, 15], "name": "HQD_BUSY"},
10722     {"bits": [16, 16], "name": "PRT_BUSY"},
10723     {"bits": [17, 17], "name": "ATCL2IU_BUSY"},
10724     {"bits": [26, 26], "name": "CPF_GFX_BUSY"},
10725     {"bits": [27, 27], "name": "CPF_CMP_BUSY"},
10726     {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"},
10727     {"bits": [30, 30], "name": "CPC_CPF_BUSY"},
10728     {"bits": [31, 31], "name": "CPF_BUSY"}
10729    ]
10730   },
10731   "CP_DMA_CNTL": {
10732    "fields": [
10733     {"bits": [4, 5], "name": "MIN_AVAILSZ"},
10734     {"bits": [16, 19], "name": "BUFFER_DEPTH"},
10735     {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},
10736     {"bits": [29, 29], "name": "PIO_FIFO_FULL"},
10737     {"bits": [30, 31], "name": "PIO_COUNT"}
10738    ]
10739   },
10740   "CP_DMA_ME_COMMAND": {
10741    "fields": [
10742     {"bits": [0, 20], "name": "BYTE_COUNT"},
10743     {"bits": [21, 21], "name": "DIS_WC"},
10744     {"bits": [22, 23], "name": "SRC_SWAP"},
10745     {"bits": [24, 25], "name": "DST_SWAP"},
10746     {"bits": [26, 26], "name": "SAS"},
10747     {"bits": [27, 27], "name": "DAS"},
10748     {"bits": [28, 28], "name": "SAIC"},
10749     {"bits": [29, 29], "name": "DAIC"},
10750     {"bits": [30, 30], "name": "RAW_WAIT"}
10751    ]
10752   },
10753   "CP_DMA_ME_CONTROL": {
10754    "fields": [
10755     {"bits": [10, 11], "name": "SRC_MTYPE"},
10756     {"bits": [12, 12], "name": "SRC_ATC"},
10757     {"bits": [13, 13], "name": "SRC_CACHE_POLICY"},
10758     {"bits": [20, 21], "name": "DST_SELECT"},
10759     {"bits": [22, 23], "name": "DST_MTYPE"},
10760     {"bits": [24, 24], "name": "DST_ATC"},
10761     {"bits": [25, 25], "name": "DST_CACHE_POLICY"},
10762     {"bits": [29, 30], "name": "SRC_SELECT"}
10763    ]
10764   },
10765   "CP_DMA_ME_DST_ADDR": {
10766    "fields": [
10767     {"bits": [0, 31], "name": "DST_ADDR"}
10768    ]
10769   },
10770   "CP_DMA_ME_DST_ADDR_HI": {
10771    "fields": [
10772     {"bits": [0, 15], "name": "DST_ADDR_HI"}
10773    ]
10774   },
10775   "CP_DMA_ME_SRC_ADDR": {
10776    "fields": [
10777     {"bits": [0, 31], "name": "SRC_ADDR"}
10778    ]
10779   },
10780   "CP_DMA_ME_SRC_ADDR_HI": {
10781    "fields": [
10782     {"bits": [0, 15], "name": "SRC_ADDR_HI"}
10783    ]
10784   },
10785   "CP_DMA_READ_TAGS": {
10786    "fields": [
10787     {"bits": [0, 25], "name": "DMA_READ_TAG"},
10788     {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}
10789    ]
10790   },
10791   "CP_DRAW_OBJECT": {
10792    "fields": [
10793     {"bits": [0, 31], "name": "OBJECT"}
10794    ]
10795   },
10796   "CP_DRAW_OBJECT_COUNTER": {
10797    "fields": [
10798     {"bits": [0, 15], "name": "COUNT"}
10799    ]
10800   },
10801   "CP_DRAW_WINDOW_CNTL": {
10802    "fields": [
10803     {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},
10804     {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},
10805     {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},
10806     {"bits": [8, 8], "name": "MODE"}
10807    ]
10808   },
10809   "CP_DRAW_WINDOW_HI": {
10810    "fields": [
10811     {"bits": [0, 31], "name": "WINDOW_HI"}
10812    ]
10813   },
10814   "CP_DRAW_WINDOW_LO": {
10815    "fields": [
10816     {"bits": [0, 15], "name": "MIN"},
10817     {"bits": [16, 31], "name": "MAX"}
10818    ]
10819   },
10820   "CP_DRAW_WINDOW_MASK_HI": {
10821    "fields": [
10822     {"bits": [0, 31], "name": "WINDOW_MASK_HI"}
10823    ]
10824   },
10825   "CP_EOP_DONE_ADDR_HI": {
10826    "fields": [
10827     {"bits": [0, 15], "name": "ADDR_HI"}
10828    ]
10829   },
10830   "CP_EOP_DONE_ADDR_LO": {
10831    "fields": [
10832     {"bits": [2, 31], "name": "ADDR_LO"}
10833    ]
10834   },
10835   "CP_EOP_DONE_CNTX_ID": {
10836    "fields": [
10837     {"bits": [0, 27], "name": "CNTX_ID"}
10838    ]
10839   },
10840   "CP_EOP_DONE_DATA_CNTL": {
10841    "fields": [
10842     {"bits": [0, 15], "name": "CNTX_ID"},
10843     {"bits": [16, 17], "name": "DST_SEL"},
10844     {"bits": [24, 26], "name": "INT_SEL"},
10845     {"bits": [29, 31], "name": "DATA_SEL"}
10846    ]
10847   },
10848   "CP_EOP_DONE_DATA_HI": {
10849    "fields": [
10850     {"bits": [0, 31], "name": "DATA_HI"}
10851    ]
10852   },
10853   "CP_EOP_DONE_DATA_LO": {
10854    "fields": [
10855     {"bits": [0, 31], "name": "DATA_LO"}
10856    ]
10857   },
10858   "CP_EOP_DONE_EVENT_CNTL": {
10859    "fields": [
10860     {"bits": [0, 6], "name": "WBINV_TC_OP"},
10861     {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},
10862     {"bits": [25, 25], "name": "CACHE_CONTROL"},
10863     {"bits": [27, 28], "name": "MTYPE"}
10864    ]
10865   },
10866   "CP_EOP_LAST_FENCE_HI": {
10867    "fields": [
10868     {"bits": [0, 31], "name": "LAST_FENCE_HI"}
10869    ]
10870   },
10871   "CP_EOP_LAST_FENCE_LO": {
10872    "fields": [
10873     {"bits": [0, 31], "name": "LAST_FENCE_LO"}
10874    ]
10875   },
10876   "CP_IB1_OFFSET": {
10877    "fields": [
10878     {"bits": [0, 19], "name": "IB1_OFFSET"}
10879    ]
10880   },
10881   "CP_IB1_PREAMBLE_BEGIN": {
10882    "fields": [
10883     {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}
10884    ]
10885   },
10886   "CP_IB1_PREAMBLE_END": {
10887    "fields": [
10888     {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}
10889    ]
10890   },
10891   "CP_IB2_OFFSET": {
10892    "fields": [
10893     {"bits": [0, 19], "name": "IB2_OFFSET"}
10894    ]
10895   },
10896   "CP_IB2_PREAMBLE_BEGIN": {
10897    "fields": [
10898     {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}
10899    ]
10900   },
10901   "CP_IB2_PREAMBLE_END": {
10902    "fields": [
10903     {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}
10904    ]
10905   },
10906   "CP_INDEX_TYPE": {
10907    "fields": [
10908     {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}
10909    ]
10910   },
10911   "CP_ME_MC_RADDR_HI": {
10912    "fields": [
10913     {"bits": [0, 15], "name": "ME_MC_RADDR_HI"},
10914     {"bits": [20, 21], "name": "MTYPE"},
10915     {"bits": [22, 22], "name": "CACHE_POLICY"}
10916    ]
10917   },
10918   "CP_ME_MC_RADDR_LO": {
10919    "fields": [
10920     {"bits": [0, 1], "name": "ME_MC_RADDR_SWAP"},
10921     {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}
10922    ]
10923   },
10924   "CP_ME_MC_WADDR_HI": {
10925    "fields": [
10926     {"bits": [0, 15], "name": "ME_MC_WADDR_HI"},
10927     {"bits": [20, 21], "name": "MTYPE"},
10928     {"bits": [22, 22], "name": "CACHE_POLICY"}
10929    ]
10930   },
10931   "CP_ME_MC_WADDR_LO": {
10932    "fields": [
10933     {"bits": [0, 1], "name": "ME_MC_WADDR_SWAP"},
10934     {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}
10935    ]
10936   },
10937   "CP_ME_MC_WDATA_HI": {
10938    "fields": [
10939     {"bits": [0, 31], "name": "ME_MC_WDATA_HI"}
10940    ]
10941   },
10942   "CP_ME_MC_WDATA_LO": {
10943    "fields": [
10944     {"bits": [0, 31], "name": "ME_MC_WDATA_LO"}
10945    ]
10946   },
10947   "CP_NUM_PRIM_NEEDED_COUNT0_HI": {
10948    "fields": [
10949     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_HI"}
10950    ]
10951   },
10952   "CP_NUM_PRIM_NEEDED_COUNT0_LO": {
10953    "fields": [
10954     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_LO"}
10955    ]
10956   },
10957   "CP_NUM_PRIM_NEEDED_COUNT1_HI": {
10958    "fields": [
10959     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_HI"}
10960    ]
10961   },
10962   "CP_NUM_PRIM_NEEDED_COUNT1_LO": {
10963    "fields": [
10964     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_LO"}
10965    ]
10966   },
10967   "CP_NUM_PRIM_NEEDED_COUNT2_HI": {
10968    "fields": [
10969     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_HI"}
10970    ]
10971   },
10972   "CP_NUM_PRIM_NEEDED_COUNT2_LO": {
10973    "fields": [
10974     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_LO"}
10975    ]
10976   },
10977   "CP_NUM_PRIM_NEEDED_COUNT3_HI": {
10978    "fields": [
10979     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_HI"}
10980    ]
10981   },
10982   "CP_NUM_PRIM_NEEDED_COUNT3_LO": {
10983    "fields": [
10984     {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_LO"}
10985    ]
10986   },
10987   "CP_NUM_PRIM_WRITTEN_COUNT0_HI": {
10988    "fields": [
10989     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_HI"}
10990    ]
10991   },
10992   "CP_NUM_PRIM_WRITTEN_COUNT0_LO": {
10993    "fields": [
10994     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_LO"}
10995    ]
10996   },
10997   "CP_NUM_PRIM_WRITTEN_COUNT1_HI": {
10998    "fields": [
10999     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_HI"}
11000    ]
11001   },
11002   "CP_NUM_PRIM_WRITTEN_COUNT1_LO": {
11003    "fields": [
11004     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_LO"}
11005    ]
11006   },
11007   "CP_NUM_PRIM_WRITTEN_COUNT2_HI": {
11008    "fields": [
11009     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_HI"}
11010    ]
11011   },
11012   "CP_NUM_PRIM_WRITTEN_COUNT2_LO": {
11013    "fields": [
11014     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_LO"}
11015    ]
11016   },
11017   "CP_NUM_PRIM_WRITTEN_COUNT3_HI": {
11018    "fields": [
11019     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_HI"}
11020    ]
11021   },
11022   "CP_NUM_PRIM_WRITTEN_COUNT3_LO": {
11023    "fields": [
11024     {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_LO"}
11025    ]
11026   },
11027   "CP_PA_CINVOC_COUNT_HI": {
11028    "fields": [
11029     {"bits": [0, 31], "name": "CINVOC_COUNT_HI"}
11030    ]
11031   },
11032   "CP_PA_CINVOC_COUNT_LO": {
11033    "fields": [
11034     {"bits": [0, 31], "name": "CINVOC_COUNT_LO"}
11035    ]
11036   },
11037   "CP_PA_CPRIM_COUNT_HI": {
11038    "fields": [
11039     {"bits": [0, 31], "name": "CPRIM_COUNT_HI"}
11040    ]
11041   },
11042   "CP_PA_CPRIM_COUNT_LO": {
11043    "fields": [
11044     {"bits": [0, 31], "name": "CPRIM_COUNT_LO"}
11045    ]
11046   },
11047   "CP_PERFMON_CNTL": {
11048    "fields": [
11049     {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
11050     {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},
11051     {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},
11052     {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
11053    ]
11054   },
11055   "CP_PERFMON_CNTX_CNTL": {
11056    "fields": [
11057     {"bits": [31, 31], "name": "PERFMON_ENABLE"}
11058    ]
11059   },
11060   "CP_PFP_ATOMIC_PREOP_HI": {
11061    "fields": [
11062     {"bits": [0, 31], "name": "ATOMIC_PREOP_HI"}
11063    ]
11064   },
11065   "CP_PFP_ATOMIC_PREOP_LO": {
11066    "fields": [
11067     {"bits": [0, 31], "name": "ATOMIC_PREOP_LO"}
11068    ]
11069   },
11070   "CP_PFP_COMPLETION_STATUS": {
11071    "fields": [
11072     {"bits": [0, 1], "name": "STATUS"}
11073    ]
11074   },
11075   "CP_PFP_GDS_ATOMIC0_PREOP_HI": {
11076    "fields": [
11077     {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_HI"}
11078    ]
11079   },
11080   "CP_PFP_GDS_ATOMIC0_PREOP_LO": {
11081    "fields": [
11082     {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_LO"}
11083    ]
11084   },
11085   "CP_PFP_GDS_ATOMIC1_PREOP_HI": {
11086    "fields": [
11087     {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_HI"}
11088    ]
11089   },
11090   "CP_PFP_GDS_ATOMIC1_PREOP_LO": {
11091    "fields": [
11092     {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_LO"}
11093    ]
11094   },
11095   "CP_PFP_IB_CONTROL": {
11096    "fields": [
11097     {"bits": [0, 7], "name": "IB_EN"}
11098    ]
11099   },
11100   "CP_PFP_LOAD_CONTROL": {
11101    "fields": [
11102     {"bits": [0, 0], "name": "CONFIG_REG_EN"},
11103     {"bits": [1, 1], "name": "CNTX_REG_EN"},
11104     {"bits": [16, 16], "name": "SH_GFX_REG_EN"},
11105     {"bits": [24, 24], "name": "SH_CS_REG_EN"}
11106    ]
11107   },
11108   "CP_PFP_METADATA_BASE_ADDR": {
11109    "fields": [
11110     {"bits": [0, 31], "name": "ADDR_LO"}
11111    ]
11112   },
11113   "CP_PIPE_STATS_ADDR_HI": {
11114    "fields": [
11115     {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}
11116    ]
11117   },
11118   "CP_PIPE_STATS_ADDR_LO": {
11119    "fields": [
11120     {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}
11121    ]
11122   },
11123   "CP_PIPE_STATS_CONTROL": {
11124    "fields": [
11125     {"bits": [25, 25], "name": "CACHE_CONTROL"},
11126     {"bits": [27, 28], "name": "MTYPE"}
11127    ]
11128   },
11129   "CP_PRED_NOT_VISIBLE": {
11130    "fields": [
11131     {"bits": [0, 0], "name": "NOT_VISIBLE"}
11132    ]
11133   },
11134   "CP_RB_OFFSET": {
11135    "fields": [
11136     {"bits": [0, 19], "name": "RB_OFFSET"}
11137    ]
11138   },
11139   "CP_RINGID": {
11140    "fields": [
11141     {"bits": [0, 1], "name": "RINGID"}
11142    ]
11143   },
11144   "CP_SAMPLE_STATUS": {
11145    "fields": [
11146     {"bits": [0, 0], "name": "Z_PASS_ACITVE"},
11147     {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"},
11148     {"bits": [2, 2], "name": "PIPELINE_ACTIVE"},
11149     {"bits": [3, 3], "name": "STIPPLE_ACTIVE"},
11150     {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"},
11151     {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"},
11152     {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"},
11153     {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"}
11154    ]
11155   },
11156   "CP_SCRATCH_INDEX": {
11157    "fields": [
11158     {"bits": [0, 7], "name": "SCRATCH_INDEX"}
11159    ]
11160   },
11161   "CP_SC_PSINVOC_COUNT0_HI": {
11162    "fields": [
11163     {"bits": [0, 31], "name": "PSINVOC_COUNT0_HI"}
11164    ]
11165   },
11166   "CP_SC_PSINVOC_COUNT0_LO": {
11167    "fields": [
11168     {"bits": [0, 31], "name": "PSINVOC_COUNT0_LO"}
11169    ]
11170   },
11171   "CP_SC_PSINVOC_COUNT1_LO": {
11172    "fields": [
11173     {"bits": [0, 31], "name": "OBSOLETE"}
11174    ]
11175   },
11176   "CP_SEM_WAIT_TIMER": {
11177    "fields": [
11178     {"bits": [0, 31], "name": "SEM_WAIT_TIMER"}
11179    ]
11180   },
11181   "CP_SIG_SEM_ADDR_HI": {
11182    "fields": [
11183     {"bits": [0, 15], "name": "SEM_ADDR_HI"},
11184     {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},
11185     {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},
11186     {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},
11187     {"bits": [29, 31], "name": "SEM_SELECT"}
11188    ]
11189   },
11190   "CP_SIG_SEM_ADDR_LO": {
11191    "fields": [
11192     {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},
11193     {"bits": [3, 31], "name": "SEM_ADDR_LO"}
11194    ]
11195   },
11196   "CP_STREAM_OUT_ADDR_HI": {
11197    "fields": [
11198     {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}
11199    ]
11200   },
11201   "CP_STREAM_OUT_ADDR_LO": {
11202    "fields": [
11203     {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}
11204    ]
11205   },
11206   "CP_STRMOUT_CNTL": {
11207    "fields": [
11208     {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}
11209    ]
11210   },
11211   "CP_ST_BASE_HI": {
11212    "fields": [
11213     {"bits": [0, 15], "name": "ST_BASE_HI"}
11214    ]
11215   },
11216   "CP_ST_BASE_LO": {
11217    "fields": [
11218     {"bits": [2, 31], "name": "ST_BASE_LO"}
11219    ]
11220   },
11221   "CP_ST_BUFSZ": {
11222    "fields": [
11223     {"bits": [0, 19], "name": "ST_BUFSZ"}
11224    ]
11225   },
11226   "CP_VGT_CSINVOC_COUNT_HI": {
11227    "fields": [
11228     {"bits": [0, 31], "name": "CSINVOC_COUNT_HI"}
11229    ]
11230   },
11231   "CP_VGT_CSINVOC_COUNT_LO": {
11232    "fields": [
11233     {"bits": [0, 31], "name": "CSINVOC_COUNT_LO"}
11234    ]
11235   },
11236   "CP_VGT_DSINVOC_COUNT_HI": {
11237    "fields": [
11238     {"bits": [0, 31], "name": "DSINVOC_COUNT_HI"}
11239    ]
11240   },
11241   "CP_VGT_DSINVOC_COUNT_LO": {
11242    "fields": [
11243     {"bits": [0, 31], "name": "DSINVOC_COUNT_LO"}
11244    ]
11245   },
11246   "CP_VGT_GSINVOC_COUNT_HI": {
11247    "fields": [
11248     {"bits": [0, 31], "name": "GSINVOC_COUNT_HI"}
11249    ]
11250   },
11251   "CP_VGT_GSINVOC_COUNT_LO": {
11252    "fields": [
11253     {"bits": [0, 31], "name": "GSINVOC_COUNT_LO"}
11254    ]
11255   },
11256   "CP_VGT_GSPRIM_COUNT_HI": {
11257    "fields": [
11258     {"bits": [0, 31], "name": "GSPRIM_COUNT_HI"}
11259    ]
11260   },
11261   "CP_VGT_GSPRIM_COUNT_LO": {
11262    "fields": [
11263     {"bits": [0, 31], "name": "GSPRIM_COUNT_LO"}
11264    ]
11265   },
11266   "CP_VGT_HSINVOC_COUNT_HI": {
11267    "fields": [
11268     {"bits": [0, 31], "name": "HSINVOC_COUNT_HI"}
11269    ]
11270   },
11271   "CP_VGT_HSINVOC_COUNT_LO": {
11272    "fields": [
11273     {"bits": [0, 31], "name": "HSINVOC_COUNT_LO"}
11274    ]
11275   },
11276   "CP_VGT_IAPRIM_COUNT_HI": {
11277    "fields": [
11278     {"bits": [0, 31], "name": "IAPRIM_COUNT_HI"}
11279    ]
11280   },
11281   "CP_VGT_IAPRIM_COUNT_LO": {
11282    "fields": [
11283     {"bits": [0, 31], "name": "IAPRIM_COUNT_LO"}
11284    ]
11285   },
11286   "CP_VGT_IAVERT_COUNT_HI": {
11287    "fields": [
11288     {"bits": [0, 31], "name": "IAVERT_COUNT_HI"}
11289    ]
11290   },
11291   "CP_VGT_IAVERT_COUNT_LO": {
11292    "fields": [
11293     {"bits": [0, 31], "name": "IAVERT_COUNT_LO"}
11294    ]
11295   },
11296   "CP_VGT_VSINVOC_COUNT_HI": {
11297    "fields": [
11298     {"bits": [0, 31], "name": "VSINVOC_COUNT_HI"}
11299    ]
11300   },
11301   "CP_VGT_VSINVOC_COUNT_LO": {
11302    "fields": [
11303     {"bits": [0, 31], "name": "VSINVOC_COUNT_LO"}
11304    ]
11305   },
11306   "CP_VMID": {
11307    "fields": [
11308     {"bits": [0, 3], "name": "VMID"}
11309    ]
11310   },
11311   "CP_WAIT_REG_MEM_TIMEOUT": {
11312    "fields": [
11313     {"bits": [0, 31], "name": "WAIT_REG_MEM_TIMEOUT"}
11314    ]
11315   },
11316   "CS_COPY_STATE": {
11317    "fields": [
11318     {"bits": [0, 2], "name": "SRC_STATE_ID"}
11319    ]
11320   },
11321   "DB_ALPHA_TO_MASK": {
11322    "fields": [
11323     {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},
11324     {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},
11325     {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},
11326     {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},
11327     {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},
11328     {"bits": [16, 16], "name": "OFFSET_ROUND"}
11329    ]
11330   },
11331   "DB_COUNT_CONTROL": {
11332    "fields": [
11333     {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},
11334     {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},
11335     {"bits": [4, 6], "name": "SAMPLE_RATE"},
11336     {"bits": [8, 11], "name": "ZPASS_ENABLE"},
11337     {"bits": [12, 15], "name": "ZFAIL_ENABLE"},
11338     {"bits": [16, 19], "name": "SFAIL_ENABLE"},
11339     {"bits": [20, 23], "name": "DBFAIL_ENABLE"},
11340     {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},
11341     {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}
11342    ]
11343   },
11344   "DB_DEPTH_BOUNDS_MAX": {
11345    "fields": [
11346     {"bits": [0, 31], "name": "MAX"}
11347    ]
11348   },
11349   "DB_DEPTH_BOUNDS_MIN": {
11350    "fields": [
11351     {"bits": [0, 31], "name": "MIN"}
11352    ]
11353   },
11354   "DB_DEPTH_CLEAR": {
11355    "fields": [
11356     {"bits": [0, 31], "name": "DEPTH_CLEAR"}
11357    ]
11358   },
11359   "DB_DEPTH_CONTROL": {
11360    "fields": [
11361     {"bits": [0, 0], "name": "STENCIL_ENABLE"},
11362     {"bits": [1, 1], "name": "Z_ENABLE"},
11363     {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},
11364     {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},
11365     {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},
11366     {"bits": [7, 7], "name": "BACKFACE_ENABLE"},
11367     {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},
11368     {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},
11369     {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},
11370     {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}
11371    ]
11372   },
11373   "DB_DEPTH_INFO": {
11374    "fields": [
11375     {"bits": [0, 3], "name": "ADDR5_SWIZZLE_MASK"},
11376     {"bits": [4, 7], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
11377     {"bits": [8, 12], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
11378     {"bits": [13, 14], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
11379     {"bits": [15, 16], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
11380     {"bits": [17, 18], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
11381     {"bits": [19, 20], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
11382    ]
11383   },
11384   "DB_DEPTH_SIZE": {
11385    "fields": [
11386     {"bits": [0, 10], "name": "PITCH_TILE_MAX"},
11387     {"bits": [11, 21], "name": "HEIGHT_TILE_MAX"}
11388    ]
11389   },
11390   "DB_DEPTH_SLICE": {
11391    "fields": [
11392     {"bits": [0, 21], "name": "SLICE_TILE_MAX"}
11393    ]
11394   },
11395   "DB_DEPTH_VIEW": {
11396    "fields": [
11397     {"bits": [0, 10], "name": "SLICE_START"},
11398     {"bits": [13, 23], "name": "SLICE_MAX"},
11399     {"bits": [24, 24], "name": "Z_READ_ONLY"},
11400     {"bits": [25, 25], "name": "STENCIL_READ_ONLY"}
11401    ]
11402   },
11403   "DB_EQAA": {
11404    "fields": [
11405     {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},
11406     {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},
11407     {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},
11408     {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},
11409     {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},
11410     {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},
11411     {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},
11412     {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},
11413     {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},
11414     {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},
11415     {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},
11416     {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}
11417    ]
11418   },
11419   "DB_HTILE_SURFACE": {
11420    "fields": [
11421     {"bits": [0, 0], "name": "LINEAR"},
11422     {"bits": [1, 1], "name": "FULL_CACHE"},
11423     {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},
11424     {"bits": [3, 3], "name": "PRELOAD"},
11425     {"bits": [4, 9], "name": "PREFETCH_WIDTH"},
11426     {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},
11427     {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"},
11428     {"bits": [17, 17], "name": "TC_COMPATIBLE"}
11429    ]
11430   },
11431   "DB_PERFCOUNTER0_SELECT": {
11432    "fields": [
11433     {"bits": [0, 9], "name": "PERF_SEL"},
11434     {"bits": [10, 19], "name": "PERF_SEL1"},
11435     {"bits": [20, 23], "name": "CNTR_MODE"},
11436     {"bits": [24, 27], "name": "PERF_MODE1"},
11437     {"bits": [28, 31], "name": "PERF_MODE"}
11438    ]
11439   },
11440   "DB_PERFCOUNTER0_SELECT1": {
11441    "fields": [
11442     {"bits": [0, 9], "name": "PERF_SEL2"},
11443     {"bits": [10, 19], "name": "PERF_SEL3"},
11444     {"bits": [24, 27], "name": "PERF_MODE3"},
11445     {"bits": [28, 31], "name": "PERF_MODE2"}
11446    ]
11447   },
11448   "DB_PRELOAD_CONTROL": {
11449    "fields": [
11450     {"bits": [0, 7], "name": "START_X"},
11451     {"bits": [8, 15], "name": "START_Y"},
11452     {"bits": [16, 23], "name": "MAX_X"},
11453     {"bits": [24, 31], "name": "MAX_Y"}
11454    ]
11455   },
11456   "DB_RENDER_CONTROL": {
11457    "fields": [
11458     {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},
11459     {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},
11460     {"bits": [2, 2], "name": "DEPTH_COPY"},
11461     {"bits": [3, 3], "name": "STENCIL_COPY"},
11462     {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},
11463     {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},
11464     {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},
11465     {"bits": [7, 7], "name": "COPY_CENTROID"},
11466     {"bits": [8, 11], "name": "COPY_SAMPLE"},
11467     {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}
11468    ]
11469   },
11470   "DB_RENDER_OVERRIDE": {
11471    "fields": [
11472     {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},
11473     {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},
11474     {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},
11475     {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},
11476     {"bits": [7, 7], "name": "FAST_Z_DISABLE"},
11477     {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},
11478     {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},
11479     {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},
11480     {"bits": [11, 11], "name": "FORCE_Z_READ"},
11481     {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},
11482     {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},
11483     {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},
11484     {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},
11485     {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},
11486     {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},
11487     {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},
11488     {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},
11489     {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},
11490     {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},
11491     {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},
11492     {"bits": [29, 29], "name": "FORCE_Z_VALID"},
11493     {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},
11494     {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}
11495    ]
11496   },
11497   "DB_RENDER_OVERRIDE2": {
11498    "fields": [
11499     {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},
11500     {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},
11501     {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},
11502     {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},
11503     {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},
11504     {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},
11505     {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},
11506     {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},
11507     {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},
11508     {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},
11509     {"bits": [15, 17], "name": "HIS_SFUNC_FF"},
11510     {"bits": [18, 20], "name": "HIS_SFUNC_BF"},
11511     {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},
11512     {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},
11513     {"bits": [23, 23], "name": "DISABLE_FAST_PASS"}
11514    ]
11515   },
11516   "DB_SHADER_CONTROL": {
11517    "fields": [
11518     {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},
11519     {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},
11520     {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},
11521     {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},
11522     {"bits": [6, 6], "name": "KILL_ENABLE"},
11523     {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},
11524     {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},
11525     {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},
11526     {"bits": [10, 10], "name": "EXEC_ON_NOOP"},
11527     {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},
11528     {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},
11529     {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"}
11530    ]
11531   },
11532   "DB_SRESULTS_COMPARE_STATE0": {
11533    "fields": [
11534     {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},
11535     {"bits": [4, 11], "name": "COMPAREVALUE0"},
11536     {"bits": [12, 19], "name": "COMPAREMASK0"},
11537     {"bits": [24, 24], "name": "ENABLE0"}
11538    ]
11539   },
11540   "DB_SRESULTS_COMPARE_STATE1": {
11541    "fields": [
11542     {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},
11543     {"bits": [4, 11], "name": "COMPAREVALUE1"},
11544     {"bits": [12, 19], "name": "COMPAREMASK1"},
11545     {"bits": [24, 24], "name": "ENABLE1"}
11546    ]
11547   },
11548   "DB_STENCILREFMASK": {
11549    "fields": [
11550     {"bits": [0, 7], "name": "STENCILTESTVAL"},
11551     {"bits": [8, 15], "name": "STENCILMASK"},
11552     {"bits": [16, 23], "name": "STENCILWRITEMASK"},
11553     {"bits": [24, 31], "name": "STENCILOPVAL"}
11554    ]
11555   },
11556   "DB_STENCILREFMASK_BF": {
11557    "fields": [
11558     {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},
11559     {"bits": [8, 15], "name": "STENCILMASK_BF"},
11560     {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},
11561     {"bits": [24, 31], "name": "STENCILOPVAL_BF"}
11562    ]
11563   },
11564   "DB_STENCIL_CLEAR": {
11565    "fields": [
11566     {"bits": [0, 7], "name": "CLEAR"}
11567    ]
11568   },
11569   "DB_STENCIL_CONTROL": {
11570    "fields": [
11571     {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},
11572     {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},
11573     {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},
11574     {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},
11575     {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},
11576     {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}
11577    ]
11578   },
11579   "DB_STENCIL_INFO": {
11580    "fields": [
11581     {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},
11582     {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
11583     {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
11584     {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
11585     {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"},
11586     {"bits": [30, 30], "name": "CLEAR_DISALLOWED"}
11587    ]
11588   },
11589   "DB_ZPASS_COUNT_HI": {
11590    "fields": [
11591     {"bits": [0, 30], "name": "COUNT_HI"}
11592    ]
11593   },
11594   "DB_ZPASS_COUNT_LOW": {
11595    "fields": [
11596     {"bits": [0, 31], "name": "COUNT_LOW"}
11597    ]
11598   },
11599   "DB_Z_INFO": {
11600    "fields": [
11601     {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},
11602     {"bits": [2, 3], "name": "NUM_SAMPLES"},
11603     {"bits": [13, 15], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
11604     {"bits": [20, 22], "name": "TILE_MODE_INDEX"},
11605     {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"},
11606     {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
11607     {"bits": [28, 28], "name": "READ_SIZE"},
11608     {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},
11609     {"bits": [30, 30], "name": "CLEAR_DISALLOWED"},
11610     {"bits": [31, 31], "name": "ZRANGE_PRECISION"}
11611    ]
11612   },
11613   "GB_ADDR_CONFIG": {
11614    "fields": [
11615     {"bits": [0, 2], "name": "NUM_PIPES"},
11616     {"bits": [4, 6], "name": "PIPE_INTERLEAVE_SIZE"},
11617     {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},
11618     {"bits": [12, 13], "name": "NUM_SHADER_ENGINES"},
11619     {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},
11620     {"bits": [20, 22], "name": "NUM_GPUS"},
11621     {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},
11622     {"bits": [28, 29], "name": "ROW_SIZE"},
11623     {"bits": [30, 30], "name": "NUM_LOWER_PIPES"}
11624    ]
11625   },
11626   "GB_MACROTILE_MODE0": {
11627    "fields": [
11628     {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
11629     {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
11630     {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
11631     {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
11632    ]
11633   },
11634   "GB_TILE_MODE0": {
11635    "fields": [
11636     {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
11637     {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
11638     {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
11639     {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},
11640     {"bits": [25, 26], "name": "SAMPLE_SPLIT"}
11641    ]
11642   },
11643   "GDS_ATOM_BASE": {
11644    "fields": [
11645     {"bits": [0, 15], "name": "BASE"},
11646     {"bits": [16, 31], "name": "UNUSED"}
11647    ]
11648   },
11649   "GDS_ATOM_CNTL": {
11650    "fields": [
11651     {"bits": [0, 5], "name": "AINC"},
11652     {"bits": [6, 7], "name": "UNUSED1"},
11653     {"bits": [8, 9], "name": "DMODE"},
11654     {"bits": [10, 31], "name": "UNUSED2"}
11655    ]
11656   },
11657   "GDS_ATOM_COMPLETE": {
11658    "fields": [
11659     {"bits": [0, 0], "name": "COMPLETE"},
11660     {"bits": [1, 31], "name": "UNUSED"}
11661    ]
11662   },
11663   "GDS_ATOM_DST": {
11664    "fields": [
11665     {"bits": [0, 31], "name": "DST"}
11666    ]
11667   },
11668   "GDS_ATOM_OFFSET0": {
11669    "fields": [
11670     {"bits": [0, 7], "name": "OFFSET0"},
11671     {"bits": [8, 31], "name": "UNUSED"}
11672    ]
11673   },
11674   "GDS_ATOM_OFFSET1": {
11675    "fields": [
11676     {"bits": [0, 7], "name": "OFFSET1"},
11677     {"bits": [8, 31], "name": "UNUSED"}
11678    ]
11679   },
11680   "GDS_ATOM_OP": {
11681    "fields": [
11682     {"bits": [0, 7], "name": "OP"},
11683     {"bits": [8, 31], "name": "UNUSED"}
11684    ]
11685   },
11686   "GDS_ATOM_SIZE": {
11687    "fields": [
11688     {"bits": [0, 15], "name": "SIZE"},
11689     {"bits": [16, 31], "name": "UNUSED"}
11690    ]
11691   },
11692   "GDS_GWS_RESOURCE": {
11693    "fields": [
11694     {"bits": [0, 0], "name": "FLAG"},
11695     {"bits": [1, 12], "name": "COUNTER"},
11696     {"bits": [13, 13], "name": "TYPE"},
11697     {"bits": [14, 14], "name": "DED"},
11698     {"bits": [15, 15], "name": "RELEASE_ALL"},
11699     {"bits": [16, 26], "name": "HEAD_QUEUE"},
11700     {"bits": [27, 27], "name": "HEAD_VALID"},
11701     {"bits": [28, 28], "name": "HEAD_FLAG"},
11702     {"bits": [29, 31], "name": "UNUSED1"}
11703    ]
11704   },
11705   "GDS_GWS_RESOURCE_CNT": {
11706    "fields": [
11707     {"bits": [0, 15], "name": "RESOURCE_CNT"},
11708     {"bits": [16, 31], "name": "UNUSED"}
11709    ]
11710   },
11711   "GDS_GWS_RESOURCE_CNTL": {
11712    "fields": [
11713     {"bits": [0, 5], "name": "INDEX"},
11714     {"bits": [6, 31], "name": "UNUSED"}
11715    ]
11716   },
11717   "GDS_OA_ADDRESS": {
11718    "fields": [
11719     {"bits": [0, 15], "name": "DS_ADDRESS"},
11720     {"bits": [16, 19], "name": "CRAWLER"},
11721     {"bits": [20, 21], "name": "CRAWLER_TYPE"},
11722     {"bits": [22, 29], "name": "UNUSED"},
11723     {"bits": [30, 30], "name": "NO_ALLOC"},
11724     {"bits": [31, 31], "name": "ENABLE"}
11725    ]
11726   },
11727   "GDS_OA_CNTL": {
11728    "fields": [
11729     {"bits": [0, 3], "name": "INDEX"},
11730     {"bits": [4, 31], "name": "UNUSED"}
11731    ]
11732   },
11733   "GDS_OA_COUNTER": {
11734    "fields": [
11735     {"bits": [0, 31], "name": "SPACE_AVAILABLE"}
11736    ]
11737   },
11738   "GDS_OA_INCDEC": {
11739    "fields": [
11740     {"bits": [0, 30], "name": "VALUE"},
11741     {"bits": [31, 31], "name": "INCDEC"}
11742    ]
11743   },
11744   "GDS_OA_RING_SIZE": {
11745    "fields": [
11746     {"bits": [0, 31], "name": "RING_SIZE"}
11747    ]
11748   },
11749   "GDS_RD_ADDR": {
11750    "fields": [
11751     {"bits": [0, 31], "name": "READ_ADDR"}
11752    ]
11753   },
11754   "GDS_RD_BURST_ADDR": {
11755    "fields": [
11756     {"bits": [0, 31], "name": "BURST_ADDR"}
11757    ]
11758   },
11759   "GDS_RD_BURST_COUNT": {
11760    "fields": [
11761     {"bits": [0, 31], "name": "BURST_COUNT"}
11762    ]
11763   },
11764   "GDS_RD_BURST_DATA": {
11765    "fields": [
11766     {"bits": [0, 31], "name": "BURST_DATA"}
11767    ]
11768   },
11769   "GDS_RD_DATA": {
11770    "fields": [
11771     {"bits": [0, 31], "name": "READ_DATA"}
11772    ]
11773   },
11774   "GDS_WRITE_COMPLETE": {
11775    "fields": [
11776     {"bits": [0, 31], "name": "WRITE_COMPLETE"}
11777    ]
11778   },
11779   "GDS_WR_ADDR": {
11780    "fields": [
11781     {"bits": [0, 31], "name": "WRITE_ADDR"}
11782    ]
11783   },
11784   "GDS_WR_DATA": {
11785    "fields": [
11786     {"bits": [0, 31], "name": "WRITE_DATA"}
11787    ]
11788   },
11789   "GRBM_GFX_INDEX": {
11790    "fields": [
11791     {"bits": [0, 7], "name": "INSTANCE_INDEX"},
11792     {"bits": [8, 15], "name": "SH_INDEX"},
11793     {"bits": [16, 23], "name": "SE_INDEX"},
11794     {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},
11795     {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},
11796     {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}
11797    ]
11798   },
11799   "GRBM_PERFCOUNTER0_SELECT": {
11800    "fields": [
11801     {"bits": [0, 5], "name": "PERF_SEL"},
11802     {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
11803     {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
11804     {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},
11805     {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},
11806     {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},
11807     {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},
11808     {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},
11809     {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},
11810     {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},
11811     {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},
11812     {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},
11813     {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},
11814     {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},
11815     {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},
11816     {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},
11817     {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},
11818     {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},
11819     {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"}
11820    ]
11821   },
11822   "GRBM_SE0_PERFCOUNTER_SELECT": {
11823    "fields": [
11824     {"bits": [0, 5], "name": "PERF_SEL"},
11825     {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
11826     {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
11827     {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},
11828     {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},
11829     {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},
11830     {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},
11831     {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},
11832     {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},
11833     {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},
11834     {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},
11835     {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"}
11836    ]
11837   },
11838   "GRBM_STATUS": {
11839    "fields": [
11840     {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},
11841     {"bits": [5, 5], "name": "SRBM_RQ_PENDING"},
11842     {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},
11843     {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},
11844     {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},
11845     {"bits": [12, 12], "name": "DB_CLEAN"},
11846     {"bits": [13, 13], "name": "CB_CLEAN"},
11847     {"bits": [14, 14], "name": "TA_BUSY"},
11848     {"bits": [15, 15], "name": "GDS_BUSY"},
11849     {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},
11850     {"bits": [17, 17], "name": "VGT_BUSY"},
11851     {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},
11852     {"bits": [19, 19], "name": "IA_BUSY"},
11853     {"bits": [20, 20], "name": "SX_BUSY"},
11854     {"bits": [21, 21], "name": "WD_BUSY"},
11855     {"bits": [22, 22], "name": "SPI_BUSY"},
11856     {"bits": [23, 23], "name": "BCI_BUSY"},
11857     {"bits": [24, 24], "name": "SC_BUSY"},
11858     {"bits": [25, 25], "name": "PA_BUSY"},
11859     {"bits": [26, 26], "name": "DB_BUSY"},
11860     {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},
11861     {"bits": [29, 29], "name": "CP_BUSY"},
11862     {"bits": [30, 30], "name": "CB_BUSY"},
11863     {"bits": [31, 31], "name": "GUI_ACTIVE"}
11864    ]
11865   },
11866   "GRBM_STATUS2": {
11867    "fields": [
11868     {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},
11869     {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},
11870     {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},
11871     {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},
11872     {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},
11873     {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},
11874     {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},
11875     {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},
11876     {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},
11877     {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},
11878     {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},
11879     {"bits": [14, 14], "name": "RLC_RQ_PENDING"},
11880     {"bits": [24, 24], "name": "RLC_BUSY"},
11881     {"bits": [25, 25], "name": "TC_BUSY"},
11882     {"bits": [26, 26], "name": "TCC_CC_RESIDENT"},
11883     {"bits": [28, 28], "name": "CPF_BUSY"},
11884     {"bits": [29, 29], "name": "CPC_BUSY"},
11885     {"bits": [30, 30], "name": "CPG_BUSY"}
11886    ]
11887   },
11888   "GRBM_STATUS_SE0": {
11889    "fields": [
11890     {"bits": [1, 1], "name": "DB_CLEAN"},
11891     {"bits": [2, 2], "name": "CB_CLEAN"},
11892     {"bits": [22, 22], "name": "BCI_BUSY"},
11893     {"bits": [23, 23], "name": "VGT_BUSY"},
11894     {"bits": [24, 24], "name": "PA_BUSY"},
11895     {"bits": [25, 25], "name": "TA_BUSY"},
11896     {"bits": [26, 26], "name": "SX_BUSY"},
11897     {"bits": [27, 27], "name": "SPI_BUSY"},
11898     {"bits": [29, 29], "name": "SC_BUSY"},
11899     {"bits": [30, 30], "name": "DB_BUSY"},
11900     {"bits": [31, 31], "name": "CB_BUSY"}
11901    ]
11902   },
11903   "IA_ENHANCE": {
11904    "fields": [
11905     {"bits": [0, 31], "name": "MISC"}
11906    ]
11907   },
11908   "IA_MULTI_VGT_PARAM": {
11909    "fields": [
11910     {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},
11911     {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},
11912     {"bits": [17, 17], "name": "SWITCH_ON_EOP"},
11913     {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},
11914     {"bits": [19, 19], "name": "SWITCH_ON_EOI"},
11915     {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"},
11916     {"bits": [28, 31], "name": "MAX_PRIMGRP_IN_WAVE"}
11917    ]
11918   },
11919   "PA_CL_CLIP_CNTL": {
11920    "fields": [
11921     {"bits": [0, 0], "name": "UCP_ENA_0"},
11922     {"bits": [1, 1], "name": "UCP_ENA_1"},
11923     {"bits": [2, 2], "name": "UCP_ENA_2"},
11924     {"bits": [3, 3], "name": "UCP_ENA_3"},
11925     {"bits": [4, 4], "name": "UCP_ENA_4"},
11926     {"bits": [5, 5], "name": "UCP_ENA_5"},
11927     {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},
11928     {"bits": [14, 15], "name": "PS_UCP_MODE"},
11929     {"bits": [16, 16], "name": "CLIP_DISABLE"},
11930     {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},
11931     {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},
11932     {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},
11933     {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},
11934     {"bits": [21, 21], "name": "VTX_KILL_OR"},
11935     {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},
11936     {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},
11937     {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},
11938     {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},
11939     {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"}
11940    ]
11941   },
11942   "PA_CL_GB_VERT_CLIP_ADJ": {
11943    "fields": [
11944     {"bits": [0, 31], "name": "DATA_REGISTER"}
11945    ]
11946   },
11947   "PA_CL_NANINF_CNTL": {
11948    "fields": [
11949     {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},
11950     {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},
11951     {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},
11952     {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},
11953     {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},
11954     {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},
11955     {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},
11956     {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},
11957     {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},
11958     {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},
11959     {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},
11960     {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},
11961     {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},
11962     {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},
11963     {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},
11964     {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}
11965    ]
11966   },
11967   "PA_CL_VPORT_XOFFSET": {
11968    "fields": [
11969     {"bits": [0, 31], "name": "VPORT_XOFFSET"}
11970    ]
11971   },
11972   "PA_CL_VPORT_XSCALE": {
11973    "fields": [
11974     {"bits": [0, 31], "name": "VPORT_XSCALE"}
11975    ]
11976   },
11977   "PA_CL_VPORT_YOFFSET": {
11978    "fields": [
11979     {"bits": [0, 31], "name": "VPORT_YOFFSET"}
11980    ]
11981   },
11982   "PA_CL_VPORT_YSCALE": {
11983    "fields": [
11984     {"bits": [0, 31], "name": "VPORT_YSCALE"}
11985    ]
11986   },
11987   "PA_CL_VPORT_ZOFFSET": {
11988    "fields": [
11989     {"bits": [0, 31], "name": "VPORT_ZOFFSET"}
11990    ]
11991   },
11992   "PA_CL_VPORT_ZSCALE": {
11993    "fields": [
11994     {"bits": [0, 31], "name": "VPORT_ZSCALE"}
11995    ]
11996   },
11997   "PA_CL_VS_OUT_CNTL": {
11998    "fields": [
11999     {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},
12000     {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},
12001     {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},
12002     {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},
12003     {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},
12004     {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},
12005     {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},
12006     {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},
12007     {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},
12008     {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},
12009     {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},
12010     {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},
12011     {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},
12012     {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},
12013     {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},
12014     {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},
12015     {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},
12016     {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},
12017     {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},
12018     {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},
12019     {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},
12020     {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},
12021     {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},
12022     {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},
12023     {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},
12024     {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"},
12025     {"bits": [26, 26], "name": "USE_VTX_LINE_WIDTH"}
12026    ]
12027   },
12028   "PA_CL_VTE_CNTL": {
12029    "fields": [
12030     {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},
12031     {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},
12032     {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},
12033     {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},
12034     {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},
12035     {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},
12036     {"bits": [8, 8], "name": "VTX_XY_FMT"},
12037     {"bits": [9, 9], "name": "VTX_Z_FMT"},
12038     {"bits": [10, 10], "name": "VTX_W0_FMT"},
12039     {"bits": [11, 11], "name": "PERFCOUNTER_REF"}
12040    ]
12041   },
12042   "PA_SC_AA_CONFIG": {
12043    "fields": [
12044     {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},
12045     {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},
12046     {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},
12047     {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},
12048     {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"}
12049    ]
12050   },
12051   "PA_SC_AA_MASK_X0Y0_X1Y0": {
12052    "fields": [
12053     {"bits": [0, 15], "name": "AA_MASK_X0Y0"},
12054     {"bits": [16, 31], "name": "AA_MASK_X1Y0"}
12055    ]
12056   },
12057   "PA_SC_AA_MASK_X0Y1_X1Y1": {
12058    "fields": [
12059     {"bits": [0, 15], "name": "AA_MASK_X0Y1"},
12060     {"bits": [16, 31], "name": "AA_MASK_X1Y1"}
12061    ]
12062   },
12063   "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0": {
12064    "fields": [
12065     {"bits": [0, 3], "name": "S0_X"},
12066     {"bits": [4, 7], "name": "S0_Y"},
12067     {"bits": [8, 11], "name": "S1_X"},
12068     {"bits": [12, 15], "name": "S1_Y"},
12069     {"bits": [16, 19], "name": "S2_X"},
12070     {"bits": [20, 23], "name": "S2_Y"},
12071     {"bits": [24, 27], "name": "S3_X"},
12072     {"bits": [28, 31], "name": "S3_Y"}
12073    ]
12074   },
12075   "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1": {
12076    "fields": [
12077     {"bits": [0, 3], "name": "S4_X"},
12078     {"bits": [4, 7], "name": "S4_Y"},
12079     {"bits": [8, 11], "name": "S5_X"},
12080     {"bits": [12, 15], "name": "S5_Y"},
12081     {"bits": [16, 19], "name": "S6_X"},
12082     {"bits": [20, 23], "name": "S6_Y"},
12083     {"bits": [24, 27], "name": "S7_X"},
12084     {"bits": [28, 31], "name": "S7_Y"}
12085    ]
12086   },
12087   "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2": {
12088    "fields": [
12089     {"bits": [0, 3], "name": "S8_X"},
12090     {"bits": [4, 7], "name": "S8_Y"},
12091     {"bits": [8, 11], "name": "S9_X"},
12092     {"bits": [12, 15], "name": "S9_Y"},
12093     {"bits": [16, 19], "name": "S10_X"},
12094     {"bits": [20, 23], "name": "S10_Y"},
12095     {"bits": [24, 27], "name": "S11_X"},
12096     {"bits": [28, 31], "name": "S11_Y"}
12097    ]
12098   },
12099   "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3": {
12100    "fields": [
12101     {"bits": [0, 3], "name": "S12_X"},
12102     {"bits": [4, 7], "name": "S12_Y"},
12103     {"bits": [8, 11], "name": "S13_X"},
12104     {"bits": [12, 15], "name": "S13_Y"},
12105     {"bits": [16, 19], "name": "S14_X"},
12106     {"bits": [20, 23], "name": "S14_Y"},
12107     {"bits": [24, 27], "name": "S15_X"},
12108     {"bits": [28, 31], "name": "S15_Y"}
12109    ]
12110   },
12111   "PA_SC_CENTROID_PRIORITY_0": {
12112    "fields": [
12113     {"bits": [0, 3], "name": "DISTANCE_0"},
12114     {"bits": [4, 7], "name": "DISTANCE_1"},
12115     {"bits": [8, 11], "name": "DISTANCE_2"},
12116     {"bits": [12, 15], "name": "DISTANCE_3"},
12117     {"bits": [16, 19], "name": "DISTANCE_4"},
12118     {"bits": [20, 23], "name": "DISTANCE_5"},
12119     {"bits": [24, 27], "name": "DISTANCE_6"},
12120     {"bits": [28, 31], "name": "DISTANCE_7"}
12121    ]
12122   },
12123   "PA_SC_CENTROID_PRIORITY_1": {
12124    "fields": [
12125     {"bits": [0, 3], "name": "DISTANCE_8"},
12126     {"bits": [4, 7], "name": "DISTANCE_9"},
12127     {"bits": [8, 11], "name": "DISTANCE_10"},
12128     {"bits": [12, 15], "name": "DISTANCE_11"},
12129     {"bits": [16, 19], "name": "DISTANCE_12"},
12130     {"bits": [20, 23], "name": "DISTANCE_13"},
12131     {"bits": [24, 27], "name": "DISTANCE_14"},
12132     {"bits": [28, 31], "name": "DISTANCE_15"}
12133    ]
12134   },
12135   "PA_SC_CLIPRECT_0_BR": {
12136    "fields": [
12137     {"bits": [0, 14], "name": "BR_X"},
12138     {"bits": [16, 30], "name": "BR_Y"}
12139    ]
12140   },
12141   "PA_SC_CLIPRECT_0_TL": {
12142    "fields": [
12143     {"bits": [0, 14], "name": "TL_X"},
12144     {"bits": [16, 30], "name": "TL_Y"}
12145    ]
12146   },
12147   "PA_SC_CLIPRECT_RULE": {
12148    "fields": [
12149     {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}
12150    ]
12151   },
12152   "PA_SC_EDGERULE": {
12153    "fields": [
12154     {"bits": [0, 3], "name": "ER_TRI"},
12155     {"bits": [4, 7], "name": "ER_POINT"},
12156     {"bits": [8, 11], "name": "ER_RECT"},
12157     {"bits": [12, 17], "name": "ER_LINE_LR"},
12158     {"bits": [18, 23], "name": "ER_LINE_RL"},
12159     {"bits": [24, 27], "name": "ER_LINE_TB"},
12160     {"bits": [28, 31], "name": "ER_LINE_BT"}
12161    ]
12162   },
12163   "PA_SC_GENERIC_SCISSOR_TL": {
12164    "fields": [
12165     {"bits": [0, 14], "name": "TL_X"},
12166     {"bits": [16, 30], "name": "TL_Y"},
12167     {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}
12168    ]
12169   },
12170   "PA_SC_LINE_CNTL": {
12171    "fields": [
12172     {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},
12173     {"bits": [10, 10], "name": "LAST_PIXEL"},
12174     {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},
12175     {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"}
12176    ]
12177   },
12178   "PA_SC_LINE_STIPPLE": {
12179    "fields": [
12180     {"bits": [0, 15], "name": "LINE_PATTERN"},
12181     {"bits": [16, 23], "name": "REPEAT_COUNT"},
12182     {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},
12183     {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}
12184    ]
12185   },
12186   "PA_SC_LINE_STIPPLE_STATE": {
12187    "fields": [
12188     {"bits": [0, 3], "name": "CURRENT_PTR"},
12189     {"bits": [8, 15], "name": "CURRENT_COUNT"}
12190    ]
12191   },
12192   "PA_SC_MODE_CNTL_0": {
12193    "fields": [
12194     {"bits": [0, 0], "name": "MSAA_ENABLE"},
12195     {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},
12196     {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},
12197     {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"}
12198    ]
12199   },
12200   "PA_SC_MODE_CNTL_1": {
12201    "fields": [
12202     {"bits": [0, 0], "name": "WALK_SIZE"},
12203     {"bits": [1, 1], "name": "WALK_ALIGNMENT"},
12204     {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},
12205     {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},
12206     {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},
12207     {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},
12208     {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},
12209     {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},
12210     {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},
12211     {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},
12212     {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},
12213     {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},
12214     {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},
12215     {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},
12216     {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},
12217     {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},
12218     {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},
12219     {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},
12220     {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},
12221     {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},
12222     {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},
12223     {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},
12224     {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},
12225     {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}
12226    ]
12227   },
12228   "PA_SC_P3D_TRAP_SCREEN_H": {
12229    "fields": [
12230     {"bits": [0, 13], "name": "X_COORD"}
12231    ]
12232   },
12233   "PA_SC_P3D_TRAP_SCREEN_HV_EN": {
12234    "fields": [
12235     {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},
12236     {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}
12237    ]
12238   },
12239   "PA_SC_P3D_TRAP_SCREEN_V": {
12240    "fields": [
12241     {"bits": [0, 13], "name": "Y_COORD"}
12242    ]
12243   },
12244   "PA_SC_PERFCOUNTER1_SELECT": {
12245    "fields": [
12246     {"bits": [0, 9], "name": "PERF_SEL"}
12247    ]
12248   },
12249   "PA_SC_RASTER_CONFIG": {
12250    "fields": [
12251     {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},
12252     {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},
12253     {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},
12254     {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},
12255     {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},
12256     {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},
12257     {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},
12258     {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},
12259     {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},
12260     {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},
12261     {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},
12262     {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},
12263     {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},
12264     {"bits": [26, 27], "enum_ref": "SeXsel", "name": "SE_XSEL"},
12265     {"bits": [28, 29], "enum_ref": "SeYsel", "name": "SE_YSEL"}
12266    ]
12267   },
12268   "PA_SC_RASTER_CONFIG_1": {
12269    "fields": [
12270     {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},
12271     {"bits": [2, 3], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},
12272     {"bits": [4, 5], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}
12273    ]
12274   },
12275   "PA_SC_SCREEN_EXTENT_CONTROL": {
12276    "fields": [
12277     {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},
12278     {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}
12279    ]
12280   },
12281   "PA_SC_SCREEN_EXTENT_MIN_0": {
12282    "fields": [
12283     {"bits": [0, 15], "name": "X"},
12284     {"bits": [16, 31], "name": "Y"}
12285    ]
12286   },
12287   "PA_SC_SCREEN_SCISSOR_BR": {
12288    "fields": [
12289     {"bits": [0, 15], "name": "BR_X"},
12290     {"bits": [16, 31], "name": "BR_Y"}
12291    ]
12292   },
12293   "PA_SC_SCREEN_SCISSOR_TL": {
12294    "fields": [
12295     {"bits": [0, 15], "name": "TL_X"},
12296     {"bits": [16, 31], "name": "TL_Y"}
12297    ]
12298   },
12299   "PA_SC_VPORT_ZMAX_0": {
12300    "fields": [
12301     {"bits": [0, 31], "name": "VPORT_ZMAX"}
12302    ]
12303   },
12304   "PA_SC_VPORT_ZMIN_0": {
12305    "fields": [
12306     {"bits": [0, 31], "name": "VPORT_ZMIN"}
12307    ]
12308   },
12309   "PA_SC_WINDOW_OFFSET": {
12310    "fields": [
12311     {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},
12312     {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}
12313    ]
12314   },
12315   "PA_SU_HARDWARE_SCREEN_OFFSET": {
12316    "fields": [
12317     {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},
12318     {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}
12319    ]
12320   },
12321   "PA_SU_LINE_CNTL": {
12322    "fields": [
12323     {"bits": [0, 15], "name": "WIDTH"}
12324    ]
12325   },
12326   "PA_SU_LINE_STIPPLE_CNTL": {
12327    "fields": [
12328     {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},
12329     {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},
12330     {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},
12331     {"bits": [4, 4], "name": "DIAMOND_ADJUST"}
12332    ]
12333   },
12334   "PA_SU_LINE_STIPPLE_SCALE": {
12335    "fields": [
12336     {"bits": [0, 31], "name": "LINE_STIPPLE_SCALE"}
12337    ]
12338   },
12339   "PA_SU_LINE_STIPPLE_VALUE": {
12340    "fields": [
12341     {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}
12342    ]
12343   },
12344   "PA_SU_PERFCOUNTER0_HI": {
12345    "fields": [
12346     {"bits": [0, 15], "name": "PERFCOUNTER_HI"}
12347    ]
12348   },
12349   "PA_SU_PERFCOUNTER0_SELECT": {
12350    "fields": [
12351     {"bits": [0, 9], "name": "PERF_SEL"},
12352     {"bits": [10, 19], "name": "PERF_SEL1"},
12353     {"bits": [20, 23], "name": "CNTR_MODE"}
12354    ]
12355   },
12356   "PA_SU_PERFCOUNTER0_SELECT1": {
12357    "fields": [
12358     {"bits": [0, 9], "name": "PERF_SEL2"},
12359     {"bits": [10, 19], "name": "PERF_SEL3"}
12360    ]
12361   },
12362   "PA_SU_PERFCOUNTER2_SELECT": {
12363    "fields": [
12364     {"bits": [0, 9], "name": "PERF_SEL"},
12365     {"bits": [20, 23], "name": "CNTR_MODE"}
12366    ]
12367   },
12368   "PA_SU_POINT_MINMAX": {
12369    "fields": [
12370     {"bits": [0, 15], "name": "MIN_SIZE"},
12371     {"bits": [16, 31], "name": "MAX_SIZE"}
12372    ]
12373   },
12374   "PA_SU_POINT_SIZE": {
12375    "fields": [
12376     {"bits": [0, 15], "name": "HEIGHT"},
12377     {"bits": [16, 31], "name": "WIDTH"}
12378    ]
12379   },
12380   "PA_SU_POLY_OFFSET_CLAMP": {
12381    "fields": [
12382     {"bits": [0, 31], "name": "CLAMP"}
12383    ]
12384   },
12385   "PA_SU_POLY_OFFSET_DB_FMT_CNTL": {
12386    "fields": [
12387     {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},
12388     {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}
12389    ]
12390   },
12391   "PA_SU_POLY_OFFSET_FRONT_OFFSET": {
12392    "fields": [
12393     {"bits": [0, 31], "name": "OFFSET"}
12394    ]
12395   },
12396   "PA_SU_POLY_OFFSET_FRONT_SCALE": {
12397    "fields": [
12398     {"bits": [0, 31], "name": "SCALE"}
12399    ]
12400   },
12401   "PA_SU_PRIM_FILTER_CNTL": {
12402    "fields": [
12403     {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},
12404     {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},
12405     {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},
12406     {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},
12407     {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},
12408     {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},
12409     {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},
12410     {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},
12411     {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},
12412     {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},
12413     {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}
12414    ]
12415   },
12416   "PA_SU_SC_MODE_CNTL": {
12417    "fields": [
12418     {"bits": [0, 0], "name": "CULL_FRONT"},
12419     {"bits": [1, 1], "name": "CULL_BACK"},
12420     {"bits": [2, 2], "name": "FACE"},
12421     {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},
12422     {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},
12423     {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},
12424     {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},
12425     {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},
12426     {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},
12427     {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},
12428     {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},
12429     {"bits": [20, 20], "name": "PERSP_CORR_DIS"},
12430     {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"}
12431    ]
12432   },
12433   "PA_SU_VTX_CNTL": {
12434    "fields": [
12435     {"bits": [0, 0], "name": "PIX_CENTER"},
12436     {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},
12437     {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}
12438    ]
12439   },
12440   "RLC_PERFCOUNTER0_SELECT": {
12441    "fields": [
12442     {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}
12443    ]
12444   },
12445   "RLC_PERFMON_CLK_CNTL": {
12446    "fields": [
12447     {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"}
12448    ]
12449   },
12450   "RLC_PERFMON_CNTL": {
12451    "fields": [
12452     {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
12453     {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
12454    ]
12455   },
12456   "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY": {
12457    "fields": [
12458     {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},
12459     {"bits": [8, 31], "name": "RESERVED"}
12460    ]
12461   },
12462   "RLC_SPM_PERFMON_CNTL": {
12463    "fields": [
12464     {"bits": [0, 11], "name": "RESERVED1"},
12465     {"bits": [12, 13], "name": "PERFMON_RING_MODE"},
12466     {"bits": [14, 15], "name": "RESERVED"},
12467     {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}
12468    ]
12469   },
12470   "RLC_SPM_PERFMON_RING_BASE_HI": {
12471    "fields": [
12472     {"bits": [0, 15], "name": "RING_BASE_HI"},
12473     {"bits": [16, 31], "name": "RESERVED"}
12474    ]
12475   },
12476   "RLC_SPM_PERFMON_RING_BASE_LO": {
12477    "fields": [
12478     {"bits": [0, 31], "name": "RING_BASE_LO"}
12479    ]
12480   },
12481   "RLC_SPM_PERFMON_RING_SIZE": {
12482    "fields": [
12483     {"bits": [0, 31], "name": "RING_BASE_SIZE"}
12484    ]
12485   },
12486   "RLC_SPM_PERFMON_SEGMENT_SIZE": {
12487    "fields": [
12488     {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},
12489     {"bits": [8, 10], "name": "RESERVED1"},
12490     {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},
12491     {"bits": [16, 20], "name": "SE0_NUM_LINE"},
12492     {"bits": [21, 25], "name": "SE1_NUM_LINE"},
12493     {"bits": [26, 30], "name": "SE2_NUM_LINE"},
12494     {"bits": [31, 31], "name": "RESERVED"}
12495    ]
12496   },
12497   "RLC_SPM_RING_RDPTR": {
12498    "fields": [
12499     {"bits": [0, 31], "name": "PERFMON_RING_RDPTR"}
12500    ]
12501   },
12502   "RLC_SPM_SEGMENT_THRESHOLD": {
12503    "fields": [
12504     {"bits": [0, 31], "name": "NUM_SEGMENT_THRESHOLD"}
12505    ]
12506   },
12507   "RLC_SPM_SE_MUXSEL_ADDR": {
12508    "fields": [
12509     {"bits": [0, 31], "name": "PERFMON_SEL_ADDR"}
12510    ]
12511   },
12512   "RLC_SPM_SE_MUXSEL_DATA": {
12513    "fields": [
12514     {"bits": [0, 31], "name": "PERFMON_SEL_DATA"}
12515    ]
12516   },
12517   "SCRATCH_ADDR": {
12518    "fields": [
12519     {"bits": [0, 31], "name": "OBSOLETE_ADDR"}
12520    ]
12521   },
12522   "SCRATCH_REG0": {
12523    "fields": [
12524     {"bits": [0, 31], "name": "SCRATCH_REG0"}
12525    ]
12526   },
12527   "SCRATCH_REG1": {
12528    "fields": [
12529     {"bits": [0, 31], "name": "SCRATCH_REG1"}
12530    ]
12531   },
12532   "SCRATCH_REG2": {
12533    "fields": [
12534     {"bits": [0, 31], "name": "SCRATCH_REG2"}
12535    ]
12536   },
12537   "SCRATCH_REG3": {
12538    "fields": [
12539     {"bits": [0, 31], "name": "SCRATCH_REG3"}
12540    ]
12541   },
12542   "SCRATCH_REG4": {
12543    "fields": [
12544     {"bits": [0, 31], "name": "SCRATCH_REG4"}
12545    ]
12546   },
12547   "SCRATCH_REG5": {
12548    "fields": [
12549     {"bits": [0, 31], "name": "SCRATCH_REG5"}
12550    ]
12551   },
12552   "SCRATCH_REG6": {
12553    "fields": [
12554     {"bits": [0, 31], "name": "SCRATCH_REG6"}
12555    ]
12556   },
12557   "SCRATCH_REG7": {
12558    "fields": [
12559     {"bits": [0, 31], "name": "SCRATCH_REG7"}
12560    ]
12561   },
12562   "SCRATCH_UMSK": {
12563    "fields": [
12564     {"bits": [0, 7], "name": "OBSOLETE_UMSK"},
12565     {"bits": [16, 17], "name": "OBSOLETE_SWAP"}
12566    ]
12567   },
12568   "SPI_BARYC_CNTL": {
12569    "fields": [
12570     {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},
12571     {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},
12572     {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},
12573     {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},
12574     {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},
12575     {"bits": [20, 20], "name": "POS_FLOAT_ULC"},
12576     {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}
12577    ]
12578   },
12579   "SPI_CONFIG_CNTL": {
12580    "fields": [
12581     {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},
12582     {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},
12583     {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},
12584     {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},
12585     {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},
12586     {"bits": [27, 27], "name": "TTRACE_STALL_ALL"}
12587    ]
12588   },
12589   "SPI_INTERP_CONTROL_0": {
12590    "fields": [
12591     {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},
12592     {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},
12593     {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},
12594     {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},
12595     {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},
12596     {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},
12597     {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}
12598    ]
12599   },
12600   "SPI_PERFCOUNTER4_SELECT": {
12601    "fields": [
12602     {"bits": [0, 7], "name": "PERF_SEL"}
12603    ]
12604   },
12605   "SPI_PERFCOUNTER_BINS": {
12606    "fields": [
12607     {"bits": [0, 3], "name": "BIN0_MIN"},
12608     {"bits": [4, 7], "name": "BIN0_MAX"},
12609     {"bits": [8, 11], "name": "BIN1_MIN"},
12610     {"bits": [12, 15], "name": "BIN1_MAX"},
12611     {"bits": [16, 19], "name": "BIN2_MIN"},
12612     {"bits": [20, 23], "name": "BIN2_MAX"},
12613     {"bits": [24, 27], "name": "BIN3_MIN"},
12614     {"bits": [28, 31], "name": "BIN3_MAX"}
12615    ]
12616   },
12617   "SPI_PS_INPUT_CNTL_0": {
12618    "fields": [
12619     {"bits": [0, 5], "name": "OFFSET"},
12620     {"bits": [8, 9], "name": "DEFAULT_VAL"},
12621     {"bits": [10, 10], "name": "FLAT_SHADE"},
12622     {"bits": [13, 16], "name": "CYL_WRAP"},
12623     {"bits": [17, 17], "name": "PT_SPRITE_TEX"},
12624     {"bits": [18, 18], "name": "DUP"},
12625     {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
12626     {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
12627     {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
12628     {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"},
12629     {"bits": [24, 24], "name": "ATTR0_VALID"},
12630     {"bits": [25, 25], "name": "ATTR1_VALID"}
12631    ]
12632   },
12633   "SPI_PS_INPUT_CNTL_20": {
12634    "fields": [
12635     {"bits": [0, 5], "name": "OFFSET"},
12636     {"bits": [8, 9], "name": "DEFAULT_VAL"},
12637     {"bits": [10, 10], "name": "FLAT_SHADE"},
12638     {"bits": [18, 18], "name": "DUP"},
12639     {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
12640     {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
12641     {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
12642     {"bits": [24, 24], "name": "ATTR0_VALID"},
12643     {"bits": [25, 25], "name": "ATTR1_VALID"}
12644    ]
12645   },
12646   "SPI_PS_INPUT_ENA": {
12647    "fields": [
12648     {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},
12649     {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},
12650     {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},
12651     {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},
12652     {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},
12653     {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},
12654     {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},
12655     {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},
12656     {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},
12657     {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},
12658     {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},
12659     {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},
12660     {"bits": [12, 12], "name": "FRONT_FACE_ENA"},
12661     {"bits": [13, 13], "name": "ANCILLARY_ENA"},
12662     {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},
12663     {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}
12664    ]
12665   },
12666   "SPI_PS_IN_CONTROL": {
12667    "fields": [
12668     {"bits": [0, 5], "name": "NUM_INTERP"},
12669     {"bits": [6, 6], "name": "PARAM_GEN"},
12670     {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}
12671    ]
12672   },
12673   "SPI_SHADER_COL_FORMAT": {
12674    "fields": [
12675     {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},
12676     {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},
12677     {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},
12678     {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},
12679     {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},
12680     {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},
12681     {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},
12682     {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}
12683    ]
12684   },
12685   "SPI_SHADER_LATE_ALLOC_VS": {
12686    "fields": [
12687     {"bits": [0, 5], "name": "LIMIT"}
12688    ]
12689   },
12690   "SPI_SHADER_PGM_RSRC1_GS": {
12691    "fields": [
12692     {"bits": [0, 5], "name": "VGPRS"},
12693     {"bits": [6, 9], "name": "SGPRS"},
12694     {"bits": [10, 11], "name": "PRIORITY"},
12695     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12696     {"bits": [20, 20], "name": "PRIV"},
12697     {"bits": [21, 21], "name": "DX10_CLAMP"},
12698     {"bits": [22, 22], "name": "DEBUG_MODE"},
12699     {"bits": [23, 23], "name": "IEEE_MODE"},
12700     {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},
12701     {"bits": [25, 27], "name": "CACHE_CTL"},
12702     {"bits": [28, 28], "name": "CDBG_USER"}
12703    ]
12704   },
12705   "SPI_SHADER_PGM_RSRC1_HS": {
12706    "fields": [
12707     {"bits": [0, 5], "name": "VGPRS"},
12708     {"bits": [6, 9], "name": "SGPRS"},
12709     {"bits": [10, 11], "name": "PRIORITY"},
12710     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12711     {"bits": [20, 20], "name": "PRIV"},
12712     {"bits": [21, 21], "name": "DX10_CLAMP"},
12713     {"bits": [22, 22], "name": "DEBUG_MODE"},
12714     {"bits": [23, 23], "name": "IEEE_MODE"},
12715     {"bits": [24, 26], "name": "CACHE_CTL"},
12716     {"bits": [27, 27], "name": "CDBG_USER"}
12717    ]
12718   },
12719   "SPI_SHADER_PGM_RSRC1_LS": {
12720    "fields": [
12721     {"bits": [0, 5], "name": "VGPRS"},
12722     {"bits": [6, 9], "name": "SGPRS"},
12723     {"bits": [10, 11], "name": "PRIORITY"},
12724     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12725     {"bits": [20, 20], "name": "PRIV"},
12726     {"bits": [21, 21], "name": "DX10_CLAMP"},
12727     {"bits": [22, 22], "name": "DEBUG_MODE"},
12728     {"bits": [23, 23], "name": "IEEE_MODE"},
12729     {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
12730     {"bits": [26, 28], "name": "CACHE_CTL"},
12731     {"bits": [29, 29], "name": "CDBG_USER"}
12732    ]
12733   },
12734   "SPI_SHADER_PGM_RSRC1_PS": {
12735    "fields": [
12736     {"bits": [0, 5], "name": "VGPRS"},
12737     {"bits": [6, 9], "name": "SGPRS"},
12738     {"bits": [10, 11], "name": "PRIORITY"},
12739     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12740     {"bits": [20, 20], "name": "PRIV"},
12741     {"bits": [21, 21], "name": "DX10_CLAMP"},
12742     {"bits": [22, 22], "name": "DEBUG_MODE"},
12743     {"bits": [23, 23], "name": "IEEE_MODE"},
12744     {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},
12745     {"bits": [25, 27], "name": "CACHE_CTL"},
12746     {"bits": [28, 28], "name": "CDBG_USER"}
12747    ]
12748   },
12749   "SPI_SHADER_PGM_RSRC1_VS": {
12750    "fields": [
12751     {"bits": [0, 5], "name": "VGPRS"},
12752     {"bits": [6, 9], "name": "SGPRS"},
12753     {"bits": [10, 11], "name": "PRIORITY"},
12754     {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
12755     {"bits": [20, 20], "name": "PRIV"},
12756     {"bits": [21, 21], "name": "DX10_CLAMP"},
12757     {"bits": [22, 22], "name": "DEBUG_MODE"},
12758     {"bits": [23, 23], "name": "IEEE_MODE"},
12759     {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
12760     {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},
12761     {"bits": [27, 29], "name": "CACHE_CTL"},
12762     {"bits": [30, 30], "name": "CDBG_USER"}
12763    ]
12764   },
12765   "SPI_SHADER_PGM_RSRC2_ES_VS": {
12766    "fields": [
12767     {"bits": [0, 0], "name": "SCRATCH_EN"},
12768     {"bits": [1, 5], "name": "USER_SGPR"},
12769     {"bits": [6, 6], "name": "TRAP_PRESENT"},
12770     {"bits": [7, 7], "name": "OC_LDS_EN"},
12771     {"bits": [8, 16], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12772     {"bits": [20, 28], "name": "LDS_SIZE"}
12773    ]
12774   },
12775   "SPI_SHADER_PGM_RSRC2_GS": {
12776    "fields": [
12777     {"bits": [0, 0], "name": "SCRATCH_EN"},
12778     {"bits": [1, 5], "name": "USER_SGPR"},
12779     {"bits": [6, 6], "name": "TRAP_PRESENT"},
12780     {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
12781    ]
12782   },
12783   "SPI_SHADER_PGM_RSRC2_HS": {
12784    "fields": [
12785     {"bits": [0, 0], "name": "SCRATCH_EN"},
12786     {"bits": [1, 5], "name": "USER_SGPR"},
12787     {"bits": [6, 6], "name": "TRAP_PRESENT"},
12788     {"bits": [7, 7], "name": "OC_LDS_EN"},
12789     {"bits": [8, 8], "name": "TG_SIZE_EN"},
12790     {"bits": [9, 17], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
12791    ]
12792   },
12793   "SPI_SHADER_PGM_RSRC2_LS_VS": {
12794    "fields": [
12795     {"bits": [0, 0], "name": "SCRATCH_EN"},
12796     {"bits": [1, 5], "name": "USER_SGPR"},
12797     {"bits": [6, 6], "name": "TRAP_PRESENT"},
12798     {"bits": [7, 15], "name": "LDS_SIZE"},
12799     {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
12800    ]
12801   },
12802   "SPI_SHADER_PGM_RSRC2_PS": {
12803    "fields": [
12804     {"bits": [0, 0], "name": "SCRATCH_EN"},
12805     {"bits": [1, 5], "name": "USER_SGPR"},
12806     {"bits": [6, 6], "name": "TRAP_PRESENT"},
12807     {"bits": [7, 7], "name": "WAVE_CNT_EN"},
12808     {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},
12809     {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"}
12810    ]
12811   },
12812   "SPI_SHADER_PGM_RSRC2_VS": {
12813    "fields": [
12814     {"bits": [0, 0], "name": "SCRATCH_EN"},
12815     {"bits": [1, 5], "name": "USER_SGPR"},
12816     {"bits": [6, 6], "name": "TRAP_PRESENT"},
12817     {"bits": [7, 7], "name": "OC_LDS_EN"},
12818     {"bits": [8, 8], "name": "SO_BASE0_EN"},
12819     {"bits": [9, 9], "name": "SO_BASE1_EN"},
12820     {"bits": [10, 10], "name": "SO_BASE2_EN"},
12821     {"bits": [11, 11], "name": "SO_BASE3_EN"},
12822     {"bits": [12, 12], "name": "SO_EN"},
12823     {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
12824     {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"}
12825    ]
12826   },
12827   "SPI_SHADER_PGM_RSRC3_GS": {
12828    "fields": [
12829     {"bits": [0, 15], "name": "CU_EN"},
12830     {"bits": [16, 21], "name": "WAVE_LIMIT"},
12831     {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"},
12832     {"bits": [26, 31], "name": "GROUP_FIFO_DEPTH"}
12833    ]
12834   },
12835   "SPI_SHADER_PGM_RSRC3_HS": {
12836    "fields": [
12837     {"bits": [0, 5], "name": "WAVE_LIMIT"},
12838     {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"},
12839     {"bits": [10, 15], "name": "GROUP_FIFO_DEPTH"}
12840    ]
12841   },
12842   "SPI_SHADER_PGM_RSRC3_PS": {
12843    "fields": [
12844     {"bits": [0, 15], "name": "CU_EN"},
12845     {"bits": [16, 21], "name": "WAVE_LIMIT"},
12846     {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"}
12847    ]
12848   },
12849   "SPI_SHADER_POS_FORMAT": {
12850    "fields": [
12851     {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},
12852     {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},
12853     {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},
12854     {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}
12855    ]
12856   },
12857   "SPI_SHADER_TBA_HI_PS": {
12858    "fields": [
12859     {"bits": [0, 7], "name": "MEM_BASE"}
12860    ]
12861   },
12862   "SPI_SHADER_TBA_LO_PS": {
12863    "fields": [
12864     {"bits": [0, 31], "name": "MEM_BASE"}
12865    ]
12866   },
12867   "SPI_SHADER_Z_FORMAT": {
12868    "fields": [
12869     {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}
12870    ]
12871   },
12872   "SPI_VS_OUT_CONFIG": {
12873    "fields": [
12874     {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},
12875     {"bits": [6, 6], "name": "VS_HALF_PACK"}
12876    ]
12877   },
12878   "SQC_CACHES": {
12879    "fields": [
12880     {"bits": [0, 0], "name": "TARGET_INST"},
12881     {"bits": [1, 1], "name": "TARGET_DATA"},
12882     {"bits": [2, 2], "name": "INVALIDATE"},
12883     {"bits": [3, 3], "name": "WRITEBACK"},
12884     {"bits": [4, 4], "name": "VOL"},
12885     {"bits": [16, 16], "name": "COMPLETE"}
12886    ]
12887   },
12888   "SQC_WRITEBACK": {
12889    "fields": [
12890     {"bits": [0, 0], "name": "DWB"},
12891     {"bits": [1, 1], "name": "DIRTY"}
12892    ]
12893   },
12894   "SQ_BUF_RSRC_WORD0": {
12895    "fields": [
12896     {"bits": [0, 31], "name": "BASE_ADDRESS"}
12897    ]
12898   },
12899   "SQ_BUF_RSRC_WORD1": {
12900    "fields": [
12901     {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},
12902     {"bits": [16, 29], "name": "STRIDE"},
12903     {"bits": [30, 30], "name": "CACHE_SWIZZLE"},
12904     {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}
12905    ]
12906   },
12907   "SQ_BUF_RSRC_WORD2": {
12908    "fields": [
12909     {"bits": [0, 31], "name": "NUM_RECORDS"}
12910    ]
12911   },
12912   "SQ_BUF_RSRC_WORD3": {
12913    "fields": [
12914     {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
12915     {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
12916     {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
12917     {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
12918     {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},
12919     {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},
12920     {"bits": [19, 20], "name": "ELEMENT_SIZE"},
12921     {"bits": [21, 22], "name": "INDEX_STRIDE"},
12922     {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
12923     {"bits": [24, 24], "name": "ATC"},
12924     {"bits": [25, 25], "name": "HASH_ENABLE"},
12925     {"bits": [26, 26], "name": "HEAP"},
12926     {"bits": [27, 29], "name": "MTYPE"},
12927     {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}
12928    ]
12929   },
12930   "SQ_IMG_RSRC_WORD1": {
12931    "fields": [
12932     {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
12933     {"bits": [8, 19], "name": "MIN_LOD"},
12934     {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},
12935     {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},
12936     {"bits": [30, 31], "name": "MTYPE"}
12937    ]
12938   },
12939   "SQ_IMG_RSRC_WORD2": {
12940    "fields": [
12941     {"bits": [0, 13], "name": "WIDTH"},
12942     {"bits": [14, 27], "name": "HEIGHT"},
12943     {"bits": [28, 30], "name": "PERF_MOD"},
12944     {"bits": [31, 31], "name": "INTERLACED"}
12945    ]
12946   },
12947   "SQ_IMG_RSRC_WORD3": {
12948    "fields": [
12949     {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
12950     {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
12951     {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
12952     {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
12953     {"bits": [12, 15], "name": "BASE_LEVEL"},
12954     {"bits": [16, 19], "name": "LAST_LEVEL"},
12955     {"bits": [20, 24], "name": "TILING_INDEX"},
12956     {"bits": [25, 25], "name": "POW2_PAD"},
12957     {"bits": [26, 26], "name": "MTYPE"},
12958     {"bits": [27, 27], "name": "ATC"},
12959     {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}
12960    ]
12961   },
12962   "SQ_IMG_RSRC_WORD4": {
12963    "fields": [
12964     {"bits": [0, 12], "name": "DEPTH"},
12965     {"bits": [13, 26], "name": "PITCH"}
12966    ]
12967   },
12968   "SQ_IMG_RSRC_WORD5": {
12969    "fields": [
12970     {"bits": [0, 12], "name": "BASE_ARRAY"},
12971     {"bits": [13, 25], "name": "LAST_ARRAY"}
12972    ]
12973   },
12974   "SQ_IMG_RSRC_WORD6": {
12975    "fields": [
12976     {"bits": [0, 11], "name": "MIN_LOD_WARN"},
12977     {"bits": [12, 19], "name": "COUNTER_BANK_ID"},
12978     {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},
12979     {"bits": [21, 21], "name": "COMPRESSION_EN"},
12980     {"bits": [22, 22], "name": "ALPHA_IS_ON_MSB"},
12981     {"bits": [23, 23], "name": "COLOR_TRANSFORM"},
12982     {"bits": [24, 27], "name": "LOST_ALPHA_BITS"},
12983     {"bits": [28, 31], "name": "LOST_COLOR_BITS"}
12984    ]
12985   },
12986   "SQ_IMG_RSRC_WORD7": {
12987    "fields": [
12988     {"bits": [0, 31], "name": "META_DATA_ADDRESS"}
12989    ]
12990   },
12991   "SQ_IMG_SAMP_WORD0": {
12992    "fields": [
12993     {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},
12994     {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},
12995     {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},
12996     {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},
12997     {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},
12998     {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},
12999     {"bits": [16, 18], "name": "ANISO_THRESHOLD"},
13000     {"bits": [19, 19], "name": "MC_COORD_TRUNC"},
13001     {"bits": [20, 20], "name": "FORCE_DEGAMMA"},
13002     {"bits": [21, 26], "name": "ANISO_BIAS"},
13003     {"bits": [27, 27], "name": "TRUNC_COORD"},
13004     {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},
13005     {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"},
13006     {"bits": [31, 31], "name": "COMPAT_MODE"}
13007    ]
13008   },
13009   "SQ_IMG_SAMP_WORD1": {
13010    "fields": [
13011     {"bits": [0, 11], "name": "MIN_LOD"},
13012     {"bits": [12, 23], "name": "MAX_LOD"},
13013     {"bits": [24, 27], "name": "PERF_MIP"},
13014     {"bits": [28, 31], "name": "PERF_Z"}
13015    ]
13016   },
13017   "SQ_IMG_SAMP_WORD2": {
13018    "fields": [
13019     {"bits": [0, 13], "name": "LOD_BIAS"},
13020     {"bits": [14, 19], "name": "LOD_BIAS_SEC"},
13021     {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},
13022     {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},
13023     {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},
13024     {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},
13025     {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},
13026     {"bits": [29, 29], "name": "DISABLE_LSB_CEIL"},
13027     {"bits": [30, 30], "name": "FILTER_PREC_FIX"},
13028     {"bits": [31, 31], "name": "ANISO_OVERRIDE"}
13029    ]
13030   },
13031   "SQ_IMG_SAMP_WORD3": {
13032    "fields": [
13033     {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},
13034     {"bits": [29, 29], "name": "UPGRADED_DEPTH"},
13035     {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}
13036    ]
13037   },
13038   "SQ_PERFCOUNTER0_SELECT": {
13039    "fields": [
13040     {"bits": [0, 8], "name": "PERF_SEL"},
13041     {"bits": [12, 15], "name": "SQC_BANK_MASK"},
13042     {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},
13043     {"bits": [20, 23], "name": "SPM_MODE"},
13044     {"bits": [24, 27], "name": "SIMD_MASK"},
13045     {"bits": [28, 31], "name": "PERF_MODE"}
13046    ]
13047   },
13048   "SQ_PERFCOUNTER_CTRL": {
13049    "fields": [
13050     {"bits": [0, 0], "name": "PS_EN"},
13051     {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
13052     {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
13053     {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
13054     {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
13055     {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
13056     {"bits": [6, 6], "name": "CS_EN"},
13057     {"bits": [8, 12], "name": "CNTR_RATE"},
13058     {"bits": [13, 13], "name": "DISABLE_FLUSH"}
13059    ]
13060   },
13061   "SQ_PERFCOUNTER_CTRL2": {
13062    "fields": [
13063     {"bits": [0, 0], "name": "FORCE_EN"}
13064    ]
13065   },
13066   "SQ_PERFCOUNTER_MASK": {
13067    "fields": [
13068     {"bits": [0, 15], "name": "SH0_MASK"},
13069     {"bits": [16, 31], "name": "SH1_MASK"}
13070    ]
13071   },
13072   "SQ_THREAD_TRACE_BASE2": {
13073    "fields": [
13074     {"bits": [0, 3], "name": "ADDR_HI"}
13075    ]
13076   },
13077   "SQ_THREAD_TRACE_CNTR": {
13078    "fields": [
13079     {"bits": [0, 31], "name": "CNTR"}
13080    ]
13081   },
13082   "SQ_THREAD_TRACE_CTRL": {
13083    "fields": [
13084     {"bits": [31, 31], "name": "RESET_BUFFER"}
13085    ]
13086   },
13087   "SQ_THREAD_TRACE_HIWATER": {
13088    "fields": [
13089     {"bits": [0, 2], "name": "HIWATER"}
13090    ]
13091   },
13092   "SQ_THREAD_TRACE_MASK": {
13093    "fields": [
13094     {"bits": [0, 4], "name": "CU_SEL"},
13095     {"bits": [5, 5], "name": "SH_SEL"},
13096     {"bits": [7, 7], "name": "REG_STALL_EN"},
13097     {"bits": [8, 11], "name": "SIMD_EN"},
13098     {"bits": [12, 13], "name": "VM_ID_MASK"},
13099     {"bits": [14, 14], "name": "SPI_STALL_EN"},
13100     {"bits": [15, 15], "name": "SQ_STALL_EN"},
13101     {"bits": [16, 31], "name": "RANDOM_SEED"}
13102    ]
13103   },
13104   "SQ_THREAD_TRACE_MODE": {
13105    "fields": [
13106     {"bits": [0, 2], "name": "MASK_PS"},
13107     {"bits": [3, 5], "name": "MASK_VS"},
13108     {"bits": [6, 8], "name": "MASK_GS"},
13109     {"bits": [9, 11], "name": "MASK_ES"},
13110     {"bits": [12, 14], "name": "MASK_HS"},
13111     {"bits": [15, 17], "name": "MASK_LS"},
13112     {"bits": [18, 20], "name": "MASK_CS"},
13113     {"bits": [21, 22], "name": "MODE"},
13114     {"bits": [23, 24], "name": "CAPTURE_MODE"},
13115     {"bits": [25, 25], "name": "AUTOFLUSH_EN"},
13116     {"bits": [26, 26], "name": "PRIV"},
13117     {"bits": [27, 28], "name": "ISSUE_MASK"},
13118     {"bits": [29, 29], "name": "TEST_MODE"},
13119     {"bits": [30, 30], "name": "INTERRUPT_EN"},
13120     {"bits": [31, 31], "name": "WRAP"}
13121    ]
13122   },
13123   "SQ_THREAD_TRACE_SIZE": {
13124    "fields": [
13125     {"bits": [0, 21], "name": "SIZE"}
13126    ]
13127   },
13128   "SQ_THREAD_TRACE_STATUS": {
13129    "fields": [
13130     {"bits": [0, 9], "name": "FINISH_PENDING"},
13131     {"bits": [16, 25], "name": "FINISH_DONE"},
13132     {"bits": [29, 29], "name": "NEW_BUF"},
13133     {"bits": [30, 30], "name": "BUSY"},
13134     {"bits": [31, 31], "name": "FULL"}
13135    ]
13136   },
13137   "SQ_THREAD_TRACE_TOKEN_MASK": {
13138    "fields": [
13139     {"bits": [0, 15], "name": "TOKEN_MASK"},
13140     {"bits": [16, 23], "name": "REG_MASK"},
13141     {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}
13142    ]
13143   },
13144   "SQ_THREAD_TRACE_TOKEN_MASK2": {
13145    "fields": [
13146     {"bits": [0, 31], "name": "INST_MASK"}
13147    ]
13148   },
13149   "SQ_THREAD_TRACE_WPTR": {
13150    "fields": [
13151     {"bits": [0, 29], "name": "WPTR"},
13152     {"bits": [30, 31], "name": "READ_OFFSET"}
13153    ]
13154   },
13155   "SQ_WAVE_EXEC_HI": {
13156    "fields": [
13157     {"bits": [0, 31], "name": "EXEC_HI"}
13158    ]
13159   },
13160   "SQ_WAVE_EXEC_LO": {
13161    "fields": [
13162     {"bits": [0, 31], "name": "EXEC_LO"}
13163    ]
13164   },
13165   "SQ_WAVE_GPR_ALLOC": {
13166    "fields": [
13167     {"bits": [0, 5], "name": "VGPR_BASE"},
13168     {"bits": [8, 13], "name": "VGPR_SIZE"},
13169     {"bits": [16, 21], "name": "SGPR_BASE"},
13170     {"bits": [24, 27], "name": "SGPR_SIZE"}
13171    ]
13172   },
13173   "SQ_WAVE_HW_ID": {
13174    "fields": [
13175     {"bits": [0, 3], "name": "WAVE_ID"},
13176     {"bits": [4, 5], "name": "SIMD_ID"},
13177     {"bits": [6, 7], "name": "PIPE_ID"},
13178     {"bits": [8, 11], "name": "CU_ID"},
13179     {"bits": [12, 12], "name": "SH_ID"},
13180     {"bits": [13, 14], "name": "SE_ID"},
13181     {"bits": [16, 19], "name": "TG_ID"},
13182     {"bits": [20, 23], "name": "VM_ID"},
13183     {"bits": [24, 26], "name": "QUEUE_ID"},
13184     {"bits": [27, 29], "name": "STATE_ID"},
13185     {"bits": [30, 31], "name": "ME_ID"}
13186    ]
13187   },
13188   "SQ_WAVE_IB_DBG0": {
13189    "fields": [
13190     {"bits": [0, 2], "name": "IBUF_ST"},
13191     {"bits": [3, 3], "name": "PC_INVALID"},
13192     {"bits": [4, 4], "name": "NEED_NEXT_DW"},
13193     {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},
13194     {"bits": [8, 9], "name": "IBUF_RPTR"},
13195     {"bits": [10, 11], "name": "IBUF_WPTR"},
13196     {"bits": [16, 19], "name": "INST_STR_ST"},
13197     {"bits": [20, 23], "name": "MISC_CNT"},
13198     {"bits": [24, 25], "name": "ECC_ST"},
13199     {"bits": [26, 26], "name": "IS_HYB"},
13200     {"bits": [27, 28], "name": "HYB_CNT"},
13201     {"bits": [29, 29], "name": "KILL"},
13202     {"bits": [30, 30], "name": "NEED_KILL_IFETCH"}
13203    ]
13204   },
13205   "SQ_WAVE_IB_DBG1": {
13206    "fields": [
13207     {"bits": [0, 0], "name": "IXNACK"},
13208     {"bits": [1, 1], "name": "XNACK"},
13209     {"bits": [2, 2], "name": "TA_NEED_RESET"},
13210     {"bits": [4, 7], "name": "XCNT"},
13211     {"bits": [8, 11], "name": "QCNT"}
13212    ]
13213   },
13214   "SQ_WAVE_IB_STS": {
13215    "fields": [
13216     {"bits": [0, 3], "name": "VM_CNT"},
13217     {"bits": [4, 6], "name": "EXP_CNT"},
13218     {"bits": [8, 11], "name": "LGKM_CNT"},
13219     {"bits": [12, 14], "name": "VALU_CNT"},
13220     {"bits": [15, 15], "name": "FIRST_REPLAY"},
13221     {"bits": [16, 19], "name": "RCNT"}
13222    ]
13223   },
13224   "SQ_WAVE_INST_DW0": {
13225    "fields": [
13226     {"bits": [0, 31], "name": "INST_DW0"}
13227    ]
13228   },
13229   "SQ_WAVE_INST_DW1": {
13230    "fields": [
13231     {"bits": [0, 31], "name": "INST_DW1"}
13232    ]
13233   },
13234   "SQ_WAVE_LDS_ALLOC": {
13235    "fields": [
13236     {"bits": [0, 7], "name": "LDS_BASE"},
13237     {"bits": [12, 20], "name": "LDS_SIZE"}
13238    ]
13239   },
13240   "SQ_WAVE_M0": {
13241    "fields": [
13242     {"bits": [0, 31], "name": "M0"}
13243    ]
13244   },
13245   "SQ_WAVE_MODE": {
13246    "fields": [
13247     {"bits": [0, 3], "name": "FP_ROUND"},
13248     {"bits": [4, 7], "name": "FP_DENORM"},
13249     {"bits": [8, 8], "name": "DX10_CLAMP"},
13250     {"bits": [9, 9], "name": "IEEE"},
13251     {"bits": [10, 10], "name": "LOD_CLAMPED"},
13252     {"bits": [11, 11], "name": "DEBUG_EN"},
13253     {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
13254     {"bits": [27, 27], "name": "GPR_IDX_EN"},
13255     {"bits": [28, 28], "name": "VSKIP"},
13256     {"bits": [29, 31], "name": "CSP"}
13257    ]
13258   },
13259   "SQ_WAVE_PC_HI": {
13260    "fields": [
13261     {"bits": [0, 7], "name": "PC_HI"}
13262    ]
13263   },
13264   "SQ_WAVE_PC_LO": {
13265    "fields": [
13266     {"bits": [0, 31], "name": "PC_LO"}
13267    ]
13268   },
13269   "SQ_WAVE_STATUS": {
13270    "fields": [
13271     {"bits": [0, 0], "name": "SCC"},
13272     {"bits": [1, 2], "name": "SPI_PRIO"},
13273     {"bits": [3, 4], "name": "USER_PRIO"},
13274     {"bits": [5, 5], "name": "PRIV"},
13275     {"bits": [6, 6], "name": "TRAP_EN"},
13276     {"bits": [7, 7], "name": "TTRACE_EN"},
13277     {"bits": [8, 8], "name": "EXPORT_RDY"},
13278     {"bits": [9, 9], "name": "EXECZ"},
13279     {"bits": [10, 10], "name": "VCCZ"},
13280     {"bits": [11, 11], "name": "IN_TG"},
13281     {"bits": [12, 12], "name": "IN_BARRIER"},
13282     {"bits": [13, 13], "name": "HALT"},
13283     {"bits": [14, 14], "name": "TRAP"},
13284     {"bits": [15, 15], "name": "TTRACE_CU_EN"},
13285     {"bits": [16, 16], "name": "VALID"},
13286     {"bits": [17, 17], "name": "ECC_ERR"},
13287     {"bits": [18, 18], "name": "SKIP_EXPORT"},
13288     {"bits": [19, 19], "name": "PERF_EN"},
13289     {"bits": [20, 20], "name": "COND_DBG_USER"},
13290     {"bits": [21, 21], "name": "COND_DBG_SYS"},
13291     {"bits": [22, 22], "name": "ALLOW_REPLAY"},
13292     {"bits": [23, 23], "name": "INST_ATC"},
13293     {"bits": [27, 27], "name": "MUST_EXPORT"}
13294    ]
13295   },
13296   "SQ_WAVE_TBA_HI": {
13297    "fields": [
13298     {"bits": [0, 7], "name": "ADDR_HI"}
13299    ]
13300   },
13301   "SQ_WAVE_TRAPSTS": {
13302    "fields": [
13303     {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},
13304     {"bits": [10, 10], "name": "SAVECTX"},
13305     {"bits": [16, 21], "name": "EXCP_CYCLE"},
13306     {"bits": [29, 31], "name": "DP_RATE"}
13307    ]
13308   },
13309   "SX_PERFCOUNTER0_SELECT": {
13310    "fields": [
13311     {"bits": [0, 9], "name": "PERFCOUNTER_SELECT"},
13312     {"bits": [10, 19], "name": "PERFCOUNTER_SELECT1"},
13313     {"bits": [20, 23], "name": "CNTR_MODE"}
13314    ]
13315   },
13316   "SX_PERFCOUNTER0_SELECT1": {
13317    "fields": [
13318     {"bits": [0, 9], "name": "PERFCOUNTER_SELECT2"},
13319     {"bits": [10, 19], "name": "PERFCOUNTER_SELECT3"}
13320    ]
13321   },
13322   "TA_BC_BASE_ADDR": {
13323    "fields": [
13324     {"bits": [0, 31], "name": "ADDRESS"}
13325    ]
13326   },
13327   "TA_BC_BASE_ADDR_HI": {
13328    "fields": [
13329     {"bits": [0, 7], "name": "ADDRESS"}
13330    ]
13331   },
13332   "TCC_PERFCOUNTER0_SELECT1": {
13333    "fields": [
13334     {"bits": [0, 9], "name": "PERF_SEL2"},
13335     {"bits": [10, 19], "name": "PERF_SEL3"},
13336     {"bits": [24, 27], "name": "PERF_MODE2"},
13337     {"bits": [28, 31], "name": "PERF_MODE3"}
13338    ]
13339   },
13340   "TCC_PERFCOUNTER2_SELECT": {
13341    "fields": [
13342     {"bits": [0, 9], "name": "PERF_SEL"},
13343     {"bits": [20, 23], "name": "CNTR_MODE"},
13344     {"bits": [28, 31], "name": "PERF_MODE"}
13345    ]
13346   },
13347   "TD_PERFCOUNTER0_SELECT": {
13348    "fields": [
13349     {"bits": [0, 7], "name": "PERF_SEL"},
13350     {"bits": [10, 17], "name": "PERF_SEL1"},
13351     {"bits": [20, 23], "name": "CNTR_MODE"},
13352     {"bits": [24, 27], "name": "PERF_MODE1"},
13353     {"bits": [28, 31], "name": "PERF_MODE"}
13354    ]
13355   },
13356   "TD_PERFCOUNTER0_SELECT1": {
13357    "fields": [
13358     {"bits": [0, 7], "name": "PERF_SEL2"},
13359     {"bits": [10, 17], "name": "PERF_SEL3"},
13360     {"bits": [24, 27], "name": "PERF_MODE3"},
13361     {"bits": [28, 31], "name": "PERF_MODE2"}
13362    ]
13363   },
13364   "VGT_DISPATCH_DRAW_INDEX": {
13365    "fields": [
13366     {"bits": [0, 31], "name": "MATCH_INDEX"}
13367    ]
13368   },
13369   "VGT_DMA_BASE": {
13370    "fields": [
13371     {"bits": [0, 31], "name": "BASE_ADDR"}
13372    ]
13373   },
13374   "VGT_DMA_BASE_HI": {
13375    "fields": [
13376     {"bits": [0, 7], "name": "BASE_ADDR"}
13377    ]
13378   },
13379   "VGT_DMA_INDEX_TYPE": {
13380    "fields": [
13381     {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
13382     {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},
13383     {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},
13384     {"bits": [6, 6], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
13385     {"bits": [9, 9], "name": "NOT_EOP"},
13386     {"bits": [10, 10], "name": "REQ_PATH"},
13387     {"bits": [11, 12], "name": "MTYPE"}
13388    ]
13389   },
13390   "VGT_DMA_MAX_SIZE": {
13391    "fields": [
13392     {"bits": [0, 31], "name": "MAX_SIZE"}
13393    ]
13394   },
13395   "VGT_DMA_NUM_INSTANCES": {
13396    "fields": [
13397     {"bits": [0, 31], "name": "NUM_INSTANCES"}
13398    ]
13399   },
13400   "VGT_DMA_SIZE": {
13401    "fields": [
13402     {"bits": [0, 31], "name": "NUM_INDICES"}
13403    ]
13404   },
13405   "VGT_DRAW_INITIATOR": {
13406    "fields": [
13407     {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},
13408     {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},
13409     {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},
13410     {"bits": [5, 5], "name": "NOT_EOP"},
13411     {"bits": [6, 6], "name": "USE_OPAQUE"}
13412    ]
13413   },
13414   "VGT_ESGS_RING_ITEMSIZE": {
13415    "fields": [
13416     {"bits": [0, 14], "name": "ITEMSIZE"}
13417    ]
13418   },
13419   "VGT_ESGS_RING_SIZE": {
13420    "fields": [
13421     {"bits": [0, 31], "name": "MEM_SIZE"}
13422    ]
13423   },
13424   "VGT_ES_PER_GS": {
13425    "fields": [
13426     {"bits": [0, 10], "name": "ES_PER_GS"}
13427    ]
13428   },
13429   "VGT_EVENT_ADDRESS_REG": {
13430    "fields": [
13431     {"bits": [0, 27], "name": "ADDRESS_LOW"}
13432    ]
13433   },
13434   "VGT_EVENT_INITIATOR": {
13435    "fields": [
13436     {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},
13437     {"bits": [18, 26], "name": "ADDRESS_HI"},
13438     {"bits": [27, 27], "name": "EXTENDED_EVENT"}
13439    ]
13440   },
13441   "VGT_GROUP_DECR": {
13442    "fields": [
13443     {"bits": [0, 3], "name": "DECR"}
13444    ]
13445   },
13446   "VGT_GROUP_FIRST_DECR": {
13447    "fields": [
13448     {"bits": [0, 3], "name": "FIRST_DECR"}
13449    ]
13450   },
13451   "VGT_GROUP_PRIM_TYPE": {
13452    "fields": [
13453     {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},
13454     {"bits": [14, 14], "name": "RETAIN_ORDER"},
13455     {"bits": [15, 15], "name": "RETAIN_QUADS"},
13456     {"bits": [16, 18], "name": "PRIM_ORDER"}
13457    ]
13458   },
13459   "VGT_GROUP_VECT_0_CNTL": {
13460    "fields": [
13461     {"bits": [0, 0], "name": "COMP_X_EN"},
13462     {"bits": [1, 1], "name": "COMP_Y_EN"},
13463     {"bits": [2, 2], "name": "COMP_Z_EN"},
13464     {"bits": [3, 3], "name": "COMP_W_EN"},
13465     {"bits": [8, 15], "name": "STRIDE"},
13466     {"bits": [16, 23], "name": "SHIFT"}
13467    ]
13468   },
13469   "VGT_GROUP_VECT_0_FMT_CNTL": {
13470    "fields": [
13471     {"bits": [0, 3], "name": "X_CONV"},
13472     {"bits": [4, 7], "name": "X_OFFSET"},
13473     {"bits": [8, 11], "name": "Y_CONV"},
13474     {"bits": [12, 15], "name": "Y_OFFSET"},
13475     {"bits": [16, 19], "name": "Z_CONV"},
13476     {"bits": [20, 23], "name": "Z_OFFSET"},
13477     {"bits": [24, 27], "name": "W_CONV"},
13478     {"bits": [28, 31], "name": "W_OFFSET"}
13479    ]
13480   },
13481   "VGT_GSVS_RING_OFFSET_1": {
13482    "fields": [
13483     {"bits": [0, 14], "name": "OFFSET"}
13484    ]
13485   },
13486   "VGT_GS_INSTANCE_CNT": {
13487    "fields": [
13488     {"bits": [0, 0], "name": "ENABLE"},
13489     {"bits": [2, 8], "name": "CNT"}
13490    ]
13491   },
13492   "VGT_GS_MAX_VERT_OUT": {
13493    "fields": [
13494     {"bits": [0, 10], "name": "MAX_VERT_OUT"}
13495    ]
13496   },
13497   "VGT_GS_MODE": {
13498    "fields": [
13499     {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},
13500     {"bits": [3, 3], "name": "RESERVED_0"},
13501     {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},
13502     {"bits": [6, 10], "name": "RESERVED_1"},
13503     {"bits": [11, 11], "name": "GS_C_PACK_EN"},
13504     {"bits": [12, 12], "name": "RESERVED_2"},
13505     {"bits": [13, 13], "name": "ES_PASSTHRU"},
13506     {"bits": [14, 14], "name": "RESERVED_3"},
13507     {"bits": [15, 15], "name": "RESERVED_4"},
13508     {"bits": [16, 16], "name": "RESERVED_5"},
13509     {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},
13510     {"bits": [18, 18], "name": "SUPPRESS_CUTS"},
13511     {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},
13512     {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},
13513     {"bits": [21, 22], "name": "ONCHIP"}
13514    ]
13515   },
13516   "VGT_GS_ONCHIP_CNTL": {
13517    "fields": [
13518     {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},
13519     {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"}
13520    ]
13521   },
13522   "VGT_GS_OUT_PRIM_TYPE": {
13523    "fields": [
13524     {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},
13525     {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},
13526     {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},
13527     {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},
13528     {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}
13529    ]
13530   },
13531   "VGT_GS_PER_ES": {
13532    "fields": [
13533     {"bits": [0, 10], "name": "GS_PER_ES"}
13534    ]
13535   },
13536   "VGT_GS_PER_VS": {
13537    "fields": [
13538     {"bits": [0, 3], "name": "GS_PER_VS"}
13539    ]
13540   },
13541   "VGT_HOS_CNTL": {
13542    "fields": [
13543     {"bits": [0, 1], "name": "TESS_MODE"}
13544    ]
13545   },
13546   "VGT_HOS_MAX_TESS_LEVEL": {
13547    "fields": [
13548     {"bits": [0, 31], "name": "MAX_TESS"}
13549    ]
13550   },
13551   "VGT_HOS_MIN_TESS_LEVEL": {
13552    "fields": [
13553     {"bits": [0, 31], "name": "MIN_TESS"}
13554    ]
13555   },
13556   "VGT_HOS_REUSE_DEPTH": {
13557    "fields": [
13558     {"bits": [0, 7], "name": "REUSE_DEPTH"}
13559    ]
13560   },
13561   "VGT_HS_OFFCHIP_PARAM": {
13562    "fields": [
13563     {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},
13564     {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}
13565    ]
13566   },
13567   "VGT_INDX_OFFSET": {
13568    "fields": [
13569     {"bits": [0, 31], "name": "INDX_OFFSET"}
13570    ]
13571   },
13572   "VGT_INSTANCE_STEP_RATE_0": {
13573    "fields": [
13574     {"bits": [0, 31], "name": "STEP_RATE"}
13575    ]
13576   },
13577   "VGT_LS_HS_CONFIG": {
13578    "fields": [
13579     {"bits": [0, 7], "name": "NUM_PATCHES"},
13580     {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},
13581     {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}
13582    ]
13583   },
13584   "VGT_MAX_VTX_INDX": {
13585    "fields": [
13586     {"bits": [0, 31], "name": "MAX_INDX"}
13587    ]
13588   },
13589   "VGT_MIN_VTX_INDX": {
13590    "fields": [
13591     {"bits": [0, 31], "name": "MIN_INDX"}
13592    ]
13593   },
13594   "VGT_MULTI_PRIM_IB_RESET_EN": {
13595    "fields": [
13596     {"bits": [0, 0], "name": "RESET_EN"}
13597    ]
13598   },
13599   "VGT_MULTI_PRIM_IB_RESET_INDX": {
13600    "fields": [
13601     {"bits": [0, 31], "name": "RESET_INDX"}
13602    ]
13603   },
13604   "VGT_OUTPUT_PATH_CNTL": {
13605    "fields": [
13606     {"bits": [0, 2], "name": "PATH_SELECT"}
13607    ]
13608   },
13609   "VGT_OUT_DEALLOC_CNTL": {
13610    "fields": [
13611     {"bits": [0, 6], "name": "DEALLOC_DIST"}
13612    ]
13613   },
13614   "VGT_PERFCOUNTER2_SELECT": {
13615    "fields": [
13616     {"bits": [0, 7], "name": "PERF_SEL"},
13617     {"bits": [28, 31], "name": "PERF_MODE"}
13618    ]
13619   },
13620   "VGT_PERFCOUNTER_SEID_MASK": {
13621    "fields": [
13622     {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}
13623    ]
13624   },
13625   "VGT_PRIMITIVEID_EN": {
13626    "fields": [
13627     {"bits": [0, 0], "name": "PRIMITIVEID_EN"},
13628     {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"}
13629    ]
13630   },
13631   "VGT_PRIMITIVEID_RESET": {
13632    "fields": [
13633     {"bits": [0, 31], "name": "VALUE"}
13634    ]
13635   },
13636   "VGT_PRIMITIVE_TYPE": {
13637    "fields": [
13638     {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}
13639    ]
13640   },
13641   "VGT_REUSE_OFF": {
13642    "fields": [
13643     {"bits": [0, 0], "name": "REUSE_OFF"}
13644    ]
13645   },
13646   "VGT_SHADER_STAGES_EN": {
13647    "fields": [
13648     {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
13649     {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
13650     {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
13651     {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
13652     {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
13653     {"bits": [8, 8], "name": "DYNAMIC_HS"},
13654     {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"},
13655     {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"},
13656     {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"},
13657     {"bits": [12, 12], "name": "VS_WAVE_ID_EN"}
13658    ]
13659   },
13660   "VGT_STRMOUT_BUFFER_CONFIG": {
13661    "fields": [
13662     {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},
13663     {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},
13664     {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},
13665     {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}
13666    ]
13667   },
13668   "VGT_STRMOUT_CONFIG": {
13669    "fields": [
13670     {"bits": [0, 0], "name": "STREAMOUT_0_EN"},
13671     {"bits": [1, 1], "name": "STREAMOUT_1_EN"},
13672     {"bits": [2, 2], "name": "STREAMOUT_2_EN"},
13673     {"bits": [3, 3], "name": "STREAMOUT_3_EN"},
13674     {"bits": [4, 6], "name": "RAST_STREAM"},
13675     {"bits": [8, 11], "name": "RAST_STREAM_MASK"},
13676     {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}
13677    ]
13678   },
13679   "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE": {
13680    "fields": [
13681     {"bits": [0, 8], "name": "VERTEX_STRIDE"}
13682    ]
13683   },
13684   "VGT_STRMOUT_VTX_STRIDE_0": {
13685    "fields": [
13686     {"bits": [0, 9], "name": "STRIDE"}
13687    ]
13688   },
13689   "VGT_TESS_DISTRIBUTION": {
13690    "fields": [
13691     {"bits": [0, 7], "name": "ACCUM_ISOLINE"},
13692     {"bits": [8, 15], "name": "ACCUM_TRI"},
13693     {"bits": [16, 23], "name": "ACCUM_QUAD"}
13694    ]
13695   },
13696   "VGT_TF_MEMORY_BASE": {
13697    "fields": [
13698     {"bits": [0, 31], "name": "BASE"}
13699    ]
13700   },
13701   "VGT_TF_PARAM": {
13702    "fields": [
13703     {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},
13704     {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},
13705     {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},
13706     {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},
13707     {"bits": [9, 9], "name": "DEPRECATED"},
13708     {"bits": [10, 13], "name": "NUM_DS_WAVES_PER_SIMD"},
13709     {"bits": [14, 14], "name": "DISABLE_DONUTS"},
13710     {"bits": [15, 15], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
13711     {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"},
13712     {"bits": [19, 20], "name": "MTYPE"}
13713    ]
13714   },
13715   "VGT_TF_RING_SIZE": {
13716    "fields": [
13717     {"bits": [0, 15], "name": "SIZE"}
13718    ]
13719   },
13720   "VGT_VERTEX_REUSE_BLOCK_CNTL": {
13721    "fields": [
13722     {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}
13723    ]
13724   },
13725   "VGT_VTX_CNT_EN": {
13726    "fields": [
13727     {"bits": [0, 0], "name": "VTX_CNT_EN"}
13728    ]
13729   }
13730  }
13731 }