5 {"name": "ARRAY_LINEAR_GENERAL", "value": 0},
6 {"name": "ARRAY_LINEAR_ALIGNED", "value": 1},
7 {"name": "ARRAY_1D_TILED_THIN1", "value": 2},
8 {"name": "ARRAY_1D_TILED_THICK", "value": 3},
9 {"name": "ARRAY_2D_TILED_THIN1", "value": 4},
10 {"name": "ARRAY_PRT_TILED_THIN1", "value": 5},
11 {"name": "ARRAY_PRT_2D_TILED_THIN1", "value": 6},
12 {"name": "ARRAY_2D_TILED_THICK", "value": 7},
13 {"name": "ARRAY_2D_TILED_XTHICK", "value": 8},
14 {"name": "ARRAY_PRT_TILED_THICK", "value": 9},
15 {"name": "ARRAY_PRT_2D_TILED_THICK", "value": 10},
16 {"name": "ARRAY_PRT_3D_TILED_THIN1", "value": 11},
17 {"name": "ARRAY_3D_TILED_THIN1", "value": 12},
18 {"name": "ARRAY_3D_TILED_THICK", "value": 13},
19 {"name": "ARRAY_3D_TILED_XTHICK", "value": 14},
20 {"name": "ARRAY_PRT_3D_TILED_THICK", "value": 15}
25 {"name": "BUF_DATA_FORMAT_INVALID", "value": 0},
26 {"name": "BUF_DATA_FORMAT_8", "value": 1},
27 {"name": "BUF_DATA_FORMAT_16", "value": 2},
28 {"name": "BUF_DATA_FORMAT_8_8", "value": 3},
29 {"name": "BUF_DATA_FORMAT_32", "value": 4},
30 {"name": "BUF_DATA_FORMAT_16_16", "value": 5},
31 {"name": "BUF_DATA_FORMAT_10_11_11", "value": 6},
32 {"name": "BUF_DATA_FORMAT_11_11_10", "value": 7},
33 {"name": "BUF_DATA_FORMAT_10_10_10_2", "value": 8},
34 {"name": "BUF_DATA_FORMAT_2_10_10_10", "value": 9},
35 {"name": "BUF_DATA_FORMAT_8_8_8_8", "value": 10},
36 {"name": "BUF_DATA_FORMAT_32_32", "value": 11},
37 {"name": "BUF_DATA_FORMAT_16_16_16_16", "value": 12},
38 {"name": "BUF_DATA_FORMAT_32_32_32", "value": 13},
39 {"name": "BUF_DATA_FORMAT_32_32_32_32", "value": 14},
40 {"name": "BUF_DATA_FORMAT_RESERVED_15", "value": 15}
45 {"name": "BUF_NUM_FORMAT_UNORM", "value": 0},
46 {"name": "BUF_NUM_FORMAT_SNORM", "value": 1},
47 {"name": "BUF_NUM_FORMAT_USCALED", "value": 2},
48 {"name": "BUF_NUM_FORMAT_SSCALED", "value": 3},
49 {"name": "BUF_NUM_FORMAT_UINT", "value": 4},
50 {"name": "BUF_NUM_FORMAT_SINT", "value": 5},
51 {"name": "BUF_NUM_FORMAT_UNORM_UINT", "value": 6},
52 {"name": "BUF_NUM_FORMAT_FLOAT", "value": 7}
57 {"name": "ADDR_SURF_BANK_HEIGHT_1", "value": 0},
58 {"name": "ADDR_SURF_BANK_HEIGHT_2", "value": 1},
59 {"name": "ADDR_SURF_BANK_HEIGHT_4", "value": 2},
60 {"name": "ADDR_SURF_BANK_HEIGHT_8", "value": 3}
65 {"name": "ADDR_SURF_BANK_WIDTH_1", "value": 0},
66 {"name": "ADDR_SURF_BANK_WIDTH_2", "value": 1},
67 {"name": "ADDR_SURF_BANK_WIDTH_4", "value": 2},
68 {"name": "ADDR_SURF_BANK_WIDTH_8", "value": 3}
73 {"name": "BINNING_ALLOWED", "value": 0},
74 {"name": "FORCE_BINNING_ON", "value": 1},
75 {"name": "DISABLE_BINNING_USE_NEW_SC", "value": 2},
76 {"name": "DISABLE_BINNING_USE_LEGACY_SC", "value": 3}
81 {"name": "BLEND_ZERO", "value": 0},
82 {"name": "BLEND_ONE", "value": 1},
83 {"name": "BLEND_SRC_COLOR", "value": 2},
84 {"name": "BLEND_ONE_MINUS_SRC_COLOR", "value": 3},
85 {"name": "BLEND_SRC_ALPHA", "value": 4},
86 {"name": "BLEND_ONE_MINUS_SRC_ALPHA", "value": 5},
87 {"name": "BLEND_DST_ALPHA", "value": 6},
88 {"name": "BLEND_ONE_MINUS_DST_ALPHA", "value": 7},
89 {"name": "BLEND_DST_COLOR", "value": 8},
90 {"name": "BLEND_ONE_MINUS_DST_COLOR", "value": 9},
91 {"name": "BLEND_SRC_ALPHA_SATURATE", "value": 10},
92 {"name": "BLEND_BOTH_SRC_ALPHA", "value": 11},
93 {"name": "BLEND_BOTH_INV_SRC_ALPHA", "value": 12},
94 {"name": "BLEND_CONSTANT_COLOR", "value": 13},
95 {"name": "BLEND_ONE_MINUS_CONSTANT_COLOR", "value": 14},
96 {"name": "BLEND_SRC1_COLOR", "value": 15},
97 {"name": "BLEND_INV_SRC1_COLOR", "value": 16},
98 {"name": "BLEND_SRC1_ALPHA", "value": 17},
99 {"name": "BLEND_INV_SRC1_ALPHA", "value": 18},
100 {"name": "BLEND_CONSTANT_ALPHA", "value": 19},
101 {"name": "BLEND_ONE_MINUS_CONSTANT_ALPHA", "value": 20}
106 {"name": "FORCE_OPT_AUTO", "value": 0},
107 {"name": "FORCE_OPT_DISABLE", "value": 1},
108 {"name": "FORCE_OPT_ENABLE_IF_SRC_A_0", "value": 2},
109 {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_0", "value": 3},
110 {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_0", "value": 4},
111 {"name": "FORCE_OPT_ENABLE_IF_SRC_A_1", "value": 5},
112 {"name": "FORCE_OPT_ENABLE_IF_SRC_RGB_1", "value": 6},
113 {"name": "FORCE_OPT_ENABLE_IF_SRC_ARGB_1", "value": 7}
118 {"name": "CB_DISABLE", "value": 0},
119 {"name": "CB_NORMAL", "value": 1},
120 {"name": "CB_ELIMINATE_FAST_CLEAR", "value": 2},
121 {"name": "CB_RESOLVE", "value": 3},
122 {"name": "CB_DECOMPRESS", "value": 4},
123 {"name": "CB_FMASK_DECOMPRESS", "value": 5},
124 {"name": "CB_DCC_DECOMPRESS", "value": 6}
127 "CBPerfClearFilterSel": {
129 {"name": "CB_PERF_CLEAR_FILTER_SEL_NONCLEAR", "value": 0},
130 {"name": "CB_PERF_CLEAR_FILTER_SEL_CLEAR", "value": 1}
133 "CBPerfOpFilterSel": {
135 {"name": "CB_PERF_OP_FILTER_SEL_WRITE_ONLY", "value": 0},
136 {"name": "CB_PERF_OP_FILTER_SEL_NEEDS_DESTINATION", "value": 1},
137 {"name": "CB_PERF_OP_FILTER_SEL_RESOLVE", "value": 2},
138 {"name": "CB_PERF_OP_FILTER_SEL_DECOMPRESS", "value": 3},
139 {"name": "CB_PERF_OP_FILTER_SEL_FMASK_DECOMPRESS", "value": 4},
140 {"name": "CB_PERF_OP_FILTER_SEL_ELIMINATE_FAST_CLEAR", "value": 5}
143 "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE": {
145 {"name": "MAX_BLOCK_SIZE_64B", "value": 0},
146 {"name": "MAX_BLOCK_SIZE_128B", "value": 1},
147 {"name": "MAX_BLOCK_SIZE_256B", "value": 2}
150 "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE": {
152 {"name": "MIN_BLOCK_SIZE_32B", "value": 0},
153 {"name": "MIN_BLOCK_SIZE_64B", "value": 1}
158 {"name": "OUT", "value": 1},
159 {"name": "IN_0", "value": 2},
160 {"name": "IN_1", "value": 4},
161 {"name": "IN_10", "value": 8},
162 {"name": "IN_2", "value": 16},
163 {"name": "IN_20", "value": 32},
164 {"name": "IN_21", "value": 64},
165 {"name": "IN_210", "value": 128},
166 {"name": "IN_3", "value": 256},
167 {"name": "IN_30", "value": 512},
168 {"name": "IN_31", "value": 1024},
169 {"name": "IN_310", "value": 2048},
170 {"name": "IN_32", "value": 4096},
171 {"name": "IN_320", "value": 8192},
172 {"name": "IN_321", "value": 16384},
173 {"name": "IN_3210", "value": 32768}
176 "CP_PERFMON_ENABLE_MODE": {
178 {"name": "CP_PERFMON_ENABLE_MODE_ALWAYS_COUNT", "value": 0},
179 {"name": "CP_PERFMON_ENABLE_MODE_RESERVED_1", "value": 1},
180 {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_TRUE", "value": 2},
181 {"name": "CP_PERFMON_ENABLE_MODE_COUNT_CONTEXT_FALSE", "value": 3}
184 "CP_PERFMON_STATE": {
186 {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
187 {"name": "CP_PERFMON_STATE_START_COUNTING", "value": 1},
188 {"name": "CP_PERFMON_STATE_STOP_COUNTING", "value": 2},
189 {"name": "CP_PERFMON_STATE_RESERVED_3", "value": 3},
190 {"name": "CP_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
191 {"name": "CP_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
196 {"name": "CMASK_ADDR_TILED", "value": 0},
197 {"name": "CMASK_ADDR_LINEAR", "value": 1},
198 {"name": "CMASK_ADDR_COMPATIBLE", "value": 2}
203 {"name": "COLOR_INVALID", "value": 0},
204 {"name": "COLOR_8", "value": 1},
205 {"name": "COLOR_16", "value": 2},
206 {"name": "COLOR_8_8", "value": 3},
207 {"name": "COLOR_32", "value": 4},
208 {"name": "COLOR_16_16", "value": 5},
209 {"name": "COLOR_10_11_11", "value": 6},
210 {"name": "COLOR_11_11_10", "value": 7},
211 {"name": "COLOR_10_10_10_2", "value": 8},
212 {"name": "COLOR_2_10_10_10", "value": 9},
213 {"name": "COLOR_8_8_8_8", "value": 10},
214 {"name": "COLOR_32_32", "value": 11},
215 {"name": "COLOR_16_16_16_16", "value": 12},
216 {"name": "COLOR_RESERVED_13", "value": 13},
217 {"name": "COLOR_32_32_32_32", "value": 14},
218 {"name": "COLOR_RESERVED_15", "value": 15},
219 {"name": "COLOR_5_6_5", "value": 16},
220 {"name": "COLOR_1_5_5_5", "value": 17},
221 {"name": "COLOR_5_5_5_1", "value": 18},
222 {"name": "COLOR_4_4_4_4", "value": 19},
223 {"name": "COLOR_8_24", "value": 20},
224 {"name": "COLOR_24_8", "value": 21},
225 {"name": "COLOR_X24_8_32_FLOAT", "value": 22},
226 {"name": "COLOR_RESERVED_23", "value": 23},
227 {"name": "COLOR_RESERVED_24", "value": 24},
228 {"name": "COLOR_RESERVED_25", "value": 25},
229 {"name": "COLOR_RESERVED_26", "value": 26},
230 {"name": "COLOR_RESERVED_27", "value": 27},
231 {"name": "COLOR_RESERVED_28", "value": 28},
232 {"name": "COLOR_RESERVED_29", "value": 29},
233 {"name": "COLOR_RESERVED_30", "value": 30},
234 {"name": "COLOR_2_10_10_10_6E4", "value": 31}
239 {"name": "COMB_DST_PLUS_SRC", "value": 0},
240 {"name": "COMB_SRC_MINUS_DST", "value": 1},
241 {"name": "COMB_MIN_DST_SRC", "value": 2},
242 {"name": "COMB_MAX_DST_SRC", "value": 3},
243 {"name": "COMB_DST_MINUS_SRC", "value": 4}
248 {"name": "FRAG_NEVER", "value": 0},
249 {"name": "FRAG_LESS", "value": 1},
250 {"name": "FRAG_EQUAL", "value": 2},
251 {"name": "FRAG_LEQUAL", "value": 3},
252 {"name": "FRAG_GREATER", "value": 4},
253 {"name": "FRAG_NOTEQUAL", "value": 5},
254 {"name": "FRAG_GEQUAL", "value": 6},
255 {"name": "FRAG_ALWAYS", "value": 7}
258 "ConservativeZExport": {
260 {"name": "EXPORT_ANY_Z", "value": 0},
261 {"name": "EXPORT_LESS_THAN_Z", "value": 1},
262 {"name": "EXPORT_GREATER_THAN_Z", "value": 2},
263 {"name": "EXPORT_RESERVED", "value": 3}
268 {"name": "INPUT_COVERAGE", "value": 0},
269 {"name": "INPUT_INNER_COVERAGE", "value": 1},
270 {"name": "INPUT_DEPTH_COVERAGE", "value": 2},
271 {"name": "RAW", "value": 3}
274 "DB_DFSM_CONTROL__PUNCHOUT_MODE": {
276 {"name": "AUTO", "value": 0},
277 {"name": "FORCE_ON", "value": 1},
278 {"name": "FORCE_OFF", "value": 2},
279 {"name": "RESERVED", "value": 3}
282 "DbPRTFaultBehavior": {
284 {"name": "FAULT_ZERO", "value": 0},
285 {"name": "FAULT_ONE", "value": 1},
286 {"name": "FAULT_FAIL", "value": 2},
287 {"name": "FAULT_PASS", "value": 3}
292 {"name": "PSLC_AUTO", "value": 0},
293 {"name": "PSLC_ON_HANG_ONLY", "value": 1},
294 {"name": "PSLC_ASAP", "value": 2},
295 {"name": "PSLC_COUNTDOWN", "value": 3}
300 {"name": "INVALID", "value": 1},
301 {"name": "INPUT_DENORMAL", "value": 2},
302 {"name": "DIVIDE_BY_ZERO", "value": 4},
303 {"name": "OVERFLOW", "value": 8},
304 {"name": "UNDERFLOW", "value": 16},
305 {"name": "INEXACT", "value": 32},
306 {"name": "INT_DIVIDE_BY_ZERO", "value": 64},
307 {"name": "ADDRESS_WATCH", "value": 128},
308 {"name": "MEMORY_VIOLATION", "value": 256}
313 {"name": "FP_32_DENORMS", "value": 48},
314 {"name": "FP_64_DENORMS", "value": 192},
315 {"name": "FP_ALL_DENORMS", "value": 240}
320 {"name": "FORCE_OFF", "value": 0},
321 {"name": "FORCE_ENABLE", "value": 1},
322 {"name": "FORCE_DISABLE", "value": 2},
323 {"name": "FORCE_RESERVED", "value": 3}
328 {"name": "IMG_DATA_FORMAT_INVALID", "value": 0},
329 {"name": "IMG_DATA_FORMAT_8", "value": 1},
330 {"name": "IMG_DATA_FORMAT_16", "value": 2},
331 {"name": "IMG_DATA_FORMAT_8_8", "value": 3},
332 {"name": "IMG_DATA_FORMAT_32", "value": 4},
333 {"name": "IMG_DATA_FORMAT_16_16", "value": 5},
334 {"name": "IMG_DATA_FORMAT_10_11_11", "value": 6},
335 {"name": "IMG_DATA_FORMAT_11_11_10", "value": 7},
336 {"name": "IMG_DATA_FORMAT_10_10_10_2", "value": 8},
337 {"name": "IMG_DATA_FORMAT_2_10_10_10", "value": 9},
338 {"name": "IMG_DATA_FORMAT_8_8_8_8", "value": 10},
339 {"name": "IMG_DATA_FORMAT_32_32", "value": 11},
340 {"name": "IMG_DATA_FORMAT_16_16_16_16", "value": 12},
341 {"name": "IMG_DATA_FORMAT_32_32_32", "value": 13},
342 {"name": "IMG_DATA_FORMAT_32_32_32_32", "value": 14},
343 {"name": "IMG_DATA_FORMAT_RESERVED_15", "value": 15},
344 {"name": "IMG_DATA_FORMAT_5_6_5", "value": 16},
345 {"name": "IMG_DATA_FORMAT_1_5_5_5", "value": 17},
346 {"name": "IMG_DATA_FORMAT_5_5_5_1", "value": 18},
347 {"name": "IMG_DATA_FORMAT_4_4_4_4", "value": 19},
348 {"name": "IMG_DATA_FORMAT_8_24", "value": 20},
349 {"name": "IMG_DATA_FORMAT_24_8", "value": 21},
350 {"name": "IMG_DATA_FORMAT_X24_8_32", "value": 22},
351 {"name": "IMG_DATA_FORMAT_8_AS_8_8_8_8", "value": 23},
352 {"name": "IMG_DATA_FORMAT_ETC2_RGB", "value": 24},
353 {"name": "IMG_DATA_FORMAT_ETC2_RGBA", "value": 25},
354 {"name": "IMG_DATA_FORMAT_ETC2_R", "value": 26},
355 {"name": "IMG_DATA_FORMAT_ETC2_RG", "value": 27},
356 {"name": "IMG_DATA_FORMAT_ETC2_RGBA1", "value": 28},
357 {"name": "IMG_DATA_FORMAT_RESERVED_29", "value": 29},
358 {"name": "IMG_DATA_FORMAT_RESERVED_30", "value": 30},
359 {"name": "IMG_DATA_FORMAT_6E4", "value": 31},
360 {"name": "IMG_DATA_FORMAT_GB_GR", "value": 32},
361 {"name": "IMG_DATA_FORMAT_BG_RG", "value": 33},
362 {"name": "IMG_DATA_FORMAT_5_9_9_9", "value": 34},
363 {"name": "IMG_DATA_FORMAT_BC1", "value": 35},
364 {"name": "IMG_DATA_FORMAT_BC2", "value": 36},
365 {"name": "IMG_DATA_FORMAT_BC3", "value": 37},
366 {"name": "IMG_DATA_FORMAT_BC4", "value": 38},
367 {"name": "IMG_DATA_FORMAT_BC5", "value": 39},
368 {"name": "IMG_DATA_FORMAT_BC6", "value": 40},
369 {"name": "IMG_DATA_FORMAT_BC7", "value": 41},
370 {"name": "IMG_DATA_FORMAT_16_AS_32_32", "value": 42},
371 {"name": "IMG_DATA_FORMAT_16_AS_16_16_16_16", "value": 43},
372 {"name": "IMG_DATA_FORMAT_16_AS_32_32_32_32", "value": 44},
373 {"name": "IMG_DATA_FORMAT_FMASK", "value": 45},
374 {"name": "IMG_DATA_FORMAT_ASTC_2D_LDR", "value": 46},
375 {"name": "IMG_DATA_FORMAT_ASTC_2D_HDR", "value": 47},
376 {"name": "IMG_DATA_FORMAT_ASTC_2D_LDR_SRGB", "value": 48},
377 {"name": "IMG_DATA_FORMAT_ASTC_3D_LDR", "value": 49},
378 {"name": "IMG_DATA_FORMAT_ASTC_3D_HDR", "value": 50},
379 {"name": "IMG_DATA_FORMAT_ASTC_3D_LDR_SRGB", "value": 51},
380 {"name": "IMG_DATA_FORMAT_N_IN_16", "value": 52},
381 {"name": "IMG_DATA_FORMAT_N_IN_16_16", "value": 53},
382 {"name": "IMG_DATA_FORMAT_N_IN_16_16_16_16", "value": 54},
383 {"name": "IMG_DATA_FORMAT_N_IN_16_AS_16_16_16_16", "value": 55},
384 {"name": "IMG_DATA_FORMAT_RESERVED_56", "value": 56},
385 {"name": "IMG_DATA_FORMAT_4_4", "value": 57},
386 {"name": "IMG_DATA_FORMAT_6_5_5", "value": 58},
387 {"name": "IMG_DATA_FORMAT_RESERVED_59", "value": 59},
388 {"name": "IMG_DATA_FORMAT_RESERVED_60", "value": 60},
389 {"name": "IMG_DATA_FORMAT_8_AS_32", "value": 61},
390 {"name": "IMG_DATA_FORMAT_8_AS_32_32", "value": 62},
391 {"name": "IMG_DATA_FORMAT_32_AS_32_32_32_32", "value": 63}
394 "IMG_DATA_FORMAT_STENCIL": {
396 {"name": "IMG_DATA_FORMAT_S8_16", "value": 59},
397 {"name": "IMG_DATA_FORMAT_S8_32", "value": 60}
402 {"name": "IMG_NUM_FORMAT_UNORM", "value": 0},
403 {"name": "IMG_NUM_FORMAT_SNORM", "value": 1},
404 {"name": "IMG_NUM_FORMAT_USCALED", "value": 2},
405 {"name": "IMG_NUM_FORMAT_SSCALED", "value": 3},
406 {"name": "IMG_NUM_FORMAT_UINT", "value": 4},
407 {"name": "IMG_NUM_FORMAT_SINT", "value": 5},
408 {"name": "IMG_NUM_FORMAT_UNORM_UINT", "value": 6},
409 {"name": "IMG_NUM_FORMAT_FLOAT", "value": 7},
410 {"name": "IMG_NUM_FORMAT_RESERVED_8", "value": 8},
411 {"name": "IMG_NUM_FORMAT_SRGB", "value": 9},
412 {"name": "IMG_NUM_FORMAT_RESERVED_10", "value": 10},
413 {"name": "IMG_NUM_FORMAT_RESERVED_11", "value": 11},
414 {"name": "IMG_NUM_FORMAT_RESERVED_12", "value": 12},
415 {"name": "IMG_NUM_FORMAT_RESERVED_13", "value": 13},
416 {"name": "IMG_NUM_FORMAT_RESERVED_14", "value": 14},
417 {"name": "IMG_NUM_FORMAT_RESERVED_15", "value": 15}
420 "IMG_NUM_FORMAT_FMASK": {
422 {"name": "IMG_NUM_FORMAT_FMASK_8_2_1", "value": 0},
423 {"name": "IMG_NUM_FORMAT_FMASK_8_4_1", "value": 1},
424 {"name": "IMG_NUM_FORMAT_FMASK_8_8_1", "value": 2},
425 {"name": "IMG_NUM_FORMAT_FMASK_8_2_2", "value": 3},
426 {"name": "IMG_NUM_FORMAT_FMASK_8_4_2", "value": 4},
427 {"name": "IMG_NUM_FORMAT_FMASK_8_4_4", "value": 5},
428 {"name": "IMG_NUM_FORMAT_FMASK_16_16_1", "value": 6},
429 {"name": "IMG_NUM_FORMAT_FMASK_16_8_2", "value": 7},
430 {"name": "IMG_NUM_FORMAT_FMASK_32_16_2", "value": 8},
431 {"name": "IMG_NUM_FORMAT_FMASK_32_8_4", "value": 9},
432 {"name": "IMG_NUM_FORMAT_FMASK_32_8_8", "value": 10},
433 {"name": "IMG_NUM_FORMAT_FMASK_64_16_4", "value": 11},
434 {"name": "IMG_NUM_FORMAT_FMASK_64_16_8", "value": 12},
435 {"name": "IMG_NUM_FORMAT_FMASK_RESERVED_13", "value": 13},
436 {"name": "IMG_NUM_FORMAT_FMASK_RESERVED_14", "value": 14},
437 {"name": "IMG_NUM_FORMAT_FMASK_RESERVED_15", "value": 15}
442 {"name": "ADDR_SURF_MACRO_ASPECT_1", "value": 0},
443 {"name": "ADDR_SURF_MACRO_ASPECT_2", "value": 1},
444 {"name": "ADDR_SURF_MACRO_ASPECT_4", "value": 2},
445 {"name": "ADDR_SURF_MACRO_ASPECT_8", "value": 3}
450 {"name": "ADDR_SURF_DISPLAY_MICRO_TILING", "value": 0},
451 {"name": "ADDR_SURF_THIN_MICRO_TILING", "value": 1},
452 {"name": "ADDR_SURF_DEPTH_MICRO_TILING", "value": 2},
453 {"name": "ADDR_SURF_ROTATED_MICRO_TILING", "value": 3},
454 {"name": "ADDR_SURF_THICK_MICRO_TILING", "value": 4}
459 {"name": "ADDR_SURF_2_BANK", "value": 0},
460 {"name": "ADDR_SURF_4_BANK", "value": 1},
461 {"name": "ADDR_SURF_8_BANK", "value": 2},
462 {"name": "ADDR_SURF_16_BANK", "value": 3}
465 "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE": {
467 {"name": "X_DRAW_POINTS", "value": 0},
468 {"name": "X_DRAW_LINES", "value": 1},
469 {"name": "X_DRAW_TRIANGLES", "value": 2}
472 "PA_SU_SC_MODE_CNTL__POLY_MODE": {
474 {"name": "X_DISABLE_POLY_MODE", "value": 0},
475 {"name": "X_DUAL_MODE", "value": 1}
478 "PA_SU_VTX_CNTL__ROUND_MODE": {
480 {"name": "X_TRUNCATE", "value": 0},
481 {"name": "X_ROUND", "value": 1},
482 {"name": "X_ROUND_TO_EVEN", "value": 2},
483 {"name": "X_ROUND_TO_ODD", "value": 3}
488 {"name": "ADDR_SURF_P2", "value": 0},
489 {"name": "ADDR_SURF_P2_RESERVED0", "value": 1},
490 {"name": "ADDR_SURF_P2_RESERVED1", "value": 2},
491 {"name": "ADDR_SURF_P2_RESERVED2", "value": 3},
492 {"name": "ADDR_SURF_P4_8x16", "value": 4},
493 {"name": "ADDR_SURF_P4_16x16", "value": 5},
494 {"name": "ADDR_SURF_P4_16x32", "value": 6},
495 {"name": "ADDR_SURF_P4_32x32", "value": 7},
496 {"name": "ADDR_SURF_P8_16x16_8x16", "value": 8},
497 {"name": "ADDR_SURF_P8_16x32_8x16", "value": 9},
498 {"name": "ADDR_SURF_P8_32x32_8x16", "value": 10},
499 {"name": "ADDR_SURF_P8_16x32_16x16", "value": 11},
500 {"name": "ADDR_SURF_P8_32x32_16x16", "value": 12},
501 {"name": "ADDR_SURF_P8_32x32_16x32", "value": 13},
502 {"name": "ADDR_SURF_P8_32x64_32x32", "value": 14},
503 {"name": "ADDR_SURF_P8_RESERVED0", "value": 15},
504 {"name": "ADDR_SURF_P16_32x32_8x16", "value": 16},
505 {"name": "ADDR_SURF_P16_32x32_16x16", "value": 17}
510 {"name": "RASTER_CONFIG_PKR_MAP_0", "value": 0},
511 {"name": "RASTER_CONFIG_PKR_MAP_1", "value": 1},
512 {"name": "RASTER_CONFIG_PKR_MAP_2", "value": 2},
513 {"name": "RASTER_CONFIG_PKR_MAP_3", "value": 3}
518 {"name": "RASTER_CONFIG_PKR_XSEL_0", "value": 0},
519 {"name": "RASTER_CONFIG_PKR_XSEL_1", "value": 1},
520 {"name": "RASTER_CONFIG_PKR_XSEL_2", "value": 2},
521 {"name": "RASTER_CONFIG_PKR_XSEL_3", "value": 3}
526 {"name": "RASTER_CONFIG_PKR_XSEL2_0", "value": 0},
527 {"name": "RASTER_CONFIG_PKR_XSEL2_1", "value": 1},
528 {"name": "RASTER_CONFIG_PKR_XSEL2_2", "value": 2},
529 {"name": "RASTER_CONFIG_PKR_XSEL2_3", "value": 3}
534 {"name": "RASTER_CONFIG_PKR_YSEL_0", "value": 0},
535 {"name": "RASTER_CONFIG_PKR_YSEL_1", "value": 1},
536 {"name": "RASTER_CONFIG_PKR_YSEL_2", "value": 2},
537 {"name": "RASTER_CONFIG_PKR_YSEL_3", "value": 3}
542 {"name": "X_16_8_FIXED_POINT_1_16TH", "value": 0},
543 {"name": "X_16_8_FIXED_POINT_1_8TH", "value": 1},
544 {"name": "X_16_8_FIXED_POINT_1_4TH", "value": 2},
545 {"name": "X_16_8_FIXED_POINT_1_2", "value": 3},
546 {"name": "X_16_8_FIXED_POINT_1", "value": 4},
547 {"name": "X_16_8_FIXED_POINT_1_256TH", "value": 5},
548 {"name": "X_14_10_FIXED_POINT_1_1024TH", "value": 6},
549 {"name": "X_12_12_FIXED_POINT_1_4096TH", "value": 7}
554 {"name": "ROP3_CLEAR", "value": 0},
555 {"name": "X_0X05", "value": 5},
556 {"name": "X_0X0A", "value": 10},
557 {"name": "X_0X0F", "value": 15},
558 {"name": "ROP3_NOR", "value": 17},
559 {"name": "ROP3_AND_INVERTED", "value": 34},
560 {"name": "ROP3_COPY_INVERTED", "value": 51},
561 {"name": "ROP3_AND_REVERSE", "value": 68},
562 {"name": "X_0X50", "value": 80},
563 {"name": "ROP3_INVERT", "value": 85},
564 {"name": "X_0X5A", "value": 90},
565 {"name": "X_0X5F", "value": 95},
566 {"name": "ROP3_XOR", "value": 102},
567 {"name": "ROP3_NAND", "value": 119},
568 {"name": "ROP3_AND", "value": 136},
569 {"name": "ROP3_EQUIVALENT", "value": 153},
570 {"name": "X_0XA0", "value": 160},
571 {"name": "X_0XA5", "value": 165},
572 {"name": "ROP3_NO_OP", "value": 170},
573 {"name": "X_0XAF", "value": 175},
574 {"name": "ROP3_OR_INVERTED", "value": 187},
575 {"name": "ROP3_COPY", "value": 204},
576 {"name": "ROP3_OR_REVERSE", "value": 221},
577 {"name": "ROP3_OR", "value": 238},
578 {"name": "X_0XF0", "value": 240},
579 {"name": "X_0XF5", "value": 245},
580 {"name": "X_0XFA", "value": 250},
581 {"name": "ROP3_SET", "value": 255}
586 {"name": "RASTER_CONFIG_RB_MAP_0", "value": 0},
587 {"name": "RASTER_CONFIG_RB_MAP_1", "value": 1},
588 {"name": "RASTER_CONFIG_RB_MAP_2", "value": 2},
589 {"name": "RASTER_CONFIG_RB_MAP_3", "value": 3}
594 {"name": "RASTER_CONFIG_RB_XSEL_0", "value": 0},
595 {"name": "RASTER_CONFIG_RB_XSEL_1", "value": 1}
600 {"name": "RASTER_CONFIG_RB_XSEL2_0", "value": 0},
601 {"name": "RASTER_CONFIG_RB_XSEL2_1", "value": 1},
602 {"name": "RASTER_CONFIG_RB_XSEL2_2", "value": 2},
603 {"name": "RASTER_CONFIG_RB_XSEL2_3", "value": 3}
608 {"name": "RASTER_CONFIG_RB_YSEL_0", "value": 0},
609 {"name": "RASTER_CONFIG_RB_YSEL_1", "value": 1}
612 "SPI_PNT_SPRITE_OVERRIDE": {
614 {"name": "SPI_PNT_SPRITE_SEL_0", "value": 0},
615 {"name": "SPI_PNT_SPRITE_SEL_1", "value": 1},
616 {"name": "SPI_PNT_SPRITE_SEL_S", "value": 2},
617 {"name": "SPI_PNT_SPRITE_SEL_T", "value": 3},
618 {"name": "SPI_PNT_SPRITE_SEL_NONE", "value": 4}
621 "SPI_SHADER_EX_FORMAT": {
623 {"name": "SPI_SHADER_ZERO", "value": 0},
624 {"name": "SPI_SHADER_32_R", "value": 1},
625 {"name": "SPI_SHADER_32_GR", "value": 2},
626 {"name": "SPI_SHADER_32_AR", "value": 3},
627 {"name": "SPI_SHADER_FP16_ABGR", "value": 4},
628 {"name": "SPI_SHADER_UNORM16_ABGR", "value": 5},
629 {"name": "SPI_SHADER_SNORM16_ABGR", "value": 6},
630 {"name": "SPI_SHADER_UINT16_ABGR", "value": 7},
631 {"name": "SPI_SHADER_SINT16_ABGR", "value": 8},
632 {"name": "SPI_SHADER_32_ABGR", "value": 9}
635 "SPI_SHADER_FORMAT": {
637 {"name": "SPI_SHADER_NONE", "value": 0},
638 {"name": "SPI_SHADER_1COMP", "value": 1},
639 {"name": "SPI_SHADER_2COMP", "value": 2},
640 {"name": "SPI_SHADER_4COMPRESS", "value": 3},
641 {"name": "SPI_SHADER_4COMP", "value": 4}
644 "SPM_PERFMON_STATE": {
646 {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET", "value": 0},
647 {"name": "STRM_PERFMON_STATE_START_COUNTING", "value": 1},
648 {"name": "STRM_PERFMON_STATE_STOP_COUNTING", "value": 2},
649 {"name": "STRM_PERFMON_STATE_RESERVED_3", "value": 3},
650 {"name": "STRM_PERFMON_STATE_DISABLE_AND_RESET_PHANTOM", "value": 4},
651 {"name": "STRM_PERFMON_STATE_COUNT_AND_DUMP_PHANTOM", "value": 5}
654 "SQ_IMG_FILTER_TYPE": {
656 {"name": "SQ_IMG_FILTER_MODE_BLEND", "value": 0},
657 {"name": "SQ_IMG_FILTER_MODE_MIN", "value": 1},
658 {"name": "SQ_IMG_FILTER_MODE_MAX", "value": 2}
661 "SQ_IMG_RSRC_WORD4__BC_SWIZZLE": {
663 {"name": "BC_SWIZZLE_XYZW", "value": 0},
664 {"name": "BC_SWIZZLE_XWYZ", "value": 1},
665 {"name": "BC_SWIZZLE_WZYX", "value": 2},
666 {"name": "BC_SWIZZLE_WXYZ", "value": 3},
667 {"name": "BC_SWIZZLE_ZYXW", "value": 4},
668 {"name": "BC_SWIZZLE_YXWZ", "value": 5}
671 "SQ_RSRC_BUF_TYPE": {
673 {"name": "SQ_RSRC_BUF", "value": 0},
674 {"name": "SQ_RSRC_BUF_RSVD_1", "value": 1},
675 {"name": "SQ_RSRC_BUF_RSVD_2", "value": 2},
676 {"name": "SQ_RSRC_BUF_RSVD_3", "value": 3}
679 "SQ_RSRC_IMG_TYPE": {
681 {"name": "SQ_RSRC_IMG_RSVD_0", "value": 0},
682 {"name": "SQ_RSRC_IMG_RSVD_1", "value": 1},
683 {"name": "SQ_RSRC_IMG_RSVD_2", "value": 2},
684 {"name": "SQ_RSRC_IMG_RSVD_3", "value": 3},
685 {"name": "SQ_RSRC_IMG_RSVD_4", "value": 4},
686 {"name": "SQ_RSRC_IMG_RSVD_5", "value": 5},
687 {"name": "SQ_RSRC_IMG_RSVD_6", "value": 6},
688 {"name": "SQ_RSRC_IMG_RSVD_7", "value": 7},
689 {"name": "SQ_RSRC_IMG_1D", "value": 8},
690 {"name": "SQ_RSRC_IMG_2D", "value": 9},
691 {"name": "SQ_RSRC_IMG_3D", "value": 10},
692 {"name": "SQ_RSRC_IMG_CUBE", "value": 11},
693 {"name": "SQ_RSRC_IMG_1D_ARRAY", "value": 12},
694 {"name": "SQ_RSRC_IMG_2D_ARRAY", "value": 13},
695 {"name": "SQ_RSRC_IMG_2D_MSAA", "value": 14},
696 {"name": "SQ_RSRC_IMG_2D_MSAA_ARRAY", "value": 15}
701 {"name": "SQ_SEL_0", "value": 0},
702 {"name": "SQ_SEL_1", "value": 1},
703 {"name": "SQ_SEL_RESERVED_0", "value": 2},
704 {"name": "SQ_SEL_RESERVED_1", "value": 3},
705 {"name": "SQ_SEL_X", "value": 4},
706 {"name": "SQ_SEL_Y", "value": 5},
707 {"name": "SQ_SEL_Z", "value": 6},
708 {"name": "SQ_SEL_W", "value": 7}
711 "SQ_TEX_BORDER_COLOR": {
713 {"name": "SQ_TEX_BORDER_COLOR_TRANS_BLACK", "value": 0},
714 {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_BLACK", "value": 1},
715 {"name": "SQ_TEX_BORDER_COLOR_OPAQUE_WHITE", "value": 2},
716 {"name": "SQ_TEX_BORDER_COLOR_REGISTER", "value": 3}
721 {"name": "SQ_TEX_WRAP", "value": 0},
722 {"name": "SQ_TEX_MIRROR", "value": 1},
723 {"name": "SQ_TEX_CLAMP_LAST_TEXEL", "value": 2},
724 {"name": "SQ_TEX_MIRROR_ONCE_LAST_TEXEL", "value": 3},
725 {"name": "SQ_TEX_CLAMP_HALF_BORDER", "value": 4},
726 {"name": "SQ_TEX_MIRROR_ONCE_HALF_BORDER", "value": 5},
727 {"name": "SQ_TEX_CLAMP_BORDER", "value": 6},
728 {"name": "SQ_TEX_MIRROR_ONCE_BORDER", "value": 7}
731 "SQ_TEX_DEPTH_COMPARE": {
733 {"name": "SQ_TEX_DEPTH_COMPARE_NEVER", "value": 0},
734 {"name": "SQ_TEX_DEPTH_COMPARE_LESS", "value": 1},
735 {"name": "SQ_TEX_DEPTH_COMPARE_EQUAL", "value": 2},
736 {"name": "SQ_TEX_DEPTH_COMPARE_LESSEQUAL", "value": 3},
737 {"name": "SQ_TEX_DEPTH_COMPARE_GREATER", "value": 4},
738 {"name": "SQ_TEX_DEPTH_COMPARE_NOTEQUAL", "value": 5},
739 {"name": "SQ_TEX_DEPTH_COMPARE_GREATEREQUAL", "value": 6},
740 {"name": "SQ_TEX_DEPTH_COMPARE_ALWAYS", "value": 7}
743 "SQ_TEX_MIP_FILTER": {
745 {"name": "SQ_TEX_MIP_FILTER_NONE", "value": 0},
746 {"name": "SQ_TEX_MIP_FILTER_POINT", "value": 1},
747 {"name": "SQ_TEX_MIP_FILTER_LINEAR", "value": 2},
748 {"name": "SQ_TEX_MIP_FILTER_POINT_ANISO_ADJ", "value": 3}
751 "SQ_TEX_XY_FILTER": {
753 {"name": "SQ_TEX_XY_FILTER_POINT", "value": 0},
754 {"name": "SQ_TEX_XY_FILTER_BILINEAR", "value": 1},
755 {"name": "SQ_TEX_XY_FILTER_ANISO_POINT", "value": 2},
756 {"name": "SQ_TEX_XY_FILTER_ANISO_BILINEAR", "value": 3}
761 {"name": "SQ_TEX_Z_FILTER_NONE", "value": 0},
762 {"name": "SQ_TEX_Z_FILTER_POINT", "value": 1},
763 {"name": "SQ_TEX_Z_FILTER_LINEAR", "value": 2}
768 {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_ALL", "value": 0},
769 {"name": "BLEND_OPT_PRESERVE_ALL_IGNORE_NONE", "value": 1},
770 {"name": "BLEND_OPT_PRESERVE_C1_IGNORE_C0", "value": 2},
771 {"name": "BLEND_OPT_PRESERVE_C0_IGNORE_C1", "value": 3},
772 {"name": "BLEND_OPT_PRESERVE_A1_IGNORE_A0", "value": 4},
773 {"name": "BLEND_OPT_PRESERVE_A0_IGNORE_A1", "value": 5},
774 {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_A0", "value": 6},
775 {"name": "BLEND_OPT_PRESERVE_NONE_IGNORE_NONE", "value": 7}
778 "SX_BLEND_OPT_EPSILON__MRT0_EPSILON": {
780 {"name": "EXACT", "value": 0},
781 {"name": "11BIT_FORMAT", "value": 1},
782 {"name": "10BIT_FORMAT", "value": 3},
783 {"name": "8BIT_FORMAT", "value": 6},
784 {"name": "6BIT_FORMAT", "value": 11},
785 {"name": "5BIT_FORMAT", "value": 13},
786 {"name": "4BIT_FORMAT", "value": 15}
789 "SX_DOWNCONVERT_FORMAT": {
791 {"name": "SX_RT_EXPORT_NO_CONVERSION", "value": 0},
792 {"name": "SX_RT_EXPORT_32_R", "value": 1},
793 {"name": "SX_RT_EXPORT_32_A", "value": 2},
794 {"name": "SX_RT_EXPORT_10_11_11", "value": 3},
795 {"name": "SX_RT_EXPORT_2_10_10_10", "value": 4},
796 {"name": "SX_RT_EXPORT_8_8_8_8", "value": 5},
797 {"name": "SX_RT_EXPORT_5_6_5", "value": 6},
798 {"name": "SX_RT_EXPORT_1_5_5_5", "value": 7},
799 {"name": "SX_RT_EXPORT_4_4_4_4", "value": 8},
800 {"name": "SX_RT_EXPORT_16_16_GR", "value": 9},
801 {"name": "SX_RT_EXPORT_16_16_AR", "value": 10}
806 {"name": "OPT_COMB_NONE", "value": 0},
807 {"name": "OPT_COMB_ADD", "value": 1},
808 {"name": "OPT_COMB_SUBTRACT", "value": 2},
809 {"name": "OPT_COMB_MIN", "value": 3},
810 {"name": "OPT_COMB_MAX", "value": 4},
811 {"name": "OPT_COMB_REVSUBTRACT", "value": 5},
812 {"name": "OPT_COMB_BLEND_DISABLED", "value": 6},
813 {"name": "OPT_COMB_SAFE_ADD", "value": 7}
818 {"name": "RASTER_CONFIG_SC_MAP_0", "value": 0},
819 {"name": "RASTER_CONFIG_SC_MAP_1", "value": 1},
820 {"name": "RASTER_CONFIG_SC_MAP_2", "value": 2},
821 {"name": "RASTER_CONFIG_SC_MAP_3", "value": 3}
826 {"name": "RASTER_CONFIG_SC_XSEL_8_WIDE_TILE", "value": 0},
827 {"name": "RASTER_CONFIG_SC_XSEL_16_WIDE_TILE", "value": 1},
828 {"name": "RASTER_CONFIG_SC_XSEL_32_WIDE_TILE", "value": 2},
829 {"name": "RASTER_CONFIG_SC_XSEL_64_WIDE_TILE", "value": 3}
834 {"name": "RASTER_CONFIG_SC_YSEL_8_WIDE_TILE", "value": 0},
835 {"name": "RASTER_CONFIG_SC_YSEL_16_WIDE_TILE", "value": 1},
836 {"name": "RASTER_CONFIG_SC_YSEL_32_WIDE_TILE", "value": 2},
837 {"name": "RASTER_CONFIG_SC_YSEL_64_WIDE_TILE", "value": 3}
842 {"name": "RASTER_CONFIG_SE_MAP_0", "value": 0},
843 {"name": "RASTER_CONFIG_SE_MAP_1", "value": 1},
844 {"name": "RASTER_CONFIG_SE_MAP_2", "value": 2},
845 {"name": "RASTER_CONFIG_SE_MAP_3", "value": 3}
850 {"name": "RASTER_CONFIG_SE_PAIR_MAP_0", "value": 0},
851 {"name": "RASTER_CONFIG_SE_PAIR_MAP_1", "value": 1},
852 {"name": "RASTER_CONFIG_SE_PAIR_MAP_2", "value": 2},
853 {"name": "RASTER_CONFIG_SE_PAIR_MAP_3", "value": 3}
858 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_8_WIDE_TILE", "value": 0},
859 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_16_WIDE_TILE", "value": 1},
860 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_32_WIDE_TILE", "value": 2},
861 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_64_WIDE_TILE", "value": 3},
862 {"name": "RASTER_CONFIG_SE_PAIR_XSEL_128_WIDE_TILE", "value": 4}
867 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_8_WIDE_TILE", "value": 0},
868 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_16_WIDE_TILE", "value": 1},
869 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_32_WIDE_TILE", "value": 2},
870 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_64_WIDE_TILE", "value": 3},
871 {"name": "RASTER_CONFIG_SE_PAIR_YSEL_128_WIDE_TILE", "value": 4}
876 {"name": "RASTER_CONFIG_SE_XSEL_8_WIDE_TILE", "value": 0},
877 {"name": "RASTER_CONFIG_SE_XSEL_16_WIDE_TILE", "value": 1},
878 {"name": "RASTER_CONFIG_SE_XSEL_32_WIDE_TILE", "value": 2},
879 {"name": "RASTER_CONFIG_SE_XSEL_64_WIDE_TILE", "value": 3},
880 {"name": "RASTER_CONFIG_SE_XSEL_128_WIDE_TILE", "value": 4}
885 {"name": "RASTER_CONFIG_SE_YSEL_8_WIDE_TILE", "value": 0},
886 {"name": "RASTER_CONFIG_SE_YSEL_16_WIDE_TILE", "value": 1},
887 {"name": "RASTER_CONFIG_SE_YSEL_32_WIDE_TILE", "value": 2},
888 {"name": "RASTER_CONFIG_SE_YSEL_64_WIDE_TILE", "value": 3},
889 {"name": "RASTER_CONFIG_SE_YSEL_128_WIDE_TILE", "value": 4}
894 {"name": "STENCIL_INVALID", "value": 0},
895 {"name": "STENCIL_8", "value": 1}
900 {"name": "STENCIL_KEEP", "value": 0},
901 {"name": "STENCIL_ZERO", "value": 1},
902 {"name": "STENCIL_ONES", "value": 2},
903 {"name": "STENCIL_REPLACE_TEST", "value": 3},
904 {"name": "STENCIL_REPLACE_OP", "value": 4},
905 {"name": "STENCIL_ADD_CLAMP", "value": 5},
906 {"name": "STENCIL_SUB_CLAMP", "value": 6},
907 {"name": "STENCIL_INVERT", "value": 7},
908 {"name": "STENCIL_ADD_WRAP", "value": 8},
909 {"name": "STENCIL_SUB_WRAP", "value": 9},
910 {"name": "STENCIL_AND", "value": 10},
911 {"name": "STENCIL_OR", "value": 11},
912 {"name": "STENCIL_XOR", "value": 12},
913 {"name": "STENCIL_NAND", "value": 13},
914 {"name": "STENCIL_NOR", "value": 14},
915 {"name": "STENCIL_XNOR", "value": 15}
920 {"name": "ENDIAN_NONE", "value": 0},
921 {"name": "ENDIAN_8IN16", "value": 1},
922 {"name": "ENDIAN_8IN32", "value": 2},
923 {"name": "ENDIAN_8IN64", "value": 3}
928 {"name": "NUMBER_UNORM", "value": 0},
929 {"name": "NUMBER_SNORM", "value": 1},
930 {"name": "NUMBER_USCALED", "value": 2},
931 {"name": "NUMBER_SSCALED", "value": 3},
932 {"name": "NUMBER_UINT", "value": 4},
933 {"name": "NUMBER_SINT", "value": 5},
934 {"name": "NUMBER_SRGB", "value": 6},
935 {"name": "NUMBER_FLOAT", "value": 7}
940 {"name": "SWAP_STD", "value": 0},
941 {"name": "SWAP_ALT", "value": 1},
942 {"name": "SWAP_STD_REV", "value": 2},
943 {"name": "SWAP_ALT_REV", "value": 3}
948 {"name": "ADDR_SURF_TILE_SPLIT_64B", "value": 0},
949 {"name": "ADDR_SURF_TILE_SPLIT_128B", "value": 1},
950 {"name": "ADDR_SURF_TILE_SPLIT_256B", "value": 2},
951 {"name": "ADDR_SURF_TILE_SPLIT_512B", "value": 3},
952 {"name": "ADDR_SURF_TILE_SPLIT_1KB", "value": 4},
953 {"name": "ADDR_SURF_TILE_SPLIT_2KB", "value": 5},
954 {"name": "ADDR_SURF_TILE_SPLIT_4KB", "value": 6}
959 {"name": "NO_DIST", "value": 0},
960 {"name": "PATCHES", "value": 1},
961 {"name": "DONUTS", "value": 2},
962 {"name": "TRAPEZOIDS", "value": 3}
965 "VGT_DI_MAJOR_MODE_SELECT": {
967 {"name": "DI_MAJOR_MODE_0", "value": 0},
968 {"name": "DI_MAJOR_MODE_1", "value": 1}
971 "VGT_DI_PRIM_TYPE": {
973 {"name": "DI_PT_NONE", "value": 0},
974 {"name": "DI_PT_POINTLIST", "value": 1},
975 {"name": "DI_PT_LINELIST", "value": 2},
976 {"name": "DI_PT_LINESTRIP", "value": 3},
977 {"name": "DI_PT_TRILIST", "value": 4},
978 {"name": "DI_PT_TRIFAN", "value": 5},
979 {"name": "DI_PT_TRISTRIP", "value": 6},
980 {"name": "DI_PT_2D_RECTANGLE", "value": 7},
981 {"name": "DI_PT_UNUSED_1", "value": 8},
982 {"name": "DI_PT_PATCH", "value": 9},
983 {"name": "DI_PT_LINELIST_ADJ", "value": 10},
984 {"name": "DI_PT_LINESTRIP_ADJ", "value": 11},
985 {"name": "DI_PT_TRILIST_ADJ", "value": 12},
986 {"name": "DI_PT_TRISTRIP_ADJ", "value": 13},
987 {"name": "DI_PT_UNUSED_3", "value": 14},
988 {"name": "DI_PT_UNUSED_4", "value": 15},
989 {"name": "DI_PT_TRI_WITH_WFLAGS", "value": 16},
990 {"name": "DI_PT_RECTLIST", "value": 17},
991 {"name": "DI_PT_LINELOOP", "value": 18},
992 {"name": "DI_PT_QUADLIST", "value": 19},
993 {"name": "DI_PT_QUADSTRIP", "value": 20},
994 {"name": "DI_PT_POLYGON", "value": 21}
997 "VGT_DI_SOURCE_SELECT": {
999 {"name": "DI_SRC_SEL_DMA", "value": 0},
1000 {"name": "DI_SRC_SEL_IMMEDIATE", "value": 1},
1001 {"name": "DI_SRC_SEL_AUTO_INDEX", "value": 2},
1002 {"name": "DI_SRC_SEL_RESERVED", "value": 3}
1005 "VGT_DMA_BUF_TYPE": {
1007 {"name": "VGT_DMA_BUF_MEM", "value": 0},
1008 {"name": "VGT_DMA_BUF_RING", "value": 1},
1009 {"name": "VGT_DMA_BUF_SETUP", "value": 2},
1010 {"name": "VGT_DMA_PTR_UPDATE", "value": 3}
1013 "VGT_DMA_SWAP_MODE": {
1015 {"name": "VGT_DMA_SWAP_NONE", "value": 0},
1016 {"name": "VGT_DMA_SWAP_16_BIT", "value": 1},
1017 {"name": "VGT_DMA_SWAP_32_BIT", "value": 2},
1018 {"name": "VGT_DMA_SWAP_WORD", "value": 3}
1023 {"name": "Reserved_0x00", "value": 0},
1024 {"name": "SAMPLE_STREAMOUTSTATS1", "value": 1},
1025 {"name": "SAMPLE_STREAMOUTSTATS2", "value": 2},
1026 {"name": "SAMPLE_STREAMOUTSTATS3", "value": 3},
1027 {"name": "CACHE_FLUSH_TS", "value": 4},
1028 {"name": "CONTEXT_DONE", "value": 5},
1029 {"name": "CACHE_FLUSH", "value": 6},
1030 {"name": "CS_PARTIAL_FLUSH", "value": 7},
1031 {"name": "VGT_STREAMOUT_SYNC", "value": 8},
1032 {"name": "Reserved_0x09", "value": 9},
1033 {"name": "VGT_STREAMOUT_RESET", "value": 10},
1034 {"name": "END_OF_PIPE_INCR_DE", "value": 11},
1035 {"name": "END_OF_PIPE_IB_END", "value": 12},
1036 {"name": "RST_PIX_CNT", "value": 13},
1037 {"name": "BREAK_BATCH", "value": 14},
1038 {"name": "VS_PARTIAL_FLUSH", "value": 15},
1039 {"name": "PS_PARTIAL_FLUSH", "value": 16},
1040 {"name": "FLUSH_HS_OUTPUT", "value": 17},
1041 {"name": "FLUSH_DFSM", "value": 18},
1042 {"name": "RESET_TO_LOWEST_VGT", "value": 19},
1043 {"name": "CACHE_FLUSH_AND_INV_TS_EVENT", "value": 20},
1044 {"name": "ZPASS_DONE", "value": 21},
1045 {"name": "CACHE_FLUSH_AND_INV_EVENT", "value": 22},
1046 {"name": "PERFCOUNTER_START", "value": 23},
1047 {"name": "PERFCOUNTER_STOP", "value": 24},
1048 {"name": "PIPELINESTAT_START", "value": 25},
1049 {"name": "PIPELINESTAT_STOP", "value": 26},
1050 {"name": "PERFCOUNTER_SAMPLE", "value": 27},
1051 {"name": "Available_0x1c", "value": 28},
1052 {"name": "Available_0x1d", "value": 29},
1053 {"name": "SAMPLE_PIPELINESTAT", "value": 30},
1054 {"name": "SO_VGTSTREAMOUT_FLUSH", "value": 31},
1055 {"name": "SAMPLE_STREAMOUTSTATS", "value": 32},
1056 {"name": "RESET_VTX_CNT", "value": 33},
1057 {"name": "BLOCK_CONTEXT_DONE", "value": 34},
1058 {"name": "CS_CONTEXT_DONE", "value": 35},
1059 {"name": "VGT_FLUSH", "value": 36},
1060 {"name": "TGID_ROLLOVER", "value": 37},
1061 {"name": "SQ_NON_EVENT", "value": 38},
1062 {"name": "SC_SEND_DB_VPZ", "value": 39},
1063 {"name": "BOTTOM_OF_PIPE_TS", "value": 40},
1064 {"name": "FLUSH_SX_TS", "value": 41},
1065 {"name": "DB_CACHE_FLUSH_AND_INV", "value": 42},
1066 {"name": "FLUSH_AND_INV_DB_DATA_TS", "value": 43},
1067 {"name": "FLUSH_AND_INV_DB_META", "value": 44},
1068 {"name": "FLUSH_AND_INV_CB_DATA_TS", "value": 45},
1069 {"name": "FLUSH_AND_INV_CB_META", "value": 46},
1070 {"name": "CS_DONE", "value": 47},
1071 {"name": "PS_DONE", "value": 48},
1072 {"name": "FLUSH_AND_INV_CB_PIXEL_DATA", "value": 49},
1073 {"name": "SX_CB_RAT_ACK_REQUEST", "value": 50},
1074 {"name": "THREAD_TRACE_START", "value": 51},
1075 {"name": "THREAD_TRACE_STOP", "value": 52},
1076 {"name": "THREAD_TRACE_MARKER", "value": 53},
1077 {"name": "THREAD_TRACE_FLUSH", "value": 54},
1078 {"name": "THREAD_TRACE_FINISH", "value": 55},
1079 {"name": "PIXEL_PIPE_STAT_CONTROL", "value": 56},
1080 {"name": "PIXEL_PIPE_STAT_DUMP", "value": 57},
1081 {"name": "PIXEL_PIPE_STAT_RESET", "value": 58},
1082 {"name": "CONTEXT_SUSPEND", "value": 59},
1083 {"name": "OFFCHIP_HS_DEALLOC", "value": 60},
1084 {"name": "ENABLE_NGG_PIPELINE", "value": 61},
1085 {"name": "ENABLE_LEGACY_PIPELINE", "value": 62},
1086 {"name": "Reserved_0x3f", "value": 63}
1089 "VGT_GS_CUT_MODE": {
1091 {"name": "GS_CUT_1024", "value": 0},
1092 {"name": "GS_CUT_512", "value": 1},
1093 {"name": "GS_CUT_256", "value": 2},
1094 {"name": "GS_CUT_128", "value": 3}
1097 "VGT_GS_MODE_TYPE": {
1099 {"name": "GS_OFF", "value": 0},
1100 {"name": "GS_SCENARIO_A", "value": 1},
1101 {"name": "GS_SCENARIO_B", "value": 2},
1102 {"name": "GS_SCENARIO_G", "value": 3},
1103 {"name": "GS_SCENARIO_C", "value": 4},
1104 {"name": "SPRITE_EN", "value": 5}
1107 "VGT_GS_OUTPRIM_TYPE": {
1109 {"name": "POINTLIST", "value": 0},
1110 {"name": "LINESTRIP", "value": 1},
1111 {"name": "TRISTRIP", "value": 2},
1112 {"name": "RECTLIST", "value": 3}
1115 "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY": {
1117 {"name": "X_8K_DWORDS", "value": 0},
1118 {"name": "X_4K_DWORDS", "value": 1},
1119 {"name": "X_2K_DWORDS", "value": 2},
1120 {"name": "X_1K_DWORDS", "value": 3}
1123 "VGT_INDEX_TYPE_MODE": {
1125 {"name": "VGT_INDEX_16", "value": 0},
1126 {"name": "VGT_INDEX_32", "value": 1},
1127 {"name": "VGT_INDEX_8", "value": 2}
1130 "VGT_RDREQ_POLICY": {
1132 {"name": "VGT_POLICY_LRU", "value": 0},
1133 {"name": "VGT_POLICY_STREAM", "value": 1}
1136 "VGT_STAGES_ES_EN": {
1138 {"name": "ES_STAGE_OFF", "value": 0},
1139 {"name": "ES_STAGE_DS", "value": 1},
1140 {"name": "ES_STAGE_REAL", "value": 2},
1141 {"name": "RESERVED_ES", "value": 3}
1144 "VGT_STAGES_GS_EN": {
1146 {"name": "GS_STAGE_OFF", "value": 0},
1147 {"name": "GS_STAGE_ON", "value": 1}
1150 "VGT_STAGES_HS_EN": {
1152 {"name": "HS_STAGE_OFF", "value": 0},
1153 {"name": "HS_STAGE_ON", "value": 1}
1156 "VGT_STAGES_LS_EN": {
1158 {"name": "LS_STAGE_OFF", "value": 0},
1159 {"name": "LS_STAGE_ON", "value": 1},
1160 {"name": "CS_STAGE_ON", "value": 2},
1161 {"name": "RESERVED_LS", "value": 3}
1164 "VGT_STAGES_VS_EN": {
1166 {"name": "VS_STAGE_REAL", "value": 0},
1167 {"name": "VS_STAGE_DS", "value": 1},
1168 {"name": "VS_STAGE_COPY_SHADER", "value": 2},
1169 {"name": "RESERVED_VS", "value": 3}
1172 "VGT_TESS_PARTITION": {
1174 {"name": "PART_INTEGER", "value": 0},
1175 {"name": "PART_POW2", "value": 1},
1176 {"name": "PART_FRAC_ODD", "value": 2},
1177 {"name": "PART_FRAC_EVEN", "value": 3}
1180 "VGT_TESS_TOPOLOGY": {
1182 {"name": "OUTPUT_POINT", "value": 0},
1183 {"name": "OUTPUT_LINE", "value": 1},
1184 {"name": "OUTPUT_TRIANGLE_CW", "value": 2},
1185 {"name": "OUTPUT_TRIANGLE_CCW", "value": 3}
1190 {"name": "TESS_ISOLINE", "value": 0},
1191 {"name": "TESS_TRIANGLE", "value": 1},
1192 {"name": "TESS_QUAD", "value": 2}
1197 {"name": "Z_INVALID", "value": 0},
1198 {"name": "Z_16", "value": 1},
1199 {"name": "Z_24", "value": 2},
1200 {"name": "Z_32_FLOAT", "value": 3}
1205 {"name": "FORCE_SUMM_OFF", "value": 0},
1206 {"name": "FORCE_SUMM_MINZ", "value": 1},
1207 {"name": "FORCE_SUMM_MAXZ", "value": 2},
1208 {"name": "FORCE_SUMM_BOTH", "value": 3}
1213 {"name": "LATE_Z", "value": 0},
1214 {"name": "EARLY_Z_THEN_LATE_Z", "value": 1},
1215 {"name": "RE_Z", "value": 2},
1216 {"name": "EARLY_Z_THEN_RE_Z", "value": 3}
1220 "register_mappings": [
1223 "map": {"at": 68, "to": "mm"},
1224 "name": "SQ_WAVE_MODE",
1225 "type_ref": "SQ_WAVE_MODE"
1229 "map": {"at": 72, "to": "mm"},
1230 "name": "SQ_WAVE_STATUS",
1231 "type_ref": "SQ_WAVE_STATUS"
1235 "map": {"at": 76, "to": "mm"},
1236 "name": "SQ_WAVE_TRAPSTS",
1237 "type_ref": "SQ_WAVE_TRAPSTS"
1241 "map": {"at": 80, "to": "mm"},
1242 "name": "SQ_WAVE_HW_ID",
1243 "type_ref": "SQ_WAVE_HW_ID"
1247 "map": {"at": 84, "to": "mm"},
1248 "name": "SQ_WAVE_GPR_ALLOC",
1249 "type_ref": "SQ_WAVE_GPR_ALLOC"
1253 "map": {"at": 88, "to": "mm"},
1254 "name": "SQ_WAVE_LDS_ALLOC",
1255 "type_ref": "SQ_WAVE_LDS_ALLOC"
1259 "map": {"at": 92, "to": "mm"},
1260 "name": "SQ_WAVE_IB_STS",
1261 "type_ref": "SQ_WAVE_IB_STS"
1265 "map": {"at": 96, "to": "mm"},
1266 "name": "SQ_WAVE_PC_LO",
1267 "type_ref": "SQ_WAVE_PC_LO"
1271 "map": {"at": 100, "to": "mm"},
1272 "name": "SQ_WAVE_PC_HI",
1273 "type_ref": "SQ_WAVE_PC_HI"
1277 "map": {"at": 104, "to": "mm"},
1278 "name": "SQ_WAVE_INST_DW0",
1279 "type_ref": "SQ_WAVE_INST_DW0"
1283 "map": {"at": 108, "to": "mm"},
1284 "name": "SQ_WAVE_INST_DW1",
1285 "type_ref": "SQ_WAVE_INST_DW1"
1289 "map": {"at": 112, "to": "mm"},
1290 "name": "SQ_WAVE_IB_DBG0",
1291 "type_ref": "SQ_WAVE_IB_DBG0"
1295 "map": {"at": 116, "to": "mm"},
1296 "name": "SQ_WAVE_IB_DBG1",
1297 "type_ref": "SQ_WAVE_IB_DBG1"
1301 "map": {"at": 120, "to": "mm"},
1302 "name": "SQ_WAVE_FLUSH_IB",
1303 "type_ref": "SQ_WAVE_FLUSH_IB"
1307 "map": {"at": 2480, "to": "mm"},
1308 "name": "SQ_WAVE_TTMP0",
1309 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1313 "map": {"at": 2484, "to": "mm"},
1314 "name": "SQ_WAVE_TTMP1",
1315 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1319 "map": {"at": 2488, "to": "mm"},
1320 "name": "SQ_WAVE_TTMP2",
1321 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1325 "map": {"at": 2492, "to": "mm"},
1326 "name": "SQ_WAVE_TTMP3",
1327 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1331 "map": {"at": 2496, "to": "mm"},
1332 "name": "SQ_WAVE_TTMP4",
1333 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1337 "map": {"at": 2500, "to": "mm"},
1338 "name": "SQ_WAVE_TTMP5",
1339 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1343 "map": {"at": 2504, "to": "mm"},
1344 "name": "SQ_WAVE_TTMP6",
1345 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1349 "map": {"at": 2508, "to": "mm"},
1350 "name": "SQ_WAVE_TTMP7",
1351 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1355 "map": {"at": 2512, "to": "mm"},
1356 "name": "SQ_WAVE_TTMP8",
1357 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1361 "map": {"at": 2516, "to": "mm"},
1362 "name": "SQ_WAVE_TTMP9",
1363 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1367 "map": {"at": 2520, "to": "mm"},
1368 "name": "SQ_WAVE_TTMP10",
1369 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1373 "map": {"at": 2524, "to": "mm"},
1374 "name": "SQ_WAVE_TTMP11",
1375 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1379 "map": {"at": 2528, "to": "mm"},
1380 "name": "SQ_WAVE_TTMP12",
1381 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1385 "map": {"at": 2532, "to": "mm"},
1386 "name": "SQ_WAVE_TTMP13",
1387 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1391 "map": {"at": 2536, "to": "mm"},
1392 "name": "SQ_WAVE_TTMP14",
1393 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1397 "map": {"at": 2540, "to": "mm"},
1398 "name": "SQ_WAVE_TTMP15",
1399 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1403 "map": {"at": 2544, "to": "mm"},
1404 "name": "SQ_WAVE_M0",
1405 "type_ref": "SQ_WAVE_M0"
1409 "map": {"at": 2552, "to": "mm"},
1410 "name": "SQ_WAVE_EXEC_LO",
1411 "type_ref": "SQ_WAVE_EXEC_LO"
1415 "map": {"at": 2556, "to": "mm"},
1416 "name": "SQ_WAVE_EXEC_HI",
1417 "type_ref": "SQ_WAVE_EXEC_HI"
1421 "map": {"at": 32776, "to": "mm"},
1422 "name": "GRBM_STATUS2",
1423 "type_ref": "GRBM_STATUS2"
1427 "map": {"at": 32784, "to": "mm"},
1428 "name": "GRBM_STATUS",
1429 "type_ref": "GRBM_STATUS"
1433 "map": {"at": 32788, "to": "mm"},
1434 "name": "GRBM_STATUS_SE0",
1435 "type_ref": "GRBM_STATUS_SE0"
1439 "map": {"at": 32792, "to": "mm"},
1440 "name": "GRBM_STATUS_SE1",
1441 "type_ref": "GRBM_STATUS_SE0"
1445 "map": {"at": 32824, "to": "mm"},
1446 "name": "GRBM_STATUS_SE2",
1447 "type_ref": "GRBM_STATUS_SE0"
1451 "map": {"at": 32828, "to": "mm"},
1452 "name": "GRBM_STATUS_SE3",
1453 "type_ref": "GRBM_STATUS_SE0"
1457 "map": {"at": 33296, "to": "mm"},
1458 "name": "CP_CPC_STATUS",
1459 "type_ref": "CP_CPC_STATUS"
1463 "map": {"at": 33300, "to": "mm"},
1464 "name": "CP_CPC_BUSY_STAT",
1465 "type_ref": "CP_CPC_BUSY_STAT"
1469 "map": {"at": 33304, "to": "mm"},
1470 "name": "CP_CPC_STALLED_STAT1",
1471 "type_ref": "CP_CPC_STALLED_STAT1"
1475 "map": {"at": 33308, "to": "mm"},
1476 "name": "CP_CPF_STATUS",
1477 "type_ref": "CP_CPF_STATUS"
1481 "map": {"at": 33312, "to": "mm"},
1482 "name": "CP_CPF_BUSY_STAT",
1483 "type_ref": "CP_CPF_BUSY_STAT"
1487 "map": {"at": 33316, "to": "mm"},
1488 "name": "CP_CPF_STALLED_STAT1",
1489 "type_ref": "CP_CPF_STALLED_STAT1"
1493 "map": {"at": 33324, "to": "mm"},
1494 "name": "CP_CPC_GRBM_FREE_COUNT",
1495 "type_ref": "CP_CPC_GRBM_FREE_COUNT"
1499 "map": {"at": 33344, "to": "mm"},
1500 "name": "CP_CPC_SCRATCH_INDEX",
1501 "type_ref": "CP_CPC_SCRATCH_INDEX"
1505 "map": {"at": 33348, "to": "mm"},
1506 "name": "CP_CPC_SCRATCH_DATA",
1507 "type_ref": "CP_CPC_SCRATCH_DATA"
1511 "map": {"at": 33352, "to": "mm"},
1512 "name": "CP_CPF_GRBM_FREE_COUNT",
1513 "type_ref": "CP_CPF_GRBM_FREE_COUNT"
1517 "map": {"at": 33436, "to": "mm"},
1518 "name": "CP_CPC_HALT_HYST_COUNT",
1519 "type_ref": "CP_CPC_HALT_HYST_COUNT"
1523 "map": {"at": 36608, "to": "mm"},
1524 "name": "SQ_BUF_RSRC_WORD0",
1525 "type_ref": "SQ_BUF_RSRC_WORD0"
1529 "map": {"at": 36612, "to": "mm"},
1530 "name": "SQ_BUF_RSRC_WORD1",
1531 "type_ref": "SQ_BUF_RSRC_WORD1"
1535 "map": {"at": 36616, "to": "mm"},
1536 "name": "SQ_BUF_RSRC_WORD2",
1537 "type_ref": "SQ_BUF_RSRC_WORD2"
1541 "map": {"at": 36620, "to": "mm"},
1542 "name": "SQ_BUF_RSRC_WORD3",
1543 "type_ref": "SQ_BUF_RSRC_WORD3"
1547 "map": {"at": 36624, "to": "mm"},
1548 "name": "SQ_IMG_RSRC_WORD0",
1549 "type_ref": "SQ_BUF_RSRC_WORD0"
1553 "map": {"at": 36628, "to": "mm"},
1554 "name": "SQ_IMG_RSRC_WORD1",
1555 "type_ref": "SQ_IMG_RSRC_WORD1"
1559 "map": {"at": 36632, "to": "mm"},
1560 "name": "SQ_IMG_RSRC_WORD2",
1561 "type_ref": "SQ_IMG_RSRC_WORD2"
1565 "map": {"at": 36636, "to": "mm"},
1566 "name": "SQ_IMG_RSRC_WORD3",
1567 "type_ref": "SQ_IMG_RSRC_WORD3"
1571 "map": {"at": 36640, "to": "mm"},
1572 "name": "SQ_IMG_RSRC_WORD4",
1573 "type_ref": "SQ_IMG_RSRC_WORD4"
1577 "map": {"at": 36644, "to": "mm"},
1578 "name": "SQ_IMG_RSRC_WORD5",
1579 "type_ref": "SQ_IMG_RSRC_WORD5"
1583 "map": {"at": 36648, "to": "mm"},
1584 "name": "SQ_IMG_RSRC_WORD6",
1585 "type_ref": "SQ_IMG_RSRC_WORD6"
1589 "map": {"at": 36652, "to": "mm"},
1590 "name": "SQ_IMG_RSRC_WORD7",
1591 "type_ref": "SQ_IMG_RSRC_WORD7"
1595 "map": {"at": 36656, "to": "mm"},
1596 "name": "SQ_IMG_SAMP_WORD0",
1597 "type_ref": "SQ_IMG_SAMP_WORD0"
1601 "map": {"at": 36660, "to": "mm"},
1602 "name": "SQ_IMG_SAMP_WORD1",
1603 "type_ref": "SQ_IMG_SAMP_WORD1"
1607 "map": {"at": 36664, "to": "mm"},
1608 "name": "SQ_IMG_SAMP_WORD2",
1609 "type_ref": "SQ_IMG_SAMP_WORD2"
1613 "map": {"at": 36668, "to": "mm"},
1614 "name": "SQ_IMG_SAMP_WORD3",
1615 "type_ref": "SQ_IMG_SAMP_WORD3"
1619 "map": {"at": 39160, "to": "mm"},
1620 "name": "GB_ADDR_CONFIG",
1621 "type_ref": "GB_ADDR_CONFIG"
1625 "map": {"at": 39184, "to": "mm"},
1626 "name": "GB_TILE_MODE0",
1627 "type_ref": "GB_TILE_MODE0"
1631 "map": {"at": 39188, "to": "mm"},
1632 "name": "GB_TILE_MODE1",
1633 "type_ref": "GB_TILE_MODE0"
1637 "map": {"at": 39192, "to": "mm"},
1638 "name": "GB_TILE_MODE2",
1639 "type_ref": "GB_TILE_MODE0"
1643 "map": {"at": 39196, "to": "mm"},
1644 "name": "GB_TILE_MODE3",
1645 "type_ref": "GB_TILE_MODE0"
1649 "map": {"at": 39200, "to": "mm"},
1650 "name": "GB_TILE_MODE4",
1651 "type_ref": "GB_TILE_MODE0"
1655 "map": {"at": 39204, "to": "mm"},
1656 "name": "GB_TILE_MODE5",
1657 "type_ref": "GB_TILE_MODE0"
1661 "map": {"at": 39208, "to": "mm"},
1662 "name": "GB_TILE_MODE6",
1663 "type_ref": "GB_TILE_MODE0"
1667 "map": {"at": 39212, "to": "mm"},
1668 "name": "GB_TILE_MODE7",
1669 "type_ref": "GB_TILE_MODE0"
1673 "map": {"at": 39216, "to": "mm"},
1674 "name": "GB_TILE_MODE8",
1675 "type_ref": "GB_TILE_MODE0"
1679 "map": {"at": 39220, "to": "mm"},
1680 "name": "GB_TILE_MODE9",
1681 "type_ref": "GB_TILE_MODE0"
1685 "map": {"at": 39224, "to": "mm"},
1686 "name": "GB_TILE_MODE10",
1687 "type_ref": "GB_TILE_MODE0"
1691 "map": {"at": 39228, "to": "mm"},
1692 "name": "GB_TILE_MODE11",
1693 "type_ref": "GB_TILE_MODE0"
1697 "map": {"at": 39232, "to": "mm"},
1698 "name": "GB_TILE_MODE12",
1699 "type_ref": "GB_TILE_MODE0"
1703 "map": {"at": 39236, "to": "mm"},
1704 "name": "GB_TILE_MODE13",
1705 "type_ref": "GB_TILE_MODE0"
1709 "map": {"at": 39240, "to": "mm"},
1710 "name": "GB_TILE_MODE14",
1711 "type_ref": "GB_TILE_MODE0"
1715 "map": {"at": 39244, "to": "mm"},
1716 "name": "GB_TILE_MODE15",
1717 "type_ref": "GB_TILE_MODE0"
1721 "map": {"at": 39248, "to": "mm"},
1722 "name": "GB_TILE_MODE16",
1723 "type_ref": "GB_TILE_MODE0"
1727 "map": {"at": 39252, "to": "mm"},
1728 "name": "GB_TILE_MODE17",
1729 "type_ref": "GB_TILE_MODE0"
1733 "map": {"at": 39256, "to": "mm"},
1734 "name": "GB_TILE_MODE18",
1735 "type_ref": "GB_TILE_MODE0"
1739 "map": {"at": 39260, "to": "mm"},
1740 "name": "GB_TILE_MODE19",
1741 "type_ref": "GB_TILE_MODE0"
1745 "map": {"at": 39264, "to": "mm"},
1746 "name": "GB_TILE_MODE20",
1747 "type_ref": "GB_TILE_MODE0"
1751 "map": {"at": 39268, "to": "mm"},
1752 "name": "GB_TILE_MODE21",
1753 "type_ref": "GB_TILE_MODE0"
1757 "map": {"at": 39272, "to": "mm"},
1758 "name": "GB_TILE_MODE22",
1759 "type_ref": "GB_TILE_MODE0"
1763 "map": {"at": 39276, "to": "mm"},
1764 "name": "GB_TILE_MODE23",
1765 "type_ref": "GB_TILE_MODE0"
1769 "map": {"at": 39280, "to": "mm"},
1770 "name": "GB_TILE_MODE24",
1771 "type_ref": "GB_TILE_MODE0"
1775 "map": {"at": 39284, "to": "mm"},
1776 "name": "GB_TILE_MODE25",
1777 "type_ref": "GB_TILE_MODE0"
1781 "map": {"at": 39288, "to": "mm"},
1782 "name": "GB_TILE_MODE26",
1783 "type_ref": "GB_TILE_MODE0"
1787 "map": {"at": 39292, "to": "mm"},
1788 "name": "GB_TILE_MODE27",
1789 "type_ref": "GB_TILE_MODE0"
1793 "map": {"at": 39296, "to": "mm"},
1794 "name": "GB_TILE_MODE28",
1795 "type_ref": "GB_TILE_MODE0"
1799 "map": {"at": 39300, "to": "mm"},
1800 "name": "GB_TILE_MODE29",
1801 "type_ref": "GB_TILE_MODE0"
1805 "map": {"at": 39304, "to": "mm"},
1806 "name": "GB_TILE_MODE30",
1807 "type_ref": "GB_TILE_MODE0"
1811 "map": {"at": 39308, "to": "mm"},
1812 "name": "GB_TILE_MODE31",
1813 "type_ref": "GB_TILE_MODE0"
1817 "map": {"at": 39312, "to": "mm"},
1818 "name": "GB_MACROTILE_MODE0",
1819 "type_ref": "GB_MACROTILE_MODE0"
1823 "map": {"at": 39316, "to": "mm"},
1824 "name": "GB_MACROTILE_MODE1",
1825 "type_ref": "GB_MACROTILE_MODE0"
1829 "map": {"at": 39320, "to": "mm"},
1830 "name": "GB_MACROTILE_MODE2",
1831 "type_ref": "GB_MACROTILE_MODE0"
1835 "map": {"at": 39324, "to": "mm"},
1836 "name": "GB_MACROTILE_MODE3",
1837 "type_ref": "GB_MACROTILE_MODE0"
1841 "map": {"at": 39328, "to": "mm"},
1842 "name": "GB_MACROTILE_MODE4",
1843 "type_ref": "GB_MACROTILE_MODE0"
1847 "map": {"at": 39332, "to": "mm"},
1848 "name": "GB_MACROTILE_MODE5",
1849 "type_ref": "GB_MACROTILE_MODE0"
1853 "map": {"at": 39336, "to": "mm"},
1854 "name": "GB_MACROTILE_MODE6",
1855 "type_ref": "GB_MACROTILE_MODE0"
1859 "map": {"at": 39340, "to": "mm"},
1860 "name": "GB_MACROTILE_MODE7",
1861 "type_ref": "GB_MACROTILE_MODE0"
1865 "map": {"at": 39344, "to": "mm"},
1866 "name": "GB_MACROTILE_MODE8",
1867 "type_ref": "GB_MACROTILE_MODE0"
1871 "map": {"at": 39348, "to": "mm"},
1872 "name": "GB_MACROTILE_MODE9",
1873 "type_ref": "GB_MACROTILE_MODE0"
1877 "map": {"at": 39352, "to": "mm"},
1878 "name": "GB_MACROTILE_MODE10",
1879 "type_ref": "GB_MACROTILE_MODE0"
1883 "map": {"at": 39356, "to": "mm"},
1884 "name": "GB_MACROTILE_MODE11",
1885 "type_ref": "GB_MACROTILE_MODE0"
1889 "map": {"at": 39360, "to": "mm"},
1890 "name": "GB_MACROTILE_MODE12",
1891 "type_ref": "GB_MACROTILE_MODE0"
1895 "map": {"at": 39364, "to": "mm"},
1896 "name": "GB_MACROTILE_MODE13",
1897 "type_ref": "GB_MACROTILE_MODE0"
1901 "map": {"at": 39368, "to": "mm"},
1902 "name": "GB_MACROTILE_MODE14",
1903 "type_ref": "GB_MACROTILE_MODE0"
1907 "map": {"at": 39372, "to": "mm"},
1908 "name": "GB_MACROTILE_MODE15",
1909 "type_ref": "GB_MACROTILE_MODE0"
1913 "map": {"at": 45084, "to": "mm"},
1914 "name": "SPI_SHADER_PGM_RSRC3_PS",
1915 "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
1919 "map": {"at": 45088, "to": "mm"},
1920 "name": "SPI_SHADER_PGM_LO_PS",
1921 "type_ref": "SPI_SHADER_PGM_LO_PS"
1925 "map": {"at": 45092, "to": "mm"},
1926 "name": "SPI_SHADER_PGM_HI_PS",
1927 "type_ref": "SPI_SHADER_PGM_HI_PS"
1931 "map": {"at": 45096, "to": "mm"},
1932 "name": "SPI_SHADER_PGM_RSRC1_PS",
1933 "type_ref": "SPI_SHADER_PGM_RSRC1_PS"
1937 "map": {"at": 45100, "to": "mm"},
1938 "name": "SPI_SHADER_PGM_RSRC2_PS",
1939 "type_ref": "SPI_SHADER_PGM_RSRC2_PS"
1943 "map": {"at": 45104, "to": "mm"},
1944 "name": "SPI_SHADER_USER_DATA_PS_0",
1945 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1949 "map": {"at": 45108, "to": "mm"},
1950 "name": "SPI_SHADER_USER_DATA_PS_1",
1951 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1955 "map": {"at": 45112, "to": "mm"},
1956 "name": "SPI_SHADER_USER_DATA_PS_2",
1957 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1961 "map": {"at": 45116, "to": "mm"},
1962 "name": "SPI_SHADER_USER_DATA_PS_3",
1963 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1967 "map": {"at": 45120, "to": "mm"},
1968 "name": "SPI_SHADER_USER_DATA_PS_4",
1969 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1973 "map": {"at": 45124, "to": "mm"},
1974 "name": "SPI_SHADER_USER_DATA_PS_5",
1975 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1979 "map": {"at": 45128, "to": "mm"},
1980 "name": "SPI_SHADER_USER_DATA_PS_6",
1981 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1985 "map": {"at": 45132, "to": "mm"},
1986 "name": "SPI_SHADER_USER_DATA_PS_7",
1987 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1991 "map": {"at": 45136, "to": "mm"},
1992 "name": "SPI_SHADER_USER_DATA_PS_8",
1993 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
1997 "map": {"at": 45140, "to": "mm"},
1998 "name": "SPI_SHADER_USER_DATA_PS_9",
1999 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2003 "map": {"at": 45144, "to": "mm"},
2004 "name": "SPI_SHADER_USER_DATA_PS_10",
2005 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2009 "map": {"at": 45148, "to": "mm"},
2010 "name": "SPI_SHADER_USER_DATA_PS_11",
2011 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2015 "map": {"at": 45152, "to": "mm"},
2016 "name": "SPI_SHADER_USER_DATA_PS_12",
2017 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2021 "map": {"at": 45156, "to": "mm"},
2022 "name": "SPI_SHADER_USER_DATA_PS_13",
2023 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2027 "map": {"at": 45160, "to": "mm"},
2028 "name": "SPI_SHADER_USER_DATA_PS_14",
2029 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2033 "map": {"at": 45164, "to": "mm"},
2034 "name": "SPI_SHADER_USER_DATA_PS_15",
2035 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2039 "map": {"at": 45168, "to": "mm"},
2040 "name": "SPI_SHADER_USER_DATA_PS_16",
2041 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2045 "map": {"at": 45172, "to": "mm"},
2046 "name": "SPI_SHADER_USER_DATA_PS_17",
2047 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2051 "map": {"at": 45176, "to": "mm"},
2052 "name": "SPI_SHADER_USER_DATA_PS_18",
2053 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2057 "map": {"at": 45180, "to": "mm"},
2058 "name": "SPI_SHADER_USER_DATA_PS_19",
2059 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2063 "map": {"at": 45184, "to": "mm"},
2064 "name": "SPI_SHADER_USER_DATA_PS_20",
2065 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2069 "map": {"at": 45188, "to": "mm"},
2070 "name": "SPI_SHADER_USER_DATA_PS_21",
2071 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2075 "map": {"at": 45192, "to": "mm"},
2076 "name": "SPI_SHADER_USER_DATA_PS_22",
2077 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2081 "map": {"at": 45196, "to": "mm"},
2082 "name": "SPI_SHADER_USER_DATA_PS_23",
2083 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2087 "map": {"at": 45200, "to": "mm"},
2088 "name": "SPI_SHADER_USER_DATA_PS_24",
2089 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2093 "map": {"at": 45204, "to": "mm"},
2094 "name": "SPI_SHADER_USER_DATA_PS_25",
2095 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2099 "map": {"at": 45208, "to": "mm"},
2100 "name": "SPI_SHADER_USER_DATA_PS_26",
2101 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2105 "map": {"at": 45212, "to": "mm"},
2106 "name": "SPI_SHADER_USER_DATA_PS_27",
2107 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2111 "map": {"at": 45216, "to": "mm"},
2112 "name": "SPI_SHADER_USER_DATA_PS_28",
2113 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2117 "map": {"at": 45220, "to": "mm"},
2118 "name": "SPI_SHADER_USER_DATA_PS_29",
2119 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2123 "map": {"at": 45224, "to": "mm"},
2124 "name": "SPI_SHADER_USER_DATA_PS_30",
2125 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2129 "map": {"at": 45228, "to": "mm"},
2130 "name": "SPI_SHADER_USER_DATA_PS_31",
2131 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2135 "map": {"at": 45336, "to": "mm"},
2136 "name": "SPI_SHADER_PGM_RSRC3_VS",
2137 "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
2141 "map": {"at": 45340, "to": "mm"},
2142 "name": "SPI_SHADER_LATE_ALLOC_VS",
2143 "type_ref": "SPI_SHADER_LATE_ALLOC_VS"
2147 "map": {"at": 45344, "to": "mm"},
2148 "name": "SPI_SHADER_PGM_LO_VS",
2149 "type_ref": "SPI_SHADER_PGM_LO_PS"
2153 "map": {"at": 45348, "to": "mm"},
2154 "name": "SPI_SHADER_PGM_HI_VS",
2155 "type_ref": "SPI_SHADER_PGM_HI_PS"
2159 "map": {"at": 45352, "to": "mm"},
2160 "name": "SPI_SHADER_PGM_RSRC1_VS",
2161 "type_ref": "SPI_SHADER_PGM_RSRC1_VS"
2165 "map": {"at": 45356, "to": "mm"},
2166 "name": "SPI_SHADER_PGM_RSRC2_VS",
2167 "type_ref": "SPI_SHADER_PGM_RSRC2_VS"
2171 "map": {"at": 45360, "to": "mm"},
2172 "name": "SPI_SHADER_USER_DATA_VS_0",
2173 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2177 "map": {"at": 45364, "to": "mm"},
2178 "name": "SPI_SHADER_USER_DATA_VS_1",
2179 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2183 "map": {"at": 45368, "to": "mm"},
2184 "name": "SPI_SHADER_USER_DATA_VS_2",
2185 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2189 "map": {"at": 45372, "to": "mm"},
2190 "name": "SPI_SHADER_USER_DATA_VS_3",
2191 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2195 "map": {"at": 45376, "to": "mm"},
2196 "name": "SPI_SHADER_USER_DATA_VS_4",
2197 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2201 "map": {"at": 45380, "to": "mm"},
2202 "name": "SPI_SHADER_USER_DATA_VS_5",
2203 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2207 "map": {"at": 45384, "to": "mm"},
2208 "name": "SPI_SHADER_USER_DATA_VS_6",
2209 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2213 "map": {"at": 45388, "to": "mm"},
2214 "name": "SPI_SHADER_USER_DATA_VS_7",
2215 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2219 "map": {"at": 45392, "to": "mm"},
2220 "name": "SPI_SHADER_USER_DATA_VS_8",
2221 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2225 "map": {"at": 45396, "to": "mm"},
2226 "name": "SPI_SHADER_USER_DATA_VS_9",
2227 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2231 "map": {"at": 45400, "to": "mm"},
2232 "name": "SPI_SHADER_USER_DATA_VS_10",
2233 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2237 "map": {"at": 45404, "to": "mm"},
2238 "name": "SPI_SHADER_USER_DATA_VS_11",
2239 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2243 "map": {"at": 45408, "to": "mm"},
2244 "name": "SPI_SHADER_USER_DATA_VS_12",
2245 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2249 "map": {"at": 45412, "to": "mm"},
2250 "name": "SPI_SHADER_USER_DATA_VS_13",
2251 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2255 "map": {"at": 45416, "to": "mm"},
2256 "name": "SPI_SHADER_USER_DATA_VS_14",
2257 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2261 "map": {"at": 45420, "to": "mm"},
2262 "name": "SPI_SHADER_USER_DATA_VS_15",
2263 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2267 "map": {"at": 45424, "to": "mm"},
2268 "name": "SPI_SHADER_USER_DATA_VS_16",
2269 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2273 "map": {"at": 45428, "to": "mm"},
2274 "name": "SPI_SHADER_USER_DATA_VS_17",
2275 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2279 "map": {"at": 45432, "to": "mm"},
2280 "name": "SPI_SHADER_USER_DATA_VS_18",
2281 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2285 "map": {"at": 45436, "to": "mm"},
2286 "name": "SPI_SHADER_USER_DATA_VS_19",
2287 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2291 "map": {"at": 45440, "to": "mm"},
2292 "name": "SPI_SHADER_USER_DATA_VS_20",
2293 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2297 "map": {"at": 45444, "to": "mm"},
2298 "name": "SPI_SHADER_USER_DATA_VS_21",
2299 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2303 "map": {"at": 45448, "to": "mm"},
2304 "name": "SPI_SHADER_USER_DATA_VS_22",
2305 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2309 "map": {"at": 45452, "to": "mm"},
2310 "name": "SPI_SHADER_USER_DATA_VS_23",
2311 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2315 "map": {"at": 45456, "to": "mm"},
2316 "name": "SPI_SHADER_USER_DATA_VS_24",
2317 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2321 "map": {"at": 45460, "to": "mm"},
2322 "name": "SPI_SHADER_USER_DATA_VS_25",
2323 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2327 "map": {"at": 45464, "to": "mm"},
2328 "name": "SPI_SHADER_USER_DATA_VS_26",
2329 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2333 "map": {"at": 45468, "to": "mm"},
2334 "name": "SPI_SHADER_USER_DATA_VS_27",
2335 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2339 "map": {"at": 45472, "to": "mm"},
2340 "name": "SPI_SHADER_USER_DATA_VS_28",
2341 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2345 "map": {"at": 45476, "to": "mm"},
2346 "name": "SPI_SHADER_USER_DATA_VS_29",
2347 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2351 "map": {"at": 45480, "to": "mm"},
2352 "name": "SPI_SHADER_USER_DATA_VS_30",
2353 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2357 "map": {"at": 45484, "to": "mm"},
2358 "name": "SPI_SHADER_USER_DATA_VS_31",
2359 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2363 "map": {"at": 45552, "to": "mm"},
2364 "name": "SPI_SHADER_PGM_RSRC2_GS_VS",
2365 "type_ref": "SPI_SHADER_PGM_RSRC2_GS_VS"
2369 "map": {"at": 45572, "to": "mm"},
2370 "name": "SPI_SHADER_PGM_RSRC4_GS",
2371 "type_ref": "SPI_SHADER_PGM_RSRC4_GS"
2375 "map": {"at": 45576, "to": "mm"},
2376 "name": "SPI_SHADER_USER_DATA_ADDR_LO_GS",
2377 "type_ref": "SPI_SHADER_PGM_LO_PS"
2381 "map": {"at": 45580, "to": "mm"},
2382 "name": "SPI_SHADER_USER_DATA_ADDR_HI_GS",
2383 "type_ref": "SPI_SHADER_PGM_LO_PS"
2387 "map": {"at": 45584, "to": "mm"},
2388 "name": "SPI_SHADER_PGM_LO_ES",
2389 "type_ref": "SPI_SHADER_PGM_LO_PS"
2393 "map": {"at": 45588, "to": "mm"},
2394 "name": "SPI_SHADER_PGM_HI_ES",
2395 "type_ref": "SPI_SHADER_PGM_HI_PS"
2399 "map": {"at": 45596, "to": "mm"},
2400 "name": "SPI_SHADER_PGM_RSRC3_GS",
2401 "type_ref": "SPI_SHADER_PGM_RSRC3_PS"
2405 "map": {"at": 45600, "to": "mm"},
2406 "name": "SPI_SHADER_PGM_LO_GS",
2407 "type_ref": "SPI_SHADER_PGM_LO_PS"
2411 "map": {"at": 45604, "to": "mm"},
2412 "name": "SPI_SHADER_PGM_HI_GS",
2413 "type_ref": "SPI_SHADER_PGM_HI_PS"
2417 "map": {"at": 45608, "to": "mm"},
2418 "name": "SPI_SHADER_PGM_RSRC1_GS",
2419 "type_ref": "SPI_SHADER_PGM_RSRC1_GS"
2423 "map": {"at": 45612, "to": "mm"},
2424 "name": "SPI_SHADER_PGM_RSRC2_GS",
2425 "type_ref": "SPI_SHADER_PGM_RSRC2_GS"
2429 "map": {"at": 45872, "to": "mm"},
2430 "name": "SPI_SHADER_USER_DATA_ES_0",
2431 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2435 "map": {"at": 45876, "to": "mm"},
2436 "name": "SPI_SHADER_USER_DATA_ES_1",
2437 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2441 "map": {"at": 45880, "to": "mm"},
2442 "name": "SPI_SHADER_USER_DATA_ES_2",
2443 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2447 "map": {"at": 45884, "to": "mm"},
2448 "name": "SPI_SHADER_USER_DATA_ES_3",
2449 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2453 "map": {"at": 45888, "to": "mm"},
2454 "name": "SPI_SHADER_USER_DATA_ES_4",
2455 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2459 "map": {"at": 45892, "to": "mm"},
2460 "name": "SPI_SHADER_USER_DATA_ES_5",
2461 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2465 "map": {"at": 45896, "to": "mm"},
2466 "name": "SPI_SHADER_USER_DATA_ES_6",
2467 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2471 "map": {"at": 45900, "to": "mm"},
2472 "name": "SPI_SHADER_USER_DATA_ES_7",
2473 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2477 "map": {"at": 45904, "to": "mm"},
2478 "name": "SPI_SHADER_USER_DATA_ES_8",
2479 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2483 "map": {"at": 45908, "to": "mm"},
2484 "name": "SPI_SHADER_USER_DATA_ES_9",
2485 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2489 "map": {"at": 45912, "to": "mm"},
2490 "name": "SPI_SHADER_USER_DATA_ES_10",
2491 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2495 "map": {"at": 45916, "to": "mm"},
2496 "name": "SPI_SHADER_USER_DATA_ES_11",
2497 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2501 "map": {"at": 45920, "to": "mm"},
2502 "name": "SPI_SHADER_USER_DATA_ES_12",
2503 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2507 "map": {"at": 45924, "to": "mm"},
2508 "name": "SPI_SHADER_USER_DATA_ES_13",
2509 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2513 "map": {"at": 45928, "to": "mm"},
2514 "name": "SPI_SHADER_USER_DATA_ES_14",
2515 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2519 "map": {"at": 45932, "to": "mm"},
2520 "name": "SPI_SHADER_USER_DATA_ES_15",
2521 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2525 "map": {"at": 45936, "to": "mm"},
2526 "name": "SPI_SHADER_USER_DATA_ES_16",
2527 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2531 "map": {"at": 45940, "to": "mm"},
2532 "name": "SPI_SHADER_USER_DATA_ES_17",
2533 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2537 "map": {"at": 45944, "to": "mm"},
2538 "name": "SPI_SHADER_USER_DATA_ES_18",
2539 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2543 "map": {"at": 45948, "to": "mm"},
2544 "name": "SPI_SHADER_USER_DATA_ES_19",
2545 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2549 "map": {"at": 45952, "to": "mm"},
2550 "name": "SPI_SHADER_USER_DATA_ES_20",
2551 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2555 "map": {"at": 45956, "to": "mm"},
2556 "name": "SPI_SHADER_USER_DATA_ES_21",
2557 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2561 "map": {"at": 45960, "to": "mm"},
2562 "name": "SPI_SHADER_USER_DATA_ES_22",
2563 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2567 "map": {"at": 45964, "to": "mm"},
2568 "name": "SPI_SHADER_USER_DATA_ES_23",
2569 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2573 "map": {"at": 45968, "to": "mm"},
2574 "name": "SPI_SHADER_USER_DATA_ES_24",
2575 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2579 "map": {"at": 45972, "to": "mm"},
2580 "name": "SPI_SHADER_USER_DATA_ES_25",
2581 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2585 "map": {"at": 45976, "to": "mm"},
2586 "name": "SPI_SHADER_USER_DATA_ES_26",
2587 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2591 "map": {"at": 45980, "to": "mm"},
2592 "name": "SPI_SHADER_USER_DATA_ES_27",
2593 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2597 "map": {"at": 45984, "to": "mm"},
2598 "name": "SPI_SHADER_USER_DATA_ES_28",
2599 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2603 "map": {"at": 45988, "to": "mm"},
2604 "name": "SPI_SHADER_USER_DATA_ES_29",
2605 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2609 "map": {"at": 45992, "to": "mm"},
2610 "name": "SPI_SHADER_USER_DATA_ES_30",
2611 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2615 "map": {"at": 45996, "to": "mm"},
2616 "name": "SPI_SHADER_USER_DATA_ES_31",
2617 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2621 "map": {"at": 46084, "to": "mm"},
2622 "name": "SPI_SHADER_PGM_RSRC4_HS",
2623 "type_ref": "SPI_SHADER_PGM_RSRC4_HS"
2627 "map": {"at": 46088, "to": "mm"},
2628 "name": "SPI_SHADER_USER_DATA_ADDR_LO_HS",
2629 "type_ref": "SPI_SHADER_PGM_LO_PS"
2633 "map": {"at": 46092, "to": "mm"},
2634 "name": "SPI_SHADER_USER_DATA_ADDR_HI_HS",
2635 "type_ref": "SPI_SHADER_PGM_LO_PS"
2639 "map": {"at": 46096, "to": "mm"},
2640 "name": "SPI_SHADER_PGM_LO_LS",
2641 "type_ref": "SPI_SHADER_PGM_LO_PS"
2645 "map": {"at": 46100, "to": "mm"},
2646 "name": "SPI_SHADER_PGM_HI_LS",
2647 "type_ref": "SPI_SHADER_PGM_HI_PS"
2651 "map": {"at": 46108, "to": "mm"},
2652 "name": "SPI_SHADER_PGM_RSRC3_HS",
2653 "type_ref": "SPI_SHADER_PGM_RSRC3_HS"
2657 "map": {"at": 46112, "to": "mm"},
2658 "name": "SPI_SHADER_PGM_LO_HS",
2659 "type_ref": "SPI_SHADER_PGM_LO_PS"
2663 "map": {"at": 46116, "to": "mm"},
2664 "name": "SPI_SHADER_PGM_HI_HS",
2665 "type_ref": "SPI_SHADER_PGM_HI_PS"
2669 "map": {"at": 46120, "to": "mm"},
2670 "name": "SPI_SHADER_PGM_RSRC1_HS",
2671 "type_ref": "SPI_SHADER_PGM_RSRC1_HS"
2675 "map": {"at": 46124, "to": "mm"},
2676 "name": "SPI_SHADER_PGM_RSRC2_HS",
2677 "type_ref": "SPI_SHADER_PGM_RSRC2_HS"
2681 "map": {"at": 46128, "to": "mm"},
2682 "name": "SPI_SHADER_USER_DATA_LS_0",
2683 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2687 "map": {"at": 46132, "to": "mm"},
2688 "name": "SPI_SHADER_USER_DATA_LS_1",
2689 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2693 "map": {"at": 46136, "to": "mm"},
2694 "name": "SPI_SHADER_USER_DATA_LS_2",
2695 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2699 "map": {"at": 46140, "to": "mm"},
2700 "name": "SPI_SHADER_USER_DATA_LS_3",
2701 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2705 "map": {"at": 46144, "to": "mm"},
2706 "name": "SPI_SHADER_USER_DATA_LS_4",
2707 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2711 "map": {"at": 46148, "to": "mm"},
2712 "name": "SPI_SHADER_USER_DATA_LS_5",
2713 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2717 "map": {"at": 46152, "to": "mm"},
2718 "name": "SPI_SHADER_USER_DATA_LS_6",
2719 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2723 "map": {"at": 46156, "to": "mm"},
2724 "name": "SPI_SHADER_USER_DATA_LS_7",
2725 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2729 "map": {"at": 46160, "to": "mm"},
2730 "name": "SPI_SHADER_USER_DATA_LS_8",
2731 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2735 "map": {"at": 46164, "to": "mm"},
2736 "name": "SPI_SHADER_USER_DATA_LS_9",
2737 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2741 "map": {"at": 46168, "to": "mm"},
2742 "name": "SPI_SHADER_USER_DATA_LS_10",
2743 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2747 "map": {"at": 46172, "to": "mm"},
2748 "name": "SPI_SHADER_USER_DATA_LS_11",
2749 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2753 "map": {"at": 46176, "to": "mm"},
2754 "name": "SPI_SHADER_USER_DATA_LS_12",
2755 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2759 "map": {"at": 46180, "to": "mm"},
2760 "name": "SPI_SHADER_USER_DATA_LS_13",
2761 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2765 "map": {"at": 46184, "to": "mm"},
2766 "name": "SPI_SHADER_USER_DATA_LS_14",
2767 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2771 "map": {"at": 46188, "to": "mm"},
2772 "name": "SPI_SHADER_USER_DATA_LS_15",
2773 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2777 "map": {"at": 46192, "to": "mm"},
2778 "name": "SPI_SHADER_USER_DATA_LS_16",
2779 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2783 "map": {"at": 46196, "to": "mm"},
2784 "name": "SPI_SHADER_USER_DATA_LS_17",
2785 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2789 "map": {"at": 46200, "to": "mm"},
2790 "name": "SPI_SHADER_USER_DATA_LS_18",
2791 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2795 "map": {"at": 46204, "to": "mm"},
2796 "name": "SPI_SHADER_USER_DATA_LS_19",
2797 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2801 "map": {"at": 46208, "to": "mm"},
2802 "name": "SPI_SHADER_USER_DATA_LS_20",
2803 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2807 "map": {"at": 46212, "to": "mm"},
2808 "name": "SPI_SHADER_USER_DATA_LS_21",
2809 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2813 "map": {"at": 46216, "to": "mm"},
2814 "name": "SPI_SHADER_USER_DATA_LS_22",
2815 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2819 "map": {"at": 46220, "to": "mm"},
2820 "name": "SPI_SHADER_USER_DATA_LS_23",
2821 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2825 "map": {"at": 46224, "to": "mm"},
2826 "name": "SPI_SHADER_USER_DATA_LS_24",
2827 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2831 "map": {"at": 46228, "to": "mm"},
2832 "name": "SPI_SHADER_USER_DATA_LS_25",
2833 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2837 "map": {"at": 46232, "to": "mm"},
2838 "name": "SPI_SHADER_USER_DATA_LS_26",
2839 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2843 "map": {"at": 46236, "to": "mm"},
2844 "name": "SPI_SHADER_USER_DATA_LS_27",
2845 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2849 "map": {"at": 46240, "to": "mm"},
2850 "name": "SPI_SHADER_USER_DATA_LS_28",
2851 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2855 "map": {"at": 46244, "to": "mm"},
2856 "name": "SPI_SHADER_USER_DATA_LS_29",
2857 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2861 "map": {"at": 46248, "to": "mm"},
2862 "name": "SPI_SHADER_USER_DATA_LS_30",
2863 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2867 "map": {"at": 46252, "to": "mm"},
2868 "name": "SPI_SHADER_USER_DATA_LS_31",
2869 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2873 "map": {"at": 46384, "to": "mm"},
2874 "name": "SPI_SHADER_USER_DATA_COMMON_0",
2875 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2879 "map": {"at": 46388, "to": "mm"},
2880 "name": "SPI_SHADER_USER_DATA_COMMON_1",
2881 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2885 "map": {"at": 46392, "to": "mm"},
2886 "name": "SPI_SHADER_USER_DATA_COMMON_2",
2887 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2891 "map": {"at": 46396, "to": "mm"},
2892 "name": "SPI_SHADER_USER_DATA_COMMON_3",
2893 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2897 "map": {"at": 46400, "to": "mm"},
2898 "name": "SPI_SHADER_USER_DATA_COMMON_4",
2899 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2903 "map": {"at": 46404, "to": "mm"},
2904 "name": "SPI_SHADER_USER_DATA_COMMON_5",
2905 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2909 "map": {"at": 46408, "to": "mm"},
2910 "name": "SPI_SHADER_USER_DATA_COMMON_6",
2911 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2915 "map": {"at": 46412, "to": "mm"},
2916 "name": "SPI_SHADER_USER_DATA_COMMON_7",
2917 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2921 "map": {"at": 46416, "to": "mm"},
2922 "name": "SPI_SHADER_USER_DATA_COMMON_8",
2923 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2927 "map": {"at": 46420, "to": "mm"},
2928 "name": "SPI_SHADER_USER_DATA_COMMON_9",
2929 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2933 "map": {"at": 46424, "to": "mm"},
2934 "name": "SPI_SHADER_USER_DATA_COMMON_10",
2935 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2939 "map": {"at": 46428, "to": "mm"},
2940 "name": "SPI_SHADER_USER_DATA_COMMON_11",
2941 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2945 "map": {"at": 46432, "to": "mm"},
2946 "name": "SPI_SHADER_USER_DATA_COMMON_12",
2947 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2951 "map": {"at": 46436, "to": "mm"},
2952 "name": "SPI_SHADER_USER_DATA_COMMON_13",
2953 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2957 "map": {"at": 46440, "to": "mm"},
2958 "name": "SPI_SHADER_USER_DATA_COMMON_14",
2959 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2963 "map": {"at": 46444, "to": "mm"},
2964 "name": "SPI_SHADER_USER_DATA_COMMON_15",
2965 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2969 "map": {"at": 46448, "to": "mm"},
2970 "name": "SPI_SHADER_USER_DATA_COMMON_16",
2971 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2975 "map": {"at": 46452, "to": "mm"},
2976 "name": "SPI_SHADER_USER_DATA_COMMON_17",
2977 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2981 "map": {"at": 46456, "to": "mm"},
2982 "name": "SPI_SHADER_USER_DATA_COMMON_18",
2983 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2987 "map": {"at": 46460, "to": "mm"},
2988 "name": "SPI_SHADER_USER_DATA_COMMON_19",
2989 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2993 "map": {"at": 46464, "to": "mm"},
2994 "name": "SPI_SHADER_USER_DATA_COMMON_20",
2995 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
2999 "map": {"at": 46468, "to": "mm"},
3000 "name": "SPI_SHADER_USER_DATA_COMMON_21",
3001 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3005 "map": {"at": 46472, "to": "mm"},
3006 "name": "SPI_SHADER_USER_DATA_COMMON_22",
3007 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3011 "map": {"at": 46476, "to": "mm"},
3012 "name": "SPI_SHADER_USER_DATA_COMMON_23",
3013 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3017 "map": {"at": 46480, "to": "mm"},
3018 "name": "SPI_SHADER_USER_DATA_COMMON_24",
3019 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3023 "map": {"at": 46484, "to": "mm"},
3024 "name": "SPI_SHADER_USER_DATA_COMMON_25",
3025 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3029 "map": {"at": 46488, "to": "mm"},
3030 "name": "SPI_SHADER_USER_DATA_COMMON_26",
3031 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3035 "map": {"at": 46492, "to": "mm"},
3036 "name": "SPI_SHADER_USER_DATA_COMMON_27",
3037 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3041 "map": {"at": 46496, "to": "mm"},
3042 "name": "SPI_SHADER_USER_DATA_COMMON_28",
3043 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3047 "map": {"at": 46500, "to": "mm"},
3048 "name": "SPI_SHADER_USER_DATA_COMMON_29",
3049 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3053 "map": {"at": 46504, "to": "mm"},
3054 "name": "SPI_SHADER_USER_DATA_COMMON_30",
3055 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3059 "map": {"at": 46508, "to": "mm"},
3060 "name": "SPI_SHADER_USER_DATA_COMMON_31",
3061 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3065 "map": {"at": 47104, "to": "mm"},
3066 "name": "COMPUTE_DISPATCH_INITIATOR",
3067 "type_ref": "COMPUTE_DISPATCH_INITIATOR"
3071 "map": {"at": 47108, "to": "mm"},
3072 "name": "COMPUTE_DIM_X",
3073 "type_ref": "COMPUTE_DIM_X"
3077 "map": {"at": 47112, "to": "mm"},
3078 "name": "COMPUTE_DIM_Y",
3079 "type_ref": "COMPUTE_DIM_X"
3083 "map": {"at": 47116, "to": "mm"},
3084 "name": "COMPUTE_DIM_Z",
3085 "type_ref": "COMPUTE_DIM_X"
3089 "map": {"at": 47120, "to": "mm"},
3090 "name": "COMPUTE_START_X",
3091 "type_ref": "COMPUTE_START_X"
3095 "map": {"at": 47124, "to": "mm"},
3096 "name": "COMPUTE_START_Y",
3097 "type_ref": "COMPUTE_START_X"
3101 "map": {"at": 47128, "to": "mm"},
3102 "name": "COMPUTE_START_Z",
3103 "type_ref": "COMPUTE_START_X"
3107 "map": {"at": 47132, "to": "mm"},
3108 "name": "COMPUTE_NUM_THREAD_X",
3109 "type_ref": "COMPUTE_NUM_THREAD_X"
3113 "map": {"at": 47136, "to": "mm"},
3114 "name": "COMPUTE_NUM_THREAD_Y",
3115 "type_ref": "COMPUTE_NUM_THREAD_X"
3119 "map": {"at": 47140, "to": "mm"},
3120 "name": "COMPUTE_NUM_THREAD_Z",
3121 "type_ref": "COMPUTE_NUM_THREAD_X"
3125 "map": {"at": 47144, "to": "mm"},
3126 "name": "COMPUTE_PIPELINESTAT_ENABLE",
3127 "type_ref": "COMPUTE_PIPELINESTAT_ENABLE"
3131 "map": {"at": 47148, "to": "mm"},
3132 "name": "COMPUTE_PERFCOUNT_ENABLE",
3133 "type_ref": "COMPUTE_PERFCOUNT_ENABLE"
3137 "map": {"at": 47152, "to": "mm"},
3138 "name": "COMPUTE_PGM_LO",
3139 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3143 "map": {"at": 47156, "to": "mm"},
3144 "name": "COMPUTE_PGM_HI",
3145 "type_ref": "COMPUTE_PGM_HI"
3149 "map": {"at": 47160, "to": "mm"},
3150 "name": "COMPUTE_DISPATCH_PKT_ADDR_LO",
3151 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3155 "map": {"at": 47164, "to": "mm"},
3156 "name": "COMPUTE_DISPATCH_PKT_ADDR_HI",
3157 "type_ref": "COMPUTE_PGM_HI"
3161 "map": {"at": 47168, "to": "mm"},
3162 "name": "COMPUTE_DISPATCH_SCRATCH_BASE_LO",
3163 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3167 "map": {"at": 47172, "to": "mm"},
3168 "name": "COMPUTE_DISPATCH_SCRATCH_BASE_HI",
3169 "type_ref": "COMPUTE_PGM_HI"
3173 "map": {"at": 47176, "to": "mm"},
3174 "name": "COMPUTE_PGM_RSRC1",
3175 "type_ref": "COMPUTE_PGM_RSRC1"
3179 "map": {"at": 47180, "to": "mm"},
3180 "name": "COMPUTE_PGM_RSRC2",
3181 "type_ref": "COMPUTE_PGM_RSRC2"
3185 "map": {"at": 47184, "to": "mm"},
3186 "name": "COMPUTE_VMID",
3187 "type_ref": "COMPUTE_VMID"
3191 "map": {"at": 47188, "to": "mm"},
3192 "name": "COMPUTE_RESOURCE_LIMITS",
3193 "type_ref": "COMPUTE_RESOURCE_LIMITS"
3197 "map": {"at": 47192, "to": "mm"},
3198 "name": "COMPUTE_STATIC_THREAD_MGMT_SE0",
3199 "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
3203 "map": {"at": 47196, "to": "mm"},
3204 "name": "COMPUTE_STATIC_THREAD_MGMT_SE1",
3205 "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
3209 "map": {"at": 47200, "to": "mm"},
3210 "name": "COMPUTE_TMPRING_SIZE",
3211 "type_ref": "COMPUTE_TMPRING_SIZE"
3215 "map": {"at": 47204, "to": "mm"},
3216 "name": "COMPUTE_STATIC_THREAD_MGMT_SE2",
3217 "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
3221 "map": {"at": 47208, "to": "mm"},
3222 "name": "COMPUTE_STATIC_THREAD_MGMT_SE3",
3223 "type_ref": "COMPUTE_STATIC_THREAD_MGMT_SE0"
3227 "map": {"at": 47212, "to": "mm"},
3228 "name": "COMPUTE_RESTART_X",
3229 "type_ref": "COMPUTE_RESTART_X"
3233 "map": {"at": 47216, "to": "mm"},
3234 "name": "COMPUTE_RESTART_Y",
3235 "type_ref": "COMPUTE_RESTART_X"
3239 "map": {"at": 47220, "to": "mm"},
3240 "name": "COMPUTE_RESTART_Z",
3241 "type_ref": "COMPUTE_RESTART_X"
3245 "map": {"at": 47224, "to": "mm"},
3246 "name": "COMPUTE_THREAD_TRACE_ENABLE",
3247 "type_ref": "COMPUTE_THREAD_TRACE_ENABLE"
3251 "map": {"at": 47228, "to": "mm"},
3252 "name": "COMPUTE_MISC_RESERVED",
3253 "type_ref": "COMPUTE_MISC_RESERVED"
3257 "map": {"at": 47232, "to": "mm"},
3258 "name": "COMPUTE_DISPATCH_ID",
3259 "type_ref": "COMPUTE_DISPATCH_ID"
3263 "map": {"at": 47236, "to": "mm"},
3264 "name": "COMPUTE_THREADGROUP_ID",
3265 "type_ref": "COMPUTE_THREADGROUP_ID"
3269 "map": {"at": 47240, "to": "mm"},
3270 "name": "COMPUTE_RELAUNCH",
3271 "type_ref": "COMPUTE_RELAUNCH"
3275 "map": {"at": 47244, "to": "mm"},
3276 "name": "COMPUTE_WAVE_RESTORE_ADDR_LO",
3277 "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_LO"
3281 "map": {"at": 47248, "to": "mm"},
3282 "name": "COMPUTE_WAVE_RESTORE_ADDR_HI",
3283 "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_HI"
3287 "map": {"at": 47252, "to": "mm"},
3288 "name": "COMPUTE_SHADER_CHKSUM",
3289 "type_ref": "COMPUTE_SHADER_CHKSUM"
3293 "map": {"at": 47360, "to": "mm"},
3294 "name": "COMPUTE_USER_DATA_0",
3295 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3299 "map": {"at": 47364, "to": "mm"},
3300 "name": "COMPUTE_USER_DATA_1",
3301 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3305 "map": {"at": 47368, "to": "mm"},
3306 "name": "COMPUTE_USER_DATA_2",
3307 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3311 "map": {"at": 47372, "to": "mm"},
3312 "name": "COMPUTE_USER_DATA_3",
3313 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3317 "map": {"at": 47376, "to": "mm"},
3318 "name": "COMPUTE_USER_DATA_4",
3319 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3323 "map": {"at": 47380, "to": "mm"},
3324 "name": "COMPUTE_USER_DATA_5",
3325 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3329 "map": {"at": 47384, "to": "mm"},
3330 "name": "COMPUTE_USER_DATA_6",
3331 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3335 "map": {"at": 47388, "to": "mm"},
3336 "name": "COMPUTE_USER_DATA_7",
3337 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3341 "map": {"at": 47392, "to": "mm"},
3342 "name": "COMPUTE_USER_DATA_8",
3343 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3347 "map": {"at": 47396, "to": "mm"},
3348 "name": "COMPUTE_USER_DATA_9",
3349 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3353 "map": {"at": 47400, "to": "mm"},
3354 "name": "COMPUTE_USER_DATA_10",
3355 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3359 "map": {"at": 47404, "to": "mm"},
3360 "name": "COMPUTE_USER_DATA_11",
3361 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3365 "map": {"at": 47408, "to": "mm"},
3366 "name": "COMPUTE_USER_DATA_12",
3367 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3371 "map": {"at": 47412, "to": "mm"},
3372 "name": "COMPUTE_USER_DATA_13",
3373 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3377 "map": {"at": 47416, "to": "mm"},
3378 "name": "COMPUTE_USER_DATA_14",
3379 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3383 "map": {"at": 47420, "to": "mm"},
3384 "name": "COMPUTE_USER_DATA_15",
3385 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3389 "map": {"at": 47608, "to": "mm"},
3390 "name": "COMPUTE_DISPATCH_END",
3391 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3395 "map": {"at": 47612, "to": "mm"},
3396 "name": "COMPUTE_NOWHERE",
3397 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
3401 "map": {"at": 163840, "to": "mm"},
3402 "name": "DB_RENDER_CONTROL",
3403 "type_ref": "DB_RENDER_CONTROL"
3407 "map": {"at": 163844, "to": "mm"},
3408 "name": "DB_COUNT_CONTROL",
3409 "type_ref": "DB_COUNT_CONTROL"
3413 "map": {"at": 163848, "to": "mm"},
3414 "name": "DB_DEPTH_VIEW",
3415 "type_ref": "DB_DEPTH_VIEW"
3419 "map": {"at": 163852, "to": "mm"},
3420 "name": "DB_RENDER_OVERRIDE",
3421 "type_ref": "DB_RENDER_OVERRIDE"
3425 "map": {"at": 163856, "to": "mm"},
3426 "name": "DB_RENDER_OVERRIDE2",
3427 "type_ref": "DB_RENDER_OVERRIDE2"
3431 "map": {"at": 163860, "to": "mm"},
3432 "name": "DB_HTILE_DATA_BASE",
3433 "type_ref": "DB_HTILE_DATA_BASE"
3437 "map": {"at": 163864, "to": "mm"},
3438 "name": "DB_HTILE_DATA_BASE_HI",
3439 "type_ref": "DB_HTILE_DATA_BASE_HI"
3443 "map": {"at": 163868, "to": "mm"},
3444 "name": "DB_DEPTH_SIZE",
3445 "type_ref": "DB_DEPTH_SIZE"
3449 "map": {"at": 163872, "to": "mm"},
3450 "name": "DB_DEPTH_BOUNDS_MIN",
3451 "type_ref": "DB_DEPTH_BOUNDS_MIN"
3455 "map": {"at": 163876, "to": "mm"},
3456 "name": "DB_DEPTH_BOUNDS_MAX",
3457 "type_ref": "DB_DEPTH_BOUNDS_MAX"
3461 "map": {"at": 163880, "to": "mm"},
3462 "name": "DB_STENCIL_CLEAR",
3463 "type_ref": "DB_STENCIL_CLEAR"
3467 "map": {"at": 163884, "to": "mm"},
3468 "name": "DB_DEPTH_CLEAR",
3469 "type_ref": "DB_DEPTH_CLEAR"
3473 "map": {"at": 163888, "to": "mm"},
3474 "name": "PA_SC_SCREEN_SCISSOR_TL",
3475 "type_ref": "PA_SC_SCREEN_SCISSOR_TL"
3479 "map": {"at": 163892, "to": "mm"},
3480 "name": "PA_SC_SCREEN_SCISSOR_BR",
3481 "type_ref": "PA_SC_SCREEN_SCISSOR_BR"
3485 "map": {"at": 163896, "to": "mm"},
3486 "name": "DB_Z_INFO",
3487 "type_ref": "DB_Z_INFO"
3491 "map": {"at": 163900, "to": "mm"},
3492 "name": "DB_STENCIL_INFO",
3493 "type_ref": "DB_STENCIL_INFO"
3497 "map": {"at": 163904, "to": "mm"},
3498 "name": "DB_Z_READ_BASE",
3499 "type_ref": "DB_HTILE_DATA_BASE"
3503 "map": {"at": 163908, "to": "mm"},
3504 "name": "DB_Z_READ_BASE_HI",
3505 "type_ref": "DB_HTILE_DATA_BASE_HI"
3509 "map": {"at": 163912, "to": "mm"},
3510 "name": "DB_STENCIL_READ_BASE",
3511 "type_ref": "DB_HTILE_DATA_BASE"
3515 "map": {"at": 163916, "to": "mm"},
3516 "name": "DB_STENCIL_READ_BASE_HI",
3517 "type_ref": "DB_HTILE_DATA_BASE_HI"
3521 "map": {"at": 163920, "to": "mm"},
3522 "name": "DB_Z_WRITE_BASE",
3523 "type_ref": "DB_HTILE_DATA_BASE"
3527 "map": {"at": 163924, "to": "mm"},
3528 "name": "DB_Z_WRITE_BASE_HI",
3529 "type_ref": "DB_HTILE_DATA_BASE_HI"
3533 "map": {"at": 163928, "to": "mm"},
3534 "name": "DB_STENCIL_WRITE_BASE",
3535 "type_ref": "DB_HTILE_DATA_BASE"
3539 "map": {"at": 163932, "to": "mm"},
3540 "name": "DB_STENCIL_WRITE_BASE_HI",
3541 "type_ref": "DB_HTILE_DATA_BASE_HI"
3545 "map": {"at": 163936, "to": "mm"},
3546 "name": "DB_DFSM_CONTROL",
3547 "type_ref": "DB_DFSM_CONTROL"
3551 "map": {"at": 163944, "to": "mm"},
3552 "name": "DB_Z_INFO2",
3553 "type_ref": "DB_Z_INFO2"
3557 "map": {"at": 163948, "to": "mm"},
3558 "name": "DB_STENCIL_INFO2",
3559 "type_ref": "DB_Z_INFO2"
3563 "map": {"at": 163968, "to": "mm"},
3564 "name": "TA_BC_BASE_ADDR",
3565 "type_ref": "TA_BC_BASE_ADDR"
3569 "map": {"at": 163972, "to": "mm"},
3570 "name": "TA_BC_BASE_ADDR_HI",
3571 "type_ref": "TA_BC_BASE_ADDR_HI"
3575 "map": {"at": 164328, "to": "mm"},
3576 "name": "COHER_DEST_BASE_HI_0",
3577 "type_ref": "COHER_DEST_BASE_HI_0"
3581 "map": {"at": 164332, "to": "mm"},
3582 "name": "COHER_DEST_BASE_HI_1",
3583 "type_ref": "COHER_DEST_BASE_HI_0"
3587 "map": {"at": 164336, "to": "mm"},
3588 "name": "COHER_DEST_BASE_HI_2",
3589 "type_ref": "COHER_DEST_BASE_HI_0"
3593 "map": {"at": 164340, "to": "mm"},
3594 "name": "COHER_DEST_BASE_HI_3",
3595 "type_ref": "COHER_DEST_BASE_HI_0"
3599 "map": {"at": 164344, "to": "mm"},
3600 "name": "COHER_DEST_BASE_2",
3601 "type_ref": "COHER_DEST_BASE_2"
3605 "map": {"at": 164348, "to": "mm"},
3606 "name": "COHER_DEST_BASE_3",
3607 "type_ref": "COHER_DEST_BASE_2"
3611 "map": {"at": 164352, "to": "mm"},
3612 "name": "PA_SC_WINDOW_OFFSET",
3613 "type_ref": "PA_SC_WINDOW_OFFSET"
3617 "map": {"at": 164356, "to": "mm"},
3618 "name": "PA_SC_WINDOW_SCISSOR_TL",
3619 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3623 "map": {"at": 164360, "to": "mm"},
3624 "name": "PA_SC_WINDOW_SCISSOR_BR",
3625 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3629 "map": {"at": 164364, "to": "mm"},
3630 "name": "PA_SC_CLIPRECT_RULE",
3631 "type_ref": "PA_SC_CLIPRECT_RULE"
3635 "map": {"at": 164368, "to": "mm"},
3636 "name": "PA_SC_CLIPRECT_0_TL",
3637 "type_ref": "PA_SC_CLIPRECT_0_TL"
3641 "map": {"at": 164372, "to": "mm"},
3642 "name": "PA_SC_CLIPRECT_0_BR",
3643 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3647 "map": {"at": 164376, "to": "mm"},
3648 "name": "PA_SC_CLIPRECT_1_TL",
3649 "type_ref": "PA_SC_CLIPRECT_0_TL"
3653 "map": {"at": 164380, "to": "mm"},
3654 "name": "PA_SC_CLIPRECT_1_BR",
3655 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3659 "map": {"at": 164384, "to": "mm"},
3660 "name": "PA_SC_CLIPRECT_2_TL",
3661 "type_ref": "PA_SC_CLIPRECT_0_TL"
3665 "map": {"at": 164388, "to": "mm"},
3666 "name": "PA_SC_CLIPRECT_2_BR",
3667 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3671 "map": {"at": 164392, "to": "mm"},
3672 "name": "PA_SC_CLIPRECT_3_TL",
3673 "type_ref": "PA_SC_CLIPRECT_0_TL"
3677 "map": {"at": 164396, "to": "mm"},
3678 "name": "PA_SC_CLIPRECT_3_BR",
3679 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3683 "map": {"at": 164400, "to": "mm"},
3684 "name": "PA_SC_EDGERULE",
3685 "type_ref": "PA_SC_EDGERULE"
3689 "map": {"at": 164404, "to": "mm"},
3690 "name": "PA_SU_HARDWARE_SCREEN_OFFSET",
3691 "type_ref": "PA_SU_HARDWARE_SCREEN_OFFSET"
3695 "map": {"at": 164408, "to": "mm"},
3696 "name": "CB_TARGET_MASK",
3697 "type_ref": "CB_TARGET_MASK"
3701 "map": {"at": 164412, "to": "mm"},
3702 "name": "CB_SHADER_MASK",
3703 "type_ref": "CB_SHADER_MASK"
3707 "map": {"at": 164416, "to": "mm"},
3708 "name": "PA_SC_GENERIC_SCISSOR_TL",
3709 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3713 "map": {"at": 164420, "to": "mm"},
3714 "name": "PA_SC_GENERIC_SCISSOR_BR",
3715 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3719 "map": {"at": 164424, "to": "mm"},
3720 "name": "COHER_DEST_BASE_0",
3721 "type_ref": "COHER_DEST_BASE_2"
3725 "map": {"at": 164428, "to": "mm"},
3726 "name": "COHER_DEST_BASE_1",
3727 "type_ref": "COHER_DEST_BASE_2"
3731 "map": {"at": 164432, "to": "mm"},
3732 "name": "PA_SC_VPORT_SCISSOR_0_TL",
3733 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3737 "map": {"at": 164436, "to": "mm"},
3738 "name": "PA_SC_VPORT_SCISSOR_0_BR",
3739 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3743 "map": {"at": 164440, "to": "mm"},
3744 "name": "PA_SC_VPORT_SCISSOR_1_TL",
3745 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3749 "map": {"at": 164444, "to": "mm"},
3750 "name": "PA_SC_VPORT_SCISSOR_1_BR",
3751 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3755 "map": {"at": 164448, "to": "mm"},
3756 "name": "PA_SC_VPORT_SCISSOR_2_TL",
3757 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3761 "map": {"at": 164452, "to": "mm"},
3762 "name": "PA_SC_VPORT_SCISSOR_2_BR",
3763 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3767 "map": {"at": 164456, "to": "mm"},
3768 "name": "PA_SC_VPORT_SCISSOR_3_TL",
3769 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3773 "map": {"at": 164460, "to": "mm"},
3774 "name": "PA_SC_VPORT_SCISSOR_3_BR",
3775 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3779 "map": {"at": 164464, "to": "mm"},
3780 "name": "PA_SC_VPORT_SCISSOR_4_TL",
3781 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3785 "map": {"at": 164468, "to": "mm"},
3786 "name": "PA_SC_VPORT_SCISSOR_4_BR",
3787 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3791 "map": {"at": 164472, "to": "mm"},
3792 "name": "PA_SC_VPORT_SCISSOR_5_TL",
3793 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3797 "map": {"at": 164476, "to": "mm"},
3798 "name": "PA_SC_VPORT_SCISSOR_5_BR",
3799 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3803 "map": {"at": 164480, "to": "mm"},
3804 "name": "PA_SC_VPORT_SCISSOR_6_TL",
3805 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3809 "map": {"at": 164484, "to": "mm"},
3810 "name": "PA_SC_VPORT_SCISSOR_6_BR",
3811 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3815 "map": {"at": 164488, "to": "mm"},
3816 "name": "PA_SC_VPORT_SCISSOR_7_TL",
3817 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3821 "map": {"at": 164492, "to": "mm"},
3822 "name": "PA_SC_VPORT_SCISSOR_7_BR",
3823 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3827 "map": {"at": 164496, "to": "mm"},
3828 "name": "PA_SC_VPORT_SCISSOR_8_TL",
3829 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3833 "map": {"at": 164500, "to": "mm"},
3834 "name": "PA_SC_VPORT_SCISSOR_8_BR",
3835 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3839 "map": {"at": 164504, "to": "mm"},
3840 "name": "PA_SC_VPORT_SCISSOR_9_TL",
3841 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3845 "map": {"at": 164508, "to": "mm"},
3846 "name": "PA_SC_VPORT_SCISSOR_9_BR",
3847 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3851 "map": {"at": 164512, "to": "mm"},
3852 "name": "PA_SC_VPORT_SCISSOR_10_TL",
3853 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3857 "map": {"at": 164516, "to": "mm"},
3858 "name": "PA_SC_VPORT_SCISSOR_10_BR",
3859 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3863 "map": {"at": 164520, "to": "mm"},
3864 "name": "PA_SC_VPORT_SCISSOR_11_TL",
3865 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3869 "map": {"at": 164524, "to": "mm"},
3870 "name": "PA_SC_VPORT_SCISSOR_11_BR",
3871 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3875 "map": {"at": 164528, "to": "mm"},
3876 "name": "PA_SC_VPORT_SCISSOR_12_TL",
3877 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3881 "map": {"at": 164532, "to": "mm"},
3882 "name": "PA_SC_VPORT_SCISSOR_12_BR",
3883 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3887 "map": {"at": 164536, "to": "mm"},
3888 "name": "PA_SC_VPORT_SCISSOR_13_TL",
3889 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3893 "map": {"at": 164540, "to": "mm"},
3894 "name": "PA_SC_VPORT_SCISSOR_13_BR",
3895 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3899 "map": {"at": 164544, "to": "mm"},
3900 "name": "PA_SC_VPORT_SCISSOR_14_TL",
3901 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3905 "map": {"at": 164548, "to": "mm"},
3906 "name": "PA_SC_VPORT_SCISSOR_14_BR",
3907 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3911 "map": {"at": 164552, "to": "mm"},
3912 "name": "PA_SC_VPORT_SCISSOR_15_TL",
3913 "type_ref": "PA_SC_WINDOW_SCISSOR_TL"
3917 "map": {"at": 164556, "to": "mm"},
3918 "name": "PA_SC_VPORT_SCISSOR_15_BR",
3919 "type_ref": "PA_SC_WINDOW_SCISSOR_BR"
3923 "map": {"at": 164560, "to": "mm"},
3924 "name": "PA_SC_VPORT_ZMIN_0",
3925 "type_ref": "PA_SC_VPORT_ZMIN_0"
3929 "map": {"at": 164564, "to": "mm"},
3930 "name": "PA_SC_VPORT_ZMAX_0",
3931 "type_ref": "PA_SC_VPORT_ZMAX_0"
3935 "map": {"at": 164568, "to": "mm"},
3936 "name": "PA_SC_VPORT_ZMIN_1",
3937 "type_ref": "PA_SC_VPORT_ZMIN_0"
3941 "map": {"at": 164572, "to": "mm"},
3942 "name": "PA_SC_VPORT_ZMAX_1",
3943 "type_ref": "PA_SC_VPORT_ZMAX_0"
3947 "map": {"at": 164576, "to": "mm"},
3948 "name": "PA_SC_VPORT_ZMIN_2",
3949 "type_ref": "PA_SC_VPORT_ZMIN_0"
3953 "map": {"at": 164580, "to": "mm"},
3954 "name": "PA_SC_VPORT_ZMAX_2",
3955 "type_ref": "PA_SC_VPORT_ZMAX_0"
3959 "map": {"at": 164584, "to": "mm"},
3960 "name": "PA_SC_VPORT_ZMIN_3",
3961 "type_ref": "PA_SC_VPORT_ZMIN_0"
3965 "map": {"at": 164588, "to": "mm"},
3966 "name": "PA_SC_VPORT_ZMAX_3",
3967 "type_ref": "PA_SC_VPORT_ZMAX_0"
3971 "map": {"at": 164592, "to": "mm"},
3972 "name": "PA_SC_VPORT_ZMIN_4",
3973 "type_ref": "PA_SC_VPORT_ZMIN_0"
3977 "map": {"at": 164596, "to": "mm"},
3978 "name": "PA_SC_VPORT_ZMAX_4",
3979 "type_ref": "PA_SC_VPORT_ZMAX_0"
3983 "map": {"at": 164600, "to": "mm"},
3984 "name": "PA_SC_VPORT_ZMIN_5",
3985 "type_ref": "PA_SC_VPORT_ZMIN_0"
3989 "map": {"at": 164604, "to": "mm"},
3990 "name": "PA_SC_VPORT_ZMAX_5",
3991 "type_ref": "PA_SC_VPORT_ZMAX_0"
3995 "map": {"at": 164608, "to": "mm"},
3996 "name": "PA_SC_VPORT_ZMIN_6",
3997 "type_ref": "PA_SC_VPORT_ZMIN_0"
4001 "map": {"at": 164612, "to": "mm"},
4002 "name": "PA_SC_VPORT_ZMAX_6",
4003 "type_ref": "PA_SC_VPORT_ZMAX_0"
4007 "map": {"at": 164616, "to": "mm"},
4008 "name": "PA_SC_VPORT_ZMIN_7",
4009 "type_ref": "PA_SC_VPORT_ZMIN_0"
4013 "map": {"at": 164620, "to": "mm"},
4014 "name": "PA_SC_VPORT_ZMAX_7",
4015 "type_ref": "PA_SC_VPORT_ZMAX_0"
4019 "map": {"at": 164624, "to": "mm"},
4020 "name": "PA_SC_VPORT_ZMIN_8",
4021 "type_ref": "PA_SC_VPORT_ZMIN_0"
4025 "map": {"at": 164628, "to": "mm"},
4026 "name": "PA_SC_VPORT_ZMAX_8",
4027 "type_ref": "PA_SC_VPORT_ZMAX_0"
4031 "map": {"at": 164632, "to": "mm"},
4032 "name": "PA_SC_VPORT_ZMIN_9",
4033 "type_ref": "PA_SC_VPORT_ZMIN_0"
4037 "map": {"at": 164636, "to": "mm"},
4038 "name": "PA_SC_VPORT_ZMAX_9",
4039 "type_ref": "PA_SC_VPORT_ZMAX_0"
4043 "map": {"at": 164640, "to": "mm"},
4044 "name": "PA_SC_VPORT_ZMIN_10",
4045 "type_ref": "PA_SC_VPORT_ZMIN_0"
4049 "map": {"at": 164644, "to": "mm"},
4050 "name": "PA_SC_VPORT_ZMAX_10",
4051 "type_ref": "PA_SC_VPORT_ZMAX_0"
4055 "map": {"at": 164648, "to": "mm"},
4056 "name": "PA_SC_VPORT_ZMIN_11",
4057 "type_ref": "PA_SC_VPORT_ZMIN_0"
4061 "map": {"at": 164652, "to": "mm"},
4062 "name": "PA_SC_VPORT_ZMAX_11",
4063 "type_ref": "PA_SC_VPORT_ZMAX_0"
4067 "map": {"at": 164656, "to": "mm"},
4068 "name": "PA_SC_VPORT_ZMIN_12",
4069 "type_ref": "PA_SC_VPORT_ZMIN_0"
4073 "map": {"at": 164660, "to": "mm"},
4074 "name": "PA_SC_VPORT_ZMAX_12",
4075 "type_ref": "PA_SC_VPORT_ZMAX_0"
4079 "map": {"at": 164664, "to": "mm"},
4080 "name": "PA_SC_VPORT_ZMIN_13",
4081 "type_ref": "PA_SC_VPORT_ZMIN_0"
4085 "map": {"at": 164668, "to": "mm"},
4086 "name": "PA_SC_VPORT_ZMAX_13",
4087 "type_ref": "PA_SC_VPORT_ZMAX_0"
4091 "map": {"at": 164672, "to": "mm"},
4092 "name": "PA_SC_VPORT_ZMIN_14",
4093 "type_ref": "PA_SC_VPORT_ZMIN_0"
4097 "map": {"at": 164676, "to": "mm"},
4098 "name": "PA_SC_VPORT_ZMAX_14",
4099 "type_ref": "PA_SC_VPORT_ZMAX_0"
4103 "map": {"at": 164680, "to": "mm"},
4104 "name": "PA_SC_VPORT_ZMIN_15",
4105 "type_ref": "PA_SC_VPORT_ZMIN_0"
4109 "map": {"at": 164684, "to": "mm"},
4110 "name": "PA_SC_VPORT_ZMAX_15",
4111 "type_ref": "PA_SC_VPORT_ZMAX_0"
4115 "map": {"at": 164688, "to": "mm"},
4116 "name": "PA_SC_RASTER_CONFIG",
4117 "type_ref": "PA_SC_RASTER_CONFIG"
4121 "map": {"at": 164692, "to": "mm"},
4122 "name": "PA_SC_RASTER_CONFIG_1",
4123 "type_ref": "PA_SC_RASTER_CONFIG_1"
4127 "map": {"at": 164696, "to": "mm"},
4128 "name": "PA_SC_SCREEN_EXTENT_CONTROL",
4129 "type_ref": "PA_SC_SCREEN_EXTENT_CONTROL"
4133 "map": {"at": 164700, "to": "mm"},
4134 "name": "PA_SC_TILE_STEERING_OVERRIDE",
4135 "type_ref": "PA_SC_TILE_STEERING_OVERRIDE"
4139 "map": {"at": 164704, "to": "mm"},
4140 "name": "CP_PERFMON_CNTX_CNTL",
4141 "type_ref": "CP_PERFMON_CNTX_CNTL"
4145 "map": {"at": 164708, "to": "mm"},
4146 "name": "CP_PIPEID",
4147 "type_ref": "CP_PIPEID"
4151 "map": {"at": 164712, "to": "mm"},
4153 "type_ref": "CP_VMID"
4157 "map": {"at": 164768, "to": "mm"},
4158 "name": "PA_SC_RIGHT_VERT_GRID",
4159 "type_ref": "PA_SC_RIGHT_VERT_GRID"
4163 "map": {"at": 164772, "to": "mm"},
4164 "name": "PA_SC_LEFT_VERT_GRID",
4165 "type_ref": "PA_SC_RIGHT_VERT_GRID"
4169 "map": {"at": 164776, "to": "mm"},
4170 "name": "PA_SC_HORIZ_GRID",
4171 "type_ref": "PA_SC_HORIZ_GRID"
4175 "map": {"at": 164876, "to": "mm"},
4176 "name": "VGT_MULTI_PRIM_IB_RESET_INDX",
4177 "type_ref": "VGT_MULTI_PRIM_IB_RESET_INDX"
4181 "map": {"at": 164884, "to": "mm"},
4182 "name": "CB_BLEND_RED",
4183 "type_ref": "CB_BLEND_RED"
4187 "map": {"at": 164888, "to": "mm"},
4188 "name": "CB_BLEND_GREEN",
4189 "type_ref": "CB_BLEND_GREEN"
4193 "map": {"at": 164892, "to": "mm"},
4194 "name": "CB_BLEND_BLUE",
4195 "type_ref": "CB_BLEND_BLUE"
4199 "map": {"at": 164896, "to": "mm"},
4200 "name": "CB_BLEND_ALPHA",
4201 "type_ref": "CB_BLEND_ALPHA"
4205 "map": {"at": 164900, "to": "mm"},
4206 "name": "CB_DCC_CONTROL",
4207 "type_ref": "CB_DCC_CONTROL"
4211 "map": {"at": 164908, "to": "mm"},
4212 "name": "DB_STENCIL_CONTROL",
4213 "type_ref": "DB_STENCIL_CONTROL"
4217 "map": {"at": 164912, "to": "mm"},
4218 "name": "DB_STENCILREFMASK",
4219 "type_ref": "DB_STENCILREFMASK"
4223 "map": {"at": 164916, "to": "mm"},
4224 "name": "DB_STENCILREFMASK_BF",
4225 "type_ref": "DB_STENCILREFMASK_BF"
4229 "map": {"at": 164924, "to": "mm"},
4230 "name": "PA_CL_VPORT_XSCALE",
4231 "type_ref": "PA_CL_VPORT_XSCALE"
4235 "map": {"at": 164928, "to": "mm"},
4236 "name": "PA_CL_VPORT_XOFFSET",
4237 "type_ref": "PA_CL_VPORT_XOFFSET"
4241 "map": {"at": 164932, "to": "mm"},
4242 "name": "PA_CL_VPORT_YSCALE",
4243 "type_ref": "PA_CL_VPORT_YSCALE"
4247 "map": {"at": 164936, "to": "mm"},
4248 "name": "PA_CL_VPORT_YOFFSET",
4249 "type_ref": "PA_CL_VPORT_YOFFSET"
4253 "map": {"at": 164940, "to": "mm"},
4254 "name": "PA_CL_VPORT_ZSCALE",
4255 "type_ref": "PA_CL_VPORT_ZSCALE"
4259 "map": {"at": 164944, "to": "mm"},
4260 "name": "PA_CL_VPORT_ZOFFSET",
4261 "type_ref": "PA_CL_VPORT_ZOFFSET"
4265 "map": {"at": 164948, "to": "mm"},
4266 "name": "PA_CL_VPORT_XSCALE_1",
4267 "type_ref": "PA_CL_VPORT_XSCALE"
4271 "map": {"at": 164952, "to": "mm"},
4272 "name": "PA_CL_VPORT_XOFFSET_1",
4273 "type_ref": "PA_CL_VPORT_XOFFSET"
4277 "map": {"at": 164956, "to": "mm"},
4278 "name": "PA_CL_VPORT_YSCALE_1",
4279 "type_ref": "PA_CL_VPORT_YSCALE"
4283 "map": {"at": 164960, "to": "mm"},
4284 "name": "PA_CL_VPORT_YOFFSET_1",
4285 "type_ref": "PA_CL_VPORT_YOFFSET"
4289 "map": {"at": 164964, "to": "mm"},
4290 "name": "PA_CL_VPORT_ZSCALE_1",
4291 "type_ref": "PA_CL_VPORT_ZSCALE"
4295 "map": {"at": 164968, "to": "mm"},
4296 "name": "PA_CL_VPORT_ZOFFSET_1",
4297 "type_ref": "PA_CL_VPORT_ZOFFSET"
4301 "map": {"at": 164972, "to": "mm"},
4302 "name": "PA_CL_VPORT_XSCALE_2",
4303 "type_ref": "PA_CL_VPORT_XSCALE"
4307 "map": {"at": 164976, "to": "mm"},
4308 "name": "PA_CL_VPORT_XOFFSET_2",
4309 "type_ref": "PA_CL_VPORT_XOFFSET"
4313 "map": {"at": 164980, "to": "mm"},
4314 "name": "PA_CL_VPORT_YSCALE_2",
4315 "type_ref": "PA_CL_VPORT_YSCALE"
4319 "map": {"at": 164984, "to": "mm"},
4320 "name": "PA_CL_VPORT_YOFFSET_2",
4321 "type_ref": "PA_CL_VPORT_YOFFSET"
4325 "map": {"at": 164988, "to": "mm"},
4326 "name": "PA_CL_VPORT_ZSCALE_2",
4327 "type_ref": "PA_CL_VPORT_ZSCALE"
4331 "map": {"at": 164992, "to": "mm"},
4332 "name": "PA_CL_VPORT_ZOFFSET_2",
4333 "type_ref": "PA_CL_VPORT_ZOFFSET"
4337 "map": {"at": 164996, "to": "mm"},
4338 "name": "PA_CL_VPORT_XSCALE_3",
4339 "type_ref": "PA_CL_VPORT_XSCALE"
4343 "map": {"at": 165000, "to": "mm"},
4344 "name": "PA_CL_VPORT_XOFFSET_3",
4345 "type_ref": "PA_CL_VPORT_XOFFSET"
4349 "map": {"at": 165004, "to": "mm"},
4350 "name": "PA_CL_VPORT_YSCALE_3",
4351 "type_ref": "PA_CL_VPORT_YSCALE"
4355 "map": {"at": 165008, "to": "mm"},
4356 "name": "PA_CL_VPORT_YOFFSET_3",
4357 "type_ref": "PA_CL_VPORT_YOFFSET"
4361 "map": {"at": 165012, "to": "mm"},
4362 "name": "PA_CL_VPORT_ZSCALE_3",
4363 "type_ref": "PA_CL_VPORT_ZSCALE"
4367 "map": {"at": 165016, "to": "mm"},
4368 "name": "PA_CL_VPORT_ZOFFSET_3",
4369 "type_ref": "PA_CL_VPORT_ZOFFSET"
4373 "map": {"at": 165020, "to": "mm"},
4374 "name": "PA_CL_VPORT_XSCALE_4",
4375 "type_ref": "PA_CL_VPORT_XSCALE"
4379 "map": {"at": 165024, "to": "mm"},
4380 "name": "PA_CL_VPORT_XOFFSET_4",
4381 "type_ref": "PA_CL_VPORT_XOFFSET"
4385 "map": {"at": 165028, "to": "mm"},
4386 "name": "PA_CL_VPORT_YSCALE_4",
4387 "type_ref": "PA_CL_VPORT_YSCALE"
4391 "map": {"at": 165032, "to": "mm"},
4392 "name": "PA_CL_VPORT_YOFFSET_4",
4393 "type_ref": "PA_CL_VPORT_YOFFSET"
4397 "map": {"at": 165036, "to": "mm"},
4398 "name": "PA_CL_VPORT_ZSCALE_4",
4399 "type_ref": "PA_CL_VPORT_ZSCALE"
4403 "map": {"at": 165040, "to": "mm"},
4404 "name": "PA_CL_VPORT_ZOFFSET_4",
4405 "type_ref": "PA_CL_VPORT_ZOFFSET"
4409 "map": {"at": 165044, "to": "mm"},
4410 "name": "PA_CL_VPORT_XSCALE_5",
4411 "type_ref": "PA_CL_VPORT_XSCALE"
4415 "map": {"at": 165048, "to": "mm"},
4416 "name": "PA_CL_VPORT_XOFFSET_5",
4417 "type_ref": "PA_CL_VPORT_XOFFSET"
4421 "map": {"at": 165052, "to": "mm"},
4422 "name": "PA_CL_VPORT_YSCALE_5",
4423 "type_ref": "PA_CL_VPORT_YSCALE"
4427 "map": {"at": 165056, "to": "mm"},
4428 "name": "PA_CL_VPORT_YOFFSET_5",
4429 "type_ref": "PA_CL_VPORT_YOFFSET"
4433 "map": {"at": 165060, "to": "mm"},
4434 "name": "PA_CL_VPORT_ZSCALE_5",
4435 "type_ref": "PA_CL_VPORT_ZSCALE"
4439 "map": {"at": 165064, "to": "mm"},
4440 "name": "PA_CL_VPORT_ZOFFSET_5",
4441 "type_ref": "PA_CL_VPORT_ZOFFSET"
4445 "map": {"at": 165068, "to": "mm"},
4446 "name": "PA_CL_VPORT_XSCALE_6",
4447 "type_ref": "PA_CL_VPORT_XSCALE"
4451 "map": {"at": 165072, "to": "mm"},
4452 "name": "PA_CL_VPORT_XOFFSET_6",
4453 "type_ref": "PA_CL_VPORT_XOFFSET"
4457 "map": {"at": 165076, "to": "mm"},
4458 "name": "PA_CL_VPORT_YSCALE_6",
4459 "type_ref": "PA_CL_VPORT_YSCALE"
4463 "map": {"at": 165080, "to": "mm"},
4464 "name": "PA_CL_VPORT_YOFFSET_6",
4465 "type_ref": "PA_CL_VPORT_YOFFSET"
4469 "map": {"at": 165084, "to": "mm"},
4470 "name": "PA_CL_VPORT_ZSCALE_6",
4471 "type_ref": "PA_CL_VPORT_ZSCALE"
4475 "map": {"at": 165088, "to": "mm"},
4476 "name": "PA_CL_VPORT_ZOFFSET_6",
4477 "type_ref": "PA_CL_VPORT_ZOFFSET"
4481 "map": {"at": 165092, "to": "mm"},
4482 "name": "PA_CL_VPORT_XSCALE_7",
4483 "type_ref": "PA_CL_VPORT_XSCALE"
4487 "map": {"at": 165096, "to": "mm"},
4488 "name": "PA_CL_VPORT_XOFFSET_7",
4489 "type_ref": "PA_CL_VPORT_XOFFSET"
4493 "map": {"at": 165100, "to": "mm"},
4494 "name": "PA_CL_VPORT_YSCALE_7",
4495 "type_ref": "PA_CL_VPORT_YSCALE"
4499 "map": {"at": 165104, "to": "mm"},
4500 "name": "PA_CL_VPORT_YOFFSET_7",
4501 "type_ref": "PA_CL_VPORT_YOFFSET"
4505 "map": {"at": 165108, "to": "mm"},
4506 "name": "PA_CL_VPORT_ZSCALE_7",
4507 "type_ref": "PA_CL_VPORT_ZSCALE"
4511 "map": {"at": 165112, "to": "mm"},
4512 "name": "PA_CL_VPORT_ZOFFSET_7",
4513 "type_ref": "PA_CL_VPORT_ZOFFSET"
4517 "map": {"at": 165116, "to": "mm"},
4518 "name": "PA_CL_VPORT_XSCALE_8",
4519 "type_ref": "PA_CL_VPORT_XSCALE"
4523 "map": {"at": 165120, "to": "mm"},
4524 "name": "PA_CL_VPORT_XOFFSET_8",
4525 "type_ref": "PA_CL_VPORT_XOFFSET"
4529 "map": {"at": 165124, "to": "mm"},
4530 "name": "PA_CL_VPORT_YSCALE_8",
4531 "type_ref": "PA_CL_VPORT_YSCALE"
4535 "map": {"at": 165128, "to": "mm"},
4536 "name": "PA_CL_VPORT_YOFFSET_8",
4537 "type_ref": "PA_CL_VPORT_YOFFSET"
4541 "map": {"at": 165132, "to": "mm"},
4542 "name": "PA_CL_VPORT_ZSCALE_8",
4543 "type_ref": "PA_CL_VPORT_ZSCALE"
4547 "map": {"at": 165136, "to": "mm"},
4548 "name": "PA_CL_VPORT_ZOFFSET_8",
4549 "type_ref": "PA_CL_VPORT_ZOFFSET"
4553 "map": {"at": 165140, "to": "mm"},
4554 "name": "PA_CL_VPORT_XSCALE_9",
4555 "type_ref": "PA_CL_VPORT_XSCALE"
4559 "map": {"at": 165144, "to": "mm"},
4560 "name": "PA_CL_VPORT_XOFFSET_9",
4561 "type_ref": "PA_CL_VPORT_XOFFSET"
4565 "map": {"at": 165148, "to": "mm"},
4566 "name": "PA_CL_VPORT_YSCALE_9",
4567 "type_ref": "PA_CL_VPORT_YSCALE"
4571 "map": {"at": 165152, "to": "mm"},
4572 "name": "PA_CL_VPORT_YOFFSET_9",
4573 "type_ref": "PA_CL_VPORT_YOFFSET"
4577 "map": {"at": 165156, "to": "mm"},
4578 "name": "PA_CL_VPORT_ZSCALE_9",
4579 "type_ref": "PA_CL_VPORT_ZSCALE"
4583 "map": {"at": 165160, "to": "mm"},
4584 "name": "PA_CL_VPORT_ZOFFSET_9",
4585 "type_ref": "PA_CL_VPORT_ZOFFSET"
4589 "map": {"at": 165164, "to": "mm"},
4590 "name": "PA_CL_VPORT_XSCALE_10",
4591 "type_ref": "PA_CL_VPORT_XSCALE"
4595 "map": {"at": 165168, "to": "mm"},
4596 "name": "PA_CL_VPORT_XOFFSET_10",
4597 "type_ref": "PA_CL_VPORT_XOFFSET"
4601 "map": {"at": 165172, "to": "mm"},
4602 "name": "PA_CL_VPORT_YSCALE_10",
4603 "type_ref": "PA_CL_VPORT_YSCALE"
4607 "map": {"at": 165176, "to": "mm"},
4608 "name": "PA_CL_VPORT_YOFFSET_10",
4609 "type_ref": "PA_CL_VPORT_YOFFSET"
4613 "map": {"at": 165180, "to": "mm"},
4614 "name": "PA_CL_VPORT_ZSCALE_10",
4615 "type_ref": "PA_CL_VPORT_ZSCALE"
4619 "map": {"at": 165184, "to": "mm"},
4620 "name": "PA_CL_VPORT_ZOFFSET_10",
4621 "type_ref": "PA_CL_VPORT_ZOFFSET"
4625 "map": {"at": 165188, "to": "mm"},
4626 "name": "PA_CL_VPORT_XSCALE_11",
4627 "type_ref": "PA_CL_VPORT_XSCALE"
4631 "map": {"at": 165192, "to": "mm"},
4632 "name": "PA_CL_VPORT_XOFFSET_11",
4633 "type_ref": "PA_CL_VPORT_XOFFSET"
4637 "map": {"at": 165196, "to": "mm"},
4638 "name": "PA_CL_VPORT_YSCALE_11",
4639 "type_ref": "PA_CL_VPORT_YSCALE"
4643 "map": {"at": 165200, "to": "mm"},
4644 "name": "PA_CL_VPORT_YOFFSET_11",
4645 "type_ref": "PA_CL_VPORT_YOFFSET"
4649 "map": {"at": 165204, "to": "mm"},
4650 "name": "PA_CL_VPORT_ZSCALE_11",
4651 "type_ref": "PA_CL_VPORT_ZSCALE"
4655 "map": {"at": 165208, "to": "mm"},
4656 "name": "PA_CL_VPORT_ZOFFSET_11",
4657 "type_ref": "PA_CL_VPORT_ZOFFSET"
4661 "map": {"at": 165212, "to": "mm"},
4662 "name": "PA_CL_VPORT_XSCALE_12",
4663 "type_ref": "PA_CL_VPORT_XSCALE"
4667 "map": {"at": 165216, "to": "mm"},
4668 "name": "PA_CL_VPORT_XOFFSET_12",
4669 "type_ref": "PA_CL_VPORT_XOFFSET"
4673 "map": {"at": 165220, "to": "mm"},
4674 "name": "PA_CL_VPORT_YSCALE_12",
4675 "type_ref": "PA_CL_VPORT_YSCALE"
4679 "map": {"at": 165224, "to": "mm"},
4680 "name": "PA_CL_VPORT_YOFFSET_12",
4681 "type_ref": "PA_CL_VPORT_YOFFSET"
4685 "map": {"at": 165228, "to": "mm"},
4686 "name": "PA_CL_VPORT_ZSCALE_12",
4687 "type_ref": "PA_CL_VPORT_ZSCALE"
4691 "map": {"at": 165232, "to": "mm"},
4692 "name": "PA_CL_VPORT_ZOFFSET_12",
4693 "type_ref": "PA_CL_VPORT_ZOFFSET"
4697 "map": {"at": 165236, "to": "mm"},
4698 "name": "PA_CL_VPORT_XSCALE_13",
4699 "type_ref": "PA_CL_VPORT_XSCALE"
4703 "map": {"at": 165240, "to": "mm"},
4704 "name": "PA_CL_VPORT_XOFFSET_13",
4705 "type_ref": "PA_CL_VPORT_XOFFSET"
4709 "map": {"at": 165244, "to": "mm"},
4710 "name": "PA_CL_VPORT_YSCALE_13",
4711 "type_ref": "PA_CL_VPORT_YSCALE"
4715 "map": {"at": 165248, "to": "mm"},
4716 "name": "PA_CL_VPORT_YOFFSET_13",
4717 "type_ref": "PA_CL_VPORT_YOFFSET"
4721 "map": {"at": 165252, "to": "mm"},
4722 "name": "PA_CL_VPORT_ZSCALE_13",
4723 "type_ref": "PA_CL_VPORT_ZSCALE"
4727 "map": {"at": 165256, "to": "mm"},
4728 "name": "PA_CL_VPORT_ZOFFSET_13",
4729 "type_ref": "PA_CL_VPORT_ZOFFSET"
4733 "map": {"at": 165260, "to": "mm"},
4734 "name": "PA_CL_VPORT_XSCALE_14",
4735 "type_ref": "PA_CL_VPORT_XSCALE"
4739 "map": {"at": 165264, "to": "mm"},
4740 "name": "PA_CL_VPORT_XOFFSET_14",
4741 "type_ref": "PA_CL_VPORT_XOFFSET"
4745 "map": {"at": 165268, "to": "mm"},
4746 "name": "PA_CL_VPORT_YSCALE_14",
4747 "type_ref": "PA_CL_VPORT_YSCALE"
4751 "map": {"at": 165272, "to": "mm"},
4752 "name": "PA_CL_VPORT_YOFFSET_14",
4753 "type_ref": "PA_CL_VPORT_YOFFSET"
4757 "map": {"at": 165276, "to": "mm"},
4758 "name": "PA_CL_VPORT_ZSCALE_14",
4759 "type_ref": "PA_CL_VPORT_ZSCALE"
4763 "map": {"at": 165280, "to": "mm"},
4764 "name": "PA_CL_VPORT_ZOFFSET_14",
4765 "type_ref": "PA_CL_VPORT_ZOFFSET"
4769 "map": {"at": 165284, "to": "mm"},
4770 "name": "PA_CL_VPORT_XSCALE_15",
4771 "type_ref": "PA_CL_VPORT_XSCALE"
4775 "map": {"at": 165288, "to": "mm"},
4776 "name": "PA_CL_VPORT_XOFFSET_15",
4777 "type_ref": "PA_CL_VPORT_XOFFSET"
4781 "map": {"at": 165292, "to": "mm"},
4782 "name": "PA_CL_VPORT_YSCALE_15",
4783 "type_ref": "PA_CL_VPORT_YSCALE"
4787 "map": {"at": 165296, "to": "mm"},
4788 "name": "PA_CL_VPORT_YOFFSET_15",
4789 "type_ref": "PA_CL_VPORT_YOFFSET"
4793 "map": {"at": 165300, "to": "mm"},
4794 "name": "PA_CL_VPORT_ZSCALE_15",
4795 "type_ref": "PA_CL_VPORT_ZSCALE"
4799 "map": {"at": 165304, "to": "mm"},
4800 "name": "PA_CL_VPORT_ZOFFSET_15",
4801 "type_ref": "PA_CL_VPORT_ZOFFSET"
4805 "map": {"at": 165308, "to": "mm"},
4806 "name": "PA_CL_UCP_0_X",
4807 "type_ref": "PA_CL_UCP_0_X"
4811 "map": {"at": 165312, "to": "mm"},
4812 "name": "PA_CL_UCP_0_Y",
4813 "type_ref": "PA_CL_UCP_0_X"
4817 "map": {"at": 165316, "to": "mm"},
4818 "name": "PA_CL_UCP_0_Z",
4819 "type_ref": "PA_CL_UCP_0_X"
4823 "map": {"at": 165320, "to": "mm"},
4824 "name": "PA_CL_UCP_0_W",
4825 "type_ref": "PA_CL_UCP_0_X"
4829 "map": {"at": 165324, "to": "mm"},
4830 "name": "PA_CL_UCP_1_X",
4831 "type_ref": "PA_CL_UCP_0_X"
4835 "map": {"at": 165328, "to": "mm"},
4836 "name": "PA_CL_UCP_1_Y",
4837 "type_ref": "PA_CL_UCP_0_X"
4841 "map": {"at": 165332, "to": "mm"},
4842 "name": "PA_CL_UCP_1_Z",
4843 "type_ref": "PA_CL_UCP_0_X"
4847 "map": {"at": 165336, "to": "mm"},
4848 "name": "PA_CL_UCP_1_W",
4849 "type_ref": "PA_CL_UCP_0_X"
4853 "map": {"at": 165340, "to": "mm"},
4854 "name": "PA_CL_UCP_2_X",
4855 "type_ref": "PA_CL_UCP_0_X"
4859 "map": {"at": 165344, "to": "mm"},
4860 "name": "PA_CL_UCP_2_Y",
4861 "type_ref": "PA_CL_UCP_0_X"
4865 "map": {"at": 165348, "to": "mm"},
4866 "name": "PA_CL_UCP_2_Z",
4867 "type_ref": "PA_CL_UCP_0_X"
4871 "map": {"at": 165352, "to": "mm"},
4872 "name": "PA_CL_UCP_2_W",
4873 "type_ref": "PA_CL_UCP_0_X"
4877 "map": {"at": 165356, "to": "mm"},
4878 "name": "PA_CL_UCP_3_X",
4879 "type_ref": "PA_CL_UCP_0_X"
4883 "map": {"at": 165360, "to": "mm"},
4884 "name": "PA_CL_UCP_3_Y",
4885 "type_ref": "PA_CL_UCP_0_X"
4889 "map": {"at": 165364, "to": "mm"},
4890 "name": "PA_CL_UCP_3_Z",
4891 "type_ref": "PA_CL_UCP_0_X"
4895 "map": {"at": 165368, "to": "mm"},
4896 "name": "PA_CL_UCP_3_W",
4897 "type_ref": "PA_CL_UCP_0_X"
4901 "map": {"at": 165372, "to": "mm"},
4902 "name": "PA_CL_UCP_4_X",
4903 "type_ref": "PA_CL_UCP_0_X"
4907 "map": {"at": 165376, "to": "mm"},
4908 "name": "PA_CL_UCP_4_Y",
4909 "type_ref": "PA_CL_UCP_0_X"
4913 "map": {"at": 165380, "to": "mm"},
4914 "name": "PA_CL_UCP_4_Z",
4915 "type_ref": "PA_CL_UCP_0_X"
4919 "map": {"at": 165384, "to": "mm"},
4920 "name": "PA_CL_UCP_4_W",
4921 "type_ref": "PA_CL_UCP_0_X"
4925 "map": {"at": 165388, "to": "mm"},
4926 "name": "PA_CL_UCP_5_X",
4927 "type_ref": "PA_CL_UCP_0_X"
4931 "map": {"at": 165392, "to": "mm"},
4932 "name": "PA_CL_UCP_5_Y",
4933 "type_ref": "PA_CL_UCP_0_X"
4937 "map": {"at": 165396, "to": "mm"},
4938 "name": "PA_CL_UCP_5_Z",
4939 "type_ref": "PA_CL_UCP_0_X"
4943 "map": {"at": 165400, "to": "mm"},
4944 "name": "PA_CL_UCP_5_W",
4945 "type_ref": "PA_CL_UCP_0_X"
4949 "map": {"at": 165404, "to": "mm"},
4950 "name": "PA_CL_PROG_NEAR_CLIP_Z",
4951 "type_ref": "PA_CL_UCP_0_X"
4955 "map": {"at": 165444, "to": "mm"},
4956 "name": "SPI_PS_INPUT_CNTL_0",
4957 "type_ref": "SPI_PS_INPUT_CNTL_0"
4961 "map": {"at": 165448, "to": "mm"},
4962 "name": "SPI_PS_INPUT_CNTL_1",
4963 "type_ref": "SPI_PS_INPUT_CNTL_0"
4967 "map": {"at": 165452, "to": "mm"},
4968 "name": "SPI_PS_INPUT_CNTL_2",
4969 "type_ref": "SPI_PS_INPUT_CNTL_0"
4973 "map": {"at": 165456, "to": "mm"},
4974 "name": "SPI_PS_INPUT_CNTL_3",
4975 "type_ref": "SPI_PS_INPUT_CNTL_0"
4979 "map": {"at": 165460, "to": "mm"},
4980 "name": "SPI_PS_INPUT_CNTL_4",
4981 "type_ref": "SPI_PS_INPUT_CNTL_0"
4985 "map": {"at": 165464, "to": "mm"},
4986 "name": "SPI_PS_INPUT_CNTL_5",
4987 "type_ref": "SPI_PS_INPUT_CNTL_0"
4991 "map": {"at": 165468, "to": "mm"},
4992 "name": "SPI_PS_INPUT_CNTL_6",
4993 "type_ref": "SPI_PS_INPUT_CNTL_0"
4997 "map": {"at": 165472, "to": "mm"},
4998 "name": "SPI_PS_INPUT_CNTL_7",
4999 "type_ref": "SPI_PS_INPUT_CNTL_0"
5003 "map": {"at": 165476, "to": "mm"},
5004 "name": "SPI_PS_INPUT_CNTL_8",
5005 "type_ref": "SPI_PS_INPUT_CNTL_0"
5009 "map": {"at": 165480, "to": "mm"},
5010 "name": "SPI_PS_INPUT_CNTL_9",
5011 "type_ref": "SPI_PS_INPUT_CNTL_0"
5015 "map": {"at": 165484, "to": "mm"},
5016 "name": "SPI_PS_INPUT_CNTL_10",
5017 "type_ref": "SPI_PS_INPUT_CNTL_0"
5021 "map": {"at": 165488, "to": "mm"},
5022 "name": "SPI_PS_INPUT_CNTL_11",
5023 "type_ref": "SPI_PS_INPUT_CNTL_0"
5027 "map": {"at": 165492, "to": "mm"},
5028 "name": "SPI_PS_INPUT_CNTL_12",
5029 "type_ref": "SPI_PS_INPUT_CNTL_0"
5033 "map": {"at": 165496, "to": "mm"},
5034 "name": "SPI_PS_INPUT_CNTL_13",
5035 "type_ref": "SPI_PS_INPUT_CNTL_0"
5039 "map": {"at": 165500, "to": "mm"},
5040 "name": "SPI_PS_INPUT_CNTL_14",
5041 "type_ref": "SPI_PS_INPUT_CNTL_0"
5045 "map": {"at": 165504, "to": "mm"},
5046 "name": "SPI_PS_INPUT_CNTL_15",
5047 "type_ref": "SPI_PS_INPUT_CNTL_0"
5051 "map": {"at": 165508, "to": "mm"},
5052 "name": "SPI_PS_INPUT_CNTL_16",
5053 "type_ref": "SPI_PS_INPUT_CNTL_0"
5057 "map": {"at": 165512, "to": "mm"},
5058 "name": "SPI_PS_INPUT_CNTL_17",
5059 "type_ref": "SPI_PS_INPUT_CNTL_0"
5063 "map": {"at": 165516, "to": "mm"},
5064 "name": "SPI_PS_INPUT_CNTL_18",
5065 "type_ref": "SPI_PS_INPUT_CNTL_0"
5069 "map": {"at": 165520, "to": "mm"},
5070 "name": "SPI_PS_INPUT_CNTL_19",
5071 "type_ref": "SPI_PS_INPUT_CNTL_0"
5075 "map": {"at": 165524, "to": "mm"},
5076 "name": "SPI_PS_INPUT_CNTL_20",
5077 "type_ref": "SPI_PS_INPUT_CNTL_20"
5081 "map": {"at": 165528, "to": "mm"},
5082 "name": "SPI_PS_INPUT_CNTL_21",
5083 "type_ref": "SPI_PS_INPUT_CNTL_20"
5087 "map": {"at": 165532, "to": "mm"},
5088 "name": "SPI_PS_INPUT_CNTL_22",
5089 "type_ref": "SPI_PS_INPUT_CNTL_20"
5093 "map": {"at": 165536, "to": "mm"},
5094 "name": "SPI_PS_INPUT_CNTL_23",
5095 "type_ref": "SPI_PS_INPUT_CNTL_20"
5099 "map": {"at": 165540, "to": "mm"},
5100 "name": "SPI_PS_INPUT_CNTL_24",
5101 "type_ref": "SPI_PS_INPUT_CNTL_20"
5105 "map": {"at": 165544, "to": "mm"},
5106 "name": "SPI_PS_INPUT_CNTL_25",
5107 "type_ref": "SPI_PS_INPUT_CNTL_20"
5111 "map": {"at": 165548, "to": "mm"},
5112 "name": "SPI_PS_INPUT_CNTL_26",
5113 "type_ref": "SPI_PS_INPUT_CNTL_20"
5117 "map": {"at": 165552, "to": "mm"},
5118 "name": "SPI_PS_INPUT_CNTL_27",
5119 "type_ref": "SPI_PS_INPUT_CNTL_20"
5123 "map": {"at": 165556, "to": "mm"},
5124 "name": "SPI_PS_INPUT_CNTL_28",
5125 "type_ref": "SPI_PS_INPUT_CNTL_20"
5129 "map": {"at": 165560, "to": "mm"},
5130 "name": "SPI_PS_INPUT_CNTL_29",
5131 "type_ref": "SPI_PS_INPUT_CNTL_20"
5135 "map": {"at": 165564, "to": "mm"},
5136 "name": "SPI_PS_INPUT_CNTL_30",
5137 "type_ref": "SPI_PS_INPUT_CNTL_20"
5141 "map": {"at": 165568, "to": "mm"},
5142 "name": "SPI_PS_INPUT_CNTL_31",
5143 "type_ref": "SPI_PS_INPUT_CNTL_20"
5147 "map": {"at": 165572, "to": "mm"},
5148 "name": "SPI_VS_OUT_CONFIG",
5149 "type_ref": "SPI_VS_OUT_CONFIG"
5153 "map": {"at": 165580, "to": "mm"},
5154 "name": "SPI_PS_INPUT_ENA",
5155 "type_ref": "SPI_PS_INPUT_ENA"
5159 "map": {"at": 165584, "to": "mm"},
5160 "name": "SPI_PS_INPUT_ADDR",
5161 "type_ref": "SPI_PS_INPUT_ENA"
5165 "map": {"at": 165588, "to": "mm"},
5166 "name": "SPI_INTERP_CONTROL_0",
5167 "type_ref": "SPI_INTERP_CONTROL_0"
5171 "map": {"at": 165592, "to": "mm"},
5172 "name": "SPI_PS_IN_CONTROL",
5173 "type_ref": "SPI_PS_IN_CONTROL"
5177 "map": {"at": 165600, "to": "mm"},
5178 "name": "SPI_BARYC_CNTL",
5179 "type_ref": "SPI_BARYC_CNTL"
5183 "map": {"at": 165608, "to": "mm"},
5184 "name": "SPI_TMPRING_SIZE",
5185 "type_ref": "COMPUTE_TMPRING_SIZE"
5189 "map": {"at": 165644, "to": "mm"},
5190 "name": "SPI_SHADER_POS_FORMAT",
5191 "type_ref": "SPI_SHADER_POS_FORMAT"
5195 "map": {"at": 165648, "to": "mm"},
5196 "name": "SPI_SHADER_Z_FORMAT",
5197 "type_ref": "SPI_SHADER_Z_FORMAT"
5201 "map": {"at": 165652, "to": "mm"},
5202 "name": "SPI_SHADER_COL_FORMAT",
5203 "type_ref": "SPI_SHADER_COL_FORMAT"
5207 "map": {"at": 165716, "to": "mm"},
5208 "name": "SX_PS_DOWNCONVERT",
5209 "type_ref": "SX_PS_DOWNCONVERT"
5213 "map": {"at": 165720, "to": "mm"},
5214 "name": "SX_BLEND_OPT_EPSILON",
5215 "type_ref": "SX_BLEND_OPT_EPSILON"
5219 "map": {"at": 165724, "to": "mm"},
5220 "name": "SX_BLEND_OPT_CONTROL",
5221 "type_ref": "SX_BLEND_OPT_CONTROL"
5225 "map": {"at": 165728, "to": "mm"},
5226 "name": "SX_MRT0_BLEND_OPT",
5227 "type_ref": "SX_MRT0_BLEND_OPT"
5231 "map": {"at": 165732, "to": "mm"},
5232 "name": "SX_MRT1_BLEND_OPT",
5233 "type_ref": "SX_MRT0_BLEND_OPT"
5237 "map": {"at": 165736, "to": "mm"},
5238 "name": "SX_MRT2_BLEND_OPT",
5239 "type_ref": "SX_MRT0_BLEND_OPT"
5243 "map": {"at": 165740, "to": "mm"},
5244 "name": "SX_MRT3_BLEND_OPT",
5245 "type_ref": "SX_MRT0_BLEND_OPT"
5249 "map": {"at": 165744, "to": "mm"},
5250 "name": "SX_MRT4_BLEND_OPT",
5251 "type_ref": "SX_MRT0_BLEND_OPT"
5255 "map": {"at": 165748, "to": "mm"},
5256 "name": "SX_MRT5_BLEND_OPT",
5257 "type_ref": "SX_MRT0_BLEND_OPT"
5261 "map": {"at": 165752, "to": "mm"},
5262 "name": "SX_MRT6_BLEND_OPT",
5263 "type_ref": "SX_MRT0_BLEND_OPT"
5267 "map": {"at": 165756, "to": "mm"},
5268 "name": "SX_MRT7_BLEND_OPT",
5269 "type_ref": "SX_MRT0_BLEND_OPT"
5273 "map": {"at": 165760, "to": "mm"},
5274 "name": "CB_BLEND0_CONTROL",
5275 "type_ref": "CB_BLEND0_CONTROL"
5279 "map": {"at": 165764, "to": "mm"},
5280 "name": "CB_BLEND1_CONTROL",
5281 "type_ref": "CB_BLEND0_CONTROL"
5285 "map": {"at": 165768, "to": "mm"},
5286 "name": "CB_BLEND2_CONTROL",
5287 "type_ref": "CB_BLEND0_CONTROL"
5291 "map": {"at": 165772, "to": "mm"},
5292 "name": "CB_BLEND3_CONTROL",
5293 "type_ref": "CB_BLEND0_CONTROL"
5297 "map": {"at": 165776, "to": "mm"},
5298 "name": "CB_BLEND4_CONTROL",
5299 "type_ref": "CB_BLEND0_CONTROL"
5303 "map": {"at": 165780, "to": "mm"},
5304 "name": "CB_BLEND5_CONTROL",
5305 "type_ref": "CB_BLEND0_CONTROL"
5309 "map": {"at": 165784, "to": "mm"},
5310 "name": "CB_BLEND6_CONTROL",
5311 "type_ref": "CB_BLEND0_CONTROL"
5315 "map": {"at": 165788, "to": "mm"},
5316 "name": "CB_BLEND7_CONTROL",
5317 "type_ref": "CB_BLEND0_CONTROL"
5321 "map": {"at": 165792, "to": "mm"},
5322 "name": "CB_MRT0_EPITCH",
5323 "type_ref": "DB_Z_INFO2"
5327 "map": {"at": 165796, "to": "mm"},
5328 "name": "CB_MRT1_EPITCH",
5329 "type_ref": "DB_Z_INFO2"
5333 "map": {"at": 165800, "to": "mm"},
5334 "name": "CB_MRT2_EPITCH",
5335 "type_ref": "DB_Z_INFO2"
5339 "map": {"at": 165804, "to": "mm"},
5340 "name": "CB_MRT3_EPITCH",
5341 "type_ref": "DB_Z_INFO2"
5345 "map": {"at": 165808, "to": "mm"},
5346 "name": "CB_MRT4_EPITCH",
5347 "type_ref": "DB_Z_INFO2"
5351 "map": {"at": 165812, "to": "mm"},
5352 "name": "CB_MRT5_EPITCH",
5353 "type_ref": "DB_Z_INFO2"
5357 "map": {"at": 165816, "to": "mm"},
5358 "name": "CB_MRT6_EPITCH",
5359 "type_ref": "DB_Z_INFO2"
5363 "map": {"at": 165820, "to": "mm"},
5364 "name": "CB_MRT7_EPITCH",
5365 "type_ref": "DB_Z_INFO2"
5369 "map": {"at": 165836, "to": "mm"},
5370 "name": "CS_COPY_STATE",
5371 "type_ref": "CS_COPY_STATE"
5375 "map": {"at": 165840, "to": "mm"},
5376 "name": "GFX_COPY_STATE",
5377 "type_ref": "CS_COPY_STATE"
5381 "map": {"at": 165844, "to": "mm"},
5382 "name": "PA_CL_POINT_X_RAD",
5383 "type_ref": "PA_CL_UCP_0_X"
5387 "map": {"at": 165848, "to": "mm"},
5388 "name": "PA_CL_POINT_Y_RAD",
5389 "type_ref": "PA_CL_UCP_0_X"
5393 "map": {"at": 165852, "to": "mm"},
5394 "name": "PA_CL_POINT_SIZE",
5395 "type_ref": "PA_CL_UCP_0_X"
5399 "map": {"at": 165856, "to": "mm"},
5400 "name": "PA_CL_POINT_CULL_RAD",
5401 "type_ref": "PA_CL_UCP_0_X"
5405 "map": {"at": 165860, "to": "mm"},
5406 "name": "VGT_DMA_BASE_HI",
5407 "type_ref": "VGT_DMA_BASE_HI"
5411 "map": {"at": 165864, "to": "mm"},
5412 "name": "VGT_DMA_BASE",
5413 "type_ref": "VGT_DMA_BASE"
5417 "map": {"at": 165872, "to": "mm"},
5418 "name": "VGT_DRAW_INITIATOR",
5419 "type_ref": "VGT_DRAW_INITIATOR"
5423 "map": {"at": 165876, "to": "mm"},
5424 "name": "VGT_IMMED_DATA",
5425 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
5429 "map": {"at": 165880, "to": "mm"},
5430 "name": "VGT_EVENT_ADDRESS_REG",
5431 "type_ref": "VGT_EVENT_ADDRESS_REG"
5435 "map": {"at": 165888, "to": "mm"},
5436 "name": "DB_DEPTH_CONTROL",
5437 "type_ref": "DB_DEPTH_CONTROL"
5441 "map": {"at": 165892, "to": "mm"},
5443 "type_ref": "DB_EQAA"
5447 "map": {"at": 165896, "to": "mm"},
5448 "name": "CB_COLOR_CONTROL",
5449 "type_ref": "CB_COLOR_CONTROL"
5453 "map": {"at": 165900, "to": "mm"},
5454 "name": "DB_SHADER_CONTROL",
5455 "type_ref": "DB_SHADER_CONTROL"
5459 "map": {"at": 165904, "to": "mm"},
5460 "name": "PA_CL_CLIP_CNTL",
5461 "type_ref": "PA_CL_CLIP_CNTL"
5465 "map": {"at": 165908, "to": "mm"},
5466 "name": "PA_SU_SC_MODE_CNTL",
5467 "type_ref": "PA_SU_SC_MODE_CNTL"
5471 "map": {"at": 165912, "to": "mm"},
5472 "name": "PA_CL_VTE_CNTL",
5473 "type_ref": "PA_CL_VTE_CNTL"
5477 "map": {"at": 165916, "to": "mm"},
5478 "name": "PA_CL_VS_OUT_CNTL",
5479 "type_ref": "PA_CL_VS_OUT_CNTL"
5483 "map": {"at": 165920, "to": "mm"},
5484 "name": "PA_CL_NANINF_CNTL",
5485 "type_ref": "PA_CL_NANINF_CNTL"
5489 "map": {"at": 165924, "to": "mm"},
5490 "name": "PA_SU_LINE_STIPPLE_CNTL",
5491 "type_ref": "PA_SU_LINE_STIPPLE_CNTL"
5495 "map": {"at": 165928, "to": "mm"},
5496 "name": "PA_SU_LINE_STIPPLE_SCALE",
5497 "type_ref": "PA_SU_LINE_STIPPLE_SCALE"
5501 "map": {"at": 165932, "to": "mm"},
5502 "name": "PA_SU_PRIM_FILTER_CNTL",
5503 "type_ref": "PA_SU_PRIM_FILTER_CNTL"
5507 "map": {"at": 165936, "to": "mm"},
5508 "name": "PA_SU_SMALL_PRIM_FILTER_CNTL",
5509 "type_ref": "PA_SU_SMALL_PRIM_FILTER_CNTL"
5513 "map": {"at": 165940, "to": "mm"},
5514 "name": "PA_CL_OBJPRIM_ID_CNTL",
5515 "type_ref": "PA_CL_OBJPRIM_ID_CNTL"
5519 "map": {"at": 165944, "to": "mm"},
5520 "name": "PA_CL_NGG_CNTL",
5521 "type_ref": "PA_CL_NGG_CNTL"
5525 "map": {"at": 165948, "to": "mm"},
5526 "name": "PA_SU_OVER_RASTERIZATION_CNTL",
5527 "type_ref": "PA_SU_OVER_RASTERIZATION_CNTL"
5531 "map": {"at": 165952, "to": "mm"},
5532 "name": "PA_STEREO_CNTL",
5533 "type_ref": "PA_STEREO_CNTL"
5537 "map": {"at": 166400, "to": "mm"},
5538 "name": "PA_SU_POINT_SIZE",
5539 "type_ref": "PA_SU_POINT_SIZE"
5543 "map": {"at": 166404, "to": "mm"},
5544 "name": "PA_SU_POINT_MINMAX",
5545 "type_ref": "PA_SU_POINT_MINMAX"
5549 "map": {"at": 166408, "to": "mm"},
5550 "name": "PA_SU_LINE_CNTL",
5551 "type_ref": "PA_SU_LINE_CNTL"
5555 "map": {"at": 166412, "to": "mm"},
5556 "name": "PA_SC_LINE_STIPPLE",
5557 "type_ref": "PA_SC_LINE_STIPPLE"
5561 "map": {"at": 166416, "to": "mm"},
5562 "name": "VGT_OUTPUT_PATH_CNTL",
5563 "type_ref": "VGT_OUTPUT_PATH_CNTL"
5567 "map": {"at": 166420, "to": "mm"},
5568 "name": "VGT_HOS_CNTL",
5569 "type_ref": "VGT_HOS_CNTL"
5573 "map": {"at": 166424, "to": "mm"},
5574 "name": "VGT_HOS_MAX_TESS_LEVEL",
5575 "type_ref": "VGT_HOS_MAX_TESS_LEVEL"
5579 "map": {"at": 166428, "to": "mm"},
5580 "name": "VGT_HOS_MIN_TESS_LEVEL",
5581 "type_ref": "VGT_HOS_MIN_TESS_LEVEL"
5585 "map": {"at": 166432, "to": "mm"},
5586 "name": "VGT_HOS_REUSE_DEPTH",
5587 "type_ref": "VGT_HOS_REUSE_DEPTH"
5591 "map": {"at": 166436, "to": "mm"},
5592 "name": "VGT_GROUP_PRIM_TYPE",
5593 "type_ref": "VGT_GROUP_PRIM_TYPE"
5597 "map": {"at": 166440, "to": "mm"},
5598 "name": "VGT_GROUP_FIRST_DECR",
5599 "type_ref": "VGT_GROUP_FIRST_DECR"
5603 "map": {"at": 166444, "to": "mm"},
5604 "name": "VGT_GROUP_DECR",
5605 "type_ref": "VGT_GROUP_DECR"
5609 "map": {"at": 166448, "to": "mm"},
5610 "name": "VGT_GROUP_VECT_0_CNTL",
5611 "type_ref": "VGT_GROUP_VECT_0_CNTL"
5615 "map": {"at": 166452, "to": "mm"},
5616 "name": "VGT_GROUP_VECT_1_CNTL",
5617 "type_ref": "VGT_GROUP_VECT_0_CNTL"
5621 "map": {"at": 166456, "to": "mm"},
5622 "name": "VGT_GROUP_VECT_0_FMT_CNTL",
5623 "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
5627 "map": {"at": 166460, "to": "mm"},
5628 "name": "VGT_GROUP_VECT_1_FMT_CNTL",
5629 "type_ref": "VGT_GROUP_VECT_0_FMT_CNTL"
5633 "map": {"at": 166464, "to": "mm"},
5634 "name": "VGT_GS_MODE",
5635 "type_ref": "VGT_GS_MODE"
5639 "map": {"at": 166468, "to": "mm"},
5640 "name": "VGT_GS_ONCHIP_CNTL",
5641 "type_ref": "VGT_GS_ONCHIP_CNTL"
5645 "map": {"at": 166472, "to": "mm"},
5646 "name": "PA_SC_MODE_CNTL_0",
5647 "type_ref": "PA_SC_MODE_CNTL_0"
5651 "map": {"at": 166476, "to": "mm"},
5652 "name": "PA_SC_MODE_CNTL_1",
5653 "type_ref": "PA_SC_MODE_CNTL_1"
5657 "map": {"at": 166480, "to": "mm"},
5658 "name": "VGT_ENHANCE",
5659 "type_ref": "VGT_ENHANCE"
5663 "map": {"at": 166484, "to": "mm"},
5664 "name": "VGT_GS_PER_ES",
5665 "type_ref": "VGT_GS_PER_ES"
5669 "map": {"at": 166488, "to": "mm"},
5670 "name": "VGT_ES_PER_GS",
5671 "type_ref": "VGT_ES_PER_GS"
5675 "map": {"at": 166492, "to": "mm"},
5676 "name": "VGT_GS_PER_VS",
5677 "type_ref": "VGT_GS_PER_VS"
5681 "map": {"at": 166496, "to": "mm"},
5682 "name": "VGT_GSVS_RING_OFFSET_1",
5683 "type_ref": "VGT_GSVS_RING_OFFSET_1"
5687 "map": {"at": 166500, "to": "mm"},
5688 "name": "VGT_GSVS_RING_OFFSET_2",
5689 "type_ref": "VGT_GSVS_RING_OFFSET_1"
5693 "map": {"at": 166504, "to": "mm"},
5694 "name": "VGT_GSVS_RING_OFFSET_3",
5695 "type_ref": "VGT_GSVS_RING_OFFSET_1"
5699 "map": {"at": 166508, "to": "mm"},
5700 "name": "VGT_GS_OUT_PRIM_TYPE",
5701 "type_ref": "VGT_GS_OUT_PRIM_TYPE"
5705 "map": {"at": 166512, "to": "mm"},
5706 "name": "IA_ENHANCE",
5707 "type_ref": "VGT_ENHANCE"
5711 "map": {"at": 166516, "to": "mm"},
5712 "name": "VGT_DMA_SIZE",
5713 "type_ref": "VGT_DMA_SIZE"
5717 "map": {"at": 166520, "to": "mm"},
5718 "name": "VGT_DMA_MAX_SIZE",
5719 "type_ref": "VGT_DMA_MAX_SIZE"
5723 "map": {"at": 166524, "to": "mm"},
5724 "name": "VGT_DMA_INDEX_TYPE",
5725 "type_ref": "VGT_DMA_INDEX_TYPE"
5729 "map": {"at": 166528, "to": "mm"},
5730 "name": "WD_ENHANCE",
5731 "type_ref": "VGT_ENHANCE"
5735 "map": {"at": 166532, "to": "mm"},
5736 "name": "VGT_PRIMITIVEID_EN",
5737 "type_ref": "VGT_PRIMITIVEID_EN"
5741 "map": {"at": 166536, "to": "mm"},
5742 "name": "VGT_DMA_NUM_INSTANCES",
5743 "type_ref": "VGT_DMA_NUM_INSTANCES"
5747 "map": {"at": 166540, "to": "mm"},
5748 "name": "VGT_PRIMITIVEID_RESET",
5749 "type_ref": "VGT_PRIMITIVEID_RESET"
5753 "map": {"at": 166544, "to": "mm"},
5754 "name": "VGT_EVENT_INITIATOR",
5755 "type_ref": "VGT_EVENT_INITIATOR"
5759 "map": {"at": 166548, "to": "mm"},
5760 "name": "VGT_GS_MAX_PRIMS_PER_SUBGROUP",
5761 "type_ref": "VGT_GS_MAX_PRIMS_PER_SUBGROUP"
5765 "map": {"at": 166552, "to": "mm"},
5766 "name": "VGT_DRAW_PAYLOAD_CNTL",
5767 "type_ref": "VGT_DRAW_PAYLOAD_CNTL"
5771 "map": {"at": 166560, "to": "mm"},
5772 "name": "VGT_INSTANCE_STEP_RATE_0",
5773 "type_ref": "VGT_INSTANCE_STEP_RATE_0"
5777 "map": {"at": 166564, "to": "mm"},
5778 "name": "VGT_INSTANCE_STEP_RATE_1",
5779 "type_ref": "VGT_INSTANCE_STEP_RATE_0"
5783 "map": {"at": 166572, "to": "mm"},
5784 "name": "VGT_ESGS_RING_ITEMSIZE",
5785 "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5789 "map": {"at": 166576, "to": "mm"},
5790 "name": "VGT_GSVS_RING_ITEMSIZE",
5791 "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5795 "map": {"at": 166580, "to": "mm"},
5796 "name": "VGT_REUSE_OFF",
5797 "type_ref": "VGT_REUSE_OFF"
5801 "map": {"at": 166584, "to": "mm"},
5802 "name": "VGT_VTX_CNT_EN",
5803 "type_ref": "VGT_VTX_CNT_EN"
5807 "map": {"at": 166588, "to": "mm"},
5808 "name": "DB_HTILE_SURFACE",
5809 "type_ref": "DB_HTILE_SURFACE"
5813 "map": {"at": 166592, "to": "mm"},
5814 "name": "DB_SRESULTS_COMPARE_STATE0",
5815 "type_ref": "DB_SRESULTS_COMPARE_STATE0"
5819 "map": {"at": 166596, "to": "mm"},
5820 "name": "DB_SRESULTS_COMPARE_STATE1",
5821 "type_ref": "DB_SRESULTS_COMPARE_STATE1"
5825 "map": {"at": 166600, "to": "mm"},
5826 "name": "DB_PRELOAD_CONTROL",
5827 "type_ref": "DB_PRELOAD_CONTROL"
5831 "map": {"at": 166608, "to": "mm"},
5832 "name": "VGT_STRMOUT_BUFFER_SIZE_0",
5833 "type_ref": "COMPUTE_DIM_X"
5837 "map": {"at": 166612, "to": "mm"},
5838 "name": "VGT_STRMOUT_VTX_STRIDE_0",
5839 "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5843 "map": {"at": 166620, "to": "mm"},
5844 "name": "VGT_STRMOUT_BUFFER_OFFSET_0",
5845 "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0"
5849 "map": {"at": 166624, "to": "mm"},
5850 "name": "VGT_STRMOUT_BUFFER_SIZE_1",
5851 "type_ref": "COMPUTE_DIM_X"
5855 "map": {"at": 166628, "to": "mm"},
5856 "name": "VGT_STRMOUT_VTX_STRIDE_1",
5857 "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5861 "map": {"at": 166636, "to": "mm"},
5862 "name": "VGT_STRMOUT_BUFFER_OFFSET_1",
5863 "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0"
5867 "map": {"at": 166640, "to": "mm"},
5868 "name": "VGT_STRMOUT_BUFFER_SIZE_2",
5869 "type_ref": "COMPUTE_DIM_X"
5873 "map": {"at": 166644, "to": "mm"},
5874 "name": "VGT_STRMOUT_VTX_STRIDE_2",
5875 "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5879 "map": {"at": 166652, "to": "mm"},
5880 "name": "VGT_STRMOUT_BUFFER_OFFSET_2",
5881 "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0"
5885 "map": {"at": 166656, "to": "mm"},
5886 "name": "VGT_STRMOUT_BUFFER_SIZE_3",
5887 "type_ref": "COMPUTE_DIM_X"
5891 "map": {"at": 166660, "to": "mm"},
5892 "name": "VGT_STRMOUT_VTX_STRIDE_3",
5893 "type_ref": "VGT_STRMOUT_VTX_STRIDE_0"
5897 "map": {"at": 166668, "to": "mm"},
5898 "name": "VGT_STRMOUT_BUFFER_OFFSET_3",
5899 "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0"
5903 "map": {"at": 166696, "to": "mm"},
5904 "name": "VGT_STRMOUT_DRAW_OPAQUE_OFFSET",
5905 "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0"
5909 "map": {"at": 166700, "to": "mm"},
5910 "name": "VGT_STRMOUT_DRAW_OPAQUE_BUFFER_FILLED_SIZE",
5911 "type_ref": "COMPUTE_DIM_X"
5915 "map": {"at": 166704, "to": "mm"},
5916 "name": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE",
5917 "type_ref": "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE"
5921 "map": {"at": 166712, "to": "mm"},
5922 "name": "VGT_GS_MAX_VERT_OUT",
5923 "type_ref": "VGT_GS_MAX_VERT_OUT"
5927 "map": {"at": 166736, "to": "mm"},
5928 "name": "VGT_TESS_DISTRIBUTION",
5929 "type_ref": "VGT_TESS_DISTRIBUTION"
5933 "map": {"at": 166740, "to": "mm"},
5934 "name": "VGT_SHADER_STAGES_EN",
5935 "type_ref": "VGT_SHADER_STAGES_EN"
5939 "map": {"at": 166744, "to": "mm"},
5940 "name": "VGT_LS_HS_CONFIG",
5941 "type_ref": "VGT_LS_HS_CONFIG"
5945 "map": {"at": 166748, "to": "mm"},
5946 "name": "VGT_GS_VERT_ITEMSIZE",
5947 "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5951 "map": {"at": 166752, "to": "mm"},
5952 "name": "VGT_GS_VERT_ITEMSIZE_1",
5953 "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5957 "map": {"at": 166756, "to": "mm"},
5958 "name": "VGT_GS_VERT_ITEMSIZE_2",
5959 "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5963 "map": {"at": 166760, "to": "mm"},
5964 "name": "VGT_GS_VERT_ITEMSIZE_3",
5965 "type_ref": "VGT_ESGS_RING_ITEMSIZE"
5969 "map": {"at": 166764, "to": "mm"},
5970 "name": "VGT_TF_PARAM",
5971 "type_ref": "VGT_TF_PARAM"
5975 "map": {"at": 166768, "to": "mm"},
5976 "name": "DB_ALPHA_TO_MASK",
5977 "type_ref": "DB_ALPHA_TO_MASK"
5981 "map": {"at": 166772, "to": "mm"},
5982 "name": "VGT_DISPATCH_DRAW_INDEX",
5983 "type_ref": "VGT_DISPATCH_DRAW_INDEX"
5987 "map": {"at": 166776, "to": "mm"},
5988 "name": "PA_SU_POLY_OFFSET_DB_FMT_CNTL",
5989 "type_ref": "PA_SU_POLY_OFFSET_DB_FMT_CNTL"
5993 "map": {"at": 166780, "to": "mm"},
5994 "name": "PA_SU_POLY_OFFSET_CLAMP",
5995 "type_ref": "PA_SU_POLY_OFFSET_CLAMP"
5999 "map": {"at": 166784, "to": "mm"},
6000 "name": "PA_SU_POLY_OFFSET_FRONT_SCALE",
6001 "type_ref": "PA_SU_POLY_OFFSET_FRONT_SCALE"
6005 "map": {"at": 166788, "to": "mm"},
6006 "name": "PA_SU_POLY_OFFSET_FRONT_OFFSET",
6007 "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0"
6011 "map": {"at": 166792, "to": "mm"},
6012 "name": "PA_SU_POLY_OFFSET_BACK_SCALE",
6013 "type_ref": "PA_SU_POLY_OFFSET_FRONT_SCALE"
6017 "map": {"at": 166796, "to": "mm"},
6018 "name": "PA_SU_POLY_OFFSET_BACK_OFFSET",
6019 "type_ref": "VGT_STRMOUT_BUFFER_OFFSET_0"
6023 "map": {"at": 166800, "to": "mm"},
6024 "name": "VGT_GS_INSTANCE_CNT",
6025 "type_ref": "VGT_GS_INSTANCE_CNT"
6029 "map": {"at": 166804, "to": "mm"},
6030 "name": "VGT_STRMOUT_CONFIG",
6031 "type_ref": "VGT_STRMOUT_CONFIG"
6035 "map": {"at": 166808, "to": "mm"},
6036 "name": "VGT_STRMOUT_BUFFER_CONFIG",
6037 "type_ref": "VGT_STRMOUT_BUFFER_CONFIG"
6041 "map": {"at": 166812, "to": "mm"},
6042 "name": "VGT_DMA_EVENT_INITIATOR",
6043 "type_ref": "VGT_EVENT_INITIATOR"
6047 "map": {"at": 166868, "to": "mm"},
6048 "name": "PA_SC_CENTROID_PRIORITY_0",
6049 "type_ref": "PA_SC_CENTROID_PRIORITY_0"
6053 "map": {"at": 166872, "to": "mm"},
6054 "name": "PA_SC_CENTROID_PRIORITY_1",
6055 "type_ref": "PA_SC_CENTROID_PRIORITY_1"
6059 "map": {"at": 166876, "to": "mm"},
6060 "name": "PA_SC_LINE_CNTL",
6061 "type_ref": "PA_SC_LINE_CNTL"
6065 "map": {"at": 166880, "to": "mm"},
6066 "name": "PA_SC_AA_CONFIG",
6067 "type_ref": "PA_SC_AA_CONFIG"
6071 "map": {"at": 166884, "to": "mm"},
6072 "name": "PA_SU_VTX_CNTL",
6073 "type_ref": "PA_SU_VTX_CNTL"
6077 "map": {"at": 166888, "to": "mm"},
6078 "name": "PA_CL_GB_VERT_CLIP_ADJ",
6079 "type_ref": "PA_CL_UCP_0_X"
6083 "map": {"at": 166892, "to": "mm"},
6084 "name": "PA_CL_GB_VERT_DISC_ADJ",
6085 "type_ref": "PA_CL_UCP_0_X"
6089 "map": {"at": 166896, "to": "mm"},
6090 "name": "PA_CL_GB_HORZ_CLIP_ADJ",
6091 "type_ref": "PA_CL_UCP_0_X"
6095 "map": {"at": 166900, "to": "mm"},
6096 "name": "PA_CL_GB_HORZ_DISC_ADJ",
6097 "type_ref": "PA_CL_UCP_0_X"
6101 "map": {"at": 166904, "to": "mm"},
6102 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0",
6103 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
6107 "map": {"at": 166908, "to": "mm"},
6108 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1",
6109 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
6113 "map": {"at": 166912, "to": "mm"},
6114 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2",
6115 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
6119 "map": {"at": 166916, "to": "mm"},
6120 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3",
6121 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
6125 "map": {"at": 166920, "to": "mm"},
6126 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_0",
6127 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
6131 "map": {"at": 166924, "to": "mm"},
6132 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_1",
6133 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
6137 "map": {"at": 166928, "to": "mm"},
6138 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_2",
6139 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
6143 "map": {"at": 166932, "to": "mm"},
6144 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y0_3",
6145 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
6149 "map": {"at": 166936, "to": "mm"},
6150 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_0",
6151 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
6155 "map": {"at": 166940, "to": "mm"},
6156 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_1",
6157 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
6161 "map": {"at": 166944, "to": "mm"},
6162 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_2",
6163 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
6167 "map": {"at": 166948, "to": "mm"},
6168 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y1_3",
6169 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
6173 "map": {"at": 166952, "to": "mm"},
6174 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_0",
6175 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0"
6179 "map": {"at": 166956, "to": "mm"},
6180 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_1",
6181 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1"
6185 "map": {"at": 166960, "to": "mm"},
6186 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_2",
6187 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2"
6191 "map": {"at": 166964, "to": "mm"},
6192 "name": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X1Y1_3",
6193 "type_ref": "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3"
6197 "map": {"at": 166968, "to": "mm"},
6198 "name": "PA_SC_AA_MASK_X0Y0_X1Y0",
6199 "type_ref": "PA_SC_AA_MASK_X0Y0_X1Y0"
6203 "map": {"at": 166972, "to": "mm"},
6204 "name": "PA_SC_AA_MASK_X0Y1_X1Y1",
6205 "type_ref": "PA_SC_AA_MASK_X0Y1_X1Y1"
6209 "map": {"at": 166976, "to": "mm"},
6210 "name": "PA_SC_SHADER_CONTROL",
6211 "type_ref": "PA_SC_SHADER_CONTROL"
6215 "map": {"at": 166980, "to": "mm"},
6216 "name": "PA_SC_BINNER_CNTL_0",
6217 "type_ref": "PA_SC_BINNER_CNTL_0"
6221 "map": {"at": 166984, "to": "mm"},
6222 "name": "PA_SC_BINNER_CNTL_1",
6223 "type_ref": "PA_SC_BINNER_CNTL_1"
6227 "map": {"at": 166988, "to": "mm"},
6228 "name": "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL",
6229 "type_ref": "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL"
6233 "map": {"at": 166992, "to": "mm"},
6234 "name": "PA_SC_NGG_MODE_CNTL",
6235 "type_ref": "PA_SC_NGG_MODE_CNTL"
6239 "map": {"at": 167000, "to": "mm"},
6240 "name": "VGT_VERTEX_REUSE_BLOCK_CNTL",
6241 "type_ref": "VGT_VERTEX_REUSE_BLOCK_CNTL"
6245 "map": {"at": 167004, "to": "mm"},
6246 "name": "VGT_OUT_DEALLOC_CNTL",
6247 "type_ref": "VGT_OUT_DEALLOC_CNTL"
6251 "map": {"at": 167008, "to": "mm"},
6252 "name": "CB_COLOR0_BASE",
6253 "type_ref": "DB_HTILE_DATA_BASE"
6257 "map": {"at": 167012, "to": "mm"},
6258 "name": "CB_COLOR0_BASE_EXT",
6259 "type_ref": "CB_COLOR0_BASE_EXT"
6263 "map": {"at": 167016, "to": "mm"},
6264 "name": "CB_COLOR0_ATTRIB2",
6265 "type_ref": "CB_COLOR0_ATTRIB2"
6269 "map": {"at": 167020, "to": "mm"},
6270 "name": "CB_COLOR0_VIEW",
6271 "type_ref": "CB_COLOR0_VIEW"
6275 "map": {"at": 167024, "to": "mm"},
6276 "name": "CB_COLOR0_INFO",
6277 "type_ref": "CB_COLOR0_INFO"
6281 "map": {"at": 167028, "to": "mm"},
6282 "name": "CB_COLOR0_ATTRIB",
6283 "type_ref": "CB_COLOR0_ATTRIB"
6287 "map": {"at": 167032, "to": "mm"},
6288 "name": "CB_COLOR0_DCC_CONTROL",
6289 "type_ref": "CB_COLOR0_DCC_CONTROL"
6293 "map": {"at": 167036, "to": "mm"},
6294 "name": "CB_COLOR0_CMASK",
6295 "type_ref": "DB_HTILE_DATA_BASE"
6299 "map": {"at": 167040, "to": "mm"},
6300 "name": "CB_COLOR0_CMASK_BASE_EXT",
6301 "type_ref": "CB_COLOR0_BASE_EXT"
6305 "map": {"at": 167044, "to": "mm"},
6306 "name": "CB_COLOR0_FMASK",
6307 "type_ref": "DB_HTILE_DATA_BASE"
6311 "map": {"at": 167048, "to": "mm"},
6312 "name": "CB_COLOR0_FMASK_BASE_EXT",
6313 "type_ref": "CB_COLOR0_BASE_EXT"
6317 "map": {"at": 167052, "to": "mm"},
6318 "name": "CB_COLOR0_CLEAR_WORD0",
6319 "type_ref": "CB_COLOR0_CLEAR_WORD0"
6323 "map": {"at": 167056, "to": "mm"},
6324 "name": "CB_COLOR0_CLEAR_WORD1",
6325 "type_ref": "CB_COLOR0_CLEAR_WORD1"
6329 "map": {"at": 167060, "to": "mm"},
6330 "name": "CB_COLOR0_DCC_BASE",
6331 "type_ref": "DB_HTILE_DATA_BASE"
6335 "map": {"at": 167064, "to": "mm"},
6336 "name": "CB_COLOR0_DCC_BASE_EXT",
6337 "type_ref": "CB_COLOR0_BASE_EXT"
6341 "map": {"at": 167068, "to": "mm"},
6342 "name": "CB_COLOR1_BASE",
6343 "type_ref": "DB_HTILE_DATA_BASE"
6347 "map": {"at": 167072, "to": "mm"},
6348 "name": "CB_COLOR1_BASE_EXT",
6349 "type_ref": "CB_COLOR0_BASE_EXT"
6353 "map": {"at": 167076, "to": "mm"},
6354 "name": "CB_COLOR1_ATTRIB2",
6355 "type_ref": "CB_COLOR0_ATTRIB2"
6359 "map": {"at": 167080, "to": "mm"},
6360 "name": "CB_COLOR1_VIEW",
6361 "type_ref": "CB_COLOR0_VIEW"
6365 "map": {"at": 167084, "to": "mm"},
6366 "name": "CB_COLOR1_INFO",
6367 "type_ref": "CB_COLOR0_INFO"
6371 "map": {"at": 167088, "to": "mm"},
6372 "name": "CB_COLOR1_ATTRIB",
6373 "type_ref": "CB_COLOR0_ATTRIB"
6377 "map": {"at": 167092, "to": "mm"},
6378 "name": "CB_COLOR1_DCC_CONTROL",
6379 "type_ref": "CB_COLOR0_DCC_CONTROL"
6383 "map": {"at": 167096, "to": "mm"},
6384 "name": "CB_COLOR1_CMASK",
6385 "type_ref": "DB_HTILE_DATA_BASE"
6389 "map": {"at": 167100, "to": "mm"},
6390 "name": "CB_COLOR1_CMASK_BASE_EXT",
6391 "type_ref": "CB_COLOR0_BASE_EXT"
6395 "map": {"at": 167104, "to": "mm"},
6396 "name": "CB_COLOR1_FMASK",
6397 "type_ref": "DB_HTILE_DATA_BASE"
6401 "map": {"at": 167108, "to": "mm"},
6402 "name": "CB_COLOR1_FMASK_BASE_EXT",
6403 "type_ref": "CB_COLOR0_BASE_EXT"
6407 "map": {"at": 167112, "to": "mm"},
6408 "name": "CB_COLOR1_CLEAR_WORD0",
6409 "type_ref": "CB_COLOR0_CLEAR_WORD0"
6413 "map": {"at": 167116, "to": "mm"},
6414 "name": "CB_COLOR1_CLEAR_WORD1",
6415 "type_ref": "CB_COLOR0_CLEAR_WORD1"
6419 "map": {"at": 167120, "to": "mm"},
6420 "name": "CB_COLOR1_DCC_BASE",
6421 "type_ref": "DB_HTILE_DATA_BASE"
6425 "map": {"at": 167124, "to": "mm"},
6426 "name": "CB_COLOR1_DCC_BASE_EXT",
6427 "type_ref": "CB_COLOR0_BASE_EXT"
6431 "map": {"at": 167128, "to": "mm"},
6432 "name": "CB_COLOR2_BASE",
6433 "type_ref": "DB_HTILE_DATA_BASE"
6437 "map": {"at": 167132, "to": "mm"},
6438 "name": "CB_COLOR2_BASE_EXT",
6439 "type_ref": "CB_COLOR0_BASE_EXT"
6443 "map": {"at": 167136, "to": "mm"},
6444 "name": "CB_COLOR2_ATTRIB2",
6445 "type_ref": "CB_COLOR0_ATTRIB2"
6449 "map": {"at": 167140, "to": "mm"},
6450 "name": "CB_COLOR2_VIEW",
6451 "type_ref": "CB_COLOR0_VIEW"
6455 "map": {"at": 167144, "to": "mm"},
6456 "name": "CB_COLOR2_INFO",
6457 "type_ref": "CB_COLOR0_INFO"
6461 "map": {"at": 167148, "to": "mm"},
6462 "name": "CB_COLOR2_ATTRIB",
6463 "type_ref": "CB_COLOR0_ATTRIB"
6467 "map": {"at": 167152, "to": "mm"},
6468 "name": "CB_COLOR2_DCC_CONTROL",
6469 "type_ref": "CB_COLOR0_DCC_CONTROL"
6473 "map": {"at": 167156, "to": "mm"},
6474 "name": "CB_COLOR2_CMASK",
6475 "type_ref": "DB_HTILE_DATA_BASE"
6479 "map": {"at": 167160, "to": "mm"},
6480 "name": "CB_COLOR2_CMASK_BASE_EXT",
6481 "type_ref": "CB_COLOR0_BASE_EXT"
6485 "map": {"at": 167164, "to": "mm"},
6486 "name": "CB_COLOR2_FMASK",
6487 "type_ref": "DB_HTILE_DATA_BASE"
6491 "map": {"at": 167168, "to": "mm"},
6492 "name": "CB_COLOR2_FMASK_BASE_EXT",
6493 "type_ref": "CB_COLOR0_BASE_EXT"
6497 "map": {"at": 167172, "to": "mm"},
6498 "name": "CB_COLOR2_CLEAR_WORD0",
6499 "type_ref": "CB_COLOR0_CLEAR_WORD0"
6503 "map": {"at": 167176, "to": "mm"},
6504 "name": "CB_COLOR2_CLEAR_WORD1",
6505 "type_ref": "CB_COLOR0_CLEAR_WORD1"
6509 "map": {"at": 167180, "to": "mm"},
6510 "name": "CB_COLOR2_DCC_BASE",
6511 "type_ref": "DB_HTILE_DATA_BASE"
6515 "map": {"at": 167184, "to": "mm"},
6516 "name": "CB_COLOR2_DCC_BASE_EXT",
6517 "type_ref": "CB_COLOR0_BASE_EXT"
6521 "map": {"at": 167188, "to": "mm"},
6522 "name": "CB_COLOR3_BASE",
6523 "type_ref": "DB_HTILE_DATA_BASE"
6527 "map": {"at": 167192, "to": "mm"},
6528 "name": "CB_COLOR3_BASE_EXT",
6529 "type_ref": "CB_COLOR0_BASE_EXT"
6533 "map": {"at": 167196, "to": "mm"},
6534 "name": "CB_COLOR3_ATTRIB2",
6535 "type_ref": "CB_COLOR0_ATTRIB2"
6539 "map": {"at": 167200, "to": "mm"},
6540 "name": "CB_COLOR3_VIEW",
6541 "type_ref": "CB_COLOR0_VIEW"
6545 "map": {"at": 167204, "to": "mm"},
6546 "name": "CB_COLOR3_INFO",
6547 "type_ref": "CB_COLOR0_INFO"
6551 "map": {"at": 167208, "to": "mm"},
6552 "name": "CB_COLOR3_ATTRIB",
6553 "type_ref": "CB_COLOR0_ATTRIB"
6557 "map": {"at": 167212, "to": "mm"},
6558 "name": "CB_COLOR3_DCC_CONTROL",
6559 "type_ref": "CB_COLOR0_DCC_CONTROL"
6563 "map": {"at": 167216, "to": "mm"},
6564 "name": "CB_COLOR3_CMASK",
6565 "type_ref": "DB_HTILE_DATA_BASE"
6569 "map": {"at": 167220, "to": "mm"},
6570 "name": "CB_COLOR3_CMASK_BASE_EXT",
6571 "type_ref": "CB_COLOR0_BASE_EXT"
6575 "map": {"at": 167224, "to": "mm"},
6576 "name": "CB_COLOR3_FMASK",
6577 "type_ref": "DB_HTILE_DATA_BASE"
6581 "map": {"at": 167228, "to": "mm"},
6582 "name": "CB_COLOR3_FMASK_BASE_EXT",
6583 "type_ref": "CB_COLOR0_BASE_EXT"
6587 "map": {"at": 167232, "to": "mm"},
6588 "name": "CB_COLOR3_CLEAR_WORD0",
6589 "type_ref": "CB_COLOR0_CLEAR_WORD0"
6593 "map": {"at": 167236, "to": "mm"},
6594 "name": "CB_COLOR3_CLEAR_WORD1",
6595 "type_ref": "CB_COLOR0_CLEAR_WORD1"
6599 "map": {"at": 167240, "to": "mm"},
6600 "name": "CB_COLOR3_DCC_BASE",
6601 "type_ref": "DB_HTILE_DATA_BASE"
6605 "map": {"at": 167244, "to": "mm"},
6606 "name": "CB_COLOR3_DCC_BASE_EXT",
6607 "type_ref": "CB_COLOR0_BASE_EXT"
6611 "map": {"at": 167248, "to": "mm"},
6612 "name": "CB_COLOR4_BASE",
6613 "type_ref": "DB_HTILE_DATA_BASE"
6617 "map": {"at": 167252, "to": "mm"},
6618 "name": "CB_COLOR4_BASE_EXT",
6619 "type_ref": "CB_COLOR0_BASE_EXT"
6623 "map": {"at": 167256, "to": "mm"},
6624 "name": "CB_COLOR4_ATTRIB2",
6625 "type_ref": "CB_COLOR0_ATTRIB2"
6629 "map": {"at": 167260, "to": "mm"},
6630 "name": "CB_COLOR4_VIEW",
6631 "type_ref": "CB_COLOR0_VIEW"
6635 "map": {"at": 167264, "to": "mm"},
6636 "name": "CB_COLOR4_INFO",
6637 "type_ref": "CB_COLOR0_INFO"
6641 "map": {"at": 167268, "to": "mm"},
6642 "name": "CB_COLOR4_ATTRIB",
6643 "type_ref": "CB_COLOR0_ATTRIB"
6647 "map": {"at": 167272, "to": "mm"},
6648 "name": "CB_COLOR4_DCC_CONTROL",
6649 "type_ref": "CB_COLOR0_DCC_CONTROL"
6653 "map": {"at": 167276, "to": "mm"},
6654 "name": "CB_COLOR4_CMASK",
6655 "type_ref": "DB_HTILE_DATA_BASE"
6659 "map": {"at": 167280, "to": "mm"},
6660 "name": "CB_COLOR4_CMASK_BASE_EXT",
6661 "type_ref": "CB_COLOR0_BASE_EXT"
6665 "map": {"at": 167284, "to": "mm"},
6666 "name": "CB_COLOR4_FMASK",
6667 "type_ref": "DB_HTILE_DATA_BASE"
6671 "map": {"at": 167288, "to": "mm"},
6672 "name": "CB_COLOR4_FMASK_BASE_EXT",
6673 "type_ref": "CB_COLOR0_BASE_EXT"
6677 "map": {"at": 167292, "to": "mm"},
6678 "name": "CB_COLOR4_CLEAR_WORD0",
6679 "type_ref": "CB_COLOR0_CLEAR_WORD0"
6683 "map": {"at": 167296, "to": "mm"},
6684 "name": "CB_COLOR4_CLEAR_WORD1",
6685 "type_ref": "CB_COLOR0_CLEAR_WORD1"
6689 "map": {"at": 167300, "to": "mm"},
6690 "name": "CB_COLOR4_DCC_BASE",
6691 "type_ref": "DB_HTILE_DATA_BASE"
6695 "map": {"at": 167304, "to": "mm"},
6696 "name": "CB_COLOR4_DCC_BASE_EXT",
6697 "type_ref": "CB_COLOR0_BASE_EXT"
6701 "map": {"at": 167308, "to": "mm"},
6702 "name": "CB_COLOR5_BASE",
6703 "type_ref": "DB_HTILE_DATA_BASE"
6707 "map": {"at": 167312, "to": "mm"},
6708 "name": "CB_COLOR5_BASE_EXT",
6709 "type_ref": "CB_COLOR0_BASE_EXT"
6713 "map": {"at": 167316, "to": "mm"},
6714 "name": "CB_COLOR5_ATTRIB2",
6715 "type_ref": "CB_COLOR0_ATTRIB2"
6719 "map": {"at": 167320, "to": "mm"},
6720 "name": "CB_COLOR5_VIEW",
6721 "type_ref": "CB_COLOR0_VIEW"
6725 "map": {"at": 167324, "to": "mm"},
6726 "name": "CB_COLOR5_INFO",
6727 "type_ref": "CB_COLOR0_INFO"
6731 "map": {"at": 167328, "to": "mm"},
6732 "name": "CB_COLOR5_ATTRIB",
6733 "type_ref": "CB_COLOR0_ATTRIB"
6737 "map": {"at": 167332, "to": "mm"},
6738 "name": "CB_COLOR5_DCC_CONTROL",
6739 "type_ref": "CB_COLOR0_DCC_CONTROL"
6743 "map": {"at": 167336, "to": "mm"},
6744 "name": "CB_COLOR5_CMASK",
6745 "type_ref": "DB_HTILE_DATA_BASE"
6749 "map": {"at": 167340, "to": "mm"},
6750 "name": "CB_COLOR5_CMASK_BASE_EXT",
6751 "type_ref": "CB_COLOR0_BASE_EXT"
6755 "map": {"at": 167344, "to": "mm"},
6756 "name": "CB_COLOR5_FMASK",
6757 "type_ref": "DB_HTILE_DATA_BASE"
6761 "map": {"at": 167348, "to": "mm"},
6762 "name": "CB_COLOR5_FMASK_BASE_EXT",
6763 "type_ref": "CB_COLOR0_BASE_EXT"
6767 "map": {"at": 167352, "to": "mm"},
6768 "name": "CB_COLOR5_CLEAR_WORD0",
6769 "type_ref": "CB_COLOR0_CLEAR_WORD0"
6773 "map": {"at": 167356, "to": "mm"},
6774 "name": "CB_COLOR5_CLEAR_WORD1",
6775 "type_ref": "CB_COLOR0_CLEAR_WORD1"
6779 "map": {"at": 167360, "to": "mm"},
6780 "name": "CB_COLOR5_DCC_BASE",
6781 "type_ref": "DB_HTILE_DATA_BASE"
6785 "map": {"at": 167364, "to": "mm"},
6786 "name": "CB_COLOR5_DCC_BASE_EXT",
6787 "type_ref": "CB_COLOR0_BASE_EXT"
6791 "map": {"at": 167368, "to": "mm"},
6792 "name": "CB_COLOR6_BASE",
6793 "type_ref": "DB_HTILE_DATA_BASE"
6797 "map": {"at": 167372, "to": "mm"},
6798 "name": "CB_COLOR6_BASE_EXT",
6799 "type_ref": "CB_COLOR0_BASE_EXT"
6803 "map": {"at": 167376, "to": "mm"},
6804 "name": "CB_COLOR6_ATTRIB2",
6805 "type_ref": "CB_COLOR0_ATTRIB2"
6809 "map": {"at": 167380, "to": "mm"},
6810 "name": "CB_COLOR6_VIEW",
6811 "type_ref": "CB_COLOR0_VIEW"
6815 "map": {"at": 167384, "to": "mm"},
6816 "name": "CB_COLOR6_INFO",
6817 "type_ref": "CB_COLOR0_INFO"
6821 "map": {"at": 167388, "to": "mm"},
6822 "name": "CB_COLOR6_ATTRIB",
6823 "type_ref": "CB_COLOR0_ATTRIB"
6827 "map": {"at": 167392, "to": "mm"},
6828 "name": "CB_COLOR6_DCC_CONTROL",
6829 "type_ref": "CB_COLOR0_DCC_CONTROL"
6833 "map": {"at": 167396, "to": "mm"},
6834 "name": "CB_COLOR6_CMASK",
6835 "type_ref": "DB_HTILE_DATA_BASE"
6839 "map": {"at": 167400, "to": "mm"},
6840 "name": "CB_COLOR6_CMASK_BASE_EXT",
6841 "type_ref": "CB_COLOR0_BASE_EXT"
6845 "map": {"at": 167404, "to": "mm"},
6846 "name": "CB_COLOR6_FMASK",
6847 "type_ref": "DB_HTILE_DATA_BASE"
6851 "map": {"at": 167408, "to": "mm"},
6852 "name": "CB_COLOR6_FMASK_BASE_EXT",
6853 "type_ref": "CB_COLOR0_BASE_EXT"
6857 "map": {"at": 167412, "to": "mm"},
6858 "name": "CB_COLOR6_CLEAR_WORD0",
6859 "type_ref": "CB_COLOR0_CLEAR_WORD0"
6863 "map": {"at": 167416, "to": "mm"},
6864 "name": "CB_COLOR6_CLEAR_WORD1",
6865 "type_ref": "CB_COLOR0_CLEAR_WORD1"
6869 "map": {"at": 167420, "to": "mm"},
6870 "name": "CB_COLOR6_DCC_BASE",
6871 "type_ref": "DB_HTILE_DATA_BASE"
6875 "map": {"at": 167424, "to": "mm"},
6876 "name": "CB_COLOR6_DCC_BASE_EXT",
6877 "type_ref": "CB_COLOR0_BASE_EXT"
6881 "map": {"at": 167428, "to": "mm"},
6882 "name": "CB_COLOR7_BASE",
6883 "type_ref": "DB_HTILE_DATA_BASE"
6887 "map": {"at": 167432, "to": "mm"},
6888 "name": "CB_COLOR7_BASE_EXT",
6889 "type_ref": "CB_COLOR0_BASE_EXT"
6893 "map": {"at": 167436, "to": "mm"},
6894 "name": "CB_COLOR7_ATTRIB2",
6895 "type_ref": "CB_COLOR0_ATTRIB2"
6899 "map": {"at": 167440, "to": "mm"},
6900 "name": "CB_COLOR7_VIEW",
6901 "type_ref": "CB_COLOR0_VIEW"
6905 "map": {"at": 167444, "to": "mm"},
6906 "name": "CB_COLOR7_INFO",
6907 "type_ref": "CB_COLOR0_INFO"
6911 "map": {"at": 167448, "to": "mm"},
6912 "name": "CB_COLOR7_ATTRIB",
6913 "type_ref": "CB_COLOR0_ATTRIB"
6917 "map": {"at": 167452, "to": "mm"},
6918 "name": "CB_COLOR7_DCC_CONTROL",
6919 "type_ref": "CB_COLOR0_DCC_CONTROL"
6923 "map": {"at": 167456, "to": "mm"},
6924 "name": "CB_COLOR7_CMASK",
6925 "type_ref": "DB_HTILE_DATA_BASE"
6929 "map": {"at": 167460, "to": "mm"},
6930 "name": "CB_COLOR7_CMASK_BASE_EXT",
6931 "type_ref": "CB_COLOR0_BASE_EXT"
6935 "map": {"at": 167464, "to": "mm"},
6936 "name": "CB_COLOR7_FMASK",
6937 "type_ref": "DB_HTILE_DATA_BASE"
6941 "map": {"at": 167468, "to": "mm"},
6942 "name": "CB_COLOR7_FMASK_BASE_EXT",
6943 "type_ref": "CB_COLOR0_BASE_EXT"
6947 "map": {"at": 167472, "to": "mm"},
6948 "name": "CB_COLOR7_CLEAR_WORD0",
6949 "type_ref": "CB_COLOR0_CLEAR_WORD0"
6953 "map": {"at": 167476, "to": "mm"},
6954 "name": "CB_COLOR7_CLEAR_WORD1",
6955 "type_ref": "CB_COLOR0_CLEAR_WORD1"
6959 "map": {"at": 167480, "to": "mm"},
6960 "name": "CB_COLOR7_DCC_BASE",
6961 "type_ref": "DB_HTILE_DATA_BASE"
6965 "map": {"at": 167484, "to": "mm"},
6966 "name": "CB_COLOR7_DCC_BASE_EXT",
6967 "type_ref": "CB_COLOR0_BASE_EXT"
6971 "map": {"at": 196608, "to": "mm"},
6972 "name": "CP_EOP_DONE_ADDR_LO",
6973 "type_ref": "CP_EOP_DONE_ADDR_LO"
6977 "map": {"at": 196612, "to": "mm"},
6978 "name": "CP_EOP_DONE_ADDR_HI",
6979 "type_ref": "CP_EOP_DONE_ADDR_HI"
6983 "map": {"at": 196616, "to": "mm"},
6984 "name": "CP_EOP_DONE_DATA_LO",
6985 "type_ref": "CP_EOP_DONE_DATA_LO"
6989 "map": {"at": 196620, "to": "mm"},
6990 "name": "CP_EOP_DONE_DATA_HI",
6991 "type_ref": "CP_EOP_DONE_DATA_HI"
6995 "map": {"at": 196624, "to": "mm"},
6996 "name": "CP_EOP_LAST_FENCE_LO",
6997 "type_ref": "CP_EOP_LAST_FENCE_LO"
7001 "map": {"at": 196628, "to": "mm"},
7002 "name": "CP_EOP_LAST_FENCE_HI",
7003 "type_ref": "CP_EOP_LAST_FENCE_HI"
7007 "map": {"at": 196632, "to": "mm"},
7008 "name": "CP_STREAM_OUT_ADDR_LO",
7009 "type_ref": "CP_STREAM_OUT_ADDR_LO"
7013 "map": {"at": 196636, "to": "mm"},
7014 "name": "CP_STREAM_OUT_ADDR_HI",
7015 "type_ref": "CP_STREAM_OUT_ADDR_HI"
7019 "map": {"at": 196640, "to": "mm"},
7020 "name": "CP_NUM_PRIM_WRITTEN_COUNT0_LO",
7021 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT0_LO"
7025 "map": {"at": 196644, "to": "mm"},
7026 "name": "CP_NUM_PRIM_WRITTEN_COUNT0_HI",
7027 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT0_HI"
7031 "map": {"at": 196648, "to": "mm"},
7032 "name": "CP_NUM_PRIM_NEEDED_COUNT0_LO",
7033 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT0_LO"
7037 "map": {"at": 196652, "to": "mm"},
7038 "name": "CP_NUM_PRIM_NEEDED_COUNT0_HI",
7039 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT0_HI"
7043 "map": {"at": 196656, "to": "mm"},
7044 "name": "CP_NUM_PRIM_WRITTEN_COUNT1_LO",
7045 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT1_LO"
7049 "map": {"at": 196660, "to": "mm"},
7050 "name": "CP_NUM_PRIM_WRITTEN_COUNT1_HI",
7051 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT1_HI"
7055 "map": {"at": 196664, "to": "mm"},
7056 "name": "CP_NUM_PRIM_NEEDED_COUNT1_LO",
7057 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT1_LO"
7061 "map": {"at": 196668, "to": "mm"},
7062 "name": "CP_NUM_PRIM_NEEDED_COUNT1_HI",
7063 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT1_HI"
7067 "map": {"at": 196672, "to": "mm"},
7068 "name": "CP_NUM_PRIM_WRITTEN_COUNT2_LO",
7069 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT2_LO"
7073 "map": {"at": 196676, "to": "mm"},
7074 "name": "CP_NUM_PRIM_WRITTEN_COUNT2_HI",
7075 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT2_HI"
7079 "map": {"at": 196680, "to": "mm"},
7080 "name": "CP_NUM_PRIM_NEEDED_COUNT2_LO",
7081 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT2_LO"
7085 "map": {"at": 196684, "to": "mm"},
7086 "name": "CP_NUM_PRIM_NEEDED_COUNT2_HI",
7087 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT2_HI"
7091 "map": {"at": 196688, "to": "mm"},
7092 "name": "CP_NUM_PRIM_WRITTEN_COUNT3_LO",
7093 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT3_LO"
7097 "map": {"at": 196692, "to": "mm"},
7098 "name": "CP_NUM_PRIM_WRITTEN_COUNT3_HI",
7099 "type_ref": "CP_NUM_PRIM_WRITTEN_COUNT3_HI"
7103 "map": {"at": 196696, "to": "mm"},
7104 "name": "CP_NUM_PRIM_NEEDED_COUNT3_LO",
7105 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT3_LO"
7109 "map": {"at": 196700, "to": "mm"},
7110 "name": "CP_NUM_PRIM_NEEDED_COUNT3_HI",
7111 "type_ref": "CP_NUM_PRIM_NEEDED_COUNT3_HI"
7115 "map": {"at": 196704, "to": "mm"},
7116 "name": "CP_PIPE_STATS_ADDR_LO",
7117 "type_ref": "CP_PIPE_STATS_ADDR_LO"
7121 "map": {"at": 196708, "to": "mm"},
7122 "name": "CP_PIPE_STATS_ADDR_HI",
7123 "type_ref": "CP_PIPE_STATS_ADDR_HI"
7127 "map": {"at": 196712, "to": "mm"},
7128 "name": "CP_VGT_IAVERT_COUNT_LO",
7129 "type_ref": "CP_VGT_IAVERT_COUNT_LO"
7133 "map": {"at": 196716, "to": "mm"},
7134 "name": "CP_VGT_IAVERT_COUNT_HI",
7135 "type_ref": "CP_VGT_IAVERT_COUNT_HI"
7139 "map": {"at": 196720, "to": "mm"},
7140 "name": "CP_VGT_IAPRIM_COUNT_LO",
7141 "type_ref": "CP_VGT_IAPRIM_COUNT_LO"
7145 "map": {"at": 196724, "to": "mm"},
7146 "name": "CP_VGT_IAPRIM_COUNT_HI",
7147 "type_ref": "CP_VGT_IAPRIM_COUNT_HI"
7151 "map": {"at": 196728, "to": "mm"},
7152 "name": "CP_VGT_GSPRIM_COUNT_LO",
7153 "type_ref": "CP_VGT_GSPRIM_COUNT_LO"
7157 "map": {"at": 196732, "to": "mm"},
7158 "name": "CP_VGT_GSPRIM_COUNT_HI",
7159 "type_ref": "CP_VGT_GSPRIM_COUNT_HI"
7163 "map": {"at": 196736, "to": "mm"},
7164 "name": "CP_VGT_VSINVOC_COUNT_LO",
7165 "type_ref": "CP_VGT_VSINVOC_COUNT_LO"
7169 "map": {"at": 196740, "to": "mm"},
7170 "name": "CP_VGT_VSINVOC_COUNT_HI",
7171 "type_ref": "CP_VGT_VSINVOC_COUNT_HI"
7175 "map": {"at": 196744, "to": "mm"},
7176 "name": "CP_VGT_GSINVOC_COUNT_LO",
7177 "type_ref": "CP_VGT_GSINVOC_COUNT_LO"
7181 "map": {"at": 196748, "to": "mm"},
7182 "name": "CP_VGT_GSINVOC_COUNT_HI",
7183 "type_ref": "CP_VGT_GSINVOC_COUNT_HI"
7187 "map": {"at": 196752, "to": "mm"},
7188 "name": "CP_VGT_HSINVOC_COUNT_LO",
7189 "type_ref": "CP_VGT_HSINVOC_COUNT_LO"
7193 "map": {"at": 196756, "to": "mm"},
7194 "name": "CP_VGT_HSINVOC_COUNT_HI",
7195 "type_ref": "CP_VGT_HSINVOC_COUNT_HI"
7199 "map": {"at": 196760, "to": "mm"},
7200 "name": "CP_VGT_DSINVOC_COUNT_LO",
7201 "type_ref": "CP_VGT_DSINVOC_COUNT_LO"
7205 "map": {"at": 196764, "to": "mm"},
7206 "name": "CP_VGT_DSINVOC_COUNT_HI",
7207 "type_ref": "CP_VGT_DSINVOC_COUNT_HI"
7211 "map": {"at": 196768, "to": "mm"},
7212 "name": "CP_PA_CINVOC_COUNT_LO",
7213 "type_ref": "CP_PA_CINVOC_COUNT_LO"
7217 "map": {"at": 196772, "to": "mm"},
7218 "name": "CP_PA_CINVOC_COUNT_HI",
7219 "type_ref": "CP_PA_CINVOC_COUNT_HI"
7223 "map": {"at": 196776, "to": "mm"},
7224 "name": "CP_PA_CPRIM_COUNT_LO",
7225 "type_ref": "CP_PA_CPRIM_COUNT_LO"
7229 "map": {"at": 196780, "to": "mm"},
7230 "name": "CP_PA_CPRIM_COUNT_HI",
7231 "type_ref": "CP_PA_CPRIM_COUNT_HI"
7235 "map": {"at": 196784, "to": "mm"},
7236 "name": "CP_SC_PSINVOC_COUNT0_LO",
7237 "type_ref": "CP_SC_PSINVOC_COUNT0_LO"
7241 "map": {"at": 196788, "to": "mm"},
7242 "name": "CP_SC_PSINVOC_COUNT0_HI",
7243 "type_ref": "CP_SC_PSINVOC_COUNT0_HI"
7247 "map": {"at": 196792, "to": "mm"},
7248 "name": "CP_SC_PSINVOC_COUNT1_LO",
7249 "type_ref": "CP_SC_PSINVOC_COUNT1_LO"
7253 "map": {"at": 196796, "to": "mm"},
7254 "name": "CP_SC_PSINVOC_COUNT1_HI",
7255 "type_ref": "CP_SC_PSINVOC_COUNT1_LO"
7259 "map": {"at": 196800, "to": "mm"},
7260 "name": "CP_VGT_CSINVOC_COUNT_LO",
7261 "type_ref": "CP_VGT_CSINVOC_COUNT_LO"
7265 "map": {"at": 196804, "to": "mm"},
7266 "name": "CP_VGT_CSINVOC_COUNT_HI",
7267 "type_ref": "CP_VGT_CSINVOC_COUNT_HI"
7271 "map": {"at": 196852, "to": "mm"},
7272 "name": "CP_PIPE_STATS_CONTROL",
7273 "type_ref": "CP_PIPE_STATS_CONTROL"
7277 "map": {"at": 196856, "to": "mm"},
7278 "name": "CP_STREAM_OUT_CONTROL",
7279 "type_ref": "CP_PIPE_STATS_CONTROL"
7283 "map": {"at": 196860, "to": "mm"},
7284 "name": "CP_STRMOUT_CNTL",
7285 "type_ref": "CP_STRMOUT_CNTL"
7289 "map": {"at": 196864, "to": "mm"},
7290 "name": "SCRATCH_REG0",
7291 "type_ref": "SCRATCH_REG0"
7295 "map": {"at": 196868, "to": "mm"},
7296 "name": "SCRATCH_REG1",
7297 "type_ref": "SCRATCH_REG1"
7301 "map": {"at": 196872, "to": "mm"},
7302 "name": "SCRATCH_REG2",
7303 "type_ref": "SCRATCH_REG2"
7307 "map": {"at": 196876, "to": "mm"},
7308 "name": "SCRATCH_REG3",
7309 "type_ref": "SCRATCH_REG3"
7313 "map": {"at": 196880, "to": "mm"},
7314 "name": "SCRATCH_REG4",
7315 "type_ref": "SCRATCH_REG4"
7319 "map": {"at": 196884, "to": "mm"},
7320 "name": "SCRATCH_REG5",
7321 "type_ref": "SCRATCH_REG5"
7325 "map": {"at": 196888, "to": "mm"},
7326 "name": "SCRATCH_REG6",
7327 "type_ref": "SCRATCH_REG6"
7331 "map": {"at": 196892, "to": "mm"},
7332 "name": "SCRATCH_REG7",
7333 "type_ref": "SCRATCH_REG7"
7337 "map": {"at": 196912, "to": "mm"},
7338 "name": "CP_APPEND_DATA_HI",
7339 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
7343 "map": {"at": 196916, "to": "mm"},
7344 "name": "CP_APPEND_LAST_CS_FENCE_HI",
7345 "type_ref": "CP_APPEND_LAST_CS_FENCE_HI"
7349 "map": {"at": 196920, "to": "mm"},
7350 "name": "CP_APPEND_LAST_PS_FENCE_HI",
7351 "type_ref": "CP_APPEND_LAST_CS_FENCE_HI"
7355 "map": {"at": 196928, "to": "mm"},
7356 "name": "SCRATCH_UMSK",
7357 "type_ref": "SCRATCH_UMSK"
7361 "map": {"at": 196932, "to": "mm"},
7362 "name": "SCRATCH_ADDR",
7363 "type_ref": "SCRATCH_ADDR"
7367 "map": {"at": 196936, "to": "mm"},
7368 "name": "CP_PFP_ATOMIC_PREOP_LO",
7369 "type_ref": "CP_PFP_ATOMIC_PREOP_LO"
7373 "map": {"at": 196940, "to": "mm"},
7374 "name": "CP_PFP_ATOMIC_PREOP_HI",
7375 "type_ref": "CP_PFP_ATOMIC_PREOP_HI"
7379 "map": {"at": 196944, "to": "mm"},
7380 "name": "CP_PFP_GDS_ATOMIC0_PREOP_LO",
7381 "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
7385 "map": {"at": 196948, "to": "mm"},
7386 "name": "CP_PFP_GDS_ATOMIC0_PREOP_HI",
7387 "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
7391 "map": {"at": 196952, "to": "mm"},
7392 "name": "CP_PFP_GDS_ATOMIC1_PREOP_LO",
7393 "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
7397 "map": {"at": 196956, "to": "mm"},
7398 "name": "CP_PFP_GDS_ATOMIC1_PREOP_HI",
7399 "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
7403 "map": {"at": 196960, "to": "mm"},
7404 "name": "CP_APPEND_ADDR_LO",
7405 "type_ref": "CP_APPEND_ADDR_LO"
7409 "map": {"at": 196964, "to": "mm"},
7410 "name": "CP_APPEND_ADDR_HI",
7411 "type_ref": "CP_APPEND_ADDR_HI"
7415 "map": {"at": 196968, "to": "mm"},
7416 "name": "CP_APPEND_DATA_LO",
7417 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
7421 "map": {"at": 196972, "to": "mm"},
7422 "name": "CP_APPEND_LAST_CS_FENCE_LO",
7423 "type_ref": "CP_APPEND_LAST_CS_FENCE_HI"
7427 "map": {"at": 196976, "to": "mm"},
7428 "name": "CP_APPEND_LAST_PS_FENCE_LO",
7429 "type_ref": "CP_APPEND_LAST_CS_FENCE_HI"
7433 "map": {"at": 196980, "to": "mm"},
7434 "name": "CP_ATOMIC_PREOP_LO",
7435 "type_ref": "CP_PFP_ATOMIC_PREOP_LO"
7439 "map": {"at": 196984, "to": "mm"},
7440 "name": "CP_ATOMIC_PREOP_HI",
7441 "type_ref": "CP_PFP_ATOMIC_PREOP_HI"
7445 "map": {"at": 196988, "to": "mm"},
7446 "name": "CP_GDS_ATOMIC0_PREOP_LO",
7447 "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_LO"
7451 "map": {"at": 196992, "to": "mm"},
7452 "name": "CP_GDS_ATOMIC0_PREOP_HI",
7453 "type_ref": "CP_PFP_GDS_ATOMIC0_PREOP_HI"
7457 "map": {"at": 196996, "to": "mm"},
7458 "name": "CP_GDS_ATOMIC1_PREOP_LO",
7459 "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_LO"
7463 "map": {"at": 197000, "to": "mm"},
7464 "name": "CP_GDS_ATOMIC1_PREOP_HI",
7465 "type_ref": "CP_PFP_GDS_ATOMIC1_PREOP_HI"
7469 "map": {"at": 197028, "to": "mm"},
7470 "name": "CP_ME_MC_WADDR_LO",
7471 "type_ref": "CP_ME_MC_WADDR_LO"
7475 "map": {"at": 197032, "to": "mm"},
7476 "name": "CP_ME_MC_WADDR_HI",
7477 "type_ref": "CP_ME_MC_WADDR_HI"
7481 "map": {"at": 197036, "to": "mm"},
7482 "name": "CP_ME_MC_WDATA_LO",
7483 "type_ref": "CP_ME_MC_WDATA_LO"
7487 "map": {"at": 197040, "to": "mm"},
7488 "name": "CP_ME_MC_WDATA_HI",
7489 "type_ref": "CP_ME_MC_WDATA_HI"
7493 "map": {"at": 197044, "to": "mm"},
7494 "name": "CP_ME_MC_RADDR_LO",
7495 "type_ref": "CP_ME_MC_RADDR_LO"
7499 "map": {"at": 197048, "to": "mm"},
7500 "name": "CP_ME_MC_RADDR_HI",
7501 "type_ref": "CP_ME_MC_RADDR_HI"
7505 "map": {"at": 197052, "to": "mm"},
7506 "name": "CP_SEM_WAIT_TIMER",
7507 "type_ref": "CP_SEM_WAIT_TIMER"
7511 "map": {"at": 197056, "to": "mm"},
7512 "name": "CP_SIG_SEM_ADDR_LO",
7513 "type_ref": "CP_SIG_SEM_ADDR_LO"
7517 "map": {"at": 197060, "to": "mm"},
7518 "name": "CP_SIG_SEM_ADDR_HI",
7519 "type_ref": "CP_SIG_SEM_ADDR_HI"
7523 "map": {"at": 197072, "to": "mm"},
7524 "name": "CP_WAIT_REG_MEM_TIMEOUT",
7525 "type_ref": "CP_WAIT_REG_MEM_TIMEOUT"
7529 "map": {"at": 197076, "to": "mm"},
7530 "name": "CP_WAIT_SEM_ADDR_LO",
7531 "type_ref": "CP_SIG_SEM_ADDR_LO"
7535 "map": {"at": 197080, "to": "mm"},
7536 "name": "CP_WAIT_SEM_ADDR_HI",
7537 "type_ref": "CP_SIG_SEM_ADDR_HI"
7541 "map": {"at": 197084, "to": "mm"},
7542 "name": "CP_DMA_PFP_CONTROL",
7543 "type_ref": "CP_DMA_PFP_CONTROL"
7547 "map": {"at": 197088, "to": "mm"},
7548 "name": "CP_DMA_ME_CONTROL",
7549 "type_ref": "CP_DMA_PFP_CONTROL"
7553 "map": {"at": 197092, "to": "mm"},
7554 "name": "CP_COHER_BASE_HI",
7555 "type_ref": "CP_COHER_BASE_HI"
7559 "map": {"at": 197100, "to": "mm"},
7560 "name": "CP_COHER_START_DELAY",
7561 "type_ref": "CP_COHER_START_DELAY"
7565 "map": {"at": 197104, "to": "mm"},
7566 "name": "CP_COHER_CNTL",
7567 "type_ref": "CP_COHER_CNTL"
7571 "map": {"at": 197108, "to": "mm"},
7572 "name": "CP_COHER_SIZE",
7573 "type_ref": "CP_COHER_SIZE"
7577 "map": {"at": 197112, "to": "mm"},
7578 "name": "CP_COHER_BASE",
7579 "type_ref": "CP_COHER_BASE"
7583 "map": {"at": 197116, "to": "mm"},
7584 "name": "CP_COHER_STATUS",
7585 "type_ref": "CP_COHER_STATUS"
7589 "map": {"at": 197120, "to": "mm"},
7590 "name": "CP_DMA_ME_SRC_ADDR",
7591 "type_ref": "CP_DMA_ME_SRC_ADDR"
7595 "map": {"at": 197124, "to": "mm"},
7596 "name": "CP_DMA_ME_SRC_ADDR_HI",
7597 "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
7601 "map": {"at": 197128, "to": "mm"},
7602 "name": "CP_DMA_ME_DST_ADDR",
7603 "type_ref": "CP_DMA_ME_DST_ADDR"
7607 "map": {"at": 197132, "to": "mm"},
7608 "name": "CP_DMA_ME_DST_ADDR_HI",
7609 "type_ref": "CP_DMA_ME_DST_ADDR_HI"
7613 "map": {"at": 197136, "to": "mm"},
7614 "name": "CP_DMA_ME_COMMAND",
7615 "type_ref": "CP_DMA_ME_COMMAND"
7619 "map": {"at": 197140, "to": "mm"},
7620 "name": "CP_DMA_PFP_SRC_ADDR",
7621 "type_ref": "CP_DMA_ME_SRC_ADDR"
7625 "map": {"at": 197144, "to": "mm"},
7626 "name": "CP_DMA_PFP_SRC_ADDR_HI",
7627 "type_ref": "CP_DMA_ME_SRC_ADDR_HI"
7631 "map": {"at": 197148, "to": "mm"},
7632 "name": "CP_DMA_PFP_DST_ADDR",
7633 "type_ref": "CP_DMA_ME_DST_ADDR"
7637 "map": {"at": 197152, "to": "mm"},
7638 "name": "CP_DMA_PFP_DST_ADDR_HI",
7639 "type_ref": "CP_DMA_ME_DST_ADDR_HI"
7643 "map": {"at": 197156, "to": "mm"},
7644 "name": "CP_DMA_PFP_COMMAND",
7645 "type_ref": "CP_DMA_ME_COMMAND"
7649 "map": {"at": 197160, "to": "mm"},
7650 "name": "CP_DMA_CNTL",
7651 "type_ref": "CP_DMA_CNTL"
7655 "map": {"at": 197164, "to": "mm"},
7656 "name": "CP_DMA_READ_TAGS",
7657 "type_ref": "CP_DMA_READ_TAGS"
7661 "map": {"at": 197168, "to": "mm"},
7662 "name": "CP_COHER_SIZE_HI",
7663 "type_ref": "CP_COHER_SIZE_HI"
7667 "map": {"at": 197172, "to": "mm"},
7668 "name": "CP_PFP_IB_CONTROL",
7669 "type_ref": "CP_PFP_IB_CONTROL"
7673 "map": {"at": 197176, "to": "mm"},
7674 "name": "CP_PFP_LOAD_CONTROL",
7675 "type_ref": "CP_PFP_LOAD_CONTROL"
7679 "map": {"at": 197180, "to": "mm"},
7680 "name": "CP_SCRATCH_INDEX",
7681 "type_ref": "CP_SCRATCH_INDEX"
7685 "map": {"at": 197184, "to": "mm"},
7686 "name": "CP_SCRATCH_DATA",
7687 "type_ref": "CP_CPC_SCRATCH_DATA"
7691 "map": {"at": 197188, "to": "mm"},
7692 "name": "CP_RB_OFFSET",
7693 "type_ref": "CP_RB_OFFSET"
7697 "map": {"at": 197192, "to": "mm"},
7698 "name": "CP_IB1_OFFSET",
7699 "type_ref": "CP_IB1_OFFSET"
7703 "map": {"at": 197196, "to": "mm"},
7704 "name": "CP_IB2_OFFSET",
7705 "type_ref": "CP_IB2_OFFSET"
7709 "map": {"at": 197200, "to": "mm"},
7710 "name": "CP_IB1_PREAMBLE_BEGIN",
7711 "type_ref": "CP_IB1_PREAMBLE_BEGIN"
7715 "map": {"at": 197204, "to": "mm"},
7716 "name": "CP_IB1_PREAMBLE_END",
7717 "type_ref": "CP_IB1_PREAMBLE_END"
7721 "map": {"at": 197208, "to": "mm"},
7722 "name": "CP_IB2_PREAMBLE_BEGIN",
7723 "type_ref": "CP_IB2_PREAMBLE_BEGIN"
7727 "map": {"at": 197212, "to": "mm"},
7728 "name": "CP_IB2_PREAMBLE_END",
7729 "type_ref": "CP_IB2_PREAMBLE_END"
7733 "map": {"at": 197216, "to": "mm"},
7734 "name": "CP_CE_IB1_OFFSET",
7735 "type_ref": "CP_IB1_OFFSET"
7739 "map": {"at": 197220, "to": "mm"},
7740 "name": "CP_CE_IB2_OFFSET",
7741 "type_ref": "CP_IB2_OFFSET"
7745 "map": {"at": 197224, "to": "mm"},
7746 "name": "CP_CE_COUNTER",
7747 "type_ref": "CP_CE_COUNTER"
7751 "map": {"at": 197228, "to": "mm"},
7752 "name": "CP_CE_RB_OFFSET",
7753 "type_ref": "CP_RB_OFFSET"
7757 "map": {"at": 197364, "to": "mm"},
7758 "name": "CP_CE_INIT_CMD_BUFSZ",
7759 "type_ref": "CP_CE_INIT_CMD_BUFSZ"
7763 "map": {"at": 197368, "to": "mm"},
7764 "name": "CP_CE_IB1_CMD_BUFSZ",
7765 "type_ref": "CP_CE_IB1_CMD_BUFSZ"
7769 "map": {"at": 197372, "to": "mm"},
7770 "name": "CP_CE_IB2_CMD_BUFSZ",
7771 "type_ref": "CP_CE_IB2_CMD_BUFSZ"
7775 "map": {"at": 197376, "to": "mm"},
7776 "name": "CP_IB1_CMD_BUFSZ",
7777 "type_ref": "CP_CE_IB1_CMD_BUFSZ"
7781 "map": {"at": 197380, "to": "mm"},
7782 "name": "CP_IB2_CMD_BUFSZ",
7783 "type_ref": "CP_CE_IB2_CMD_BUFSZ"
7787 "map": {"at": 197384, "to": "mm"},
7788 "name": "CP_ST_CMD_BUFSZ",
7789 "type_ref": "CP_ST_CMD_BUFSZ"
7793 "map": {"at": 197388, "to": "mm"},
7794 "name": "CP_CE_INIT_BASE_LO",
7795 "type_ref": "CP_CE_INIT_BASE_LO"
7799 "map": {"at": 197392, "to": "mm"},
7800 "name": "CP_CE_INIT_BASE_HI",
7801 "type_ref": "CP_CE_INIT_BASE_HI"
7805 "map": {"at": 197396, "to": "mm"},
7806 "name": "CP_CE_INIT_BUFSZ",
7807 "type_ref": "CP_CE_INIT_BUFSZ"
7811 "map": {"at": 197400, "to": "mm"},
7812 "name": "CP_CE_IB1_BASE_LO",
7813 "type_ref": "CP_CE_IB1_BASE_LO"
7817 "map": {"at": 197404, "to": "mm"},
7818 "name": "CP_CE_IB1_BASE_HI",
7819 "type_ref": "CP_CE_IB1_BASE_HI"
7823 "map": {"at": 197408, "to": "mm"},
7824 "name": "CP_CE_IB1_BUFSZ",
7825 "type_ref": "CP_CE_IB1_BUFSZ"
7829 "map": {"at": 197412, "to": "mm"},
7830 "name": "CP_CE_IB2_BASE_LO",
7831 "type_ref": "CP_CE_IB2_BASE_LO"
7835 "map": {"at": 197416, "to": "mm"},
7836 "name": "CP_CE_IB2_BASE_HI",
7837 "type_ref": "CP_CE_IB2_BASE_HI"
7841 "map": {"at": 197420, "to": "mm"},
7842 "name": "CP_CE_IB2_BUFSZ",
7843 "type_ref": "CP_CE_IB2_BUFSZ"
7847 "map": {"at": 197424, "to": "mm"},
7848 "name": "CP_IB1_BASE_LO",
7849 "type_ref": "CP_CE_IB1_BASE_LO"
7853 "map": {"at": 197428, "to": "mm"},
7854 "name": "CP_IB1_BASE_HI",
7855 "type_ref": "CP_CE_IB1_BASE_HI"
7859 "map": {"at": 197432, "to": "mm"},
7860 "name": "CP_IB1_BUFSZ",
7861 "type_ref": "CP_CE_IB1_BUFSZ"
7865 "map": {"at": 197436, "to": "mm"},
7866 "name": "CP_IB2_BASE_LO",
7867 "type_ref": "CP_CE_IB2_BASE_LO"
7871 "map": {"at": 197440, "to": "mm"},
7872 "name": "CP_IB2_BASE_HI",
7873 "type_ref": "CP_CE_IB2_BASE_HI"
7877 "map": {"at": 197444, "to": "mm"},
7878 "name": "CP_IB2_BUFSZ",
7879 "type_ref": "CP_CE_IB2_BUFSZ"
7883 "map": {"at": 197448, "to": "mm"},
7884 "name": "CP_ST_BASE_LO",
7885 "type_ref": "CP_ST_BASE_LO"
7889 "map": {"at": 197452, "to": "mm"},
7890 "name": "CP_ST_BASE_HI",
7891 "type_ref": "CP_ST_BASE_HI"
7895 "map": {"at": 197456, "to": "mm"},
7896 "name": "CP_ST_BUFSZ",
7897 "type_ref": "CP_ST_BUFSZ"
7901 "map": {"at": 197460, "to": "mm"},
7902 "name": "CP_EOP_DONE_EVENT_CNTL",
7903 "type_ref": "CP_EOP_DONE_EVENT_CNTL"
7907 "map": {"at": 197464, "to": "mm"},
7908 "name": "CP_EOP_DONE_DATA_CNTL",
7909 "type_ref": "CP_EOP_DONE_DATA_CNTL"
7913 "map": {"at": 197468, "to": "mm"},
7914 "name": "CP_EOP_DONE_CNTX_ID",
7915 "type_ref": "CP_EOP_DONE_CNTX_ID"
7919 "map": {"at": 197552, "to": "mm"},
7920 "name": "CP_PFP_COMPLETION_STATUS",
7921 "type_ref": "CP_PFP_COMPLETION_STATUS"
7925 "map": {"at": 197556, "to": "mm"},
7926 "name": "CP_CE_COMPLETION_STATUS",
7927 "type_ref": "CP_PFP_COMPLETION_STATUS"
7931 "map": {"at": 197560, "to": "mm"},
7932 "name": "CP_PRED_NOT_VISIBLE",
7933 "type_ref": "CP_PRED_NOT_VISIBLE"
7937 "map": {"at": 197568, "to": "mm"},
7938 "name": "CP_PFP_METADATA_BASE_ADDR",
7939 "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7943 "map": {"at": 197572, "to": "mm"},
7944 "name": "CP_PFP_METADATA_BASE_ADDR_HI",
7945 "type_ref": "CP_EOP_DONE_ADDR_HI"
7949 "map": {"at": 197576, "to": "mm"},
7950 "name": "CP_CE_METADATA_BASE_ADDR",
7951 "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7955 "map": {"at": 197580, "to": "mm"},
7956 "name": "CP_CE_METADATA_BASE_ADDR_HI",
7957 "type_ref": "CP_EOP_DONE_ADDR_HI"
7961 "map": {"at": 197584, "to": "mm"},
7962 "name": "CP_DRAW_INDX_INDR_ADDR",
7963 "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7967 "map": {"at": 197588, "to": "mm"},
7968 "name": "CP_DRAW_INDX_INDR_ADDR_HI",
7969 "type_ref": "CP_EOP_DONE_ADDR_HI"
7973 "map": {"at": 197592, "to": "mm"},
7974 "name": "CP_DISPATCH_INDR_ADDR",
7975 "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7979 "map": {"at": 197596, "to": "mm"},
7980 "name": "CP_DISPATCH_INDR_ADDR_HI",
7981 "type_ref": "CP_EOP_DONE_ADDR_HI"
7985 "map": {"at": 197600, "to": "mm"},
7986 "name": "CP_INDEX_BASE_ADDR",
7987 "type_ref": "CP_PFP_METADATA_BASE_ADDR"
7991 "map": {"at": 197604, "to": "mm"},
7992 "name": "CP_INDEX_BASE_ADDR_HI",
7993 "type_ref": "CP_EOP_DONE_ADDR_HI"
7997 "map": {"at": 197608, "to": "mm"},
7998 "name": "CP_INDEX_TYPE",
7999 "type_ref": "CP_INDEX_TYPE"
8003 "map": {"at": 197612, "to": "mm"},
8004 "name": "CP_GDS_BKUP_ADDR",
8005 "type_ref": "CP_PFP_METADATA_BASE_ADDR"
8009 "map": {"at": 197616, "to": "mm"},
8010 "name": "CP_GDS_BKUP_ADDR_HI",
8011 "type_ref": "CP_EOP_DONE_ADDR_HI"
8015 "map": {"at": 197620, "to": "mm"},
8016 "name": "CP_SAMPLE_STATUS",
8017 "type_ref": "CP_SAMPLE_STATUS"
8021 "map": {"at": 197624, "to": "mm"},
8022 "name": "CP_ME_COHER_CNTL",
8023 "type_ref": "CP_ME_COHER_CNTL"
8027 "map": {"at": 197628, "to": "mm"},
8028 "name": "CP_ME_COHER_SIZE",
8029 "type_ref": "CP_COHER_SIZE"
8033 "map": {"at": 197632, "to": "mm"},
8034 "name": "CP_ME_COHER_SIZE_HI",
8035 "type_ref": "CP_COHER_SIZE_HI"
8039 "map": {"at": 197636, "to": "mm"},
8040 "name": "CP_ME_COHER_BASE",
8041 "type_ref": "CP_COHER_BASE"
8045 "map": {"at": 197640, "to": "mm"},
8046 "name": "CP_ME_COHER_BASE_HI",
8047 "type_ref": "CP_COHER_BASE_HI"
8051 "map": {"at": 197644, "to": "mm"},
8052 "name": "CP_ME_COHER_STATUS",
8053 "type_ref": "CP_ME_COHER_STATUS"
8057 "map": {"at": 197888, "to": "mm"},
8058 "name": "RLC_GPM_PERF_COUNT_0",
8059 "type_ref": "RLC_GPM_PERF_COUNT_0"
8063 "map": {"at": 197892, "to": "mm"},
8064 "name": "RLC_GPM_PERF_COUNT_1",
8065 "type_ref": "RLC_GPM_PERF_COUNT_0"
8069 "map": {"at": 198656, "to": "mm"},
8070 "name": "GRBM_GFX_INDEX",
8071 "type_ref": "GRBM_GFX_INDEX"
8075 "map": {"at": 198916, "to": "mm"},
8076 "name": "VGT_GSVS_RING_SIZE",
8077 "type_ref": "VGT_GSVS_RING_SIZE"
8081 "map": {"at": 198920, "to": "mm"},
8082 "name": "VGT_PRIMITIVE_TYPE",
8083 "type_ref": "VGT_PRIMITIVE_TYPE"
8087 "map": {"at": 198924, "to": "mm"},
8088 "name": "VGT_INDEX_TYPE",
8089 "type_ref": "VGT_INDEX_TYPE"
8093 "map": {"at": 198928, "to": "mm"},
8094 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_0",
8095 "type_ref": "COMPUTE_DIM_X"
8099 "map": {"at": 198932, "to": "mm"},
8100 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_1",
8101 "type_ref": "COMPUTE_DIM_X"
8105 "map": {"at": 198936, "to": "mm"},
8106 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_2",
8107 "type_ref": "COMPUTE_DIM_X"
8111 "map": {"at": 198940, "to": "mm"},
8112 "name": "VGT_STRMOUT_BUFFER_FILLED_SIZE_3",
8113 "type_ref": "COMPUTE_DIM_X"
8117 "map": {"at": 198944, "to": "mm"},
8118 "name": "VGT_MAX_VTX_INDX",
8119 "type_ref": "VGT_MAX_VTX_INDX"
8123 "map": {"at": 198948, "to": "mm"},
8124 "name": "VGT_MIN_VTX_INDX",
8125 "type_ref": "VGT_MIN_VTX_INDX"
8129 "map": {"at": 198952, "to": "mm"},
8130 "name": "VGT_INDX_OFFSET",
8131 "type_ref": "VGT_INDX_OFFSET"
8135 "map": {"at": 198956, "to": "mm"},
8136 "name": "VGT_MULTI_PRIM_IB_RESET_EN",
8137 "type_ref": "VGT_MULTI_PRIM_IB_RESET_EN"
8141 "map": {"at": 198960, "to": "mm"},
8142 "name": "VGT_NUM_INDICES",
8143 "type_ref": "VGT_DMA_SIZE"
8147 "map": {"at": 198964, "to": "mm"},
8148 "name": "VGT_NUM_INSTANCES",
8149 "type_ref": "VGT_DMA_NUM_INSTANCES"
8153 "map": {"at": 198968, "to": "mm"},
8154 "name": "VGT_TF_RING_SIZE",
8155 "type_ref": "VGT_TF_RING_SIZE"
8159 "map": {"at": 198972, "to": "mm"},
8160 "name": "VGT_HS_OFFCHIP_PARAM",
8161 "type_ref": "VGT_HS_OFFCHIP_PARAM"
8165 "map": {"at": 198976, "to": "mm"},
8166 "name": "VGT_TF_MEMORY_BASE",
8167 "type_ref": "VGT_TF_MEMORY_BASE"
8171 "map": {"at": 198980, "to": "mm"},
8172 "name": "VGT_TF_MEMORY_BASE_HI",
8173 "type_ref": "DB_HTILE_DATA_BASE_HI"
8177 "map": {"at": 198984, "to": "mm"},
8178 "name": "WD_POS_BUF_BASE",
8179 "type_ref": "VGT_TF_MEMORY_BASE"
8183 "map": {"at": 198988, "to": "mm"},
8184 "name": "WD_POS_BUF_BASE_HI",
8185 "type_ref": "DB_HTILE_DATA_BASE_HI"
8189 "map": {"at": 198992, "to": "mm"},
8190 "name": "WD_CNTL_SB_BUF_BASE",
8191 "type_ref": "VGT_TF_MEMORY_BASE"
8195 "map": {"at": 198996, "to": "mm"},
8196 "name": "WD_CNTL_SB_BUF_BASE_HI",
8197 "type_ref": "DB_HTILE_DATA_BASE_HI"
8201 "map": {"at": 199000, "to": "mm"},
8202 "name": "WD_INDEX_BUF_BASE",
8203 "type_ref": "VGT_TF_MEMORY_BASE"
8207 "map": {"at": 199004, "to": "mm"},
8208 "name": "WD_INDEX_BUF_BASE_HI",
8209 "type_ref": "DB_HTILE_DATA_BASE_HI"
8213 "map": {"at": 199008, "to": "mm"},
8214 "name": "IA_MULTI_VGT_PARAM",
8215 "type_ref": "IA_MULTI_VGT_PARAM"
8219 "map": {"at": 199016, "to": "mm"},
8220 "name": "VGT_INSTANCE_BASE_ID",
8221 "type_ref": "VGT_INSTANCE_BASE_ID"
8225 "map": {"at": 199168, "to": "mm"},
8226 "name": "PA_SU_LINE_STIPPLE_VALUE",
8227 "type_ref": "PA_SU_LINE_STIPPLE_VALUE"
8231 "map": {"at": 199172, "to": "mm"},
8232 "name": "PA_SC_LINE_STIPPLE_STATE",
8233 "type_ref": "PA_SC_LINE_STIPPLE_STATE"
8237 "map": {"at": 199184, "to": "mm"},
8238 "name": "PA_SC_SCREEN_EXTENT_MIN_0",
8239 "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
8243 "map": {"at": 199188, "to": "mm"},
8244 "name": "PA_SC_SCREEN_EXTENT_MAX_0",
8245 "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
8249 "map": {"at": 199192, "to": "mm"},
8250 "name": "PA_SC_SCREEN_EXTENT_MIN_1",
8251 "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
8255 "map": {"at": 199212, "to": "mm"},
8256 "name": "PA_SC_SCREEN_EXTENT_MAX_1",
8257 "type_ref": "PA_SC_SCREEN_EXTENT_MIN_0"
8261 "map": {"at": 199296, "to": "mm"},
8262 "name": "PA_SC_P3D_TRAP_SCREEN_HV_EN",
8263 "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
8267 "map": {"at": 199300, "to": "mm"},
8268 "name": "PA_SC_P3D_TRAP_SCREEN_H",
8269 "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
8273 "map": {"at": 199304, "to": "mm"},
8274 "name": "PA_SC_P3D_TRAP_SCREEN_V",
8275 "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
8279 "map": {"at": 199308, "to": "mm"},
8280 "name": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE",
8281 "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
8285 "map": {"at": 199312, "to": "mm"},
8286 "name": "PA_SC_P3D_TRAP_SCREEN_COUNT",
8287 "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
8291 "map": {"at": 199328, "to": "mm"},
8292 "name": "PA_SC_HP3D_TRAP_SCREEN_HV_EN",
8293 "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
8297 "map": {"at": 199332, "to": "mm"},
8298 "name": "PA_SC_HP3D_TRAP_SCREEN_H",
8299 "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
8303 "map": {"at": 199336, "to": "mm"},
8304 "name": "PA_SC_HP3D_TRAP_SCREEN_V",
8305 "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
8309 "map": {"at": 199340, "to": "mm"},
8310 "name": "PA_SC_HP3D_TRAP_SCREEN_OCCURRENCE",
8311 "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
8315 "map": {"at": 199344, "to": "mm"},
8316 "name": "PA_SC_HP3D_TRAP_SCREEN_COUNT",
8317 "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
8321 "map": {"at": 199360, "to": "mm"},
8322 "name": "PA_SC_TRAP_SCREEN_HV_EN",
8323 "type_ref": "PA_SC_P3D_TRAP_SCREEN_HV_EN"
8327 "map": {"at": 199364, "to": "mm"},
8328 "name": "PA_SC_TRAP_SCREEN_H",
8329 "type_ref": "PA_SC_P3D_TRAP_SCREEN_H"
8333 "map": {"at": 199368, "to": "mm"},
8334 "name": "PA_SC_TRAP_SCREEN_V",
8335 "type_ref": "PA_SC_P3D_TRAP_SCREEN_V"
8339 "map": {"at": 199372, "to": "mm"},
8340 "name": "PA_SC_TRAP_SCREEN_OCCURRENCE",
8341 "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
8345 "map": {"at": 199376, "to": "mm"},
8346 "name": "PA_SC_TRAP_SCREEN_COUNT",
8347 "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
8351 "map": {"at": 199380, "to": "mm"},
8352 "name": "PA_STATE_STEREO_X",
8353 "type_ref": "PA_STATE_STEREO_X"
8357 "map": {"at": 199872, "to": "mm"},
8358 "name": "SQ_THREAD_TRACE_BASE",
8359 "type_ref": "COMPUTE_WAVE_RESTORE_ADDR_LO"
8363 "map": {"at": 199876, "to": "mm"},
8364 "name": "SQ_THREAD_TRACE_SIZE",
8365 "type_ref": "SQ_THREAD_TRACE_SIZE"
8369 "map": {"at": 199880, "to": "mm"},
8370 "name": "SQ_THREAD_TRACE_MASK",
8371 "type_ref": "SQ_THREAD_TRACE_MASK"
8375 "map": {"at": 199884, "to": "mm"},
8376 "name": "SQ_THREAD_TRACE_TOKEN_MASK",
8377 "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK"
8381 "map": {"at": 199888, "to": "mm"},
8382 "name": "SQ_THREAD_TRACE_PERF_MASK",
8383 "type_ref": "SQ_THREAD_TRACE_PERF_MASK"
8387 "map": {"at": 199892, "to": "mm"},
8388 "name": "SQ_THREAD_TRACE_CTRL",
8389 "type_ref": "SQ_THREAD_TRACE_CTRL"
8393 "map": {"at": 199896, "to": "mm"},
8394 "name": "SQ_THREAD_TRACE_MODE",
8395 "type_ref": "SQ_THREAD_TRACE_MODE"
8399 "map": {"at": 199900, "to": "mm"},
8400 "name": "SQ_THREAD_TRACE_BASE2",
8401 "type_ref": "SQ_THREAD_TRACE_BASE2"
8405 "map": {"at": 199904, "to": "mm"},
8406 "name": "SQ_THREAD_TRACE_TOKEN_MASK2",
8407 "type_ref": "SQ_THREAD_TRACE_TOKEN_MASK2"
8411 "map": {"at": 199908, "to": "mm"},
8412 "name": "SQ_THREAD_TRACE_WPTR",
8413 "type_ref": "SQ_THREAD_TRACE_WPTR"
8417 "map": {"at": 199912, "to": "mm"},
8418 "name": "SQ_THREAD_TRACE_STATUS",
8419 "type_ref": "SQ_THREAD_TRACE_STATUS"
8423 "map": {"at": 199916, "to": "mm"},
8424 "name": "SQ_THREAD_TRACE_HIWATER",
8425 "type_ref": "SQ_THREAD_TRACE_HIWATER"
8429 "map": {"at": 199920, "to": "mm"},
8430 "name": "SQ_THREAD_TRACE_CNTR",
8431 "type_ref": "SQ_THREAD_TRACE_CNTR"
8435 "map": {"at": 199936, "to": "mm"},
8436 "name": "SQ_THREAD_TRACE_USERDATA_0",
8437 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8441 "map": {"at": 199940, "to": "mm"},
8442 "name": "SQ_THREAD_TRACE_USERDATA_1",
8443 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8447 "map": {"at": 199944, "to": "mm"},
8448 "name": "SQ_THREAD_TRACE_USERDATA_2",
8449 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8453 "map": {"at": 199948, "to": "mm"},
8454 "name": "SQ_THREAD_TRACE_USERDATA_3",
8455 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8459 "map": {"at": 199968, "to": "mm"},
8460 "name": "SQC_CACHES",
8461 "type_ref": "SQC_CACHES"
8465 "map": {"at": 199972, "to": "mm"},
8466 "name": "SQC_WRITEBACK",
8467 "type_ref": "SQC_WRITEBACK"
8471 "map": {"at": 200192, "to": "mm"},
8472 "name": "TA_CS_BC_BASE_ADDR",
8473 "type_ref": "TA_BC_BASE_ADDR"
8477 "map": {"at": 200196, "to": "mm"},
8478 "name": "TA_CS_BC_BASE_ADDR_HI",
8479 "type_ref": "TA_BC_BASE_ADDR_HI"
8483 "map": {"at": 200448, "to": "mm"},
8484 "name": "DB_OCCLUSION_COUNT0_LOW",
8485 "type_ref": "DB_OCCLUSION_COUNT0_LOW"
8489 "map": {"at": 200452, "to": "mm"},
8490 "name": "DB_OCCLUSION_COUNT0_HI",
8491 "type_ref": "DB_OCCLUSION_COUNT0_HI"
8495 "map": {"at": 200456, "to": "mm"},
8496 "name": "DB_OCCLUSION_COUNT1_LOW",
8497 "type_ref": "DB_OCCLUSION_COUNT0_LOW"
8501 "map": {"at": 200460, "to": "mm"},
8502 "name": "DB_OCCLUSION_COUNT1_HI",
8503 "type_ref": "DB_OCCLUSION_COUNT0_HI"
8507 "map": {"at": 200464, "to": "mm"},
8508 "name": "DB_OCCLUSION_COUNT2_LOW",
8509 "type_ref": "DB_OCCLUSION_COUNT0_LOW"
8513 "map": {"at": 200468, "to": "mm"},
8514 "name": "DB_OCCLUSION_COUNT2_HI",
8515 "type_ref": "DB_OCCLUSION_COUNT0_HI"
8519 "map": {"at": 200472, "to": "mm"},
8520 "name": "DB_OCCLUSION_COUNT3_LOW",
8521 "type_ref": "DB_OCCLUSION_COUNT0_LOW"
8525 "map": {"at": 200476, "to": "mm"},
8526 "name": "DB_OCCLUSION_COUNT3_HI",
8527 "type_ref": "DB_OCCLUSION_COUNT0_HI"
8531 "map": {"at": 200696, "to": "mm"},
8532 "name": "DB_ZPASS_COUNT_LOW",
8533 "type_ref": "DB_OCCLUSION_COUNT0_LOW"
8537 "map": {"at": 200700, "to": "mm"},
8538 "name": "DB_ZPASS_COUNT_HI",
8539 "type_ref": "DB_OCCLUSION_COUNT0_HI"
8543 "map": {"at": 200704, "to": "mm"},
8544 "name": "GDS_RD_ADDR",
8545 "type_ref": "GDS_RD_ADDR"
8549 "map": {"at": 200708, "to": "mm"},
8550 "name": "GDS_RD_DATA",
8551 "type_ref": "GDS_RD_DATA"
8555 "map": {"at": 200712, "to": "mm"},
8556 "name": "GDS_RD_BURST_ADDR",
8557 "type_ref": "GDS_RD_BURST_ADDR"
8561 "map": {"at": 200716, "to": "mm"},
8562 "name": "GDS_RD_BURST_COUNT",
8563 "type_ref": "GDS_RD_BURST_COUNT"
8567 "map": {"at": 200720, "to": "mm"},
8568 "name": "GDS_RD_BURST_DATA",
8569 "type_ref": "GDS_RD_BURST_DATA"
8573 "map": {"at": 200724, "to": "mm"},
8574 "name": "GDS_WR_ADDR",
8575 "type_ref": "GDS_WR_ADDR"
8579 "map": {"at": 200728, "to": "mm"},
8580 "name": "GDS_WR_DATA",
8581 "type_ref": "GDS_WR_DATA"
8585 "map": {"at": 200732, "to": "mm"},
8586 "name": "GDS_WR_BURST_ADDR",
8587 "type_ref": "GDS_WR_ADDR"
8591 "map": {"at": 200736, "to": "mm"},
8592 "name": "GDS_WR_BURST_DATA",
8593 "type_ref": "GDS_WR_DATA"
8597 "map": {"at": 200740, "to": "mm"},
8598 "name": "GDS_WRITE_COMPLETE",
8599 "type_ref": "GDS_WRITE_COMPLETE"
8603 "map": {"at": 200744, "to": "mm"},
8604 "name": "GDS_ATOM_CNTL",
8605 "type_ref": "GDS_ATOM_CNTL"
8609 "map": {"at": 200748, "to": "mm"},
8610 "name": "GDS_ATOM_COMPLETE",
8611 "type_ref": "GDS_ATOM_COMPLETE"
8615 "map": {"at": 200752, "to": "mm"},
8616 "name": "GDS_ATOM_BASE",
8617 "type_ref": "GDS_ATOM_BASE"
8621 "map": {"at": 200756, "to": "mm"},
8622 "name": "GDS_ATOM_SIZE",
8623 "type_ref": "GDS_ATOM_SIZE"
8627 "map": {"at": 200760, "to": "mm"},
8628 "name": "GDS_ATOM_OFFSET0",
8629 "type_ref": "GDS_ATOM_OFFSET0"
8633 "map": {"at": 200764, "to": "mm"},
8634 "name": "GDS_ATOM_OFFSET1",
8635 "type_ref": "GDS_ATOM_OFFSET1"
8639 "map": {"at": 200768, "to": "mm"},
8640 "name": "GDS_ATOM_DST",
8641 "type_ref": "GDS_ATOM_DST"
8645 "map": {"at": 200772, "to": "mm"},
8646 "name": "GDS_ATOM_OP",
8647 "type_ref": "GDS_ATOM_OP"
8651 "map": {"at": 200776, "to": "mm"},
8652 "name": "GDS_ATOM_SRC0",
8653 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8657 "map": {"at": 200780, "to": "mm"},
8658 "name": "GDS_ATOM_SRC0_U",
8659 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8663 "map": {"at": 200784, "to": "mm"},
8664 "name": "GDS_ATOM_SRC1",
8665 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8669 "map": {"at": 200788, "to": "mm"},
8670 "name": "GDS_ATOM_SRC1_U",
8671 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8675 "map": {"at": 200792, "to": "mm"},
8676 "name": "GDS_ATOM_READ0",
8677 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8681 "map": {"at": 200796, "to": "mm"},
8682 "name": "GDS_ATOM_READ0_U",
8683 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8687 "map": {"at": 200800, "to": "mm"},
8688 "name": "GDS_ATOM_READ1",
8689 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8693 "map": {"at": 200804, "to": "mm"},
8694 "name": "GDS_ATOM_READ1_U",
8695 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8699 "map": {"at": 200808, "to": "mm"},
8700 "name": "GDS_GWS_RESOURCE_CNTL",
8701 "type_ref": "GDS_GWS_RESOURCE_CNTL"
8705 "map": {"at": 200812, "to": "mm"},
8706 "name": "GDS_GWS_RESOURCE",
8707 "type_ref": "GDS_GWS_RESOURCE"
8711 "map": {"at": 200816, "to": "mm"},
8712 "name": "GDS_GWS_RESOURCE_CNT",
8713 "type_ref": "GDS_GWS_RESOURCE_CNT"
8717 "map": {"at": 200820, "to": "mm"},
8718 "name": "GDS_OA_CNTL",
8719 "type_ref": "GDS_OA_CNTL"
8723 "map": {"at": 200824, "to": "mm"},
8724 "name": "GDS_OA_COUNTER",
8725 "type_ref": "GDS_OA_COUNTER"
8729 "map": {"at": 200828, "to": "mm"},
8730 "name": "GDS_OA_ADDRESS",
8731 "type_ref": "GDS_OA_ADDRESS"
8735 "map": {"at": 200832, "to": "mm"},
8736 "name": "GDS_OA_INCDEC",
8737 "type_ref": "GDS_OA_INCDEC"
8741 "map": {"at": 200836, "to": "mm"},
8742 "name": "GDS_OA_RING_SIZE",
8743 "type_ref": "GDS_OA_RING_SIZE"
8747 "map": {"at": 200960, "to": "mm"},
8748 "name": "SPI_CONFIG_CNTL",
8749 "type_ref": "SPI_CONFIG_CNTL"
8753 "map": {"at": 200964, "to": "mm"},
8754 "name": "SPI_CONFIG_CNTL_1",
8755 "type_ref": "SPI_CONFIG_CNTL_1"
8759 "map": {"at": 200968, "to": "mm"},
8760 "name": "SPI_CONFIG_CNTL_2",
8761 "type_ref": "SPI_CONFIG_CNTL_2"
8765 "map": {"at": 200972, "to": "mm"},
8766 "name": "SPI_WAVE_LIMIT_CNTL",
8767 "type_ref": "SPI_WAVE_LIMIT_CNTL"
8771 "map": {"at": 212992, "to": "mm"},
8772 "name": "CPG_PERFCOUNTER1_LO",
8773 "type_ref": "CPG_PERFCOUNTER1_LO"
8777 "map": {"at": 212996, "to": "mm"},
8778 "name": "CPG_PERFCOUNTER1_HI",
8779 "type_ref": "CPG_PERFCOUNTER1_HI"
8783 "map": {"at": 213000, "to": "mm"},
8784 "name": "CPG_PERFCOUNTER0_LO",
8785 "type_ref": "CPG_PERFCOUNTER1_LO"
8789 "map": {"at": 213004, "to": "mm"},
8790 "name": "CPG_PERFCOUNTER0_HI",
8791 "type_ref": "CPG_PERFCOUNTER1_HI"
8795 "map": {"at": 213008, "to": "mm"},
8796 "name": "CPC_PERFCOUNTER1_LO",
8797 "type_ref": "CPG_PERFCOUNTER1_LO"
8801 "map": {"at": 213012, "to": "mm"},
8802 "name": "CPC_PERFCOUNTER1_HI",
8803 "type_ref": "CPG_PERFCOUNTER1_HI"
8807 "map": {"at": 213016, "to": "mm"},
8808 "name": "CPC_PERFCOUNTER0_LO",
8809 "type_ref": "CPG_PERFCOUNTER1_LO"
8813 "map": {"at": 213020, "to": "mm"},
8814 "name": "CPC_PERFCOUNTER0_HI",
8815 "type_ref": "CPG_PERFCOUNTER1_HI"
8819 "map": {"at": 213024, "to": "mm"},
8820 "name": "CPF_PERFCOUNTER1_LO",
8821 "type_ref": "CPG_PERFCOUNTER1_LO"
8825 "map": {"at": 213028, "to": "mm"},
8826 "name": "CPF_PERFCOUNTER1_HI",
8827 "type_ref": "CPG_PERFCOUNTER1_HI"
8831 "map": {"at": 213032, "to": "mm"},
8832 "name": "CPF_PERFCOUNTER0_LO",
8833 "type_ref": "CPG_PERFCOUNTER1_LO"
8837 "map": {"at": 213036, "to": "mm"},
8838 "name": "CPF_PERFCOUNTER0_HI",
8839 "type_ref": "CPG_PERFCOUNTER1_HI"
8843 "map": {"at": 213040, "to": "mm"},
8844 "name": "CPF_LATENCY_STATS_DATA",
8845 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8849 "map": {"at": 213044, "to": "mm"},
8850 "name": "CPG_LATENCY_STATS_DATA",
8851 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8855 "map": {"at": 213048, "to": "mm"},
8856 "name": "CPC_LATENCY_STATS_DATA",
8857 "type_ref": "SPI_SHADER_USER_DATA_PS_0"
8861 "map": {"at": 213248, "to": "mm"},
8862 "name": "GRBM_PERFCOUNTER0_LO",
8863 "type_ref": "CPG_PERFCOUNTER1_LO"
8867 "map": {"at": 213252, "to": "mm"},
8868 "name": "GRBM_PERFCOUNTER0_HI",
8869 "type_ref": "CPG_PERFCOUNTER1_HI"
8873 "map": {"at": 213260, "to": "mm"},
8874 "name": "GRBM_PERFCOUNTER1_LO",
8875 "type_ref": "CPG_PERFCOUNTER1_LO"
8879 "map": {"at": 213264, "to": "mm"},
8880 "name": "GRBM_PERFCOUNTER1_HI",
8881 "type_ref": "CPG_PERFCOUNTER1_HI"
8885 "map": {"at": 213268, "to": "mm"},
8886 "name": "GRBM_SE0_PERFCOUNTER_LO",
8887 "type_ref": "CPG_PERFCOUNTER1_LO"
8891 "map": {"at": 213272, "to": "mm"},
8892 "name": "GRBM_SE0_PERFCOUNTER_HI",
8893 "type_ref": "CPG_PERFCOUNTER1_HI"
8897 "map": {"at": 213276, "to": "mm"},
8898 "name": "GRBM_SE1_PERFCOUNTER_LO",
8899 "type_ref": "CPG_PERFCOUNTER1_LO"
8903 "map": {"at": 213280, "to": "mm"},
8904 "name": "GRBM_SE1_PERFCOUNTER_HI",
8905 "type_ref": "CPG_PERFCOUNTER1_HI"
8909 "map": {"at": 213284, "to": "mm"},
8910 "name": "GRBM_SE2_PERFCOUNTER_LO",
8911 "type_ref": "CPG_PERFCOUNTER1_LO"
8915 "map": {"at": 213288, "to": "mm"},
8916 "name": "GRBM_SE2_PERFCOUNTER_HI",
8917 "type_ref": "CPG_PERFCOUNTER1_HI"
8921 "map": {"at": 213292, "to": "mm"},
8922 "name": "GRBM_SE3_PERFCOUNTER_LO",
8923 "type_ref": "CPG_PERFCOUNTER1_LO"
8927 "map": {"at": 213296, "to": "mm"},
8928 "name": "GRBM_SE3_PERFCOUNTER_HI",
8929 "type_ref": "CPG_PERFCOUNTER1_HI"
8933 "map": {"at": 213504, "to": "mm"},
8934 "name": "WD_PERFCOUNTER0_LO",
8935 "type_ref": "CPG_PERFCOUNTER1_LO"
8939 "map": {"at": 213508, "to": "mm"},
8940 "name": "WD_PERFCOUNTER0_HI",
8941 "type_ref": "CPG_PERFCOUNTER1_HI"
8945 "map": {"at": 213512, "to": "mm"},
8946 "name": "WD_PERFCOUNTER1_LO",
8947 "type_ref": "CPG_PERFCOUNTER1_LO"
8951 "map": {"at": 213516, "to": "mm"},
8952 "name": "WD_PERFCOUNTER1_HI",
8953 "type_ref": "CPG_PERFCOUNTER1_HI"
8957 "map": {"at": 213520, "to": "mm"},
8958 "name": "WD_PERFCOUNTER2_LO",
8959 "type_ref": "CPG_PERFCOUNTER1_LO"
8963 "map": {"at": 213524, "to": "mm"},
8964 "name": "WD_PERFCOUNTER2_HI",
8965 "type_ref": "CPG_PERFCOUNTER1_HI"
8969 "map": {"at": 213528, "to": "mm"},
8970 "name": "WD_PERFCOUNTER3_LO",
8971 "type_ref": "CPG_PERFCOUNTER1_LO"
8975 "map": {"at": 213532, "to": "mm"},
8976 "name": "WD_PERFCOUNTER3_HI",
8977 "type_ref": "CPG_PERFCOUNTER1_HI"
8981 "map": {"at": 213536, "to": "mm"},
8982 "name": "IA_PERFCOUNTER0_LO",
8983 "type_ref": "CPG_PERFCOUNTER1_LO"
8987 "map": {"at": 213540, "to": "mm"},
8988 "name": "IA_PERFCOUNTER0_HI",
8989 "type_ref": "CPG_PERFCOUNTER1_HI"
8993 "map": {"at": 213544, "to": "mm"},
8994 "name": "IA_PERFCOUNTER1_LO",
8995 "type_ref": "CPG_PERFCOUNTER1_LO"
8999 "map": {"at": 213548, "to": "mm"},
9000 "name": "IA_PERFCOUNTER1_HI",
9001 "type_ref": "CPG_PERFCOUNTER1_HI"
9005 "map": {"at": 213552, "to": "mm"},
9006 "name": "IA_PERFCOUNTER2_LO",
9007 "type_ref": "CPG_PERFCOUNTER1_LO"
9011 "map": {"at": 213556, "to": "mm"},
9012 "name": "IA_PERFCOUNTER2_HI",
9013 "type_ref": "CPG_PERFCOUNTER1_HI"
9017 "map": {"at": 213560, "to": "mm"},
9018 "name": "IA_PERFCOUNTER3_LO",
9019 "type_ref": "CPG_PERFCOUNTER1_LO"
9023 "map": {"at": 213564, "to": "mm"},
9024 "name": "IA_PERFCOUNTER3_HI",
9025 "type_ref": "CPG_PERFCOUNTER1_HI"
9029 "map": {"at": 213568, "to": "mm"},
9030 "name": "VGT_PERFCOUNTER0_LO",
9031 "type_ref": "CPG_PERFCOUNTER1_LO"
9035 "map": {"at": 213572, "to": "mm"},
9036 "name": "VGT_PERFCOUNTER0_HI",
9037 "type_ref": "CPG_PERFCOUNTER1_HI"
9041 "map": {"at": 213576, "to": "mm"},
9042 "name": "VGT_PERFCOUNTER1_LO",
9043 "type_ref": "CPG_PERFCOUNTER1_LO"
9047 "map": {"at": 213580, "to": "mm"},
9048 "name": "VGT_PERFCOUNTER1_HI",
9049 "type_ref": "CPG_PERFCOUNTER1_HI"
9053 "map": {"at": 213584, "to": "mm"},
9054 "name": "VGT_PERFCOUNTER2_LO",
9055 "type_ref": "CPG_PERFCOUNTER1_LO"
9059 "map": {"at": 213588, "to": "mm"},
9060 "name": "VGT_PERFCOUNTER2_HI",
9061 "type_ref": "CPG_PERFCOUNTER1_HI"
9065 "map": {"at": 213592, "to": "mm"},
9066 "name": "VGT_PERFCOUNTER3_LO",
9067 "type_ref": "CPG_PERFCOUNTER1_LO"
9071 "map": {"at": 213596, "to": "mm"},
9072 "name": "VGT_PERFCOUNTER3_HI",
9073 "type_ref": "CPG_PERFCOUNTER1_HI"
9077 "map": {"at": 214016, "to": "mm"},
9078 "name": "PA_SU_PERFCOUNTER0_LO",
9079 "type_ref": "CPG_PERFCOUNTER1_LO"
9083 "map": {"at": 214020, "to": "mm"},
9084 "name": "PA_SU_PERFCOUNTER0_HI",
9085 "type_ref": "PA_SU_PERFCOUNTER0_HI"
9089 "map": {"at": 214024, "to": "mm"},
9090 "name": "PA_SU_PERFCOUNTER1_LO",
9091 "type_ref": "CPG_PERFCOUNTER1_LO"
9095 "map": {"at": 214028, "to": "mm"},
9096 "name": "PA_SU_PERFCOUNTER1_HI",
9097 "type_ref": "PA_SU_PERFCOUNTER0_HI"
9101 "map": {"at": 214032, "to": "mm"},
9102 "name": "PA_SU_PERFCOUNTER2_LO",
9103 "type_ref": "CPG_PERFCOUNTER1_LO"
9107 "map": {"at": 214036, "to": "mm"},
9108 "name": "PA_SU_PERFCOUNTER2_HI",
9109 "type_ref": "PA_SU_PERFCOUNTER0_HI"
9113 "map": {"at": 214040, "to": "mm"},
9114 "name": "PA_SU_PERFCOUNTER3_LO",
9115 "type_ref": "CPG_PERFCOUNTER1_LO"
9119 "map": {"at": 214044, "to": "mm"},
9120 "name": "PA_SU_PERFCOUNTER3_HI",
9121 "type_ref": "PA_SU_PERFCOUNTER0_HI"
9125 "map": {"at": 214272, "to": "mm"},
9126 "name": "PA_SC_PERFCOUNTER0_LO",
9127 "type_ref": "CPG_PERFCOUNTER1_LO"
9131 "map": {"at": 214276, "to": "mm"},
9132 "name": "PA_SC_PERFCOUNTER0_HI",
9133 "type_ref": "CPG_PERFCOUNTER1_HI"
9137 "map": {"at": 214280, "to": "mm"},
9138 "name": "PA_SC_PERFCOUNTER1_LO",
9139 "type_ref": "CPG_PERFCOUNTER1_LO"
9143 "map": {"at": 214284, "to": "mm"},
9144 "name": "PA_SC_PERFCOUNTER1_HI",
9145 "type_ref": "CPG_PERFCOUNTER1_HI"
9149 "map": {"at": 214288, "to": "mm"},
9150 "name": "PA_SC_PERFCOUNTER2_LO",
9151 "type_ref": "CPG_PERFCOUNTER1_LO"
9155 "map": {"at": 214292, "to": "mm"},
9156 "name": "PA_SC_PERFCOUNTER2_HI",
9157 "type_ref": "CPG_PERFCOUNTER1_HI"
9161 "map": {"at": 214296, "to": "mm"},
9162 "name": "PA_SC_PERFCOUNTER3_LO",
9163 "type_ref": "CPG_PERFCOUNTER1_LO"
9167 "map": {"at": 214300, "to": "mm"},
9168 "name": "PA_SC_PERFCOUNTER3_HI",
9169 "type_ref": "CPG_PERFCOUNTER1_HI"
9173 "map": {"at": 214304, "to": "mm"},
9174 "name": "PA_SC_PERFCOUNTER4_LO",
9175 "type_ref": "CPG_PERFCOUNTER1_LO"
9179 "map": {"at": 214308, "to": "mm"},
9180 "name": "PA_SC_PERFCOUNTER4_HI",
9181 "type_ref": "CPG_PERFCOUNTER1_HI"
9185 "map": {"at": 214312, "to": "mm"},
9186 "name": "PA_SC_PERFCOUNTER5_LO",
9187 "type_ref": "CPG_PERFCOUNTER1_LO"
9191 "map": {"at": 214316, "to": "mm"},
9192 "name": "PA_SC_PERFCOUNTER5_HI",
9193 "type_ref": "CPG_PERFCOUNTER1_HI"
9197 "map": {"at": 214320, "to": "mm"},
9198 "name": "PA_SC_PERFCOUNTER6_LO",
9199 "type_ref": "CPG_PERFCOUNTER1_LO"
9203 "map": {"at": 214324, "to": "mm"},
9204 "name": "PA_SC_PERFCOUNTER6_HI",
9205 "type_ref": "CPG_PERFCOUNTER1_HI"
9209 "map": {"at": 214328, "to": "mm"},
9210 "name": "PA_SC_PERFCOUNTER7_LO",
9211 "type_ref": "CPG_PERFCOUNTER1_LO"
9215 "map": {"at": 214332, "to": "mm"},
9216 "name": "PA_SC_PERFCOUNTER7_HI",
9217 "type_ref": "CPG_PERFCOUNTER1_HI"
9221 "map": {"at": 214528, "to": "mm"},
9222 "name": "SPI_PERFCOUNTER0_HI",
9223 "type_ref": "CPG_PERFCOUNTER1_HI"
9227 "map": {"at": 214532, "to": "mm"},
9228 "name": "SPI_PERFCOUNTER0_LO",
9229 "type_ref": "CPG_PERFCOUNTER1_LO"
9233 "map": {"at": 214536, "to": "mm"},
9234 "name": "SPI_PERFCOUNTER1_HI",
9235 "type_ref": "CPG_PERFCOUNTER1_HI"
9239 "map": {"at": 214540, "to": "mm"},
9240 "name": "SPI_PERFCOUNTER1_LO",
9241 "type_ref": "CPG_PERFCOUNTER1_LO"
9245 "map": {"at": 214544, "to": "mm"},
9246 "name": "SPI_PERFCOUNTER2_HI",
9247 "type_ref": "CPG_PERFCOUNTER1_HI"
9251 "map": {"at": 214548, "to": "mm"},
9252 "name": "SPI_PERFCOUNTER2_LO",
9253 "type_ref": "CPG_PERFCOUNTER1_LO"
9257 "map": {"at": 214552, "to": "mm"},
9258 "name": "SPI_PERFCOUNTER3_HI",
9259 "type_ref": "CPG_PERFCOUNTER1_HI"
9263 "map": {"at": 214556, "to": "mm"},
9264 "name": "SPI_PERFCOUNTER3_LO",
9265 "type_ref": "CPG_PERFCOUNTER1_LO"
9269 "map": {"at": 214560, "to": "mm"},
9270 "name": "SPI_PERFCOUNTER4_HI",
9271 "type_ref": "CPG_PERFCOUNTER1_HI"
9275 "map": {"at": 214564, "to": "mm"},
9276 "name": "SPI_PERFCOUNTER4_LO",
9277 "type_ref": "CPG_PERFCOUNTER1_LO"
9281 "map": {"at": 214568, "to": "mm"},
9282 "name": "SPI_PERFCOUNTER5_HI",
9283 "type_ref": "CPG_PERFCOUNTER1_HI"
9287 "map": {"at": 214572, "to": "mm"},
9288 "name": "SPI_PERFCOUNTER5_LO",
9289 "type_ref": "CPG_PERFCOUNTER1_LO"
9293 "map": {"at": 214784, "to": "mm"},
9294 "name": "SQ_PERFCOUNTER0_LO",
9295 "type_ref": "CPG_PERFCOUNTER1_LO"
9299 "map": {"at": 214788, "to": "mm"},
9300 "name": "SQ_PERFCOUNTER0_HI",
9301 "type_ref": "CPG_PERFCOUNTER1_HI"
9305 "map": {"at": 214792, "to": "mm"},
9306 "name": "SQ_PERFCOUNTER1_LO",
9307 "type_ref": "CPG_PERFCOUNTER1_LO"
9311 "map": {"at": 214796, "to": "mm"},
9312 "name": "SQ_PERFCOUNTER1_HI",
9313 "type_ref": "CPG_PERFCOUNTER1_HI"
9317 "map": {"at": 214800, "to": "mm"},
9318 "name": "SQ_PERFCOUNTER2_LO",
9319 "type_ref": "CPG_PERFCOUNTER1_LO"
9323 "map": {"at": 214804, "to": "mm"},
9324 "name": "SQ_PERFCOUNTER2_HI",
9325 "type_ref": "CPG_PERFCOUNTER1_HI"
9329 "map": {"at": 214808, "to": "mm"},
9330 "name": "SQ_PERFCOUNTER3_LO",
9331 "type_ref": "CPG_PERFCOUNTER1_LO"
9335 "map": {"at": 214812, "to": "mm"},
9336 "name": "SQ_PERFCOUNTER3_HI",
9337 "type_ref": "CPG_PERFCOUNTER1_HI"
9341 "map": {"at": 214816, "to": "mm"},
9342 "name": "SQ_PERFCOUNTER4_LO",
9343 "type_ref": "CPG_PERFCOUNTER1_LO"
9347 "map": {"at": 214820, "to": "mm"},
9348 "name": "SQ_PERFCOUNTER4_HI",
9349 "type_ref": "CPG_PERFCOUNTER1_HI"
9353 "map": {"at": 214824, "to": "mm"},
9354 "name": "SQ_PERFCOUNTER5_LO",
9355 "type_ref": "CPG_PERFCOUNTER1_LO"
9359 "map": {"at": 214828, "to": "mm"},
9360 "name": "SQ_PERFCOUNTER5_HI",
9361 "type_ref": "CPG_PERFCOUNTER1_HI"
9365 "map": {"at": 214832, "to": "mm"},
9366 "name": "SQ_PERFCOUNTER6_LO",
9367 "type_ref": "CPG_PERFCOUNTER1_LO"
9371 "map": {"at": 214836, "to": "mm"},
9372 "name": "SQ_PERFCOUNTER6_HI",
9373 "type_ref": "CPG_PERFCOUNTER1_HI"
9377 "map": {"at": 214840, "to": "mm"},
9378 "name": "SQ_PERFCOUNTER7_LO",
9379 "type_ref": "CPG_PERFCOUNTER1_LO"
9383 "map": {"at": 214844, "to": "mm"},
9384 "name": "SQ_PERFCOUNTER7_HI",
9385 "type_ref": "CPG_PERFCOUNTER1_HI"
9389 "map": {"at": 214848, "to": "mm"},
9390 "name": "SQ_PERFCOUNTER8_LO",
9391 "type_ref": "CPG_PERFCOUNTER1_LO"
9395 "map": {"at": 214852, "to": "mm"},
9396 "name": "SQ_PERFCOUNTER8_HI",
9397 "type_ref": "CPG_PERFCOUNTER1_HI"
9401 "map": {"at": 214856, "to": "mm"},
9402 "name": "SQ_PERFCOUNTER9_LO",
9403 "type_ref": "CPG_PERFCOUNTER1_LO"
9407 "map": {"at": 214860, "to": "mm"},
9408 "name": "SQ_PERFCOUNTER9_HI",
9409 "type_ref": "CPG_PERFCOUNTER1_HI"
9413 "map": {"at": 214864, "to": "mm"},
9414 "name": "SQ_PERFCOUNTER10_LO",
9415 "type_ref": "CPG_PERFCOUNTER1_LO"
9419 "map": {"at": 214868, "to": "mm"},
9420 "name": "SQ_PERFCOUNTER10_HI",
9421 "type_ref": "CPG_PERFCOUNTER1_HI"
9425 "map": {"at": 214872, "to": "mm"},
9426 "name": "SQ_PERFCOUNTER11_LO",
9427 "type_ref": "CPG_PERFCOUNTER1_LO"
9431 "map": {"at": 214876, "to": "mm"},
9432 "name": "SQ_PERFCOUNTER11_HI",
9433 "type_ref": "CPG_PERFCOUNTER1_HI"
9437 "map": {"at": 214880, "to": "mm"},
9438 "name": "SQ_PERFCOUNTER12_LO",
9439 "type_ref": "CPG_PERFCOUNTER1_LO"
9443 "map": {"at": 214884, "to": "mm"},
9444 "name": "SQ_PERFCOUNTER12_HI",
9445 "type_ref": "CPG_PERFCOUNTER1_HI"
9449 "map": {"at": 214888, "to": "mm"},
9450 "name": "SQ_PERFCOUNTER13_LO",
9451 "type_ref": "CPG_PERFCOUNTER1_LO"
9455 "map": {"at": 214892, "to": "mm"},
9456 "name": "SQ_PERFCOUNTER13_HI",
9457 "type_ref": "CPG_PERFCOUNTER1_HI"
9461 "map": {"at": 214896, "to": "mm"},
9462 "name": "SQ_PERFCOUNTER14_LO",
9463 "type_ref": "CPG_PERFCOUNTER1_LO"
9467 "map": {"at": 214900, "to": "mm"},
9468 "name": "SQ_PERFCOUNTER14_HI",
9469 "type_ref": "CPG_PERFCOUNTER1_HI"
9473 "map": {"at": 214904, "to": "mm"},
9474 "name": "SQ_PERFCOUNTER15_LO",
9475 "type_ref": "CPG_PERFCOUNTER1_LO"
9479 "map": {"at": 214908, "to": "mm"},
9480 "name": "SQ_PERFCOUNTER15_HI",
9481 "type_ref": "CPG_PERFCOUNTER1_HI"
9485 "map": {"at": 215296, "to": "mm"},
9486 "name": "SX_PERFCOUNTER0_LO",
9487 "type_ref": "CPG_PERFCOUNTER1_LO"
9491 "map": {"at": 215300, "to": "mm"},
9492 "name": "SX_PERFCOUNTER0_HI",
9493 "type_ref": "CPG_PERFCOUNTER1_HI"
9497 "map": {"at": 215304, "to": "mm"},
9498 "name": "SX_PERFCOUNTER1_LO",
9499 "type_ref": "CPG_PERFCOUNTER1_LO"
9503 "map": {"at": 215308, "to": "mm"},
9504 "name": "SX_PERFCOUNTER1_HI",
9505 "type_ref": "CPG_PERFCOUNTER1_HI"
9509 "map": {"at": 215312, "to": "mm"},
9510 "name": "SX_PERFCOUNTER2_LO",
9511 "type_ref": "CPG_PERFCOUNTER1_LO"
9515 "map": {"at": 215316, "to": "mm"},
9516 "name": "SX_PERFCOUNTER2_HI",
9517 "type_ref": "CPG_PERFCOUNTER1_HI"
9521 "map": {"at": 215320, "to": "mm"},
9522 "name": "SX_PERFCOUNTER3_LO",
9523 "type_ref": "CPG_PERFCOUNTER1_LO"
9527 "map": {"at": 215324, "to": "mm"},
9528 "name": "SX_PERFCOUNTER3_HI",
9529 "type_ref": "CPG_PERFCOUNTER1_HI"
9533 "map": {"at": 215552, "to": "mm"},
9534 "name": "GDS_PERFCOUNTER0_LO",
9535 "type_ref": "CPG_PERFCOUNTER1_LO"
9539 "map": {"at": 215556, "to": "mm"},
9540 "name": "GDS_PERFCOUNTER0_HI",
9541 "type_ref": "CPG_PERFCOUNTER1_HI"
9545 "map": {"at": 215560, "to": "mm"},
9546 "name": "GDS_PERFCOUNTER1_LO",
9547 "type_ref": "CPG_PERFCOUNTER1_LO"
9551 "map": {"at": 215564, "to": "mm"},
9552 "name": "GDS_PERFCOUNTER1_HI",
9553 "type_ref": "CPG_PERFCOUNTER1_HI"
9557 "map": {"at": 215568, "to": "mm"},
9558 "name": "GDS_PERFCOUNTER2_LO",
9559 "type_ref": "CPG_PERFCOUNTER1_LO"
9563 "map": {"at": 215572, "to": "mm"},
9564 "name": "GDS_PERFCOUNTER2_HI",
9565 "type_ref": "CPG_PERFCOUNTER1_HI"
9569 "map": {"at": 215576, "to": "mm"},
9570 "name": "GDS_PERFCOUNTER3_LO",
9571 "type_ref": "CPG_PERFCOUNTER1_LO"
9575 "map": {"at": 215580, "to": "mm"},
9576 "name": "GDS_PERFCOUNTER3_HI",
9577 "type_ref": "CPG_PERFCOUNTER1_HI"
9581 "map": {"at": 215808, "to": "mm"},
9582 "name": "TA_PERFCOUNTER0_LO",
9583 "type_ref": "CPG_PERFCOUNTER1_LO"
9587 "map": {"at": 215812, "to": "mm"},
9588 "name": "TA_PERFCOUNTER0_HI",
9589 "type_ref": "CPG_PERFCOUNTER1_HI"
9593 "map": {"at": 215816, "to": "mm"},
9594 "name": "TA_PERFCOUNTER1_LO",
9595 "type_ref": "CPG_PERFCOUNTER1_LO"
9599 "map": {"at": 215820, "to": "mm"},
9600 "name": "TA_PERFCOUNTER1_HI",
9601 "type_ref": "CPG_PERFCOUNTER1_HI"
9605 "map": {"at": 216064, "to": "mm"},
9606 "name": "TD_PERFCOUNTER0_LO",
9607 "type_ref": "CPG_PERFCOUNTER1_LO"
9611 "map": {"at": 216068, "to": "mm"},
9612 "name": "TD_PERFCOUNTER0_HI",
9613 "type_ref": "CPG_PERFCOUNTER1_HI"
9617 "map": {"at": 216072, "to": "mm"},
9618 "name": "TD_PERFCOUNTER1_LO",
9619 "type_ref": "CPG_PERFCOUNTER1_LO"
9623 "map": {"at": 216076, "to": "mm"},
9624 "name": "TD_PERFCOUNTER1_HI",
9625 "type_ref": "CPG_PERFCOUNTER1_HI"
9629 "map": {"at": 216320, "to": "mm"},
9630 "name": "TCP_PERFCOUNTER0_LO",
9631 "type_ref": "CPG_PERFCOUNTER1_LO"
9635 "map": {"at": 216324, "to": "mm"},
9636 "name": "TCP_PERFCOUNTER0_HI",
9637 "type_ref": "CPG_PERFCOUNTER1_HI"
9641 "map": {"at": 216328, "to": "mm"},
9642 "name": "TCP_PERFCOUNTER1_LO",
9643 "type_ref": "CPG_PERFCOUNTER1_LO"
9647 "map": {"at": 216332, "to": "mm"},
9648 "name": "TCP_PERFCOUNTER1_HI",
9649 "type_ref": "CPG_PERFCOUNTER1_HI"
9653 "map": {"at": 216336, "to": "mm"},
9654 "name": "TCP_PERFCOUNTER2_LO",
9655 "type_ref": "CPG_PERFCOUNTER1_LO"
9659 "map": {"at": 216340, "to": "mm"},
9660 "name": "TCP_PERFCOUNTER2_HI",
9661 "type_ref": "CPG_PERFCOUNTER1_HI"
9665 "map": {"at": 216344, "to": "mm"},
9666 "name": "TCP_PERFCOUNTER3_LO",
9667 "type_ref": "CPG_PERFCOUNTER1_LO"
9671 "map": {"at": 216348, "to": "mm"},
9672 "name": "TCP_PERFCOUNTER3_HI",
9673 "type_ref": "CPG_PERFCOUNTER1_HI"
9677 "map": {"at": 216576, "to": "mm"},
9678 "name": "TCC_PERFCOUNTER0_LO",
9679 "type_ref": "CPG_PERFCOUNTER1_LO"
9683 "map": {"at": 216580, "to": "mm"},
9684 "name": "TCC_PERFCOUNTER0_HI",
9685 "type_ref": "CPG_PERFCOUNTER1_HI"
9689 "map": {"at": 216584, "to": "mm"},
9690 "name": "TCC_PERFCOUNTER1_LO",
9691 "type_ref": "CPG_PERFCOUNTER1_LO"
9695 "map": {"at": 216588, "to": "mm"},
9696 "name": "TCC_PERFCOUNTER1_HI",
9697 "type_ref": "CPG_PERFCOUNTER1_HI"
9701 "map": {"at": 216592, "to": "mm"},
9702 "name": "TCC_PERFCOUNTER2_LO",
9703 "type_ref": "CPG_PERFCOUNTER1_LO"
9707 "map": {"at": 216596, "to": "mm"},
9708 "name": "TCC_PERFCOUNTER2_HI",
9709 "type_ref": "CPG_PERFCOUNTER1_HI"
9713 "map": {"at": 216600, "to": "mm"},
9714 "name": "TCC_PERFCOUNTER3_LO",
9715 "type_ref": "CPG_PERFCOUNTER1_LO"
9719 "map": {"at": 216604, "to": "mm"},
9720 "name": "TCC_PERFCOUNTER3_HI",
9721 "type_ref": "CPG_PERFCOUNTER1_HI"
9725 "map": {"at": 216640, "to": "mm"},
9726 "name": "TCA_PERFCOUNTER0_LO",
9727 "type_ref": "CPG_PERFCOUNTER1_LO"
9731 "map": {"at": 216644, "to": "mm"},
9732 "name": "TCA_PERFCOUNTER0_HI",
9733 "type_ref": "CPG_PERFCOUNTER1_HI"
9737 "map": {"at": 216648, "to": "mm"},
9738 "name": "TCA_PERFCOUNTER1_LO",
9739 "type_ref": "CPG_PERFCOUNTER1_LO"
9743 "map": {"at": 216652, "to": "mm"},
9744 "name": "TCA_PERFCOUNTER1_HI",
9745 "type_ref": "CPG_PERFCOUNTER1_HI"
9749 "map": {"at": 216656, "to": "mm"},
9750 "name": "TCA_PERFCOUNTER2_LO",
9751 "type_ref": "CPG_PERFCOUNTER1_LO"
9755 "map": {"at": 216660, "to": "mm"},
9756 "name": "TCA_PERFCOUNTER2_HI",
9757 "type_ref": "CPG_PERFCOUNTER1_HI"
9761 "map": {"at": 216664, "to": "mm"},
9762 "name": "TCA_PERFCOUNTER3_LO",
9763 "type_ref": "CPG_PERFCOUNTER1_LO"
9767 "map": {"at": 216668, "to": "mm"},
9768 "name": "TCA_PERFCOUNTER3_HI",
9769 "type_ref": "CPG_PERFCOUNTER1_HI"
9773 "map": {"at": 217112, "to": "mm"},
9774 "name": "CB_PERFCOUNTER0_LO",
9775 "type_ref": "CPG_PERFCOUNTER1_LO"
9779 "map": {"at": 217116, "to": "mm"},
9780 "name": "CB_PERFCOUNTER0_HI",
9781 "type_ref": "CPG_PERFCOUNTER1_HI"
9785 "map": {"at": 217120, "to": "mm"},
9786 "name": "CB_PERFCOUNTER1_LO",
9787 "type_ref": "CPG_PERFCOUNTER1_LO"
9791 "map": {"at": 217124, "to": "mm"},
9792 "name": "CB_PERFCOUNTER1_HI",
9793 "type_ref": "CPG_PERFCOUNTER1_HI"
9797 "map": {"at": 217128, "to": "mm"},
9798 "name": "CB_PERFCOUNTER2_LO",
9799 "type_ref": "CPG_PERFCOUNTER1_LO"
9803 "map": {"at": 217132, "to": "mm"},
9804 "name": "CB_PERFCOUNTER2_HI",
9805 "type_ref": "CPG_PERFCOUNTER1_HI"
9809 "map": {"at": 217136, "to": "mm"},
9810 "name": "CB_PERFCOUNTER3_LO",
9811 "type_ref": "CPG_PERFCOUNTER1_LO"
9815 "map": {"at": 217140, "to": "mm"},
9816 "name": "CB_PERFCOUNTER3_HI",
9817 "type_ref": "CPG_PERFCOUNTER1_HI"
9821 "map": {"at": 217344, "to": "mm"},
9822 "name": "DB_PERFCOUNTER0_LO",
9823 "type_ref": "CPG_PERFCOUNTER1_LO"
9827 "map": {"at": 217348, "to": "mm"},
9828 "name": "DB_PERFCOUNTER0_HI",
9829 "type_ref": "CPG_PERFCOUNTER1_HI"
9833 "map": {"at": 217352, "to": "mm"},
9834 "name": "DB_PERFCOUNTER1_LO",
9835 "type_ref": "CPG_PERFCOUNTER1_LO"
9839 "map": {"at": 217356, "to": "mm"},
9840 "name": "DB_PERFCOUNTER1_HI",
9841 "type_ref": "CPG_PERFCOUNTER1_HI"
9845 "map": {"at": 217360, "to": "mm"},
9846 "name": "DB_PERFCOUNTER2_LO",
9847 "type_ref": "CPG_PERFCOUNTER1_LO"
9851 "map": {"at": 217364, "to": "mm"},
9852 "name": "DB_PERFCOUNTER2_HI",
9853 "type_ref": "CPG_PERFCOUNTER1_HI"
9857 "map": {"at": 217368, "to": "mm"},
9858 "name": "DB_PERFCOUNTER3_LO",
9859 "type_ref": "CPG_PERFCOUNTER1_LO"
9863 "map": {"at": 217372, "to": "mm"},
9864 "name": "DB_PERFCOUNTER3_HI",
9865 "type_ref": "CPG_PERFCOUNTER1_HI"
9869 "map": {"at": 217600, "to": "mm"},
9870 "name": "RLC_PERFCOUNTER0_LO",
9871 "type_ref": "CPG_PERFCOUNTER1_LO"
9875 "map": {"at": 217604, "to": "mm"},
9876 "name": "RLC_PERFCOUNTER0_HI",
9877 "type_ref": "CPG_PERFCOUNTER1_HI"
9881 "map": {"at": 217608, "to": "mm"},
9882 "name": "RLC_PERFCOUNTER1_LO",
9883 "type_ref": "CPG_PERFCOUNTER1_LO"
9887 "map": {"at": 217612, "to": "mm"},
9888 "name": "RLC_PERFCOUNTER1_HI",
9889 "type_ref": "CPG_PERFCOUNTER1_HI"
9893 "map": {"at": 217856, "to": "mm"},
9894 "name": "RMI_PERFCOUNTER0_LO",
9895 "type_ref": "CPG_PERFCOUNTER1_LO"
9899 "map": {"at": 217860, "to": "mm"},
9900 "name": "RMI_PERFCOUNTER0_HI",
9901 "type_ref": "CPG_PERFCOUNTER1_HI"
9905 "map": {"at": 217864, "to": "mm"},
9906 "name": "RMI_PERFCOUNTER1_LO",
9907 "type_ref": "CPG_PERFCOUNTER1_LO"
9911 "map": {"at": 217868, "to": "mm"},
9912 "name": "RMI_PERFCOUNTER1_HI",
9913 "type_ref": "CPG_PERFCOUNTER1_HI"
9917 "map": {"at": 217872, "to": "mm"},
9918 "name": "RMI_PERFCOUNTER2_LO",
9919 "type_ref": "CPG_PERFCOUNTER1_LO"
9923 "map": {"at": 217876, "to": "mm"},
9924 "name": "RMI_PERFCOUNTER2_HI",
9925 "type_ref": "CPG_PERFCOUNTER1_HI"
9929 "map": {"at": 217880, "to": "mm"},
9930 "name": "RMI_PERFCOUNTER3_LO",
9931 "type_ref": "CPG_PERFCOUNTER1_LO"
9935 "map": {"at": 217884, "to": "mm"},
9936 "name": "RMI_PERFCOUNTER3_HI",
9937 "type_ref": "CPG_PERFCOUNTER1_HI"
9941 "map": {"at": 218112, "to": "mm"},
9942 "name": "ATC_L2_PERFCOUNTER_LO",
9943 "type_ref": "ATC_L2_PERFCOUNTER_LO"
9947 "map": {"at": 218116, "to": "mm"},
9948 "name": "ATC_L2_PERFCOUNTER_HI",
9949 "type_ref": "ATC_L2_PERFCOUNTER_HI"
9953 "map": {"at": 218144, "to": "mm"},
9954 "name": "MC_VM_L2_PERFCOUNTER_LO",
9955 "type_ref": "ATC_L2_PERFCOUNTER_LO"
9959 "map": {"at": 218148, "to": "mm"},
9960 "name": "MC_VM_L2_PERFCOUNTER_HI",
9961 "type_ref": "ATC_L2_PERFCOUNTER_HI"
9965 "map": {"at": 221184, "to": "mm"},
9966 "name": "CPG_PERFCOUNTER1_SELECT",
9967 "type_ref": "CPG_PERFCOUNTER1_SELECT"
9971 "map": {"at": 221188, "to": "mm"},
9972 "name": "CPG_PERFCOUNTER0_SELECT1",
9973 "type_ref": "CPG_PERFCOUNTER0_SELECT1"
9977 "map": {"at": 221192, "to": "mm"},
9978 "name": "CPG_PERFCOUNTER0_SELECT",
9979 "type_ref": "CPG_PERFCOUNTER1_SELECT"
9983 "map": {"at": 221196, "to": "mm"},
9984 "name": "CPC_PERFCOUNTER1_SELECT",
9985 "type_ref": "CPG_PERFCOUNTER1_SELECT"
9989 "map": {"at": 221200, "to": "mm"},
9990 "name": "CPC_PERFCOUNTER0_SELECT1",
9991 "type_ref": "CPG_PERFCOUNTER0_SELECT1"
9995 "map": {"at": 221204, "to": "mm"},
9996 "name": "CPF_PERFCOUNTER1_SELECT",
9997 "type_ref": "CPG_PERFCOUNTER1_SELECT"
10001 "map": {"at": 221208, "to": "mm"},
10002 "name": "CPF_PERFCOUNTER0_SELECT1",
10003 "type_ref": "CPG_PERFCOUNTER0_SELECT1"
10007 "map": {"at": 221212, "to": "mm"},
10008 "name": "CPF_PERFCOUNTER0_SELECT",
10009 "type_ref": "CPG_PERFCOUNTER1_SELECT"
10013 "map": {"at": 221216, "to": "mm"},
10014 "name": "CP_PERFMON_CNTL",
10015 "type_ref": "CP_PERFMON_CNTL"
10019 "map": {"at": 221220, "to": "mm"},
10020 "name": "CPC_PERFCOUNTER0_SELECT",
10021 "type_ref": "CPG_PERFCOUNTER1_SELECT"
10025 "map": {"at": 221224, "to": "mm"},
10026 "name": "CPF_TC_PERF_COUNTER_WINDOW_SELECT",
10027 "type_ref": "CPF_TC_PERF_COUNTER_WINDOW_SELECT"
10031 "map": {"at": 221228, "to": "mm"},
10032 "name": "CPG_TC_PERF_COUNTER_WINDOW_SELECT",
10033 "type_ref": "CPG_TC_PERF_COUNTER_WINDOW_SELECT"
10037 "map": {"at": 221232, "to": "mm"},
10038 "name": "CPF_LATENCY_STATS_SELECT",
10039 "type_ref": "CPF_LATENCY_STATS_SELECT"
10043 "map": {"at": 221236, "to": "mm"},
10044 "name": "CPG_LATENCY_STATS_SELECT",
10045 "type_ref": "CPG_LATENCY_STATS_SELECT"
10049 "map": {"at": 221240, "to": "mm"},
10050 "name": "CPC_LATENCY_STATS_SELECT",
10051 "type_ref": "CPC_LATENCY_STATS_SELECT"
10055 "map": {"at": 221248, "to": "mm"},
10056 "name": "CP_DRAW_OBJECT",
10057 "type_ref": "CP_DRAW_OBJECT"
10061 "map": {"at": 221252, "to": "mm"},
10062 "name": "CP_DRAW_OBJECT_COUNTER",
10063 "type_ref": "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE"
10067 "map": {"at": 221256, "to": "mm"},
10068 "name": "CP_DRAW_WINDOW_MASK_HI",
10069 "type_ref": "CP_DRAW_WINDOW_MASK_HI"
10073 "map": {"at": 221260, "to": "mm"},
10074 "name": "CP_DRAW_WINDOW_HI",
10075 "type_ref": "CP_DRAW_WINDOW_HI"
10079 "map": {"at": 221264, "to": "mm"},
10080 "name": "CP_DRAW_WINDOW_LO",
10081 "type_ref": "CP_DRAW_WINDOW_LO"
10085 "map": {"at": 221268, "to": "mm"},
10086 "name": "CP_DRAW_WINDOW_CNTL",
10087 "type_ref": "CP_DRAW_WINDOW_CNTL"
10091 "map": {"at": 221440, "to": "mm"},
10092 "name": "GRBM_PERFCOUNTER0_SELECT",
10093 "type_ref": "GRBM_PERFCOUNTER0_SELECT"
10097 "map": {"at": 221444, "to": "mm"},
10098 "name": "GRBM_PERFCOUNTER1_SELECT",
10099 "type_ref": "GRBM_PERFCOUNTER0_SELECT"
10103 "map": {"at": 221448, "to": "mm"},
10104 "name": "GRBM_SE0_PERFCOUNTER_SELECT",
10105 "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
10109 "map": {"at": 221452, "to": "mm"},
10110 "name": "GRBM_SE1_PERFCOUNTER_SELECT",
10111 "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
10115 "map": {"at": 221456, "to": "mm"},
10116 "name": "GRBM_SE2_PERFCOUNTER_SELECT",
10117 "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
10121 "map": {"at": 221460, "to": "mm"},
10122 "name": "GRBM_SE3_PERFCOUNTER_SELECT",
10123 "type_ref": "GRBM_SE0_PERFCOUNTER_SELECT"
10127 "map": {"at": 221696, "to": "mm"},
10128 "name": "WD_PERFCOUNTER0_SELECT",
10129 "type_ref": "WD_PERFCOUNTER0_SELECT"
10133 "map": {"at": 221700, "to": "mm"},
10134 "name": "WD_PERFCOUNTER1_SELECT",
10135 "type_ref": "WD_PERFCOUNTER0_SELECT"
10139 "map": {"at": 221704, "to": "mm"},
10140 "name": "WD_PERFCOUNTER2_SELECT",
10141 "type_ref": "WD_PERFCOUNTER0_SELECT"
10145 "map": {"at": 221708, "to": "mm"},
10146 "name": "WD_PERFCOUNTER3_SELECT",
10147 "type_ref": "WD_PERFCOUNTER0_SELECT"
10151 "map": {"at": 221712, "to": "mm"},
10152 "name": "IA_PERFCOUNTER0_SELECT",
10153 "type_ref": "IA_PERFCOUNTER0_SELECT"
10157 "map": {"at": 221716, "to": "mm"},
10158 "name": "IA_PERFCOUNTER1_SELECT",
10159 "type_ref": "WD_PERFCOUNTER0_SELECT"
10163 "map": {"at": 221720, "to": "mm"},
10164 "name": "IA_PERFCOUNTER2_SELECT",
10165 "type_ref": "WD_PERFCOUNTER0_SELECT"
10169 "map": {"at": 221724, "to": "mm"},
10170 "name": "IA_PERFCOUNTER3_SELECT",
10171 "type_ref": "WD_PERFCOUNTER0_SELECT"
10175 "map": {"at": 221728, "to": "mm"},
10176 "name": "IA_PERFCOUNTER0_SELECT1",
10177 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10181 "map": {"at": 221744, "to": "mm"},
10182 "name": "VGT_PERFCOUNTER0_SELECT",
10183 "type_ref": "IA_PERFCOUNTER0_SELECT"
10187 "map": {"at": 221748, "to": "mm"},
10188 "name": "VGT_PERFCOUNTER1_SELECT",
10189 "type_ref": "IA_PERFCOUNTER0_SELECT"
10193 "map": {"at": 221752, "to": "mm"},
10194 "name": "VGT_PERFCOUNTER2_SELECT",
10195 "type_ref": "WD_PERFCOUNTER0_SELECT"
10199 "map": {"at": 221756, "to": "mm"},
10200 "name": "VGT_PERFCOUNTER3_SELECT",
10201 "type_ref": "WD_PERFCOUNTER0_SELECT"
10205 "map": {"at": 221760, "to": "mm"},
10206 "name": "VGT_PERFCOUNTER0_SELECT1",
10207 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10211 "map": {"at": 221764, "to": "mm"},
10212 "name": "VGT_PERFCOUNTER1_SELECT1",
10213 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10217 "map": {"at": 221776, "to": "mm"},
10218 "name": "VGT_PERFCOUNTER_SEID_MASK",
10219 "type_ref": "VGT_PERFCOUNTER_SEID_MASK"
10223 "map": {"at": 222208, "to": "mm"},
10224 "name": "PA_SU_PERFCOUNTER0_SELECT",
10225 "type_ref": "IA_PERFCOUNTER0_SELECT"
10229 "map": {"at": 222212, "to": "mm"},
10230 "name": "PA_SU_PERFCOUNTER0_SELECT1",
10231 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10235 "map": {"at": 222216, "to": "mm"},
10236 "name": "PA_SU_PERFCOUNTER1_SELECT",
10237 "type_ref": "IA_PERFCOUNTER0_SELECT"
10241 "map": {"at": 222220, "to": "mm"},
10242 "name": "PA_SU_PERFCOUNTER1_SELECT1",
10243 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10247 "map": {"at": 222224, "to": "mm"},
10248 "name": "PA_SU_PERFCOUNTER2_SELECT",
10249 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10253 "map": {"at": 222228, "to": "mm"},
10254 "name": "PA_SU_PERFCOUNTER3_SELECT",
10255 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10259 "map": {"at": 222464, "to": "mm"},
10260 "name": "PA_SC_PERFCOUNTER0_SELECT",
10261 "type_ref": "IA_PERFCOUNTER0_SELECT"
10265 "map": {"at": 222468, "to": "mm"},
10266 "name": "PA_SC_PERFCOUNTER0_SELECT1",
10267 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10271 "map": {"at": 222472, "to": "mm"},
10272 "name": "PA_SC_PERFCOUNTER1_SELECT",
10273 "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
10277 "map": {"at": 222476, "to": "mm"},
10278 "name": "PA_SC_PERFCOUNTER2_SELECT",
10279 "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
10283 "map": {"at": 222480, "to": "mm"},
10284 "name": "PA_SC_PERFCOUNTER3_SELECT",
10285 "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
10289 "map": {"at": 222484, "to": "mm"},
10290 "name": "PA_SC_PERFCOUNTER4_SELECT",
10291 "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
10295 "map": {"at": 222488, "to": "mm"},
10296 "name": "PA_SC_PERFCOUNTER5_SELECT",
10297 "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
10301 "map": {"at": 222492, "to": "mm"},
10302 "name": "PA_SC_PERFCOUNTER6_SELECT",
10303 "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
10307 "map": {"at": 222496, "to": "mm"},
10308 "name": "PA_SC_PERFCOUNTER7_SELECT",
10309 "type_ref": "PA_SC_PERFCOUNTER1_SELECT"
10313 "map": {"at": 222720, "to": "mm"},
10314 "name": "SPI_PERFCOUNTER0_SELECT",
10315 "type_ref": "IA_PERFCOUNTER0_SELECT"
10319 "map": {"at": 222724, "to": "mm"},
10320 "name": "SPI_PERFCOUNTER1_SELECT",
10321 "type_ref": "IA_PERFCOUNTER0_SELECT"
10325 "map": {"at": 222728, "to": "mm"},
10326 "name": "SPI_PERFCOUNTER2_SELECT",
10327 "type_ref": "IA_PERFCOUNTER0_SELECT"
10331 "map": {"at": 222732, "to": "mm"},
10332 "name": "SPI_PERFCOUNTER3_SELECT",
10333 "type_ref": "IA_PERFCOUNTER0_SELECT"
10337 "map": {"at": 222736, "to": "mm"},
10338 "name": "SPI_PERFCOUNTER0_SELECT1",
10339 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10343 "map": {"at": 222740, "to": "mm"},
10344 "name": "SPI_PERFCOUNTER1_SELECT1",
10345 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10349 "map": {"at": 222744, "to": "mm"},
10350 "name": "SPI_PERFCOUNTER2_SELECT1",
10351 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10355 "map": {"at": 222748, "to": "mm"},
10356 "name": "SPI_PERFCOUNTER3_SELECT1",
10357 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10361 "map": {"at": 222752, "to": "mm"},
10362 "name": "SPI_PERFCOUNTER4_SELECT",
10363 "type_ref": "SPI_PERFCOUNTER4_SELECT"
10367 "map": {"at": 222756, "to": "mm"},
10368 "name": "SPI_PERFCOUNTER5_SELECT",
10369 "type_ref": "SPI_PERFCOUNTER4_SELECT"
10373 "map": {"at": 222760, "to": "mm"},
10374 "name": "SPI_PERFCOUNTER_BINS",
10375 "type_ref": "SPI_PERFCOUNTER_BINS"
10379 "map": {"at": 222976, "to": "mm"},
10380 "name": "SQ_PERFCOUNTER0_SELECT",
10381 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10385 "map": {"at": 222980, "to": "mm"},
10386 "name": "SQ_PERFCOUNTER1_SELECT",
10387 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10391 "map": {"at": 222984, "to": "mm"},
10392 "name": "SQ_PERFCOUNTER2_SELECT",
10393 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10397 "map": {"at": 222988, "to": "mm"},
10398 "name": "SQ_PERFCOUNTER3_SELECT",
10399 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10403 "map": {"at": 222992, "to": "mm"},
10404 "name": "SQ_PERFCOUNTER4_SELECT",
10405 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10409 "map": {"at": 222996, "to": "mm"},
10410 "name": "SQ_PERFCOUNTER5_SELECT",
10411 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10415 "map": {"at": 223000, "to": "mm"},
10416 "name": "SQ_PERFCOUNTER6_SELECT",
10417 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10421 "map": {"at": 223004, "to": "mm"},
10422 "name": "SQ_PERFCOUNTER7_SELECT",
10423 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10427 "map": {"at": 223008, "to": "mm"},
10428 "name": "SQ_PERFCOUNTER8_SELECT",
10429 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10433 "map": {"at": 223012, "to": "mm"},
10434 "name": "SQ_PERFCOUNTER9_SELECT",
10435 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10439 "map": {"at": 223016, "to": "mm"},
10440 "name": "SQ_PERFCOUNTER10_SELECT",
10441 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10445 "map": {"at": 223020, "to": "mm"},
10446 "name": "SQ_PERFCOUNTER11_SELECT",
10447 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10451 "map": {"at": 223024, "to": "mm"},
10452 "name": "SQ_PERFCOUNTER12_SELECT",
10453 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10457 "map": {"at": 223028, "to": "mm"},
10458 "name": "SQ_PERFCOUNTER13_SELECT",
10459 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10463 "map": {"at": 223032, "to": "mm"},
10464 "name": "SQ_PERFCOUNTER14_SELECT",
10465 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10469 "map": {"at": 223036, "to": "mm"},
10470 "name": "SQ_PERFCOUNTER15_SELECT",
10471 "type_ref": "SQ_PERFCOUNTER0_SELECT"
10475 "map": {"at": 223104, "to": "mm"},
10476 "name": "SQ_PERFCOUNTER_CTRL",
10477 "type_ref": "SQ_PERFCOUNTER_CTRL"
10481 "map": {"at": 223108, "to": "mm"},
10482 "name": "SQ_PERFCOUNTER_MASK",
10483 "type_ref": "SQ_THREAD_TRACE_PERF_MASK"
10487 "map": {"at": 223112, "to": "mm"},
10488 "name": "SQ_PERFCOUNTER_CTRL2",
10489 "type_ref": "SQ_PERFCOUNTER_CTRL2"
10493 "map": {"at": 223488, "to": "mm"},
10494 "name": "SX_PERFCOUNTER0_SELECT",
10495 "type_ref": "IA_PERFCOUNTER0_SELECT"
10499 "map": {"at": 223492, "to": "mm"},
10500 "name": "SX_PERFCOUNTER1_SELECT",
10501 "type_ref": "IA_PERFCOUNTER0_SELECT"
10505 "map": {"at": 223496, "to": "mm"},
10506 "name": "SX_PERFCOUNTER2_SELECT",
10507 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10511 "map": {"at": 223500, "to": "mm"},
10512 "name": "SX_PERFCOUNTER3_SELECT",
10513 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10517 "map": {"at": 223504, "to": "mm"},
10518 "name": "SX_PERFCOUNTER0_SELECT1",
10519 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10523 "map": {"at": 223508, "to": "mm"},
10524 "name": "SX_PERFCOUNTER1_SELECT1",
10525 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10529 "map": {"at": 223744, "to": "mm"},
10530 "name": "GDS_PERFCOUNTER0_SELECT",
10531 "type_ref": "IA_PERFCOUNTER0_SELECT"
10535 "map": {"at": 223748, "to": "mm"},
10536 "name": "GDS_PERFCOUNTER1_SELECT",
10537 "type_ref": "IA_PERFCOUNTER0_SELECT"
10541 "map": {"at": 223752, "to": "mm"},
10542 "name": "GDS_PERFCOUNTER2_SELECT",
10543 "type_ref": "IA_PERFCOUNTER0_SELECT"
10547 "map": {"at": 223756, "to": "mm"},
10548 "name": "GDS_PERFCOUNTER3_SELECT",
10549 "type_ref": "IA_PERFCOUNTER0_SELECT"
10553 "map": {"at": 223760, "to": "mm"},
10554 "name": "GDS_PERFCOUNTER0_SELECT1",
10555 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10559 "map": {"at": 224000, "to": "mm"},
10560 "name": "TA_PERFCOUNTER0_SELECT",
10561 "type_ref": "TA_PERFCOUNTER0_SELECT"
10565 "map": {"at": 224004, "to": "mm"},
10566 "name": "TA_PERFCOUNTER0_SELECT1",
10567 "type_ref": "TA_PERFCOUNTER0_SELECT1"
10571 "map": {"at": 224008, "to": "mm"},
10572 "name": "TA_PERFCOUNTER1_SELECT",
10573 "type_ref": "TA_PERFCOUNTER1_SELECT"
10577 "map": {"at": 224256, "to": "mm"},
10578 "name": "TD_PERFCOUNTER0_SELECT",
10579 "type_ref": "TA_PERFCOUNTER0_SELECT"
10583 "map": {"at": 224260, "to": "mm"},
10584 "name": "TD_PERFCOUNTER0_SELECT1",
10585 "type_ref": "TA_PERFCOUNTER0_SELECT1"
10589 "map": {"at": 224264, "to": "mm"},
10590 "name": "TD_PERFCOUNTER1_SELECT",
10591 "type_ref": "TA_PERFCOUNTER1_SELECT"
10595 "map": {"at": 224512, "to": "mm"},
10596 "name": "TCP_PERFCOUNTER0_SELECT",
10597 "type_ref": "IA_PERFCOUNTER0_SELECT"
10601 "map": {"at": 224516, "to": "mm"},
10602 "name": "TCP_PERFCOUNTER0_SELECT1",
10603 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10607 "map": {"at": 224520, "to": "mm"},
10608 "name": "TCP_PERFCOUNTER1_SELECT",
10609 "type_ref": "IA_PERFCOUNTER0_SELECT"
10613 "map": {"at": 224524, "to": "mm"},
10614 "name": "TCP_PERFCOUNTER1_SELECT1",
10615 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10619 "map": {"at": 224528, "to": "mm"},
10620 "name": "TCP_PERFCOUNTER2_SELECT",
10621 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10625 "map": {"at": 224532, "to": "mm"},
10626 "name": "TCP_PERFCOUNTER3_SELECT",
10627 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10631 "map": {"at": 224768, "to": "mm"},
10632 "name": "TCC_PERFCOUNTER0_SELECT",
10633 "type_ref": "IA_PERFCOUNTER0_SELECT"
10637 "map": {"at": 224772, "to": "mm"},
10638 "name": "TCC_PERFCOUNTER0_SELECT1",
10639 "type_ref": "TCC_PERFCOUNTER0_SELECT1"
10643 "map": {"at": 224776, "to": "mm"},
10644 "name": "TCC_PERFCOUNTER1_SELECT",
10645 "type_ref": "IA_PERFCOUNTER0_SELECT"
10649 "map": {"at": 224780, "to": "mm"},
10650 "name": "TCC_PERFCOUNTER1_SELECT1",
10651 "type_ref": "TCC_PERFCOUNTER0_SELECT1"
10655 "map": {"at": 224784, "to": "mm"},
10656 "name": "TCC_PERFCOUNTER2_SELECT",
10657 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10661 "map": {"at": 224788, "to": "mm"},
10662 "name": "TCC_PERFCOUNTER3_SELECT",
10663 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10667 "map": {"at": 224832, "to": "mm"},
10668 "name": "TCA_PERFCOUNTER0_SELECT",
10669 "type_ref": "IA_PERFCOUNTER0_SELECT"
10673 "map": {"at": 224836, "to": "mm"},
10674 "name": "TCA_PERFCOUNTER0_SELECT1",
10675 "type_ref": "TCC_PERFCOUNTER0_SELECT1"
10679 "map": {"at": 224840, "to": "mm"},
10680 "name": "TCA_PERFCOUNTER1_SELECT",
10681 "type_ref": "IA_PERFCOUNTER0_SELECT"
10685 "map": {"at": 224844, "to": "mm"},
10686 "name": "TCA_PERFCOUNTER1_SELECT1",
10687 "type_ref": "TCC_PERFCOUNTER0_SELECT1"
10691 "map": {"at": 224848, "to": "mm"},
10692 "name": "TCA_PERFCOUNTER2_SELECT",
10693 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10697 "map": {"at": 224852, "to": "mm"},
10698 "name": "TCA_PERFCOUNTER3_SELECT",
10699 "type_ref": "PA_SU_PERFCOUNTER2_SELECT"
10703 "map": {"at": 225280, "to": "mm"},
10704 "name": "CB_PERFCOUNTER_FILTER",
10705 "type_ref": "CB_PERFCOUNTER_FILTER"
10709 "map": {"at": 225284, "to": "mm"},
10710 "name": "CB_PERFCOUNTER0_SELECT",
10711 "type_ref": "CB_PERFCOUNTER0_SELECT"
10715 "map": {"at": 225288, "to": "mm"},
10716 "name": "CB_PERFCOUNTER0_SELECT1",
10717 "type_ref": "CB_PERFCOUNTER0_SELECT1"
10721 "map": {"at": 225292, "to": "mm"},
10722 "name": "CB_PERFCOUNTER1_SELECT",
10723 "type_ref": "CB_PERFCOUNTER1_SELECT"
10727 "map": {"at": 225296, "to": "mm"},
10728 "name": "CB_PERFCOUNTER2_SELECT",
10729 "type_ref": "CB_PERFCOUNTER1_SELECT"
10733 "map": {"at": 225300, "to": "mm"},
10734 "name": "CB_PERFCOUNTER3_SELECT",
10735 "type_ref": "CB_PERFCOUNTER1_SELECT"
10739 "map": {"at": 225536, "to": "mm"},
10740 "name": "DB_PERFCOUNTER0_SELECT",
10741 "type_ref": "IA_PERFCOUNTER0_SELECT"
10745 "map": {"at": 225540, "to": "mm"},
10746 "name": "DB_PERFCOUNTER0_SELECT1",
10747 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10751 "map": {"at": 225544, "to": "mm"},
10752 "name": "DB_PERFCOUNTER1_SELECT",
10753 "type_ref": "IA_PERFCOUNTER0_SELECT"
10757 "map": {"at": 225548, "to": "mm"},
10758 "name": "DB_PERFCOUNTER1_SELECT1",
10759 "type_ref": "IA_PERFCOUNTER0_SELECT1"
10763 "map": {"at": 225552, "to": "mm"},
10764 "name": "DB_PERFCOUNTER2_SELECT",
10765 "type_ref": "IA_PERFCOUNTER0_SELECT"
10769 "map": {"at": 225560, "to": "mm"},
10770 "name": "DB_PERFCOUNTER3_SELECT",
10771 "type_ref": "IA_PERFCOUNTER0_SELECT"
10775 "map": {"at": 225792, "to": "mm"},
10776 "name": "RLC_SPM_PERFMON_CNTL",
10777 "type_ref": "RLC_SPM_PERFMON_CNTL"
10781 "map": {"at": 225796, "to": "mm"},
10782 "name": "RLC_SPM_PERFMON_RING_BASE_LO",
10783 "type_ref": "RLC_SPM_PERFMON_RING_BASE_LO"
10787 "map": {"at": 225800, "to": "mm"},
10788 "name": "RLC_SPM_PERFMON_RING_BASE_HI",
10789 "type_ref": "RLC_SPM_PERFMON_RING_BASE_HI"
10793 "map": {"at": 225804, "to": "mm"},
10794 "name": "RLC_SPM_PERFMON_RING_SIZE",
10795 "type_ref": "RLC_SPM_PERFMON_RING_SIZE"
10799 "map": {"at": 225808, "to": "mm"},
10800 "name": "RLC_SPM_PERFMON_SEGMENT_SIZE",
10801 "type_ref": "RLC_SPM_PERFMON_SEGMENT_SIZE"
10805 "map": {"at": 225812, "to": "mm"},
10806 "name": "RLC_SPM_SE_MUXSEL_ADDR",
10807 "type_ref": "RLC_SPM_SE_MUXSEL_ADDR"
10811 "map": {"at": 225816, "to": "mm"},
10812 "name": "RLC_SPM_SE_MUXSEL_DATA",
10813 "type_ref": "RLC_SPM_SE_MUXSEL_DATA"
10817 "map": {"at": 225820, "to": "mm"},
10818 "name": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY",
10819 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10823 "map": {"at": 225824, "to": "mm"},
10824 "name": "RLC_SPM_CPC_PERFMON_SAMPLE_DELAY",
10825 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10829 "map": {"at": 225828, "to": "mm"},
10830 "name": "RLC_SPM_CPF_PERFMON_SAMPLE_DELAY",
10831 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10835 "map": {"at": 225832, "to": "mm"},
10836 "name": "RLC_SPM_CB_PERFMON_SAMPLE_DELAY",
10837 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10841 "map": {"at": 225836, "to": "mm"},
10842 "name": "RLC_SPM_DB_PERFMON_SAMPLE_DELAY",
10843 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10847 "map": {"at": 225840, "to": "mm"},
10848 "name": "RLC_SPM_PA_PERFMON_SAMPLE_DELAY",
10849 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10853 "map": {"at": 225844, "to": "mm"},
10854 "name": "RLC_SPM_GDS_PERFMON_SAMPLE_DELAY",
10855 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10859 "map": {"at": 225848, "to": "mm"},
10860 "name": "RLC_SPM_IA_PERFMON_SAMPLE_DELAY",
10861 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10865 "map": {"at": 225856, "to": "mm"},
10866 "name": "RLC_SPM_SC_PERFMON_SAMPLE_DELAY",
10867 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10871 "map": {"at": 225860, "to": "mm"},
10872 "name": "RLC_SPM_TCC_PERFMON_SAMPLE_DELAY",
10873 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10877 "map": {"at": 225864, "to": "mm"},
10878 "name": "RLC_SPM_TCA_PERFMON_SAMPLE_DELAY",
10879 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10883 "map": {"at": 225868, "to": "mm"},
10884 "name": "RLC_SPM_TCP_PERFMON_SAMPLE_DELAY",
10885 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10889 "map": {"at": 225872, "to": "mm"},
10890 "name": "RLC_SPM_TA_PERFMON_SAMPLE_DELAY",
10891 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10895 "map": {"at": 225876, "to": "mm"},
10896 "name": "RLC_SPM_TD_PERFMON_SAMPLE_DELAY",
10897 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10901 "map": {"at": 225880, "to": "mm"},
10902 "name": "RLC_SPM_VGT_PERFMON_SAMPLE_DELAY",
10903 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10907 "map": {"at": 225884, "to": "mm"},
10908 "name": "RLC_SPM_SPI_PERFMON_SAMPLE_DELAY",
10909 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10913 "map": {"at": 225888, "to": "mm"},
10914 "name": "RLC_SPM_SQG_PERFMON_SAMPLE_DELAY",
10915 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10919 "map": {"at": 225896, "to": "mm"},
10920 "name": "RLC_SPM_SX_PERFMON_SAMPLE_DELAY",
10921 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10925 "map": {"at": 225900, "to": "mm"},
10926 "name": "RLC_SPM_GLOBAL_MUXSEL_ADDR",
10927 "type_ref": "RLC_SPM_SE_MUXSEL_ADDR"
10931 "map": {"at": 225904, "to": "mm"},
10932 "name": "RLC_SPM_GLOBAL_MUXSEL_DATA",
10933 "type_ref": "RLC_SPM_SE_MUXSEL_DATA"
10937 "map": {"at": 225908, "to": "mm"},
10938 "name": "RLC_SPM_RING_RDPTR",
10939 "type_ref": "RLC_SPM_RING_RDPTR"
10943 "map": {"at": 225912, "to": "mm"},
10944 "name": "RLC_SPM_SEGMENT_THRESHOLD",
10945 "type_ref": "RLC_SPM_SEGMENT_THRESHOLD"
10949 "map": {"at": 225932, "to": "mm"},
10950 "name": "RLC_SPM_RMI_PERFMON_SAMPLE_DELAY",
10951 "type_ref": "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY"
10955 "map": {"at": 225936, "to": "mm"},
10956 "name": "RLC_SPM_PERFMON_SAMPLE_DELAY_MAX",
10957 "type_ref": "RLC_SPM_PERFMON_SAMPLE_DELAY_MAX"
10961 "map": {"at": 226040, "to": "mm"},
10962 "name": "RLC_PERFMON_CLK_CNTL_UCODE",
10963 "type_ref": "RLC_PERFMON_CLK_CNTL_UCODE"
10967 "map": {"at": 226044, "to": "mm"},
10968 "name": "RLC_PERFMON_CLK_CNTL",
10969 "type_ref": "RLC_PERFMON_CLK_CNTL_UCODE"
10973 "map": {"at": 226048, "to": "mm"},
10974 "name": "RLC_PERFMON_CNTL",
10975 "type_ref": "RLC_PERFMON_CNTL"
10979 "map": {"at": 226052, "to": "mm"},
10980 "name": "RLC_PERFCOUNTER0_SELECT",
10981 "type_ref": "RLC_PERFCOUNTER0_SELECT"
10985 "map": {"at": 226056, "to": "mm"},
10986 "name": "RLC_PERFCOUNTER1_SELECT",
10987 "type_ref": "RLC_PERFCOUNTER0_SELECT"
10991 "map": {"at": 226060, "to": "mm"},
10992 "name": "RLC_GPU_IOV_PERF_CNT_CNTL",
10993 "type_ref": "RLC_GPU_IOV_PERF_CNT_CNTL"
10997 "map": {"at": 226064, "to": "mm"},
10998 "name": "RLC_GPU_IOV_PERF_CNT_WR_ADDR",
10999 "type_ref": "RLC_GPU_IOV_PERF_CNT_WR_ADDR"
11003 "map": {"at": 226068, "to": "mm"},
11004 "name": "RLC_GPU_IOV_PERF_CNT_WR_DATA",
11005 "type_ref": "COMPUTE_VMID"
11009 "map": {"at": 226072, "to": "mm"},
11010 "name": "RLC_GPU_IOV_PERF_CNT_RD_ADDR",
11011 "type_ref": "RLC_GPU_IOV_PERF_CNT_WR_ADDR"
11015 "map": {"at": 226076, "to": "mm"},
11016 "name": "RLC_GPU_IOV_PERF_CNT_RD_DATA",
11017 "type_ref": "COMPUTE_VMID"
11021 "map": {"at": 226304, "to": "mm"},
11022 "name": "RMI_PERFCOUNTER0_SELECT",
11023 "type_ref": "CB_PERFCOUNTER0_SELECT"
11027 "map": {"at": 226308, "to": "mm"},
11028 "name": "RMI_PERFCOUNTER0_SELECT1",
11029 "type_ref": "CB_PERFCOUNTER0_SELECT1"
11033 "map": {"at": 226312, "to": "mm"},
11034 "name": "RMI_PERFCOUNTER1_SELECT",
11035 "type_ref": "CB_PERFCOUNTER1_SELECT"
11039 "map": {"at": 226316, "to": "mm"},
11040 "name": "RMI_PERFCOUNTER2_SELECT",
11041 "type_ref": "CB_PERFCOUNTER0_SELECT"
11045 "map": {"at": 226320, "to": "mm"},
11046 "name": "RMI_PERFCOUNTER2_SELECT1",
11047 "type_ref": "CB_PERFCOUNTER0_SELECT1"
11051 "map": {"at": 226324, "to": "mm"},
11052 "name": "RMI_PERFCOUNTER3_SELECT",
11053 "type_ref": "CB_PERFCOUNTER1_SELECT"
11057 "map": {"at": 226328, "to": "mm"},
11058 "name": "RMI_PERF_COUNTER_CNTL",
11059 "type_ref": "RMI_PERF_COUNTER_CNTL"
11063 "map": {"at": 226560, "to": "mm"},
11064 "name": "ATC_L2_PERFCOUNTER0_CFG",
11065 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11069 "map": {"at": 226564, "to": "mm"},
11070 "name": "ATC_L2_PERFCOUNTER1_CFG",
11071 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11075 "map": {"at": 226568, "to": "mm"},
11076 "name": "ATC_L2_PERFCOUNTER_RSLT_CNTL",
11077 "type_ref": "ATC_L2_PERFCOUNTER_RSLT_CNTL"
11081 "map": {"at": 226608, "to": "mm"},
11082 "name": "MC_VM_L2_PERFCOUNTER0_CFG",
11083 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11087 "map": {"at": 226612, "to": "mm"},
11088 "name": "MC_VM_L2_PERFCOUNTER1_CFG",
11089 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11093 "map": {"at": 226616, "to": "mm"},
11094 "name": "MC_VM_L2_PERFCOUNTER2_CFG",
11095 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11099 "map": {"at": 226620, "to": "mm"},
11100 "name": "MC_VM_L2_PERFCOUNTER3_CFG",
11101 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11105 "map": {"at": 226624, "to": "mm"},
11106 "name": "MC_VM_L2_PERFCOUNTER4_CFG",
11107 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11111 "map": {"at": 226628, "to": "mm"},
11112 "name": "MC_VM_L2_PERFCOUNTER5_CFG",
11113 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11117 "map": {"at": 226632, "to": "mm"},
11118 "name": "MC_VM_L2_PERFCOUNTER6_CFG",
11119 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11123 "map": {"at": 226636, "to": "mm"},
11124 "name": "MC_VM_L2_PERFCOUNTER7_CFG",
11125 "type_ref": "ATC_L2_PERFCOUNTER0_CFG"
11129 "map": {"at": 226640, "to": "mm"},
11130 "name": "MC_VM_L2_PERFCOUNTER_RSLT_CNTL",
11131 "type_ref": "ATC_L2_PERFCOUNTER_RSLT_CNTL"
11134 "register_types": {
11135 "ATC_L2_PERFCOUNTER0_CFG": {
11137 {"bits": [0, 7], "name": "PERF_SEL"},
11138 {"bits": [8, 15], "name": "PERF_SEL_END"},
11139 {"bits": [24, 27], "name": "PERF_MODE"},
11140 {"bits": [28, 28], "name": "ENABLE"},
11141 {"bits": [29, 29], "name": "CLEAR"}
11144 "ATC_L2_PERFCOUNTER_HI": {
11146 {"bits": [0, 15], "name": "COUNTER_HI"},
11147 {"bits": [16, 31], "name": "COMPARE_VALUE"}
11150 "ATC_L2_PERFCOUNTER_LO": {
11152 {"bits": [0, 31], "name": "COUNTER_LO"}
11155 "ATC_L2_PERFCOUNTER_RSLT_CNTL": {
11157 {"bits": [0, 3], "name": "PERF_COUNTER_SELECT"},
11158 {"bits": [8, 15], "name": "START_TRIGGER"},
11159 {"bits": [16, 23], "name": "STOP_TRIGGER"},
11160 {"bits": [24, 24], "name": "ENABLE_ANY"},
11161 {"bits": [25, 25], "name": "CLEAR_ALL"},
11162 {"bits": [26, 26], "name": "STOP_ALL_ON_SATURATE"}
11165 "CB_BLEND0_CONTROL": {
11167 {"bits": [0, 4], "enum_ref": "BlendOp", "name": "COLOR_SRCBLEND"},
11168 {"bits": [5, 7], "enum_ref": "CombFunc", "name": "COLOR_COMB_FCN"},
11169 {"bits": [8, 12], "enum_ref": "BlendOp", "name": "COLOR_DESTBLEND"},
11170 {"bits": [16, 20], "enum_ref": "BlendOp", "name": "ALPHA_SRCBLEND"},
11171 {"bits": [21, 23], "enum_ref": "CombFunc", "name": "ALPHA_COMB_FCN"},
11172 {"bits": [24, 28], "enum_ref": "BlendOp", "name": "ALPHA_DESTBLEND"},
11173 {"bits": [29, 29], "name": "SEPARATE_ALPHA_BLEND"},
11174 {"bits": [30, 30], "name": "ENABLE"},
11175 {"bits": [31, 31], "name": "DISABLE_ROP3"}
11178 "CB_BLEND_ALPHA": {
11180 {"bits": [0, 31], "name": "BLEND_ALPHA"}
11185 {"bits": [0, 31], "name": "BLEND_BLUE"}
11188 "CB_BLEND_GREEN": {
11190 {"bits": [0, 31], "name": "BLEND_GREEN"}
11195 {"bits": [0, 31], "name": "BLEND_RED"}
11198 "CB_COLOR0_ATTRIB": {
11200 {"bits": [0, 10], "name": "MIP0_DEPTH"},
11201 {"bits": [11, 11], "name": "META_LINEAR"},
11202 {"bits": [12, 14], "name": "NUM_SAMPLES"},
11203 {"bits": [15, 16], "name": "NUM_FRAGMENTS"},
11204 {"bits": [17, 17], "name": "FORCE_DST_ALPHA_1"},
11205 {"bits": [18, 22], "name": "COLOR_SW_MODE"},
11206 {"bits": [23, 27], "name": "FMASK_SW_MODE"},
11207 {"bits": [28, 29], "name": "RESOURCE_TYPE"},
11208 {"bits": [30, 30], "name": "RB_ALIGNED"},
11209 {"bits": [31, 31], "name": "PIPE_ALIGNED"}
11212 "CB_COLOR0_ATTRIB2": {
11214 {"bits": [0, 13], "name": "MIP0_HEIGHT"},
11215 {"bits": [14, 27], "name": "MIP0_WIDTH"},
11216 {"bits": [28, 31], "name": "MAX_MIP"}
11219 "CB_COLOR0_BASE_EXT": {
11221 {"bits": [0, 7], "name": "BASE_256B"}
11224 "CB_COLOR0_CLEAR_WORD0": {
11226 {"bits": [0, 31], "name": "CLEAR_WORD0"}
11229 "CB_COLOR0_CLEAR_WORD1": {
11231 {"bits": [0, 31], "name": "CLEAR_WORD1"}
11234 "CB_COLOR0_DCC_CONTROL": {
11236 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
11237 {"bits": [1, 1], "name": "KEY_CLEAR_ENABLE"},
11238 {"bits": [2, 3], "enum_ref": "CB_COLOR_DCC_CONTROL__MAX_UNCOMPRESSED_BLOCK_SIZE", "name": "MAX_UNCOMPRESSED_BLOCK_SIZE"},
11239 {"bits": [4, 4], "enum_ref": "CB_COLOR_DCC_CONTROL__MIN_COMPRESSED_BLOCK_SIZE", "name": "MIN_COMPRESSED_BLOCK_SIZE"},
11240 {"bits": [5, 6], "name": "MAX_COMPRESSED_BLOCK_SIZE"},
11241 {"bits": [7, 8], "name": "COLOR_TRANSFORM"},
11242 {"bits": [9, 9], "name": "INDEPENDENT_64B_BLOCKS"},
11243 {"bits": [10, 13], "name": "LOSSY_RGB_PRECISION"},
11244 {"bits": [14, 17], "name": "LOSSY_ALPHA_PRECISION"},
11245 {"bits": [18, 18], "name": "DISABLE_CONSTANT_ENCODE_REG"},
11246 {"bits": [19, 19], "name": "ENABLE_CONSTANT_ENCODE_REG_WRITE"}
11249 "CB_COLOR0_INFO": {
11251 {"bits": [0, 1], "enum_ref": "SurfaceEndian", "name": "ENDIAN"},
11252 {"bits": [2, 6], "enum_ref": "ColorFormat", "name": "FORMAT"},
11253 {"bits": [8, 10], "enum_ref": "SurfaceNumber", "name": "NUMBER_TYPE"},
11254 {"bits": [11, 12], "enum_ref": "SurfaceSwap", "name": "COMP_SWAP"},
11255 {"bits": [13, 13], "name": "FAST_CLEAR"},
11256 {"bits": [14, 14], "name": "COMPRESSION"},
11257 {"bits": [15, 15], "name": "BLEND_CLAMP"},
11258 {"bits": [16, 16], "name": "BLEND_BYPASS"},
11259 {"bits": [17, 17], "name": "SIMPLE_FLOAT"},
11260 {"bits": [18, 18], "name": "ROUND_MODE"},
11261 {"bits": [20, 22], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DONT_RD_DST"},
11262 {"bits": [23, 25], "enum_ref": "BlendOpt", "name": "BLEND_OPT_DISCARD_PIXEL"},
11263 {"bits": [26, 26], "name": "FMASK_COMPRESSION_DISABLE"},
11264 {"bits": [27, 27], "name": "FMASK_COMPRESS_1FRAG_ONLY"},
11265 {"bits": [28, 28], "name": "DCC_ENABLE"},
11266 {"bits": [29, 30], "enum_ref": "CmaskAddr", "name": "CMASK_ADDR_TYPE"}
11269 "CB_COLOR0_VIEW": {
11271 {"bits": [0, 10], "name": "SLICE_START"},
11272 {"bits": [13, 23], "name": "SLICE_MAX"},
11273 {"bits": [24, 27], "name": "MIP_LEVEL"}
11276 "CB_COLOR_CONTROL": {
11278 {"bits": [0, 0], "name": "DISABLE_DUAL_QUAD"},
11279 {"bits": [3, 3], "name": "DEGAMMA_ENABLE"},
11280 {"bits": [4, 6], "enum_ref": "CBMode", "name": "MODE"},
11281 {"bits": [16, 23], "enum_ref": "ROP3", "name": "ROP3"}
11284 "CB_DCC_CONTROL": {
11286 {"bits": [0, 0], "name": "OVERWRITE_COMBINER_DISABLE"},
11287 {"bits": [1, 1], "name": "OVERWRITE_COMBINER_MRT_SHARING_DISABLE"},
11288 {"bits": [2, 6], "name": "OVERWRITE_COMBINER_WATERMARK"},
11289 {"bits": [8, 8], "name": "DISABLE_CONSTANT_ENCODE_AC01"},
11290 {"bits": [9, 9], "name": "DISABLE_CONSTANT_ENCODE_SINGLE"},
11291 {"bits": [10, 10], "name": "DISABLE_CONSTANT_ENCODE_REG"},
11292 {"bits": [12, 12], "name": "DISABLE_ELIMFC_SKIP_OF_AC01"},
11293 {"bits": [13, 13], "name": "DISABLE_ELIMFC_SKIP_OF_SINGLE"},
11294 {"bits": [14, 14], "name": "ENABLE_ELIMFC_SKIP_OF_REG"}
11297 "CB_PERFCOUNTER0_SELECT": {
11299 {"bits": [0, 8], "name": "PERF_SEL"},
11300 {"bits": [10, 18], "name": "PERF_SEL1"},
11301 {"bits": [20, 23], "name": "CNTR_MODE"},
11302 {"bits": [24, 27], "name": "PERF_MODE1"},
11303 {"bits": [28, 31], "name": "PERF_MODE"}
11306 "CB_PERFCOUNTER0_SELECT1": {
11308 {"bits": [0, 8], "name": "PERF_SEL2"},
11309 {"bits": [10, 18], "name": "PERF_SEL3"},
11310 {"bits": [24, 27], "name": "PERF_MODE3"},
11311 {"bits": [28, 31], "name": "PERF_MODE2"}
11314 "CB_PERFCOUNTER1_SELECT": {
11316 {"bits": [0, 8], "name": "PERF_SEL"},
11317 {"bits": [28, 31], "name": "PERF_MODE"}
11320 "CB_PERFCOUNTER_FILTER": {
11322 {"bits": [0, 0], "name": "OP_FILTER_ENABLE"},
11323 {"bits": [1, 3], "enum_ref": "CBPerfOpFilterSel", "name": "OP_FILTER_SEL"},
11324 {"bits": [4, 4], "name": "FORMAT_FILTER_ENABLE"},
11325 {"bits": [5, 9], "name": "FORMAT_FILTER_SEL"},
11326 {"bits": [10, 10], "name": "CLEAR_FILTER_ENABLE"},
11327 {"bits": [11, 11], "enum_ref": "CBPerfClearFilterSel", "name": "CLEAR_FILTER_SEL"},
11328 {"bits": [12, 12], "name": "MRT_FILTER_ENABLE"},
11329 {"bits": [13, 15], "name": "MRT_FILTER_SEL"},
11330 {"bits": [17, 17], "name": "NUM_SAMPLES_FILTER_ENABLE"},
11331 {"bits": [18, 20], "name": "NUM_SAMPLES_FILTER_SEL"},
11332 {"bits": [21, 21], "name": "NUM_FRAGMENTS_FILTER_ENABLE"},
11333 {"bits": [22, 23], "name": "NUM_FRAGMENTS_FILTER_SEL"}
11336 "CB_SHADER_MASK": {
11338 {"bits": [0, 3], "name": "OUTPUT0_ENABLE"},
11339 {"bits": [4, 7], "name": "OUTPUT1_ENABLE"},
11340 {"bits": [8, 11], "name": "OUTPUT2_ENABLE"},
11341 {"bits": [12, 15], "name": "OUTPUT3_ENABLE"},
11342 {"bits": [16, 19], "name": "OUTPUT4_ENABLE"},
11343 {"bits": [20, 23], "name": "OUTPUT5_ENABLE"},
11344 {"bits": [24, 27], "name": "OUTPUT6_ENABLE"},
11345 {"bits": [28, 31], "name": "OUTPUT7_ENABLE"}
11348 "CB_TARGET_MASK": {
11350 {"bits": [0, 3], "name": "TARGET0_ENABLE"},
11351 {"bits": [4, 7], "name": "TARGET1_ENABLE"},
11352 {"bits": [8, 11], "name": "TARGET2_ENABLE"},
11353 {"bits": [12, 15], "name": "TARGET3_ENABLE"},
11354 {"bits": [16, 19], "name": "TARGET4_ENABLE"},
11355 {"bits": [20, 23], "name": "TARGET5_ENABLE"},
11356 {"bits": [24, 27], "name": "TARGET6_ENABLE"},
11357 {"bits": [28, 31], "name": "TARGET7_ENABLE"}
11360 "COHER_DEST_BASE_2": {
11362 {"bits": [0, 31], "name": "DEST_BASE_256B"}
11365 "COHER_DEST_BASE_HI_0": {
11367 {"bits": [0, 7], "name": "DEST_BASE_HI_256B"}
11372 {"bits": [0, 31], "name": "SIZE"}
11375 "COMPUTE_DISPATCH_ID": {
11377 {"bits": [0, 31], "name": "DISPATCH_ID"}
11380 "COMPUTE_DISPATCH_INITIATOR": {
11382 {"bits": [0, 0], "name": "COMPUTE_SHADER_EN"},
11383 {"bits": [1, 1], "name": "PARTIAL_TG_EN"},
11384 {"bits": [2, 2], "name": "FORCE_START_AT_000"},
11385 {"bits": [3, 3], "name": "ORDERED_APPEND_ENBL"},
11386 {"bits": [4, 4], "name": "ORDERED_APPEND_MODE"},
11387 {"bits": [5, 5], "name": "USE_THREAD_DIMENSIONS"},
11388 {"bits": [6, 6], "name": "ORDER_MODE"},
11389 {"bits": [10, 10], "name": "SCALAR_L1_INV_VOL"},
11390 {"bits": [11, 11], "name": "VECTOR_L1_INV_VOL"},
11391 {"bits": [12, 12], "name": "RESERVED"},
11392 {"bits": [14, 14], "name": "RESTORE"}
11395 "COMPUTE_MISC_RESERVED": {
11397 {"bits": [0, 1], "name": "SEND_SEID"},
11398 {"bits": [2, 2], "name": "RESERVED2"},
11399 {"bits": [3, 3], "name": "RESERVED3"},
11400 {"bits": [4, 4], "name": "RESERVED4"},
11401 {"bits": [5, 16], "name": "WAVE_ID_BASE"}
11404 "COMPUTE_NUM_THREAD_X": {
11406 {"bits": [0, 15], "name": "NUM_THREAD_FULL"},
11407 {"bits": [16, 31], "name": "NUM_THREAD_PARTIAL"}
11410 "COMPUTE_PERFCOUNT_ENABLE": {
11412 {"bits": [0, 0], "name": "PERFCOUNT_ENABLE"}
11415 "COMPUTE_PGM_HI": {
11417 {"bits": [0, 7], "name": "DATA"}
11420 "COMPUTE_PGM_RSRC1": {
11422 {"bits": [0, 5], "name": "VGPRS"},
11423 {"bits": [6, 9], "name": "SGPRS"},
11424 {"bits": [10, 11], "name": "PRIORITY"},
11425 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
11426 {"bits": [20, 20], "name": "PRIV"},
11427 {"bits": [21, 21], "name": "DX10_CLAMP"},
11428 {"bits": [22, 22], "name": "DEBUG_MODE"},
11429 {"bits": [23, 23], "name": "IEEE_MODE"},
11430 {"bits": [24, 24], "name": "BULKY"},
11431 {"bits": [25, 25], "name": "CDBG_USER"},
11432 {"bits": [26, 26], "name": "FP16_OVFL"}
11435 "COMPUTE_PGM_RSRC2": {
11437 {"bits": [0, 0], "name": "SCRATCH_EN"},
11438 {"bits": [1, 5], "name": "USER_SGPR"},
11439 {"bits": [6, 6], "name": "TRAP_PRESENT"},
11440 {"bits": [7, 7], "name": "TGID_X_EN"},
11441 {"bits": [8, 8], "name": "TGID_Y_EN"},
11442 {"bits": [9, 9], "name": "TGID_Z_EN"},
11443 {"bits": [10, 10], "name": "TG_SIZE_EN"},
11444 {"bits": [11, 12], "name": "TIDIG_COMP_CNT"},
11445 {"bits": [13, 14], "name": "EXCP_EN_MSB"},
11446 {"bits": [15, 23], "name": "LDS_SIZE"},
11447 {"bits": [24, 30], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
11448 {"bits": [31, 31], "name": "SKIP_USGPR0"}
11451 "COMPUTE_PIPELINESTAT_ENABLE": {
11453 {"bits": [0, 0], "name": "PIPELINESTAT_ENABLE"}
11456 "COMPUTE_RELAUNCH": {
11458 {"bits": [0, 29], "name": "PAYLOAD"},
11459 {"bits": [30, 30], "name": "IS_EVENT"},
11460 {"bits": [31, 31], "name": "IS_STATE"}
11463 "COMPUTE_RESOURCE_LIMITS": {
11465 {"bits": [0, 9], "name": "WAVES_PER_SH"},
11466 {"bits": [12, 15], "name": "TG_PER_CU"},
11467 {"bits": [16, 21], "name": "LOCK_THRESHOLD"},
11468 {"bits": [22, 22], "name": "SIMD_DEST_CNTL"},
11469 {"bits": [23, 23], "name": "FORCE_SIMD_DIST"},
11470 {"bits": [24, 26], "name": "CU_GROUP_COUNT"},
11471 {"bits": [27, 30], "name": "SIMD_DISABLE"}
11474 "COMPUTE_RESTART_X": {
11476 {"bits": [0, 31], "name": "RESTART"}
11479 "COMPUTE_SHADER_CHKSUM": {
11481 {"bits": [0, 31], "name": "CHECKSUM"}
11484 "COMPUTE_START_X": {
11486 {"bits": [0, 31], "name": "START"}
11489 "COMPUTE_STATIC_THREAD_MGMT_SE0": {
11491 {"bits": [0, 15], "name": "SH0_CU_EN"},
11492 {"bits": [16, 31], "name": "SH1_CU_EN"}
11495 "COMPUTE_THREADGROUP_ID": {
11497 {"bits": [0, 31], "name": "THREADGROUP_ID"}
11500 "COMPUTE_THREAD_TRACE_ENABLE": {
11502 {"bits": [0, 0], "name": "THREAD_TRACE_ENABLE"}
11505 "COMPUTE_TMPRING_SIZE": {
11507 {"bits": [0, 11], "name": "WAVES"},
11508 {"bits": [12, 24], "name": "WAVESIZE"}
11513 {"bits": [0, 3], "name": "DATA"}
11516 "COMPUTE_WAVE_RESTORE_ADDR_HI": {
11518 {"bits": [0, 15], "name": "ADDR"}
11521 "COMPUTE_WAVE_RESTORE_ADDR_LO": {
11523 {"bits": [0, 31], "name": "ADDR"}
11526 "CPC_LATENCY_STATS_SELECT": {
11528 {"bits": [0, 2], "name": "INDEX"},
11529 {"bits": [30, 30], "name": "CLEAR"},
11530 {"bits": [31, 31], "name": "ENABLE"}
11533 "CPF_LATENCY_STATS_SELECT": {
11535 {"bits": [0, 3], "name": "INDEX"},
11536 {"bits": [30, 30], "name": "CLEAR"},
11537 {"bits": [31, 31], "name": "ENABLE"}
11540 "CPF_TC_PERF_COUNTER_WINDOW_SELECT": {
11542 {"bits": [0, 2], "name": "INDEX"},
11543 {"bits": [30, 30], "name": "ALWAYS"},
11544 {"bits": [31, 31], "name": "ENABLE"}
11547 "CPG_LATENCY_STATS_SELECT": {
11549 {"bits": [0, 4], "name": "INDEX"},
11550 {"bits": [30, 30], "name": "CLEAR"},
11551 {"bits": [31, 31], "name": "ENABLE"}
11554 "CPG_PERFCOUNTER0_SELECT1": {
11556 {"bits": [0, 9], "name": "CNTR_SEL2"},
11557 {"bits": [10, 19], "name": "CNTR_SEL3"},
11558 {"bits": [24, 27], "name": "CNTR_MODE3"},
11559 {"bits": [28, 31], "name": "CNTR_MODE2"}
11562 "CPG_PERFCOUNTER1_HI": {
11564 {"bits": [0, 31], "name": "PERFCOUNTER_HI"}
11567 "CPG_PERFCOUNTER1_LO": {
11569 {"bits": [0, 31], "name": "PERFCOUNTER_LO"}
11572 "CPG_PERFCOUNTER1_SELECT": {
11574 {"bits": [0, 9], "name": "CNTR_SEL0"},
11575 {"bits": [10, 19], "name": "CNTR_SEL1"},
11576 {"bits": [20, 23], "name": "SPM_MODE"},
11577 {"bits": [24, 27], "name": "CNTR_MODE1"},
11578 {"bits": [28, 31], "name": "CNTR_MODE0"}
11581 "CPG_TC_PERF_COUNTER_WINDOW_SELECT": {
11583 {"bits": [0, 4], "name": "INDEX"},
11584 {"bits": [30, 30], "name": "ALWAYS"},
11585 {"bits": [31, 31], "name": "ENABLE"}
11588 "CP_APPEND_ADDR_HI": {
11590 {"bits": [0, 15], "name": "MEM_ADDR_HI"},
11591 {"bits": [16, 16], "name": "CS_PS_SEL"},
11592 {"bits": [25, 25], "name": "CACHE_POLICY"},
11593 {"bits": [29, 31], "name": "COMMAND"}
11596 "CP_APPEND_ADDR_LO": {
11598 {"bits": [2, 31], "name": "MEM_ADDR_LO"}
11601 "CP_APPEND_LAST_CS_FENCE_HI": {
11603 {"bits": [0, 31], "name": "LAST_FENCE"}
11608 {"bits": [0, 31], "name": "CONST_ENGINE_COUNT"}
11611 "CP_CE_IB1_BASE_HI": {
11613 {"bits": [0, 15], "name": "IB1_BASE_HI"}
11616 "CP_CE_IB1_BASE_LO": {
11618 {"bits": [2, 31], "name": "IB1_BASE_LO"}
11621 "CP_CE_IB1_BUFSZ": {
11623 {"bits": [0, 19], "name": "IB1_BUFSZ"}
11626 "CP_CE_IB1_CMD_BUFSZ": {
11628 {"bits": [0, 19], "name": "IB1_CMD_REQSZ"}
11631 "CP_CE_IB2_BASE_HI": {
11633 {"bits": [0, 15], "name": "IB2_BASE_HI"}
11636 "CP_CE_IB2_BASE_LO": {
11638 {"bits": [2, 31], "name": "IB2_BASE_LO"}
11641 "CP_CE_IB2_BUFSZ": {
11643 {"bits": [0, 19], "name": "IB2_BUFSZ"}
11646 "CP_CE_IB2_CMD_BUFSZ": {
11648 {"bits": [0, 19], "name": "IB2_CMD_REQSZ"}
11651 "CP_CE_INIT_BASE_HI": {
11653 {"bits": [0, 15], "name": "INIT_BASE_HI"}
11656 "CP_CE_INIT_BASE_LO": {
11658 {"bits": [5, 31], "name": "INIT_BASE_LO"}
11661 "CP_CE_INIT_BUFSZ": {
11663 {"bits": [0, 11], "name": "INIT_BUFSZ"}
11666 "CP_CE_INIT_CMD_BUFSZ": {
11668 {"bits": [0, 11], "name": "INIT_CMD_REQSZ"}
11673 {"bits": [0, 31], "name": "COHER_BASE_256B"}
11676 "CP_COHER_BASE_HI": {
11678 {"bits": [0, 7], "name": "COHER_BASE_HI_256B"}
11683 {"bits": [3, 3], "name": "TC_NC_ACTION_ENA"},
11684 {"bits": [4, 4], "name": "TC_WC_ACTION_ENA"},
11685 {"bits": [5, 5], "name": "TC_INV_METADATA_ACTION_ENA"},
11686 {"bits": [15, 15], "name": "TCL1_VOL_ACTION_ENA"},
11687 {"bits": [18, 18], "name": "TC_WB_ACTION_ENA"},
11688 {"bits": [22, 22], "name": "TCL1_ACTION_ENA"},
11689 {"bits": [23, 23], "name": "TC_ACTION_ENA"},
11690 {"bits": [25, 25], "name": "CB_ACTION_ENA"},
11691 {"bits": [26, 26], "name": "DB_ACTION_ENA"},
11692 {"bits": [27, 27], "name": "SH_KCACHE_ACTION_ENA"},
11693 {"bits": [28, 28], "name": "SH_KCACHE_VOL_ACTION_ENA"},
11694 {"bits": [29, 29], "name": "SH_ICACHE_ACTION_ENA"},
11695 {"bits": [30, 30], "name": "SH_KCACHE_WB_ACTION_ENA"}
11700 {"bits": [0, 31], "name": "COHER_SIZE_256B"}
11703 "CP_COHER_SIZE_HI": {
11705 {"bits": [0, 7], "name": "COHER_SIZE_HI_256B"}
11708 "CP_COHER_START_DELAY": {
11710 {"bits": [0, 5], "name": "START_DELAY_COUNT"}
11713 "CP_COHER_STATUS": {
11715 {"bits": [24, 25], "name": "MEID"},
11716 {"bits": [31, 31], "name": "STATUS"}
11719 "CP_CPC_BUSY_STAT": {
11721 {"bits": [0, 0], "name": "MEC1_LOAD_BUSY"},
11722 {"bits": [1, 1], "name": "MEC1_SEMAPOHRE_BUSY"},
11723 {"bits": [2, 2], "name": "MEC1_MUTEX_BUSY"},
11724 {"bits": [3, 3], "name": "MEC1_MESSAGE_BUSY"},
11725 {"bits": [4, 4], "name": "MEC1_EOP_QUEUE_BUSY"},
11726 {"bits": [5, 5], "name": "MEC1_IQ_QUEUE_BUSY"},
11727 {"bits": [6, 6], "name": "MEC1_IB_QUEUE_BUSY"},
11728 {"bits": [7, 7], "name": "MEC1_TC_BUSY"},
11729 {"bits": [8, 8], "name": "MEC1_DMA_BUSY"},
11730 {"bits": [9, 9], "name": "MEC1_PARTIAL_FLUSH_BUSY"},
11731 {"bits": [10, 10], "name": "MEC1_PIPE0_BUSY"},
11732 {"bits": [11, 11], "name": "MEC1_PIPE1_BUSY"},
11733 {"bits": [12, 12], "name": "MEC1_PIPE2_BUSY"},
11734 {"bits": [13, 13], "name": "MEC1_PIPE3_BUSY"},
11735 {"bits": [16, 16], "name": "MEC2_LOAD_BUSY"},
11736 {"bits": [17, 17], "name": "MEC2_SEMAPOHRE_BUSY"},
11737 {"bits": [18, 18], "name": "MEC2_MUTEX_BUSY"},
11738 {"bits": [19, 19], "name": "MEC2_MESSAGE_BUSY"},
11739 {"bits": [20, 20], "name": "MEC2_EOP_QUEUE_BUSY"},
11740 {"bits": [21, 21], "name": "MEC2_IQ_QUEUE_BUSY"},
11741 {"bits": [22, 22], "name": "MEC2_IB_QUEUE_BUSY"},
11742 {"bits": [23, 23], "name": "MEC2_TC_BUSY"},
11743 {"bits": [24, 24], "name": "MEC2_DMA_BUSY"},
11744 {"bits": [25, 25], "name": "MEC2_PARTIAL_FLUSH_BUSY"},
11745 {"bits": [26, 26], "name": "MEC2_PIPE0_BUSY"},
11746 {"bits": [27, 27], "name": "MEC2_PIPE1_BUSY"},
11747 {"bits": [28, 28], "name": "MEC2_PIPE2_BUSY"},
11748 {"bits": [29, 29], "name": "MEC2_PIPE3_BUSY"}
11751 "CP_CPC_GRBM_FREE_COUNT": {
11753 {"bits": [0, 5], "name": "FREE_COUNT"}
11756 "CP_CPC_HALT_HYST_COUNT": {
11758 {"bits": [0, 3], "name": "COUNT"}
11761 "CP_CPC_SCRATCH_DATA": {
11763 {"bits": [0, 31], "name": "SCRATCH_DATA"}
11766 "CP_CPC_SCRATCH_INDEX": {
11768 {"bits": [0, 8], "name": "SCRATCH_INDEX"}
11771 "CP_CPC_STALLED_STAT1": {
11773 {"bits": [3, 3], "name": "RCIU_TX_FREE_STALL"},
11774 {"bits": [4, 4], "name": "RCIU_PRIV_VIOLATION"},
11775 {"bits": [6, 6], "name": "TCIU_TX_FREE_STALL"},
11776 {"bits": [8, 8], "name": "MEC1_DECODING_PACKET"},
11777 {"bits": [9, 9], "name": "MEC1_WAIT_ON_RCIU"},
11778 {"bits": [10, 10], "name": "MEC1_WAIT_ON_RCIU_READ"},
11779 {"bits": [13, 13], "name": "MEC1_WAIT_ON_ROQ_DATA"},
11780 {"bits": [16, 16], "name": "MEC2_DECODING_PACKET"},
11781 {"bits": [17, 17], "name": "MEC2_WAIT_ON_RCIU"},
11782 {"bits": [18, 18], "name": "MEC2_WAIT_ON_RCIU_READ"},
11783 {"bits": [21, 21], "name": "MEC2_WAIT_ON_ROQ_DATA"},
11784 {"bits": [22, 22], "name": "UTCL2IU_WAITING_ON_FREE"},
11785 {"bits": [23, 23], "name": "UTCL2IU_WAITING_ON_TAGS"},
11786 {"bits": [24, 24], "name": "UTCL1_WAITING_ON_TRANS"}
11791 {"bits": [0, 0], "name": "MEC1_BUSY"},
11792 {"bits": [1, 1], "name": "MEC2_BUSY"},
11793 {"bits": [2, 2], "name": "DC0_BUSY"},
11794 {"bits": [3, 3], "name": "DC1_BUSY"},
11795 {"bits": [4, 4], "name": "RCIU1_BUSY"},
11796 {"bits": [5, 5], "name": "RCIU2_BUSY"},
11797 {"bits": [6, 6], "name": "ROQ1_BUSY"},
11798 {"bits": [7, 7], "name": "ROQ2_BUSY"},
11799 {"bits": [10, 10], "name": "TCIU_BUSY"},
11800 {"bits": [11, 11], "name": "SCRATCH_RAM_BUSY"},
11801 {"bits": [12, 12], "name": "QU_BUSY"},
11802 {"bits": [13, 13], "name": "UTCL2IU_BUSY"},
11803 {"bits": [14, 14], "name": "SAVE_RESTORE_BUSY"},
11804 {"bits": [29, 29], "name": "CPG_CPC_BUSY"},
11805 {"bits": [30, 30], "name": "CPF_CPC_BUSY"},
11806 {"bits": [31, 31], "name": "CPC_BUSY"}
11809 "CP_CPF_BUSY_STAT": {
11811 {"bits": [0, 0], "name": "REG_BUS_FIFO_BUSY"},
11812 {"bits": [1, 1], "name": "CSF_RING_BUSY"},
11813 {"bits": [2, 2], "name": "CSF_INDIRECT1_BUSY"},
11814 {"bits": [3, 3], "name": "CSF_INDIRECT2_BUSY"},
11815 {"bits": [4, 4], "name": "CSF_STATE_BUSY"},
11816 {"bits": [5, 5], "name": "CSF_CE_INDR1_BUSY"},
11817 {"bits": [6, 6], "name": "CSF_CE_INDR2_BUSY"},
11818 {"bits": [7, 7], "name": "CSF_ARBITER_BUSY"},
11819 {"bits": [8, 8], "name": "CSF_INPUT_BUSY"},
11820 {"bits": [9, 9], "name": "OUTSTANDING_READ_TAGS"},
11821 {"bits": [11, 11], "name": "HPD_PROCESSING_EOP_BUSY"},
11822 {"bits": [12, 12], "name": "HQD_DISPATCH_BUSY"},
11823 {"bits": [13, 13], "name": "HQD_IQ_TIMER_BUSY"},
11824 {"bits": [14, 14], "name": "HQD_DMA_OFFLOAD_BUSY"},
11825 {"bits": [15, 15], "name": "HQD_WAIT_SEMAPHORE_BUSY"},
11826 {"bits": [16, 16], "name": "HQD_SIGNAL_SEMAPHORE_BUSY"},
11827 {"bits": [17, 17], "name": "HQD_MESSAGE_BUSY"},
11828 {"bits": [18, 18], "name": "HQD_PQ_FETCHER_BUSY"},
11829 {"bits": [19, 19], "name": "HQD_IB_FETCHER_BUSY"},
11830 {"bits": [20, 20], "name": "HQD_IQ_FETCHER_BUSY"},
11831 {"bits": [21, 21], "name": "HQD_EOP_FETCHER_BUSY"},
11832 {"bits": [22, 22], "name": "HQD_CONSUMED_RPTR_BUSY"},
11833 {"bits": [23, 23], "name": "HQD_FETCHER_ARB_BUSY"},
11834 {"bits": [24, 24], "name": "HQD_ROQ_ALIGN_BUSY"},
11835 {"bits": [25, 25], "name": "HQD_ROQ_EOP_BUSY"},
11836 {"bits": [26, 26], "name": "HQD_ROQ_IQ_BUSY"},
11837 {"bits": [27, 27], "name": "HQD_ROQ_PQ_BUSY"},
11838 {"bits": [28, 28], "name": "HQD_ROQ_IB_BUSY"},
11839 {"bits": [29, 29], "name": "HQD_WPTR_POLL_BUSY"},
11840 {"bits": [30, 30], "name": "HQD_PQ_BUSY"},
11841 {"bits": [31, 31], "name": "HQD_IB_BUSY"}
11844 "CP_CPF_GRBM_FREE_COUNT": {
11846 {"bits": [0, 2], "name": "FREE_COUNT"}
11849 "CP_CPF_STALLED_STAT1": {
11851 {"bits": [0, 0], "name": "RING_FETCHING_DATA"},
11852 {"bits": [1, 1], "name": "INDR1_FETCHING_DATA"},
11853 {"bits": [2, 2], "name": "INDR2_FETCHING_DATA"},
11854 {"bits": [3, 3], "name": "STATE_FETCHING_DATA"},
11855 {"bits": [5, 5], "name": "TCIU_WAITING_ON_FREE"},
11856 {"bits": [6, 6], "name": "TCIU_WAITING_ON_TAGS"},
11857 {"bits": [7, 7], "name": "UTCL2IU_WAITING_ON_FREE"},
11858 {"bits": [8, 8], "name": "UTCL2IU_WAITING_ON_TAGS"},
11859 {"bits": [9, 9], "name": "GFX_UTCL1_WAITING_ON_TRANS"},
11860 {"bits": [10, 10], "name": "CMP_UTCL1_WAITING_ON_TRANS"},
11861 {"bits": [11, 11], "name": "RCIU_WAITING_ON_FREE"}
11866 {"bits": [0, 0], "name": "POST_WPTR_GFX_BUSY"},
11867 {"bits": [1, 1], "name": "CSF_BUSY"},
11868 {"bits": [4, 4], "name": "ROQ_ALIGN_BUSY"},
11869 {"bits": [5, 5], "name": "ROQ_RING_BUSY"},
11870 {"bits": [6, 6], "name": "ROQ_INDIRECT1_BUSY"},
11871 {"bits": [7, 7], "name": "ROQ_INDIRECT2_BUSY"},
11872 {"bits": [8, 8], "name": "ROQ_STATE_BUSY"},
11873 {"bits": [9, 9], "name": "ROQ_CE_RING_BUSY"},
11874 {"bits": [10, 10], "name": "ROQ_CE_INDIRECT1_BUSY"},
11875 {"bits": [11, 11], "name": "ROQ_CE_INDIRECT2_BUSY"},
11876 {"bits": [12, 12], "name": "SEMAPHORE_BUSY"},
11877 {"bits": [13, 13], "name": "INTERRUPT_BUSY"},
11878 {"bits": [14, 14], "name": "TCIU_BUSY"},
11879 {"bits": [15, 15], "name": "HQD_BUSY"},
11880 {"bits": [16, 16], "name": "PRT_BUSY"},
11881 {"bits": [17, 17], "name": "UTCL2IU_BUSY"},
11882 {"bits": [26, 26], "name": "CPF_GFX_BUSY"},
11883 {"bits": [27, 27], "name": "CPF_CMP_BUSY"},
11884 {"bits": [28, 29], "name": "GRBM_CPF_STAT_BUSY"},
11885 {"bits": [30, 30], "name": "CPC_CPF_BUSY"},
11886 {"bits": [31, 31], "name": "CPF_BUSY"}
11891 {"bits": [0, 0], "name": "UTCL1_FAULT_CONTROL"},
11892 {"bits": [4, 5], "name": "MIN_AVAILSZ"},
11893 {"bits": [16, 19], "name": "BUFFER_DEPTH"},
11894 {"bits": [28, 28], "name": "PIO_FIFO_EMPTY"},
11895 {"bits": [29, 29], "name": "PIO_FIFO_FULL"},
11896 {"bits": [30, 31], "name": "PIO_COUNT"}
11899 "CP_DMA_ME_COMMAND": {
11901 {"bits": [0, 25], "name": "BYTE_COUNT"},
11902 {"bits": [26, 26], "name": "SAS"},
11903 {"bits": [27, 27], "name": "DAS"},
11904 {"bits": [28, 28], "name": "SAIC"},
11905 {"bits": [29, 29], "name": "DAIC"},
11906 {"bits": [30, 30], "name": "RAW_WAIT"},
11907 {"bits": [31, 31], "name": "DIS_WC"}
11910 "CP_DMA_ME_DST_ADDR": {
11912 {"bits": [0, 31], "name": "DST_ADDR"}
11915 "CP_DMA_ME_DST_ADDR_HI": {
11917 {"bits": [0, 15], "name": "DST_ADDR_HI"}
11920 "CP_DMA_ME_SRC_ADDR": {
11922 {"bits": [0, 31], "name": "SRC_ADDR"}
11925 "CP_DMA_ME_SRC_ADDR_HI": {
11927 {"bits": [0, 15], "name": "SRC_ADDR_HI"}
11930 "CP_DMA_PFP_CONTROL": {
11932 {"bits": [10, 10], "name": "MEMLOG_CLEAR"},
11933 {"bits": [13, 13], "name": "SRC_CACHE_POLICY"},
11934 {"bits": [20, 21], "name": "DST_SELECT"},
11935 {"bits": [25, 25], "name": "DST_CACHE_POLICY"},
11936 {"bits": [29, 30], "name": "SRC_SELECT"}
11939 "CP_DMA_READ_TAGS": {
11941 {"bits": [0, 25], "name": "DMA_READ_TAG"},
11942 {"bits": [28, 28], "name": "DMA_READ_TAG_VALID"}
11945 "CP_DRAW_OBJECT": {
11947 {"bits": [0, 31], "name": "OBJECT"}
11950 "CP_DRAW_WINDOW_CNTL": {
11952 {"bits": [0, 0], "name": "DISABLE_DRAW_WINDOW_LO_MAX"},
11953 {"bits": [1, 1], "name": "DISABLE_DRAW_WINDOW_LO_MIN"},
11954 {"bits": [2, 2], "name": "DISABLE_DRAW_WINDOW_HI"},
11955 {"bits": [8, 8], "name": "MODE"}
11958 "CP_DRAW_WINDOW_HI": {
11960 {"bits": [0, 31], "name": "WINDOW_HI"}
11963 "CP_DRAW_WINDOW_LO": {
11965 {"bits": [0, 15], "name": "MIN"},
11966 {"bits": [16, 31], "name": "MAX"}
11969 "CP_DRAW_WINDOW_MASK_HI": {
11971 {"bits": [0, 31], "name": "WINDOW_MASK_HI"}
11974 "CP_EOP_DONE_ADDR_HI": {
11976 {"bits": [0, 15], "name": "ADDR_HI"}
11979 "CP_EOP_DONE_ADDR_LO": {
11981 {"bits": [2, 31], "name": "ADDR_LO"}
11984 "CP_EOP_DONE_CNTX_ID": {
11986 {"bits": [0, 31], "name": "CNTX_ID"}
11989 "CP_EOP_DONE_DATA_CNTL": {
11991 {"bits": [16, 17], "name": "DST_SEL"},
11992 {"bits": [24, 26], "name": "INT_SEL"},
11993 {"bits": [29, 31], "name": "DATA_SEL"}
11996 "CP_EOP_DONE_DATA_HI": {
11998 {"bits": [0, 31], "name": "DATA_HI"}
12001 "CP_EOP_DONE_DATA_LO": {
12003 {"bits": [0, 31], "name": "DATA_LO"}
12006 "CP_EOP_DONE_EVENT_CNTL": {
12008 {"bits": [0, 6], "name": "WBINV_TC_OP"},
12009 {"bits": [12, 17], "name": "WBINV_ACTION_ENA"},
12010 {"bits": [25, 25], "name": "CACHE_POLICY"},
12011 {"bits": [28, 28], "name": "EXECUTE"}
12014 "CP_EOP_LAST_FENCE_HI": {
12016 {"bits": [0, 31], "name": "LAST_FENCE_HI"}
12019 "CP_EOP_LAST_FENCE_LO": {
12021 {"bits": [0, 31], "name": "LAST_FENCE_LO"}
12026 {"bits": [0, 19], "name": "IB1_OFFSET"}
12029 "CP_IB1_PREAMBLE_BEGIN": {
12031 {"bits": [0, 19], "name": "IB1_PREAMBLE_BEGIN"}
12034 "CP_IB1_PREAMBLE_END": {
12036 {"bits": [0, 19], "name": "IB1_PREAMBLE_END"}
12041 {"bits": [0, 19], "name": "IB2_OFFSET"}
12044 "CP_IB2_PREAMBLE_BEGIN": {
12046 {"bits": [0, 19], "name": "IB2_PREAMBLE_BEGIN"}
12049 "CP_IB2_PREAMBLE_END": {
12051 {"bits": [0, 19], "name": "IB2_PREAMBLE_END"}
12056 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"}
12059 "CP_ME_COHER_CNTL": {
12061 {"bits": [0, 0], "name": "DEST_BASE_0_ENA"},
12062 {"bits": [1, 1], "name": "DEST_BASE_1_ENA"},
12063 {"bits": [6, 6], "name": "CB0_DEST_BASE_ENA"},
12064 {"bits": [7, 7], "name": "CB1_DEST_BASE_ENA"},
12065 {"bits": [8, 8], "name": "CB2_DEST_BASE_ENA"},
12066 {"bits": [9, 9], "name": "CB3_DEST_BASE_ENA"},
12067 {"bits": [10, 10], "name": "CB4_DEST_BASE_ENA"},
12068 {"bits": [11, 11], "name": "CB5_DEST_BASE_ENA"},
12069 {"bits": [12, 12], "name": "CB6_DEST_BASE_ENA"},
12070 {"bits": [13, 13], "name": "CB7_DEST_BASE_ENA"},
12071 {"bits": [14, 14], "name": "DB_DEST_BASE_ENA"},
12072 {"bits": [19, 19], "name": "DEST_BASE_2_ENA"},
12073 {"bits": [21, 21], "name": "DEST_BASE_3_ENA"}
12076 "CP_ME_COHER_STATUS": {
12078 {"bits": [0, 7], "name": "MATCHING_GFX_CNTX"},
12079 {"bits": [31, 31], "name": "STATUS"}
12082 "CP_ME_MC_RADDR_HI": {
12084 {"bits": [0, 15], "name": "ME_MC_RADDR_HI"},
12085 {"bits": [22, 22], "name": "CACHE_POLICY"}
12088 "CP_ME_MC_RADDR_LO": {
12090 {"bits": [2, 31], "name": "ME_MC_RADDR_LO"}
12093 "CP_ME_MC_WADDR_HI": {
12095 {"bits": [0, 15], "name": "ME_MC_WADDR_HI"},
12096 {"bits": [22, 22], "name": "CACHE_POLICY"}
12099 "CP_ME_MC_WADDR_LO": {
12101 {"bits": [2, 31], "name": "ME_MC_WADDR_LO"}
12104 "CP_ME_MC_WDATA_HI": {
12106 {"bits": [0, 31], "name": "ME_MC_WDATA_HI"}
12109 "CP_ME_MC_WDATA_LO": {
12111 {"bits": [0, 31], "name": "ME_MC_WDATA_LO"}
12114 "CP_NUM_PRIM_NEEDED_COUNT0_HI": {
12116 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_HI"}
12119 "CP_NUM_PRIM_NEEDED_COUNT0_LO": {
12121 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT0_LO"}
12124 "CP_NUM_PRIM_NEEDED_COUNT1_HI": {
12126 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_HI"}
12129 "CP_NUM_PRIM_NEEDED_COUNT1_LO": {
12131 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT1_LO"}
12134 "CP_NUM_PRIM_NEEDED_COUNT2_HI": {
12136 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_HI"}
12139 "CP_NUM_PRIM_NEEDED_COUNT2_LO": {
12141 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT2_LO"}
12144 "CP_NUM_PRIM_NEEDED_COUNT3_HI": {
12146 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_HI"}
12149 "CP_NUM_PRIM_NEEDED_COUNT3_LO": {
12151 {"bits": [0, 31], "name": "NUM_PRIM_NEEDED_CNT3_LO"}
12154 "CP_NUM_PRIM_WRITTEN_COUNT0_HI": {
12156 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_HI"}
12159 "CP_NUM_PRIM_WRITTEN_COUNT0_LO": {
12161 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT0_LO"}
12164 "CP_NUM_PRIM_WRITTEN_COUNT1_HI": {
12166 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_HI"}
12169 "CP_NUM_PRIM_WRITTEN_COUNT1_LO": {
12171 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT1_LO"}
12174 "CP_NUM_PRIM_WRITTEN_COUNT2_HI": {
12176 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_HI"}
12179 "CP_NUM_PRIM_WRITTEN_COUNT2_LO": {
12181 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT2_LO"}
12184 "CP_NUM_PRIM_WRITTEN_COUNT3_HI": {
12186 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_HI"}
12189 "CP_NUM_PRIM_WRITTEN_COUNT3_LO": {
12191 {"bits": [0, 31], "name": "NUM_PRIM_WRITTEN_CNT3_LO"}
12194 "CP_PA_CINVOC_COUNT_HI": {
12196 {"bits": [0, 31], "name": "CINVOC_COUNT_HI"}
12199 "CP_PA_CINVOC_COUNT_LO": {
12201 {"bits": [0, 31], "name": "CINVOC_COUNT_LO"}
12204 "CP_PA_CPRIM_COUNT_HI": {
12206 {"bits": [0, 31], "name": "CPRIM_COUNT_HI"}
12209 "CP_PA_CPRIM_COUNT_LO": {
12211 {"bits": [0, 31], "name": "CPRIM_COUNT_LO"}
12214 "CP_PERFMON_CNTL": {
12216 {"bits": [0, 3], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
12217 {"bits": [4, 7], "enum_ref": "SPM_PERFMON_STATE", "name": "SPM_PERFMON_STATE"},
12218 {"bits": [8, 9], "enum_ref": "CP_PERFMON_ENABLE_MODE", "name": "PERFMON_ENABLE_MODE"},
12219 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
12222 "CP_PERFMON_CNTX_CNTL": {
12224 {"bits": [31, 31], "name": "PERFMON_ENABLE"}
12227 "CP_PFP_ATOMIC_PREOP_HI": {
12229 {"bits": [0, 31], "name": "ATOMIC_PREOP_HI"}
12232 "CP_PFP_ATOMIC_PREOP_LO": {
12234 {"bits": [0, 31], "name": "ATOMIC_PREOP_LO"}
12237 "CP_PFP_COMPLETION_STATUS": {
12239 {"bits": [0, 1], "name": "STATUS"}
12242 "CP_PFP_GDS_ATOMIC0_PREOP_HI": {
12244 {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_HI"}
12247 "CP_PFP_GDS_ATOMIC0_PREOP_LO": {
12249 {"bits": [0, 31], "name": "GDS_ATOMIC0_PREOP_LO"}
12252 "CP_PFP_GDS_ATOMIC1_PREOP_HI": {
12254 {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_HI"}
12257 "CP_PFP_GDS_ATOMIC1_PREOP_LO": {
12259 {"bits": [0, 31], "name": "GDS_ATOMIC1_PREOP_LO"}
12262 "CP_PFP_IB_CONTROL": {
12264 {"bits": [0, 7], "name": "IB_EN"}
12267 "CP_PFP_LOAD_CONTROL": {
12269 {"bits": [0, 0], "name": "CONFIG_REG_EN"},
12270 {"bits": [1, 1], "name": "CNTX_REG_EN"},
12271 {"bits": [16, 16], "name": "SH_GFX_REG_EN"},
12272 {"bits": [24, 24], "name": "SH_CS_REG_EN"}
12275 "CP_PFP_METADATA_BASE_ADDR": {
12277 {"bits": [0, 31], "name": "ADDR_LO"}
12282 {"bits": [0, 1], "name": "PIPE_ID"}
12285 "CP_PIPE_STATS_ADDR_HI": {
12287 {"bits": [0, 15], "name": "PIPE_STATS_ADDR_HI"}
12290 "CP_PIPE_STATS_ADDR_LO": {
12292 {"bits": [2, 31], "name": "PIPE_STATS_ADDR_LO"}
12295 "CP_PIPE_STATS_CONTROL": {
12297 {"bits": [25, 25], "name": "CACHE_POLICY"}
12300 "CP_PRED_NOT_VISIBLE": {
12302 {"bits": [0, 0], "name": "NOT_VISIBLE"}
12307 {"bits": [0, 19], "name": "RB_OFFSET"}
12310 "CP_SAMPLE_STATUS": {
12312 {"bits": [0, 0], "name": "Z_PASS_ACITVE"},
12313 {"bits": [1, 1], "name": "STREAMOUT_ACTIVE"},
12314 {"bits": [2, 2], "name": "PIPELINE_ACTIVE"},
12315 {"bits": [3, 3], "name": "STIPPLE_ACTIVE"},
12316 {"bits": [4, 4], "name": "VGT_BUFFERS_ACTIVE"},
12317 {"bits": [5, 5], "name": "SCREEN_EXT_ACTIVE"},
12318 {"bits": [6, 6], "name": "DRAW_INDIRECT_ACTIVE"},
12319 {"bits": [7, 7], "name": "DISP_INDIRECT_ACTIVE"}
12322 "CP_SCRATCH_INDEX": {
12324 {"bits": [0, 7], "name": "SCRATCH_INDEX"}
12327 "CP_SC_PSINVOC_COUNT0_HI": {
12329 {"bits": [0, 31], "name": "PSINVOC_COUNT0_HI"}
12332 "CP_SC_PSINVOC_COUNT0_LO": {
12334 {"bits": [0, 31], "name": "PSINVOC_COUNT0_LO"}
12337 "CP_SC_PSINVOC_COUNT1_LO": {
12339 {"bits": [0, 31], "name": "OBSOLETE"}
12342 "CP_SEM_WAIT_TIMER": {
12344 {"bits": [0, 31], "name": "SEM_WAIT_TIMER"}
12347 "CP_SIG_SEM_ADDR_HI": {
12349 {"bits": [0, 15], "name": "SEM_ADDR_HI"},
12350 {"bits": [16, 16], "name": "SEM_USE_MAILBOX"},
12351 {"bits": [20, 20], "name": "SEM_SIGNAL_TYPE"},
12352 {"bits": [24, 25], "name": "SEM_CLIENT_CODE"},
12353 {"bits": [29, 31], "name": "SEM_SELECT"}
12356 "CP_SIG_SEM_ADDR_LO": {
12358 {"bits": [0, 1], "name": "SEM_ADDR_SWAP"},
12359 {"bits": [3, 31], "name": "SEM_ADDR_LO"}
12362 "CP_STREAM_OUT_ADDR_HI": {
12364 {"bits": [0, 15], "name": "STREAM_OUT_ADDR_HI"}
12367 "CP_STREAM_OUT_ADDR_LO": {
12369 {"bits": [2, 31], "name": "STREAM_OUT_ADDR_LO"}
12372 "CP_STRMOUT_CNTL": {
12374 {"bits": [0, 0], "name": "OFFSET_UPDATE_DONE"}
12379 {"bits": [0, 15], "name": "ST_BASE_HI"}
12384 {"bits": [2, 31], "name": "ST_BASE_LO"}
12389 {"bits": [0, 19], "name": "ST_BUFSZ"}
12392 "CP_ST_CMD_BUFSZ": {
12394 {"bits": [0, 19], "name": "ST_CMD_REQSZ"}
12397 "CP_VGT_CSINVOC_COUNT_HI": {
12399 {"bits": [0, 31], "name": "CSINVOC_COUNT_HI"}
12402 "CP_VGT_CSINVOC_COUNT_LO": {
12404 {"bits": [0, 31], "name": "CSINVOC_COUNT_LO"}
12407 "CP_VGT_DSINVOC_COUNT_HI": {
12409 {"bits": [0, 31], "name": "DSINVOC_COUNT_HI"}
12412 "CP_VGT_DSINVOC_COUNT_LO": {
12414 {"bits": [0, 31], "name": "DSINVOC_COUNT_LO"}
12417 "CP_VGT_GSINVOC_COUNT_HI": {
12419 {"bits": [0, 31], "name": "GSINVOC_COUNT_HI"}
12422 "CP_VGT_GSINVOC_COUNT_LO": {
12424 {"bits": [0, 31], "name": "GSINVOC_COUNT_LO"}
12427 "CP_VGT_GSPRIM_COUNT_HI": {
12429 {"bits": [0, 31], "name": "GSPRIM_COUNT_HI"}
12432 "CP_VGT_GSPRIM_COUNT_LO": {
12434 {"bits": [0, 31], "name": "GSPRIM_COUNT_LO"}
12437 "CP_VGT_HSINVOC_COUNT_HI": {
12439 {"bits": [0, 31], "name": "HSINVOC_COUNT_HI"}
12442 "CP_VGT_HSINVOC_COUNT_LO": {
12444 {"bits": [0, 31], "name": "HSINVOC_COUNT_LO"}
12447 "CP_VGT_IAPRIM_COUNT_HI": {
12449 {"bits": [0, 31], "name": "IAPRIM_COUNT_HI"}
12452 "CP_VGT_IAPRIM_COUNT_LO": {
12454 {"bits": [0, 31], "name": "IAPRIM_COUNT_LO"}
12457 "CP_VGT_IAVERT_COUNT_HI": {
12459 {"bits": [0, 31], "name": "IAVERT_COUNT_HI"}
12462 "CP_VGT_IAVERT_COUNT_LO": {
12464 {"bits": [0, 31], "name": "IAVERT_COUNT_LO"}
12467 "CP_VGT_VSINVOC_COUNT_HI": {
12469 {"bits": [0, 31], "name": "VSINVOC_COUNT_HI"}
12472 "CP_VGT_VSINVOC_COUNT_LO": {
12474 {"bits": [0, 31], "name": "VSINVOC_COUNT_LO"}
12479 {"bits": [0, 3], "name": "VMID"}
12482 "CP_WAIT_REG_MEM_TIMEOUT": {
12484 {"bits": [0, 31], "name": "WAIT_REG_MEM_TIMEOUT"}
12489 {"bits": [0, 2], "name": "SRC_STATE_ID"}
12492 "DB_ALPHA_TO_MASK": {
12494 {"bits": [0, 0], "name": "ALPHA_TO_MASK_ENABLE"},
12495 {"bits": [8, 9], "name": "ALPHA_TO_MASK_OFFSET0"},
12496 {"bits": [10, 11], "name": "ALPHA_TO_MASK_OFFSET1"},
12497 {"bits": [12, 13], "name": "ALPHA_TO_MASK_OFFSET2"},
12498 {"bits": [14, 15], "name": "ALPHA_TO_MASK_OFFSET3"},
12499 {"bits": [16, 16], "name": "OFFSET_ROUND"}
12502 "DB_COUNT_CONTROL": {
12504 {"bits": [0, 0], "name": "ZPASS_INCREMENT_DISABLE"},
12505 {"bits": [1, 1], "name": "PERFECT_ZPASS_COUNTS"},
12506 {"bits": [4, 6], "name": "SAMPLE_RATE"},
12507 {"bits": [8, 11], "name": "ZPASS_ENABLE"},
12508 {"bits": [12, 15], "name": "ZFAIL_ENABLE"},
12509 {"bits": [16, 19], "name": "SFAIL_ENABLE"},
12510 {"bits": [20, 23], "name": "DBFAIL_ENABLE"},
12511 {"bits": [24, 27], "name": "SLICE_EVEN_ENABLE"},
12512 {"bits": [28, 31], "name": "SLICE_ODD_ENABLE"}
12515 "DB_DEPTH_BOUNDS_MAX": {
12517 {"bits": [0, 31], "name": "MAX"}
12520 "DB_DEPTH_BOUNDS_MIN": {
12522 {"bits": [0, 31], "name": "MIN"}
12525 "DB_DEPTH_CLEAR": {
12527 {"bits": [0, 31], "name": "DEPTH_CLEAR"}
12530 "DB_DEPTH_CONTROL": {
12532 {"bits": [0, 0], "name": "STENCIL_ENABLE"},
12533 {"bits": [1, 1], "name": "Z_ENABLE"},
12534 {"bits": [2, 2], "name": "Z_WRITE_ENABLE"},
12535 {"bits": [3, 3], "name": "DEPTH_BOUNDS_ENABLE"},
12536 {"bits": [4, 6], "enum_ref": "CompareFrag", "name": "ZFUNC"},
12537 {"bits": [7, 7], "name": "BACKFACE_ENABLE"},
12538 {"bits": [8, 10], "enum_ref": "CompareFrag", "name": "STENCILFUNC"},
12539 {"bits": [20, 22], "enum_ref": "CompareFrag", "name": "STENCILFUNC_BF"},
12540 {"bits": [30, 30], "name": "ENABLE_COLOR_WRITES_ON_DEPTH_FAIL"},
12541 {"bits": [31, 31], "name": "DISABLE_COLOR_WRITES_ON_DEPTH_PASS"}
12546 {"bits": [0, 13], "name": "X_MAX"},
12547 {"bits": [16, 29], "name": "Y_MAX"}
12552 {"bits": [0, 10], "name": "SLICE_START"},
12553 {"bits": [13, 23], "name": "SLICE_MAX"},
12554 {"bits": [24, 24], "name": "Z_READ_ONLY"},
12555 {"bits": [25, 25], "name": "STENCIL_READ_ONLY"},
12556 {"bits": [26, 29], "name": "MIPID"}
12559 "DB_DFSM_CONTROL": {
12561 {"bits": [0, 1], "enum_ref": "DB_DFSM_CONTROL__PUNCHOUT_MODE", "name": "PUNCHOUT_MODE"},
12562 {"bits": [2, 2], "name": "POPS_DRAIN_PS_ON_OVERLAP"},
12563 {"bits": [3, 3], "name": "DISALLOW_OVERFLOW"}
12568 {"bits": [0, 2], "name": "MAX_ANCHOR_SAMPLES"},
12569 {"bits": [4, 6], "name": "PS_ITER_SAMPLES"},
12570 {"bits": [8, 10], "name": "MASK_EXPORT_NUM_SAMPLES"},
12571 {"bits": [12, 14], "name": "ALPHA_TO_MASK_NUM_SAMPLES"},
12572 {"bits": [16, 16], "name": "HIGH_QUALITY_INTERSECTIONS"},
12573 {"bits": [17, 17], "name": "INCOHERENT_EQAA_READS"},
12574 {"bits": [18, 18], "name": "INTERPOLATE_COMP_Z"},
12575 {"bits": [19, 19], "name": "INTERPOLATE_SRC_Z"},
12576 {"bits": [20, 20], "name": "STATIC_ANCHOR_ASSOCIATIONS"},
12577 {"bits": [21, 21], "name": "ALPHA_TO_MASK_EQAA_DISABLE"},
12578 {"bits": [24, 26], "name": "OVERRASTERIZATION_AMOUNT"},
12579 {"bits": [27, 27], "name": "ENABLE_POSTZ_OVERRASTERIZATION"}
12582 "DB_HTILE_DATA_BASE": {
12584 {"bits": [0, 31], "name": "BASE_256B"}
12587 "DB_HTILE_DATA_BASE_HI": {
12589 {"bits": [0, 7], "name": "BASE_HI"}
12592 "DB_HTILE_SURFACE": {
12594 {"bits": [1, 1], "name": "FULL_CACHE"},
12595 {"bits": [2, 2], "name": "HTILE_USES_PRELOAD_WIN"},
12596 {"bits": [3, 3], "name": "PRELOAD"},
12597 {"bits": [4, 9], "name": "PREFETCH_WIDTH"},
12598 {"bits": [10, 15], "name": "PREFETCH_HEIGHT"},
12599 {"bits": [16, 16], "name": "DST_OUTSIDE_ZERO_TO_ONE"},
12600 {"bits": [18, 18], "name": "PIPE_ALIGNED"},
12601 {"bits": [19, 19], "name": "RB_ALIGNED"}
12604 "DB_OCCLUSION_COUNT0_HI": {
12606 {"bits": [0, 30], "name": "COUNT_HI"}
12609 "DB_OCCLUSION_COUNT0_LOW": {
12611 {"bits": [0, 31], "name": "COUNT_LOW"}
12614 "DB_PRELOAD_CONTROL": {
12616 {"bits": [0, 7], "name": "START_X"},
12617 {"bits": [8, 15], "name": "START_Y"},
12618 {"bits": [16, 23], "name": "MAX_X"},
12619 {"bits": [24, 31], "name": "MAX_Y"}
12622 "DB_RENDER_CONTROL": {
12624 {"bits": [0, 0], "name": "DEPTH_CLEAR_ENABLE"},
12625 {"bits": [1, 1], "name": "STENCIL_CLEAR_ENABLE"},
12626 {"bits": [2, 2], "name": "DEPTH_COPY"},
12627 {"bits": [3, 3], "name": "STENCIL_COPY"},
12628 {"bits": [4, 4], "name": "RESUMMARIZE_ENABLE"},
12629 {"bits": [5, 5], "name": "STENCIL_COMPRESS_DISABLE"},
12630 {"bits": [6, 6], "name": "DEPTH_COMPRESS_DISABLE"},
12631 {"bits": [7, 7], "name": "COPY_CENTROID"},
12632 {"bits": [8, 11], "name": "COPY_SAMPLE"},
12633 {"bits": [12, 12], "name": "DECOMPRESS_ENABLE"}
12636 "DB_RENDER_OVERRIDE": {
12638 {"bits": [0, 1], "enum_ref": "ForceControl", "name": "FORCE_HIZ_ENABLE"},
12639 {"bits": [2, 3], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE0"},
12640 {"bits": [4, 5], "enum_ref": "ForceControl", "name": "FORCE_HIS_ENABLE1"},
12641 {"bits": [6, 6], "name": "FORCE_SHADER_Z_ORDER"},
12642 {"bits": [7, 7], "name": "FAST_Z_DISABLE"},
12643 {"bits": [8, 8], "name": "FAST_STENCIL_DISABLE"},
12644 {"bits": [9, 9], "name": "NOOP_CULL_DISABLE"},
12645 {"bits": [10, 10], "name": "FORCE_COLOR_KILL"},
12646 {"bits": [11, 11], "name": "FORCE_Z_READ"},
12647 {"bits": [12, 12], "name": "FORCE_STENCIL_READ"},
12648 {"bits": [13, 14], "enum_ref": "ForceControl", "name": "FORCE_FULL_Z_RANGE"},
12649 {"bits": [15, 15], "name": "FORCE_QC_SMASK_CONFLICT"},
12650 {"bits": [16, 16], "name": "DISABLE_VIEWPORT_CLAMP"},
12651 {"bits": [17, 17], "name": "IGNORE_SC_ZRANGE"},
12652 {"bits": [18, 18], "name": "DISABLE_FULLY_COVERED"},
12653 {"bits": [19, 20], "enum_ref": "ZLimitSumm", "name": "FORCE_Z_LIMIT_SUMM"},
12654 {"bits": [21, 25], "name": "MAX_TILES_IN_DTT"},
12655 {"bits": [26, 26], "name": "DISABLE_TILE_RATE_TILES"},
12656 {"bits": [27, 27], "name": "FORCE_Z_DIRTY"},
12657 {"bits": [28, 28], "name": "FORCE_STENCIL_DIRTY"},
12658 {"bits": [29, 29], "name": "FORCE_Z_VALID"},
12659 {"bits": [30, 30], "name": "FORCE_STENCIL_VALID"},
12660 {"bits": [31, 31], "name": "PRESERVE_COMPRESSION"}
12663 "DB_RENDER_OVERRIDE2": {
12665 {"bits": [0, 1], "enum_ref": "DbPSLControl", "name": "PARTIAL_SQUAD_LAUNCH_CONTROL"},
12666 {"bits": [2, 4], "name": "PARTIAL_SQUAD_LAUNCH_COUNTDOWN"},
12667 {"bits": [5, 5], "name": "DISABLE_ZMASK_EXPCLEAR_OPTIMIZATION"},
12668 {"bits": [6, 6], "name": "DISABLE_SMEM_EXPCLEAR_OPTIMIZATION"},
12669 {"bits": [7, 7], "name": "DISABLE_COLOR_ON_VALIDATION"},
12670 {"bits": [8, 8], "name": "DECOMPRESS_Z_ON_FLUSH"},
12671 {"bits": [9, 9], "name": "DISABLE_REG_SNOOP"},
12672 {"bits": [10, 10], "name": "DEPTH_BOUNDS_HIER_DEPTH_DISABLE"},
12673 {"bits": [11, 11], "name": "SEPARATE_HIZS_FUNC_ENABLE"},
12674 {"bits": [12, 14], "enum_ref": "CompareFrag", "name": "HIZ_ZFUNC"},
12675 {"bits": [15, 17], "name": "HIS_SFUNC_FF"},
12676 {"bits": [18, 20], "name": "HIS_SFUNC_BF"},
12677 {"bits": [21, 21], "name": "PRESERVE_ZRANGE"},
12678 {"bits": [22, 22], "name": "PRESERVE_SRESULTS"},
12679 {"bits": [23, 23], "name": "DISABLE_FAST_PASS"},
12680 {"bits": [25, 25], "name": "ALLOW_PARTIAL_RES_HIER_KILL"}
12683 "DB_SHADER_CONTROL": {
12685 {"bits": [0, 0], "name": "Z_EXPORT_ENABLE"},
12686 {"bits": [1, 1], "name": "STENCIL_TEST_VAL_EXPORT_ENABLE"},
12687 {"bits": [2, 2], "name": "STENCIL_OP_VAL_EXPORT_ENABLE"},
12688 {"bits": [4, 5], "enum_ref": "ZOrder", "name": "Z_ORDER"},
12689 {"bits": [6, 6], "name": "KILL_ENABLE"},
12690 {"bits": [7, 7], "name": "COVERAGE_TO_MASK_ENABLE"},
12691 {"bits": [8, 8], "name": "MASK_EXPORT_ENABLE"},
12692 {"bits": [9, 9], "name": "EXEC_ON_HIER_FAIL"},
12693 {"bits": [10, 10], "name": "EXEC_ON_NOOP"},
12694 {"bits": [11, 11], "name": "ALPHA_TO_MASK_DISABLE"},
12695 {"bits": [12, 12], "name": "DEPTH_BEFORE_SHADER"},
12696 {"bits": [13, 14], "enum_ref": "ConservativeZExport", "name": "CONSERVATIVE_Z_EXPORT"},
12697 {"bits": [15, 15], "name": "DUAL_QUAD_DISABLE"},
12698 {"bits": [16, 16], "name": "PRIMITIVE_ORDERED_PIXEL_SHADER"},
12699 {"bits": [17, 17], "name": "EXEC_IF_OVERLAPPED"},
12700 {"bits": [20, 22], "name": "POPS_OVERLAP_NUM_SAMPLES"}
12703 "DB_SRESULTS_COMPARE_STATE0": {
12705 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC0"},
12706 {"bits": [4, 11], "name": "COMPAREVALUE0"},
12707 {"bits": [12, 19], "name": "COMPAREMASK0"},
12708 {"bits": [24, 24], "name": "ENABLE0"}
12711 "DB_SRESULTS_COMPARE_STATE1": {
12713 {"bits": [0, 2], "enum_ref": "CompareFrag", "name": "COMPAREFUNC1"},
12714 {"bits": [4, 11], "name": "COMPAREVALUE1"},
12715 {"bits": [12, 19], "name": "COMPAREMASK1"},
12716 {"bits": [24, 24], "name": "ENABLE1"}
12719 "DB_STENCILREFMASK": {
12721 {"bits": [0, 7], "name": "STENCILTESTVAL"},
12722 {"bits": [8, 15], "name": "STENCILMASK"},
12723 {"bits": [16, 23], "name": "STENCILWRITEMASK"},
12724 {"bits": [24, 31], "name": "STENCILOPVAL"}
12727 "DB_STENCILREFMASK_BF": {
12729 {"bits": [0, 7], "name": "STENCILTESTVAL_BF"},
12730 {"bits": [8, 15], "name": "STENCILMASK_BF"},
12731 {"bits": [16, 23], "name": "STENCILWRITEMASK_BF"},
12732 {"bits": [24, 31], "name": "STENCILOPVAL_BF"}
12735 "DB_STENCIL_CLEAR": {
12737 {"bits": [0, 7], "name": "CLEAR"}
12740 "DB_STENCIL_CONTROL": {
12742 {"bits": [0, 3], "enum_ref": "StencilOp", "name": "STENCILFAIL"},
12743 {"bits": [4, 7], "enum_ref": "StencilOp", "name": "STENCILZPASS"},
12744 {"bits": [8, 11], "enum_ref": "StencilOp", "name": "STENCILZFAIL"},
12745 {"bits": [12, 15], "enum_ref": "StencilOp", "name": "STENCILFAIL_BF"},
12746 {"bits": [16, 19], "enum_ref": "StencilOp", "name": "STENCILZPASS_BF"},
12747 {"bits": [20, 23], "enum_ref": "StencilOp", "name": "STENCILZFAIL_BF"}
12750 "DB_STENCIL_INFO": {
12752 {"bits": [0, 0], "enum_ref": "StencilFormat", "name": "FORMAT"},
12753 {"bits": [4, 8], "name": "SW_MODE"},
12754 {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"},
12755 {"bits": [13, 14], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"},
12756 {"bits": [15, 15], "name": "ITERATE_FLUSH"},
12757 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
12758 {"bits": [29, 29], "name": "TILE_STENCIL_DISABLE"},
12759 {"bits": [30, 30], "name": "CLEAR_DISALLOWED"}
12764 {"bits": [0, 1], "enum_ref": "ZFormat", "name": "FORMAT"},
12765 {"bits": [2, 3], "name": "NUM_SAMPLES"},
12766 {"bits": [4, 8], "name": "SW_MODE"},
12767 {"bits": [12, 12], "name": "PARTIALLY_RESIDENT"},
12768 {"bits": [13, 14], "enum_ref": "DbPRTFaultBehavior", "name": "FAULT_BEHAVIOR"},
12769 {"bits": [15, 15], "name": "ITERATE_FLUSH"},
12770 {"bits": [16, 19], "name": "MAXMIP"},
12771 {"bits": [23, 26], "name": "DECOMPRESS_ON_N_ZPLANES"},
12772 {"bits": [27, 27], "name": "ALLOW_EXPCLEAR"},
12773 {"bits": [28, 28], "name": "READ_SIZE"},
12774 {"bits": [29, 29], "name": "TILE_SURFACE_ENABLE"},
12775 {"bits": [30, 30], "name": "CLEAR_DISALLOWED"},
12776 {"bits": [31, 31], "name": "ZRANGE_PRECISION"}
12781 {"bits": [0, 15], "name": "EPITCH"}
12784 "GB_ADDR_CONFIG": {
12786 {"bits": [0, 2], "name": "NUM_PIPES"},
12787 {"bits": [3, 5], "name": "PIPE_INTERLEAVE_SIZE"},
12788 {"bits": [6, 7], "name": "MAX_COMPRESSED_FRAGS"},
12789 {"bits": [8, 10], "name": "BANK_INTERLEAVE_SIZE"},
12790 {"bits": [12, 14], "enum_ref": "NumBanks", "name": "NUM_BANKS"},
12791 {"bits": [16, 18], "name": "SHADER_ENGINE_TILE_SIZE"},
12792 {"bits": [19, 20], "name": "NUM_SHADER_ENGINES"},
12793 {"bits": [21, 23], "name": "NUM_GPUS"},
12794 {"bits": [24, 25], "name": "MULTI_GPU_TILE_SIZE"},
12795 {"bits": [26, 27], "name": "NUM_RB_PER_SE"},
12796 {"bits": [28, 29], "name": "ROW_SIZE"},
12797 {"bits": [30, 30], "name": "NUM_LOWER_PIPES"},
12798 {"bits": [31, 31], "name": "SE_ENABLE"}
12801 "GB_MACROTILE_MODE0": {
12803 {"bits": [0, 1], "enum_ref": "BankWidth", "name": "BANK_WIDTH"},
12804 {"bits": [2, 3], "enum_ref": "BankHeight", "name": "BANK_HEIGHT"},
12805 {"bits": [4, 5], "enum_ref": "MacroTileAspect", "name": "MACRO_TILE_ASPECT"},
12806 {"bits": [6, 7], "enum_ref": "NumBanks", "name": "NUM_BANKS"}
12811 {"bits": [2, 5], "enum_ref": "ArrayMode", "name": "ARRAY_MODE"},
12812 {"bits": [6, 10], "enum_ref": "PipeConfig", "name": "PIPE_CONFIG"},
12813 {"bits": [11, 13], "enum_ref": "TileSplit", "name": "TILE_SPLIT"},
12814 {"bits": [22, 24], "enum_ref": "MicroTileMode", "name": "MICRO_TILE_MODE_NEW"},
12815 {"bits": [25, 26], "name": "SAMPLE_SPLIT"}
12820 {"bits": [0, 15], "name": "BASE"},
12821 {"bits": [16, 31], "name": "UNUSED"}
12826 {"bits": [0, 5], "name": "AINC"},
12827 {"bits": [6, 7], "name": "UNUSED1"},
12828 {"bits": [8, 9], "name": "DMODE"},
12829 {"bits": [10, 31], "name": "UNUSED2"}
12832 "GDS_ATOM_COMPLETE": {
12834 {"bits": [0, 0], "name": "COMPLETE"},
12835 {"bits": [1, 31], "name": "UNUSED"}
12840 {"bits": [0, 31], "name": "DST"}
12843 "GDS_ATOM_OFFSET0": {
12845 {"bits": [0, 7], "name": "OFFSET0"},
12846 {"bits": [8, 31], "name": "UNUSED"}
12849 "GDS_ATOM_OFFSET1": {
12851 {"bits": [0, 7], "name": "OFFSET1"},
12852 {"bits": [8, 31], "name": "UNUSED"}
12857 {"bits": [0, 7], "name": "OP"},
12858 {"bits": [8, 31], "name": "UNUSED"}
12863 {"bits": [0, 15], "name": "SIZE"},
12864 {"bits": [16, 31], "name": "UNUSED"}
12867 "GDS_GWS_RESOURCE": {
12869 {"bits": [0, 0], "name": "FLAG"},
12870 {"bits": [1, 12], "name": "COUNTER"},
12871 {"bits": [13, 13], "name": "TYPE"},
12872 {"bits": [14, 14], "name": "DED"},
12873 {"bits": [15, 15], "name": "RELEASE_ALL"},
12874 {"bits": [16, 27], "name": "HEAD_QUEUE"},
12875 {"bits": [28, 28], "name": "HEAD_VALID"},
12876 {"bits": [29, 29], "name": "HEAD_FLAG"},
12877 {"bits": [30, 30], "name": "HALTED"},
12878 {"bits": [31, 31], "name": "UNUSED1"}
12881 "GDS_GWS_RESOURCE_CNT": {
12883 {"bits": [0, 15], "name": "RESOURCE_CNT"},
12884 {"bits": [16, 31], "name": "UNUSED"}
12887 "GDS_GWS_RESOURCE_CNTL": {
12889 {"bits": [0, 5], "name": "INDEX"},
12890 {"bits": [6, 31], "name": "UNUSED"}
12893 "GDS_OA_ADDRESS": {
12895 {"bits": [0, 15], "name": "DS_ADDRESS"},
12896 {"bits": [16, 19], "name": "CRAWLER"},
12897 {"bits": [20, 21], "name": "CRAWLER_TYPE"},
12898 {"bits": [22, 29], "name": "UNUSED"},
12899 {"bits": [30, 30], "name": "NO_ALLOC"},
12900 {"bits": [31, 31], "name": "ENABLE"}
12905 {"bits": [0, 3], "name": "INDEX"},
12906 {"bits": [4, 31], "name": "UNUSED"}
12909 "GDS_OA_COUNTER": {
12911 {"bits": [0, 31], "name": "SPACE_AVAILABLE"}
12916 {"bits": [0, 30], "name": "VALUE"},
12917 {"bits": [31, 31], "name": "INCDEC"}
12920 "GDS_OA_RING_SIZE": {
12922 {"bits": [0, 31], "name": "RING_SIZE"}
12927 {"bits": [0, 31], "name": "READ_ADDR"}
12930 "GDS_RD_BURST_ADDR": {
12932 {"bits": [0, 31], "name": "BURST_ADDR"}
12935 "GDS_RD_BURST_COUNT": {
12937 {"bits": [0, 31], "name": "BURST_COUNT"}
12940 "GDS_RD_BURST_DATA": {
12942 {"bits": [0, 31], "name": "BURST_DATA"}
12947 {"bits": [0, 31], "name": "READ_DATA"}
12950 "GDS_WRITE_COMPLETE": {
12952 {"bits": [0, 31], "name": "WRITE_COMPLETE"}
12957 {"bits": [0, 31], "name": "WRITE_ADDR"}
12962 {"bits": [0, 31], "name": "WRITE_DATA"}
12965 "GRBM_GFX_INDEX": {
12967 {"bits": [0, 7], "name": "INSTANCE_INDEX"},
12968 {"bits": [8, 15], "name": "SH_INDEX"},
12969 {"bits": [16, 23], "name": "SE_INDEX"},
12970 {"bits": [29, 29], "name": "SH_BROADCAST_WRITES"},
12971 {"bits": [30, 30], "name": "INSTANCE_BROADCAST_WRITES"},
12972 {"bits": [31, 31], "name": "SE_BROADCAST_WRITES"}
12975 "GRBM_PERFCOUNTER0_SELECT": {
12977 {"bits": [0, 5], "name": "PERF_SEL"},
12978 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
12979 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
12980 {"bits": [12, 12], "name": "VGT_BUSY_USER_DEFINED_MASK"},
12981 {"bits": [13, 13], "name": "TA_BUSY_USER_DEFINED_MASK"},
12982 {"bits": [14, 14], "name": "SX_BUSY_USER_DEFINED_MASK"},
12983 {"bits": [16, 16], "name": "SPI_BUSY_USER_DEFINED_MASK"},
12984 {"bits": [17, 17], "name": "SC_BUSY_USER_DEFINED_MASK"},
12985 {"bits": [18, 18], "name": "PA_BUSY_USER_DEFINED_MASK"},
12986 {"bits": [19, 19], "name": "GRBM_BUSY_USER_DEFINED_MASK"},
12987 {"bits": [20, 20], "name": "DB_BUSY_USER_DEFINED_MASK"},
12988 {"bits": [21, 21], "name": "CB_BUSY_USER_DEFINED_MASK"},
12989 {"bits": [22, 22], "name": "CP_BUSY_USER_DEFINED_MASK"},
12990 {"bits": [23, 23], "name": "IA_BUSY_USER_DEFINED_MASK"},
12991 {"bits": [24, 24], "name": "GDS_BUSY_USER_DEFINED_MASK"},
12992 {"bits": [25, 25], "name": "BCI_BUSY_USER_DEFINED_MASK"},
12993 {"bits": [26, 26], "name": "RLC_BUSY_USER_DEFINED_MASK"},
12994 {"bits": [27, 27], "name": "TC_BUSY_USER_DEFINED_MASK"},
12995 {"bits": [28, 28], "name": "WD_BUSY_USER_DEFINED_MASK"},
12996 {"bits": [29, 29], "name": "UTCL2_BUSY_USER_DEFINED_MASK"},
12997 {"bits": [30, 30], "name": "EA_BUSY_USER_DEFINED_MASK"},
12998 {"bits": [31, 31], "name": "RMI_BUSY_USER_DEFINED_MASK"}
13001 "GRBM_SE0_PERFCOUNTER_SELECT": {
13003 {"bits": [0, 5], "name": "PERF_SEL"},
13004 {"bits": [10, 10], "name": "DB_CLEAN_USER_DEFINED_MASK"},
13005 {"bits": [11, 11], "name": "CB_CLEAN_USER_DEFINED_MASK"},
13006 {"bits": [12, 12], "name": "TA_BUSY_USER_DEFINED_MASK"},
13007 {"bits": [13, 13], "name": "SX_BUSY_USER_DEFINED_MASK"},
13008 {"bits": [15, 15], "name": "SPI_BUSY_USER_DEFINED_MASK"},
13009 {"bits": [16, 16], "name": "SC_BUSY_USER_DEFINED_MASK"},
13010 {"bits": [17, 17], "name": "DB_BUSY_USER_DEFINED_MASK"},
13011 {"bits": [18, 18], "name": "CB_BUSY_USER_DEFINED_MASK"},
13012 {"bits": [19, 19], "name": "VGT_BUSY_USER_DEFINED_MASK"},
13013 {"bits": [20, 20], "name": "PA_BUSY_USER_DEFINED_MASK"},
13014 {"bits": [21, 21], "name": "BCI_BUSY_USER_DEFINED_MASK"},
13015 {"bits": [22, 22], "name": "RMI_BUSY_USER_DEFINED_MASK"}
13020 {"bits": [0, 3], "name": "ME0PIPE0_CMDFIFO_AVAIL"},
13021 {"bits": [5, 5], "name": "RSMU_RQ_PENDING"},
13022 {"bits": [7, 7], "name": "ME0PIPE0_CF_RQ_PENDING"},
13023 {"bits": [8, 8], "name": "ME0PIPE0_PF_RQ_PENDING"},
13024 {"bits": [9, 9], "name": "GDS_DMA_RQ_PENDING"},
13025 {"bits": [12, 12], "name": "DB_CLEAN"},
13026 {"bits": [13, 13], "name": "CB_CLEAN"},
13027 {"bits": [14, 14], "name": "TA_BUSY"},
13028 {"bits": [15, 15], "name": "GDS_BUSY"},
13029 {"bits": [16, 16], "name": "WD_BUSY_NO_DMA"},
13030 {"bits": [17, 17], "name": "VGT_BUSY"},
13031 {"bits": [18, 18], "name": "IA_BUSY_NO_DMA"},
13032 {"bits": [19, 19], "name": "IA_BUSY"},
13033 {"bits": [20, 20], "name": "SX_BUSY"},
13034 {"bits": [21, 21], "name": "WD_BUSY"},
13035 {"bits": [22, 22], "name": "SPI_BUSY"},
13036 {"bits": [23, 23], "name": "BCI_BUSY"},
13037 {"bits": [24, 24], "name": "SC_BUSY"},
13038 {"bits": [25, 25], "name": "PA_BUSY"},
13039 {"bits": [26, 26], "name": "DB_BUSY"},
13040 {"bits": [28, 28], "name": "CP_COHERENCY_BUSY"},
13041 {"bits": [29, 29], "name": "CP_BUSY"},
13042 {"bits": [30, 30], "name": "CB_BUSY"},
13043 {"bits": [31, 31], "name": "GUI_ACTIVE"}
13048 {"bits": [0, 3], "name": "ME0PIPE1_CMDFIFO_AVAIL"},
13049 {"bits": [4, 4], "name": "ME0PIPE1_CF_RQ_PENDING"},
13050 {"bits": [5, 5], "name": "ME0PIPE1_PF_RQ_PENDING"},
13051 {"bits": [6, 6], "name": "ME1PIPE0_RQ_PENDING"},
13052 {"bits": [7, 7], "name": "ME1PIPE1_RQ_PENDING"},
13053 {"bits": [8, 8], "name": "ME1PIPE2_RQ_PENDING"},
13054 {"bits": [9, 9], "name": "ME1PIPE3_RQ_PENDING"},
13055 {"bits": [10, 10], "name": "ME2PIPE0_RQ_PENDING"},
13056 {"bits": [11, 11], "name": "ME2PIPE1_RQ_PENDING"},
13057 {"bits": [12, 12], "name": "ME2PIPE2_RQ_PENDING"},
13058 {"bits": [13, 13], "name": "ME2PIPE3_RQ_PENDING"},
13059 {"bits": [14, 14], "name": "RLC_RQ_PENDING"},
13060 {"bits": [15, 15], "name": "UTCL2_BUSY"},
13061 {"bits": [16, 16], "name": "EA_BUSY"},
13062 {"bits": [17, 17], "name": "RMI_BUSY"},
13063 {"bits": [18, 18], "name": "UTCL2_RQ_PENDING"},
13064 {"bits": [19, 19], "name": "CPF_RQ_PENDING"},
13065 {"bits": [20, 20], "name": "EA_LINK_BUSY"},
13066 {"bits": [24, 24], "name": "RLC_BUSY"},
13067 {"bits": [25, 25], "name": "TC_BUSY"},
13068 {"bits": [26, 26], "name": "TCC_CC_RESIDENT"},
13069 {"bits": [28, 28], "name": "CPF_BUSY"},
13070 {"bits": [29, 29], "name": "CPC_BUSY"},
13071 {"bits": [30, 30], "name": "CPG_BUSY"},
13072 {"bits": [31, 31], "name": "CPAXI_BUSY"}
13075 "GRBM_STATUS_SE0": {
13077 {"bits": [1, 1], "name": "DB_CLEAN"},
13078 {"bits": [2, 2], "name": "CB_CLEAN"},
13079 {"bits": [21, 21], "name": "RMI_BUSY"},
13080 {"bits": [22, 22], "name": "BCI_BUSY"},
13081 {"bits": [23, 23], "name": "VGT_BUSY"},
13082 {"bits": [24, 24], "name": "PA_BUSY"},
13083 {"bits": [25, 25], "name": "TA_BUSY"},
13084 {"bits": [26, 26], "name": "SX_BUSY"},
13085 {"bits": [27, 27], "name": "SPI_BUSY"},
13086 {"bits": [29, 29], "name": "SC_BUSY"},
13087 {"bits": [30, 30], "name": "DB_BUSY"},
13088 {"bits": [31, 31], "name": "CB_BUSY"}
13091 "IA_MULTI_VGT_PARAM": {
13093 {"bits": [0, 15], "name": "PRIMGROUP_SIZE"},
13094 {"bits": [16, 16], "name": "PARTIAL_VS_WAVE_ON"},
13095 {"bits": [17, 17], "name": "SWITCH_ON_EOP"},
13096 {"bits": [18, 18], "name": "PARTIAL_ES_WAVE_ON"},
13097 {"bits": [19, 19], "name": "SWITCH_ON_EOI"},
13098 {"bits": [20, 20], "name": "WD_SWITCH_ON_EOP"},
13099 {"bits": [21, 21], "name": "EN_INST_OPT_BASIC"},
13100 {"bits": [22, 22], "name": "EN_INST_OPT_ADV"},
13101 {"bits": [23, 23], "name": "HW_USE_ONLY"}
13104 "IA_PERFCOUNTER0_SELECT": {
13106 {"bits": [0, 9], "name": "PERF_SEL"},
13107 {"bits": [10, 19], "name": "PERF_SEL1"},
13108 {"bits": [20, 23], "name": "CNTR_MODE"},
13109 {"bits": [24, 27], "name": "PERF_MODE1"},
13110 {"bits": [28, 31], "name": "PERF_MODE"}
13113 "IA_PERFCOUNTER0_SELECT1": {
13115 {"bits": [0, 9], "name": "PERF_SEL2"},
13116 {"bits": [10, 19], "name": "PERF_SEL3"},
13117 {"bits": [24, 27], "name": "PERF_MODE3"},
13118 {"bits": [28, 31], "name": "PERF_MODE2"}
13121 "PA_CL_CLIP_CNTL": {
13123 {"bits": [0, 0], "name": "UCP_ENA_0"},
13124 {"bits": [1, 1], "name": "UCP_ENA_1"},
13125 {"bits": [2, 2], "name": "UCP_ENA_2"},
13126 {"bits": [3, 3], "name": "UCP_ENA_3"},
13127 {"bits": [4, 4], "name": "UCP_ENA_4"},
13128 {"bits": [5, 5], "name": "UCP_ENA_5"},
13129 {"bits": [13, 13], "name": "PS_UCP_Y_SCALE_NEG"},
13130 {"bits": [14, 15], "name": "PS_UCP_MODE"},
13131 {"bits": [16, 16], "name": "CLIP_DISABLE"},
13132 {"bits": [17, 17], "name": "UCP_CULL_ONLY_ENA"},
13133 {"bits": [18, 18], "name": "BOUNDARY_EDGE_FLAG_ENA"},
13134 {"bits": [19, 19], "name": "DX_CLIP_SPACE_DEF"},
13135 {"bits": [20, 20], "name": "DIS_CLIP_ERR_DETECT"},
13136 {"bits": [21, 21], "name": "VTX_KILL_OR"},
13137 {"bits": [22, 22], "name": "DX_RASTERIZATION_KILL"},
13138 {"bits": [24, 24], "name": "DX_LINEAR_ATTR_CLIP_ENA"},
13139 {"bits": [25, 25], "name": "VTE_VPORT_PROVOKE_DISABLE"},
13140 {"bits": [26, 26], "name": "ZCLIP_NEAR_DISABLE"},
13141 {"bits": [27, 27], "name": "ZCLIP_FAR_DISABLE"},
13142 {"bits": [28, 28], "name": "ZCLIP_PROG_NEAR_ENA"}
13145 "PA_CL_NANINF_CNTL": {
13147 {"bits": [0, 0], "name": "VTE_XY_INF_DISCARD"},
13148 {"bits": [1, 1], "name": "VTE_Z_INF_DISCARD"},
13149 {"bits": [2, 2], "name": "VTE_W_INF_DISCARD"},
13150 {"bits": [3, 3], "name": "VTE_0XNANINF_IS_0"},
13151 {"bits": [4, 4], "name": "VTE_XY_NAN_RETAIN"},
13152 {"bits": [5, 5], "name": "VTE_Z_NAN_RETAIN"},
13153 {"bits": [6, 6], "name": "VTE_W_NAN_RETAIN"},
13154 {"bits": [7, 7], "name": "VTE_W_RECIP_NAN_IS_0"},
13155 {"bits": [8, 8], "name": "VS_XY_NAN_TO_INF"},
13156 {"bits": [9, 9], "name": "VS_XY_INF_RETAIN"},
13157 {"bits": [10, 10], "name": "VS_Z_NAN_TO_INF"},
13158 {"bits": [11, 11], "name": "VS_Z_INF_RETAIN"},
13159 {"bits": [12, 12], "name": "VS_W_NAN_TO_INF"},
13160 {"bits": [13, 13], "name": "VS_W_INF_RETAIN"},
13161 {"bits": [14, 14], "name": "VS_CLIP_DIST_INF_DISCARD"},
13162 {"bits": [20, 20], "name": "VTE_NO_OUTPUT_NEG_0"}
13165 "PA_CL_NGG_CNTL": {
13167 {"bits": [0, 0], "name": "VERTEX_REUSE_OFF"},
13168 {"bits": [1, 1], "name": "INDEX_BUF_EDGE_FLAG_ENA"}
13171 "PA_CL_OBJPRIM_ID_CNTL": {
13173 {"bits": [0, 0], "name": "OBJ_ID_SEL"},
13174 {"bits": [1, 1], "name": "ADD_PIPED_PRIM_ID"},
13175 {"bits": [2, 2], "name": "EN_32BIT_OBJPRIMID"}
13180 {"bits": [0, 31], "name": "DATA_REGISTER"}
13183 "PA_CL_VPORT_XOFFSET": {
13185 {"bits": [0, 31], "name": "VPORT_XOFFSET"}
13188 "PA_CL_VPORT_XSCALE": {
13190 {"bits": [0, 31], "name": "VPORT_XSCALE"}
13193 "PA_CL_VPORT_YOFFSET": {
13195 {"bits": [0, 31], "name": "VPORT_YOFFSET"}
13198 "PA_CL_VPORT_YSCALE": {
13200 {"bits": [0, 31], "name": "VPORT_YSCALE"}
13203 "PA_CL_VPORT_ZOFFSET": {
13205 {"bits": [0, 31], "name": "VPORT_ZOFFSET"}
13208 "PA_CL_VPORT_ZSCALE": {
13210 {"bits": [0, 31], "name": "VPORT_ZSCALE"}
13213 "PA_CL_VS_OUT_CNTL": {
13215 {"bits": [0, 0], "name": "CLIP_DIST_ENA_0"},
13216 {"bits": [1, 1], "name": "CLIP_DIST_ENA_1"},
13217 {"bits": [2, 2], "name": "CLIP_DIST_ENA_2"},
13218 {"bits": [3, 3], "name": "CLIP_DIST_ENA_3"},
13219 {"bits": [4, 4], "name": "CLIP_DIST_ENA_4"},
13220 {"bits": [5, 5], "name": "CLIP_DIST_ENA_5"},
13221 {"bits": [6, 6], "name": "CLIP_DIST_ENA_6"},
13222 {"bits": [7, 7], "name": "CLIP_DIST_ENA_7"},
13223 {"bits": [8, 8], "name": "CULL_DIST_ENA_0"},
13224 {"bits": [9, 9], "name": "CULL_DIST_ENA_1"},
13225 {"bits": [10, 10], "name": "CULL_DIST_ENA_2"},
13226 {"bits": [11, 11], "name": "CULL_DIST_ENA_3"},
13227 {"bits": [12, 12], "name": "CULL_DIST_ENA_4"},
13228 {"bits": [13, 13], "name": "CULL_DIST_ENA_5"},
13229 {"bits": [14, 14], "name": "CULL_DIST_ENA_6"},
13230 {"bits": [15, 15], "name": "CULL_DIST_ENA_7"},
13231 {"bits": [16, 16], "name": "USE_VTX_POINT_SIZE"},
13232 {"bits": [17, 17], "name": "USE_VTX_EDGE_FLAG"},
13233 {"bits": [18, 18], "name": "USE_VTX_RENDER_TARGET_INDX"},
13234 {"bits": [19, 19], "name": "USE_VTX_VIEWPORT_INDX"},
13235 {"bits": [20, 20], "name": "USE_VTX_KILL_FLAG"},
13236 {"bits": [21, 21], "name": "VS_OUT_MISC_VEC_ENA"},
13237 {"bits": [22, 22], "name": "VS_OUT_CCDIST0_VEC_ENA"},
13238 {"bits": [23, 23], "name": "VS_OUT_CCDIST1_VEC_ENA"},
13239 {"bits": [24, 24], "name": "VS_OUT_MISC_SIDE_BUS_ENA"},
13240 {"bits": [25, 25], "name": "USE_VTX_GS_CUT_FLAG"},
13241 {"bits": [26, 26], "name": "USE_VTX_LINE_WIDTH"},
13242 {"bits": [27, 27], "name": "USE_VTX_SHD_OBJPRIM_ID"}
13245 "PA_CL_VTE_CNTL": {
13247 {"bits": [0, 0], "name": "VPORT_X_SCALE_ENA"},
13248 {"bits": [1, 1], "name": "VPORT_X_OFFSET_ENA"},
13249 {"bits": [2, 2], "name": "VPORT_Y_SCALE_ENA"},
13250 {"bits": [3, 3], "name": "VPORT_Y_OFFSET_ENA"},
13251 {"bits": [4, 4], "name": "VPORT_Z_SCALE_ENA"},
13252 {"bits": [5, 5], "name": "VPORT_Z_OFFSET_ENA"},
13253 {"bits": [8, 8], "name": "VTX_XY_FMT"},
13254 {"bits": [9, 9], "name": "VTX_Z_FMT"},
13255 {"bits": [10, 10], "name": "VTX_W0_FMT"},
13256 {"bits": [11, 11], "name": "PERFCOUNTER_REF"}
13259 "PA_SC_AA_CONFIG": {
13261 {"bits": [0, 2], "name": "MSAA_NUM_SAMPLES"},
13262 {"bits": [4, 4], "name": "AA_MASK_CENTROID_DTMN"},
13263 {"bits": [13, 16], "name": "MAX_SAMPLE_DIST"},
13264 {"bits": [20, 22], "name": "MSAA_EXPOSED_SAMPLES"},
13265 {"bits": [24, 25], "name": "DETAIL_TO_EXPOSED_MODE"},
13266 {"bits": [26, 27], "enum_ref": "CovToShaderSel", "name": "COVERAGE_TO_SHADER_SELECT"}
13269 "PA_SC_AA_MASK_X0Y0_X1Y0": {
13271 {"bits": [0, 15], "name": "AA_MASK_X0Y0"},
13272 {"bits": [16, 31], "name": "AA_MASK_X1Y0"}
13275 "PA_SC_AA_MASK_X0Y1_X1Y1": {
13277 {"bits": [0, 15], "name": "AA_MASK_X0Y1"},
13278 {"bits": [16, 31], "name": "AA_MASK_X1Y1"}
13281 "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_0": {
13283 {"bits": [0, 3], "name": "S0_X"},
13284 {"bits": [4, 7], "name": "S0_Y"},
13285 {"bits": [8, 11], "name": "S1_X"},
13286 {"bits": [12, 15], "name": "S1_Y"},
13287 {"bits": [16, 19], "name": "S2_X"},
13288 {"bits": [20, 23], "name": "S2_Y"},
13289 {"bits": [24, 27], "name": "S3_X"},
13290 {"bits": [28, 31], "name": "S3_Y"}
13293 "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_1": {
13295 {"bits": [0, 3], "name": "S4_X"},
13296 {"bits": [4, 7], "name": "S4_Y"},
13297 {"bits": [8, 11], "name": "S5_X"},
13298 {"bits": [12, 15], "name": "S5_Y"},
13299 {"bits": [16, 19], "name": "S6_X"},
13300 {"bits": [20, 23], "name": "S6_Y"},
13301 {"bits": [24, 27], "name": "S7_X"},
13302 {"bits": [28, 31], "name": "S7_Y"}
13305 "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_2": {
13307 {"bits": [0, 3], "name": "S8_X"},
13308 {"bits": [4, 7], "name": "S8_Y"},
13309 {"bits": [8, 11], "name": "S9_X"},
13310 {"bits": [12, 15], "name": "S9_Y"},
13311 {"bits": [16, 19], "name": "S10_X"},
13312 {"bits": [20, 23], "name": "S10_Y"},
13313 {"bits": [24, 27], "name": "S11_X"},
13314 {"bits": [28, 31], "name": "S11_Y"}
13317 "PA_SC_AA_SAMPLE_LOCS_PIXEL_X0Y0_3": {
13319 {"bits": [0, 3], "name": "S12_X"},
13320 {"bits": [4, 7], "name": "S12_Y"},
13321 {"bits": [8, 11], "name": "S13_X"},
13322 {"bits": [12, 15], "name": "S13_Y"},
13323 {"bits": [16, 19], "name": "S14_X"},
13324 {"bits": [20, 23], "name": "S14_Y"},
13325 {"bits": [24, 27], "name": "S15_X"},
13326 {"bits": [28, 31], "name": "S15_Y"}
13329 "PA_SC_BINNER_CNTL_0": {
13331 {"bits": [0, 1], "enum_ref": "BinningMode", "name": "BINNING_MODE"},
13332 {"bits": [2, 2], "name": "BIN_SIZE_X"},
13333 {"bits": [3, 3], "name": "BIN_SIZE_Y"},
13334 {"bits": [4, 6], "name": "BIN_SIZE_X_EXTEND"},
13335 {"bits": [7, 9], "name": "BIN_SIZE_Y_EXTEND"},
13336 {"bits": [10, 12], "name": "CONTEXT_STATES_PER_BIN"},
13337 {"bits": [13, 17], "name": "PERSISTENT_STATES_PER_BIN"},
13338 {"bits": [18, 18], "name": "DISABLE_START_OF_PRIM"},
13339 {"bits": [19, 26], "name": "FPOVS_PER_BATCH"},
13340 {"bits": [27, 27], "name": "OPTIMAL_BIN_SELECTION"},
13341 {"bits": [28, 28], "name": "FLUSH_ON_BINNING_TRANSITION"}
13344 "PA_SC_BINNER_CNTL_1": {
13346 {"bits": [0, 15], "name": "MAX_ALLOC_COUNT"},
13347 {"bits": [16, 31], "name": "MAX_PRIM_PER_BATCH"}
13350 "PA_SC_CENTROID_PRIORITY_0": {
13352 {"bits": [0, 3], "name": "DISTANCE_0"},
13353 {"bits": [4, 7], "name": "DISTANCE_1"},
13354 {"bits": [8, 11], "name": "DISTANCE_2"},
13355 {"bits": [12, 15], "name": "DISTANCE_3"},
13356 {"bits": [16, 19], "name": "DISTANCE_4"},
13357 {"bits": [20, 23], "name": "DISTANCE_5"},
13358 {"bits": [24, 27], "name": "DISTANCE_6"},
13359 {"bits": [28, 31], "name": "DISTANCE_7"}
13362 "PA_SC_CENTROID_PRIORITY_1": {
13364 {"bits": [0, 3], "name": "DISTANCE_8"},
13365 {"bits": [4, 7], "name": "DISTANCE_9"},
13366 {"bits": [8, 11], "name": "DISTANCE_10"},
13367 {"bits": [12, 15], "name": "DISTANCE_11"},
13368 {"bits": [16, 19], "name": "DISTANCE_12"},
13369 {"bits": [20, 23], "name": "DISTANCE_13"},
13370 {"bits": [24, 27], "name": "DISTANCE_14"},
13371 {"bits": [28, 31], "name": "DISTANCE_15"}
13374 "PA_SC_CLIPRECT_0_TL": {
13376 {"bits": [0, 14], "name": "TL_X"},
13377 {"bits": [16, 30], "name": "TL_Y"}
13380 "PA_SC_CLIPRECT_RULE": {
13382 {"bits": [0, 15], "enum_ref": "CLIP_RULE", "name": "CLIP_RULE"}
13385 "PA_SC_CONSERVATIVE_RASTERIZATION_CNTL": {
13387 {"bits": [0, 0], "name": "OVER_RAST_ENABLE"},
13388 {"bits": [1, 4], "name": "OVER_RAST_SAMPLE_SELECT"},
13389 {"bits": [5, 5], "name": "UNDER_RAST_ENABLE"},
13390 {"bits": [6, 9], "name": "UNDER_RAST_SAMPLE_SELECT"},
13391 {"bits": [10, 10], "name": "PBB_UNCERTAINTY_REGION_ENABLE"},
13392 {"bits": [11, 11], "name": "ZMM_TRI_EXTENT"},
13393 {"bits": [12, 12], "name": "ZMM_TRI_OFFSET"},
13394 {"bits": [13, 13], "name": "OVERRIDE_OVER_RAST_INNER_TO_NORMAL"},
13395 {"bits": [14, 14], "name": "OVERRIDE_UNDER_RAST_INNER_TO_NORMAL"},
13396 {"bits": [15, 15], "name": "DEGENERATE_OVERRIDE_INNER_TO_NORMAL_DISABLE"},
13397 {"bits": [16, 17], "name": "UNCERTAINTY_REGION_MODE"},
13398 {"bits": [18, 18], "name": "OUTER_UNCERTAINTY_EDGERULE_OVERRIDE"},
13399 {"bits": [19, 19], "name": "INNER_UNCERTAINTY_EDGERULE_OVERRIDE"},
13400 {"bits": [20, 20], "name": "NULL_SQUAD_AA_MASK_ENABLE"},
13401 {"bits": [21, 21], "name": "COVERAGE_AA_MASK_ENABLE"},
13402 {"bits": [22, 22], "name": "PREZ_AA_MASK_ENABLE"},
13403 {"bits": [23, 23], "name": "POSTZ_AA_MASK_ENABLE"},
13404 {"bits": [24, 24], "name": "CENTROID_SAMPLE_OVERRIDE"}
13407 "PA_SC_EDGERULE": {
13409 {"bits": [0, 3], "name": "ER_TRI"},
13410 {"bits": [4, 7], "name": "ER_POINT"},
13411 {"bits": [8, 11], "name": "ER_RECT"},
13412 {"bits": [12, 17], "name": "ER_LINE_LR"},
13413 {"bits": [18, 23], "name": "ER_LINE_RL"},
13414 {"bits": [24, 27], "name": "ER_LINE_TB"},
13415 {"bits": [28, 31], "name": "ER_LINE_BT"}
13418 "PA_SC_HORIZ_GRID": {
13420 {"bits": [0, 7], "name": "TOP_QTR"},
13421 {"bits": [8, 15], "name": "TOP_HALF"},
13422 {"bits": [16, 23], "name": "BOT_HALF"},
13423 {"bits": [24, 31], "name": "BOT_QTR"}
13426 "PA_SC_LINE_CNTL": {
13428 {"bits": [9, 9], "name": "EXPAND_LINE_WIDTH"},
13429 {"bits": [10, 10], "name": "LAST_PIXEL"},
13430 {"bits": [11, 11], "name": "PERPENDICULAR_ENDCAP_ENA"},
13431 {"bits": [12, 12], "name": "DX10_DIAMOND_TEST_ENA"},
13432 {"bits": [13, 13], "name": "EXTRA_DX_DY_PRECISION"}
13435 "PA_SC_LINE_STIPPLE": {
13437 {"bits": [0, 15], "name": "LINE_PATTERN"},
13438 {"bits": [16, 23], "name": "REPEAT_COUNT"},
13439 {"bits": [28, 28], "name": "PATTERN_BIT_ORDER"},
13440 {"bits": [29, 30], "name": "AUTO_RESET_CNTL"}
13443 "PA_SC_LINE_STIPPLE_STATE": {
13445 {"bits": [0, 3], "name": "CURRENT_PTR"},
13446 {"bits": [8, 15], "name": "CURRENT_COUNT"}
13449 "PA_SC_MODE_CNTL_0": {
13451 {"bits": [0, 0], "name": "MSAA_ENABLE"},
13452 {"bits": [1, 1], "name": "VPORT_SCISSOR_ENABLE"},
13453 {"bits": [2, 2], "name": "LINE_STIPPLE_ENABLE"},
13454 {"bits": [3, 3], "name": "SEND_UNLIT_STILES_TO_PKR"},
13455 {"bits": [4, 4], "name": "SCALE_LINE_WIDTH_PAD"},
13456 {"bits": [5, 5], "name": "ALTERNATE_RBS_PER_TILE"},
13457 {"bits": [6, 6], "name": "COARSE_TILE_STARTS_ON_EVEN_RB"}
13460 "PA_SC_MODE_CNTL_1": {
13462 {"bits": [0, 0], "name": "WALK_SIZE"},
13463 {"bits": [1, 1], "name": "WALK_ALIGNMENT"},
13464 {"bits": [2, 2], "name": "WALK_ALIGN8_PRIM_FITS_ST"},
13465 {"bits": [3, 3], "name": "WALK_FENCE_ENABLE"},
13466 {"bits": [4, 6], "name": "WALK_FENCE_SIZE"},
13467 {"bits": [7, 7], "name": "SUPERTILE_WALK_ORDER_ENABLE"},
13468 {"bits": [8, 8], "name": "TILE_WALK_ORDER_ENABLE"},
13469 {"bits": [9, 9], "name": "TILE_COVER_DISABLE"},
13470 {"bits": [10, 10], "name": "TILE_COVER_NO_SCISSOR"},
13471 {"bits": [11, 11], "name": "ZMM_LINE_EXTENT"},
13472 {"bits": [12, 12], "name": "ZMM_LINE_OFFSET"},
13473 {"bits": [13, 13], "name": "ZMM_RECT_EXTENT"},
13474 {"bits": [14, 14], "name": "KILL_PIX_POST_HI_Z"},
13475 {"bits": [15, 15], "name": "KILL_PIX_POST_DETAIL_MASK"},
13476 {"bits": [16, 16], "name": "PS_ITER_SAMPLE"},
13477 {"bits": [17, 17], "name": "MULTI_SHADER_ENGINE_PRIM_DISCARD_ENABLE"},
13478 {"bits": [18, 18], "name": "MULTI_GPU_SUPERTILE_ENABLE"},
13479 {"bits": [19, 19], "name": "GPU_ID_OVERRIDE_ENABLE"},
13480 {"bits": [20, 23], "name": "GPU_ID_OVERRIDE"},
13481 {"bits": [24, 24], "name": "MULTI_GPU_PRIM_DISCARD_ENABLE"},
13482 {"bits": [25, 25], "name": "FORCE_EOV_CNTDWN_ENABLE"},
13483 {"bits": [26, 26], "name": "FORCE_EOV_REZ_ENABLE"},
13484 {"bits": [27, 27], "name": "OUT_OF_ORDER_PRIMITIVE_ENABLE"},
13485 {"bits": [28, 30], "name": "OUT_OF_ORDER_WATER_MARK"}
13488 "PA_SC_NGG_MODE_CNTL": {
13490 {"bits": [0, 10], "name": "MAX_DEALLOCS_IN_WAVE"}
13493 "PA_SC_P3D_TRAP_SCREEN_H": {
13495 {"bits": [0, 13], "name": "X_COORD"}
13498 "PA_SC_P3D_TRAP_SCREEN_HV_EN": {
13500 {"bits": [0, 0], "name": "ENABLE_HV_PRE_SHADER"},
13501 {"bits": [1, 1], "name": "FORCE_PRE_SHADER_ALL_PIXELS"}
13504 "PA_SC_P3D_TRAP_SCREEN_OCCURRENCE": {
13506 {"bits": [0, 15], "name": "COUNT"}
13509 "PA_SC_P3D_TRAP_SCREEN_V": {
13511 {"bits": [0, 13], "name": "Y_COORD"}
13514 "PA_SC_PERFCOUNTER1_SELECT": {
13516 {"bits": [0, 9], "name": "PERF_SEL"}
13519 "PA_SC_RASTER_CONFIG": {
13521 {"bits": [0, 1], "enum_ref": "RbMap", "name": "RB_MAP_PKR0"},
13522 {"bits": [2, 3], "enum_ref": "RbMap", "name": "RB_MAP_PKR1"},
13523 {"bits": [4, 5], "enum_ref": "RbXsel2", "name": "RB_XSEL2"},
13524 {"bits": [6, 6], "enum_ref": "RbXsel", "name": "RB_XSEL"},
13525 {"bits": [7, 7], "enum_ref": "RbYsel", "name": "RB_YSEL"},
13526 {"bits": [8, 9], "enum_ref": "PkrMap", "name": "PKR_MAP"},
13527 {"bits": [10, 11], "enum_ref": "PkrXsel", "name": "PKR_XSEL"},
13528 {"bits": [12, 13], "enum_ref": "PkrYsel", "name": "PKR_YSEL"},
13529 {"bits": [14, 15], "enum_ref": "PkrXsel2", "name": "PKR_XSEL2"},
13530 {"bits": [16, 17], "enum_ref": "ScMap", "name": "SC_MAP"},
13531 {"bits": [18, 19], "enum_ref": "ScXsel", "name": "SC_XSEL"},
13532 {"bits": [20, 21], "enum_ref": "ScYsel", "name": "SC_YSEL"},
13533 {"bits": [24, 25], "enum_ref": "SeMap", "name": "SE_MAP"},
13534 {"bits": [26, 28], "enum_ref": "SeXsel", "name": "SE_XSEL"},
13535 {"bits": [29, 31], "enum_ref": "SeYsel", "name": "SE_YSEL"}
13538 "PA_SC_RASTER_CONFIG_1": {
13540 {"bits": [0, 1], "enum_ref": "SePairMap", "name": "SE_PAIR_MAP"},
13541 {"bits": [2, 4], "enum_ref": "SePairXsel", "name": "SE_PAIR_XSEL"},
13542 {"bits": [5, 7], "enum_ref": "SePairYsel", "name": "SE_PAIR_YSEL"}
13545 "PA_SC_RIGHT_VERT_GRID": {
13547 {"bits": [0, 7], "name": "LEFT_QTR"},
13548 {"bits": [8, 15], "name": "LEFT_HALF"},
13549 {"bits": [16, 23], "name": "RIGHT_HALF"},
13550 {"bits": [24, 31], "name": "RIGHT_QTR"}
13553 "PA_SC_SCREEN_EXTENT_CONTROL": {
13555 {"bits": [0, 1], "name": "SLICE_EVEN_ENABLE"},
13556 {"bits": [2, 3], "name": "SLICE_ODD_ENABLE"}
13559 "PA_SC_SCREEN_EXTENT_MIN_0": {
13561 {"bits": [0, 15], "name": "X"},
13562 {"bits": [16, 31], "name": "Y"}
13565 "PA_SC_SCREEN_SCISSOR_BR": {
13567 {"bits": [0, 15], "name": "BR_X"},
13568 {"bits": [16, 31], "name": "BR_Y"}
13571 "PA_SC_SCREEN_SCISSOR_TL": {
13573 {"bits": [0, 15], "name": "TL_X"},
13574 {"bits": [16, 31], "name": "TL_Y"}
13577 "PA_SC_SHADER_CONTROL": {
13579 {"bits": [0, 1], "name": "REALIGN_DQUADS_AFTER_N_WAVES"},
13580 {"bits": [2, 2], "name": "LOAD_COLLISION_WAVEID"},
13581 {"bits": [3, 3], "name": "LOAD_INTRAWAVE_COLLISION"}
13584 "PA_SC_TILE_STEERING_OVERRIDE": {
13586 {"bits": [0, 0], "name": "ENABLE"},
13587 {"bits": [1, 2], "name": "NUM_SE"},
13588 {"bits": [5, 6], "name": "NUM_RB_PER_SE"}
13591 "PA_SC_VPORT_ZMAX_0": {
13593 {"bits": [0, 31], "name": "VPORT_ZMAX"}
13596 "PA_SC_VPORT_ZMIN_0": {
13598 {"bits": [0, 31], "name": "VPORT_ZMIN"}
13601 "PA_SC_WINDOW_OFFSET": {
13603 {"bits": [0, 15], "name": "WINDOW_X_OFFSET"},
13604 {"bits": [16, 31], "name": "WINDOW_Y_OFFSET"}
13607 "PA_SC_WINDOW_SCISSOR_BR": {
13609 {"bits": [0, 14], "name": "BR_X"},
13610 {"bits": [16, 30], "name": "BR_Y"}
13613 "PA_SC_WINDOW_SCISSOR_TL": {
13615 {"bits": [0, 14], "name": "TL_X"},
13616 {"bits": [16, 30], "name": "TL_Y"},
13617 {"bits": [31, 31], "name": "WINDOW_OFFSET_DISABLE"}
13620 "PA_STATE_STEREO_X": {
13622 {"bits": [0, 31], "name": "STEREO_X_OFFSET"}
13625 "PA_STEREO_CNTL": {
13627 {"bits": [0, 0], "name": "EN_STEREO"},
13628 {"bits": [1, 4], "name": "STEREO_MODE"},
13629 {"bits": [5, 7], "name": "RT_SLICE_MODE"},
13630 {"bits": [8, 9], "name": "RT_SLICE_OFFSET"},
13631 {"bits": [10, 12], "name": "VP_ID_MODE"},
13632 {"bits": [13, 16], "name": "VP_ID_OFFSET"}
13635 "PA_SU_HARDWARE_SCREEN_OFFSET": {
13637 {"bits": [0, 8], "name": "HW_SCREEN_OFFSET_X"},
13638 {"bits": [16, 24], "name": "HW_SCREEN_OFFSET_Y"}
13641 "PA_SU_LINE_CNTL": {
13643 {"bits": [0, 15], "name": "WIDTH"}
13646 "PA_SU_LINE_STIPPLE_CNTL": {
13648 {"bits": [0, 1], "name": "LINE_STIPPLE_RESET"},
13649 {"bits": [2, 2], "name": "EXPAND_FULL_LENGTH"},
13650 {"bits": [3, 3], "name": "FRACTIONAL_ACCUM"},
13651 {"bits": [4, 4], "name": "DIAMOND_ADJUST"}
13654 "PA_SU_LINE_STIPPLE_SCALE": {
13656 {"bits": [0, 31], "name": "LINE_STIPPLE_SCALE"}
13659 "PA_SU_LINE_STIPPLE_VALUE": {
13661 {"bits": [0, 23], "name": "LINE_STIPPLE_VALUE"}
13664 "PA_SU_OVER_RASTERIZATION_CNTL": {
13666 {"bits": [0, 0], "name": "DISCARD_0_AREA_TRIANGLES"},
13667 {"bits": [1, 1], "name": "DISCARD_0_AREA_LINES"},
13668 {"bits": [2, 2], "name": "DISCARD_0_AREA_POINTS"},
13669 {"bits": [3, 3], "name": "DISCARD_0_AREA_RECTANGLES"},
13670 {"bits": [4, 4], "name": "USE_PROVOKING_ZW"}
13673 "PA_SU_PERFCOUNTER0_HI": {
13675 {"bits": [0, 15], "name": "PERFCOUNTER_HI"}
13678 "PA_SU_PERFCOUNTER2_SELECT": {
13680 {"bits": [0, 9], "name": "PERF_SEL"},
13681 {"bits": [20, 23], "name": "CNTR_MODE"},
13682 {"bits": [28, 31], "name": "PERF_MODE"}
13685 "PA_SU_POINT_MINMAX": {
13687 {"bits": [0, 15], "name": "MIN_SIZE"},
13688 {"bits": [16, 31], "name": "MAX_SIZE"}
13691 "PA_SU_POINT_SIZE": {
13693 {"bits": [0, 15], "name": "HEIGHT"},
13694 {"bits": [16, 31], "name": "WIDTH"}
13697 "PA_SU_POLY_OFFSET_CLAMP": {
13699 {"bits": [0, 31], "name": "CLAMP"}
13702 "PA_SU_POLY_OFFSET_DB_FMT_CNTL": {
13704 {"bits": [0, 7], "name": "POLY_OFFSET_NEG_NUM_DB_BITS"},
13705 {"bits": [8, 8], "name": "POLY_OFFSET_DB_IS_FLOAT_FMT"}
13708 "PA_SU_POLY_OFFSET_FRONT_SCALE": {
13710 {"bits": [0, 31], "name": "SCALE"}
13713 "PA_SU_PRIM_FILTER_CNTL": {
13715 {"bits": [0, 0], "name": "TRIANGLE_FILTER_DISABLE"},
13716 {"bits": [1, 1], "name": "LINE_FILTER_DISABLE"},
13717 {"bits": [2, 2], "name": "POINT_FILTER_DISABLE"},
13718 {"bits": [3, 3], "name": "RECTANGLE_FILTER_DISABLE"},
13719 {"bits": [4, 4], "name": "TRIANGLE_EXPAND_ENA"},
13720 {"bits": [5, 5], "name": "LINE_EXPAND_ENA"},
13721 {"bits": [6, 6], "name": "POINT_EXPAND_ENA"},
13722 {"bits": [7, 7], "name": "RECTANGLE_EXPAND_ENA"},
13723 {"bits": [8, 15], "name": "PRIM_EXPAND_CONSTANT"},
13724 {"bits": [30, 30], "name": "XMAX_RIGHT_EXCLUSION"},
13725 {"bits": [31, 31], "name": "YMAX_BOTTOM_EXCLUSION"}
13728 "PA_SU_SC_MODE_CNTL": {
13730 {"bits": [0, 0], "name": "CULL_FRONT"},
13731 {"bits": [1, 1], "name": "CULL_BACK"},
13732 {"bits": [2, 2], "name": "FACE"},
13733 {"bits": [3, 4], "enum_ref": "PA_SU_SC_MODE_CNTL__POLY_MODE", "name": "POLY_MODE"},
13734 {"bits": [5, 7], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_FRONT_PTYPE"},
13735 {"bits": [8, 10], "enum_ref": "PA_SU_SC_MODE_CNTL__POLYMODE_FRONT_PTYPE", "name": "POLYMODE_BACK_PTYPE"},
13736 {"bits": [11, 11], "name": "POLY_OFFSET_FRONT_ENABLE"},
13737 {"bits": [12, 12], "name": "POLY_OFFSET_BACK_ENABLE"},
13738 {"bits": [13, 13], "name": "POLY_OFFSET_PARA_ENABLE"},
13739 {"bits": [16, 16], "name": "VTX_WINDOW_OFFSET_ENABLE"},
13740 {"bits": [19, 19], "name": "PROVOKING_VTX_LAST"},
13741 {"bits": [20, 20], "name": "PERSP_CORR_DIS"},
13742 {"bits": [21, 21], "name": "MULTI_PRIM_IB_ENA"},
13743 {"bits": [22, 22], "name": "RIGHT_TRIANGLE_ALTERNATE_GRADIENT_REF"},
13744 {"bits": [23, 23], "name": "NEW_QUAD_DECOMPOSITION"}
13747 "PA_SU_SMALL_PRIM_FILTER_CNTL": {
13749 {"bits": [0, 0], "name": "SMALL_PRIM_FILTER_ENABLE"},
13750 {"bits": [1, 1], "name": "TRIANGLE_FILTER_DISABLE"},
13751 {"bits": [2, 2], "name": "LINE_FILTER_DISABLE"},
13752 {"bits": [3, 3], "name": "POINT_FILTER_DISABLE"},
13753 {"bits": [4, 4], "name": "RECTANGLE_FILTER_DISABLE"},
13754 {"bits": [6, 6], "name": "SC_1XMSAA_COMPATIBLE_DISABLE"}
13757 "PA_SU_VTX_CNTL": {
13759 {"bits": [0, 0], "name": "PIX_CENTER"},
13760 {"bits": [1, 2], "enum_ref": "PA_SU_VTX_CNTL__ROUND_MODE", "name": "ROUND_MODE"},
13761 {"bits": [3, 5], "enum_ref": "QUANT_MODE", "name": "QUANT_MODE"}
13764 "RLC_GPM_PERF_COUNT_0": {
13766 {"bits": [0, 3], "name": "FEATURE_SEL"},
13767 {"bits": [4, 7], "name": "SE_INDEX"},
13768 {"bits": [8, 11], "name": "SH_INDEX"},
13769 {"bits": [12, 15], "name": "CU_INDEX"},
13770 {"bits": [16, 17], "name": "EVENT_SEL"},
13771 {"bits": [18, 19], "name": "UNUSED"},
13772 {"bits": [20, 20], "name": "ENABLE"},
13773 {"bits": [21, 31], "name": "RESERVED"}
13776 "RLC_GPU_IOV_PERF_CNT_CNTL": {
13778 {"bits": [0, 0], "name": "ENABLE"},
13779 {"bits": [1, 1], "name": "MODE_SELECT"},
13780 {"bits": [2, 2], "name": "RESET"},
13781 {"bits": [3, 31], "name": "RESERVED"}
13784 "RLC_GPU_IOV_PERF_CNT_WR_ADDR": {
13786 {"bits": [0, 3], "name": "VFID"},
13787 {"bits": [4, 5], "name": "CNT_ID"},
13788 {"bits": [6, 31], "name": "RESERVED"}
13791 "RLC_PERFCOUNTER0_SELECT": {
13793 {"bits": [0, 7], "name": "PERFCOUNTER_SELECT"}
13796 "RLC_PERFMON_CLK_CNTL_UCODE": {
13798 {"bits": [0, 0], "name": "PERFMON_CLOCK_STATE"}
13801 "RLC_PERFMON_CNTL": {
13803 {"bits": [0, 2], "enum_ref": "CP_PERFMON_STATE", "name": "PERFMON_STATE"},
13804 {"bits": [10, 10], "name": "PERFMON_SAMPLE_ENABLE"}
13807 "RLC_SPM_CPG_PERFMON_SAMPLE_DELAY": {
13809 {"bits": [0, 7], "name": "PERFMON_SAMPLE_DELAY"},
13810 {"bits": [8, 31], "name": "RESERVED"}
13813 "RLC_SPM_PERFMON_CNTL": {
13815 {"bits": [0, 11], "name": "RESERVED1"},
13816 {"bits": [12, 13], "name": "PERFMON_RING_MODE"},
13817 {"bits": [14, 15], "name": "RESERVED"},
13818 {"bits": [16, 31], "name": "PERFMON_SAMPLE_INTERVAL"}
13821 "RLC_SPM_PERFMON_RING_BASE_HI": {
13823 {"bits": [0, 15], "name": "RING_BASE_HI"},
13824 {"bits": [16, 31], "name": "RESERVED"}
13827 "RLC_SPM_PERFMON_RING_BASE_LO": {
13829 {"bits": [0, 31], "name": "RING_BASE_LO"}
13832 "RLC_SPM_PERFMON_RING_SIZE": {
13834 {"bits": [0, 31], "name": "RING_BASE_SIZE"}
13837 "RLC_SPM_PERFMON_SAMPLE_DELAY_MAX": {
13839 {"bits": [0, 7], "name": "PERFMON_MAX_SAMPLE_DELAY"},
13840 {"bits": [8, 31], "name": "RESERVED"}
13843 "RLC_SPM_PERFMON_SEGMENT_SIZE": {
13845 {"bits": [0, 7], "name": "PERFMON_SEGMENT_SIZE"},
13846 {"bits": [8, 10], "name": "RESERVED1"},
13847 {"bits": [11, 15], "name": "GLOBAL_NUM_LINE"},
13848 {"bits": [16, 20], "name": "SE0_NUM_LINE"},
13849 {"bits": [21, 25], "name": "SE1_NUM_LINE"},
13850 {"bits": [26, 30], "name": "SE2_NUM_LINE"},
13851 {"bits": [31, 31], "name": "RESERVED"}
13854 "RLC_SPM_RING_RDPTR": {
13856 {"bits": [0, 31], "name": "PERFMON_RING_RDPTR"}
13859 "RLC_SPM_SEGMENT_THRESHOLD": {
13861 {"bits": [0, 31], "name": "NUM_SEGMENT_THRESHOLD"}
13864 "RLC_SPM_SE_MUXSEL_ADDR": {
13866 {"bits": [0, 31], "name": "PERFMON_SEL_ADDR"}
13869 "RLC_SPM_SE_MUXSEL_DATA": {
13871 {"bits": [0, 31], "name": "PERFMON_SEL_DATA"}
13874 "RMI_PERF_COUNTER_CNTL": {
13876 {"bits": [0, 1], "name": "TRANS_BASED_PERF_EN_SEL"},
13877 {"bits": [2, 3], "name": "EVENT_BASED_PERF_EN_SEL"},
13878 {"bits": [4, 5], "name": "TC_PERF_EN_SEL"},
13879 {"bits": [6, 7], "name": "PERF_EVENT_WINDOW_MASK0"},
13880 {"bits": [8, 9], "name": "PERF_EVENT_WINDOW_MASK1"},
13881 {"bits": [10, 13], "name": "PERF_COUNTER_CID"},
13882 {"bits": [14, 18], "name": "PERF_COUNTER_VMID"},
13883 {"bits": [19, 24], "name": "PERF_COUNTER_BURST_LENGTH_THRESHOLD"},
13884 {"bits": [25, 25], "name": "PERF_SOFT_RESET"},
13885 {"bits": [26, 26], "name": "PERF_CNTR_SPM_SEL"}
13890 {"bits": [0, 31], "name": "OBSOLETE_ADDR"}
13895 {"bits": [0, 31], "name": "SCRATCH_REG0"}
13900 {"bits": [0, 31], "name": "SCRATCH_REG1"}
13905 {"bits": [0, 31], "name": "SCRATCH_REG2"}
13910 {"bits": [0, 31], "name": "SCRATCH_REG3"}
13915 {"bits": [0, 31], "name": "SCRATCH_REG4"}
13920 {"bits": [0, 31], "name": "SCRATCH_REG5"}
13925 {"bits": [0, 31], "name": "SCRATCH_REG6"}
13930 {"bits": [0, 31], "name": "SCRATCH_REG7"}
13935 {"bits": [0, 7], "name": "OBSOLETE_UMSK"},
13936 {"bits": [16, 17], "name": "OBSOLETE_SWAP"}
13939 "SPI_BARYC_CNTL": {
13941 {"bits": [0, 0], "name": "PERSP_CENTER_CNTL"},
13942 {"bits": [4, 4], "name": "PERSP_CENTROID_CNTL"},
13943 {"bits": [8, 8], "name": "LINEAR_CENTER_CNTL"},
13944 {"bits": [12, 12], "name": "LINEAR_CENTROID_CNTL"},
13945 {"bits": [16, 17], "name": "POS_FLOAT_LOCATION"},
13946 {"bits": [20, 20], "name": "POS_FLOAT_ULC"},
13947 {"bits": [24, 24], "name": "FRONT_FACE_ALL_BITS"}
13950 "SPI_CONFIG_CNTL": {
13952 {"bits": [0, 20], "name": "GPR_WRITE_PRIORITY"},
13953 {"bits": [21, 23], "name": "EXP_PRIORITY_ORDER"},
13954 {"bits": [24, 24], "name": "ENABLE_SQG_TOP_EVENTS"},
13955 {"bits": [25, 25], "name": "ENABLE_SQG_BOP_EVENTS"},
13956 {"bits": [26, 26], "name": "RSRC_MGMT_RESET"},
13957 {"bits": [27, 27], "name": "TTRACE_STALL_ALL"},
13958 {"bits": [28, 28], "name": "ALLOC_ARB_LRU_ENA"},
13959 {"bits": [29, 29], "name": "EXP_ARB_LRU_ENA"},
13960 {"bits": [30, 31], "name": "PS_PKR_PRIORITY_CNTL"}
13963 "SPI_CONFIG_CNTL_1": {
13965 {"bits": [0, 3], "name": "VTX_DONE_DELAY"},
13966 {"bits": [4, 4], "name": "INTERP_ONE_PRIM_PER_ROW"},
13967 {"bits": [5, 5], "name": "BATON_RESET_DISABLE"},
13968 {"bits": [6, 6], "name": "PC_LIMIT_ENABLE"},
13969 {"bits": [7, 7], "name": "PC_LIMIT_STRICT"},
13970 {"bits": [8, 8], "name": "CRC_SIMD_ID_WADDR_DISABLE"},
13971 {"bits": [9, 9], "name": "LBPW_CU_CHK_MODE"},
13972 {"bits": [10, 13], "name": "LBPW_CU_CHK_CNT"},
13973 {"bits": [14, 14], "name": "CSC_PWR_SAVE_DISABLE"},
13974 {"bits": [15, 15], "name": "CSG_PWR_SAVE_DISABLE"},
13975 {"bits": [16, 31], "name": "PC_LIMIT_SIZE"}
13978 "SPI_CONFIG_CNTL_2": {
13980 {"bits": [0, 3], "name": "CONTEXT_SAVE_WAIT_GDS_REQUEST_CYCLE_OVHD"},
13981 {"bits": [4, 7], "name": "CONTEXT_SAVE_WAIT_GDS_GRANT_CYCLE_OVHD"}
13984 "SPI_INTERP_CONTROL_0": {
13986 {"bits": [0, 0], "name": "FLAT_SHADE_ENA"},
13987 {"bits": [1, 1], "name": "PNT_SPRITE_ENA"},
13988 {"bits": [2, 4], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_X"},
13989 {"bits": [5, 7], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Y"},
13990 {"bits": [8, 10], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_Z"},
13991 {"bits": [11, 13], "enum_ref": "SPI_PNT_SPRITE_OVERRIDE", "name": "PNT_SPRITE_OVRD_W"},
13992 {"bits": [14, 14], "name": "PNT_SPRITE_TOP_1"}
13995 "SPI_PERFCOUNTER4_SELECT": {
13997 {"bits": [0, 7], "name": "PERF_SEL"}
14000 "SPI_PERFCOUNTER_BINS": {
14002 {"bits": [0, 3], "name": "BIN0_MIN"},
14003 {"bits": [4, 7], "name": "BIN0_MAX"},
14004 {"bits": [8, 11], "name": "BIN1_MIN"},
14005 {"bits": [12, 15], "name": "BIN1_MAX"},
14006 {"bits": [16, 19], "name": "BIN2_MIN"},
14007 {"bits": [20, 23], "name": "BIN2_MAX"},
14008 {"bits": [24, 27], "name": "BIN3_MIN"},
14009 {"bits": [28, 31], "name": "BIN3_MAX"}
14012 "SPI_PS_INPUT_CNTL_0": {
14014 {"bits": [0, 5], "name": "OFFSET"},
14015 {"bits": [8, 9], "name": "DEFAULT_VAL"},
14016 {"bits": [10, 10], "name": "FLAT_SHADE"},
14017 {"bits": [13, 16], "name": "CYL_WRAP"},
14018 {"bits": [17, 17], "name": "PT_SPRITE_TEX"},
14019 {"bits": [18, 18], "name": "DUP"},
14020 {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
14021 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
14022 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
14023 {"bits": [23, 23], "name": "PT_SPRITE_TEX_ATTR1"},
14024 {"bits": [24, 24], "name": "ATTR0_VALID"},
14025 {"bits": [25, 25], "name": "ATTR1_VALID"}
14028 "SPI_PS_INPUT_CNTL_20": {
14030 {"bits": [0, 5], "name": "OFFSET"},
14031 {"bits": [8, 9], "name": "DEFAULT_VAL"},
14032 {"bits": [10, 10], "name": "FLAT_SHADE"},
14033 {"bits": [18, 18], "name": "DUP"},
14034 {"bits": [19, 19], "name": "FP16_INTERP_MODE"},
14035 {"bits": [20, 20], "name": "USE_DEFAULT_ATTR1"},
14036 {"bits": [21, 22], "name": "DEFAULT_VAL_ATTR1"},
14037 {"bits": [24, 24], "name": "ATTR0_VALID"},
14038 {"bits": [25, 25], "name": "ATTR1_VALID"}
14041 "SPI_PS_INPUT_ENA": {
14043 {"bits": [0, 0], "name": "PERSP_SAMPLE_ENA"},
14044 {"bits": [1, 1], "name": "PERSP_CENTER_ENA"},
14045 {"bits": [2, 2], "name": "PERSP_CENTROID_ENA"},
14046 {"bits": [3, 3], "name": "PERSP_PULL_MODEL_ENA"},
14047 {"bits": [4, 4], "name": "LINEAR_SAMPLE_ENA"},
14048 {"bits": [5, 5], "name": "LINEAR_CENTER_ENA"},
14049 {"bits": [6, 6], "name": "LINEAR_CENTROID_ENA"},
14050 {"bits": [7, 7], "name": "LINE_STIPPLE_TEX_ENA"},
14051 {"bits": [8, 8], "name": "POS_X_FLOAT_ENA"},
14052 {"bits": [9, 9], "name": "POS_Y_FLOAT_ENA"},
14053 {"bits": [10, 10], "name": "POS_Z_FLOAT_ENA"},
14054 {"bits": [11, 11], "name": "POS_W_FLOAT_ENA"},
14055 {"bits": [12, 12], "name": "FRONT_FACE_ENA"},
14056 {"bits": [13, 13], "name": "ANCILLARY_ENA"},
14057 {"bits": [14, 14], "name": "SAMPLE_COVERAGE_ENA"},
14058 {"bits": [15, 15], "name": "POS_FIXED_PT_ENA"}
14061 "SPI_PS_IN_CONTROL": {
14063 {"bits": [0, 5], "name": "NUM_INTERP"},
14064 {"bits": [6, 6], "name": "PARAM_GEN"},
14065 {"bits": [7, 7], "name": "OFFCHIP_PARAM_EN"},
14066 {"bits": [8, 8], "name": "LATE_PC_DEALLOC"},
14067 {"bits": [14, 14], "name": "BC_OPTIMIZE_DISABLE"}
14070 "SPI_SHADER_COL_FORMAT": {
14072 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL0_EXPORT_FORMAT"},
14073 {"bits": [4, 7], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL1_EXPORT_FORMAT"},
14074 {"bits": [8, 11], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL2_EXPORT_FORMAT"},
14075 {"bits": [12, 15], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL3_EXPORT_FORMAT"},
14076 {"bits": [16, 19], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL4_EXPORT_FORMAT"},
14077 {"bits": [20, 23], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL5_EXPORT_FORMAT"},
14078 {"bits": [24, 27], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL6_EXPORT_FORMAT"},
14079 {"bits": [28, 31], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "COL7_EXPORT_FORMAT"}
14082 "SPI_SHADER_LATE_ALLOC_VS": {
14084 {"bits": [0, 5], "name": "LIMIT"}
14087 "SPI_SHADER_PGM_HI_PS": {
14089 {"bits": [0, 7], "name": "MEM_BASE"}
14092 "SPI_SHADER_PGM_LO_PS": {
14094 {"bits": [0, 31], "name": "MEM_BASE"}
14097 "SPI_SHADER_PGM_RSRC1_GS": {
14099 {"bits": [0, 5], "name": "VGPRS"},
14100 {"bits": [6, 9], "name": "SGPRS"},
14101 {"bits": [10, 11], "name": "PRIORITY"},
14102 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
14103 {"bits": [20, 20], "name": "PRIV"},
14104 {"bits": [21, 21], "name": "DX10_CLAMP"},
14105 {"bits": [22, 22], "name": "DEBUG_MODE"},
14106 {"bits": [23, 23], "name": "IEEE_MODE"},
14107 {"bits": [24, 24], "name": "CU_GROUP_ENABLE"},
14108 {"bits": [28, 28], "name": "CDBG_USER"},
14109 {"bits": [29, 30], "name": "GS_VGPR_COMP_CNT"},
14110 {"bits": [31, 31], "name": "FP16_OVFL"}
14113 "SPI_SHADER_PGM_RSRC1_HS": {
14115 {"bits": [0, 5], "name": "VGPRS"},
14116 {"bits": [6, 9], "name": "SGPRS"},
14117 {"bits": [10, 11], "name": "PRIORITY"},
14118 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
14119 {"bits": [20, 20], "name": "PRIV"},
14120 {"bits": [21, 21], "name": "DX10_CLAMP"},
14121 {"bits": [22, 22], "name": "DEBUG_MODE"},
14122 {"bits": [23, 23], "name": "IEEE_MODE"},
14123 {"bits": [27, 27], "name": "CDBG_USER"},
14124 {"bits": [28, 29], "name": "LS_VGPR_COMP_CNT"},
14125 {"bits": [30, 30], "name": "FP16_OVFL"}
14128 "SPI_SHADER_PGM_RSRC1_PS": {
14130 {"bits": [0, 5], "name": "VGPRS"},
14131 {"bits": [6, 9], "name": "SGPRS"},
14132 {"bits": [10, 11], "name": "PRIORITY"},
14133 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
14134 {"bits": [20, 20], "name": "PRIV"},
14135 {"bits": [21, 21], "name": "DX10_CLAMP"},
14136 {"bits": [22, 22], "name": "DEBUG_MODE"},
14137 {"bits": [23, 23], "name": "IEEE_MODE"},
14138 {"bits": [24, 24], "name": "CU_GROUP_DISABLE"},
14139 {"bits": [28, 28], "name": "CDBG_USER"},
14140 {"bits": [29, 29], "name": "FP16_OVFL"}
14143 "SPI_SHADER_PGM_RSRC1_VS": {
14145 {"bits": [0, 5], "name": "VGPRS"},
14146 {"bits": [6, 9], "name": "SGPRS"},
14147 {"bits": [10, 11], "name": "PRIORITY"},
14148 {"bits": [12, 19], "enum_ref": "FLOAT_MODE", "name": "FLOAT_MODE"},
14149 {"bits": [20, 20], "name": "PRIV"},
14150 {"bits": [21, 21], "name": "DX10_CLAMP"},
14151 {"bits": [22, 22], "name": "DEBUG_MODE"},
14152 {"bits": [23, 23], "name": "IEEE_MODE"},
14153 {"bits": [24, 25], "name": "VGPR_COMP_CNT"},
14154 {"bits": [26, 26], "name": "CU_GROUP_ENABLE"},
14155 {"bits": [30, 30], "name": "CDBG_USER"},
14156 {"bits": [31, 31], "name": "FP16_OVFL"}
14159 "SPI_SHADER_PGM_RSRC2_GS": {
14161 {"bits": [0, 0], "name": "SCRATCH_EN"},
14162 {"bits": [1, 5], "name": "USER_SGPR"},
14163 {"bits": [6, 6], "name": "TRAP_PRESENT"},
14164 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
14165 {"bits": [16, 17], "name": "ES_VGPR_COMP_CNT"},
14166 {"bits": [18, 18], "name": "OC_LDS_EN"},
14167 {"bits": [19, 26], "name": "LDS_SIZE"},
14168 {"bits": [27, 27], "name": "SKIP_USGPR0"},
14169 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
14172 "SPI_SHADER_PGM_RSRC2_GS_VS": {
14174 {"bits": [0, 0], "name": "SCRATCH_EN"},
14175 {"bits": [1, 5], "name": "USER_SGPR"},
14176 {"bits": [6, 6], "name": "TRAP_PRESENT"},
14177 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
14178 {"bits": [16, 17], "name": "VGPR_COMP_CNT"},
14179 {"bits": [18, 18], "name": "OC_LDS_EN"},
14180 {"bits": [19, 26], "name": "LDS_SIZE"},
14181 {"bits": [27, 27], "name": "SKIP_USGPR0"},
14182 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
14185 "SPI_SHADER_PGM_RSRC2_HS": {
14187 {"bits": [0, 0], "name": "SCRATCH_EN"},
14188 {"bits": [1, 5], "name": "USER_SGPR"},
14189 {"bits": [6, 6], "name": "TRAP_PRESENT"},
14190 {"bits": [7, 15], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
14191 {"bits": [16, 24], "name": "LDS_SIZE"},
14192 {"bits": [27, 27], "name": "SKIP_USGPR0"},
14193 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
14196 "SPI_SHADER_PGM_RSRC2_PS": {
14198 {"bits": [0, 0], "name": "SCRATCH_EN"},
14199 {"bits": [1, 5], "name": "USER_SGPR"},
14200 {"bits": [6, 6], "name": "TRAP_PRESENT"},
14201 {"bits": [7, 7], "name": "WAVE_CNT_EN"},
14202 {"bits": [8, 15], "name": "EXTRA_LDS_SIZE"},
14203 {"bits": [16, 24], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
14204 {"bits": [25, 25], "name": "LOAD_COLLISION_WAVEID"},
14205 {"bits": [26, 26], "name": "LOAD_INTRAWAVE_COLLISION"},
14206 {"bits": [27, 27], "name": "SKIP_USGPR0"},
14207 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
14210 "SPI_SHADER_PGM_RSRC2_VS": {
14212 {"bits": [0, 0], "name": "SCRATCH_EN"},
14213 {"bits": [1, 5], "name": "USER_SGPR"},
14214 {"bits": [6, 6], "name": "TRAP_PRESENT"},
14215 {"bits": [7, 7], "name": "OC_LDS_EN"},
14216 {"bits": [8, 8], "name": "SO_BASE0_EN"},
14217 {"bits": [9, 9], "name": "SO_BASE1_EN"},
14218 {"bits": [10, 10], "name": "SO_BASE2_EN"},
14219 {"bits": [11, 11], "name": "SO_BASE3_EN"},
14220 {"bits": [12, 12], "name": "SO_EN"},
14221 {"bits": [13, 21], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
14222 {"bits": [22, 22], "name": "PC_BASE_EN"},
14223 {"bits": [24, 24], "name": "DISPATCH_DRAW_EN"},
14224 {"bits": [27, 27], "name": "SKIP_USGPR0"},
14225 {"bits": [28, 28], "name": "USER_SGPR_MSB"}
14228 "SPI_SHADER_PGM_RSRC3_HS": {
14230 {"bits": [0, 5], "name": "WAVE_LIMIT"},
14231 {"bits": [6, 9], "name": "LOCK_LOW_THRESHOLD"},
14232 {"bits": [10, 13], "name": "SIMD_DISABLE"},
14233 {"bits": [16, 31], "name": "CU_EN"}
14236 "SPI_SHADER_PGM_RSRC3_PS": {
14238 {"bits": [0, 15], "name": "CU_EN"},
14239 {"bits": [16, 21], "name": "WAVE_LIMIT"},
14240 {"bits": [22, 25], "name": "LOCK_LOW_THRESHOLD"},
14241 {"bits": [26, 29], "name": "SIMD_DISABLE"}
14244 "SPI_SHADER_PGM_RSRC4_GS": {
14246 {"bits": [0, 6], "name": "GROUP_FIFO_DEPTH"},
14247 {"bits": [7, 13], "name": "SPI_SHADER_LATE_ALLOC_GS"}
14250 "SPI_SHADER_PGM_RSRC4_HS": {
14252 {"bits": [0, 6], "name": "GROUP_FIFO_DEPTH"}
14255 "SPI_SHADER_POS_FORMAT": {
14257 {"bits": [0, 3], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS0_EXPORT_FORMAT"},
14258 {"bits": [4, 7], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS1_EXPORT_FORMAT"},
14259 {"bits": [8, 11], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS2_EXPORT_FORMAT"},
14260 {"bits": [12, 15], "enum_ref": "SPI_SHADER_FORMAT", "name": "POS3_EXPORT_FORMAT"}
14263 "SPI_SHADER_USER_DATA_PS_0": {
14265 {"bits": [0, 31], "name": "DATA"}
14268 "SPI_SHADER_Z_FORMAT": {
14270 {"bits": [0, 3], "enum_ref": "SPI_SHADER_EX_FORMAT", "name": "Z_EXPORT_FORMAT"}
14273 "SPI_VS_OUT_CONFIG": {
14275 {"bits": [1, 5], "name": "VS_EXPORT_COUNT"},
14276 {"bits": [6, 6], "name": "VS_HALF_PACK"}
14279 "SPI_WAVE_LIMIT_CNTL": {
14281 {"bits": [0, 1], "name": "PS_WAVE_GRAN"},
14282 {"bits": [2, 3], "name": "VS_WAVE_GRAN"},
14283 {"bits": [4, 5], "name": "GS_WAVE_GRAN"},
14284 {"bits": [6, 7], "name": "HS_WAVE_GRAN"}
14289 {"bits": [0, 0], "name": "TARGET_INST"},
14290 {"bits": [1, 1], "name": "TARGET_DATA"},
14291 {"bits": [2, 2], "name": "INVALIDATE"},
14292 {"bits": [3, 3], "name": "WRITEBACK"},
14293 {"bits": [4, 4], "name": "VOL"},
14294 {"bits": [16, 16], "name": "COMPLETE"}
14299 {"bits": [0, 0], "name": "DWB"},
14300 {"bits": [1, 1], "name": "DIRTY"}
14303 "SQ_BUF_RSRC_WORD0": {
14305 {"bits": [0, 31], "name": "BASE_ADDRESS"}
14308 "SQ_BUF_RSRC_WORD1": {
14310 {"bits": [0, 15], "name": "BASE_ADDRESS_HI"},
14311 {"bits": [16, 29], "name": "STRIDE"},
14312 {"bits": [30, 30], "name": "CACHE_SWIZZLE"},
14313 {"bits": [31, 31], "name": "SWIZZLE_ENABLE"}
14316 "SQ_BUF_RSRC_WORD2": {
14318 {"bits": [0, 31], "name": "NUM_RECORDS"}
14321 "SQ_BUF_RSRC_WORD3": {
14323 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
14324 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
14325 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
14326 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
14327 {"bits": [12, 14], "enum_ref": "BUF_NUM_FORMAT", "name": "NUM_FORMAT"},
14328 {"bits": [15, 18], "enum_ref": "BUF_DATA_FORMAT", "name": "DATA_FORMAT"},
14329 {"bits": [19, 19], "name": "USER_VM_ENABLE"},
14330 {"bits": [20, 20], "name": "USER_VM_MODE"},
14331 {"bits": [21, 22], "name": "INDEX_STRIDE"},
14332 {"bits": [23, 23], "name": "ADD_TID_ENABLE"},
14333 {"bits": [27, 27], "name": "NV"},
14334 {"bits": [30, 31], "enum_ref": "SQ_RSRC_BUF_TYPE", "name": "TYPE"}
14337 "SQ_IMG_RSRC_WORD1": {
14339 {"bits": [0, 7], "name": "BASE_ADDRESS_HI"},
14340 {"bits": [8, 19], "name": "MIN_LOD"},
14341 {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT", "name": "DATA_FORMAT"},
14342 {"bits": [20, 25], "enum_ref": "IMG_DATA_FORMAT_STENCIL", "name": "DATA_FORMAT_STENCIL"},
14343 {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT", "name": "NUM_FORMAT"},
14344 {"bits": [26, 29], "enum_ref": "IMG_NUM_FORMAT_FMASK", "name": "NUM_FORMAT_FMASK"},
14345 {"bits": [30, 30], "name": "NV"},
14346 {"bits": [31, 31], "name": "META_DIRECT"}
14349 "SQ_IMG_RSRC_WORD2": {
14351 {"bits": [0, 13], "name": "WIDTH"},
14352 {"bits": [14, 27], "name": "HEIGHT"},
14353 {"bits": [28, 30], "name": "PERF_MOD"}
14356 "SQ_IMG_RSRC_WORD3": {
14358 {"bits": [0, 2], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_X"},
14359 {"bits": [3, 5], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Y"},
14360 {"bits": [6, 8], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_Z"},
14361 {"bits": [9, 11], "enum_ref": "SQ_SEL_XYZW01", "name": "DST_SEL_W"},
14362 {"bits": [12, 15], "name": "BASE_LEVEL"},
14363 {"bits": [16, 19], "name": "LAST_LEVEL"},
14364 {"bits": [20, 24], "name": "SW_MODE"},
14365 {"bits": [28, 31], "enum_ref": "SQ_RSRC_IMG_TYPE", "name": "TYPE"}
14368 "SQ_IMG_RSRC_WORD4": {
14370 {"bits": [0, 12], "name": "DEPTH"},
14371 {"bits": [13, 28], "name": "PITCH"},
14372 {"bits": [29, 31], "enum_ref": "SQ_IMG_RSRC_WORD4__BC_SWIZZLE", "name": "BC_SWIZZLE"}
14375 "SQ_IMG_RSRC_WORD5": {
14377 {"bits": [0, 12], "name": "BASE_ARRAY"},
14378 {"bits": [13, 16], "name": "ARRAY_PITCH"},
14379 {"bits": [17, 24], "name": "META_DATA_ADDRESS"},
14380 {"bits": [25, 25], "name": "META_LINEAR"},
14381 {"bits": [26, 26], "name": "META_PIPE_ALIGNED"},
14382 {"bits": [27, 27], "name": "META_RB_ALIGNED"},
14383 {"bits": [28, 31], "name": "MAX_MIP"}
14386 "SQ_IMG_RSRC_WORD6": {
14388 {"bits": [0, 11], "name": "MIN_LOD_WARN"},
14389 {"bits": [12, 19], "name": "COUNTER_BANK_ID"},
14390 {"bits": [20, 20], "name": "LOD_HDW_CNT_EN"},
14391 {"bits": [21, 21], "name": "COMPRESSION_EN"},
14392 {"bits": [22, 22], "name": "ALPHA_IS_ON_MSB"},
14393 {"bits": [23, 23], "name": "COLOR_TRANSFORM"},
14394 {"bits": [24, 27], "name": "LOST_ALPHA_BITS"},
14395 {"bits": [28, 31], "name": "LOST_COLOR_BITS"}
14398 "SQ_IMG_RSRC_WORD7": {
14400 {"bits": [0, 31], "name": "META_DATA_ADDRESS"}
14403 "SQ_IMG_SAMP_WORD0": {
14405 {"bits": [0, 2], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_X"},
14406 {"bits": [3, 5], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Y"},
14407 {"bits": [6, 8], "enum_ref": "SQ_TEX_CLAMP", "name": "CLAMP_Z"},
14408 {"bits": [9, 11], "name": "MAX_ANISO_RATIO"},
14409 {"bits": [12, 14], "enum_ref": "SQ_TEX_DEPTH_COMPARE", "name": "DEPTH_COMPARE_FUNC"},
14410 {"bits": [15, 15], "name": "FORCE_UNNORMALIZED"},
14411 {"bits": [16, 18], "name": "ANISO_THRESHOLD"},
14412 {"bits": [19, 19], "name": "MC_COORD_TRUNC"},
14413 {"bits": [20, 20], "name": "FORCE_DEGAMMA"},
14414 {"bits": [21, 26], "name": "ANISO_BIAS"},
14415 {"bits": [27, 27], "name": "TRUNC_COORD"},
14416 {"bits": [28, 28], "name": "DISABLE_CUBE_WRAP"},
14417 {"bits": [29, 30], "enum_ref": "SQ_IMG_FILTER_TYPE", "name": "FILTER_MODE"},
14418 {"bits": [31, 31], "name": "COMPAT_MODE"}
14421 "SQ_IMG_SAMP_WORD1": {
14423 {"bits": [0, 11], "name": "MIN_LOD"},
14424 {"bits": [12, 23], "name": "MAX_LOD"},
14425 {"bits": [24, 27], "name": "PERF_MIP"},
14426 {"bits": [28, 31], "name": "PERF_Z"}
14429 "SQ_IMG_SAMP_WORD2": {
14431 {"bits": [0, 13], "name": "LOD_BIAS"},
14432 {"bits": [14, 19], "name": "LOD_BIAS_SEC"},
14433 {"bits": [20, 21], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MAG_FILTER"},
14434 {"bits": [22, 23], "enum_ref": "SQ_TEX_XY_FILTER", "name": "XY_MIN_FILTER"},
14435 {"bits": [24, 25], "enum_ref": "SQ_TEX_Z_FILTER", "name": "Z_FILTER"},
14436 {"bits": [26, 27], "enum_ref": "SQ_TEX_MIP_FILTER", "name": "MIP_FILTER"},
14437 {"bits": [28, 28], "name": "MIP_POINT_PRECLAMP"},
14438 {"bits": [29, 29], "name": "BLEND_ZERO_PRT"},
14439 {"bits": [30, 30], "name": "FILTER_PREC_FIX"},
14440 {"bits": [31, 31], "name": "ANISO_OVERRIDE"}
14443 "SQ_IMG_SAMP_WORD3": {
14445 {"bits": [0, 11], "name": "BORDER_COLOR_PTR"},
14446 {"bits": [12, 12], "name": "SKIP_DEGAMMA"},
14447 {"bits": [30, 31], "enum_ref": "SQ_TEX_BORDER_COLOR", "name": "BORDER_COLOR_TYPE"}
14450 "SQ_PERFCOUNTER0_SELECT": {
14452 {"bits": [0, 8], "name": "PERF_SEL"},
14453 {"bits": [12, 15], "name": "SQC_BANK_MASK"},
14454 {"bits": [16, 19], "name": "SQC_CLIENT_MASK"},
14455 {"bits": [20, 23], "name": "SPM_MODE"},
14456 {"bits": [24, 27], "name": "SIMD_MASK"},
14457 {"bits": [28, 31], "name": "PERF_MODE"}
14460 "SQ_PERFCOUNTER_CTRL": {
14462 {"bits": [0, 0], "name": "PS_EN"},
14463 {"bits": [1, 1], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
14464 {"bits": [2, 2], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
14465 {"bits": [3, 3], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
14466 {"bits": [4, 4], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
14467 {"bits": [5, 5], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
14468 {"bits": [6, 6], "name": "CS_EN"},
14469 {"bits": [8, 12], "name": "CNTR_RATE"},
14470 {"bits": [13, 13], "name": "DISABLE_FLUSH"}
14473 "SQ_PERFCOUNTER_CTRL2": {
14475 {"bits": [0, 0], "name": "FORCE_EN"}
14478 "SQ_THREAD_TRACE_BASE2": {
14480 {"bits": [0, 3], "name": "ADDR_HI"}
14483 "SQ_THREAD_TRACE_CNTR": {
14485 {"bits": [0, 31], "name": "CNTR"}
14488 "SQ_THREAD_TRACE_CTRL": {
14490 {"bits": [31, 31], "name": "RESET_BUFFER"}
14493 "SQ_THREAD_TRACE_HIWATER": {
14495 {"bits": [0, 2], "name": "HIWATER"}
14498 "SQ_THREAD_TRACE_MASK": {
14500 {"bits": [0, 4], "name": "CU_SEL"},
14501 {"bits": [5, 5], "name": "SH_SEL"},
14502 {"bits": [7, 7], "name": "REG_STALL_EN"},
14503 {"bits": [8, 11], "name": "SIMD_EN"},
14504 {"bits": [12, 13], "name": "VM_ID_MASK"},
14505 {"bits": [14, 14], "name": "SPI_STALL_EN"},
14506 {"bits": [15, 15], "name": "SQ_STALL_EN"}
14509 "SQ_THREAD_TRACE_MODE": {
14511 {"bits": [0, 2], "name": "MASK_PS"},
14512 {"bits": [3, 5], "name": "MASK_VS"},
14513 {"bits": [6, 8], "name": "MASK_GS"},
14514 {"bits": [9, 11], "name": "MASK_ES"},
14515 {"bits": [12, 14], "name": "MASK_HS"},
14516 {"bits": [15, 17], "name": "MASK_LS"},
14517 {"bits": [18, 20], "name": "MASK_CS"},
14518 {"bits": [21, 22], "name": "MODE"},
14519 {"bits": [23, 24], "name": "CAPTURE_MODE"},
14520 {"bits": [25, 25], "name": "AUTOFLUSH_EN"},
14521 {"bits": [26, 26], "name": "TC_PERF_EN"},
14522 {"bits": [27, 28], "name": "ISSUE_MASK"},
14523 {"bits": [29, 29], "name": "TEST_MODE"},
14524 {"bits": [30, 30], "name": "INTERRUPT_EN"},
14525 {"bits": [31, 31], "name": "WRAP"}
14528 "SQ_THREAD_TRACE_PERF_MASK": {
14530 {"bits": [0, 15], "name": "SH0_MASK"},
14531 {"bits": [16, 31], "name": "SH1_MASK"}
14534 "SQ_THREAD_TRACE_SIZE": {
14536 {"bits": [0, 21], "name": "SIZE"}
14539 "SQ_THREAD_TRACE_STATUS": {
14541 {"bits": [0, 9], "name": "FINISH_PENDING"},
14542 {"bits": [16, 25], "name": "FINISH_DONE"},
14543 {"bits": [28, 28], "name": "UTC_ERROR"},
14544 {"bits": [29, 29], "name": "NEW_BUF"},
14545 {"bits": [30, 30], "name": "BUSY"},
14546 {"bits": [31, 31], "name": "FULL"}
14549 "SQ_THREAD_TRACE_TOKEN_MASK": {
14551 {"bits": [0, 15], "name": "TOKEN_MASK"},
14552 {"bits": [16, 23], "name": "REG_MASK"},
14553 {"bits": [24, 24], "name": "REG_DROP_ON_STALL"}
14556 "SQ_THREAD_TRACE_TOKEN_MASK2": {
14558 {"bits": [0, 31], "name": "INST_MASK"}
14561 "SQ_THREAD_TRACE_WPTR": {
14563 {"bits": [0, 29], "name": "WPTR"},
14564 {"bits": [30, 31], "name": "READ_OFFSET"}
14567 "SQ_WAVE_EXEC_HI": {
14569 {"bits": [0, 31], "name": "EXEC_HI"}
14572 "SQ_WAVE_EXEC_LO": {
14574 {"bits": [0, 31], "name": "EXEC_LO"}
14577 "SQ_WAVE_FLUSH_IB": {
14579 {"bits": [0, 31], "name": "UNUSED"}
14582 "SQ_WAVE_GPR_ALLOC": {
14584 {"bits": [0, 5], "name": "VGPR_BASE"},
14585 {"bits": [8, 13], "name": "VGPR_SIZE"},
14586 {"bits": [16, 21], "name": "SGPR_BASE"},
14587 {"bits": [24, 27], "name": "SGPR_SIZE"}
14592 {"bits": [0, 3], "name": "WAVE_ID"},
14593 {"bits": [4, 5], "name": "SIMD_ID"},
14594 {"bits": [6, 7], "name": "PIPE_ID"},
14595 {"bits": [8, 11], "name": "CU_ID"},
14596 {"bits": [12, 12], "name": "SH_ID"},
14597 {"bits": [13, 14], "name": "SE_ID"},
14598 {"bits": [16, 19], "name": "TG_ID"},
14599 {"bits": [20, 23], "name": "VM_ID"},
14600 {"bits": [24, 26], "name": "QUEUE_ID"},
14601 {"bits": [27, 29], "name": "STATE_ID"},
14602 {"bits": [30, 31], "name": "ME_ID"}
14605 "SQ_WAVE_IB_DBG0": {
14607 {"bits": [0, 2], "name": "IBUF_ST"},
14608 {"bits": [3, 3], "name": "PC_INVALID"},
14609 {"bits": [4, 4], "name": "NEED_NEXT_DW"},
14610 {"bits": [5, 7], "name": "NO_PREFETCH_CNT"},
14611 {"bits": [8, 9], "name": "IBUF_RPTR"},
14612 {"bits": [10, 11], "name": "IBUF_WPTR"},
14613 {"bits": [16, 19], "name": "INST_STR_ST"},
14614 {"bits": [24, 25], "name": "ECC_ST"},
14615 {"bits": [26, 26], "name": "IS_HYB"},
14616 {"bits": [27, 28], "name": "HYB_CNT"},
14617 {"bits": [29, 29], "name": "KILL"},
14618 {"bits": [30, 30], "name": "NEED_KILL_IFETCH"},
14619 {"bits": [31, 31], "name": "NO_PREFETCH_CNT_HI"}
14622 "SQ_WAVE_IB_DBG1": {
14624 {"bits": [0, 0], "name": "IXNACK"},
14625 {"bits": [1, 1], "name": "XNACK"},
14626 {"bits": [2, 2], "name": "TA_NEED_RESET"},
14627 {"bits": [4, 8], "name": "XCNT"},
14628 {"bits": [11, 15], "name": "QCNT"},
14629 {"bits": [18, 22], "name": "RCNT"},
14630 {"bits": [25, 31], "name": "MISC_CNT"}
14633 "SQ_WAVE_IB_STS": {
14635 {"bits": [0, 3], "name": "VM_CNT"},
14636 {"bits": [4, 6], "name": "EXP_CNT"},
14637 {"bits": [8, 11], "name": "LGKM_CNT"},
14638 {"bits": [12, 14], "name": "VALU_CNT"},
14639 {"bits": [15, 15], "name": "FIRST_REPLAY"},
14640 {"bits": [16, 20], "name": "RCNT"},
14641 {"bits": [22, 23], "name": "VM_CNT_HI"}
14644 "SQ_WAVE_INST_DW0": {
14646 {"bits": [0, 31], "name": "INST_DW0"}
14649 "SQ_WAVE_INST_DW1": {
14651 {"bits": [0, 31], "name": "INST_DW1"}
14654 "SQ_WAVE_LDS_ALLOC": {
14656 {"bits": [0, 7], "name": "LDS_BASE"},
14657 {"bits": [12, 20], "name": "LDS_SIZE"}
14662 {"bits": [0, 31], "name": "M0"}
14667 {"bits": [0, 3], "name": "FP_ROUND"},
14668 {"bits": [4, 7], "name": "FP_DENORM"},
14669 {"bits": [8, 8], "name": "DX10_CLAMP"},
14670 {"bits": [9, 9], "name": "IEEE"},
14671 {"bits": [10, 10], "name": "LOD_CLAMPED"},
14672 {"bits": [11, 11], "name": "DEBUG_EN"},
14673 {"bits": [12, 20], "enum_ref": "EXCP_EN", "name": "EXCP_EN"},
14674 {"bits": [23, 23], "name": "FP16_OVFL"},
14675 {"bits": [24, 24], "name": "POPS_PACKER0"},
14676 {"bits": [25, 25], "name": "POPS_PACKER1"},
14677 {"bits": [26, 26], "name": "DISABLE_PERF"},
14678 {"bits": [27, 27], "name": "GPR_IDX_EN"},
14679 {"bits": [28, 28], "name": "VSKIP"},
14680 {"bits": [29, 31], "name": "CSP"}
14685 {"bits": [0, 15], "name": "PC_HI"}
14690 {"bits": [0, 31], "name": "PC_LO"}
14693 "SQ_WAVE_STATUS": {
14695 {"bits": [0, 0], "name": "SCC"},
14696 {"bits": [1, 2], "name": "SPI_PRIO"},
14697 {"bits": [3, 4], "name": "USER_PRIO"},
14698 {"bits": [5, 5], "name": "PRIV"},
14699 {"bits": [6, 6], "name": "TRAP_EN"},
14700 {"bits": [7, 7], "name": "TTRACE_EN"},
14701 {"bits": [8, 8], "name": "EXPORT_RDY"},
14702 {"bits": [9, 9], "name": "EXECZ"},
14703 {"bits": [10, 10], "name": "VCCZ"},
14704 {"bits": [11, 11], "name": "IN_TG"},
14705 {"bits": [12, 12], "name": "IN_BARRIER"},
14706 {"bits": [13, 13], "name": "HALT"},
14707 {"bits": [14, 14], "name": "TRAP"},
14708 {"bits": [15, 15], "name": "TTRACE_CU_EN"},
14709 {"bits": [16, 16], "name": "VALID"},
14710 {"bits": [17, 17], "name": "ECC_ERR"},
14711 {"bits": [18, 18], "name": "SKIP_EXPORT"},
14712 {"bits": [19, 19], "name": "PERF_EN"},
14713 {"bits": [20, 20], "name": "COND_DBG_USER"},
14714 {"bits": [21, 21], "name": "COND_DBG_SYS"},
14715 {"bits": [22, 22], "name": "ALLOW_REPLAY"},
14716 {"bits": [23, 23], "name": "FATAL_HALT"},
14717 {"bits": [27, 27], "name": "MUST_EXPORT"}
14720 "SQ_WAVE_TRAPSTS": {
14722 {"bits": [0, 8], "enum_ref": "EXCP_EN", "name": "EXCP"},
14723 {"bits": [10, 10], "name": "SAVECTX"},
14724 {"bits": [11, 11], "name": "ILLEGAL_INST"},
14725 {"bits": [12, 14], "name": "EXCP_HI"},
14726 {"bits": [16, 21], "name": "EXCP_CYCLE"},
14727 {"bits": [28, 28], "name": "XNACK_ERROR"},
14728 {"bits": [29, 31], "name": "DP_RATE"}
14731 "SX_BLEND_OPT_CONTROL": {
14733 {"bits": [0, 0], "name": "MRT0_COLOR_OPT_DISABLE"},
14734 {"bits": [1, 1], "name": "MRT0_ALPHA_OPT_DISABLE"},
14735 {"bits": [4, 4], "name": "MRT1_COLOR_OPT_DISABLE"},
14736 {"bits": [5, 5], "name": "MRT1_ALPHA_OPT_DISABLE"},
14737 {"bits": [8, 8], "name": "MRT2_COLOR_OPT_DISABLE"},
14738 {"bits": [9, 9], "name": "MRT2_ALPHA_OPT_DISABLE"},
14739 {"bits": [12, 12], "name": "MRT3_COLOR_OPT_DISABLE"},
14740 {"bits": [13, 13], "name": "MRT3_ALPHA_OPT_DISABLE"},
14741 {"bits": [16, 16], "name": "MRT4_COLOR_OPT_DISABLE"},
14742 {"bits": [17, 17], "name": "MRT4_ALPHA_OPT_DISABLE"},
14743 {"bits": [20, 20], "name": "MRT5_COLOR_OPT_DISABLE"},
14744 {"bits": [21, 21], "name": "MRT5_ALPHA_OPT_DISABLE"},
14745 {"bits": [24, 24], "name": "MRT6_COLOR_OPT_DISABLE"},
14746 {"bits": [25, 25], "name": "MRT6_ALPHA_OPT_DISABLE"},
14747 {"bits": [28, 28], "name": "MRT7_COLOR_OPT_DISABLE"},
14748 {"bits": [29, 29], "name": "MRT7_ALPHA_OPT_DISABLE"},
14749 {"bits": [31, 31], "name": "PIXEN_ZERO_OPT_DISABLE"}
14752 "SX_BLEND_OPT_EPSILON": {
14754 {"bits": [0, 3], "enum_ref": "SX_BLEND_OPT_EPSILON__MRT0_EPSILON", "name": "MRT0_EPSILON"},
14755 {"bits": [4, 7], "name": "MRT1_EPSILON"},
14756 {"bits": [8, 11], "name": "MRT2_EPSILON"},
14757 {"bits": [12, 15], "name": "MRT3_EPSILON"},
14758 {"bits": [16, 19], "name": "MRT4_EPSILON"},
14759 {"bits": [20, 23], "name": "MRT5_EPSILON"},
14760 {"bits": [24, 27], "name": "MRT6_EPSILON"},
14761 {"bits": [28, 31], "name": "MRT7_EPSILON"}
14764 "SX_MRT0_BLEND_OPT": {
14766 {"bits": [0, 2], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_SRC_OPT"},
14767 {"bits": [4, 6], "enum_ref": "SX_BLEND_OPT", "name": "COLOR_DST_OPT"},
14768 {"bits": [8, 10], "enum_ref": "SX_OPT_COMB_FCN", "name": "COLOR_COMB_FCN"},
14769 {"bits": [16, 18], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_SRC_OPT"},
14770 {"bits": [20, 22], "enum_ref": "SX_BLEND_OPT", "name": "ALPHA_DST_OPT"},
14771 {"bits": [24, 26], "enum_ref": "SX_OPT_COMB_FCN", "name": "ALPHA_COMB_FCN"}
14774 "SX_PS_DOWNCONVERT": {
14776 {"bits": [0, 3], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT0"},
14777 {"bits": [4, 7], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT1"},
14778 {"bits": [8, 11], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT2"},
14779 {"bits": [12, 15], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT3"},
14780 {"bits": [16, 19], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT4"},
14781 {"bits": [20, 23], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT5"},
14782 {"bits": [24, 27], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT6"},
14783 {"bits": [28, 31], "enum_ref": "SX_DOWNCONVERT_FORMAT", "name": "MRT7"}
14786 "TA_BC_BASE_ADDR": {
14788 {"bits": [0, 31], "name": "ADDRESS"}
14791 "TA_BC_BASE_ADDR_HI": {
14793 {"bits": [0, 7], "name": "ADDRESS"}
14796 "TA_PERFCOUNTER0_SELECT": {
14798 {"bits": [0, 7], "name": "PERF_SEL"},
14799 {"bits": [10, 17], "name": "PERF_SEL1"},
14800 {"bits": [20, 23], "name": "CNTR_MODE"},
14801 {"bits": [24, 27], "name": "PERF_MODE1"},
14802 {"bits": [28, 31], "name": "PERF_MODE"}
14805 "TA_PERFCOUNTER0_SELECT1": {
14807 {"bits": [0, 7], "name": "PERF_SEL2"},
14808 {"bits": [10, 17], "name": "PERF_SEL3"},
14809 {"bits": [24, 27], "name": "PERF_MODE3"},
14810 {"bits": [28, 31], "name": "PERF_MODE2"}
14813 "TA_PERFCOUNTER1_SELECT": {
14815 {"bits": [0, 7], "name": "PERF_SEL"},
14816 {"bits": [20, 23], "name": "CNTR_MODE"},
14817 {"bits": [28, 31], "name": "PERF_MODE"}
14820 "TCC_PERFCOUNTER0_SELECT1": {
14822 {"bits": [0, 9], "name": "PERF_SEL2"},
14823 {"bits": [10, 19], "name": "PERF_SEL3"},
14824 {"bits": [24, 27], "name": "PERF_MODE2"},
14825 {"bits": [28, 31], "name": "PERF_MODE3"}
14828 "VGT_DISPATCH_DRAW_INDEX": {
14830 {"bits": [0, 31], "name": "MATCH_INDEX"}
14835 {"bits": [0, 31], "name": "BASE_ADDR"}
14838 "VGT_DMA_BASE_HI": {
14840 {"bits": [0, 15], "name": "BASE_ADDR"}
14843 "VGT_DMA_INDEX_TYPE": {
14845 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
14846 {"bits": [2, 3], "enum_ref": "VGT_DMA_SWAP_MODE", "name": "SWAP_MODE"},
14847 {"bits": [4, 5], "enum_ref": "VGT_DMA_BUF_TYPE", "name": "BUF_TYPE"},
14848 {"bits": [6, 6], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
14849 {"bits": [8, 8], "name": "PRIMGEN_EN"},
14850 {"bits": [9, 9], "name": "NOT_EOP"},
14851 {"bits": [10, 10], "name": "REQ_PATH"}
14854 "VGT_DMA_MAX_SIZE": {
14856 {"bits": [0, 31], "name": "MAX_SIZE"}
14859 "VGT_DMA_NUM_INSTANCES": {
14861 {"bits": [0, 31], "name": "NUM_INSTANCES"}
14866 {"bits": [0, 31], "name": "NUM_INDICES"}
14869 "VGT_DRAW_INITIATOR": {
14871 {"bits": [0, 1], "enum_ref": "VGT_DI_SOURCE_SELECT", "name": "SOURCE_SELECT"},
14872 {"bits": [2, 3], "enum_ref": "VGT_DI_MAJOR_MODE_SELECT", "name": "MAJOR_MODE"},
14873 {"bits": [4, 4], "name": "SPRITE_EN_R6XX"},
14874 {"bits": [5, 5], "name": "NOT_EOP"},
14875 {"bits": [6, 6], "name": "USE_OPAQUE"},
14876 {"bits": [7, 7], "name": "UNROLLED_INST"},
14877 {"bits": [8, 8], "name": "GRBM_SKEW_NO_DEC"},
14878 {"bits": [29, 31], "name": "REG_RT_INDEX"}
14881 "VGT_DRAW_PAYLOAD_CNTL": {
14883 {"bits": [0, 0], "name": "OBJPRIM_ID_EN"},
14884 {"bits": [1, 1], "name": "EN_REG_RT_INDEX"},
14885 {"bits": [2, 2], "name": "EN_PIPELINE_PRIMID"},
14886 {"bits": [3, 3], "name": "OBJECT_ID_INST_EN"}
14891 {"bits": [0, 31], "name": "MISC"}
14894 "VGT_ESGS_RING_ITEMSIZE": {
14896 {"bits": [0, 14], "name": "ITEMSIZE"}
14901 {"bits": [0, 10], "name": "ES_PER_GS"}
14904 "VGT_EVENT_ADDRESS_REG": {
14906 {"bits": [0, 27], "name": "ADDRESS_LOW"}
14909 "VGT_EVENT_INITIATOR": {
14911 {"bits": [0, 5], "enum_ref": "VGT_EVENT_TYPE", "name": "EVENT_TYPE"},
14912 {"bits": [10, 26], "name": "ADDRESS_HI"},
14913 {"bits": [27, 27], "name": "EXTENDED_EVENT"}
14916 "VGT_GROUP_DECR": {
14918 {"bits": [0, 3], "name": "DECR"}
14921 "VGT_GROUP_FIRST_DECR": {
14923 {"bits": [0, 3], "name": "FIRST_DECR"}
14926 "VGT_GROUP_PRIM_TYPE": {
14928 {"bits": [0, 4], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"},
14929 {"bits": [14, 14], "name": "RETAIN_ORDER"},
14930 {"bits": [15, 15], "name": "RETAIN_QUADS"},
14931 {"bits": [16, 18], "name": "PRIM_ORDER"}
14934 "VGT_GROUP_VECT_0_CNTL": {
14936 {"bits": [0, 0], "name": "COMP_X_EN"},
14937 {"bits": [1, 1], "name": "COMP_Y_EN"},
14938 {"bits": [2, 2], "name": "COMP_Z_EN"},
14939 {"bits": [3, 3], "name": "COMP_W_EN"},
14940 {"bits": [8, 15], "name": "STRIDE"},
14941 {"bits": [16, 23], "name": "SHIFT"}
14944 "VGT_GROUP_VECT_0_FMT_CNTL": {
14946 {"bits": [0, 3], "name": "X_CONV"},
14947 {"bits": [4, 7], "name": "X_OFFSET"},
14948 {"bits": [8, 11], "name": "Y_CONV"},
14949 {"bits": [12, 15], "name": "Y_OFFSET"},
14950 {"bits": [16, 19], "name": "Z_CONV"},
14951 {"bits": [20, 23], "name": "Z_OFFSET"},
14952 {"bits": [24, 27], "name": "W_CONV"},
14953 {"bits": [28, 31], "name": "W_OFFSET"}
14956 "VGT_GSVS_RING_OFFSET_1": {
14958 {"bits": [0, 14], "name": "OFFSET"}
14961 "VGT_GSVS_RING_SIZE": {
14963 {"bits": [0, 31], "name": "MEM_SIZE"}
14966 "VGT_GS_INSTANCE_CNT": {
14968 {"bits": [0, 0], "name": "ENABLE"},
14969 {"bits": [2, 8], "name": "CNT"}
14972 "VGT_GS_MAX_PRIMS_PER_SUBGROUP": {
14974 {"bits": [0, 15], "name": "MAX_PRIMS_PER_SUBGROUP"}
14977 "VGT_GS_MAX_VERT_OUT": {
14979 {"bits": [0, 10], "name": "MAX_VERT_OUT"}
14984 {"bits": [0, 2], "enum_ref": "VGT_GS_MODE_TYPE", "name": "MODE"},
14985 {"bits": [3, 3], "name": "RESERVED_0"},
14986 {"bits": [4, 5], "enum_ref": "VGT_GS_CUT_MODE", "name": "CUT_MODE"},
14987 {"bits": [6, 10], "name": "RESERVED_1"},
14988 {"bits": [11, 11], "name": "GS_C_PACK_EN"},
14989 {"bits": [12, 12], "name": "RESERVED_2"},
14990 {"bits": [13, 13], "name": "ES_PASSTHRU"},
14991 {"bits": [14, 14], "name": "RESERVED_3"},
14992 {"bits": [15, 15], "name": "RESERVED_4"},
14993 {"bits": [16, 16], "name": "RESERVED_5"},
14994 {"bits": [17, 17], "name": "PARTIAL_THD_AT_EOI"},
14995 {"bits": [18, 18], "name": "SUPPRESS_CUTS"},
14996 {"bits": [19, 19], "name": "ES_WRITE_OPTIMIZE"},
14997 {"bits": [20, 20], "name": "GS_WRITE_OPTIMIZE"},
14998 {"bits": [21, 22], "name": "ONCHIP"}
15001 "VGT_GS_ONCHIP_CNTL": {
15003 {"bits": [0, 10], "name": "ES_VERTS_PER_SUBGRP"},
15004 {"bits": [11, 21], "name": "GS_PRIMS_PER_SUBGRP"},
15005 {"bits": [22, 31], "name": "GS_INST_PRIMS_IN_SUBGRP"}
15008 "VGT_GS_OUT_PRIM_TYPE": {
15010 {"bits": [0, 5], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE"},
15011 {"bits": [8, 13], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_1"},
15012 {"bits": [16, 21], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_2"},
15013 {"bits": [22, 27], "enum_ref": "VGT_GS_OUTPRIM_TYPE", "name": "OUTPRIM_TYPE_3"},
15014 {"bits": [31, 31], "name": "UNIQUE_TYPE_PER_STREAM"}
15019 {"bits": [0, 10], "name": "GS_PER_ES"}
15024 {"bits": [0, 3], "name": "GS_PER_VS"}
15029 {"bits": [0, 1], "name": "TESS_MODE"}
15032 "VGT_HOS_MAX_TESS_LEVEL": {
15034 {"bits": [0, 31], "name": "MAX_TESS"}
15037 "VGT_HOS_MIN_TESS_LEVEL": {
15039 {"bits": [0, 31], "name": "MIN_TESS"}
15042 "VGT_HOS_REUSE_DEPTH": {
15044 {"bits": [0, 7], "name": "REUSE_DEPTH"}
15047 "VGT_HS_OFFCHIP_PARAM": {
15049 {"bits": [0, 8], "name": "OFFCHIP_BUFFERING"},
15050 {"bits": [9, 10], "enum_ref": "VGT_HS_OFFCHIP_PARAM__OFFCHIP_GRANULARITY", "name": "OFFCHIP_GRANULARITY"}
15053 "VGT_INDEX_TYPE": {
15055 {"bits": [0, 1], "enum_ref": "VGT_INDEX_TYPE_MODE", "name": "INDEX_TYPE"},
15056 {"bits": [8, 8], "name": "PRIMGEN_EN"}
15059 "VGT_INDX_OFFSET": {
15061 {"bits": [0, 31], "name": "INDX_OFFSET"}
15064 "VGT_INSTANCE_BASE_ID": {
15066 {"bits": [0, 31], "name": "INSTANCE_BASE_ID"}
15069 "VGT_INSTANCE_STEP_RATE_0": {
15071 {"bits": [0, 31], "name": "STEP_RATE"}
15074 "VGT_LS_HS_CONFIG": {
15076 {"bits": [0, 7], "name": "NUM_PATCHES"},
15077 {"bits": [8, 13], "name": "HS_NUM_INPUT_CP"},
15078 {"bits": [14, 19], "name": "HS_NUM_OUTPUT_CP"}
15081 "VGT_MAX_VTX_INDX": {
15083 {"bits": [0, 31], "name": "MAX_INDX"}
15086 "VGT_MIN_VTX_INDX": {
15088 {"bits": [0, 31], "name": "MIN_INDX"}
15091 "VGT_MULTI_PRIM_IB_RESET_EN": {
15093 {"bits": [0, 0], "name": "RESET_EN"},
15094 {"bits": [1, 1], "name": "MATCH_ALL_BITS"}
15097 "VGT_MULTI_PRIM_IB_RESET_INDX": {
15099 {"bits": [0, 31], "name": "RESET_INDX"}
15102 "VGT_OUTPUT_PATH_CNTL": {
15104 {"bits": [0, 2], "name": "PATH_SELECT"}
15107 "VGT_OUT_DEALLOC_CNTL": {
15109 {"bits": [0, 6], "name": "DEALLOC_DIST"}
15112 "VGT_PERFCOUNTER_SEID_MASK": {
15114 {"bits": [0, 7], "name": "PERF_SEID_IGNORE_MASK"}
15117 "VGT_PRIMITIVEID_EN": {
15119 {"bits": [0, 0], "name": "PRIMITIVEID_EN"},
15120 {"bits": [1, 1], "name": "DISABLE_RESET_ON_EOI"},
15121 {"bits": [2, 2], "name": "NGG_DISABLE_PROVOK_REUSE"}
15124 "VGT_PRIMITIVEID_RESET": {
15126 {"bits": [0, 31], "name": "VALUE"}
15129 "VGT_PRIMITIVE_TYPE": {
15131 {"bits": [0, 5], "enum_ref": "VGT_DI_PRIM_TYPE", "name": "PRIM_TYPE"}
15136 {"bits": [0, 0], "name": "REUSE_OFF"}
15139 "VGT_SHADER_STAGES_EN": {
15141 {"bits": [0, 1], "enum_ref": "VGT_STAGES_LS_EN", "name": "LS_EN"},
15142 {"bits": [2, 2], "enum_ref": "VGT_STAGES_HS_EN", "name": "HS_EN"},
15143 {"bits": [3, 4], "enum_ref": "VGT_STAGES_ES_EN", "name": "ES_EN"},
15144 {"bits": [5, 5], "enum_ref": "VGT_STAGES_GS_EN", "name": "GS_EN"},
15145 {"bits": [6, 7], "enum_ref": "VGT_STAGES_VS_EN", "name": "VS_EN"},
15146 {"bits": [9, 9], "name": "DISPATCH_DRAW_EN"},
15147 {"bits": [10, 10], "name": "DIS_DEALLOC_ACCUM_0"},
15148 {"bits": [11, 11], "name": "DIS_DEALLOC_ACCUM_1"},
15149 {"bits": [12, 12], "name": "VS_WAVE_ID_EN"},
15150 {"bits": [13, 13], "name": "PRIMGEN_EN"},
15151 {"bits": [14, 14], "name": "ORDERED_ID_MODE"},
15152 {"bits": [15, 18], "name": "MAX_PRIMGRP_IN_WAVE"},
15153 {"bits": [19, 20], "name": "GS_FAST_LAUNCH"}
15156 "VGT_STRMOUT_BUFFER_CONFIG": {
15158 {"bits": [0, 3], "name": "STREAM_0_BUFFER_EN"},
15159 {"bits": [4, 7], "name": "STREAM_1_BUFFER_EN"},
15160 {"bits": [8, 11], "name": "STREAM_2_BUFFER_EN"},
15161 {"bits": [12, 15], "name": "STREAM_3_BUFFER_EN"}
15164 "VGT_STRMOUT_BUFFER_OFFSET_0": {
15166 {"bits": [0, 31], "name": "OFFSET"}
15169 "VGT_STRMOUT_CONFIG": {
15171 {"bits": [0, 0], "name": "STREAMOUT_0_EN"},
15172 {"bits": [1, 1], "name": "STREAMOUT_1_EN"},
15173 {"bits": [2, 2], "name": "STREAMOUT_2_EN"},
15174 {"bits": [3, 3], "name": "STREAMOUT_3_EN"},
15175 {"bits": [4, 6], "name": "RAST_STREAM"},
15176 {"bits": [7, 7], "name": "EN_PRIMS_NEEDED_CNT"},
15177 {"bits": [8, 11], "name": "RAST_STREAM_MASK"},
15178 {"bits": [31, 31], "name": "USE_RAST_STREAM_MASK"}
15181 "VGT_STRMOUT_DRAW_OPAQUE_VERTEX_STRIDE": {
15183 {"bits": [0, 8], "name": "VERTEX_STRIDE"}
15186 "VGT_STRMOUT_VTX_STRIDE_0": {
15188 {"bits": [0, 9], "name": "STRIDE"}
15191 "VGT_TESS_DISTRIBUTION": {
15193 {"bits": [0, 7], "name": "ACCUM_ISOLINE"},
15194 {"bits": [8, 15], "name": "ACCUM_TRI"},
15195 {"bits": [16, 23], "name": "ACCUM_QUAD"},
15196 {"bits": [24, 28], "name": "DONUT_SPLIT"},
15197 {"bits": [29, 31], "name": "TRAP_SPLIT"}
15200 "VGT_TF_MEMORY_BASE": {
15202 {"bits": [0, 31], "name": "BASE"}
15207 {"bits": [0, 1], "enum_ref": "VGT_TESS_TYPE", "name": "TYPE"},
15208 {"bits": [2, 4], "enum_ref": "VGT_TESS_PARTITION", "name": "PARTITIONING"},
15209 {"bits": [5, 7], "enum_ref": "VGT_TESS_TOPOLOGY", "name": "TOPOLOGY"},
15210 {"bits": [8, 8], "name": "RESERVED_REDUC_AXIS"},
15211 {"bits": [9, 9], "name": "DEPRECATED"},
15212 {"bits": [14, 14], "name": "DISABLE_DONUTS"},
15213 {"bits": [15, 15], "enum_ref": "VGT_RDREQ_POLICY", "name": "RDREQ_POLICY"},
15214 {"bits": [17, 18], "enum_ref": "VGT_DIST_MODE", "name": "DISTRIBUTION_MODE"}
15217 "VGT_TF_RING_SIZE": {
15219 {"bits": [0, 15], "name": "SIZE"}
15222 "VGT_VERTEX_REUSE_BLOCK_CNTL": {
15224 {"bits": [0, 7], "name": "VTX_REUSE_DEPTH"}
15227 "VGT_VTX_CNT_EN": {
15229 {"bits": [0, 0], "name": "VTX_CNT_EN"}
15232 "WD_PERFCOUNTER0_SELECT": {
15234 {"bits": [0, 7], "name": "PERF_SEL"},
15235 {"bits": [28, 31], "name": "PERF_MODE"}