src/amd/vulkan/radv_constants.h

   1 /*
   2  * Copyright © 2016 Red Hat.
   3  * Copyright © 2016 Bas Nieuwenhuizen
   4  *
   5  * based in part on anv driver which is:
   6  * Copyright © 2015 Intel Corporation
   7  *
   8  * Permission is hereby granted, free of charge, to any person obtaining a
   9  * copy of this software and associated documentation files (the "Software"),
  10  * to deal in the Software without restriction, including without limitation
  11  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  12  * and/or sell copies of the Software, and to permit persons to whom the
  13  * Software is furnished to do so, subject to the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the next
  16  * paragraph) shall be included in all copies or substantial portions of the
  17  * Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  20  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  21  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  22  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  23  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  24  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  25  * IN THE SOFTWARE.
  26  */
  27
  28 #ifndef RADV_CONSTANTS_H
  29 #define RADV_CONSTANTS_H
  30
  31 #define ATI_VENDOR_ID 0x1002
  32
  33 #define MAX_VBS         32
  34 #define MAX_VERTEX_ATTRIBS 32
  35 #define MAX_RTS          8
  36 #define MAX_VIEWPORTS   16
  37 #define MAX_SCISSORS    16
  38 #define MAX_DISCARD_RECTANGLES 4
  39 #define MAX_SAMPLE_LOCATIONS 32
  40 #define MAX_PUSH_CONSTANTS_SIZE 128
  41 #define MAX_PUSH_DESCRIPTORS 32
  42 #define MAX_DYNAMIC_UNIFORM_BUFFERS 16
  43 #define MAX_DYNAMIC_STORAGE_BUFFERS 8
  44 #define MAX_DYNAMIC_BUFFERS (MAX_DYNAMIC_UNIFORM_BUFFERS + MAX_DYNAMIC_STORAGE_BUFFERS)
  45 #define MAX_SAMPLES_LOG2 4
  46 #define NUM_META_FS_KEYS 12
  47 #define RADV_MAX_DRM_DEVICES 8
  48 #define MAX_VIEWS        8
  49 #define MAX_SO_STREAMS 4
  50 #define MAX_SO_BUFFERS 4
  51 #define MAX_SO_OUTPUTS 64
  52 #define MAX_INLINE_UNIFORM_BLOCK_SIZE (4ull * 1024 * 1024)
  53 #define MAX_INLINE_UNIFORM_BLOCK_COUNT 64
  54 #define MAX_BIND_POINTS 2 /* compute + graphics */
  55
  56 #define NUM_DEPTH_CLEAR_PIPELINES 3
  57 #define NUM_DEPTH_DECOMPRESS_PIPELINES 3
  58
  59 /*
  60  * This is the point we switch from using CP to compute shader
  61  * for certain buffer operations.
  62  */
  63 #define RADV_BUFFER_OPS_CS_THRESHOLD 4096
  64
  65 #define RADV_BUFFER_UPDATE_THRESHOLD 1024
  66
  67 /* descriptor index into scratch ring offsets */
  68 #define RING_SCRATCH 0
  69 #define RING_ESGS_VS 1
  70 #define RING_ESGS_GS 2
  71 #define RING_GSVS_VS 3
  72 #define RING_GSVS_GS 4
  73 #define RING_HS_TESS_FACTOR 5
  74 #define RING_HS_TESS_OFFCHIP 6
  75 #define RING_PS_SAMPLE_POSITIONS 7
  76
  77 /* max number of descriptor sets */
  78 #define MAX_SETS 32
  79
  80 /* Make sure everything is addressable by a signed 32-bit int, and
  81  * our largest descriptors are 96 bytes.
  82  */
  83 #define RADV_MAX_PER_SET_DESCRIPTORS ((1ull << 31 ) / 96)
  84
  85 /* Our buffer size fields allow only 2**32 - 1. We round that down to a multiple
  86  * of 4 bytes so we can align buffer sizes up.
  87  */
  88 #define RADV_MAX_MEMORY_ALLOCATION_SIZE 0xFFFFFFFCull
  89
  90 /* Number of invocations in each subgroup. */
  91 #define RADV_SUBGROUP_SIZE 64
  92
  93 #endif /* RADV_CONSTANTS_H */
  94