radv: use separate bindings for graphics and compute descriptors
[mesa.git] / src / amd / vulkan / radv_meta.c
1 /*
2 * Copyright © 2016 Red Hat
3 * based on intel anv code:
4 * Copyright © 2015 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 */
25
26 #include "radv_meta.h"
27
28 #include <fcntl.h>
29 #include <limits.h>
30 #include <pwd.h>
31 #include <sys/stat.h>
32
33 void
34 radv_meta_save(struct radv_meta_saved_state *state,
35 struct radv_cmd_buffer *cmd_buffer, uint32_t flags)
36 {
37 VkPipelineBindPoint bind_point =
38 flags & RADV_META_SAVE_GRAPHICS_PIPELINE ?
39 VK_PIPELINE_BIND_POINT_GRAPHICS :
40 VK_PIPELINE_BIND_POINT_COMPUTE;
41 struct radv_descriptor_state *descriptors_state =
42 radv_get_descriptors_state(cmd_buffer, bind_point);
43
44 assert(flags & (RADV_META_SAVE_GRAPHICS_PIPELINE |
45 RADV_META_SAVE_COMPUTE_PIPELINE));
46
47 state->flags = flags;
48
49 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
50 assert(!(state->flags & RADV_META_SAVE_COMPUTE_PIPELINE));
51
52 state->old_pipeline = cmd_buffer->state.pipeline;
53
54 /* Save all viewports. */
55 state->viewport.count = cmd_buffer->state.dynamic.viewport.count;
56 typed_memcpy(state->viewport.viewports,
57 cmd_buffer->state.dynamic.viewport.viewports,
58 MAX_VIEWPORTS);
59
60 /* Save all scissors. */
61 state->scissor.count = cmd_buffer->state.dynamic.scissor.count;
62 typed_memcpy(state->scissor.scissors,
63 cmd_buffer->state.dynamic.scissor.scissors,
64 MAX_SCISSORS);
65
66 /* The most common meta operations all want to have the
67 * viewport reset and any scissors disabled. The rest of the
68 * dynamic state should have no effect.
69 */
70 cmd_buffer->state.dynamic.viewport.count = 0;
71 cmd_buffer->state.dynamic.scissor.count = 0;
72 cmd_buffer->state.dirty |= 1 << VK_DYNAMIC_STATE_VIEWPORT |
73 1 << VK_DYNAMIC_STATE_SCISSOR;
74 }
75
76 if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
77 assert(!(state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE));
78
79 state->old_pipeline = cmd_buffer->state.compute_pipeline;
80 }
81
82 if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
83 if (descriptors_state->valid & (1 << 0))
84 state->old_descriptor_set0 = descriptors_state->sets[0];
85 else
86 state->old_descriptor_set0 = NULL;
87 }
88
89 if (state->flags & RADV_META_SAVE_CONSTANTS) {
90 memcpy(state->push_constants, cmd_buffer->push_constants,
91 MAX_PUSH_CONSTANTS_SIZE);
92 }
93
94 if (state->flags & RADV_META_SAVE_PASS) {
95 state->pass = cmd_buffer->state.pass;
96 state->subpass = cmd_buffer->state.subpass;
97 state->framebuffer = cmd_buffer->state.framebuffer;
98 state->attachments = cmd_buffer->state.attachments;
99 state->render_area = cmd_buffer->state.render_area;
100 }
101 }
102
103 void
104 radv_meta_restore(const struct radv_meta_saved_state *state,
105 struct radv_cmd_buffer *cmd_buffer)
106 {
107 VkPipelineBindPoint bind_point =
108 state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE ?
109 VK_PIPELINE_BIND_POINT_GRAPHICS :
110 VK_PIPELINE_BIND_POINT_COMPUTE;
111
112 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
113 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
114 VK_PIPELINE_BIND_POINT_GRAPHICS,
115 radv_pipeline_to_handle(state->old_pipeline));
116
117 cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE;
118
119 /* Restore all viewports. */
120 cmd_buffer->state.dynamic.viewport.count = state->viewport.count;
121 typed_memcpy(cmd_buffer->state.dynamic.viewport.viewports,
122 state->viewport.viewports,
123 MAX_VIEWPORTS);
124
125 /* Restore all scissors. */
126 cmd_buffer->state.dynamic.scissor.count = state->scissor.count;
127 typed_memcpy(cmd_buffer->state.dynamic.scissor.scissors,
128 state->scissor.scissors,
129 MAX_SCISSORS);
130
131 cmd_buffer->state.dirty |= 1 << VK_DYNAMIC_STATE_VIEWPORT |
132 1 << VK_DYNAMIC_STATE_SCISSOR;
133 }
134
135 if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
136 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
137 VK_PIPELINE_BIND_POINT_COMPUTE,
138 radv_pipeline_to_handle(state->old_pipeline));
139 }
140
141 if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
142 radv_set_descriptor_set(cmd_buffer, bind_point,
143 state->old_descriptor_set0, 0);
144 }
145
146 if (state->flags & RADV_META_SAVE_CONSTANTS) {
147 memcpy(cmd_buffer->push_constants, state->push_constants,
148 MAX_PUSH_CONSTANTS_SIZE);
149 cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_COMPUTE_BIT;
150
151 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
152 cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_ALL_GRAPHICS;
153 }
154 }
155
156 if (state->flags & RADV_META_SAVE_PASS) {
157 cmd_buffer->state.pass = state->pass;
158 cmd_buffer->state.subpass = state->subpass;
159 cmd_buffer->state.framebuffer = state->framebuffer;
160 cmd_buffer->state.attachments = state->attachments;
161 cmd_buffer->state.render_area = state->render_area;
162 if (state->subpass)
163 cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER;
164 }
165 }
166
167 VkImageViewType
168 radv_meta_get_view_type(const struct radv_image *image)
169 {
170 switch (image->type) {
171 case VK_IMAGE_TYPE_1D: return VK_IMAGE_VIEW_TYPE_1D;
172 case VK_IMAGE_TYPE_2D: return VK_IMAGE_VIEW_TYPE_2D;
173 case VK_IMAGE_TYPE_3D: return VK_IMAGE_VIEW_TYPE_3D;
174 default:
175 unreachable("bad VkImageViewType");
176 }
177 }
178
179 /**
180 * When creating a destination VkImageView, this function provides the needed
181 * VkImageViewCreateInfo::subresourceRange::baseArrayLayer.
182 */
183 uint32_t
184 radv_meta_get_iview_layer(const struct radv_image *dest_image,
185 const VkImageSubresourceLayers *dest_subresource,
186 const VkOffset3D *dest_offset)
187 {
188 switch (dest_image->type) {
189 case VK_IMAGE_TYPE_1D:
190 case VK_IMAGE_TYPE_2D:
191 return dest_subresource->baseArrayLayer;
192 case VK_IMAGE_TYPE_3D:
193 /* HACK: Vulkan does not allow attaching a 3D image to a framebuffer,
194 * but meta does it anyway. When doing so, we translate the
195 * destination's z offset into an array offset.
196 */
197 return dest_offset->z;
198 default:
199 assert(!"bad VkImageType");
200 return 0;
201 }
202 }
203
204 static void *
205 meta_alloc(void* _device, size_t size, size_t alignment,
206 VkSystemAllocationScope allocationScope)
207 {
208 struct radv_device *device = _device;
209 return device->alloc.pfnAllocation(device->alloc.pUserData, size, alignment,
210 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
211 }
212
213 static void *
214 meta_realloc(void* _device, void *original, size_t size, size_t alignment,
215 VkSystemAllocationScope allocationScope)
216 {
217 struct radv_device *device = _device;
218 return device->alloc.pfnReallocation(device->alloc.pUserData, original,
219 size, alignment,
220 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
221 }
222
223 static void
224 meta_free(void* _device, void *data)
225 {
226 struct radv_device *device = _device;
227 return device->alloc.pfnFree(device->alloc.pUserData, data);
228 }
229
230 static bool
231 radv_builtin_cache_path(char *path)
232 {
233 char *xdg_cache_home = getenv("XDG_CACHE_HOME");
234 const char *suffix = "/radv_builtin_shaders";
235 const char *suffix2 = "/.cache/radv_builtin_shaders";
236 struct passwd pwd, *result;
237 char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */
238
239 if (xdg_cache_home) {
240
241 if (strlen(xdg_cache_home) + strlen(suffix) > PATH_MAX)
242 return false;
243
244 strcpy(path, xdg_cache_home);
245 strcat(path, suffix);
246 return true;
247 }
248
249 getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result);
250 if (!result)
251 return false;
252
253 strcpy(path, pwd.pw_dir);
254 strcat(path, "/.cache");
255 mkdir(path, 0755);
256
257 strcat(path, suffix);
258 return true;
259 }
260
261 static void
262 radv_load_meta_pipeline(struct radv_device *device)
263 {
264 char path[PATH_MAX + 1];
265 struct stat st;
266 void *data = NULL;
267
268 if (!radv_builtin_cache_path(path))
269 return;
270
271 int fd = open(path, O_RDONLY);
272 if (fd < 0)
273 return;
274 if (fstat(fd, &st))
275 goto fail;
276 data = malloc(st.st_size);
277 if (!data)
278 goto fail;
279 if(read(fd, data, st.st_size) == -1)
280 goto fail;
281
282 radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
283 fail:
284 free(data);
285 close(fd);
286 }
287
288 static void
289 radv_store_meta_pipeline(struct radv_device *device)
290 {
291 char path[PATH_MAX + 1], path2[PATH_MAX + 7];
292 size_t size;
293 void *data = NULL;
294
295 if (!device->meta_state.cache.modified)
296 return;
297
298 if (radv_GetPipelineCacheData(radv_device_to_handle(device),
299 radv_pipeline_cache_to_handle(&device->meta_state.cache),
300 &size, NULL))
301 return;
302
303 if (!radv_builtin_cache_path(path))
304 return;
305
306 strcpy(path2, path);
307 strcat(path2, "XXXXXX");
308 int fd = mkstemp(path2);//open(path, O_WRONLY | O_CREAT, 0600);
309 if (fd < 0)
310 return;
311 data = malloc(size);
312 if (!data)
313 goto fail;
314
315 if (radv_GetPipelineCacheData(radv_device_to_handle(device),
316 radv_pipeline_cache_to_handle(&device->meta_state.cache),
317 &size, data))
318 goto fail;
319 if(write(fd, data, size) == -1)
320 goto fail;
321
322 rename(path2, path);
323 fail:
324 free(data);
325 close(fd);
326 unlink(path2);
327 }
328
329 VkResult
330 radv_device_init_meta(struct radv_device *device)
331 {
332 VkResult result;
333
334 device->meta_state.alloc = (VkAllocationCallbacks) {
335 .pUserData = device,
336 .pfnAllocation = meta_alloc,
337 .pfnReallocation = meta_realloc,
338 .pfnFree = meta_free,
339 };
340
341 device->meta_state.cache.alloc = device->meta_state.alloc;
342 radv_pipeline_cache_init(&device->meta_state.cache, device);
343 radv_load_meta_pipeline(device);
344
345 result = radv_device_init_meta_clear_state(device);
346 if (result != VK_SUCCESS)
347 goto fail_clear;
348
349 result = radv_device_init_meta_resolve_state(device);
350 if (result != VK_SUCCESS)
351 goto fail_resolve;
352
353 result = radv_device_init_meta_blit_state(device);
354 if (result != VK_SUCCESS)
355 goto fail_blit;
356
357 result = radv_device_init_meta_blit2d_state(device);
358 if (result != VK_SUCCESS)
359 goto fail_blit2d;
360
361 result = radv_device_init_meta_bufimage_state(device);
362 if (result != VK_SUCCESS)
363 goto fail_bufimage;
364
365 result = radv_device_init_meta_depth_decomp_state(device);
366 if (result != VK_SUCCESS)
367 goto fail_depth_decomp;
368
369 result = radv_device_init_meta_buffer_state(device);
370 if (result != VK_SUCCESS)
371 goto fail_buffer;
372
373 result = radv_device_init_meta_query_state(device);
374 if (result != VK_SUCCESS)
375 goto fail_query;
376
377 result = radv_device_init_meta_fast_clear_flush_state(device);
378 if (result != VK_SUCCESS)
379 goto fail_fast_clear;
380
381 result = radv_device_init_meta_resolve_compute_state(device);
382 if (result != VK_SUCCESS)
383 goto fail_resolve_compute;
384
385 result = radv_device_init_meta_resolve_fragment_state(device);
386 if (result != VK_SUCCESS)
387 goto fail_resolve_fragment;
388 return VK_SUCCESS;
389
390 fail_resolve_fragment:
391 radv_device_finish_meta_resolve_compute_state(device);
392 fail_resolve_compute:
393 radv_device_finish_meta_fast_clear_flush_state(device);
394 fail_fast_clear:
395 radv_device_finish_meta_query_state(device);
396 fail_query:
397 radv_device_finish_meta_buffer_state(device);
398 fail_buffer:
399 radv_device_finish_meta_depth_decomp_state(device);
400 fail_depth_decomp:
401 radv_device_finish_meta_bufimage_state(device);
402 fail_bufimage:
403 radv_device_finish_meta_blit2d_state(device);
404 fail_blit2d:
405 radv_device_finish_meta_blit_state(device);
406 fail_blit:
407 radv_device_finish_meta_resolve_state(device);
408 fail_resolve:
409 radv_device_finish_meta_clear_state(device);
410 fail_clear:
411 radv_pipeline_cache_finish(&device->meta_state.cache);
412 return result;
413 }
414
415 void
416 radv_device_finish_meta(struct radv_device *device)
417 {
418 radv_device_finish_meta_clear_state(device);
419 radv_device_finish_meta_resolve_state(device);
420 radv_device_finish_meta_blit_state(device);
421 radv_device_finish_meta_blit2d_state(device);
422 radv_device_finish_meta_bufimage_state(device);
423 radv_device_finish_meta_depth_decomp_state(device);
424 radv_device_finish_meta_query_state(device);
425 radv_device_finish_meta_buffer_state(device);
426 radv_device_finish_meta_fast_clear_flush_state(device);
427 radv_device_finish_meta_resolve_compute_state(device);
428 radv_device_finish_meta_resolve_fragment_state(device);
429
430 radv_store_meta_pipeline(device);
431 radv_pipeline_cache_finish(&device->meta_state.cache);
432 }
433
434 nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2)
435 {
436
437 nir_intrinsic_instr *vertex_id = nir_intrinsic_instr_create(vs_b->shader, nir_intrinsic_load_vertex_id_zero_base);
438 nir_ssa_dest_init(&vertex_id->instr, &vertex_id->dest, 1, 32, "vertexid");
439 nir_builder_instr_insert(vs_b, &vertex_id->instr);
440
441 /* vertex 0 - -1.0, -1.0 */
442 /* vertex 1 - -1.0, 1.0 */
443 /* vertex 2 - 1.0, -1.0 */
444 /* so channel 0 is vertex_id != 2 ? -1.0 : 1.0
445 channel 1 is vertex id != 1 ? -1.0 : 1.0 */
446
447 nir_ssa_def *c0cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
448 nir_imm_int(vs_b, 2));
449 nir_ssa_def *c1cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
450 nir_imm_int(vs_b, 1));
451
452 nir_ssa_def *comp[4];
453 comp[0] = nir_bcsel(vs_b, c0cmp,
454 nir_imm_float(vs_b, -1.0),
455 nir_imm_float(vs_b, 1.0));
456
457 comp[1] = nir_bcsel(vs_b, c1cmp,
458 nir_imm_float(vs_b, -1.0),
459 nir_imm_float(vs_b, 1.0));
460 comp[2] = comp2;
461 comp[3] = nir_imm_float(vs_b, 1.0);
462 nir_ssa_def *outvec = nir_vec(vs_b, comp, 4);
463
464 return outvec;
465 }
466
467 nir_ssa_def *radv_meta_gen_rect_vertices(nir_builder *vs_b)
468 {
469 return radv_meta_gen_rect_vertices_comp2(vs_b, nir_imm_float(vs_b, 0.0));
470 }
471
472 /* vertex shader that generates vertices */
473 nir_shader *
474 radv_meta_build_nir_vs_generate_vertices(void)
475 {
476 const struct glsl_type *vec4 = glsl_vec4_type();
477
478 nir_builder b;
479 nir_variable *v_position;
480
481 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
482 b.shader->info.name = ralloc_strdup(b.shader, "meta_vs_gen_verts");
483
484 nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b);
485
486 v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4,
487 "gl_Position");
488 v_position->data.location = VARYING_SLOT_POS;
489
490 nir_store_var(&b, v_position, outvec, 0xf);
491
492 return b.shader;
493 }
494
495 nir_shader *
496 radv_meta_build_nir_fs_noop(void)
497 {
498 nir_builder b;
499
500 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
501 b.shader->info.name = ralloc_asprintf(b.shader,
502 "meta_noop_fs");
503
504 return b.shader;
505 }
506
507 void radv_meta_build_resolve_shader_core(nir_builder *b,
508 bool is_integer,
509 int samples,
510 nir_variable *input_img,
511 nir_variable *color,
512 nir_ssa_def *img_coord)
513 {
514 /* do a txf_ms on each sample */
515 nir_ssa_def *tmp;
516 nir_if *outer_if = NULL;
517
518 nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2);
519 tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
520 tex->op = nir_texop_txf_ms;
521 tex->src[0].src_type = nir_tex_src_coord;
522 tex->src[0].src = nir_src_for_ssa(img_coord);
523 tex->src[1].src_type = nir_tex_src_ms_index;
524 tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
525 tex->dest_type = nir_type_float;
526 tex->is_array = false;
527 tex->coord_components = 2;
528 tex->texture = nir_deref_var_create(tex, input_img);
529 tex->sampler = NULL;
530
531 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
532 nir_builder_instr_insert(b, &tex->instr);
533
534 tmp = &tex->dest.ssa;
535
536 if (!is_integer && samples > 1) {
537 nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 1);
538 tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS;
539 tex_all_same->op = nir_texop_samples_identical;
540 tex_all_same->src[0].src_type = nir_tex_src_coord;
541 tex_all_same->src[0].src = nir_src_for_ssa(img_coord);
542 tex_all_same->dest_type = nir_type_float;
543 tex_all_same->is_array = false;
544 tex_all_same->coord_components = 2;
545 tex_all_same->texture = nir_deref_var_create(tex_all_same, input_img);
546 tex_all_same->sampler = NULL;
547
548 nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex");
549 nir_builder_instr_insert(b, &tex_all_same->instr);
550
551 nir_ssa_def *all_same = nir_ieq(b, &tex_all_same->dest.ssa, nir_imm_int(b, 0));
552 nir_if *if_stmt = nir_if_create(b->shader);
553 if_stmt->condition = nir_src_for_ssa(all_same);
554 nir_cf_node_insert(b->cursor, &if_stmt->cf_node);
555
556 b->cursor = nir_after_cf_list(&if_stmt->then_list);
557 for (int i = 1; i < samples; i++) {
558 nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 2);
559 tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS;
560 tex_add->op = nir_texop_txf_ms;
561 tex_add->src[0].src_type = nir_tex_src_coord;
562 tex_add->src[0].src = nir_src_for_ssa(img_coord);
563 tex_add->src[1].src_type = nir_tex_src_ms_index;
564 tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i));
565 tex_add->dest_type = nir_type_float;
566 tex_add->is_array = false;
567 tex_add->coord_components = 2;
568 tex_add->texture = nir_deref_var_create(tex_add, input_img);
569 tex_add->sampler = NULL;
570
571 nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex");
572 nir_builder_instr_insert(b, &tex_add->instr);
573
574 tmp = nir_fadd(b, tmp, &tex_add->dest.ssa);
575 }
576
577 tmp = nir_fdiv(b, tmp, nir_imm_float(b, samples));
578 nir_store_var(b, color, tmp, 0xf);
579 b->cursor = nir_after_cf_list(&if_stmt->else_list);
580 outer_if = if_stmt;
581 }
582 nir_store_var(b, color, &tex->dest.ssa, 0xf);
583
584 if (outer_if)
585 b->cursor = nir_after_cf_node(&outer_if->cf_node);
586 }