src/amd/vulkan/radv_meta.c

   1 /*
   2  * Copyright © 2016 Red Hat
   3  * based on intel anv code:
   4  * Copyright © 2015 Intel Corporation
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  22  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  23  * IN THE SOFTWARE.
  24  */
  25
  26 #include "radv_meta.h"
  27
  28 #include <fcntl.h>
  29 #include <limits.h>
  30 #include <pwd.h>
  31 #include <sys/stat.h>
  32
  33 void
  34 radv_meta_save(struct radv_meta_saved_state *state,
  35                struct radv_cmd_buffer *cmd_buffer, uint32_t flags)
  36 {
  37         VkPipelineBindPoint bind_point =
  38                 flags & RADV_META_SAVE_GRAPHICS_PIPELINE ?
  39                         VK_PIPELINE_BIND_POINT_GRAPHICS :
  40                         VK_PIPELINE_BIND_POINT_COMPUTE;
  41         struct radv_descriptor_state *descriptors_state =
  42                 radv_get_descriptors_state(cmd_buffer, bind_point);
  43
  44         assert(flags & (RADV_META_SAVE_GRAPHICS_PIPELINE |
  45                         RADV_META_SAVE_COMPUTE_PIPELINE));
  46
  47         state->flags = flags;
  48
  49         if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
  50                 assert(!(state->flags & RADV_META_SAVE_COMPUTE_PIPELINE));
  51
  52                 state->old_pipeline = cmd_buffer->state.pipeline;
  53
  54                 /* Save all viewports. */
  55                 state->viewport.count = cmd_buffer->state.dynamic.viewport.count;
  56                 typed_memcpy(state->viewport.viewports,
  57                              cmd_buffer->state.dynamic.viewport.viewports,
  58                              MAX_VIEWPORTS);
  59
  60                 /* Save all scissors. */
  61                 state->scissor.count = cmd_buffer->state.dynamic.scissor.count;
  62                 typed_memcpy(state->scissor.scissors,
  63                              cmd_buffer->state.dynamic.scissor.scissors,
  64                              MAX_SCISSORS);
  65
  66                 /* The most common meta operations all want to have the
  67                  * viewport reset and any scissors disabled. The rest of the
  68                  * dynamic state should have no effect.
  69                  */
  70                 cmd_buffer->state.dynamic.viewport.count = 0;
  71                 cmd_buffer->state.dynamic.scissor.count = 0;
  72                 cmd_buffer->state.dirty |= 1 << VK_DYNAMIC_STATE_VIEWPORT |
  73                                            1 << VK_DYNAMIC_STATE_SCISSOR;
  74         }
  75
  76         if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
  77                 assert(!(state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE));
  78
  79                 state->old_pipeline = cmd_buffer->state.compute_pipeline;
  80         }
  81
  82         if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
  83                 state->old_descriptor_set0 = descriptors_state->sets[0];
  84                 if (!state->old_descriptor_set0)
  85                         state->flags &= ~RADV_META_SAVE_DESCRIPTORS;
  86         }
  87
  88         if (state->flags & RADV_META_SAVE_CONSTANTS) {
  89                 memcpy(state->push_constants, cmd_buffer->push_constants,
  90                        MAX_PUSH_CONSTANTS_SIZE);
  91         }
  92
  93         if (state->flags & RADV_META_SAVE_PASS) {
  94                 state->pass = cmd_buffer->state.pass;
  95                 state->subpass = cmd_buffer->state.subpass;
  96                 state->framebuffer = cmd_buffer->state.framebuffer;
  97                 state->attachments = cmd_buffer->state.attachments;
  98                 state->render_area = cmd_buffer->state.render_area;
  99         }
 100 }
 101
 102 void
 103 radv_meta_restore(const struct radv_meta_saved_state *state,
 104                   struct radv_cmd_buffer *cmd_buffer)
 105 {
 106         VkPipelineBindPoint bind_point =
 107                 state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE ?
 108                         VK_PIPELINE_BIND_POINT_GRAPHICS :
 109                         VK_PIPELINE_BIND_POINT_COMPUTE;
 110
 111         if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE) {
 112                 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
 113                                      VK_PIPELINE_BIND_POINT_GRAPHICS,
 114                                      radv_pipeline_to_handle(state->old_pipeline));
 115
 116                 cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE;
 117
 118                 /* Restore all viewports. */
 119                 cmd_buffer->state.dynamic.viewport.count = state->viewport.count;
 120                 typed_memcpy(cmd_buffer->state.dynamic.viewport.viewports,
 121                              state->viewport.viewports,
 122                              MAX_VIEWPORTS);
 123
 124                 /* Restore all scissors. */
 125                 cmd_buffer->state.dynamic.scissor.count = state->scissor.count;
 126                 typed_memcpy(cmd_buffer->state.dynamic.scissor.scissors,
 127                              state->scissor.scissors,
 128                              MAX_SCISSORS);
 129
 130                 cmd_buffer->state.dirty |= RADV_CMD_DIRTY_DYNAMIC_VIEWPORT |
 131                                            RADV_CMD_DIRTY_DYNAMIC_SCISSOR;
 132         }
 133
 134         if (state->flags & RADV_META_SAVE_COMPUTE_PIPELINE) {
 135                 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer),
 136                                      VK_PIPELINE_BIND_POINT_COMPUTE,
 137                                      radv_pipeline_to_handle(state->old_pipeline));
 138         }
 139
 140         if (state->flags & RADV_META_SAVE_DESCRIPTORS) {
 141                 radv_set_descriptor_set(cmd_buffer, bind_point,
 142                                         state->old_descriptor_set0, 0);
 143         }
 144
 145         if (state->flags & RADV_META_SAVE_CONSTANTS) {
 146                 VkShaderStageFlags stages = VK_SHADER_STAGE_COMPUTE_BIT;
 147
 148                 if (state->flags & RADV_META_SAVE_GRAPHICS_PIPELINE)
 149                         stages |= VK_SHADER_STAGE_ALL_GRAPHICS;
 150
 151                 radv_CmdPushConstants(radv_cmd_buffer_to_handle(cmd_buffer),
 152                                       VK_NULL_HANDLE, stages, 0,
 153                                       MAX_PUSH_CONSTANTS_SIZE,
 154                                       state->push_constants);
 155         }
 156
 157         if (state->flags & RADV_META_SAVE_PASS) {
 158                 cmd_buffer->state.pass = state->pass;
 159                 cmd_buffer->state.subpass = state->subpass;
 160                 cmd_buffer->state.framebuffer = state->framebuffer;
 161                 cmd_buffer->state.attachments = state->attachments;
 162                 cmd_buffer->state.render_area = state->render_area;
 163                 if (state->subpass)
 164                         cmd_buffer->state.dirty |= RADV_CMD_DIRTY_FRAMEBUFFER;
 165         }
 166 }
 167
 168 VkImageViewType
 169 radv_meta_get_view_type(const struct radv_image *image)
 170 {
 171         switch (image->type) {
 172         case VK_IMAGE_TYPE_1D: return VK_IMAGE_VIEW_TYPE_1D;
 173         case VK_IMAGE_TYPE_2D: return VK_IMAGE_VIEW_TYPE_2D;
 174         case VK_IMAGE_TYPE_3D: return VK_IMAGE_VIEW_TYPE_3D;
 175         default:
 176                 unreachable("bad VkImageViewType");
 177         }
 178 }
 179
 180 /**
 181  * When creating a destination VkImageView, this function provides the needed
 182  * VkImageViewCreateInfo::subresourceRange::baseArrayLayer.
 183  */
 184 uint32_t
 185 radv_meta_get_iview_layer(const struct radv_image *dest_image,
 186                           const VkImageSubresourceLayers *dest_subresource,
 187                           const VkOffset3D *dest_offset)
 188 {
 189         switch (dest_image->type) {
 190         case VK_IMAGE_TYPE_1D:
 191         case VK_IMAGE_TYPE_2D:
 192                 return dest_subresource->baseArrayLayer;
 193         case VK_IMAGE_TYPE_3D:
 194                 /* HACK: Vulkan does not allow attaching a 3D image to a framebuffer,
 195                  * but meta does it anyway. When doing so, we translate the
 196                  * destination's z offset into an array offset.
 197                  */
 198                 return dest_offset->z;
 199         default:
 200                 assert(!"bad VkImageType");
 201                 return 0;
 202         }
 203 }
 204
 205 static void *
 206 meta_alloc(void* _device, size_t size, size_t alignment,
 207            VkSystemAllocationScope allocationScope)
 208 {
 209         struct radv_device *device = _device;
 210         return device->alloc.pfnAllocation(device->alloc.pUserData, size, alignment,
 211                                            VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
 212 }
 213
 214 static void *
 215 meta_realloc(void* _device, void *original, size_t size, size_t alignment,
 216              VkSystemAllocationScope allocationScope)
 217 {
 218         struct radv_device *device = _device;
 219         return device->alloc.pfnReallocation(device->alloc.pUserData, original,
 220                                              size, alignment,
 221                                              VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
 222 }
 223
 224 static void
 225 meta_free(void* _device, void *data)
 226 {
 227         struct radv_device *device = _device;
 228         return device->alloc.pfnFree(device->alloc.pUserData, data);
 229 }
 230
 231 static bool
 232 radv_builtin_cache_path(char *path)
 233 {
 234         char *xdg_cache_home = getenv("XDG_CACHE_HOME");
 235         const char *suffix = "/radv_builtin_shaders";
 236         const char *suffix2 = "/.cache/radv_builtin_shaders";
 237         struct passwd pwd, *result;
 238         char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */
 239         int ret;
 240
 241         if (xdg_cache_home) {
 242                 ret = snprintf(path, PATH_MAX + 1, "%s%s%zd",
 243                                xdg_cache_home, suffix, sizeof(void *) * 8);
 244                 return ret > 0 && ret < PATH_MAX + 1;
 245         }
 246
 247         getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result);
 248         if (!result)
 249                 return false;
 250
 251         strcpy(path, pwd.pw_dir);
 252         strcat(path, "/.cache");
 253         mkdir(path, 0755);
 254
 255         ret = snprintf(path, PATH_MAX + 1, "%s%s%zd",
 256                        pwd.pw_dir, suffix2, sizeof(void *) * 8);
 257         return ret > 0 && ret < PATH_MAX + 1;
 258 }
 259
 260 static bool
 261 radv_load_meta_pipeline(struct radv_device *device)
 262 {
 263         char path[PATH_MAX + 1];
 264         struct stat st;
 265         void *data = NULL;
 266         bool ret = false;
 267
 268         if (!radv_builtin_cache_path(path))
 269                 return false;
 270
 271         int fd = open(path, O_RDONLY);
 272         if (fd < 0)
 273                 return false;
 274         if (fstat(fd, &st))
 275                 goto fail;
 276         data = malloc(st.st_size);
 277         if (!data)
 278                 goto fail;
 279         if(read(fd, data, st.st_size) == -1)
 280                 goto fail;
 281
 282         ret = radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
 283 fail:
 284         free(data);
 285         close(fd);
 286         return ret;
 287 }
 288
 289 static void
 290 radv_store_meta_pipeline(struct radv_device *device)
 291 {
 292         char path[PATH_MAX + 1], path2[PATH_MAX + 7];
 293         size_t size;
 294         void *data = NULL;
 295
 296         if (!device->meta_state.cache.modified)
 297                 return;
 298
 299         if (radv_GetPipelineCacheData(radv_device_to_handle(device),
 300                                       radv_pipeline_cache_to_handle(&device->meta_state.cache),
 301                                       &size, NULL))
 302                 return;
 303
 304         if (!radv_builtin_cache_path(path))
 305                 return;
 306
 307         strcpy(path2, path);
 308         strcat(path2, "XXXXXX");
 309         int fd = mkstemp(path2);//open(path, O_WRONLY | O_CREAT, 0600);
 310         if (fd < 0)
 311                 return;
 312         data = malloc(size);
 313         if (!data)
 314                 goto fail;
 315
 316         if (radv_GetPipelineCacheData(radv_device_to_handle(device),
 317                                       radv_pipeline_cache_to_handle(&device->meta_state.cache),
 318                                       &size, data))
 319                 goto fail;
 320         if(write(fd, data, size) == -1)
 321                 goto fail;
 322
 323         rename(path2, path);
 324 fail:
 325         free(data);
 326         close(fd);
 327         unlink(path2);
 328 }
 329
 330 VkResult
 331 radv_device_init_meta(struct radv_device *device)
 332 {
 333         VkResult result;
 334
 335         memset(&device->meta_state, 0, sizeof(device->meta_state));
 336
 337         device->meta_state.alloc = (VkAllocationCallbacks) {
 338                 .pUserData = device,
 339                 .pfnAllocation = meta_alloc,
 340                 .pfnReallocation = meta_realloc,
 341                 .pfnFree = meta_free,
 342         };
 343
 344         device->meta_state.cache.alloc = device->meta_state.alloc;
 345         radv_pipeline_cache_init(&device->meta_state.cache, device);
 346         bool loaded_cache = radv_load_meta_pipeline(device);
 347         bool on_demand = !loaded_cache;
 348
 349         mtx_init(&device->meta_state.mtx, mtx_plain);
 350
 351         result = radv_device_init_meta_clear_state(device, on_demand);
 352         if (result != VK_SUCCESS)
 353                 goto fail_clear;
 354
 355         result = radv_device_init_meta_resolve_state(device, on_demand);
 356         if (result != VK_SUCCESS)
 357                 goto fail_resolve;
 358
 359         result = radv_device_init_meta_blit_state(device, on_demand);
 360         if (result != VK_SUCCESS)
 361                 goto fail_blit;
 362
 363         result = radv_device_init_meta_blit2d_state(device, on_demand);
 364         if (result != VK_SUCCESS)
 365                 goto fail_blit2d;
 366
 367         result = radv_device_init_meta_bufimage_state(device);
 368         if (result != VK_SUCCESS)
 369                 goto fail_bufimage;
 370
 371         result = radv_device_init_meta_depth_decomp_state(device, on_demand);
 372         if (result != VK_SUCCESS)
 373                 goto fail_depth_decomp;
 374
 375         result = radv_device_init_meta_buffer_state(device);
 376         if (result != VK_SUCCESS)
 377                 goto fail_buffer;
 378
 379         result = radv_device_init_meta_query_state(device, on_demand);
 380         if (result != VK_SUCCESS)
 381                 goto fail_query;
 382
 383         result = radv_device_init_meta_fast_clear_flush_state(device, on_demand);
 384         if (result != VK_SUCCESS)
 385                 goto fail_fast_clear;
 386
 387         result = radv_device_init_meta_resolve_compute_state(device, on_demand);
 388         if (result != VK_SUCCESS)
 389                 goto fail_resolve_compute;
 390
 391         result = radv_device_init_meta_resolve_fragment_state(device, on_demand);
 392         if (result != VK_SUCCESS)
 393                 goto fail_resolve_fragment;
 394
 395         result = radv_device_init_meta_fmask_expand_state(device);
 396         if (result != VK_SUCCESS)
 397                 goto fail_fmask_expand;
 398
 399         return VK_SUCCESS;
 400
 401 fail_fmask_expand:
 402         radv_device_finish_meta_resolve_fragment_state(device);
 403 fail_resolve_fragment:
 404         radv_device_finish_meta_resolve_compute_state(device);
 405 fail_resolve_compute:
 406         radv_device_finish_meta_fast_clear_flush_state(device);
 407 fail_fast_clear:
 408         radv_device_finish_meta_query_state(device);
 409 fail_query:
 410         radv_device_finish_meta_buffer_state(device);
 411 fail_buffer:
 412         radv_device_finish_meta_depth_decomp_state(device);
 413 fail_depth_decomp:
 414         radv_device_finish_meta_bufimage_state(device);
 415 fail_bufimage:
 416         radv_device_finish_meta_blit2d_state(device);
 417 fail_blit2d:
 418         radv_device_finish_meta_blit_state(device);
 419 fail_blit:
 420         radv_device_finish_meta_resolve_state(device);
 421 fail_resolve:
 422         radv_device_finish_meta_clear_state(device);
 423 fail_clear:
 424         mtx_destroy(&device->meta_state.mtx);
 425         radv_pipeline_cache_finish(&device->meta_state.cache);
 426         return result;
 427 }
 428
 429 void
 430 radv_device_finish_meta(struct radv_device *device)
 431 {
 432         radv_device_finish_meta_clear_state(device);
 433         radv_device_finish_meta_resolve_state(device);
 434         radv_device_finish_meta_blit_state(device);
 435         radv_device_finish_meta_blit2d_state(device);
 436         radv_device_finish_meta_bufimage_state(device);
 437         radv_device_finish_meta_depth_decomp_state(device);
 438         radv_device_finish_meta_query_state(device);
 439         radv_device_finish_meta_buffer_state(device);
 440         radv_device_finish_meta_fast_clear_flush_state(device);
 441         radv_device_finish_meta_resolve_compute_state(device);
 442         radv_device_finish_meta_resolve_fragment_state(device);
 443         radv_device_finish_meta_fmask_expand_state(device);
 444
 445         radv_store_meta_pipeline(device);
 446         radv_pipeline_cache_finish(&device->meta_state.cache);
 447         mtx_destroy(&device->meta_state.mtx);
 448 }
 449
 450 nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2)
 451 {
 452
 453         nir_intrinsic_instr *vertex_id = nir_intrinsic_instr_create(vs_b->shader, nir_intrinsic_load_vertex_id_zero_base);
 454         nir_ssa_dest_init(&vertex_id->instr, &vertex_id->dest, 1, 32, "vertexid");
 455         nir_builder_instr_insert(vs_b, &vertex_id->instr);
 456
 457         /* vertex 0 - -1.0, -1.0 */
 458         /* vertex 1 - -1.0, 1.0 */
 459         /* vertex 2 - 1.0, -1.0 */
 460         /* so channel 0 is vertex_id != 2 ? -1.0 : 1.0
 461            channel 1 is vertex id != 1 ? -1.0 : 1.0 */
 462
 463         nir_ssa_def *c0cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
 464                                      nir_imm_int(vs_b, 2));
 465         nir_ssa_def *c1cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
 466                                      nir_imm_int(vs_b, 1));
 467
 468         nir_ssa_def *comp[4];
 469         comp[0] = nir_bcsel(vs_b, c0cmp,
 470                             nir_imm_float(vs_b, -1.0),
 471                             nir_imm_float(vs_b, 1.0));
 472
 473         comp[1] = nir_bcsel(vs_b, c1cmp,
 474                             nir_imm_float(vs_b, -1.0),
 475                             nir_imm_float(vs_b, 1.0));
 476         comp[2] = comp2;
 477         comp[3] = nir_imm_float(vs_b, 1.0);
 478         nir_ssa_def *outvec = nir_vec(vs_b, comp, 4);
 479
 480         return outvec;
 481 }
 482
 483 nir_ssa_def *radv_meta_gen_rect_vertices(nir_builder *vs_b)
 484 {
 485         return radv_meta_gen_rect_vertices_comp2(vs_b, nir_imm_float(vs_b, 0.0));
 486 }
 487
 488 /* vertex shader that generates vertices */
 489 nir_shader *
 490 radv_meta_build_nir_vs_generate_vertices(void)
 491 {
 492         const struct glsl_type *vec4 = glsl_vec4_type();
 493
 494         nir_builder b;
 495         nir_variable *v_position;
 496
 497         nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
 498         b.shader->info.name = ralloc_strdup(b.shader, "meta_vs_gen_verts");
 499
 500         nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b);
 501
 502         v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4,
 503                                          "gl_Position");
 504         v_position->data.location = VARYING_SLOT_POS;
 505
 506         nir_store_var(&b, v_position, outvec, 0xf);
 507
 508         return b.shader;
 509 }
 510
 511 nir_shader *
 512 radv_meta_build_nir_fs_noop(void)
 513 {
 514         nir_builder b;
 515
 516         nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
 517         b.shader->info.name = ralloc_asprintf(b.shader,
 518                                                "meta_noop_fs");
 519
 520         return b.shader;
 521 }
 522
 523 void radv_meta_build_resolve_shader_core(nir_builder *b,
 524                                          bool is_integer,
 525                                          int samples,
 526                                          nir_variable *input_img,
 527                                          nir_variable *color,
 528                                          nir_ssa_def *img_coord)
 529 {
 530         /* do a txf_ms on each sample */
 531         nir_ssa_def *tmp;
 532         nir_if *outer_if = NULL;
 533
 534         nir_ssa_def *input_img_deref = &nir_build_deref_var(b, input_img)->dest.ssa;
 535
 536         nir_tex_instr *tex = nir_tex_instr_create(b->shader, 3);
 537         tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
 538         tex->op = nir_texop_txf_ms;
 539         tex->src[0].src_type = nir_tex_src_coord;
 540         tex->src[0].src = nir_src_for_ssa(img_coord);
 541         tex->src[1].src_type = nir_tex_src_ms_index;
 542         tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
 543         tex->src[2].src_type = nir_tex_src_texture_deref;
 544         tex->src[2].src = nir_src_for_ssa(input_img_deref);
 545         tex->dest_type = nir_type_float;
 546         tex->is_array = false;
 547         tex->coord_components = 2;
 548
 549         nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
 550         nir_builder_instr_insert(b, &tex->instr);
 551
 552         tmp = &tex->dest.ssa;
 553
 554         if (!is_integer && samples > 1) {
 555                 nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 2);
 556                 tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS;
 557                 tex_all_same->op = nir_texop_samples_identical;
 558                 tex_all_same->src[0].src_type = nir_tex_src_coord;
 559                 tex_all_same->src[0].src = nir_src_for_ssa(img_coord);
 560                 tex_all_same->src[1].src_type = nir_tex_src_texture_deref;
 561                 tex_all_same->src[1].src = nir_src_for_ssa(input_img_deref);
 562                 tex_all_same->dest_type = nir_type_float;
 563                 tex_all_same->is_array = false;
 564                 tex_all_same->coord_components = 2;
 565
 566                 nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex");
 567                 nir_builder_instr_insert(b, &tex_all_same->instr);
 568
 569                 nir_ssa_def *all_same = nir_ieq(b, &tex_all_same->dest.ssa, nir_imm_int(b, 0));
 570                 nir_if *if_stmt = nir_if_create(b->shader);
 571                 if_stmt->condition = nir_src_for_ssa(all_same);
 572                 nir_cf_node_insert(b->cursor, &if_stmt->cf_node);
 573
 574                 b->cursor = nir_after_cf_list(&if_stmt->then_list);
 575                 for (int i = 1; i < samples; i++) {
 576                         nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 3);
 577                         tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS;
 578                         tex_add->op = nir_texop_txf_ms;
 579                         tex_add->src[0].src_type = nir_tex_src_coord;
 580                         tex_add->src[0].src = nir_src_for_ssa(img_coord);
 581                         tex_add->src[1].src_type = nir_tex_src_ms_index;
 582                         tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i));
 583                         tex_add->src[2].src_type = nir_tex_src_texture_deref;
 584                         tex_add->src[2].src = nir_src_for_ssa(input_img_deref);
 585                         tex_add->dest_type = nir_type_float;
 586                         tex_add->is_array = false;
 587                         tex_add->coord_components = 2;
 588
 589                         nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex");
 590                         nir_builder_instr_insert(b, &tex_add->instr);
 591
 592                         tmp = nir_fadd(b, tmp, &tex_add->dest.ssa);
 593                 }
 594
 595                 tmp = nir_fdiv(b, tmp, nir_imm_float(b, samples));
 596                 nir_store_var(b, color, tmp, 0xf);
 597                 b->cursor = nir_after_cf_list(&if_stmt->else_list);
 598                 outer_if = if_stmt;
 599         }
 600         nir_store_var(b, color, &tex->dest.ssa, 0xf);
 601
 602         if (outer_if)
 603                 b->cursor = nir_after_cf_node(&outer_if->cf_node);
 604 }