radv/meta: split out core part of resolve shader
[mesa.git] / src / amd / vulkan / radv_meta.c
1 /*
2 * Copyright © 2016 Red Hat
3 * based on intel anv code:
4 * Copyright © 2015 Intel Corporation
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
15 * Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
22 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
23 * IN THE SOFTWARE.
24 */
25
26 #include "radv_meta.h"
27
28 #include <fcntl.h>
29 #include <limits.h>
30 #include <pwd.h>
31 #include <sys/stat.h>
32
33 void
34 radv_meta_save_novertex(struct radv_meta_saved_state *state,
35 const struct radv_cmd_buffer *cmd_buffer,
36 uint32_t dynamic_mask)
37 {
38 state->old_pipeline = cmd_buffer->state.pipeline;
39
40 state->dynamic_mask = dynamic_mask;
41 radv_dynamic_state_copy(&state->dynamic, &cmd_buffer->state.dynamic,
42 dynamic_mask);
43
44 memcpy(state->push_constants, cmd_buffer->push_constants, MAX_PUSH_CONSTANTS_SIZE);
45 state->vertex_saved = false;
46 }
47
48 void
49 radv_meta_save(struct radv_meta_saved_state *state,
50 const struct radv_cmd_buffer *cmd_buffer,
51 uint32_t dynamic_mask)
52 {
53 radv_meta_save_novertex(state, cmd_buffer, dynamic_mask);
54 state->old_descriptor_set0 = cmd_buffer->state.descriptors[0];
55 memcpy(state->old_vertex_bindings, cmd_buffer->state.vertex_bindings,
56 sizeof(state->old_vertex_bindings));
57 state->vertex_saved = true;
58 }
59
60 void
61 radv_meta_restore(const struct radv_meta_saved_state *state,
62 struct radv_cmd_buffer *cmd_buffer)
63 {
64 cmd_buffer->state.pipeline = state->old_pipeline;
65 if (state->vertex_saved) {
66 cmd_buffer->state.descriptors[0] = state->old_descriptor_set0;
67 cmd_buffer->state.descriptors_dirty |= (1u << 0);
68 memcpy(cmd_buffer->state.vertex_bindings, state->old_vertex_bindings,
69 sizeof(state->old_vertex_bindings));
70 cmd_buffer->state.vb_dirty |= (1 << RADV_META_VERTEX_BINDING_COUNT) - 1;
71 }
72
73 cmd_buffer->state.dirty |= RADV_CMD_DIRTY_PIPELINE;
74
75 radv_dynamic_state_copy(&cmd_buffer->state.dynamic, &state->dynamic,
76 state->dynamic_mask);
77 cmd_buffer->state.dirty |= state->dynamic_mask;
78
79 memcpy(cmd_buffer->push_constants, state->push_constants, MAX_PUSH_CONSTANTS_SIZE);
80 cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_ALL_GRAPHICS | VK_SHADER_STAGE_COMPUTE_BIT;
81 }
82
83 void
84 radv_meta_save_pass(struct radv_meta_saved_pass_state *state,
85 const struct radv_cmd_buffer *cmd_buffer)
86 {
87 state->pass = cmd_buffer->state.pass;
88 state->subpass = cmd_buffer->state.subpass;
89 state->framebuffer = cmd_buffer->state.framebuffer;
90 state->attachments = cmd_buffer->state.attachments;
91 state->render_area = cmd_buffer->state.render_area;
92 }
93
94 void
95 radv_meta_restore_pass(const struct radv_meta_saved_pass_state *state,
96 struct radv_cmd_buffer *cmd_buffer)
97 {
98 cmd_buffer->state.pass = state->pass;
99 cmd_buffer->state.subpass = state->subpass;
100 cmd_buffer->state.framebuffer = state->framebuffer;
101 cmd_buffer->state.attachments = state->attachments;
102 cmd_buffer->state.render_area = state->render_area;
103 if (state->subpass)
104 radv_emit_framebuffer_state(cmd_buffer);
105 }
106
107 void
108 radv_meta_save_compute(struct radv_meta_saved_compute_state *state,
109 const struct radv_cmd_buffer *cmd_buffer,
110 unsigned push_constant_size)
111 {
112 state->old_pipeline = cmd_buffer->state.compute_pipeline;
113 state->old_descriptor_set0 = cmd_buffer->state.descriptors[0];
114
115 if (push_constant_size)
116 memcpy(state->push_constants, cmd_buffer->push_constants, push_constant_size);
117 }
118
119 void
120 radv_meta_restore_compute(const struct radv_meta_saved_compute_state *state,
121 struct radv_cmd_buffer *cmd_buffer,
122 unsigned push_constant_size)
123 {
124 radv_CmdBindPipeline(radv_cmd_buffer_to_handle(cmd_buffer), VK_PIPELINE_BIND_POINT_COMPUTE,
125 radv_pipeline_to_handle(state->old_pipeline));
126
127 cmd_buffer->state.descriptors[0] = state->old_descriptor_set0;
128 cmd_buffer->state.descriptors_dirty |= (1u << 0);
129
130 if (push_constant_size) {
131 memcpy(cmd_buffer->push_constants, state->push_constants, push_constant_size);
132 cmd_buffer->push_constant_stages |= VK_SHADER_STAGE_COMPUTE_BIT;
133 }
134 }
135
136 VkImageViewType
137 radv_meta_get_view_type(const struct radv_image *image)
138 {
139 switch (image->type) {
140 case VK_IMAGE_TYPE_1D: return VK_IMAGE_VIEW_TYPE_1D;
141 case VK_IMAGE_TYPE_2D: return VK_IMAGE_VIEW_TYPE_2D;
142 case VK_IMAGE_TYPE_3D: return VK_IMAGE_VIEW_TYPE_3D;
143 default:
144 unreachable("bad VkImageViewType");
145 }
146 }
147
148 /**
149 * When creating a destination VkImageView, this function provides the needed
150 * VkImageViewCreateInfo::subresourceRange::baseArrayLayer.
151 */
152 uint32_t
153 radv_meta_get_iview_layer(const struct radv_image *dest_image,
154 const VkImageSubresourceLayers *dest_subresource,
155 const VkOffset3D *dest_offset)
156 {
157 switch (dest_image->type) {
158 case VK_IMAGE_TYPE_1D:
159 case VK_IMAGE_TYPE_2D:
160 return dest_subresource->baseArrayLayer;
161 case VK_IMAGE_TYPE_3D:
162 /* HACK: Vulkan does not allow attaching a 3D image to a framebuffer,
163 * but meta does it anyway. When doing so, we translate the
164 * destination's z offset into an array offset.
165 */
166 return dest_offset->z;
167 default:
168 assert(!"bad VkImageType");
169 return 0;
170 }
171 }
172
173 static void *
174 meta_alloc(void* _device, size_t size, size_t alignment,
175 VkSystemAllocationScope allocationScope)
176 {
177 struct radv_device *device = _device;
178 return device->alloc.pfnAllocation(device->alloc.pUserData, size, alignment,
179 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
180 }
181
182 static void *
183 meta_realloc(void* _device, void *original, size_t size, size_t alignment,
184 VkSystemAllocationScope allocationScope)
185 {
186 struct radv_device *device = _device;
187 return device->alloc.pfnReallocation(device->alloc.pUserData, original,
188 size, alignment,
189 VK_SYSTEM_ALLOCATION_SCOPE_DEVICE);
190 }
191
192 static void
193 meta_free(void* _device, void *data)
194 {
195 struct radv_device *device = _device;
196 return device->alloc.pfnFree(device->alloc.pUserData, data);
197 }
198
199 static bool
200 radv_builtin_cache_path(char *path)
201 {
202 char *xdg_cache_home = getenv("XDG_CACHE_HOME");
203 const char *suffix = "/radv_builtin_shaders";
204 const char *suffix2 = "/.cache/radv_builtin_shaders";
205 struct passwd pwd, *result;
206 char path2[PATH_MAX + 1]; /* PATH_MAX is not a real max,but suffices here. */
207
208 if (xdg_cache_home) {
209
210 if (strlen(xdg_cache_home) + strlen(suffix) > PATH_MAX)
211 return false;
212
213 strcpy(path, xdg_cache_home);
214 strcat(path, suffix);
215 return true;
216 }
217
218 getpwuid_r(getuid(), &pwd, path2, PATH_MAX - strlen(suffix2), &result);
219 if (!result)
220 return false;
221
222 strcpy(path, pwd.pw_dir);
223 strcat(path, "/.cache");
224 mkdir(path, 0755);
225
226 strcat(path, suffix);
227 return true;
228 }
229
230 static void
231 radv_load_meta_pipeline(struct radv_device *device)
232 {
233 char path[PATH_MAX + 1];
234 struct stat st;
235 void *data = NULL;
236
237 if (!radv_builtin_cache_path(path))
238 return;
239
240 int fd = open(path, O_RDONLY);
241 if (fd < 0)
242 return;
243 if (fstat(fd, &st))
244 goto fail;
245 data = malloc(st.st_size);
246 if (!data)
247 goto fail;
248 if(read(fd, data, st.st_size) == -1)
249 goto fail;
250
251 radv_pipeline_cache_load(&device->meta_state.cache, data, st.st_size);
252 fail:
253 free(data);
254 close(fd);
255 }
256
257 static void
258 radv_store_meta_pipeline(struct radv_device *device)
259 {
260 char path[PATH_MAX + 1], path2[PATH_MAX + 7];
261 size_t size;
262 void *data = NULL;
263
264 if (!device->meta_state.cache.modified)
265 return;
266
267 if (radv_GetPipelineCacheData(radv_device_to_handle(device),
268 radv_pipeline_cache_to_handle(&device->meta_state.cache),
269 &size, NULL))
270 return;
271
272 if (!radv_builtin_cache_path(path))
273 return;
274
275 strcpy(path2, path);
276 strcat(path2, "XXXXXX");
277 int fd = mkstemp(path2);//open(path, O_WRONLY | O_CREAT, 0600);
278 if (fd < 0)
279 return;
280 data = malloc(size);
281 if (!data)
282 goto fail;
283
284 if (radv_GetPipelineCacheData(radv_device_to_handle(device),
285 radv_pipeline_cache_to_handle(&device->meta_state.cache),
286 &size, data))
287 goto fail;
288 if(write(fd, data, size) == -1)
289 goto fail;
290
291 rename(path2, path);
292 fail:
293 free(data);
294 close(fd);
295 unlink(path2);
296 }
297
298 VkResult
299 radv_device_init_meta(struct radv_device *device)
300 {
301 VkResult result;
302
303 device->meta_state.alloc = (VkAllocationCallbacks) {
304 .pUserData = device,
305 .pfnAllocation = meta_alloc,
306 .pfnReallocation = meta_realloc,
307 .pfnFree = meta_free,
308 };
309
310 device->meta_state.cache.alloc = device->meta_state.alloc;
311 radv_pipeline_cache_init(&device->meta_state.cache, device);
312 radv_load_meta_pipeline(device);
313
314 result = radv_device_init_meta_clear_state(device);
315 if (result != VK_SUCCESS)
316 goto fail_clear;
317
318 result = radv_device_init_meta_resolve_state(device);
319 if (result != VK_SUCCESS)
320 goto fail_resolve;
321
322 result = radv_device_init_meta_blit_state(device);
323 if (result != VK_SUCCESS)
324 goto fail_blit;
325
326 result = radv_device_init_meta_blit2d_state(device);
327 if (result != VK_SUCCESS)
328 goto fail_blit2d;
329
330 result = radv_device_init_meta_bufimage_state(device);
331 if (result != VK_SUCCESS)
332 goto fail_bufimage;
333
334 result = radv_device_init_meta_depth_decomp_state(device);
335 if (result != VK_SUCCESS)
336 goto fail_depth_decomp;
337
338 result = radv_device_init_meta_buffer_state(device);
339 if (result != VK_SUCCESS)
340 goto fail_buffer;
341
342 result = radv_device_init_meta_query_state(device);
343 if (result != VK_SUCCESS)
344 goto fail_query;
345
346 result = radv_device_init_meta_fast_clear_flush_state(device);
347 if (result != VK_SUCCESS)
348 goto fail_fast_clear;
349
350 result = radv_device_init_meta_resolve_compute_state(device);
351 if (result != VK_SUCCESS)
352 goto fail_resolve_compute;
353 return VK_SUCCESS;
354
355 fail_resolve_compute:
356 radv_device_finish_meta_fast_clear_flush_state(device);
357 fail_fast_clear:
358 radv_device_finish_meta_buffer_state(device);
359 fail_query:
360 radv_device_finish_meta_query_state(device);
361 fail_buffer:
362 radv_device_finish_meta_depth_decomp_state(device);
363 fail_depth_decomp:
364 radv_device_finish_meta_bufimage_state(device);
365 fail_bufimage:
366 radv_device_finish_meta_blit2d_state(device);
367 fail_blit2d:
368 radv_device_finish_meta_blit_state(device);
369 fail_blit:
370 radv_device_finish_meta_resolve_state(device);
371 fail_resolve:
372 radv_device_finish_meta_clear_state(device);
373 fail_clear:
374 radv_pipeline_cache_finish(&device->meta_state.cache);
375 return result;
376 }
377
378 void
379 radv_device_finish_meta(struct radv_device *device)
380 {
381 radv_device_finish_meta_clear_state(device);
382 radv_device_finish_meta_resolve_state(device);
383 radv_device_finish_meta_blit_state(device);
384 radv_device_finish_meta_blit2d_state(device);
385 radv_device_finish_meta_bufimage_state(device);
386 radv_device_finish_meta_depth_decomp_state(device);
387 radv_device_finish_meta_query_state(device);
388 radv_device_finish_meta_buffer_state(device);
389 radv_device_finish_meta_fast_clear_flush_state(device);
390 radv_device_finish_meta_resolve_compute_state(device);
391
392 radv_store_meta_pipeline(device);
393 radv_pipeline_cache_finish(&device->meta_state.cache);
394 }
395
396 /*
397 * The most common meta operations all want to have the viewport
398 * reset and any scissors disabled. The rest of the dynamic state
399 * should have no effect.
400 */
401 void
402 radv_meta_save_graphics_reset_vport_scissor(struct radv_meta_saved_state *saved_state,
403 struct radv_cmd_buffer *cmd_buffer)
404 {
405 uint32_t dirty_state = (1 << VK_DYNAMIC_STATE_VIEWPORT) | (1 << VK_DYNAMIC_STATE_SCISSOR);
406 radv_meta_save(saved_state, cmd_buffer, dirty_state);
407 cmd_buffer->state.dynamic.viewport.count = 0;
408 cmd_buffer->state.dynamic.scissor.count = 0;
409 cmd_buffer->state.dirty |= dirty_state;
410 }
411
412 void
413 radv_meta_save_graphics_reset_vport_scissor_novertex(struct radv_meta_saved_state *saved_state,
414 struct radv_cmd_buffer *cmd_buffer)
415 {
416 uint32_t dirty_state = (1 << VK_DYNAMIC_STATE_VIEWPORT) | (1 << VK_DYNAMIC_STATE_SCISSOR);
417 radv_meta_save_novertex(saved_state, cmd_buffer, dirty_state);
418 cmd_buffer->state.dynamic.viewport.count = 0;
419 cmd_buffer->state.dynamic.scissor.count = 0;
420 cmd_buffer->state.dirty |= dirty_state;
421 }
422
423 nir_ssa_def *radv_meta_gen_rect_vertices_comp2(nir_builder *vs_b, nir_ssa_def *comp2)
424 {
425
426 nir_intrinsic_instr *vertex_id = nir_intrinsic_instr_create(vs_b->shader, nir_intrinsic_load_vertex_id_zero_base);
427 nir_ssa_dest_init(&vertex_id->instr, &vertex_id->dest, 1, 32, "vertexid");
428 nir_builder_instr_insert(vs_b, &vertex_id->instr);
429
430 /* vertex 0 - -1.0, -1.0 */
431 /* vertex 1 - -1.0, 1.0 */
432 /* vertex 2 - 1.0, -1.0 */
433 /* so channel 0 is vertex_id != 2 ? -1.0 : 1.0
434 channel 1 is vertex id != 1 ? -1.0 : 1.0 */
435
436 nir_ssa_def *c0cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
437 nir_imm_int(vs_b, 2));
438 nir_ssa_def *c1cmp = nir_ine(vs_b, &vertex_id->dest.ssa,
439 nir_imm_int(vs_b, 1));
440
441 nir_ssa_def *comp[4];
442 comp[0] = nir_bcsel(vs_b, c0cmp,
443 nir_imm_float(vs_b, -1.0),
444 nir_imm_float(vs_b, 1.0));
445
446 comp[1] = nir_bcsel(vs_b, c1cmp,
447 nir_imm_float(vs_b, -1.0),
448 nir_imm_float(vs_b, 1.0));
449 comp[2] = comp2;
450 comp[3] = nir_imm_float(vs_b, 1.0);
451 nir_ssa_def *outvec = nir_vec(vs_b, comp, 4);
452
453 return outvec;
454 }
455
456 nir_ssa_def *radv_meta_gen_rect_vertices(nir_builder *vs_b)
457 {
458 return radv_meta_gen_rect_vertices_comp2(vs_b, nir_imm_float(vs_b, 0.0));
459 }
460
461 /* vertex shader that generates vertices */
462 nir_shader *
463 radv_meta_build_nir_vs_generate_vertices(void)
464 {
465 const struct glsl_type *vec4 = glsl_vec4_type();
466
467 nir_builder b;
468 nir_variable *v_position;
469
470 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_VERTEX, NULL);
471 b.shader->info->name = ralloc_strdup(b.shader, "meta_vs_gen_verts");
472
473 nir_ssa_def *outvec = radv_meta_gen_rect_vertices(&b);
474
475 v_position = nir_variable_create(b.shader, nir_var_shader_out, vec4,
476 "gl_Position");
477 v_position->data.location = VARYING_SLOT_POS;
478
479 nir_store_var(&b, v_position, outvec, 0xf);
480
481 return b.shader;
482 }
483
484 nir_shader *
485 radv_meta_build_nir_fs_noop(void)
486 {
487 nir_builder b;
488
489 nir_builder_init_simple_shader(&b, NULL, MESA_SHADER_FRAGMENT, NULL);
490 b.shader->info->name = ralloc_asprintf(b.shader,
491 "meta_noop_fs");
492
493 return b.shader;
494 }
495
496 static nir_ssa_def *radv_meta_build_resolve_srgb_conversion(nir_builder *b,
497 nir_ssa_def *input)
498 {
499 nir_const_value v;
500 unsigned i;
501 v.u32[0] = 0x3b4d2e1c; // 0.00313080009
502
503 nir_ssa_def *cmp[3];
504 for (i = 0; i < 3; i++)
505 cmp[i] = nir_flt(b, nir_channel(b, input, i),
506 nir_build_imm(b, 1, 32, v));
507
508 nir_ssa_def *ltvals[3];
509 v.f32[0] = 12.92;
510 for (i = 0; i < 3; i++)
511 ltvals[i] = nir_fmul(b, nir_channel(b, input, i),
512 nir_build_imm(b, 1, 32, v));
513
514 nir_ssa_def *gtvals[3];
515
516 for (i = 0; i < 3; i++) {
517 v.f32[0] = 1.0/2.4;
518 gtvals[i] = nir_fpow(b, nir_channel(b, input, i),
519 nir_build_imm(b, 1, 32, v));
520 v.f32[0] = 1.055;
521 gtvals[i] = nir_fmul(b, gtvals[i],
522 nir_build_imm(b, 1, 32, v));
523 v.f32[0] = 0.055;
524 gtvals[i] = nir_fsub(b, gtvals[i],
525 nir_build_imm(b, 1, 32, v));
526 }
527
528 nir_ssa_def *comp[4];
529 for (i = 0; i < 3; i++)
530 comp[i] = nir_bcsel(b, cmp[i], ltvals[i], gtvals[i]);
531 comp[3] = nir_channels(b, input, 3);
532 return nir_vec(b, comp, 4);
533 }
534
535 void radv_meta_build_resolve_shader_core(nir_builder *b,
536 bool is_integer,
537 bool is_srgb,
538 int samples,
539 nir_variable *input_img,
540 nir_variable *color,
541 nir_ssa_def *img_coord)
542 {
543 /* do a txf_ms on each sample */
544 nir_ssa_def *tmp;
545 nir_if *outer_if = NULL;
546
547 nir_tex_instr *tex = nir_tex_instr_create(b->shader, 2);
548 tex->sampler_dim = GLSL_SAMPLER_DIM_MS;
549 tex->op = nir_texop_txf_ms;
550 tex->src[0].src_type = nir_tex_src_coord;
551 tex->src[0].src = nir_src_for_ssa(img_coord);
552 tex->src[1].src_type = nir_tex_src_ms_index;
553 tex->src[1].src = nir_src_for_ssa(nir_imm_int(b, 0));
554 tex->dest_type = nir_type_float;
555 tex->is_array = false;
556 tex->coord_components = 2;
557 tex->texture = nir_deref_var_create(tex, input_img);
558 tex->sampler = NULL;
559
560 nir_ssa_dest_init(&tex->instr, &tex->dest, 4, 32, "tex");
561 nir_builder_instr_insert(b, &tex->instr);
562
563 tmp = &tex->dest.ssa;
564
565 if (!is_integer && samples > 1) {
566 nir_tex_instr *tex_all_same = nir_tex_instr_create(b->shader, 1);
567 tex_all_same->sampler_dim = GLSL_SAMPLER_DIM_MS;
568 tex_all_same->op = nir_texop_samples_identical;
569 tex_all_same->src[0].src_type = nir_tex_src_coord;
570 tex_all_same->src[0].src = nir_src_for_ssa(img_coord);
571 tex_all_same->dest_type = nir_type_float;
572 tex_all_same->is_array = false;
573 tex_all_same->coord_components = 2;
574 tex_all_same->texture = nir_deref_var_create(tex_all_same, input_img);
575 tex_all_same->sampler = NULL;
576
577 nir_ssa_dest_init(&tex_all_same->instr, &tex_all_same->dest, 1, 32, "tex");
578 nir_builder_instr_insert(b, &tex_all_same->instr);
579
580 nir_ssa_def *all_same = nir_ine(b, &tex_all_same->dest.ssa, nir_imm_int(b, 0));
581 nir_if *if_stmt = nir_if_create(b->shader);
582 if_stmt->condition = nir_src_for_ssa(all_same);
583 nir_cf_node_insert(b->cursor, &if_stmt->cf_node);
584
585 b->cursor = nir_after_cf_list(&if_stmt->then_list);
586 for (int i = 1; i < samples; i++) {
587 nir_tex_instr *tex_add = nir_tex_instr_create(b->shader, 2);
588 tex_add->sampler_dim = GLSL_SAMPLER_DIM_MS;
589 tex_add->op = nir_texop_txf_ms;
590 tex_add->src[0].src_type = nir_tex_src_coord;
591 tex_add->src[0].src = nir_src_for_ssa(img_coord);
592 tex_add->src[1].src_type = nir_tex_src_ms_index;
593 tex_add->src[1].src = nir_src_for_ssa(nir_imm_int(b, i));
594 tex_add->dest_type = nir_type_float;
595 tex_add->is_array = false;
596 tex_add->coord_components = 2;
597 tex_add->texture = nir_deref_var_create(tex_add, input_img);
598 tex_add->sampler = NULL;
599
600 nir_ssa_dest_init(&tex_add->instr, &tex_add->dest, 4, 32, "tex");
601 nir_builder_instr_insert(b, &tex_add->instr);
602
603 tmp = nir_fadd(b, tmp, &tex_add->dest.ssa);
604 }
605
606 tmp = nir_fdiv(b, tmp, nir_imm_float(b, samples));
607 nir_store_var(b, color, tmp, 0xf);
608 b->cursor = nir_after_cf_list(&if_stmt->else_list);
609 outer_if = if_stmt;
610 }
611 nir_store_var(b, color, &tex->dest.ssa, 0xf);
612
613 if (outer_if)
614 b->cursor = nir_after_cf_node(&outer_if->cf_node);
615
616 if (is_srgb) {
617 nir_ssa_def *newv = nir_load_var(b, color);
618 newv = radv_meta_build_resolve_srgb_conversion(b, newv);
619 nir_store_var(b, color, newv, 0xf);
620 }
621 }