src/amd/vulkan/radv_pipeline_cache.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "util/mesa-sha1.h"
  25 #include "util/debug.h"
  26 #include "radv_private.h"
  27
  28 #include "ac_nir_to_llvm.h"
  29
  30 struct cache_entry {
  31         union {
  32                 unsigned char sha1[20];
  33                 uint32_t sha1_dw[5];
  34         };
  35         uint32_t code_size;
  36         struct ac_shader_variant_info variant_info;
  37         struct ac_shader_config config;
  38         uint32_t rsrc1, rsrc2;
  39         struct radv_shader_variant *variant;
  40         uint32_t code[0];
  41 };
  42
  43 void
  44 radv_pipeline_cache_init(struct radv_pipeline_cache *cache,
  45                          struct radv_device *device)
  46 {
  47         cache->device = device;
  48         pthread_mutex_init(&cache->mutex, NULL);
  49
  50         cache->modified = false;
  51         cache->kernel_count = 0;
  52         cache->total_size = 0;
  53         cache->table_size = 1024;
  54         const size_t byte_size = cache->table_size * sizeof(cache->hash_table[0]);
  55         cache->hash_table = malloc(byte_size);
  56
  57         /* We don't consider allocation failure fatal, we just start with a 0-sized
  58          * cache. */
  59         if (cache->hash_table == NULL ||
  60             (device->debug_flags & RADV_DEBUG_NO_CACHE))
  61                 cache->table_size = 0;
  62         else
  63                 memset(cache->hash_table, 0, byte_size);
  64 }
  65
  66 void
  67 radv_pipeline_cache_finish(struct radv_pipeline_cache *cache)
  68 {
  69         for (unsigned i = 0; i < cache->table_size; ++i)
  70                 if (cache->hash_table[i]) {
  71                         if (cache->hash_table[i]->variant)
  72                                 radv_shader_variant_destroy(cache->device,
  73                                                             cache->hash_table[i]->variant);
  74                         vk_free(&cache->alloc, cache->hash_table[i]);
  75                 }
  76         pthread_mutex_destroy(&cache->mutex);
  77         free(cache->hash_table);
  78 }
  79
  80 static uint32_t
  81 entry_size(struct cache_entry *entry)
  82 {
  83         return sizeof(*entry) + entry->code_size;
  84 }
  85
  86 void
  87 radv_hash_shader(unsigned char *hash, struct radv_shader_module *module,
  88                  const char *entrypoint,
  89                  const VkSpecializationInfo *spec_info,
  90                  const struct radv_pipeline_layout *layout,
  91                  const union ac_shader_variant_key *key,
  92                  uint32_t is_geom_copy_shader)
  93 {
  94         struct mesa_sha1 ctx;
  95
  96         _mesa_sha1_init(&ctx);
  97         if (key)
  98                 _mesa_sha1_update(&ctx, key, sizeof(*key));
  99         _mesa_sha1_update(&ctx, module->sha1, sizeof(module->sha1));
 100         _mesa_sha1_update(&ctx, entrypoint, strlen(entrypoint));
 101         if (layout)
 102                 _mesa_sha1_update(&ctx, layout->sha1, sizeof(layout->sha1));
 103         if (spec_info) {
 104                 _mesa_sha1_update(&ctx, spec_info->pMapEntries,
 105                                   spec_info->mapEntryCount * sizeof spec_info->pMapEntries[0]);
 106                 _mesa_sha1_update(&ctx, spec_info->pData, spec_info->dataSize);
 107         }
 108         _mesa_sha1_update(&ctx, &is_geom_copy_shader, 4);
 109         _mesa_sha1_final(&ctx, hash);
 110 }
 111
 112
 113 static struct cache_entry *
 114 radv_pipeline_cache_search_unlocked(struct radv_pipeline_cache *cache,
 115                                     const unsigned char *sha1)
 116 {
 117         const uint32_t mask = cache->table_size - 1;
 118         const uint32_t start = (*(uint32_t *) sha1);
 119
 120         for (uint32_t i = 0; i < cache->table_size; i++) {
 121                 const uint32_t index = (start + i) & mask;
 122                 struct cache_entry *entry = cache->hash_table[index];
 123
 124                 if (!entry)
 125                         return NULL;
 126
 127                 if (memcmp(entry->sha1, sha1, sizeof(entry->sha1)) == 0) {
 128                         return entry;
 129                 }
 130         }
 131
 132         unreachable("hash table should never be full");
 133 }
 134
 135 static struct cache_entry *
 136 radv_pipeline_cache_search(struct radv_pipeline_cache *cache,
 137                            const unsigned char *sha1)
 138 {
 139         struct cache_entry *entry;
 140
 141         pthread_mutex_lock(&cache->mutex);
 142
 143         entry = radv_pipeline_cache_search_unlocked(cache, sha1);
 144
 145         pthread_mutex_unlock(&cache->mutex);
 146
 147         return entry;
 148 }
 149
 150 struct radv_shader_variant *
 151 radv_create_shader_variant_from_pipeline_cache(struct radv_device *device,
 152                                                struct radv_pipeline_cache *cache,
 153                                                const unsigned char *sha1)
 154 {
 155         struct cache_entry *entry = NULL;
 156
 157         if (cache)
 158                 entry = radv_pipeline_cache_search(cache, sha1);
 159         else
 160                 entry = radv_pipeline_cache_search(device->mem_cache, sha1);
 161
 162         if (!entry)
 163                 return NULL;
 164
 165         if (!entry->variant) {
 166                 struct radv_shader_variant *variant;
 167
 168                 variant = calloc(1, sizeof(struct radv_shader_variant));
 169                 if (!variant)
 170                         return NULL;
 171
 172                 variant->config = entry->config;
 173                 variant->info = entry->variant_info;
 174                 variant->rsrc1 = entry->rsrc1;
 175                 variant->rsrc2 = entry->rsrc2;
 176                 variant->ref_count = 1;
 177
 178                 variant->bo = device->ws->buffer_create(device->ws, entry->code_size, 256,
 179                                                 RADEON_DOMAIN_VRAM, RADEON_FLAG_CPU_ACCESS);
 180
 181                 void *ptr = device->ws->buffer_map(variant->bo);
 182                 memcpy(ptr, entry->code, entry->code_size);
 183                 device->ws->buffer_unmap(variant->bo);
 184
 185                 entry->variant = variant;
 186         }
 187
 188         __sync_fetch_and_add(&entry->variant->ref_count, 1);
 189         return entry->variant;
 190 }
 191
 192
 193 static void
 194 radv_pipeline_cache_set_entry(struct radv_pipeline_cache *cache,
 195                               struct cache_entry *entry)
 196 {
 197         const uint32_t mask = cache->table_size - 1;
 198         const uint32_t start = entry->sha1_dw[0];
 199
 200         /* We'll always be able to insert when we get here. */
 201         assert(cache->kernel_count < cache->table_size / 2);
 202
 203         for (uint32_t i = 0; i < cache->table_size; i++) {
 204                 const uint32_t index = (start + i) & mask;
 205                 if (!cache->hash_table[index]) {
 206                         cache->hash_table[index] = entry;
 207                         break;
 208                 }
 209         }
 210
 211         cache->total_size += entry_size(entry);
 212         cache->kernel_count++;
 213 }
 214
 215
 216 static VkResult
 217 radv_pipeline_cache_grow(struct radv_pipeline_cache *cache)
 218 {
 219         const uint32_t table_size = cache->table_size * 2;
 220         const uint32_t old_table_size = cache->table_size;
 221         const size_t byte_size = table_size * sizeof(cache->hash_table[0]);
 222         struct cache_entry **table;
 223         struct cache_entry **old_table = cache->hash_table;
 224
 225         table = malloc(byte_size);
 226         if (table == NULL)
 227                 return VK_ERROR_OUT_OF_HOST_MEMORY;
 228
 229         cache->hash_table = table;
 230         cache->table_size = table_size;
 231         cache->kernel_count = 0;
 232         cache->total_size = 0;
 233
 234         memset(cache->hash_table, 0, byte_size);
 235         for (uint32_t i = 0; i < old_table_size; i++) {
 236                 struct cache_entry *entry = old_table[i];
 237                 if (!entry)
 238                         continue;
 239
 240                 radv_pipeline_cache_set_entry(cache, entry);
 241         }
 242
 243         free(old_table);
 244
 245         return VK_SUCCESS;
 246 }
 247
 248 static void
 249 radv_pipeline_cache_add_entry(struct radv_pipeline_cache *cache,
 250                               struct cache_entry *entry)
 251 {
 252         if (cache->kernel_count == cache->table_size / 2)
 253                 radv_pipeline_cache_grow(cache);
 254
 255         /* Failing to grow that hash table isn't fatal, but may mean we don't
 256          * have enough space to add this new kernel. Only add it if there's room.
 257          */
 258         if (cache->kernel_count < cache->table_size / 2)
 259                 radv_pipeline_cache_set_entry(cache, entry);
 260 }
 261
 262 struct radv_shader_variant *
 263 radv_pipeline_cache_insert_shader(struct radv_device *device,
 264                                   struct radv_pipeline_cache *cache,
 265                                   const unsigned char *sha1,
 266                                   struct radv_shader_variant *variant,
 267                                   const void *code, unsigned code_size)
 268 {
 269         if (!cache)
 270                 cache = device->mem_cache;
 271
 272         pthread_mutex_lock(&cache->mutex);
 273         struct cache_entry *entry = radv_pipeline_cache_search_unlocked(cache, sha1);
 274         if (entry) {
 275                 if (entry->variant) {
 276                         radv_shader_variant_destroy(cache->device, variant);
 277                         variant = entry->variant;
 278                 } else {
 279                         entry->variant = variant;
 280                 }
 281                 __sync_fetch_and_add(&variant->ref_count, 1);
 282                 pthread_mutex_unlock(&cache->mutex);
 283                 return variant;
 284         }
 285
 286         entry = vk_alloc(&cache->alloc, sizeof(*entry) + code_size, 8,
 287                            VK_SYSTEM_ALLOCATION_SCOPE_CACHE);
 288         if (!entry) {
 289                 pthread_mutex_unlock(&cache->mutex);
 290                 return variant;
 291         }
 292
 293         memcpy(entry->sha1, sha1, 20);
 294         memcpy(entry->code, code, code_size);
 295         entry->config = variant->config;
 296         entry->variant_info = variant->info;
 297         entry->rsrc1 = variant->rsrc1;
 298         entry->rsrc2 = variant->rsrc2;
 299         entry->code_size = code_size;
 300         entry->variant = variant;
 301         __sync_fetch_and_add(&variant->ref_count, 1);
 302
 303         radv_pipeline_cache_add_entry(cache, entry);
 304
 305         cache->modified = true;
 306         pthread_mutex_unlock(&cache->mutex);
 307         return variant;
 308 }
 309
 310 struct cache_header {
 311         uint32_t header_size;
 312         uint32_t header_version;
 313         uint32_t vendor_id;
 314         uint32_t device_id;
 315         uint8_t  uuid[VK_UUID_SIZE];
 316 };
 317
 318 void
 319 radv_pipeline_cache_load(struct radv_pipeline_cache *cache,
 320                          const void *data, size_t size)
 321 {
 322         struct radv_device *device = cache->device;
 323         struct cache_header header;
 324
 325         if (size < sizeof(header))
 326                 return;
 327         memcpy(&header, data, sizeof(header));
 328         if (header.header_size < sizeof(header))
 329                 return;
 330         if (header.header_version != VK_PIPELINE_CACHE_HEADER_VERSION_ONE)
 331                 return;
 332         if (header.vendor_id != 0x1002)
 333                 return;
 334         if (header.device_id != device->physical_device->rad_info.pci_id)
 335                 return;
 336         if (memcmp(header.uuid, device->physical_device->uuid, VK_UUID_SIZE) != 0)
 337                 return;
 338
 339         char *end = (void *) data + size;
 340         char *p = (void *) data + header.header_size;
 341
 342         while (end - p >= sizeof(struct cache_entry)) {
 343                 struct cache_entry *entry = (struct cache_entry*)p;
 344                 struct cache_entry *dest_entry;
 345                 if(end - p < sizeof(*entry) + entry->code_size)
 346                         break;
 347
 348                 dest_entry = vk_alloc(&cache->alloc, sizeof(*entry) + entry->code_size,
 349                                         8, VK_SYSTEM_ALLOCATION_SCOPE_CACHE);
 350                 if (dest_entry) {
 351                         memcpy(dest_entry, entry, sizeof(*entry) + entry->code_size);
 352                         dest_entry->variant = NULL;
 353                         radv_pipeline_cache_add_entry(cache, dest_entry);
 354                 }
 355                 p += sizeof (*entry) + entry->code_size;
 356         }
 357 }
 358
 359 VkResult radv_CreatePipelineCache(
 360         VkDevice                                    _device,
 361         const VkPipelineCacheCreateInfo*            pCreateInfo,
 362         const VkAllocationCallbacks*                pAllocator,
 363         VkPipelineCache*                            pPipelineCache)
 364 {
 365         RADV_FROM_HANDLE(radv_device, device, _device);
 366         struct radv_pipeline_cache *cache;
 367
 368         assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO);
 369         assert(pCreateInfo->flags == 0);
 370
 371         cache = vk_alloc2(&device->alloc, pAllocator,
 372                             sizeof(*cache), 8,
 373                             VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 374         if (cache == NULL)
 375                 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 376
 377         if (pAllocator)
 378                 cache->alloc = *pAllocator;
 379         else
 380                 cache->alloc = device->alloc;
 381
 382         radv_pipeline_cache_init(cache, device);
 383
 384         if (pCreateInfo->initialDataSize > 0) {
 385                 radv_pipeline_cache_load(cache,
 386                                          pCreateInfo->pInitialData,
 387                                          pCreateInfo->initialDataSize);
 388         }
 389
 390         *pPipelineCache = radv_pipeline_cache_to_handle(cache);
 391
 392         return VK_SUCCESS;
 393 }
 394
 395 void radv_DestroyPipelineCache(
 396         VkDevice                                    _device,
 397         VkPipelineCache                             _cache,
 398         const VkAllocationCallbacks*                pAllocator)
 399 {
 400         RADV_FROM_HANDLE(radv_device, device, _device);
 401         RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
 402
 403         if (!cache)
 404                 return;
 405         radv_pipeline_cache_finish(cache);
 406
 407         vk_free2(&device->alloc, pAllocator, cache);
 408 }
 409
 410 VkResult radv_GetPipelineCacheData(
 411         VkDevice                                    _device,
 412         VkPipelineCache                             _cache,
 413         size_t*                                     pDataSize,
 414         void*                                       pData)
 415 {
 416         RADV_FROM_HANDLE(radv_device, device, _device);
 417         RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
 418         struct cache_header *header;
 419         VkResult result = VK_SUCCESS;
 420         const size_t size = sizeof(*header) + cache->total_size;
 421         if (pData == NULL) {
 422                 *pDataSize = size;
 423                 return VK_SUCCESS;
 424         }
 425         if (*pDataSize < sizeof(*header)) {
 426                 *pDataSize = 0;
 427                 return VK_INCOMPLETE;
 428         }
 429         void *p = pData, *end = pData + *pDataSize;
 430         header = p;
 431         header->header_size = sizeof(*header);
 432         header->header_version = VK_PIPELINE_CACHE_HEADER_VERSION_ONE;
 433         header->vendor_id = 0x1002;
 434         header->device_id = device->physical_device->rad_info.pci_id;
 435         memcpy(header->uuid, device->physical_device->uuid, VK_UUID_SIZE);
 436         p += header->header_size;
 437
 438         struct cache_entry *entry;
 439         for (uint32_t i = 0; i < cache->table_size; i++) {
 440                 if (!cache->hash_table[i])
 441                         continue;
 442                 entry = cache->hash_table[i];
 443                 const uint32_t size = entry_size(entry);
 444                 if (end < p + size) {
 445                         result = VK_INCOMPLETE;
 446                         break;
 447                 }
 448
 449                 memcpy(p, entry, size);
 450                 ((struct cache_entry*)p)->variant = NULL;
 451                 p += size;
 452         }
 453         *pDataSize = p - pData;
 454
 455         return result;
 456 }
 457
 458 static void
 459 radv_pipeline_cache_merge(struct radv_pipeline_cache *dst,
 460                           struct radv_pipeline_cache *src)
 461 {
 462         for (uint32_t i = 0; i < src->table_size; i++) {
 463                 struct cache_entry *entry = src->hash_table[i];
 464                 if (!entry || radv_pipeline_cache_search(dst, entry->sha1))
 465                         continue;
 466
 467                 radv_pipeline_cache_add_entry(dst, entry);
 468
 469                 src->hash_table[i] = NULL;
 470         }
 471 }
 472
 473 VkResult radv_MergePipelineCaches(
 474         VkDevice                                    _device,
 475         VkPipelineCache                             destCache,
 476         uint32_t                                    srcCacheCount,
 477         const VkPipelineCache*                      pSrcCaches)
 478 {
 479         RADV_FROM_HANDLE(radv_pipeline_cache, dst, destCache);
 480
 481         for (uint32_t i = 0; i < srcCacheCount; i++) {
 482                 RADV_FROM_HANDLE(radv_pipeline_cache, src, pSrcCaches[i]);
 483
 484                 radv_pipeline_cache_merge(dst, src);
 485         }
 486
 487         return VK_SUCCESS;
 488 }