2 * Copyright © 2015 Intel Corporation
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "util/mesa-sha1.h"
25 #include "util/debug.h"
26 #include "util/u_atomic.h"
27 #include "radv_debug.h"
28 #include "radv_private.h"
29 #include "radv_shader.h"
31 #include "ac_nir_to_llvm.h"
35 unsigned char sha1
[20];
39 struct ac_shader_variant_info variant_info
;
40 struct ac_shader_config config
;
41 uint32_t rsrc1
, rsrc2
;
42 struct radv_shader_variant
*variant
;
47 radv_pipeline_cache_init(struct radv_pipeline_cache
*cache
,
48 struct radv_device
*device
)
50 cache
->device
= device
;
51 pthread_mutex_init(&cache
->mutex
, NULL
);
53 cache
->modified
= false;
54 cache
->kernel_count
= 0;
55 cache
->total_size
= 0;
56 cache
->table_size
= 1024;
57 const size_t byte_size
= cache
->table_size
* sizeof(cache
->hash_table
[0]);
58 cache
->hash_table
= malloc(byte_size
);
60 /* We don't consider allocation failure fatal, we just start with a 0-sized
62 if (cache
->hash_table
== NULL
||
63 (device
->debug_flags
& RADV_DEBUG_NO_CACHE
))
64 cache
->table_size
= 0;
66 memset(cache
->hash_table
, 0, byte_size
);
70 radv_pipeline_cache_finish(struct radv_pipeline_cache
*cache
)
72 for (unsigned i
= 0; i
< cache
->table_size
; ++i
)
73 if (cache
->hash_table
[i
]) {
74 if (cache
->hash_table
[i
]->variant
)
75 radv_shader_variant_destroy(cache
->device
,
76 cache
->hash_table
[i
]->variant
);
77 vk_free(&cache
->alloc
, cache
->hash_table
[i
]);
79 pthread_mutex_destroy(&cache
->mutex
);
80 free(cache
->hash_table
);
84 entry_size(struct cache_entry
*entry
)
86 return sizeof(*entry
) + entry
->code_size
;
90 radv_hash_shader(unsigned char *hash
, struct radv_shader_module
*module
,
91 const char *entrypoint
,
92 const VkSpecializationInfo
*spec_info
,
93 const struct radv_pipeline_layout
*layout
,
94 const struct ac_shader_variant_key
*key
,
95 uint32_t is_geom_copy_shader
)
99 _mesa_sha1_init(&ctx
);
101 _mesa_sha1_update(&ctx
, key
, sizeof(*key
));
102 _mesa_sha1_update(&ctx
, module
->sha1
, sizeof(module
->sha1
));
103 _mesa_sha1_update(&ctx
, entrypoint
, strlen(entrypoint
));
105 _mesa_sha1_update(&ctx
, layout
->sha1
, sizeof(layout
->sha1
));
107 _mesa_sha1_update(&ctx
, spec_info
->pMapEntries
,
108 spec_info
->mapEntryCount
* sizeof spec_info
->pMapEntries
[0]);
109 _mesa_sha1_update(&ctx
, spec_info
->pData
, spec_info
->dataSize
);
111 _mesa_sha1_update(&ctx
, &is_geom_copy_shader
, 4);
112 _mesa_sha1_final(&ctx
, hash
);
116 static struct cache_entry
*
117 radv_pipeline_cache_search_unlocked(struct radv_pipeline_cache
*cache
,
118 const unsigned char *sha1
)
120 const uint32_t mask
= cache
->table_size
- 1;
121 const uint32_t start
= (*(uint32_t *) sha1
);
123 if (cache
->table_size
== 0)
126 for (uint32_t i
= 0; i
< cache
->table_size
; i
++) {
127 const uint32_t index
= (start
+ i
) & mask
;
128 struct cache_entry
*entry
= cache
->hash_table
[index
];
133 if (memcmp(entry
->sha1
, sha1
, sizeof(entry
->sha1
)) == 0) {
138 unreachable("hash table should never be full");
141 static struct cache_entry
*
142 radv_pipeline_cache_search(struct radv_pipeline_cache
*cache
,
143 const unsigned char *sha1
)
145 struct cache_entry
*entry
;
147 pthread_mutex_lock(&cache
->mutex
);
149 entry
= radv_pipeline_cache_search_unlocked(cache
, sha1
);
151 pthread_mutex_unlock(&cache
->mutex
);
156 struct radv_shader_variant
*
157 radv_create_shader_variant_from_pipeline_cache(struct radv_device
*device
,
158 struct radv_pipeline_cache
*cache
,
159 const unsigned char *sha1
)
161 struct cache_entry
*entry
= NULL
;
164 entry
= radv_pipeline_cache_search(cache
, sha1
);
169 if (!entry
->variant
) {
170 struct radv_shader_variant
*variant
;
172 variant
= calloc(1, sizeof(struct radv_shader_variant
));
176 variant
->code_size
= entry
->code_size
;
177 variant
->config
= entry
->config
;
178 variant
->info
= entry
->variant_info
;
179 variant
->rsrc1
= entry
->rsrc1
;
180 variant
->rsrc2
= entry
->rsrc2
;
181 variant
->code_size
= entry
->code_size
;
182 variant
->ref_count
= 1;
184 void *ptr
= radv_alloc_shader_memory(device
, variant
);
185 memcpy(ptr
, entry
->code
, entry
->code_size
);
187 entry
->variant
= variant
;
190 p_atomic_inc(&entry
->variant
->ref_count
);
191 return entry
->variant
;
196 radv_pipeline_cache_set_entry(struct radv_pipeline_cache
*cache
,
197 struct cache_entry
*entry
)
199 const uint32_t mask
= cache
->table_size
- 1;
200 const uint32_t start
= entry
->sha1_dw
[0];
202 /* We'll always be able to insert when we get here. */
203 assert(cache
->kernel_count
< cache
->table_size
/ 2);
205 for (uint32_t i
= 0; i
< cache
->table_size
; i
++) {
206 const uint32_t index
= (start
+ i
) & mask
;
207 if (!cache
->hash_table
[index
]) {
208 cache
->hash_table
[index
] = entry
;
213 cache
->total_size
+= entry_size(entry
);
214 cache
->kernel_count
++;
219 radv_pipeline_cache_grow(struct radv_pipeline_cache
*cache
)
221 const uint32_t table_size
= cache
->table_size
* 2;
222 const uint32_t old_table_size
= cache
->table_size
;
223 const size_t byte_size
= table_size
* sizeof(cache
->hash_table
[0]);
224 struct cache_entry
**table
;
225 struct cache_entry
**old_table
= cache
->hash_table
;
227 table
= malloc(byte_size
);
229 return VK_ERROR_OUT_OF_HOST_MEMORY
;
231 cache
->hash_table
= table
;
232 cache
->table_size
= table_size
;
233 cache
->kernel_count
= 0;
234 cache
->total_size
= 0;
236 memset(cache
->hash_table
, 0, byte_size
);
237 for (uint32_t i
= 0; i
< old_table_size
; i
++) {
238 struct cache_entry
*entry
= old_table
[i
];
242 radv_pipeline_cache_set_entry(cache
, entry
);
251 radv_pipeline_cache_add_entry(struct radv_pipeline_cache
*cache
,
252 struct cache_entry
*entry
)
254 if (cache
->kernel_count
== cache
->table_size
/ 2)
255 radv_pipeline_cache_grow(cache
);
257 /* Failing to grow that hash table isn't fatal, but may mean we don't
258 * have enough space to add this new kernel. Only add it if there's room.
260 if (cache
->kernel_count
< cache
->table_size
/ 2)
261 radv_pipeline_cache_set_entry(cache
, entry
);
264 struct radv_shader_variant
*
265 radv_pipeline_cache_insert_shader(struct radv_pipeline_cache
*cache
,
266 const unsigned char *sha1
,
267 struct radv_shader_variant
*variant
,
268 const void *code
, unsigned code_size
)
273 pthread_mutex_lock(&cache
->mutex
);
274 struct cache_entry
*entry
= radv_pipeline_cache_search_unlocked(cache
, sha1
);
276 if (entry
->variant
) {
277 radv_shader_variant_destroy(cache
->device
, variant
);
278 variant
= entry
->variant
;
280 entry
->variant
= variant
;
282 p_atomic_inc(&variant
->ref_count
);
283 pthread_mutex_unlock(&cache
->mutex
);
287 entry
= vk_alloc(&cache
->alloc
, sizeof(*entry
) + code_size
, 8,
288 VK_SYSTEM_ALLOCATION_SCOPE_CACHE
);
290 pthread_mutex_unlock(&cache
->mutex
);
294 memcpy(entry
->sha1
, sha1
, 20);
295 memcpy(entry
->code
, code
, code_size
);
296 entry
->config
= variant
->config
;
297 entry
->variant_info
= variant
->info
;
298 entry
->rsrc1
= variant
->rsrc1
;
299 entry
->rsrc2
= variant
->rsrc2
;
300 entry
->code_size
= code_size
;
301 entry
->variant
= variant
;
302 p_atomic_inc(&variant
->ref_count
);
304 radv_pipeline_cache_add_entry(cache
, entry
);
306 cache
->modified
= true;
307 pthread_mutex_unlock(&cache
->mutex
);
311 struct cache_header
{
312 uint32_t header_size
;
313 uint32_t header_version
;
316 uint8_t uuid
[VK_UUID_SIZE
];
320 radv_pipeline_cache_load(struct radv_pipeline_cache
*cache
,
321 const void *data
, size_t size
)
323 struct radv_device
*device
= cache
->device
;
324 struct cache_header header
;
326 if (size
< sizeof(header
))
328 memcpy(&header
, data
, sizeof(header
));
329 if (header
.header_size
< sizeof(header
))
331 if (header
.header_version
!= VK_PIPELINE_CACHE_HEADER_VERSION_ONE
)
333 if (header
.vendor_id
!= ATI_VENDOR_ID
)
335 if (header
.device_id
!= device
->physical_device
->rad_info
.pci_id
)
337 if (memcmp(header
.uuid
, device
->physical_device
->cache_uuid
, VK_UUID_SIZE
) != 0)
340 char *end
= (void *) data
+ size
;
341 char *p
= (void *) data
+ header
.header_size
;
343 while (end
- p
>= sizeof(struct cache_entry
)) {
344 struct cache_entry
*entry
= (struct cache_entry
*)p
;
345 struct cache_entry
*dest_entry
;
346 if(end
- p
< sizeof(*entry
) + entry
->code_size
)
349 dest_entry
= vk_alloc(&cache
->alloc
, sizeof(*entry
) + entry
->code_size
,
350 8, VK_SYSTEM_ALLOCATION_SCOPE_CACHE
);
352 memcpy(dest_entry
, entry
, sizeof(*entry
) + entry
->code_size
);
353 dest_entry
->variant
= NULL
;
354 radv_pipeline_cache_add_entry(cache
, dest_entry
);
356 p
+= sizeof (*entry
) + entry
->code_size
;
360 VkResult
radv_CreatePipelineCache(
362 const VkPipelineCacheCreateInfo
* pCreateInfo
,
363 const VkAllocationCallbacks
* pAllocator
,
364 VkPipelineCache
* pPipelineCache
)
366 RADV_FROM_HANDLE(radv_device
, device
, _device
);
367 struct radv_pipeline_cache
*cache
;
369 assert(pCreateInfo
->sType
== VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO
);
370 assert(pCreateInfo
->flags
== 0);
372 cache
= vk_alloc2(&device
->alloc
, pAllocator
,
374 VK_SYSTEM_ALLOCATION_SCOPE_OBJECT
);
376 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY
);
379 cache
->alloc
= *pAllocator
;
381 cache
->alloc
= device
->alloc
;
383 radv_pipeline_cache_init(cache
, device
);
385 if (pCreateInfo
->initialDataSize
> 0) {
386 radv_pipeline_cache_load(cache
,
387 pCreateInfo
->pInitialData
,
388 pCreateInfo
->initialDataSize
);
391 *pPipelineCache
= radv_pipeline_cache_to_handle(cache
);
396 void radv_DestroyPipelineCache(
398 VkPipelineCache _cache
,
399 const VkAllocationCallbacks
* pAllocator
)
401 RADV_FROM_HANDLE(radv_device
, device
, _device
);
402 RADV_FROM_HANDLE(radv_pipeline_cache
, cache
, _cache
);
406 radv_pipeline_cache_finish(cache
);
408 vk_free2(&device
->alloc
, pAllocator
, cache
);
411 VkResult
radv_GetPipelineCacheData(
413 VkPipelineCache _cache
,
417 RADV_FROM_HANDLE(radv_device
, device
, _device
);
418 RADV_FROM_HANDLE(radv_pipeline_cache
, cache
, _cache
);
419 struct cache_header
*header
;
420 VkResult result
= VK_SUCCESS
;
421 const size_t size
= sizeof(*header
) + cache
->total_size
;
426 if (*pDataSize
< sizeof(*header
)) {
428 return VK_INCOMPLETE
;
430 void *p
= pData
, *end
= pData
+ *pDataSize
;
432 header
->header_size
= sizeof(*header
);
433 header
->header_version
= VK_PIPELINE_CACHE_HEADER_VERSION_ONE
;
434 header
->vendor_id
= ATI_VENDOR_ID
;
435 header
->device_id
= device
->physical_device
->rad_info
.pci_id
;
436 memcpy(header
->uuid
, device
->physical_device
->cache_uuid
, VK_UUID_SIZE
);
437 p
+= header
->header_size
;
439 struct cache_entry
*entry
;
440 for (uint32_t i
= 0; i
< cache
->table_size
; i
++) {
441 if (!cache
->hash_table
[i
])
443 entry
= cache
->hash_table
[i
];
444 const uint32_t size
= entry_size(entry
);
445 if (end
< p
+ size
) {
446 result
= VK_INCOMPLETE
;
450 memcpy(p
, entry
, size
);
451 ((struct cache_entry
*)p
)->variant
= NULL
;
454 *pDataSize
= p
- pData
;
460 radv_pipeline_cache_merge(struct radv_pipeline_cache
*dst
,
461 struct radv_pipeline_cache
*src
)
463 for (uint32_t i
= 0; i
< src
->table_size
; i
++) {
464 struct cache_entry
*entry
= src
->hash_table
[i
];
465 if (!entry
|| radv_pipeline_cache_search(dst
, entry
->sha1
))
468 radv_pipeline_cache_add_entry(dst
, entry
);
470 src
->hash_table
[i
] = NULL
;
474 VkResult
radv_MergePipelineCaches(
476 VkPipelineCache destCache
,
477 uint32_t srcCacheCount
,
478 const VkPipelineCache
* pSrcCaches
)
480 RADV_FROM_HANDLE(radv_pipeline_cache
, dst
, destCache
);
482 for (uint32_t i
= 0; i
< srcCacheCount
; i
++) {
483 RADV_FROM_HANDLE(radv_pipeline_cache
, src
, pSrcCaches
[i
]);
485 radv_pipeline_cache_merge(dst
, src
);