src/amd/vulkan/radv_pipeline_cache.c

   1 /*
   2  * Copyright © 2015 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "util/mesa-sha1.h"
  25 #include "util/debug.h"
  26 #include "util/u_atomic.h"
  27 #include "radv_debug.h"
  28 #include "radv_private.h"
  29 #include "radv_shader.h"
  30
  31 #include "ac_nir_to_llvm.h"
  32
  33 struct cache_entry {
  34         union {
  35                 unsigned char sha1[20];
  36                 uint32_t sha1_dw[5];
  37         };
  38         uint32_t code_size;
  39         struct ac_shader_variant_info variant_info;
  40         struct ac_shader_config config;
  41         uint32_t rsrc1, rsrc2;
  42         struct radv_shader_variant *variant;
  43         uint32_t code[0];
  44 };
  45
  46 void
  47 radv_pipeline_cache_init(struct radv_pipeline_cache *cache,
  48                          struct radv_device *device)
  49 {
  50         cache->device = device;
  51         pthread_mutex_init(&cache->mutex, NULL);
  52
  53         cache->modified = false;
  54         cache->kernel_count = 0;
  55         cache->total_size = 0;
  56         cache->table_size = 1024;
  57         const size_t byte_size = cache->table_size * sizeof(cache->hash_table[0]);
  58         cache->hash_table = malloc(byte_size);
  59
  60         /* We don't consider allocation failure fatal, we just start with a 0-sized
  61          * cache. */
  62         if (cache->hash_table == NULL ||
  63             (device->debug_flags & RADV_DEBUG_NO_CACHE))
  64                 cache->table_size = 0;
  65         else
  66                 memset(cache->hash_table, 0, byte_size);
  67 }
  68
  69 void
  70 radv_pipeline_cache_finish(struct radv_pipeline_cache *cache)
  71 {
  72         for (unsigned i = 0; i < cache->table_size; ++i)
  73                 if (cache->hash_table[i]) {
  74                         if (cache->hash_table[i]->variant)
  75                                 radv_shader_variant_destroy(cache->device,
  76                                                             cache->hash_table[i]->variant);
  77                         vk_free(&cache->alloc, cache->hash_table[i]);
  78                 }
  79         pthread_mutex_destroy(&cache->mutex);
  80         free(cache->hash_table);
  81 }
  82
  83 static uint32_t
  84 entry_size(struct cache_entry *entry)
  85 {
  86         return sizeof(*entry) + entry->code_size;
  87 }
  88
  89 void
  90 radv_hash_shader(unsigned char *hash, struct radv_shader_module *module,
  91                  const char *entrypoint,
  92                  const VkSpecializationInfo *spec_info,
  93                  const struct radv_pipeline_layout *layout,
  94                  const struct ac_shader_variant_key *key,
  95                  uint32_t is_geom_copy_shader)
  96 {
  97         struct mesa_sha1 ctx;
  98
  99         _mesa_sha1_init(&ctx);
 100         if (key)
 101                 _mesa_sha1_update(&ctx, key, sizeof(*key));
 102         _mesa_sha1_update(&ctx, module->sha1, sizeof(module->sha1));
 103         _mesa_sha1_update(&ctx, entrypoint, strlen(entrypoint));
 104         if (layout)
 105                 _mesa_sha1_update(&ctx, layout->sha1, sizeof(layout->sha1));
 106         if (spec_info) {
 107                 _mesa_sha1_update(&ctx, spec_info->pMapEntries,
 108                                   spec_info->mapEntryCount * sizeof spec_info->pMapEntries[0]);
 109                 _mesa_sha1_update(&ctx, spec_info->pData, spec_info->dataSize);
 110         }
 111         _mesa_sha1_update(&ctx, &is_geom_copy_shader, 4);
 112         _mesa_sha1_final(&ctx, hash);
 113 }
 114
 115
 116 static struct cache_entry *
 117 radv_pipeline_cache_search_unlocked(struct radv_pipeline_cache *cache,
 118                                     const unsigned char *sha1)
 119 {
 120         const uint32_t mask = cache->table_size - 1;
 121         const uint32_t start = (*(uint32_t *) sha1);
 122
 123         if (cache->table_size == 0)
 124                 return NULL;
 125
 126         for (uint32_t i = 0; i < cache->table_size; i++) {
 127                 const uint32_t index = (start + i) & mask;
 128                 struct cache_entry *entry = cache->hash_table[index];
 129
 130                 if (!entry)
 131                         return NULL;
 132
 133                 if (memcmp(entry->sha1, sha1, sizeof(entry->sha1)) == 0) {
 134                         return entry;
 135                 }
 136         }
 137
 138         unreachable("hash table should never be full");
 139 }
 140
 141 static struct cache_entry *
 142 radv_pipeline_cache_search(struct radv_pipeline_cache *cache,
 143                            const unsigned char *sha1)
 144 {
 145         struct cache_entry *entry;
 146
 147         pthread_mutex_lock(&cache->mutex);
 148
 149         entry = radv_pipeline_cache_search_unlocked(cache, sha1);
 150
 151         pthread_mutex_unlock(&cache->mutex);
 152
 153         return entry;
 154 }
 155
 156 struct radv_shader_variant *
 157 radv_create_shader_variant_from_pipeline_cache(struct radv_device *device,
 158                                                struct radv_pipeline_cache *cache,
 159                                                const unsigned char *sha1)
 160 {
 161         struct cache_entry *entry = NULL;
 162
 163         if (cache)
 164                 entry = radv_pipeline_cache_search(cache, sha1);
 165
 166         if (!entry)
 167                 return NULL;
 168
 169         if (!entry->variant) {
 170                 struct radv_shader_variant *variant;
 171
 172                 variant = calloc(1, sizeof(struct radv_shader_variant));
 173                 if (!variant)
 174                         return NULL;
 175
 176                 variant->code_size = entry->code_size;
 177                 variant->config = entry->config;
 178                 variant->info = entry->variant_info;
 179                 variant->rsrc1 = entry->rsrc1;
 180                 variant->rsrc2 = entry->rsrc2;
 181                 variant->code_size = entry->code_size;
 182                 variant->ref_count = 1;
 183
 184                 void *ptr = radv_alloc_shader_memory(device, variant);
 185                 memcpy(ptr, entry->code, entry->code_size);
 186
 187                 entry->variant = variant;
 188         }
 189
 190         p_atomic_inc(&entry->variant->ref_count);
 191         return entry->variant;
 192 }
 193
 194
 195 static void
 196 radv_pipeline_cache_set_entry(struct radv_pipeline_cache *cache,
 197                               struct cache_entry *entry)
 198 {
 199         const uint32_t mask = cache->table_size - 1;
 200         const uint32_t start = entry->sha1_dw[0];
 201
 202         /* We'll always be able to insert when we get here. */
 203         assert(cache->kernel_count < cache->table_size / 2);
 204
 205         for (uint32_t i = 0; i < cache->table_size; i++) {
 206                 const uint32_t index = (start + i) & mask;
 207                 if (!cache->hash_table[index]) {
 208                         cache->hash_table[index] = entry;
 209                         break;
 210                 }
 211         }
 212
 213         cache->total_size += entry_size(entry);
 214         cache->kernel_count++;
 215 }
 216
 217
 218 static VkResult
 219 radv_pipeline_cache_grow(struct radv_pipeline_cache *cache)
 220 {
 221         const uint32_t table_size = cache->table_size * 2;
 222         const uint32_t old_table_size = cache->table_size;
 223         const size_t byte_size = table_size * sizeof(cache->hash_table[0]);
 224         struct cache_entry **table;
 225         struct cache_entry **old_table = cache->hash_table;
 226
 227         table = malloc(byte_size);
 228         if (table == NULL)
 229                 return VK_ERROR_OUT_OF_HOST_MEMORY;
 230
 231         cache->hash_table = table;
 232         cache->table_size = table_size;
 233         cache->kernel_count = 0;
 234         cache->total_size = 0;
 235
 236         memset(cache->hash_table, 0, byte_size);
 237         for (uint32_t i = 0; i < old_table_size; i++) {
 238                 struct cache_entry *entry = old_table[i];
 239                 if (!entry)
 240                         continue;
 241
 242                 radv_pipeline_cache_set_entry(cache, entry);
 243         }
 244
 245         free(old_table);
 246
 247         return VK_SUCCESS;
 248 }
 249
 250 static void
 251 radv_pipeline_cache_add_entry(struct radv_pipeline_cache *cache,
 252                               struct cache_entry *entry)
 253 {
 254         if (cache->kernel_count == cache->table_size / 2)
 255                 radv_pipeline_cache_grow(cache);
 256
 257         /* Failing to grow that hash table isn't fatal, but may mean we don't
 258          * have enough space to add this new kernel. Only add it if there's room.
 259          */
 260         if (cache->kernel_count < cache->table_size / 2)
 261                 radv_pipeline_cache_set_entry(cache, entry);
 262 }
 263
 264 struct radv_shader_variant *
 265 radv_pipeline_cache_insert_shader(struct radv_pipeline_cache *cache,
 266                                   const unsigned char *sha1,
 267                                   struct radv_shader_variant *variant,
 268                                   const void *code, unsigned code_size)
 269 {
 270         if (!cache)
 271                 return variant;
 272
 273         pthread_mutex_lock(&cache->mutex);
 274         struct cache_entry *entry = radv_pipeline_cache_search_unlocked(cache, sha1);
 275         if (entry) {
 276                 if (entry->variant) {
 277                         radv_shader_variant_destroy(cache->device, variant);
 278                         variant = entry->variant;
 279                 } else {
 280                         entry->variant = variant;
 281                 }
 282                 p_atomic_inc(&variant->ref_count);
 283                 pthread_mutex_unlock(&cache->mutex);
 284                 return variant;
 285         }
 286
 287         entry = vk_alloc(&cache->alloc, sizeof(*entry) + code_size, 8,
 288                            VK_SYSTEM_ALLOCATION_SCOPE_CACHE);
 289         if (!entry) {
 290                 pthread_mutex_unlock(&cache->mutex);
 291                 return variant;
 292         }
 293
 294         memcpy(entry->sha1, sha1, 20);
 295         memcpy(entry->code, code, code_size);
 296         entry->config = variant->config;
 297         entry->variant_info = variant->info;
 298         entry->rsrc1 = variant->rsrc1;
 299         entry->rsrc2 = variant->rsrc2;
 300         entry->code_size = code_size;
 301         entry->variant = variant;
 302         p_atomic_inc(&variant->ref_count);
 303
 304         radv_pipeline_cache_add_entry(cache, entry);
 305
 306         cache->modified = true;
 307         pthread_mutex_unlock(&cache->mutex);
 308         return variant;
 309 }
 310
 311 struct cache_header {
 312         uint32_t header_size;
 313         uint32_t header_version;
 314         uint32_t vendor_id;
 315         uint32_t device_id;
 316         uint8_t  uuid[VK_UUID_SIZE];
 317 };
 318
 319 void
 320 radv_pipeline_cache_load(struct radv_pipeline_cache *cache,
 321                          const void *data, size_t size)
 322 {
 323         struct radv_device *device = cache->device;
 324         struct cache_header header;
 325
 326         if (size < sizeof(header))
 327                 return;
 328         memcpy(&header, data, sizeof(header));
 329         if (header.header_size < sizeof(header))
 330                 return;
 331         if (header.header_version != VK_PIPELINE_CACHE_HEADER_VERSION_ONE)
 332                 return;
 333         if (header.vendor_id != 0x1002)
 334                 return;
 335         if (header.device_id != device->physical_device->rad_info.pci_id)
 336                 return;
 337         if (memcmp(header.uuid, device->physical_device->cache_uuid, VK_UUID_SIZE) != 0)
 338                 return;
 339
 340         char *end = (void *) data + size;
 341         char *p = (void *) data + header.header_size;
 342
 343         while (end - p >= sizeof(struct cache_entry)) {
 344                 struct cache_entry *entry = (struct cache_entry*)p;
 345                 struct cache_entry *dest_entry;
 346                 if(end - p < sizeof(*entry) + entry->code_size)
 347                         break;
 348
 349                 dest_entry = vk_alloc(&cache->alloc, sizeof(*entry) + entry->code_size,
 350                                         8, VK_SYSTEM_ALLOCATION_SCOPE_CACHE);
 351                 if (dest_entry) {
 352                         memcpy(dest_entry, entry, sizeof(*entry) + entry->code_size);
 353                         dest_entry->variant = NULL;
 354                         radv_pipeline_cache_add_entry(cache, dest_entry);
 355                 }
 356                 p += sizeof (*entry) + entry->code_size;
 357         }
 358 }
 359
 360 VkResult radv_CreatePipelineCache(
 361         VkDevice                                    _device,
 362         const VkPipelineCacheCreateInfo*            pCreateInfo,
 363         const VkAllocationCallbacks*                pAllocator,
 364         VkPipelineCache*                            pPipelineCache)
 365 {
 366         RADV_FROM_HANDLE(radv_device, device, _device);
 367         struct radv_pipeline_cache *cache;
 368
 369         assert(pCreateInfo->sType == VK_STRUCTURE_TYPE_PIPELINE_CACHE_CREATE_INFO);
 370         assert(pCreateInfo->flags == 0);
 371
 372         cache = vk_alloc2(&device->alloc, pAllocator,
 373                             sizeof(*cache), 8,
 374                             VK_SYSTEM_ALLOCATION_SCOPE_OBJECT);
 375         if (cache == NULL)
 376                 return vk_error(VK_ERROR_OUT_OF_HOST_MEMORY);
 377
 378         if (pAllocator)
 379                 cache->alloc = *pAllocator;
 380         else
 381                 cache->alloc = device->alloc;
 382
 383         radv_pipeline_cache_init(cache, device);
 384
 385         if (pCreateInfo->initialDataSize > 0) {
 386                 radv_pipeline_cache_load(cache,
 387                                          pCreateInfo->pInitialData,
 388                                          pCreateInfo->initialDataSize);
 389         }
 390
 391         *pPipelineCache = radv_pipeline_cache_to_handle(cache);
 392
 393         return VK_SUCCESS;
 394 }
 395
 396 void radv_DestroyPipelineCache(
 397         VkDevice                                    _device,
 398         VkPipelineCache                             _cache,
 399         const VkAllocationCallbacks*                pAllocator)
 400 {
 401         RADV_FROM_HANDLE(radv_device, device, _device);
 402         RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
 403
 404         if (!cache)
 405                 return;
 406         radv_pipeline_cache_finish(cache);
 407
 408         vk_free2(&device->alloc, pAllocator, cache);
 409 }
 410
 411 VkResult radv_GetPipelineCacheData(
 412         VkDevice                                    _device,
 413         VkPipelineCache                             _cache,
 414         size_t*                                     pDataSize,
 415         void*                                       pData)
 416 {
 417         RADV_FROM_HANDLE(radv_device, device, _device);
 418         RADV_FROM_HANDLE(radv_pipeline_cache, cache, _cache);
 419         struct cache_header *header;
 420         VkResult result = VK_SUCCESS;
 421         const size_t size = sizeof(*header) + cache->total_size;
 422         if (pData == NULL) {
 423                 *pDataSize = size;
 424                 return VK_SUCCESS;
 425         }
 426         if (*pDataSize < sizeof(*header)) {
 427                 *pDataSize = 0;
 428                 return VK_INCOMPLETE;
 429         }
 430         void *p = pData, *end = pData + *pDataSize;
 431         header = p;
 432         header->header_size = sizeof(*header);
 433         header->header_version = VK_PIPELINE_CACHE_HEADER_VERSION_ONE;
 434         header->vendor_id = 0x1002;
 435         header->device_id = device->physical_device->rad_info.pci_id;
 436         memcpy(header->uuid, device->physical_device->cache_uuid, VK_UUID_SIZE);
 437         p += header->header_size;
 438
 439         struct cache_entry *entry;
 440         for (uint32_t i = 0; i < cache->table_size; i++) {
 441                 if (!cache->hash_table[i])
 442                         continue;
 443                 entry = cache->hash_table[i];
 444                 const uint32_t size = entry_size(entry);
 445                 if (end < p + size) {
 446                         result = VK_INCOMPLETE;
 447                         break;
 448                 }
 449
 450                 memcpy(p, entry, size);
 451                 ((struct cache_entry*)p)->variant = NULL;
 452                 p += size;
 453         }
 454         *pDataSize = p - pData;
 455
 456         return result;
 457 }
 458
 459 static void
 460 radv_pipeline_cache_merge(struct radv_pipeline_cache *dst,
 461                           struct radv_pipeline_cache *src)
 462 {
 463         for (uint32_t i = 0; i < src->table_size; i++) {
 464                 struct cache_entry *entry = src->hash_table[i];
 465                 if (!entry || radv_pipeline_cache_search(dst, entry->sha1))
 466                         continue;
 467
 468                 radv_pipeline_cache_add_entry(dst, entry);
 469
 470                 src->hash_table[i] = NULL;
 471         }
 472 }
 473
 474 VkResult radv_MergePipelineCaches(
 475         VkDevice                                    _device,
 476         VkPipelineCache                             destCache,
 477         uint32_t                                    srcCacheCount,
 478         const VkPipelineCache*                      pSrcCaches)
 479 {
 480         RADV_FROM_HANDLE(radv_pipeline_cache, dst, destCache);
 481
 482         for (uint32_t i = 0; i < srcCacheCount; i++) {
 483                 RADV_FROM_HANDLE(radv_pipeline_cache, src, pSrcCaches[i]);
 484
 485                 radv_pipeline_cache_merge(dst, src);
 486         }
 487
 488         return VK_SUCCESS;
 489 }