src/broadcom/compiler/v3d_nir_lower_io.c

   1 /*
   2  * Copyright © 2015 Broadcom
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  */
  23
  24 #include "compiler/v3d_compiler.h"
  25 #include "compiler/nir/nir_builder.h"
  26
  27 /**
  28  * Walks the NIR generated by TGSI-to-NIR or GLSL-to-NIR to lower its io
  29  * intrinsics into something amenable to the V3D architecture.
  30  *
  31  * Most of the work is turning the VS's store_output intrinsics from working
  32  * on a base representing the gallium-level vec4 driver_location to an offset
  33  * within the VPM, and emitting the header that's read by the fixed function
  34  * hardware between the VS and FS.
  35  *
  36  * We also adjust the offsets on uniform loads to be in bytes, since that's
  37  * what we need for indirect addressing with general TMU access.
  38  */
  39
  40 struct v3d_nir_lower_io_state {
  41         int pos_vpm_offset;
  42         int vp_vpm_offset;
  43         int zs_vpm_offset;
  44         int rcp_wc_vpm_offset;
  45         int psiz_vpm_offset;
  46         int varyings_vpm_offset;
  47
  48         BITSET_WORD varyings_stored[BITSET_WORDS(V3D_MAX_ANY_STAGE_INPUTS)];
  49
  50         nir_ssa_def *pos[4];
  51 };
  52
  53 static void
  54 v3d_nir_store_output(nir_builder *b, int base, nir_ssa_def *chan)
  55 {
  56         nir_intrinsic_instr *intr =
  57                 nir_intrinsic_instr_create(b->shader, nir_intrinsic_store_output);
  58         nir_ssa_dest_init(&intr->instr, &intr->dest,
  59                           1, intr->dest.ssa.bit_size, NULL);
  60         intr->num_components = 1;
  61
  62         intr->src[0] = nir_src_for_ssa(chan);
  63         intr->src[1] = nir_src_for_ssa(nir_imm_int(b, 0));
  64
  65         nir_intrinsic_set_base(intr, base);
  66         nir_intrinsic_set_write_mask(intr, 0x1);
  67         nir_intrinsic_set_component(intr, 0);
  68
  69         nir_builder_instr_insert(b, &intr->instr);
  70 }
  71
  72 /* Convert the uniform offset to bytes.  If it happens to be a constant,
  73  * constant-folding will clean up the shift for us.
  74  */
  75 static void
  76 v3d_nir_lower_uniform(struct v3d_compile *c, nir_builder *b,
  77                       nir_intrinsic_instr *intr)
  78 {
  79         b->cursor = nir_before_instr(&intr->instr);
  80
  81         nir_intrinsic_set_base(intr, nir_intrinsic_base(intr) * 16);
  82
  83         nir_instr_rewrite_src(&intr->instr,
  84                               &intr->src[0],
  85                               nir_src_for_ssa(nir_ishl(b, intr->src[0].ssa,
  86                                                        nir_imm_int(b, 4))));
  87 }
  88
  89 static int
  90 v3d_varying_slot_vpm_offset(struct v3d_compile *c, nir_variable *var, int chan)
  91 {
  92         int component = var->data.location_frac + chan;
  93
  94         for (int i = 0; i < c->vs_key->num_used_outputs; i++) {
  95                 struct v3d_varying_slot slot = c->vs_key->used_outputs[i];
  96
  97                 if (v3d_slot_get_slot(slot) == var->data.location &&
  98                     v3d_slot_get_component(slot) == component) {
  99                         return i;
 100                 }
 101         }
 102
 103         return -1;
 104 }
 105
 106 /* Lowers a store_output(gallium driver location) to a series of store_outputs
 107  * with a driver_location equal to the offset in the VPM.
 108  */
 109 static void
 110 v3d_nir_lower_vpm_output(struct v3d_compile *c, nir_builder *b,
 111                          nir_intrinsic_instr *intr,
 112                          struct v3d_nir_lower_io_state *state)
 113 {
 114         b->cursor = nir_before_instr(&intr->instr);
 115
 116         int start_comp = nir_intrinsic_component(intr);
 117         nir_ssa_def *src = nir_ssa_for_src(b, intr->src[0],
 118                                            intr->num_components);
 119
 120         nir_variable *var = NULL;
 121         nir_foreach_variable(scan_var, &c->s->outputs) {
 122                 if (scan_var->data.driver_location != nir_intrinsic_base(intr) ||
 123                     start_comp < scan_var->data.location_frac ||
 124                     start_comp >= scan_var->data.location_frac +
 125                     glsl_get_components(scan_var->type)) {
 126                         continue;
 127                 }
 128                 var = scan_var;
 129         }
 130         assert(var);
 131
 132         /* Save off the components of the position for the setup of VPM inputs
 133          * read by fixed function HW.
 134          */
 135         if (var->data.location == VARYING_SLOT_POS) {
 136                 for (int i = 0; i < intr->num_components; i++) {
 137                         state->pos[start_comp + i] = nir_channel(b, src, i);
 138                 }
 139         }
 140
 141         /* Just psiz to the position in the FF header right now. */
 142         if (var->data.location == VARYING_SLOT_PSIZ &&
 143             state->psiz_vpm_offset != -1) {
 144                 v3d_nir_store_output(b, state->psiz_vpm_offset, src);
 145         }
 146
 147         /* Scalarize outputs if it hasn't happened already, since we want to
 148          * schedule each VPM write individually.  We can skip any outut
 149          * components not read by the FS.
 150          */
 151         for (int i = 0; i < intr->num_components; i++) {
 152                 int vpm_offset =
 153                         v3d_varying_slot_vpm_offset(c, var,
 154                                                     i +
 155                                                     start_comp -
 156                                                     var->data.location_frac);
 157
 158                 if (vpm_offset == -1)
 159                         continue;
 160
 161                 BITSET_SET(state->varyings_stored, vpm_offset);
 162
 163                 v3d_nir_store_output(b, state->varyings_vpm_offset + vpm_offset,
 164                                      nir_channel(b, src, i));
 165         }
 166
 167         nir_instr_remove(&intr->instr);
 168 }
 169
 170 static void
 171 v3d_nir_lower_io_instr(struct v3d_compile *c, nir_builder *b,
 172                        struct nir_instr *instr,
 173                        struct v3d_nir_lower_io_state *state)
 174 {
 175         if (instr->type != nir_instr_type_intrinsic)
 176                 return;
 177         nir_intrinsic_instr *intr = nir_instr_as_intrinsic(instr);
 178
 179         switch (intr->intrinsic) {
 180         case nir_intrinsic_load_uniform:
 181                 v3d_nir_lower_uniform(c, b, intr);
 182                 break;
 183
 184         case nir_intrinsic_store_output:
 185                 if (c->s->info.stage == MESA_SHADER_VERTEX)
 186                         v3d_nir_lower_vpm_output(c, b, intr, state);
 187                 break;
 188
 189         default:
 190                 break;
 191         }
 192 }
 193
 194 /* Remap the output var's .driver_location.  This is purely for
 195  * nir_print_shader() so that store_output can map back to a variable name.
 196  */
 197 static void
 198 v3d_nir_lower_io_update_output_var_base(struct v3d_compile *c,
 199                                         struct v3d_nir_lower_io_state *state)
 200 {
 201         nir_foreach_variable_safe(var, &c->s->outputs) {
 202                 if (var->data.location == VARYING_SLOT_POS &&
 203                     state->pos_vpm_offset != -1) {
 204                         var->data.driver_location = state->pos_vpm_offset;
 205                         continue;
 206                 }
 207
 208                 if (var->data.location == VARYING_SLOT_PSIZ &&
 209                     state->psiz_vpm_offset != -1) {
 210                         var->data.driver_location = state->psiz_vpm_offset;
 211                         continue;
 212                 }
 213
 214                 int vpm_offset = v3d_varying_slot_vpm_offset(c, var, 0);
 215                 if (vpm_offset != -1) {
 216                         var->data.driver_location =
 217                                 state->varyings_vpm_offset + vpm_offset;
 218                 } else {
 219                         /* If we couldn't find a mapping for the var, delete
 220                          * it so that its old .driver_location doesn't confuse
 221                          * nir_print_shader().
 222                          */
 223                         exec_node_remove(&var->node);
 224                 }
 225         }
 226 }
 227
 228 static void
 229 v3d_nir_setup_vpm_layout(struct v3d_compile *c,
 230                          struct v3d_nir_lower_io_state *state)
 231 {
 232         uint32_t vpm_offset = 0;
 233
 234         if (c->vs_key->is_coord) {
 235                 state->pos_vpm_offset = vpm_offset;
 236                 vpm_offset += 4;
 237         } else {
 238                 state->pos_vpm_offset = -1;
 239         }
 240
 241         state->vp_vpm_offset = vpm_offset;
 242         vpm_offset += 2;
 243
 244         if (!c->vs_key->is_coord) {
 245                 state->zs_vpm_offset = vpm_offset++;
 246                 state->rcp_wc_vpm_offset = vpm_offset++;
 247         } else {
 248                 state->zs_vpm_offset = -1;
 249                 state->rcp_wc_vpm_offset = -1;
 250         }
 251
 252         if (c->vs_key->per_vertex_point_size)
 253                 state->psiz_vpm_offset = vpm_offset++;
 254         else
 255                 state->psiz_vpm_offset = -1;
 256
 257         state->varyings_vpm_offset = vpm_offset;
 258
 259         c->vpm_output_size = vpm_offset + c->vs_key->num_used_outputs;
 260 }
 261
 262 static void
 263 v3d_nir_emit_ff_vpm_outputs(struct v3d_compile *c, nir_builder *b,
 264                             struct v3d_nir_lower_io_state *state)
 265 {
 266         for (int i = 0; i < 4; i++) {
 267                 if (!state->pos[i])
 268                         state->pos[i] = nir_ssa_undef(b, 1, 32);
 269         }
 270
 271         nir_ssa_def *rcp_wc = nir_frcp(b, state->pos[3]);
 272
 273         if (state->pos_vpm_offset != -1) {
 274                 for (int i = 0; i < 4; i++) {
 275                         v3d_nir_store_output(b, state->pos_vpm_offset + i,
 276                                              state->pos[i]);
 277                 }
 278         }
 279
 280         for (int i = 0; i < 2; i++) {
 281                 nir_ssa_def *pos;
 282                 nir_ssa_def *scale;
 283                 pos = state->pos[i];
 284                 if (i == 0)
 285                         scale = nir_load_viewport_x_scale(b);
 286                 else
 287                         scale = nir_load_viewport_y_scale(b);
 288                 pos = nir_fmul(b, pos, scale);
 289                 pos = nir_fmul(b, pos, rcp_wc);
 290                 pos = nir_f2i32(b, nir_fround_even(b, pos));
 291                 v3d_nir_store_output(b, state->vp_vpm_offset + i,
 292                                      pos);
 293         }
 294
 295         if (state->zs_vpm_offset != -1) {
 296                 nir_ssa_def *z = state->pos[2];
 297                 z = nir_fmul(b, z, nir_load_viewport_z_scale(b));
 298                 z = nir_fmul(b, z, rcp_wc);
 299                 z = nir_fadd(b, z, nir_load_viewport_z_offset(b));
 300                 v3d_nir_store_output(b, state->zs_vpm_offset, z);
 301         }
 302
 303         if (state->rcp_wc_vpm_offset != -1)
 304                 v3d_nir_store_output(b, state->rcp_wc_vpm_offset, rcp_wc);
 305
 306         /* Store 0 to varyings requested by the FS but not stored in the VS.
 307          * This should be undefined behavior, but glsl-routing seems to rely
 308          * on it.
 309          */
 310         for (int i = 0; i < c->vs_key->num_used_outputs; i++) {
 311                 if (!BITSET_TEST(state->varyings_stored, i)) {
 312                         v3d_nir_store_output(b, state->varyings_vpm_offset + i,
 313                                              nir_imm_int(b, 0));
 314                 }
 315         }
 316 }
 317
 318 void
 319 v3d_nir_lower_io(nir_shader *s, struct v3d_compile *c)
 320 {
 321         struct v3d_nir_lower_io_state state = { 0 };
 322
 323         /* Set up the layout of the VPM outputs. */
 324         if (s->info.stage == MESA_SHADER_VERTEX)
 325                 v3d_nir_setup_vpm_layout(c, &state);
 326
 327         nir_foreach_function(function, s) {
 328                 if (function->impl) {
 329                         nir_builder b;
 330                         nir_builder_init(&b, function->impl);
 331
 332                         nir_foreach_block(block, function->impl) {
 333                                 nir_foreach_instr_safe(instr, block)
 334                                         v3d_nir_lower_io_instr(c, &b, instr,
 335                                                                &state);
 336                         }
 337
 338                         nir_block *last = nir_impl_last_block(function->impl);
 339                         b.cursor = nir_after_block(last);
 340                         if (s->info.stage == MESA_SHADER_VERTEX)
 341                                 v3d_nir_emit_ff_vpm_outputs(c, &b, &state);
 342
 343                         nir_metadata_preserve(function->impl,
 344                                               nir_metadata_block_index |
 345                                               nir_metadata_dominance);
 346                 }
 347         }
 348
 349         if (s->info.stage == MESA_SHADER_VERTEX)
 350                 v3d_nir_lower_io_update_output_var_base(c, &state);
 351 }