2 * Copyright © 2016-2017 Broadcom
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
24 #include "broadcom/common/v3d_device_info.h"
25 #include "v3d_compiler.h"
28 vir_get_non_sideband_nsrc(struct qinst
*inst
)
30 switch (inst
->qpu
.type
) {
31 case V3D_QPU_INSTR_TYPE_BRANCH
:
33 case V3D_QPU_INSTR_TYPE_ALU
:
34 if (inst
->qpu
.alu
.add
.op
!= V3D_QPU_A_NOP
)
35 return v3d_qpu_add_op_num_src(inst
->qpu
.alu
.add
.op
);
37 return v3d_qpu_mul_op_num_src(inst
->qpu
.alu
.mul
.op
);
44 vir_get_nsrc(struct qinst
*inst
)
46 int nsrc
= vir_get_non_sideband_nsrc(inst
);
48 if (vir_has_implicit_uniform(inst
))
55 vir_has_implicit_uniform(struct qinst
*inst
)
57 switch (inst
->qpu
.type
) {
58 case V3D_QPU_INSTR_TYPE_BRANCH
:
60 case V3D_QPU_INSTR_TYPE_ALU
:
61 switch (inst
->dst
.file
) {
65 return inst
->has_implicit_uniform
;
71 /* The sideband uniform for textures gets stored after the normal ALU
75 vir_get_implicit_uniform_src(struct qinst
*inst
)
77 return vir_get_nsrc(inst
) - 1;
81 * Returns whether the instruction has any side effects that must be
85 vir_has_side_effects(struct v3d_compile
*c
, struct qinst
*inst
)
87 switch (inst
->qpu
.type
) {
88 case V3D_QPU_INSTR_TYPE_BRANCH
:
90 case V3D_QPU_INSTR_TYPE_ALU
:
91 switch (inst
->qpu
.alu
.add
.op
) {
92 case V3D_QPU_A_SETREVF
:
93 case V3D_QPU_A_SETMSF
:
94 case V3D_QPU_A_VPMSETUP
:
95 case V3D_QPU_A_STVPMV
:
96 case V3D_QPU_A_STVPMD
:
97 case V3D_QPU_A_STVPMP
:
104 switch (inst
->qpu
.alu
.mul
.op
) {
105 case V3D_QPU_M_MULTOP
:
112 if (inst
->qpu
.sig
.ldtmu
)
119 vir_is_float_input(struct qinst
*inst
)
121 /* XXX: More instrs */
122 switch (inst
->qpu
.type
) {
123 case V3D_QPU_INSTR_TYPE_BRANCH
:
125 case V3D_QPU_INSTR_TYPE_ALU
:
126 switch (inst
->qpu
.alu
.add
.op
) {
131 case V3D_QPU_A_FTOIN
:
137 switch (inst
->qpu
.alu
.mul
.op
) {
139 case V3D_QPU_M_VFMUL
:
151 vir_is_raw_mov(struct qinst
*inst
)
153 if (inst
->qpu
.type
!= V3D_QPU_INSTR_TYPE_ALU
||
154 (inst
->qpu
.alu
.mul
.op
!= V3D_QPU_M_FMOV
&&
155 inst
->qpu
.alu
.mul
.op
!= V3D_QPU_M_MOV
)) {
159 if (inst
->qpu
.alu
.add
.output_pack
!= V3D_QPU_PACK_NONE
||
160 inst
->qpu
.alu
.mul
.output_pack
!= V3D_QPU_PACK_NONE
) {
164 if (inst
->qpu
.flags
.ac
!= V3D_QPU_COND_NONE
||
165 inst
->qpu
.flags
.mc
!= V3D_QPU_COND_NONE
)
172 vir_is_add(struct qinst
*inst
)
174 return (inst
->qpu
.type
== V3D_QPU_INSTR_TYPE_ALU
&&
175 inst
->qpu
.alu
.add
.op
!= V3D_QPU_A_NOP
);
179 vir_is_mul(struct qinst
*inst
)
181 return (inst
->qpu
.type
== V3D_QPU_INSTR_TYPE_ALU
&&
182 inst
->qpu
.alu
.mul
.op
!= V3D_QPU_M_NOP
);
186 vir_is_tex(struct qinst
*inst
)
188 if (inst
->dst
.file
== QFILE_MAGIC
)
189 return v3d_qpu_magic_waddr_is_tmu(inst
->dst
.index
);
195 vir_depends_on_flags(struct qinst
*inst
)
197 if (inst
->qpu
.type
== V3D_QPU_INSTR_TYPE_BRANCH
) {
198 return (inst
->qpu
.branch
.cond
!= V3D_QPU_BRANCH_COND_ALWAYS
);
200 return (inst
->qpu
.flags
.ac
!= V3D_QPU_COND_NONE
&&
201 inst
->qpu
.flags
.mc
!= V3D_QPU_COND_NONE
);
206 vir_writes_r3(const struct v3d_device_info
*devinfo
, struct qinst
*inst
)
208 for (int i
= 0; i
< vir_get_nsrc(inst
); i
++) {
209 switch (inst
->src
[i
].file
) {
218 if (devinfo
->ver
< 41 && (inst
->qpu
.sig
.ldvary
||
219 inst
->qpu
.sig
.ldtlb
||
220 inst
->qpu
.sig
.ldtlbu
||
221 inst
->qpu
.sig
.ldvpm
)) {
229 vir_writes_r4(const struct v3d_device_info
*devinfo
, struct qinst
*inst
)
231 switch (inst
->dst
.file
) {
233 switch (inst
->dst
.index
) {
234 case V3D_QPU_WADDR_RECIP
:
235 case V3D_QPU_WADDR_RSQRT
:
236 case V3D_QPU_WADDR_EXP
:
237 case V3D_QPU_WADDR_LOG
:
238 case V3D_QPU_WADDR_SIN
:
246 if (devinfo
->ver
< 41 && inst
->qpu
.sig
.ldtmu
)
253 vir_set_unpack(struct qinst
*inst
, int src
,
254 enum v3d_qpu_input_unpack unpack
)
256 assert(src
== 0 || src
== 1);
258 if (vir_is_add(inst
)) {
260 inst
->qpu
.alu
.add
.a_unpack
= unpack
;
262 inst
->qpu
.alu
.add
.b_unpack
= unpack
;
264 assert(vir_is_mul(inst
));
266 inst
->qpu
.alu
.mul
.a_unpack
= unpack
;
268 inst
->qpu
.alu
.mul
.b_unpack
= unpack
;
273 vir_set_cond(struct qinst
*inst
, enum v3d_qpu_cond cond
)
275 if (vir_is_add(inst
)) {
276 inst
->qpu
.flags
.ac
= cond
;
278 assert(vir_is_mul(inst
));
279 inst
->qpu
.flags
.mc
= cond
;
284 vir_set_pf(struct qinst
*inst
, enum v3d_qpu_pf pf
)
286 if (vir_is_add(inst
)) {
287 inst
->qpu
.flags
.apf
= pf
;
289 assert(vir_is_mul(inst
));
290 inst
->qpu
.flags
.mpf
= pf
;
296 vir_channels_written(struct qinst
*inst
)
298 if (vir_is_mul(inst
)) {
299 switch (inst
->dst
.pack
) {
300 case QPU_PACK_MUL_NOP
:
301 case QPU_PACK_MUL_8888
:
303 case QPU_PACK_MUL_8A
:
305 case QPU_PACK_MUL_8B
:
307 case QPU_PACK_MUL_8C
:
309 case QPU_PACK_MUL_8D
:
313 switch (inst
->dst
.pack
) {
315 case QPU_PACK_A_8888
:
316 case QPU_PACK_A_8888_SAT
:
317 case QPU_PACK_A_32_SAT
:
320 case QPU_PACK_A_8A_SAT
:
323 case QPU_PACK_A_8B_SAT
:
326 case QPU_PACK_A_8C_SAT
:
329 case QPU_PACK_A_8D_SAT
:
332 case QPU_PACK_A_16A_SAT
:
335 case QPU_PACK_A_16B_SAT
:
339 unreachable("Bad pack field");
344 vir_get_temp(struct v3d_compile
*c
)
348 reg
.file
= QFILE_TEMP
;
349 reg
.index
= c
->num_temps
++;
351 if (c
->num_temps
> c
->defs_array_size
) {
352 uint32_t old_size
= c
->defs_array_size
;
353 c
->defs_array_size
= MAX2(old_size
* 2, 16);
354 c
->defs
= reralloc(c
, c
->defs
, struct qinst
*,
356 memset(&c
->defs
[old_size
], 0,
357 sizeof(c
->defs
[0]) * (c
->defs_array_size
- old_size
));
364 vir_add_inst(enum v3d_qpu_add_op op
, struct qreg dst
, struct qreg src0
, struct qreg src1
)
366 struct qinst
*inst
= calloc(1, sizeof(*inst
));
368 inst
->qpu
= v3d_qpu_nop();
369 inst
->qpu
.alu
.add
.op
= op
;
380 vir_mul_inst(enum v3d_qpu_mul_op op
, struct qreg dst
, struct qreg src0
, struct qreg src1
)
382 struct qinst
*inst
= calloc(1, sizeof(*inst
));
384 inst
->qpu
= v3d_qpu_nop();
385 inst
->qpu
.alu
.mul
.op
= op
;
396 vir_branch_inst(enum v3d_qpu_branch_cond cond
, struct qreg src
)
398 struct qinst
*inst
= calloc(1, sizeof(*inst
));
400 inst
->qpu
= v3d_qpu_nop();
401 inst
->qpu
.type
= V3D_QPU_INSTR_TYPE_BRANCH
;
402 inst
->qpu
.branch
.cond
= cond
;
403 inst
->qpu
.branch
.msfign
= V3D_QPU_MSFIGN_NONE
;
404 inst
->qpu
.branch
.bdi
= V3D_QPU_BRANCH_DEST_REL
;
405 inst
->qpu
.branch
.ub
= true;
406 inst
->qpu
.branch
.bdu
= V3D_QPU_BRANCH_DEST_REL
;
408 inst
->dst
= vir_reg(QFILE_NULL
, 0);
416 vir_emit(struct v3d_compile
*c
, struct qinst
*inst
)
418 list_addtail(&inst
->link
, &c
->cur_block
->instructions
);
421 /* Updates inst to write to a new temporary, emits it, and notes the def. */
423 vir_emit_def(struct v3d_compile
*c
, struct qinst
*inst
)
425 assert(inst
->dst
.file
== QFILE_NULL
);
427 inst
->dst
= vir_get_temp(c
);
429 if (inst
->dst
.file
== QFILE_TEMP
)
430 c
->defs
[inst
->dst
.index
] = inst
;
438 vir_emit_nondef(struct v3d_compile
*c
, struct qinst
*inst
)
440 if (inst
->dst
.file
== QFILE_TEMP
)
441 c
->defs
[inst
->dst
.index
] = NULL
;
449 vir_new_block(struct v3d_compile
*c
)
451 struct qblock
*block
= rzalloc(c
, struct qblock
);
453 list_inithead(&block
->instructions
);
455 block
->predecessors
= _mesa_set_create(block
,
457 _mesa_key_pointer_equal
);
459 block
->index
= c
->next_block_index
++;
465 vir_set_emit_block(struct v3d_compile
*c
, struct qblock
*block
)
467 c
->cur_block
= block
;
468 list_addtail(&block
->link
, &c
->blocks
);
472 vir_entry_block(struct v3d_compile
*c
)
474 return list_first_entry(&c
->blocks
, struct qblock
, link
);
478 vir_exit_block(struct v3d_compile
*c
)
480 return list_last_entry(&c
->blocks
, struct qblock
, link
);
484 vir_link_blocks(struct qblock
*predecessor
, struct qblock
*successor
)
486 _mesa_set_add(successor
->predecessors
, predecessor
);
487 if (predecessor
->successors
[0]) {
488 assert(!predecessor
->successors
[1]);
489 predecessor
->successors
[1] = successor
;
491 predecessor
->successors
[0] = successor
;
495 const struct v3d_compiler
*
496 v3d_compiler_init(const struct v3d_device_info
*devinfo
)
498 struct v3d_compiler
*compiler
= rzalloc(NULL
, struct v3d_compiler
);
502 compiler
->devinfo
= devinfo
;
504 if (!vir_init_reg_sets(compiler
)) {
505 ralloc_free(compiler
);
513 v3d_compiler_free(const struct v3d_compiler
*compiler
)
515 ralloc_free((void *)compiler
);
518 static struct v3d_compile
*
519 vir_compile_init(const struct v3d_compiler
*compiler
,
522 int program_id
, int variant_id
)
524 struct v3d_compile
*c
= rzalloc(NULL
, struct v3d_compile
);
526 c
->compiler
= compiler
;
527 c
->devinfo
= compiler
->devinfo
;
529 c
->program_id
= program_id
;
530 c
->variant_id
= variant_id
;
532 s
= nir_shader_clone(c
, s
);
535 list_inithead(&c
->blocks
);
536 vir_set_emit_block(c
, vir_new_block(c
));
538 c
->output_position_index
= -1;
539 c
->output_point_size_index
= -1;
540 c
->output_sample_mask_index
= -1;
542 c
->def_ht
= _mesa_hash_table_create(c
, _mesa_hash_pointer
,
543 _mesa_key_pointer_equal
);
549 v3d_lower_nir(struct v3d_compile
*c
)
551 struct nir_lower_tex_options tex_options
= {
553 .lower_rect
= false, /* XXX */
555 /* Apply swizzles to all samplers. */
556 .swizzle_result
= ~0,
559 /* Lower the format swizzle and (for 32-bit returns)
560 * ARB_texture_swizzle-style swizzle.
562 for (int i
= 0; i
< ARRAY_SIZE(c
->key
->tex
); i
++) {
563 for (int j
= 0; j
< 4; j
++)
564 tex_options
.swizzles
[i
][j
] = c
->key
->tex
[i
].swizzle
[j
];
566 if (c
->key
->tex
[i
].clamp_s
)
567 tex_options
.saturate_s
|= 1 << i
;
568 if (c
->key
->tex
[i
].clamp_t
)
569 tex_options
.saturate_t
|= 1 << i
;
570 if (c
->key
->tex
[i
].clamp_r
)
571 tex_options
.saturate_r
|= 1 << i
;
574 NIR_PASS_V(c
->s
, nir_lower_tex
, &tex_options
);
578 v3d_lower_nir_late(struct v3d_compile
*c
)
580 NIR_PASS_V(c
->s
, v3d_nir_lower_io
, c
);
581 NIR_PASS_V(c
->s
, v3d_nir_lower_txf_ms
, c
);
582 NIR_PASS_V(c
->s
, nir_lower_idiv
);
586 v3d_set_prog_data_uniforms(struct v3d_compile
*c
,
587 struct v3d_prog_data
*prog_data
)
589 int count
= c
->num_uniforms
;
590 struct v3d_uniform_list
*ulist
= &prog_data
->uniforms
;
592 ulist
->count
= count
;
593 ulist
->data
= ralloc_array(prog_data
, uint32_t, count
);
594 memcpy(ulist
->data
, c
->uniform_data
,
595 count
* sizeof(*ulist
->data
));
596 ulist
->contents
= ralloc_array(prog_data
, enum quniform_contents
, count
);
597 memcpy(ulist
->contents
, c
->uniform_contents
,
598 count
* sizeof(*ulist
->contents
));
601 /* Copy the compiler UBO range state to the compiled shader, dropping out
602 * arrays that were never referenced by an indirect load.
604 * (Note that QIR dead code elimination of an array access still leaves that
605 * array alive, though)
608 v3d_set_prog_data_ubo(struct v3d_compile
*c
,
609 struct v3d_prog_data
*prog_data
)
611 if (!c
->num_ubo_ranges
)
614 prog_data
->num_ubo_ranges
= 0;
615 prog_data
->ubo_ranges
= ralloc_array(prog_data
, struct v3d_ubo_range
,
617 for (int i
= 0; i
< c
->num_ubo_ranges
; i
++) {
618 if (!c
->ubo_range_used
[i
])
621 struct v3d_ubo_range
*range
= &c
->ubo_ranges
[i
];
622 prog_data
->ubo_ranges
[prog_data
->num_ubo_ranges
++] = *range
;
623 prog_data
->ubo_size
+= range
->size
;
626 if (prog_data
->ubo_size
) {
627 if (V3D_DEBUG
& V3D_DEBUG_SHADERDB
) {
628 fprintf(stderr
, "SHADER-DB: %s prog %d/%d: %d UBO uniforms\n",
629 vir_get_stage_name(c
),
630 c
->program_id
, c
->variant_id
,
631 prog_data
->ubo_size
/ 4);
637 v3d_set_prog_data(struct v3d_compile
*c
,
638 struct v3d_prog_data
*prog_data
)
640 v3d_set_prog_data_uniforms(c
, prog_data
);
641 v3d_set_prog_data_ubo(c
, prog_data
);
645 v3d_return_qpu_insts(struct v3d_compile
*c
, uint32_t *final_assembly_size
)
647 *final_assembly_size
= c
->qpu_inst_count
* sizeof(uint64_t);
649 uint64_t *qpu_insts
= malloc(*final_assembly_size
);
653 memcpy(qpu_insts
, c
->qpu_insts
, *final_assembly_size
);
655 vir_compile_destroy(c
);
660 uint64_t *v3d_compile_vs(const struct v3d_compiler
*compiler
,
661 struct v3d_vs_key
*key
,
662 struct v3d_vs_prog_data
*prog_data
,
664 int program_id
, int variant_id
,
665 uint32_t *final_assembly_size
)
667 struct v3d_compile
*c
= vir_compile_init(compiler
, &key
->base
, s
,
668 program_id
, variant_id
);
674 if (key
->clamp_color
)
675 NIR_PASS_V(c
->s
, nir_lower_clamp_color_outputs
);
677 if (key
->base
.ucp_enables
) {
678 NIR_PASS_V(c
->s
, nir_lower_clip_vs
, key
->base
.ucp_enables
);
679 NIR_PASS_V(c
->s
, nir_lower_io_to_scalar
,
683 /* Note: VS output scalarizing must happen after nir_lower_clip_vs. */
684 NIR_PASS_V(c
->s
, nir_lower_io_to_scalar
, nir_var_shader_out
);
686 v3d_lower_nir_late(c
);
687 v3d_optimize_nir(c
->s
);
688 NIR_PASS_V(c
->s
, nir_convert_from_ssa
, true);
692 v3d_set_prog_data(c
, &prog_data
->base
);
694 prog_data
->base
.num_inputs
= c
->num_inputs
;
696 /* The vertex data gets format converted by the VPM so that
697 * each attribute channel takes up a VPM column. Precompute
698 * the sizes for the shader record.
700 for (int i
= 0; i
< ARRAY_SIZE(prog_data
->vattr_sizes
); i
++) {
701 prog_data
->vattr_sizes
[i
] = c
->vattr_sizes
[i
];
702 prog_data
->vpm_input_size
+= c
->vattr_sizes
[i
];
705 /* Input/output segment size are in 8x32-bit multiples. */
706 prog_data
->vpm_input_size
= align(prog_data
->vpm_input_size
, 8) / 8;
707 prog_data
->vpm_output_size
= align(c
->num_vpm_writes
, 8) / 8;
709 prog_data
->uses_vid
= (s
->info
.system_values_read
&
710 (1ull << SYSTEM_VALUE_VERTEX_ID
));
711 prog_data
->uses_iid
= (s
->info
.system_values_read
&
712 (1ull << SYSTEM_VALUE_INSTANCE_ID
));
714 return v3d_return_qpu_insts(c
, final_assembly_size
);
718 v3d_set_fs_prog_data_inputs(struct v3d_compile
*c
,
719 struct v3d_fs_prog_data
*prog_data
)
721 prog_data
->base
.num_inputs
= c
->num_inputs
;
722 memcpy(prog_data
->input_slots
, c
->input_slots
,
723 c
->num_inputs
* sizeof(*c
->input_slots
));
725 STATIC_ASSERT(ARRAY_SIZE(prog_data
->flat_shade_flags
) >
726 (V3D_MAX_FS_INPUTS
- 1) / 24);
727 for (int i
= 0; i
< V3D_MAX_FS_INPUTS
; i
++) {
728 if (BITSET_TEST(c
->flat_shade_flags
, i
))
729 prog_data
->flat_shade_flags
[i
/ 24] |= 1 << (i
% 24);
733 uint64_t *v3d_compile_fs(const struct v3d_compiler
*compiler
,
734 struct v3d_fs_key
*key
,
735 struct v3d_fs_prog_data
*prog_data
,
737 int program_id
, int variant_id
,
738 uint32_t *final_assembly_size
)
740 struct v3d_compile
*c
= vir_compile_init(compiler
, &key
->base
, s
,
741 program_id
, variant_id
);
747 if (key
->light_twoside
)
748 NIR_PASS_V(c
->s
, nir_lower_two_sided_color
);
750 if (key
->clamp_color
)
751 NIR_PASS_V(c
->s
, nir_lower_clamp_color_outputs
);
753 if (key
->alpha_test
) {
754 NIR_PASS_V(c
->s
, nir_lower_alpha_test
, key
->alpha_test_func
,
758 if (key
->base
.ucp_enables
)
759 NIR_PASS_V(c
->s
, nir_lower_clip_fs
, key
->base
.ucp_enables
);
761 /* Note: FS input scalarizing must happen after
762 * nir_lower_two_sided_color, which only handles a vec4 at a time.
764 NIR_PASS_V(c
->s
, nir_lower_io_to_scalar
, nir_var_shader_in
);
766 v3d_lower_nir_late(c
);
767 v3d_optimize_nir(c
->s
);
768 NIR_PASS_V(c
->s
, nir_convert_from_ssa
, true);
772 v3d_set_prog_data(c
, &prog_data
->base
);
773 v3d_set_fs_prog_data_inputs(c
, prog_data
);
774 prog_data
->writes_z
= (c
->s
->info
.outputs_written
&
775 (1 << FRAG_RESULT_DEPTH
));
776 prog_data
->discard
= c
->s
->info
.fs
.uses_discard
;
778 return v3d_return_qpu_insts(c
, final_assembly_size
);
782 vir_remove_instruction(struct v3d_compile
*c
, struct qinst
*qinst
)
784 if (qinst
->dst
.file
== QFILE_TEMP
)
785 c
->defs
[qinst
->dst
.index
] = NULL
;
787 list_del(&qinst
->link
);
792 vir_follow_movs(struct v3d_compile
*c
, struct qreg reg
)
797 while (reg.file == QFILE_TEMP &&
798 c->defs[reg.index] &&
799 (c->defs[reg.index]->op == QOP_MOV ||
800 c->defs[reg.index]->op == QOP_FMOV) &&
801 !c->defs[reg.index]->dst.pack &&
802 !c->defs[reg.index]->src[0].pack) {
803 reg = c->defs[reg.index]->src[0];
812 vir_compile_destroy(struct v3d_compile
*c
)
814 vir_for_each_block(block
, c
) {
815 while (!list_empty(&block
->instructions
)) {
816 struct qinst
*qinst
=
817 list_first_entry(&block
->instructions
,
819 vir_remove_instruction(c
, qinst
);
827 vir_uniform(struct v3d_compile
*c
,
828 enum quniform_contents contents
,
831 for (int i
= 0; i
< c
->num_uniforms
; i
++) {
832 if (c
->uniform_contents
[i
] == contents
&&
833 c
->uniform_data
[i
] == data
) {
834 return vir_reg(QFILE_UNIF
, i
);
838 uint32_t uniform
= c
->num_uniforms
++;
840 if (uniform
>= c
->uniform_array_size
) {
841 c
->uniform_array_size
= MAX2(MAX2(16, uniform
+ 1),
842 c
->uniform_array_size
* 2);
844 c
->uniform_data
= reralloc(c
, c
->uniform_data
,
846 c
->uniform_array_size
);
847 c
->uniform_contents
= reralloc(c
, c
->uniform_contents
,
848 enum quniform_contents
,
849 c
->uniform_array_size
);
852 c
->uniform_contents
[uniform
] = contents
;
853 c
->uniform_data
[uniform
] = data
;
855 return vir_reg(QFILE_UNIF
, uniform
);
859 vir_PF(struct v3d_compile
*c
, struct qreg src
, enum v3d_qpu_pf pf
)
861 struct qinst
*last_inst
= NULL
;
863 if (!list_empty(&c
->cur_block
->instructions
))
864 last_inst
= (struct qinst
*)c
->cur_block
->instructions
.prev
;
866 if (src
.file
!= QFILE_TEMP
||
867 !c
->defs
[src
.index
] ||
868 last_inst
!= c
->defs
[src
.index
]) {
869 /* XXX: Make the MOV be the appropriate type */
870 last_inst
= vir_MOV_dest(c
, vir_reg(QFILE_NULL
, 0), src
);
871 last_inst
= (struct qinst
*)c
->cur_block
->instructions
.prev
;
874 vir_set_pf(last_inst
, pf
);
877 #define OPTPASS(func) \
879 bool stage_progress = func(c); \
880 if (stage_progress) { \
882 if (print_opt_debug) { \
884 "VIR opt pass %2d: %s progress\n", \
887 /*XXX vir_validate(c);*/ \
892 vir_optimize(struct v3d_compile
*c
)
894 bool print_opt_debug
= false;
898 bool progress
= false;
900 OPTPASS(vir_opt_copy_propagate
);
901 OPTPASS(vir_opt_dead_code
);
911 vir_get_stage_name(struct v3d_compile
*c
)
913 if (c
->vs_key
&& c
->vs_key
->is_coord
)
914 return "MESA_SHADER_COORD";
916 return gl_shader_stage_name(c
->s
->info
.stage
);