c7f6476def5d43fa51e93737d06e1d211eed3f02
[mesa.git] / src / broadcom / qpu / tests / qpu_disasm.c
1 /*
2 * Copyright © 2016 Broadcom
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 */
23
24 #include <stdio.h>
25 #include <string.h>
26 #include "util/macros.h"
27 #include "broadcom/common/v3d_device_info.h"
28 #include "broadcom/qpu/qpu_disasm.h"
29 #include "broadcom/qpu/qpu_instr.h"
30
31 static const struct {
32 int ver;
33 uint64_t inst;
34 const char *expected;
35 } tests[] = {
36 { 33, 0x3d003186bb800000ull, "nop ; nop ; ldvary" },
37 { 33, 0x3c20318105829000ull, "fadd r1, r1, r5 ; nop ; thrsw" },
38 { 33, 0x3c403186bb81d000ull, "vpmsetup -, r5 ; nop ; ldunif" },
39 { 33, 0x3f003186bb800000ull, "nop ; nop ; ldvpm" },
40 { 33, 0x3c002380b6edb000ull, "or rf0, r3, r3 ; mov vpm, r3" },
41 { 33, 0x57403006bbb80000ull, "nop ; fmul r0, rf0, r5 ; ldvpm; ldunif" },
42
43 /* branch conditions */
44 { 33, 0x02000006002034c0ull, "b.anyap rf19" },
45 { 33, 0x02679356b4201000ull, "b.anyap -1268280496" },
46 { 33, 0x02b76a2dd0400000ull, "b.anynaq zero_addr+0xd0b76a28" },
47 { 33, 0x0200000500402000ull, "b.anynaq lri" },
48 { 33, 0x0216fe167301c8c0ull, "bu.anya zero_addr+0x7316fe10, rf35" },
49 { 33, 0x020000050040e000ull, "bu.anynaq lri, r:unif" },
50 { 33, 0x0200000300006000ull, "bu.na0 lri, a:unif" },
51
52 /* Special waddr names */
53 { 33, 0x3c00318735808000ull, "vfpack tlb, r0, r1 ; nop" },
54 { 33, 0xe0571c938e8d5000ull, "fmax.andc recip, r5.h, r2.l; fmul.ifb rf50.h, r3.l, r4.abs; ldunif" },
55 { 33, 0xc04098d4382c9000ull, "add.pushn rsqrt, r1, r1; fmul rf35.h, r3.abs, r1.abs; ldunif" },
56 { 33, 0x481edcd6b3184500ull, "vfmin.norn log, r4.hh, r0; fmul.ifnb rf51, rf20.abs, r0.l" },
57 { 33, 0x041618d57c453000ull, "shl.andn exp, r3, r2; add.ifb rf35, r1, r2" },
58 { 33, 0x7048e5da49272800ull, "fsub.ifa rf26, r2.l, rf32; fmul.pushc sin, r1.h, r1.abs; ldunif" },
59
60 };
61
62 static void
63 swap_mux(enum v3d_qpu_mux *a, enum v3d_qpu_mux *b)
64 {
65 enum v3d_qpu_mux t = *a;
66 *a = *b;
67 *b = t;
68 }
69
70 static void
71 swap_pack(enum v3d_qpu_input_unpack *a, enum v3d_qpu_input_unpack *b)
72 {
73 enum v3d_qpu_input_unpack t = *a;
74 *a = *b;
75 *b = t;
76 }
77
78 int
79 main(int argc, char **argv)
80 {
81 struct v3d_device_info devinfo = { };
82 int retval = 0;
83
84 for (int i = 0; i < ARRAY_SIZE(tests); i++) {
85 devinfo.ver = tests[i].ver;
86
87 printf("Testing v%d.%d 0x%016llx... ",
88 devinfo.ver / 10, devinfo.ver % 10,
89 (long long)tests[i].inst);
90
91 const char *disasm_output = v3d_qpu_disasm(&devinfo,
92 tests[i].inst);
93
94 if (strcmp(disasm_output, tests[i].expected) != 0) {
95 printf("FAIL\n");
96 printf(" Expected: \"%s\"\n", tests[i].expected);
97 printf(" Got: \"%s\"\n", disasm_output);
98 retval = 1;
99 continue;
100 }
101
102 struct v3d_qpu_instr instr;
103 if (!v3d_qpu_instr_unpack(&devinfo, tests[i].inst, &instr)) {
104 printf("FAIL (unpack) %s\n", tests[i].expected);
105 retval = 1;
106 continue;
107 }
108
109 if (instr.type == V3D_QPU_INSTR_TYPE_ALU) {
110 switch (instr.alu.add.op) {
111 case V3D_QPU_A_FADD:
112 case V3D_QPU_A_FADDNF:
113 case V3D_QPU_A_FMIN:
114 case V3D_QPU_A_FMAX:
115 /* Swap the operands to be sure that we test
116 * how the QPUs distinguish between these ops.
117 */
118 swap_mux(&instr.alu.add.a,
119 &instr.alu.add.b);
120 swap_pack(&instr.alu.add.a_unpack,
121 &instr.alu.add.b_unpack);
122 default:
123 break;
124 }
125 }
126
127 uint64_t repack;
128 if (!v3d_qpu_instr_pack(&devinfo, &instr, &repack)) {
129 printf("FAIL (pack) %s\n", tests[i].expected);
130 retval = 1;
131 continue;
132 }
133
134 if (repack != tests[i].inst) {
135 printf("FAIL (repack) 0x%016llx\n", (long long)repack);
136 printf(" Expected: \"%s\"\n", tests[i].expected);
137 const char *redisasm = v3d_qpu_disasm(&devinfo, repack);
138 printf(" Got: \"%s\"\n", redisasm);
139 retval = 1;
140 }
141
142 printf("PASS\n");
143 }
144
145 return retval;
146 }