mesa: include mtypes.h less
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 /*
38 * pass to lower GLSL IR to NIR
39 *
40 * This will lower variable dereferences to loads/stores of corresponding
41 * variables in NIR - the variables will be converted to registers in a later
42 * pass.
43 */
44
45 namespace {
46
47 class nir_visitor : public ir_visitor
48 {
49 public:
50 nir_visitor(nir_shader *shader);
51 ~nir_visitor();
52
53 virtual void visit(ir_variable *);
54 virtual void visit(ir_function *);
55 virtual void visit(ir_function_signature *);
56 virtual void visit(ir_loop *);
57 virtual void visit(ir_if *);
58 virtual void visit(ir_discard *);
59 virtual void visit(ir_loop_jump *);
60 virtual void visit(ir_return *);
61 virtual void visit(ir_call *);
62 virtual void visit(ir_assignment *);
63 virtual void visit(ir_emit_vertex *);
64 virtual void visit(ir_end_primitive *);
65 virtual void visit(ir_expression *);
66 virtual void visit(ir_swizzle *);
67 virtual void visit(ir_texture *);
68 virtual void visit(ir_constant *);
69 virtual void visit(ir_dereference_variable *);
70 virtual void visit(ir_dereference_record *);
71 virtual void visit(ir_dereference_array *);
72 virtual void visit(ir_barrier *);
73
74 void create_function(ir_function_signature *ir);
75
76 private:
77 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
78 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
79
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
83 nir_ssa_def *src2);
84 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
85 nir_ssa_def *src2, nir_ssa_def *src3);
86
87 bool supports_ints;
88
89 nir_shader *shader;
90 nir_function_impl *impl;
91 nir_builder b;
92 nir_ssa_def *result; /* result of the expression tree last visited */
93
94 nir_deref_var *evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir);
95
96 /* the head of the dereference chain we're creating */
97 nir_deref_var *deref_head;
98 /* the tail of the dereference chain we're creating */
99 nir_deref *deref_tail;
100
101 nir_variable *var; /* variable created by ir_variable visitor */
102
103 /* whether the IR we're operating on is per-function or global */
104 bool is_global;
105
106 /* map of ir_variable -> nir_variable */
107 struct hash_table *var_table;
108
109 /* map of ir_function_signature -> nir_function_overload */
110 struct hash_table *overload_table;
111 };
112
113 /*
114 * This visitor runs before the main visitor, calling create_function() for
115 * each function so that the main visitor can resolve forward references in
116 * calls.
117 */
118
119 class nir_function_visitor : public ir_hierarchical_visitor
120 {
121 public:
122 nir_function_visitor(nir_visitor *v) : visitor(v)
123 {
124 }
125 virtual ir_visitor_status visit_enter(ir_function *);
126
127 private:
128 nir_visitor *visitor;
129 };
130
131 } /* end of anonymous namespace */
132
133 static void
134 nir_remap_attributes(nir_shader *shader,
135 const nir_shader_compiler_options *options)
136 {
137 if (options->vs_inputs_dual_locations) {
138 nir_foreach_variable(var, &shader->inputs) {
139 var->data.location +=
140 _mesa_bitcount_64(shader->info.vs.double_inputs &
141 BITFIELD64_MASK(var->data.location));
142 }
143 }
144
145 /* Once the remap is done, reset double_inputs_read, so later it will have
146 * which location/slots are doubles */
147 shader->info.vs.double_inputs = 0;
148 }
149
150 nir_shader *
151 glsl_to_nir(const struct gl_shader_program *shader_prog,
152 gl_shader_stage stage,
153 const nir_shader_compiler_options *options)
154 {
155 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
156
157 nir_shader *shader = nir_shader_create(NULL, stage, options,
158 &sh->Program->info);
159
160 nir_visitor v1(shader);
161 nir_function_visitor v2(&v1);
162 v2.run(sh->ir);
163 visit_exec_list(sh->ir, &v1);
164
165 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
166
167 /* Remap the locations to slots so those requiring two slots will occupy
168 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
169 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
170 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
171 if (shader->info.stage == MESA_SHADER_VERTEX)
172 nir_remap_attributes(shader, options);
173
174 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
175 if (shader_prog->Label)
176 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
177
178 /* Check for transform feedback varyings specified via the API */
179 shader->info.has_transform_feedback_varyings =
180 shader_prog->TransformFeedback.NumVarying > 0;
181
182 /* Check for transform feedback varyings specified in the Shader */
183 if (shader_prog->last_vert_prog)
184 shader->info.has_transform_feedback_varyings |=
185 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
186
187 return shader;
188 }
189
190 nir_visitor::nir_visitor(nir_shader *shader)
191 {
192 this->supports_ints = shader->options->native_integers;
193 this->shader = shader;
194 this->is_global = true;
195 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
196 _mesa_key_pointer_equal);
197 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
198 _mesa_key_pointer_equal);
199 this->result = NULL;
200 this->impl = NULL;
201 this->var = NULL;
202 this->deref_head = NULL;
203 this->deref_tail = NULL;
204 memset(&this->b, 0, sizeof(this->b));
205 }
206
207 nir_visitor::~nir_visitor()
208 {
209 _mesa_hash_table_destroy(this->var_table, NULL);
210 _mesa_hash_table_destroy(this->overload_table, NULL);
211 }
212
213 nir_deref_var *
214 nir_visitor::evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir)
215 {
216 ir->accept(this);
217 ralloc_steal(mem_ctx, this->deref_head);
218 return this->deref_head;
219 }
220
221 static nir_constant *
222 constant_copy(ir_constant *ir, void *mem_ctx)
223 {
224 if (ir == NULL)
225 return NULL;
226
227 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
228
229 const unsigned rows = ir->type->vector_elements;
230 const unsigned cols = ir->type->matrix_columns;
231 unsigned i;
232
233 ret->num_elements = 0;
234 switch (ir->type->base_type) {
235 case GLSL_TYPE_UINT:
236 /* Only float base types can be matrices. */
237 assert(cols == 1);
238
239 for (unsigned r = 0; r < rows; r++)
240 ret->values[0].u32[r] = ir->value.u[r];
241
242 break;
243
244 case GLSL_TYPE_INT:
245 /* Only float base types can be matrices. */
246 assert(cols == 1);
247
248 for (unsigned r = 0; r < rows; r++)
249 ret->values[0].i32[r] = ir->value.i[r];
250
251 break;
252
253 case GLSL_TYPE_FLOAT:
254 for (unsigned c = 0; c < cols; c++) {
255 for (unsigned r = 0; r < rows; r++)
256 ret->values[c].f32[r] = ir->value.f[c * rows + r];
257 }
258 break;
259
260 case GLSL_TYPE_DOUBLE:
261 for (unsigned c = 0; c < cols; c++) {
262 for (unsigned r = 0; r < rows; r++)
263 ret->values[c].f64[r] = ir->value.d[c * rows + r];
264 }
265 break;
266
267 case GLSL_TYPE_UINT64:
268 /* Only float base types can be matrices. */
269 assert(cols == 1);
270
271 for (unsigned r = 0; r < rows; r++)
272 ret->values[0].u64[r] = ir->value.u64[r];
273 break;
274
275 case GLSL_TYPE_INT64:
276 /* Only float base types can be matrices. */
277 assert(cols == 1);
278
279 for (unsigned r = 0; r < rows; r++)
280 ret->values[0].i64[r] = ir->value.i64[r];
281 break;
282
283 case GLSL_TYPE_BOOL:
284 /* Only float base types can be matrices. */
285 assert(cols == 1);
286
287 for (unsigned r = 0; r < rows; r++)
288 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
289
290 break;
291
292 case GLSL_TYPE_STRUCT:
293 case GLSL_TYPE_ARRAY:
294 ret->elements = ralloc_array(mem_ctx, nir_constant *,
295 ir->type->length);
296 ret->num_elements = ir->type->length;
297
298 for (i = 0; i < ir->type->length; i++)
299 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
300 break;
301
302 default:
303 unreachable("not reached");
304 }
305
306 return ret;
307 }
308
309 void
310 nir_visitor::visit(ir_variable *ir)
311 {
312 /* TODO: In future we should switch to using the NIR lowering pass but for
313 * now just ignore these variables as GLSL IR should have lowered them.
314 * Anything remaining are just dead vars that weren't cleaned up.
315 */
316 if (ir->data.mode == ir_var_shader_shared)
317 return;
318
319 nir_variable *var = rzalloc(shader, nir_variable);
320 var->type = ir->type;
321 var->name = ralloc_strdup(var, ir->name);
322
323 var->data.always_active_io = ir->data.always_active_io;
324 var->data.read_only = ir->data.read_only;
325 var->data.centroid = ir->data.centroid;
326 var->data.sample = ir->data.sample;
327 var->data.patch = ir->data.patch;
328 var->data.invariant = ir->data.invariant;
329 var->data.location = ir->data.location;
330 var->data.stream = ir->data.stream;
331 var->data.compact = false;
332
333 switch(ir->data.mode) {
334 case ir_var_auto:
335 case ir_var_temporary:
336 if (is_global)
337 var->data.mode = nir_var_global;
338 else
339 var->data.mode = nir_var_local;
340 break;
341
342 case ir_var_function_in:
343 case ir_var_function_out:
344 case ir_var_function_inout:
345 case ir_var_const_in:
346 var->data.mode = nir_var_local;
347 break;
348
349 case ir_var_shader_in:
350 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
351 ir->data.location == VARYING_SLOT_FACE) {
352 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
353 var->data.location = SYSTEM_VALUE_FRONT_FACE;
354 var->data.mode = nir_var_system_value;
355 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
356 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
357 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
358 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
359 var->data.mode = nir_var_system_value;
360 } else {
361 var->data.mode = nir_var_shader_in;
362
363 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
364 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
365 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
366 var->data.compact = ir->type->without_array()->is_scalar();
367 }
368 }
369
370 /* Mark all the locations that require two slots */
371 if (shader->info.stage == MESA_SHADER_VERTEX &&
372 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
373 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
374 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
375 shader->info.vs.double_inputs |= bitfield;
376 }
377 }
378 break;
379
380 case ir_var_shader_out:
381 var->data.mode = nir_var_shader_out;
382 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
383 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
384 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
385 var->data.compact = ir->type->without_array()->is_scalar();
386 }
387 break;
388
389 case ir_var_uniform:
390 var->data.mode = nir_var_uniform;
391 break;
392
393 case ir_var_shader_storage:
394 var->data.mode = nir_var_shader_storage;
395 break;
396
397 case ir_var_system_value:
398 var->data.mode = nir_var_system_value;
399 break;
400
401 default:
402 unreachable("not reached");
403 }
404
405 var->data.interpolation = ir->data.interpolation;
406 var->data.origin_upper_left = ir->data.origin_upper_left;
407 var->data.pixel_center_integer = ir->data.pixel_center_integer;
408 var->data.location_frac = ir->data.location_frac;
409
410 if (var->data.pixel_center_integer) {
411 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
412 shader->info.fs.pixel_center_integer = true;
413 }
414
415 switch (ir->data.depth_layout) {
416 case ir_depth_layout_none:
417 var->data.depth_layout = nir_depth_layout_none;
418 break;
419 case ir_depth_layout_any:
420 var->data.depth_layout = nir_depth_layout_any;
421 break;
422 case ir_depth_layout_greater:
423 var->data.depth_layout = nir_depth_layout_greater;
424 break;
425 case ir_depth_layout_less:
426 var->data.depth_layout = nir_depth_layout_less;
427 break;
428 case ir_depth_layout_unchanged:
429 var->data.depth_layout = nir_depth_layout_unchanged;
430 break;
431 default:
432 unreachable("not reached");
433 }
434
435 var->data.index = ir->data.index;
436 var->data.descriptor_set = 0;
437 var->data.binding = ir->data.binding;
438 var->data.bindless = ir->data.bindless;
439 var->data.offset = ir->data.offset;
440 var->data.image.read_only = ir->data.memory_read_only;
441 var->data.image.write_only = ir->data.memory_write_only;
442 var->data.image.coherent = ir->data.memory_coherent;
443 var->data.image._volatile = ir->data.memory_volatile;
444 var->data.image.restrict_flag = ir->data.memory_restrict;
445 var->data.image.format = ir->data.image_format;
446 var->data.fb_fetch_output = ir->data.fb_fetch_output;
447
448 var->num_state_slots = ir->get_num_state_slots();
449 if (var->num_state_slots > 0) {
450 var->state_slots = rzalloc_array(var, nir_state_slot,
451 var->num_state_slots);
452
453 ir_state_slot *state_slots = ir->get_state_slots();
454 for (unsigned i = 0; i < var->num_state_slots; i++) {
455 for (unsigned j = 0; j < 5; j++)
456 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
457 var->state_slots[i].swizzle = state_slots[i].swizzle;
458 }
459 } else {
460 var->state_slots = NULL;
461 }
462
463 var->constant_initializer = constant_copy(ir->constant_initializer, var);
464
465 var->interface_type = ir->get_interface_type();
466
467 if (var->data.mode == nir_var_local)
468 nir_function_impl_add_variable(impl, var);
469 else
470 nir_shader_add_variable(shader, var);
471
472 _mesa_hash_table_insert(var_table, ir, var);
473 this->var = var;
474 }
475
476 ir_visitor_status
477 nir_function_visitor::visit_enter(ir_function *ir)
478 {
479 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
480 visitor->create_function(sig);
481 }
482 return visit_continue_with_parent;
483 }
484
485 void
486 nir_visitor::create_function(ir_function_signature *ir)
487 {
488 if (ir->is_intrinsic())
489 return;
490
491 nir_function *func = nir_function_create(shader, ir->function_name());
492
493 assert(ir->parameters.is_empty());
494 assert(ir->return_type == glsl_type::void_type);
495
496 _mesa_hash_table_insert(this->overload_table, ir, func);
497 }
498
499 void
500 nir_visitor::visit(ir_function *ir)
501 {
502 foreach_in_list(ir_function_signature, sig, &ir->signatures)
503 sig->accept(this);
504 }
505
506 void
507 nir_visitor::visit(ir_function_signature *ir)
508 {
509 if (ir->is_intrinsic())
510 return;
511
512 struct hash_entry *entry =
513 _mesa_hash_table_search(this->overload_table, ir);
514
515 assert(entry);
516 nir_function *func = (nir_function *) entry->data;
517
518 if (ir->is_defined) {
519 nir_function_impl *impl = nir_function_impl_create(func);
520 this->impl = impl;
521
522 assert(strcmp(func->name, "main") == 0);
523 assert(ir->parameters.is_empty());
524 assert(func->return_type == glsl_type::void_type);
525
526 this->is_global = false;
527
528 nir_builder_init(&b, impl);
529 b.cursor = nir_after_cf_list(&impl->body);
530 visit_exec_list(&ir->body, this);
531
532 this->is_global = true;
533 } else {
534 func->impl = NULL;
535 }
536 }
537
538 void
539 nir_visitor::visit(ir_loop *ir)
540 {
541 nir_push_loop(&b);
542 visit_exec_list(&ir->body_instructions, this);
543 nir_pop_loop(&b, NULL);
544 }
545
546 void
547 nir_visitor::visit(ir_if *ir)
548 {
549 nir_push_if(&b, evaluate_rvalue(ir->condition));
550 visit_exec_list(&ir->then_instructions, this);
551 nir_push_else(&b, NULL);
552 visit_exec_list(&ir->else_instructions, this);
553 nir_pop_if(&b, NULL);
554 }
555
556 void
557 nir_visitor::visit(ir_discard *ir)
558 {
559 /*
560 * discards aren't treated as control flow, because before we lower them
561 * they can appear anywhere in the shader and the stuff after them may still
562 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
563 * discards will be immediately followed by a return.
564 */
565
566 nir_intrinsic_instr *discard;
567 if (ir->condition) {
568 discard = nir_intrinsic_instr_create(this->shader,
569 nir_intrinsic_discard_if);
570 discard->src[0] =
571 nir_src_for_ssa(evaluate_rvalue(ir->condition));
572 } else {
573 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
574 }
575
576 nir_builder_instr_insert(&b, &discard->instr);
577 }
578
579 void
580 nir_visitor::visit(ir_emit_vertex *ir)
581 {
582 nir_intrinsic_instr *instr =
583 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
584 nir_intrinsic_set_stream_id(instr, ir->stream_id());
585 nir_builder_instr_insert(&b, &instr->instr);
586 }
587
588 void
589 nir_visitor::visit(ir_end_primitive *ir)
590 {
591 nir_intrinsic_instr *instr =
592 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
593 nir_intrinsic_set_stream_id(instr, ir->stream_id());
594 nir_builder_instr_insert(&b, &instr->instr);
595 }
596
597 void
598 nir_visitor::visit(ir_loop_jump *ir)
599 {
600 nir_jump_type type;
601 switch (ir->mode) {
602 case ir_loop_jump::jump_break:
603 type = nir_jump_break;
604 break;
605 case ir_loop_jump::jump_continue:
606 type = nir_jump_continue;
607 break;
608 default:
609 unreachable("not reached");
610 }
611
612 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
613 nir_builder_instr_insert(&b, &instr->instr);
614 }
615
616 void
617 nir_visitor::visit(ir_return *ir)
618 {
619 if (ir->value != NULL) {
620 nir_intrinsic_instr *copy =
621 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
622
623 copy->variables[0] = nir_deref_var_create(copy, this->impl->return_var);
624 copy->variables[1] = evaluate_deref(&copy->instr, ir->value);
625 }
626
627 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
628 nir_builder_instr_insert(&b, &instr->instr);
629 }
630
631 void
632 nir_visitor::visit(ir_call *ir)
633 {
634 if (ir->callee->is_intrinsic()) {
635 nir_intrinsic_op op;
636
637 switch (ir->callee->intrinsic_id) {
638 case ir_intrinsic_atomic_counter_read:
639 op = nir_intrinsic_atomic_counter_read_var;
640 break;
641 case ir_intrinsic_atomic_counter_increment:
642 op = nir_intrinsic_atomic_counter_inc_var;
643 break;
644 case ir_intrinsic_atomic_counter_predecrement:
645 op = nir_intrinsic_atomic_counter_dec_var;
646 break;
647 case ir_intrinsic_atomic_counter_add:
648 op = nir_intrinsic_atomic_counter_add_var;
649 break;
650 case ir_intrinsic_atomic_counter_and:
651 op = nir_intrinsic_atomic_counter_and_var;
652 break;
653 case ir_intrinsic_atomic_counter_or:
654 op = nir_intrinsic_atomic_counter_or_var;
655 break;
656 case ir_intrinsic_atomic_counter_xor:
657 op = nir_intrinsic_atomic_counter_xor_var;
658 break;
659 case ir_intrinsic_atomic_counter_min:
660 op = nir_intrinsic_atomic_counter_min_var;
661 break;
662 case ir_intrinsic_atomic_counter_max:
663 op = nir_intrinsic_atomic_counter_max_var;
664 break;
665 case ir_intrinsic_atomic_counter_exchange:
666 op = nir_intrinsic_atomic_counter_exchange_var;
667 break;
668 case ir_intrinsic_atomic_counter_comp_swap:
669 op = nir_intrinsic_atomic_counter_comp_swap_var;
670 break;
671 case ir_intrinsic_image_load:
672 op = nir_intrinsic_image_var_load;
673 break;
674 case ir_intrinsic_image_store:
675 op = nir_intrinsic_image_var_store;
676 break;
677 case ir_intrinsic_image_atomic_add:
678 op = nir_intrinsic_image_var_atomic_add;
679 break;
680 case ir_intrinsic_image_atomic_min:
681 op = nir_intrinsic_image_var_atomic_min;
682 break;
683 case ir_intrinsic_image_atomic_max:
684 op = nir_intrinsic_image_var_atomic_max;
685 break;
686 case ir_intrinsic_image_atomic_and:
687 op = nir_intrinsic_image_var_atomic_and;
688 break;
689 case ir_intrinsic_image_atomic_or:
690 op = nir_intrinsic_image_var_atomic_or;
691 break;
692 case ir_intrinsic_image_atomic_xor:
693 op = nir_intrinsic_image_var_atomic_xor;
694 break;
695 case ir_intrinsic_image_atomic_exchange:
696 op = nir_intrinsic_image_var_atomic_exchange;
697 break;
698 case ir_intrinsic_image_atomic_comp_swap:
699 op = nir_intrinsic_image_var_atomic_comp_swap;
700 break;
701 case ir_intrinsic_memory_barrier:
702 op = nir_intrinsic_memory_barrier;
703 break;
704 case ir_intrinsic_image_size:
705 op = nir_intrinsic_image_var_size;
706 break;
707 case ir_intrinsic_image_samples:
708 op = nir_intrinsic_image_var_samples;
709 break;
710 case ir_intrinsic_ssbo_store:
711 op = nir_intrinsic_store_ssbo;
712 break;
713 case ir_intrinsic_ssbo_load:
714 op = nir_intrinsic_load_ssbo;
715 break;
716 case ir_intrinsic_ssbo_atomic_add:
717 op = nir_intrinsic_ssbo_atomic_add;
718 break;
719 case ir_intrinsic_ssbo_atomic_and:
720 op = nir_intrinsic_ssbo_atomic_and;
721 break;
722 case ir_intrinsic_ssbo_atomic_or:
723 op = nir_intrinsic_ssbo_atomic_or;
724 break;
725 case ir_intrinsic_ssbo_atomic_xor:
726 op = nir_intrinsic_ssbo_atomic_xor;
727 break;
728 case ir_intrinsic_ssbo_atomic_min:
729 assert(ir->return_deref);
730 if (ir->return_deref->type == glsl_type::int_type)
731 op = nir_intrinsic_ssbo_atomic_imin;
732 else if (ir->return_deref->type == glsl_type::uint_type)
733 op = nir_intrinsic_ssbo_atomic_umin;
734 else
735 unreachable("Invalid type");
736 break;
737 case ir_intrinsic_ssbo_atomic_max:
738 assert(ir->return_deref);
739 if (ir->return_deref->type == glsl_type::int_type)
740 op = nir_intrinsic_ssbo_atomic_imax;
741 else if (ir->return_deref->type == glsl_type::uint_type)
742 op = nir_intrinsic_ssbo_atomic_umax;
743 else
744 unreachable("Invalid type");
745 break;
746 case ir_intrinsic_ssbo_atomic_exchange:
747 op = nir_intrinsic_ssbo_atomic_exchange;
748 break;
749 case ir_intrinsic_ssbo_atomic_comp_swap:
750 op = nir_intrinsic_ssbo_atomic_comp_swap;
751 break;
752 case ir_intrinsic_shader_clock:
753 op = nir_intrinsic_shader_clock;
754 break;
755 case ir_intrinsic_group_memory_barrier:
756 op = nir_intrinsic_group_memory_barrier;
757 break;
758 case ir_intrinsic_memory_barrier_atomic_counter:
759 op = nir_intrinsic_memory_barrier_atomic_counter;
760 break;
761 case ir_intrinsic_memory_barrier_buffer:
762 op = nir_intrinsic_memory_barrier_buffer;
763 break;
764 case ir_intrinsic_memory_barrier_image:
765 op = nir_intrinsic_memory_barrier_image;
766 break;
767 case ir_intrinsic_memory_barrier_shared:
768 op = nir_intrinsic_memory_barrier_shared;
769 break;
770 case ir_intrinsic_shared_load:
771 op = nir_intrinsic_load_shared;
772 break;
773 case ir_intrinsic_shared_store:
774 op = nir_intrinsic_store_shared;
775 break;
776 case ir_intrinsic_shared_atomic_add:
777 op = nir_intrinsic_shared_atomic_add;
778 break;
779 case ir_intrinsic_shared_atomic_and:
780 op = nir_intrinsic_shared_atomic_and;
781 break;
782 case ir_intrinsic_shared_atomic_or:
783 op = nir_intrinsic_shared_atomic_or;
784 break;
785 case ir_intrinsic_shared_atomic_xor:
786 op = nir_intrinsic_shared_atomic_xor;
787 break;
788 case ir_intrinsic_shared_atomic_min:
789 assert(ir->return_deref);
790 if (ir->return_deref->type == glsl_type::int_type)
791 op = nir_intrinsic_shared_atomic_imin;
792 else if (ir->return_deref->type == glsl_type::uint_type)
793 op = nir_intrinsic_shared_atomic_umin;
794 else
795 unreachable("Invalid type");
796 break;
797 case ir_intrinsic_shared_atomic_max:
798 assert(ir->return_deref);
799 if (ir->return_deref->type == glsl_type::int_type)
800 op = nir_intrinsic_shared_atomic_imax;
801 else if (ir->return_deref->type == glsl_type::uint_type)
802 op = nir_intrinsic_shared_atomic_umax;
803 else
804 unreachable("Invalid type");
805 break;
806 case ir_intrinsic_shared_atomic_exchange:
807 op = nir_intrinsic_shared_atomic_exchange;
808 break;
809 case ir_intrinsic_shared_atomic_comp_swap:
810 op = nir_intrinsic_shared_atomic_comp_swap;
811 break;
812 case ir_intrinsic_vote_any:
813 op = nir_intrinsic_vote_any;
814 break;
815 case ir_intrinsic_vote_all:
816 op = nir_intrinsic_vote_all;
817 break;
818 case ir_intrinsic_vote_eq:
819 op = nir_intrinsic_vote_ieq;
820 break;
821 case ir_intrinsic_ballot:
822 op = nir_intrinsic_ballot;
823 break;
824 case ir_intrinsic_read_invocation:
825 op = nir_intrinsic_read_invocation;
826 break;
827 case ir_intrinsic_read_first_invocation:
828 op = nir_intrinsic_read_first_invocation;
829 break;
830 default:
831 unreachable("not reached");
832 }
833
834 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
835 nir_dest *dest = &instr->dest;
836
837 switch (op) {
838 case nir_intrinsic_atomic_counter_read_var:
839 case nir_intrinsic_atomic_counter_inc_var:
840 case nir_intrinsic_atomic_counter_dec_var:
841 case nir_intrinsic_atomic_counter_add_var:
842 case nir_intrinsic_atomic_counter_min_var:
843 case nir_intrinsic_atomic_counter_max_var:
844 case nir_intrinsic_atomic_counter_and_var:
845 case nir_intrinsic_atomic_counter_or_var:
846 case nir_intrinsic_atomic_counter_xor_var:
847 case nir_intrinsic_atomic_counter_exchange_var:
848 case nir_intrinsic_atomic_counter_comp_swap_var: {
849 /* Set the counter variable dereference. */
850 exec_node *param = ir->actual_parameters.get_head();
851 ir_dereference *counter = (ir_dereference *)param;
852
853 instr->variables[0] = evaluate_deref(&instr->instr, counter);
854 param = param->get_next();
855
856 /* Set the intrinsic destination. */
857 if (ir->return_deref) {
858 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
859 }
860
861 /* Set the intrinsic parameters. */
862 if (!param->is_tail_sentinel()) {
863 instr->src[0] =
864 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
865 param = param->get_next();
866 }
867
868 if (!param->is_tail_sentinel()) {
869 instr->src[1] =
870 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
871 param = param->get_next();
872 }
873
874 nir_builder_instr_insert(&b, &instr->instr);
875 break;
876 }
877 case nir_intrinsic_image_var_load:
878 case nir_intrinsic_image_var_store:
879 case nir_intrinsic_image_var_atomic_add:
880 case nir_intrinsic_image_var_atomic_min:
881 case nir_intrinsic_image_var_atomic_max:
882 case nir_intrinsic_image_var_atomic_and:
883 case nir_intrinsic_image_var_atomic_or:
884 case nir_intrinsic_image_var_atomic_xor:
885 case nir_intrinsic_image_var_atomic_exchange:
886 case nir_intrinsic_image_var_atomic_comp_swap:
887 case nir_intrinsic_image_var_samples:
888 case nir_intrinsic_image_var_size: {
889 nir_ssa_undef_instr *instr_undef =
890 nir_ssa_undef_instr_create(shader, 1, 32);
891 nir_builder_instr_insert(&b, &instr_undef->instr);
892
893 /* Set the image variable dereference. */
894 exec_node *param = ir->actual_parameters.get_head();
895 ir_dereference *image = (ir_dereference *)param;
896 const glsl_type *type =
897 image->variable_referenced()->type->without_array();
898
899 instr->variables[0] = evaluate_deref(&instr->instr, image);
900 param = param->get_next();
901
902 /* Set the intrinsic destination. */
903 if (ir->return_deref) {
904 unsigned num_components = ir->return_deref->type->vector_elements;
905 if (instr->intrinsic == nir_intrinsic_image_var_size)
906 instr->num_components = num_components;
907 nir_ssa_dest_init(&instr->instr, &instr->dest,
908 num_components, 32, NULL);
909 }
910
911 if (op == nir_intrinsic_image_var_size ||
912 op == nir_intrinsic_image_var_samples) {
913 nir_builder_instr_insert(&b, &instr->instr);
914 break;
915 }
916
917 /* Set the address argument, extending the coordinate vector to four
918 * components.
919 */
920 nir_ssa_def *src_addr =
921 evaluate_rvalue((ir_dereference *)param);
922 nir_ssa_def *srcs[4];
923
924 for (int i = 0; i < 4; i++) {
925 if (i < type->coordinate_components())
926 srcs[i] = nir_channel(&b, src_addr, i);
927 else
928 srcs[i] = &instr_undef->def;
929 }
930
931 instr->src[0] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
932 param = param->get_next();
933
934 /* Set the sample argument, which is undefined for single-sample
935 * images.
936 */
937 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
938 instr->src[1] =
939 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
940 param = param->get_next();
941 } else {
942 instr->src[1] = nir_src_for_ssa(&instr_undef->def);
943 }
944
945 /* Set the intrinsic parameters. */
946 if (!param->is_tail_sentinel()) {
947 instr->src[2] =
948 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
949 param = param->get_next();
950 }
951
952 if (!param->is_tail_sentinel()) {
953 instr->src[3] =
954 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
955 param = param->get_next();
956 }
957 nir_builder_instr_insert(&b, &instr->instr);
958 break;
959 }
960 case nir_intrinsic_memory_barrier:
961 case nir_intrinsic_group_memory_barrier:
962 case nir_intrinsic_memory_barrier_atomic_counter:
963 case nir_intrinsic_memory_barrier_buffer:
964 case nir_intrinsic_memory_barrier_image:
965 case nir_intrinsic_memory_barrier_shared:
966 nir_builder_instr_insert(&b, &instr->instr);
967 break;
968 case nir_intrinsic_shader_clock:
969 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
970 instr->num_components = 2;
971 nir_builder_instr_insert(&b, &instr->instr);
972 break;
973 case nir_intrinsic_store_ssbo: {
974 exec_node *param = ir->actual_parameters.get_head();
975 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
976
977 param = param->get_next();
978 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
979
980 param = param->get_next();
981 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
982
983 param = param->get_next();
984 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
985 assert(write_mask);
986
987 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
988 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
989 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
990 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
991 instr->num_components = val->type->vector_elements;
992
993 nir_builder_instr_insert(&b, &instr->instr);
994 break;
995 }
996 case nir_intrinsic_load_ssbo: {
997 exec_node *param = ir->actual_parameters.get_head();
998 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
999
1000 param = param->get_next();
1001 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1002
1003 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1004 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1005
1006 const glsl_type *type = ir->return_deref->var->type;
1007 instr->num_components = type->vector_elements;
1008
1009 /* Setup destination register */
1010 unsigned bit_size = glsl_get_bit_size(type);
1011 nir_ssa_dest_init(&instr->instr, &instr->dest,
1012 type->vector_elements, bit_size, NULL);
1013
1014 /* Insert the created nir instruction now since in the case of boolean
1015 * result we will need to emit another instruction after it
1016 */
1017 nir_builder_instr_insert(&b, &instr->instr);
1018
1019 /*
1020 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1021 * consider a true boolean to be ~0. Fix this up with a != 0
1022 * comparison.
1023 */
1024 if (type->is_boolean()) {
1025 nir_alu_instr *load_ssbo_compare =
1026 nir_alu_instr_create(shader, nir_op_ine);
1027 load_ssbo_compare->src[0].src.is_ssa = true;
1028 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1029 load_ssbo_compare->src[1].src =
1030 nir_src_for_ssa(nir_imm_int(&b, 0));
1031 for (unsigned i = 0; i < type->vector_elements; i++)
1032 load_ssbo_compare->src[1].swizzle[i] = 0;
1033 nir_ssa_dest_init(&load_ssbo_compare->instr,
1034 &load_ssbo_compare->dest.dest,
1035 type->vector_elements, bit_size, NULL);
1036 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1037 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1038 dest = &load_ssbo_compare->dest.dest;
1039 }
1040 break;
1041 }
1042 case nir_intrinsic_ssbo_atomic_add:
1043 case nir_intrinsic_ssbo_atomic_imin:
1044 case nir_intrinsic_ssbo_atomic_umin:
1045 case nir_intrinsic_ssbo_atomic_imax:
1046 case nir_intrinsic_ssbo_atomic_umax:
1047 case nir_intrinsic_ssbo_atomic_and:
1048 case nir_intrinsic_ssbo_atomic_or:
1049 case nir_intrinsic_ssbo_atomic_xor:
1050 case nir_intrinsic_ssbo_atomic_exchange:
1051 case nir_intrinsic_ssbo_atomic_comp_swap: {
1052 int param_count = ir->actual_parameters.length();
1053 assert(param_count == 3 || param_count == 4);
1054
1055 /* Block index */
1056 exec_node *param = ir->actual_parameters.get_head();
1057 ir_instruction *inst = (ir_instruction *) param;
1058 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1059
1060 /* Offset */
1061 param = param->get_next();
1062 inst = (ir_instruction *) param;
1063 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1064
1065 /* data1 parameter (this is always present) */
1066 param = param->get_next();
1067 inst = (ir_instruction *) param;
1068 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1069
1070 /* data2 parameter (only with atomic_comp_swap) */
1071 if (param_count == 4) {
1072 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1073 param = param->get_next();
1074 inst = (ir_instruction *) param;
1075 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1076 }
1077
1078 /* Atomic result */
1079 assert(ir->return_deref);
1080 nir_ssa_dest_init(&instr->instr, &instr->dest,
1081 ir->return_deref->type->vector_elements, 32, NULL);
1082 nir_builder_instr_insert(&b, &instr->instr);
1083 break;
1084 }
1085 case nir_intrinsic_load_shared: {
1086 exec_node *param = ir->actual_parameters.get_head();
1087 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1088
1089 nir_intrinsic_set_base(instr, 0);
1090 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1091
1092 const glsl_type *type = ir->return_deref->var->type;
1093 instr->num_components = type->vector_elements;
1094
1095 /* Setup destination register */
1096 unsigned bit_size = glsl_get_bit_size(type);
1097 nir_ssa_dest_init(&instr->instr, &instr->dest,
1098 type->vector_elements, bit_size, NULL);
1099
1100 nir_builder_instr_insert(&b, &instr->instr);
1101 break;
1102 }
1103 case nir_intrinsic_store_shared: {
1104 exec_node *param = ir->actual_parameters.get_head();
1105 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1106
1107 param = param->get_next();
1108 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1109
1110 param = param->get_next();
1111 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1112 assert(write_mask);
1113
1114 nir_intrinsic_set_base(instr, 0);
1115 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1116
1117 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1118
1119 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1120 instr->num_components = val->type->vector_elements;
1121
1122 nir_builder_instr_insert(&b, &instr->instr);
1123 break;
1124 }
1125 case nir_intrinsic_shared_atomic_add:
1126 case nir_intrinsic_shared_atomic_imin:
1127 case nir_intrinsic_shared_atomic_umin:
1128 case nir_intrinsic_shared_atomic_imax:
1129 case nir_intrinsic_shared_atomic_umax:
1130 case nir_intrinsic_shared_atomic_and:
1131 case nir_intrinsic_shared_atomic_or:
1132 case nir_intrinsic_shared_atomic_xor:
1133 case nir_intrinsic_shared_atomic_exchange:
1134 case nir_intrinsic_shared_atomic_comp_swap: {
1135 int param_count = ir->actual_parameters.length();
1136 assert(param_count == 2 || param_count == 3);
1137
1138 /* Offset */
1139 exec_node *param = ir->actual_parameters.get_head();
1140 ir_instruction *inst = (ir_instruction *) param;
1141 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1142
1143 /* data1 parameter (this is always present) */
1144 param = param->get_next();
1145 inst = (ir_instruction *) param;
1146 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1147
1148 /* data2 parameter (only with atomic_comp_swap) */
1149 if (param_count == 3) {
1150 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1151 param = param->get_next();
1152 inst = (ir_instruction *) param;
1153 instr->src[2] =
1154 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1155 }
1156
1157 /* Atomic result */
1158 assert(ir->return_deref);
1159 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1160 nir_ssa_dest_init(&instr->instr, &instr->dest,
1161 ir->return_deref->type->vector_elements,
1162 bit_size, NULL);
1163 nir_builder_instr_insert(&b, &instr->instr);
1164 break;
1165 }
1166 case nir_intrinsic_vote_any:
1167 case nir_intrinsic_vote_all:
1168 case nir_intrinsic_vote_ieq: {
1169 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1170 instr->num_components = 1;
1171
1172 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1173 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1174
1175 nir_builder_instr_insert(&b, &instr->instr);
1176 break;
1177 }
1178
1179 case nir_intrinsic_ballot: {
1180 nir_ssa_dest_init(&instr->instr, &instr->dest,
1181 ir->return_deref->type->vector_elements, 64, NULL);
1182 instr->num_components = ir->return_deref->type->vector_elements;
1183
1184 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1185 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1186
1187 nir_builder_instr_insert(&b, &instr->instr);
1188 break;
1189 }
1190 case nir_intrinsic_read_invocation: {
1191 nir_ssa_dest_init(&instr->instr, &instr->dest,
1192 ir->return_deref->type->vector_elements, 32, NULL);
1193 instr->num_components = ir->return_deref->type->vector_elements;
1194
1195 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1196 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1197
1198 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1199 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1200
1201 nir_builder_instr_insert(&b, &instr->instr);
1202 break;
1203 }
1204 case nir_intrinsic_read_first_invocation: {
1205 nir_ssa_dest_init(&instr->instr, &instr->dest,
1206 ir->return_deref->type->vector_elements, 32, NULL);
1207 instr->num_components = ir->return_deref->type->vector_elements;
1208
1209 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1210 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1211
1212 nir_builder_instr_insert(&b, &instr->instr);
1213 break;
1214 }
1215 default:
1216 unreachable("not reached");
1217 }
1218
1219 if (ir->return_deref) {
1220 nir_intrinsic_instr *store_instr =
1221 nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
1222 store_instr->num_components = ir->return_deref->type->vector_elements;
1223 nir_intrinsic_set_write_mask(store_instr,
1224 (1 << store_instr->num_components) - 1);
1225
1226 store_instr->variables[0] =
1227 evaluate_deref(&store_instr->instr, ir->return_deref);
1228 store_instr->src[0] = nir_src_for_ssa(&dest->ssa);
1229
1230 nir_builder_instr_insert(&b, &store_instr->instr);
1231 }
1232
1233 return;
1234 }
1235
1236 struct hash_entry *entry =
1237 _mesa_hash_table_search(this->overload_table, ir->callee);
1238 assert(entry);
1239 nir_function *callee = (nir_function *) entry->data;
1240
1241 nir_call_instr *instr = nir_call_instr_create(this->shader, callee);
1242
1243 unsigned i = 0;
1244 foreach_in_list(ir_dereference, param, &ir->actual_parameters) {
1245 instr->params[i] = evaluate_deref(&instr->instr, param);
1246 i++;
1247 }
1248
1249 instr->return_deref = evaluate_deref(&instr->instr, ir->return_deref);
1250 nir_builder_instr_insert(&b, &instr->instr);
1251 }
1252
1253 void
1254 nir_visitor::visit(ir_assignment *ir)
1255 {
1256 unsigned num_components = ir->lhs->type->vector_elements;
1257
1258 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1259 ir->lhs->variable_referenced()->data.precise;
1260
1261 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1262 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1263 /* We're doing a plain-as-can-be copy, so emit a copy_var */
1264 nir_intrinsic_instr *copy =
1265 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
1266
1267 copy->variables[0] = evaluate_deref(&copy->instr, ir->lhs);
1268 copy->variables[1] = evaluate_deref(&copy->instr, ir->rhs);
1269
1270 if (ir->condition) {
1271 nir_push_if(&b, evaluate_rvalue(ir->condition));
1272 nir_builder_instr_insert(&b, &copy->instr);
1273 nir_pop_if(&b, NULL);
1274 } else {
1275 nir_builder_instr_insert(&b, &copy->instr);
1276 }
1277 return;
1278 }
1279
1280 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1281
1282 ir->lhs->accept(this);
1283 nir_deref_var *lhs_deref = this->deref_head;
1284 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1285
1286 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1287 /* GLSL IR will give us the input to the write-masked assignment in a
1288 * single packed vector. So, for example, if the writemask is xzw, then
1289 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1290 * from the load.
1291 */
1292 unsigned swiz[4];
1293 unsigned component = 0;
1294 for (unsigned i = 0; i < 4; i++) {
1295 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1296 }
1297 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1298 }
1299
1300 nir_intrinsic_instr *store =
1301 nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var);
1302 store->num_components = ir->lhs->type->vector_elements;
1303 nir_intrinsic_set_write_mask(store, ir->write_mask);
1304 store->variables[0] = nir_deref_var_clone(lhs_deref, store);
1305 store->src[0] = nir_src_for_ssa(src);
1306
1307 if (ir->condition) {
1308 nir_push_if(&b, evaluate_rvalue(ir->condition));
1309 nir_builder_instr_insert(&b, &store->instr);
1310 nir_pop_if(&b, NULL);
1311 } else {
1312 nir_builder_instr_insert(&b, &store->instr);
1313 }
1314 }
1315
1316 /*
1317 * Given an instruction, returns a pointer to its destination or NULL if there
1318 * is no destination.
1319 *
1320 * Note that this only handles instructions we generate at this level.
1321 */
1322 static nir_dest *
1323 get_instr_dest(nir_instr *instr)
1324 {
1325 nir_alu_instr *alu_instr;
1326 nir_intrinsic_instr *intrinsic_instr;
1327 nir_tex_instr *tex_instr;
1328
1329 switch (instr->type) {
1330 case nir_instr_type_alu:
1331 alu_instr = nir_instr_as_alu(instr);
1332 return &alu_instr->dest.dest;
1333
1334 case nir_instr_type_intrinsic:
1335 intrinsic_instr = nir_instr_as_intrinsic(instr);
1336 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1337 return &intrinsic_instr->dest;
1338 else
1339 return NULL;
1340
1341 case nir_instr_type_tex:
1342 tex_instr = nir_instr_as_tex(instr);
1343 return &tex_instr->dest;
1344
1345 default:
1346 unreachable("not reached");
1347 }
1348
1349 return NULL;
1350 }
1351
1352 void
1353 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1354 unsigned bit_size)
1355 {
1356 nir_dest *dest = get_instr_dest(instr);
1357
1358 if (dest)
1359 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1360
1361 nir_builder_instr_insert(&b, instr);
1362
1363 if (dest) {
1364 assert(dest->is_ssa);
1365 this->result = &dest->ssa;
1366 }
1367 }
1368
1369 nir_ssa_def *
1370 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1371 {
1372 ir->accept(this);
1373 if (ir->as_dereference() || ir->as_constant()) {
1374 /*
1375 * A dereference is being used on the right hand side, which means we
1376 * must emit a variable load.
1377 */
1378
1379 nir_intrinsic_instr *load_instr =
1380 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_var);
1381 load_instr->num_components = ir->type->vector_elements;
1382 load_instr->variables[0] = this->deref_head;
1383 ralloc_steal(load_instr, load_instr->variables[0]);
1384 unsigned bit_size = glsl_get_bit_size(ir->type);
1385 add_instr(&load_instr->instr, ir->type->vector_elements, bit_size);
1386 }
1387
1388 return this->result;
1389 }
1390
1391 static bool
1392 type_is_float(glsl_base_type type)
1393 {
1394 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1395 type == GLSL_TYPE_FLOAT16;
1396 }
1397
1398 static bool
1399 type_is_signed(glsl_base_type type)
1400 {
1401 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1402 type == GLSL_TYPE_INT16;
1403 }
1404
1405 void
1406 nir_visitor::visit(ir_expression *ir)
1407 {
1408 /* Some special cases */
1409 switch (ir->operation) {
1410 case ir_binop_ubo_load: {
1411 nir_intrinsic_instr *load =
1412 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1413 unsigned bit_size = glsl_get_bit_size(ir->type);
1414 load->num_components = ir->type->vector_elements;
1415 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1416 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1417 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1418
1419 /*
1420 * In UBO's, a true boolean value is any non-zero value, but we consider
1421 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1422 */
1423
1424 if (ir->type->is_boolean())
1425 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1426
1427 return;
1428 }
1429
1430 case ir_unop_interpolate_at_centroid:
1431 case ir_binop_interpolate_at_offset:
1432 case ir_binop_interpolate_at_sample: {
1433 ir_dereference *deref = ir->operands[0]->as_dereference();
1434 ir_swizzle *swizzle = NULL;
1435 if (!deref) {
1436 /* the api does not allow a swizzle here, but the varying packing code
1437 * may have pushed one into here.
1438 */
1439 swizzle = ir->operands[0]->as_swizzle();
1440 assert(swizzle);
1441 deref = swizzle->val->as_dereference();
1442 assert(deref);
1443 }
1444
1445 deref->accept(this);
1446
1447 nir_intrinsic_op op;
1448 if (this->deref_head->var->data.mode == nir_var_shader_in) {
1449 switch (ir->operation) {
1450 case ir_unop_interpolate_at_centroid:
1451 op = nir_intrinsic_interp_var_at_centroid;
1452 break;
1453 case ir_binop_interpolate_at_offset:
1454 op = nir_intrinsic_interp_var_at_offset;
1455 break;
1456 case ir_binop_interpolate_at_sample:
1457 op = nir_intrinsic_interp_var_at_sample;
1458 break;
1459 default:
1460 unreachable("Invalid interpolation intrinsic");
1461 }
1462 } else {
1463 /* This case can happen if the vertex shader does not write the
1464 * given varying. In this case, the linker will lower it to a
1465 * global variable. Since interpolating a variable makes no
1466 * sense, we'll just turn it into a load which will probably
1467 * eventually end up as an SSA definition.
1468 */
1469 assert(this->deref_head->var->data.mode == nir_var_global);
1470 op = nir_intrinsic_load_var;
1471 }
1472
1473 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1474 intrin->num_components = deref->type->vector_elements;
1475 intrin->variables[0] = this->deref_head;
1476 ralloc_steal(intrin, intrin->variables[0]);
1477
1478 if (intrin->intrinsic == nir_intrinsic_interp_var_at_offset ||
1479 intrin->intrinsic == nir_intrinsic_interp_var_at_sample)
1480 intrin->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1481
1482 unsigned bit_size = glsl_get_bit_size(deref->type);
1483 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1484
1485 if (swizzle) {
1486 unsigned swiz[4] = {
1487 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1488 };
1489
1490 result = nir_swizzle(&b, result, swiz,
1491 swizzle->type->vector_elements, false);
1492 }
1493
1494 return;
1495 }
1496
1497 default:
1498 break;
1499 }
1500
1501 nir_ssa_def *srcs[4];
1502 for (unsigned i = 0; i < ir->num_operands; i++)
1503 srcs[i] = evaluate_rvalue(ir->operands[i]);
1504
1505 glsl_base_type types[4];
1506 for (unsigned i = 0; i < ir->num_operands; i++)
1507 if (supports_ints)
1508 types[i] = ir->operands[i]->type->base_type;
1509 else
1510 types[i] = GLSL_TYPE_FLOAT;
1511
1512 glsl_base_type out_type;
1513 if (supports_ints)
1514 out_type = ir->type->base_type;
1515 else
1516 out_type = GLSL_TYPE_FLOAT;
1517
1518 switch (ir->operation) {
1519 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1520 case ir_unop_logic_not:
1521 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1522 break;
1523 case ir_unop_neg:
1524 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1525 : nir_ineg(&b, srcs[0]);
1526 break;
1527 case ir_unop_abs:
1528 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1529 : nir_iabs(&b, srcs[0]);
1530 break;
1531 case ir_unop_saturate:
1532 assert(type_is_float(types[0]));
1533 result = nir_fsat(&b, srcs[0]);
1534 break;
1535 case ir_unop_sign:
1536 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1537 : nir_isign(&b, srcs[0]);
1538 break;
1539 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1540 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1541 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1542 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1543 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1544 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1545 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1546 case ir_unop_i2f:
1547 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1548 break;
1549 case ir_unop_u2f:
1550 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1551 break;
1552 case ir_unop_b2f:
1553 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1554 break;
1555 case ir_unop_f2i:
1556 case ir_unop_f2u:
1557 case ir_unop_f2b:
1558 case ir_unop_i2b:
1559 case ir_unop_b2i:
1560 case ir_unop_b2i64:
1561 case ir_unop_d2f:
1562 case ir_unop_f2d:
1563 case ir_unop_d2i:
1564 case ir_unop_d2u:
1565 case ir_unop_d2b:
1566 case ir_unop_i2d:
1567 case ir_unop_u2d:
1568 case ir_unop_i642i:
1569 case ir_unop_i642u:
1570 case ir_unop_i642f:
1571 case ir_unop_i642b:
1572 case ir_unop_i642d:
1573 case ir_unop_u642i:
1574 case ir_unop_u642u:
1575 case ir_unop_u642f:
1576 case ir_unop_u642d:
1577 case ir_unop_i2i64:
1578 case ir_unop_u2i64:
1579 case ir_unop_f2i64:
1580 case ir_unop_d2i64:
1581 case ir_unop_i2u64:
1582 case ir_unop_u2u64:
1583 case ir_unop_f2u64:
1584 case ir_unop_d2u64:
1585 case ir_unop_i2u:
1586 case ir_unop_u2i:
1587 case ir_unop_i642u64:
1588 case ir_unop_u642i64: {
1589 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1590 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1591 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1592 nir_rounding_mode_undef),
1593 srcs[0], NULL, NULL, NULL);
1594 /* b2i and b2f don't have fixed bit-size versions so the builder will
1595 * just assume 32 and we have to fix it up here.
1596 */
1597 result->bit_size = nir_alu_type_get_type_size(dst_type);
1598 break;
1599 }
1600
1601 case ir_unop_bitcast_i2f:
1602 case ir_unop_bitcast_f2i:
1603 case ir_unop_bitcast_u2f:
1604 case ir_unop_bitcast_f2u:
1605 case ir_unop_bitcast_i642d:
1606 case ir_unop_bitcast_d2i64:
1607 case ir_unop_bitcast_u642d:
1608 case ir_unop_bitcast_d2u64:
1609 case ir_unop_subroutine_to_int:
1610 /* no-op */
1611 result = nir_imov(&b, srcs[0]);
1612 break;
1613 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1614 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1615 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1616 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1617 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1618 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1619 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1620 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1621 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1622 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1623 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1624 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1625 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1626 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1627 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1628 case ir_unop_pack_snorm_2x16:
1629 result = nir_pack_snorm_2x16(&b, srcs[0]);
1630 break;
1631 case ir_unop_pack_snorm_4x8:
1632 result = nir_pack_snorm_4x8(&b, srcs[0]);
1633 break;
1634 case ir_unop_pack_unorm_2x16:
1635 result = nir_pack_unorm_2x16(&b, srcs[0]);
1636 break;
1637 case ir_unop_pack_unorm_4x8:
1638 result = nir_pack_unorm_4x8(&b, srcs[0]);
1639 break;
1640 case ir_unop_pack_half_2x16:
1641 result = nir_pack_half_2x16(&b, srcs[0]);
1642 break;
1643 case ir_unop_unpack_snorm_2x16:
1644 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1645 break;
1646 case ir_unop_unpack_snorm_4x8:
1647 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1648 break;
1649 case ir_unop_unpack_unorm_2x16:
1650 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1651 break;
1652 case ir_unop_unpack_unorm_4x8:
1653 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1654 break;
1655 case ir_unop_unpack_half_2x16:
1656 result = nir_unpack_half_2x16(&b, srcs[0]);
1657 break;
1658 case ir_unop_pack_sampler_2x32:
1659 case ir_unop_pack_image_2x32:
1660 case ir_unop_pack_double_2x32:
1661 case ir_unop_pack_int_2x32:
1662 case ir_unop_pack_uint_2x32:
1663 result = nir_pack_64_2x32(&b, srcs[0]);
1664 break;
1665 case ir_unop_unpack_sampler_2x32:
1666 case ir_unop_unpack_image_2x32:
1667 case ir_unop_unpack_double_2x32:
1668 case ir_unop_unpack_int_2x32:
1669 case ir_unop_unpack_uint_2x32:
1670 result = nir_unpack_64_2x32(&b, srcs[0]);
1671 break;
1672 case ir_unop_bitfield_reverse:
1673 result = nir_bitfield_reverse(&b, srcs[0]);
1674 break;
1675 case ir_unop_bit_count:
1676 result = nir_bit_count(&b, srcs[0]);
1677 break;
1678 case ir_unop_find_msb:
1679 switch (types[0]) {
1680 case GLSL_TYPE_UINT:
1681 result = nir_ufind_msb(&b, srcs[0]);
1682 break;
1683 case GLSL_TYPE_INT:
1684 result = nir_ifind_msb(&b, srcs[0]);
1685 break;
1686 default:
1687 unreachable("Invalid type for findMSB()");
1688 }
1689 break;
1690 case ir_unop_find_lsb:
1691 result = nir_find_lsb(&b, srcs[0]);
1692 break;
1693
1694 case ir_unop_noise:
1695 switch (ir->type->vector_elements) {
1696 case 1:
1697 switch (ir->operands[0]->type->vector_elements) {
1698 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1699 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1700 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1701 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1702 default: unreachable("not reached");
1703 }
1704 break;
1705 case 2:
1706 switch (ir->operands[0]->type->vector_elements) {
1707 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1708 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1709 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1710 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1711 default: unreachable("not reached");
1712 }
1713 break;
1714 case 3:
1715 switch (ir->operands[0]->type->vector_elements) {
1716 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1717 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1718 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1719 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1720 default: unreachable("not reached");
1721 }
1722 break;
1723 case 4:
1724 switch (ir->operands[0]->type->vector_elements) {
1725 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1726 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1727 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1728 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1729 default: unreachable("not reached");
1730 }
1731 break;
1732 default:
1733 unreachable("not reached");
1734 }
1735 break;
1736 case ir_unop_get_buffer_size: {
1737 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1738 this->shader,
1739 nir_intrinsic_get_buffer_size);
1740 load->num_components = ir->type->vector_elements;
1741 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1742 unsigned bit_size = glsl_get_bit_size(ir->type);
1743 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1744 return;
1745 }
1746
1747 case ir_binop_add:
1748 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1749 : nir_iadd(&b, srcs[0], srcs[1]);
1750 break;
1751 case ir_binop_sub:
1752 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1753 : nir_isub(&b, srcs[0], srcs[1]);
1754 break;
1755 case ir_binop_mul:
1756 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1757 : nir_imul(&b, srcs[0], srcs[1]);
1758 break;
1759 case ir_binop_div:
1760 if (type_is_float(out_type))
1761 result = nir_fdiv(&b, srcs[0], srcs[1]);
1762 else if (type_is_signed(out_type))
1763 result = nir_idiv(&b, srcs[0], srcs[1]);
1764 else
1765 result = nir_udiv(&b, srcs[0], srcs[1]);
1766 break;
1767 case ir_binop_mod:
1768 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1769 : nir_umod(&b, srcs[0], srcs[1]);
1770 break;
1771 case ir_binop_min:
1772 if (type_is_float(out_type))
1773 result = nir_fmin(&b, srcs[0], srcs[1]);
1774 else if (type_is_signed(out_type))
1775 result = nir_imin(&b, srcs[0], srcs[1]);
1776 else
1777 result = nir_umin(&b, srcs[0], srcs[1]);
1778 break;
1779 case ir_binop_max:
1780 if (type_is_float(out_type))
1781 result = nir_fmax(&b, srcs[0], srcs[1]);
1782 else if (type_is_signed(out_type))
1783 result = nir_imax(&b, srcs[0], srcs[1]);
1784 else
1785 result = nir_umax(&b, srcs[0], srcs[1]);
1786 break;
1787 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1788 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1789 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1790 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1791 case ir_binop_logic_and:
1792 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1793 : nir_fand(&b, srcs[0], srcs[1]);
1794 break;
1795 case ir_binop_logic_or:
1796 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1797 : nir_for(&b, srcs[0], srcs[1]);
1798 break;
1799 case ir_binop_logic_xor:
1800 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1801 : nir_fxor(&b, srcs[0], srcs[1]);
1802 break;
1803 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1804 case ir_binop_rshift:
1805 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1806 : nir_ushr(&b, srcs[0], srcs[1]);
1807 break;
1808 case ir_binop_imul_high:
1809 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1810 : nir_umul_high(&b, srcs[0], srcs[1]);
1811 break;
1812 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1813 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1814 case ir_binop_less:
1815 if (supports_ints) {
1816 if (type_is_float(types[0]))
1817 result = nir_flt(&b, srcs[0], srcs[1]);
1818 else if (type_is_signed(types[0]))
1819 result = nir_ilt(&b, srcs[0], srcs[1]);
1820 else
1821 result = nir_ult(&b, srcs[0], srcs[1]);
1822 } else {
1823 result = nir_slt(&b, srcs[0], srcs[1]);
1824 }
1825 break;
1826 case ir_binop_gequal:
1827 if (supports_ints) {
1828 if (type_is_float(types[0]))
1829 result = nir_fge(&b, srcs[0], srcs[1]);
1830 else if (type_is_signed(types[0]))
1831 result = nir_ige(&b, srcs[0], srcs[1]);
1832 else
1833 result = nir_uge(&b, srcs[0], srcs[1]);
1834 } else {
1835 result = nir_slt(&b, srcs[0], srcs[1]);
1836 }
1837 break;
1838 case ir_binop_equal:
1839 if (supports_ints) {
1840 if (type_is_float(types[0]))
1841 result = nir_feq(&b, srcs[0], srcs[1]);
1842 else
1843 result = nir_ieq(&b, srcs[0], srcs[1]);
1844 } else {
1845 result = nir_seq(&b, srcs[0], srcs[1]);
1846 }
1847 break;
1848 case ir_binop_nequal:
1849 if (supports_ints) {
1850 if (type_is_float(types[0]))
1851 result = nir_fne(&b, srcs[0], srcs[1]);
1852 else
1853 result = nir_ine(&b, srcs[0], srcs[1]);
1854 } else {
1855 result = nir_sne(&b, srcs[0], srcs[1]);
1856 }
1857 break;
1858 case ir_binop_all_equal:
1859 if (supports_ints) {
1860 if (type_is_float(types[0])) {
1861 switch (ir->operands[0]->type->vector_elements) {
1862 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1863 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1864 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1865 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1866 default:
1867 unreachable("not reached");
1868 }
1869 } else {
1870 switch (ir->operands[0]->type->vector_elements) {
1871 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1872 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1873 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1874 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1875 default:
1876 unreachable("not reached");
1877 }
1878 }
1879 } else {
1880 switch (ir->operands[0]->type->vector_elements) {
1881 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1882 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1883 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1884 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1885 default:
1886 unreachable("not reached");
1887 }
1888 }
1889 break;
1890 case ir_binop_any_nequal:
1891 if (supports_ints) {
1892 if (type_is_float(types[0])) {
1893 switch (ir->operands[0]->type->vector_elements) {
1894 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1895 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1896 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1897 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1898 default:
1899 unreachable("not reached");
1900 }
1901 } else {
1902 switch (ir->operands[0]->type->vector_elements) {
1903 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1904 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1905 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1906 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1907 default:
1908 unreachable("not reached");
1909 }
1910 }
1911 } else {
1912 switch (ir->operands[0]->type->vector_elements) {
1913 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1914 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1915 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1916 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1917 default:
1918 unreachable("not reached");
1919 }
1920 }
1921 break;
1922 case ir_binop_dot:
1923 switch (ir->operands[0]->type->vector_elements) {
1924 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1925 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1926 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1927 default:
1928 unreachable("not reached");
1929 }
1930 break;
1931
1932 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1933 case ir_triop_fma:
1934 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1935 break;
1936 case ir_triop_lrp:
1937 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1938 break;
1939 case ir_triop_csel:
1940 if (supports_ints)
1941 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1942 else
1943 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1944 break;
1945 case ir_triop_bitfield_extract:
1946 result = (out_type == GLSL_TYPE_INT) ?
1947 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1948 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1949 break;
1950 case ir_quadop_bitfield_insert:
1951 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1952 break;
1953 case ir_quadop_vector:
1954 result = nir_vec(&b, srcs, ir->type->vector_elements);
1955 break;
1956
1957 default:
1958 unreachable("not reached");
1959 }
1960 }
1961
1962 void
1963 nir_visitor::visit(ir_swizzle *ir)
1964 {
1965 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1966 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1967 ir->type->vector_elements, !supports_ints);
1968 }
1969
1970 void
1971 nir_visitor::visit(ir_texture *ir)
1972 {
1973 unsigned num_srcs;
1974 nir_texop op;
1975 switch (ir->op) {
1976 case ir_tex:
1977 op = nir_texop_tex;
1978 num_srcs = 1; /* coordinate */
1979 break;
1980
1981 case ir_txb:
1982 case ir_txl:
1983 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1984 num_srcs = 2; /* coordinate, bias/lod */
1985 break;
1986
1987 case ir_txd:
1988 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1989 num_srcs = 3;
1990 break;
1991
1992 case ir_txf:
1993 op = nir_texop_txf;
1994 if (ir->lod_info.lod != NULL)
1995 num_srcs = 2; /* coordinate, lod */
1996 else
1997 num_srcs = 1; /* coordinate */
1998 break;
1999
2000 case ir_txf_ms:
2001 op = nir_texop_txf_ms;
2002 num_srcs = 2; /* coordinate, sample_index */
2003 break;
2004
2005 case ir_txs:
2006 op = nir_texop_txs;
2007 if (ir->lod_info.lod != NULL)
2008 num_srcs = 1; /* lod */
2009 else
2010 num_srcs = 0;
2011 break;
2012
2013 case ir_lod:
2014 op = nir_texop_lod;
2015 num_srcs = 1; /* coordinate */
2016 break;
2017
2018 case ir_tg4:
2019 op = nir_texop_tg4;
2020 num_srcs = 1; /* coordinate */
2021 break;
2022
2023 case ir_query_levels:
2024 op = nir_texop_query_levels;
2025 num_srcs = 0;
2026 break;
2027
2028 case ir_texture_samples:
2029 op = nir_texop_texture_samples;
2030 num_srcs = 0;
2031 break;
2032
2033 case ir_samples_identical:
2034 op = nir_texop_samples_identical;
2035 num_srcs = 1; /* coordinate */
2036 break;
2037
2038 default:
2039 unreachable("not reached");
2040 }
2041
2042 if (ir->projector != NULL)
2043 num_srcs++;
2044 if (ir->shadow_comparator != NULL)
2045 num_srcs++;
2046 if (ir->offset != NULL)
2047 num_srcs++;
2048
2049 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2050
2051 instr->op = op;
2052 instr->sampler_dim =
2053 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2054 instr->is_array = ir->sampler->type->sampler_array;
2055 instr->is_shadow = ir->sampler->type->sampler_shadow;
2056 if (instr->is_shadow)
2057 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2058 switch (ir->type->base_type) {
2059 case GLSL_TYPE_FLOAT:
2060 instr->dest_type = nir_type_float;
2061 break;
2062 case GLSL_TYPE_INT:
2063 instr->dest_type = nir_type_int;
2064 break;
2065 case GLSL_TYPE_BOOL:
2066 case GLSL_TYPE_UINT:
2067 instr->dest_type = nir_type_uint;
2068 break;
2069 default:
2070 unreachable("not reached");
2071 }
2072
2073 instr->texture = evaluate_deref(&instr->instr, ir->sampler);
2074
2075 unsigned src_number = 0;
2076
2077 if (ir->coordinate != NULL) {
2078 instr->coord_components = ir->coordinate->type->vector_elements;
2079 instr->src[src_number].src =
2080 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2081 instr->src[src_number].src_type = nir_tex_src_coord;
2082 src_number++;
2083 }
2084
2085 if (ir->projector != NULL) {
2086 instr->src[src_number].src =
2087 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2088 instr->src[src_number].src_type = nir_tex_src_projector;
2089 src_number++;
2090 }
2091
2092 if (ir->shadow_comparator != NULL) {
2093 instr->src[src_number].src =
2094 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2095 instr->src[src_number].src_type = nir_tex_src_comparator;
2096 src_number++;
2097 }
2098
2099 if (ir->offset != NULL) {
2100 /* we don't support multiple offsets yet */
2101 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2102
2103 instr->src[src_number].src =
2104 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2105 instr->src[src_number].src_type = nir_tex_src_offset;
2106 src_number++;
2107 }
2108
2109 switch (ir->op) {
2110 case ir_txb:
2111 instr->src[src_number].src =
2112 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2113 instr->src[src_number].src_type = nir_tex_src_bias;
2114 src_number++;
2115 break;
2116
2117 case ir_txl:
2118 case ir_txf:
2119 case ir_txs:
2120 if (ir->lod_info.lod != NULL) {
2121 instr->src[src_number].src =
2122 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2123 instr->src[src_number].src_type = nir_tex_src_lod;
2124 src_number++;
2125 }
2126 break;
2127
2128 case ir_txd:
2129 instr->src[src_number].src =
2130 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2131 instr->src[src_number].src_type = nir_tex_src_ddx;
2132 src_number++;
2133 instr->src[src_number].src =
2134 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2135 instr->src[src_number].src_type = nir_tex_src_ddy;
2136 src_number++;
2137 break;
2138
2139 case ir_txf_ms:
2140 instr->src[src_number].src =
2141 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2142 instr->src[src_number].src_type = nir_tex_src_ms_index;
2143 src_number++;
2144 break;
2145
2146 case ir_tg4:
2147 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2148 break;
2149
2150 default:
2151 break;
2152 }
2153
2154 assert(src_number == num_srcs);
2155
2156 unsigned bit_size = glsl_get_bit_size(ir->type);
2157 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2158 }
2159
2160 void
2161 nir_visitor::visit(ir_constant *ir)
2162 {
2163 /*
2164 * We don't know if this variable is an array or struct that gets
2165 * dereferenced, so do the safe thing an make it a variable with a
2166 * constant initializer and return a dereference.
2167 */
2168
2169 nir_variable *var =
2170 nir_local_variable_create(this->impl, ir->type, "const_temp");
2171 var->data.read_only = true;
2172 var->constant_initializer = constant_copy(ir, var);
2173
2174 this->deref_head = nir_deref_var_create(this->shader, var);
2175 this->deref_tail = &this->deref_head->deref;
2176 }
2177
2178 void
2179 nir_visitor::visit(ir_dereference_variable *ir)
2180 {
2181 struct hash_entry *entry =
2182 _mesa_hash_table_search(this->var_table, ir->var);
2183 assert(entry);
2184 nir_variable *var = (nir_variable *) entry->data;
2185
2186 nir_deref_var *deref = nir_deref_var_create(this->shader, var);
2187 this->deref_head = deref;
2188 this->deref_tail = &deref->deref;
2189 }
2190
2191 void
2192 nir_visitor::visit(ir_dereference_record *ir)
2193 {
2194 ir->record->accept(this);
2195
2196 int field_index = ir->field_idx;
2197 assert(field_index >= 0);
2198
2199 nir_deref_struct *deref = nir_deref_struct_create(this->deref_tail, field_index);
2200 deref->deref.type = ir->type;
2201 this->deref_tail->child = &deref->deref;
2202 this->deref_tail = &deref->deref;
2203 }
2204
2205 void
2206 nir_visitor::visit(ir_dereference_array *ir)
2207 {
2208 nir_deref_array *deref = nir_deref_array_create(this->shader);
2209 deref->deref.type = ir->type;
2210
2211 ir_constant *const_index = ir->array_index->as_constant();
2212 if (const_index != NULL) {
2213 deref->deref_array_type = nir_deref_array_type_direct;
2214 deref->base_offset = const_index->value.u[0];
2215 } else {
2216 deref->deref_array_type = nir_deref_array_type_indirect;
2217 deref->indirect =
2218 nir_src_for_ssa(evaluate_rvalue(ir->array_index));
2219 }
2220
2221 ir->array->accept(this);
2222
2223 this->deref_tail->child = &deref->deref;
2224 ralloc_steal(this->deref_tail, deref);
2225 this->deref_tail = &deref->deref;
2226 }
2227
2228 void
2229 nir_visitor::visit(ir_barrier *)
2230 {
2231 nir_intrinsic_instr *instr =
2232 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2233 nir_builder_instr_insert(&b, &instr->instr);
2234 }