nir: Make image load/store intrinsics variable-width
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 /*
38 * pass to lower GLSL IR to NIR
39 *
40 * This will lower variable dereferences to loads/stores of corresponding
41 * variables in NIR - the variables will be converted to registers in a later
42 * pass.
43 */
44
45 namespace {
46
47 class nir_visitor : public ir_visitor
48 {
49 public:
50 nir_visitor(nir_shader *shader);
51 ~nir_visitor();
52
53 virtual void visit(ir_variable *);
54 virtual void visit(ir_function *);
55 virtual void visit(ir_function_signature *);
56 virtual void visit(ir_loop *);
57 virtual void visit(ir_if *);
58 virtual void visit(ir_discard *);
59 virtual void visit(ir_loop_jump *);
60 virtual void visit(ir_return *);
61 virtual void visit(ir_call *);
62 virtual void visit(ir_assignment *);
63 virtual void visit(ir_emit_vertex *);
64 virtual void visit(ir_end_primitive *);
65 virtual void visit(ir_expression *);
66 virtual void visit(ir_swizzle *);
67 virtual void visit(ir_texture *);
68 virtual void visit(ir_constant *);
69 virtual void visit(ir_dereference_variable *);
70 virtual void visit(ir_dereference_record *);
71 virtual void visit(ir_dereference_array *);
72 virtual void visit(ir_barrier *);
73
74 void create_function(ir_function_signature *ir);
75
76 private:
77 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
78 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
79
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
83 nir_ssa_def *src2);
84 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
85 nir_ssa_def *src2, nir_ssa_def *src3);
86
87 bool supports_ints;
88
89 nir_shader *shader;
90 nir_function_impl *impl;
91 nir_builder b;
92 nir_ssa_def *result; /* result of the expression tree last visited */
93
94 nir_deref_instr *evaluate_deref(ir_instruction *ir);
95
96 /* most recent deref instruction created */
97 nir_deref_instr *deref;
98
99 nir_variable *var; /* variable created by ir_variable visitor */
100
101 /* whether the IR we're operating on is per-function or global */
102 bool is_global;
103
104 /* map of ir_variable -> nir_variable */
105 struct hash_table *var_table;
106
107 /* map of ir_function_signature -> nir_function_overload */
108 struct hash_table *overload_table;
109 };
110
111 /*
112 * This visitor runs before the main visitor, calling create_function() for
113 * each function so that the main visitor can resolve forward references in
114 * calls.
115 */
116
117 class nir_function_visitor : public ir_hierarchical_visitor
118 {
119 public:
120 nir_function_visitor(nir_visitor *v) : visitor(v)
121 {
122 }
123 virtual ir_visitor_status visit_enter(ir_function *);
124
125 private:
126 nir_visitor *visitor;
127 };
128
129 } /* end of anonymous namespace */
130
131 nir_shader *
132 glsl_to_nir(const struct gl_shader_program *shader_prog,
133 gl_shader_stage stage,
134 const nir_shader_compiler_options *options)
135 {
136 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
137
138 nir_shader *shader = nir_shader_create(NULL, stage, options,
139 &sh->Program->info);
140
141 nir_visitor v1(shader);
142 nir_function_visitor v2(&v1);
143 v2.run(sh->ir);
144 visit_exec_list(sh->ir, &v1);
145
146 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
147
148 /* Remap the locations to slots so those requiring two slots will occupy
149 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
150 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
151 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
152 if (shader->info.stage == MESA_SHADER_VERTEX)
153 nir_remap_attributes(shader, options);
154
155 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
156 if (shader_prog->Label)
157 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
158
159 /* Check for transform feedback varyings specified via the API */
160 shader->info.has_transform_feedback_varyings =
161 shader_prog->TransformFeedback.NumVarying > 0;
162
163 /* Check for transform feedback varyings specified in the Shader */
164 if (shader_prog->last_vert_prog)
165 shader->info.has_transform_feedback_varyings |=
166 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
167
168 return shader;
169 }
170
171 nir_visitor::nir_visitor(nir_shader *shader)
172 {
173 this->supports_ints = shader->options->native_integers;
174 this->shader = shader;
175 this->is_global = true;
176 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
177 _mesa_key_pointer_equal);
178 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
179 _mesa_key_pointer_equal);
180 this->result = NULL;
181 this->impl = NULL;
182 this->var = NULL;
183 memset(&this->b, 0, sizeof(this->b));
184 }
185
186 nir_visitor::~nir_visitor()
187 {
188 _mesa_hash_table_destroy(this->var_table, NULL);
189 _mesa_hash_table_destroy(this->overload_table, NULL);
190 }
191
192 nir_deref_instr *
193 nir_visitor::evaluate_deref(ir_instruction *ir)
194 {
195 ir->accept(this);
196 return this->deref;
197 }
198
199 static nir_constant *
200 constant_copy(ir_constant *ir, void *mem_ctx)
201 {
202 if (ir == NULL)
203 return NULL;
204
205 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
206
207 const unsigned rows = ir->type->vector_elements;
208 const unsigned cols = ir->type->matrix_columns;
209 unsigned i;
210
211 ret->num_elements = 0;
212 switch (ir->type->base_type) {
213 case GLSL_TYPE_UINT:
214 /* Only float base types can be matrices. */
215 assert(cols == 1);
216
217 for (unsigned r = 0; r < rows; r++)
218 ret->values[0].u32[r] = ir->value.u[r];
219
220 break;
221
222 case GLSL_TYPE_INT:
223 /* Only float base types can be matrices. */
224 assert(cols == 1);
225
226 for (unsigned r = 0; r < rows; r++)
227 ret->values[0].i32[r] = ir->value.i[r];
228
229 break;
230
231 case GLSL_TYPE_FLOAT:
232 for (unsigned c = 0; c < cols; c++) {
233 for (unsigned r = 0; r < rows; r++)
234 ret->values[c].f32[r] = ir->value.f[c * rows + r];
235 }
236 break;
237
238 case GLSL_TYPE_DOUBLE:
239 for (unsigned c = 0; c < cols; c++) {
240 for (unsigned r = 0; r < rows; r++)
241 ret->values[c].f64[r] = ir->value.d[c * rows + r];
242 }
243 break;
244
245 case GLSL_TYPE_UINT64:
246 /* Only float base types can be matrices. */
247 assert(cols == 1);
248
249 for (unsigned r = 0; r < rows; r++)
250 ret->values[0].u64[r] = ir->value.u64[r];
251 break;
252
253 case GLSL_TYPE_INT64:
254 /* Only float base types can be matrices. */
255 assert(cols == 1);
256
257 for (unsigned r = 0; r < rows; r++)
258 ret->values[0].i64[r] = ir->value.i64[r];
259 break;
260
261 case GLSL_TYPE_BOOL:
262 /* Only float base types can be matrices. */
263 assert(cols == 1);
264
265 for (unsigned r = 0; r < rows; r++)
266 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
267
268 break;
269
270 case GLSL_TYPE_STRUCT:
271 case GLSL_TYPE_ARRAY:
272 ret->elements = ralloc_array(mem_ctx, nir_constant *,
273 ir->type->length);
274 ret->num_elements = ir->type->length;
275
276 for (i = 0; i < ir->type->length; i++)
277 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
278 break;
279
280 default:
281 unreachable("not reached");
282 }
283
284 return ret;
285 }
286
287 void
288 nir_visitor::visit(ir_variable *ir)
289 {
290 /* TODO: In future we should switch to using the NIR lowering pass but for
291 * now just ignore these variables as GLSL IR should have lowered them.
292 * Anything remaining are just dead vars that weren't cleaned up.
293 */
294 if (ir->data.mode == ir_var_shader_shared)
295 return;
296
297 nir_variable *var = rzalloc(shader, nir_variable);
298 var->type = ir->type;
299 var->name = ralloc_strdup(var, ir->name);
300
301 var->data.always_active_io = ir->data.always_active_io;
302 var->data.read_only = ir->data.read_only;
303 var->data.centroid = ir->data.centroid;
304 var->data.sample = ir->data.sample;
305 var->data.patch = ir->data.patch;
306 var->data.invariant = ir->data.invariant;
307 var->data.location = ir->data.location;
308 var->data.stream = ir->data.stream;
309 var->data.compact = false;
310
311 switch(ir->data.mode) {
312 case ir_var_auto:
313 case ir_var_temporary:
314 if (is_global)
315 var->data.mode = nir_var_global;
316 else
317 var->data.mode = nir_var_local;
318 break;
319
320 case ir_var_function_in:
321 case ir_var_function_out:
322 case ir_var_function_inout:
323 case ir_var_const_in:
324 var->data.mode = nir_var_local;
325 break;
326
327 case ir_var_shader_in:
328 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
329 ir->data.location == VARYING_SLOT_FACE) {
330 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
331 var->data.location = SYSTEM_VALUE_FRONT_FACE;
332 var->data.mode = nir_var_system_value;
333 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
334 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
335 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
336 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
337 var->data.mode = nir_var_system_value;
338 } else {
339 var->data.mode = nir_var_shader_in;
340
341 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
342 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
343 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
344 var->data.compact = ir->type->without_array()->is_scalar();
345 }
346 }
347
348 /* Mark all the locations that require two slots */
349 if (shader->info.stage == MESA_SHADER_VERTEX &&
350 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
351 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
352 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
353 shader->info.vs.double_inputs |= bitfield;
354 }
355 }
356 break;
357
358 case ir_var_shader_out:
359 var->data.mode = nir_var_shader_out;
360 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
361 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
362 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
363 var->data.compact = ir->type->without_array()->is_scalar();
364 }
365 break;
366
367 case ir_var_uniform:
368 var->data.mode = nir_var_uniform;
369 break;
370
371 case ir_var_shader_storage:
372 var->data.mode = nir_var_shader_storage;
373 break;
374
375 case ir_var_system_value:
376 var->data.mode = nir_var_system_value;
377 break;
378
379 default:
380 unreachable("not reached");
381 }
382
383 var->data.interpolation = ir->data.interpolation;
384 var->data.origin_upper_left = ir->data.origin_upper_left;
385 var->data.pixel_center_integer = ir->data.pixel_center_integer;
386 var->data.location_frac = ir->data.location_frac;
387
388 if (var->data.pixel_center_integer) {
389 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
390 shader->info.fs.pixel_center_integer = true;
391 }
392
393 switch (ir->data.depth_layout) {
394 case ir_depth_layout_none:
395 var->data.depth_layout = nir_depth_layout_none;
396 break;
397 case ir_depth_layout_any:
398 var->data.depth_layout = nir_depth_layout_any;
399 break;
400 case ir_depth_layout_greater:
401 var->data.depth_layout = nir_depth_layout_greater;
402 break;
403 case ir_depth_layout_less:
404 var->data.depth_layout = nir_depth_layout_less;
405 break;
406 case ir_depth_layout_unchanged:
407 var->data.depth_layout = nir_depth_layout_unchanged;
408 break;
409 default:
410 unreachable("not reached");
411 }
412
413 var->data.index = ir->data.index;
414 var->data.descriptor_set = 0;
415 var->data.binding = ir->data.binding;
416 var->data.explicit_binding = ir->data.explicit_binding;
417 var->data.bindless = ir->data.bindless;
418 var->data.offset = ir->data.offset;
419 var->data.image.read_only = ir->data.memory_read_only;
420 var->data.image.write_only = ir->data.memory_write_only;
421 var->data.image.coherent = ir->data.memory_coherent;
422 var->data.image._volatile = ir->data.memory_volatile;
423 var->data.image.restrict_flag = ir->data.memory_restrict;
424 var->data.image.format = ir->data.image_format;
425 var->data.fb_fetch_output = ir->data.fb_fetch_output;
426 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
427 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
428 var->data.xfb_buffer = ir->data.xfb_buffer;
429 var->data.xfb_stride = ir->data.xfb_stride;
430
431 var->num_state_slots = ir->get_num_state_slots();
432 if (var->num_state_slots > 0) {
433 var->state_slots = rzalloc_array(var, nir_state_slot,
434 var->num_state_slots);
435
436 ir_state_slot *state_slots = ir->get_state_slots();
437 for (unsigned i = 0; i < var->num_state_slots; i++) {
438 for (unsigned j = 0; j < 5; j++)
439 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
440 var->state_slots[i].swizzle = state_slots[i].swizzle;
441 }
442 } else {
443 var->state_slots = NULL;
444 }
445
446 var->constant_initializer = constant_copy(ir->constant_initializer, var);
447
448 var->interface_type = ir->get_interface_type();
449
450 if (var->data.mode == nir_var_local)
451 nir_function_impl_add_variable(impl, var);
452 else
453 nir_shader_add_variable(shader, var);
454
455 _mesa_hash_table_insert(var_table, ir, var);
456 this->var = var;
457 }
458
459 ir_visitor_status
460 nir_function_visitor::visit_enter(ir_function *ir)
461 {
462 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
463 visitor->create_function(sig);
464 }
465 return visit_continue_with_parent;
466 }
467
468 void
469 nir_visitor::create_function(ir_function_signature *ir)
470 {
471 if (ir->is_intrinsic())
472 return;
473
474 nir_function *func = nir_function_create(shader, ir->function_name());
475
476 assert(ir->parameters.is_empty());
477 assert(ir->return_type == glsl_type::void_type);
478
479 _mesa_hash_table_insert(this->overload_table, ir, func);
480 }
481
482 void
483 nir_visitor::visit(ir_function *ir)
484 {
485 foreach_in_list(ir_function_signature, sig, &ir->signatures)
486 sig->accept(this);
487 }
488
489 void
490 nir_visitor::visit(ir_function_signature *ir)
491 {
492 if (ir->is_intrinsic())
493 return;
494
495 struct hash_entry *entry =
496 _mesa_hash_table_search(this->overload_table, ir);
497
498 assert(entry);
499 nir_function *func = (nir_function *) entry->data;
500
501 if (ir->is_defined) {
502 nir_function_impl *impl = nir_function_impl_create(func);
503 this->impl = impl;
504
505 assert(strcmp(func->name, "main") == 0);
506 assert(ir->parameters.is_empty());
507
508 this->is_global = false;
509
510 nir_builder_init(&b, impl);
511 b.cursor = nir_after_cf_list(&impl->body);
512 visit_exec_list(&ir->body, this);
513
514 this->is_global = true;
515 } else {
516 func->impl = NULL;
517 }
518 }
519
520 void
521 nir_visitor::visit(ir_loop *ir)
522 {
523 nir_push_loop(&b);
524 visit_exec_list(&ir->body_instructions, this);
525 nir_pop_loop(&b, NULL);
526 }
527
528 void
529 nir_visitor::visit(ir_if *ir)
530 {
531 nir_push_if(&b, evaluate_rvalue(ir->condition));
532 visit_exec_list(&ir->then_instructions, this);
533 nir_push_else(&b, NULL);
534 visit_exec_list(&ir->else_instructions, this);
535 nir_pop_if(&b, NULL);
536 }
537
538 void
539 nir_visitor::visit(ir_discard *ir)
540 {
541 /*
542 * discards aren't treated as control flow, because before we lower them
543 * they can appear anywhere in the shader and the stuff after them may still
544 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
545 * discards will be immediately followed by a return.
546 */
547
548 nir_intrinsic_instr *discard;
549 if (ir->condition) {
550 discard = nir_intrinsic_instr_create(this->shader,
551 nir_intrinsic_discard_if);
552 discard->src[0] =
553 nir_src_for_ssa(evaluate_rvalue(ir->condition));
554 } else {
555 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
556 }
557
558 nir_builder_instr_insert(&b, &discard->instr);
559 }
560
561 void
562 nir_visitor::visit(ir_emit_vertex *ir)
563 {
564 nir_intrinsic_instr *instr =
565 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
566 nir_intrinsic_set_stream_id(instr, ir->stream_id());
567 nir_builder_instr_insert(&b, &instr->instr);
568 }
569
570 void
571 nir_visitor::visit(ir_end_primitive *ir)
572 {
573 nir_intrinsic_instr *instr =
574 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
575 nir_intrinsic_set_stream_id(instr, ir->stream_id());
576 nir_builder_instr_insert(&b, &instr->instr);
577 }
578
579 void
580 nir_visitor::visit(ir_loop_jump *ir)
581 {
582 nir_jump_type type;
583 switch (ir->mode) {
584 case ir_loop_jump::jump_break:
585 type = nir_jump_break;
586 break;
587 case ir_loop_jump::jump_continue:
588 type = nir_jump_continue;
589 break;
590 default:
591 unreachable("not reached");
592 }
593
594 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
595 nir_builder_instr_insert(&b, &instr->instr);
596 }
597
598 void
599 nir_visitor::visit(ir_return *ir)
600 {
601 assert(ir->value == NULL);
602 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
603 nir_builder_instr_insert(&b, &instr->instr);
604 }
605
606 void
607 nir_visitor::visit(ir_call *ir)
608 {
609 if (ir->callee->is_intrinsic()) {
610 nir_intrinsic_op op;
611
612 switch (ir->callee->intrinsic_id) {
613 case ir_intrinsic_atomic_counter_read:
614 op = nir_intrinsic_atomic_counter_read_deref;
615 break;
616 case ir_intrinsic_atomic_counter_increment:
617 op = nir_intrinsic_atomic_counter_inc_deref;
618 break;
619 case ir_intrinsic_atomic_counter_predecrement:
620 op = nir_intrinsic_atomic_counter_pre_dec_deref;
621 break;
622 case ir_intrinsic_atomic_counter_add:
623 op = nir_intrinsic_atomic_counter_add_deref;
624 break;
625 case ir_intrinsic_atomic_counter_and:
626 op = nir_intrinsic_atomic_counter_and_deref;
627 break;
628 case ir_intrinsic_atomic_counter_or:
629 op = nir_intrinsic_atomic_counter_or_deref;
630 break;
631 case ir_intrinsic_atomic_counter_xor:
632 op = nir_intrinsic_atomic_counter_xor_deref;
633 break;
634 case ir_intrinsic_atomic_counter_min:
635 op = nir_intrinsic_atomic_counter_min_deref;
636 break;
637 case ir_intrinsic_atomic_counter_max:
638 op = nir_intrinsic_atomic_counter_max_deref;
639 break;
640 case ir_intrinsic_atomic_counter_exchange:
641 op = nir_intrinsic_atomic_counter_exchange_deref;
642 break;
643 case ir_intrinsic_atomic_counter_comp_swap:
644 op = nir_intrinsic_atomic_counter_comp_swap_deref;
645 break;
646 case ir_intrinsic_image_load:
647 op = nir_intrinsic_image_deref_load;
648 break;
649 case ir_intrinsic_image_store:
650 op = nir_intrinsic_image_deref_store;
651 break;
652 case ir_intrinsic_image_atomic_add:
653 op = ir->return_deref->type->is_integer_32_64()
654 ? nir_intrinsic_image_deref_atomic_add
655 : nir_intrinsic_image_deref_atomic_fadd;
656 break;
657 case ir_intrinsic_image_atomic_min:
658 op = nir_intrinsic_image_deref_atomic_min;
659 break;
660 case ir_intrinsic_image_atomic_max:
661 op = nir_intrinsic_image_deref_atomic_max;
662 break;
663 case ir_intrinsic_image_atomic_and:
664 op = nir_intrinsic_image_deref_atomic_and;
665 break;
666 case ir_intrinsic_image_atomic_or:
667 op = nir_intrinsic_image_deref_atomic_or;
668 break;
669 case ir_intrinsic_image_atomic_xor:
670 op = nir_intrinsic_image_deref_atomic_xor;
671 break;
672 case ir_intrinsic_image_atomic_exchange:
673 op = nir_intrinsic_image_deref_atomic_exchange;
674 break;
675 case ir_intrinsic_image_atomic_comp_swap:
676 op = nir_intrinsic_image_deref_atomic_comp_swap;
677 break;
678 case ir_intrinsic_memory_barrier:
679 op = nir_intrinsic_memory_barrier;
680 break;
681 case ir_intrinsic_image_size:
682 op = nir_intrinsic_image_deref_size;
683 break;
684 case ir_intrinsic_image_samples:
685 op = nir_intrinsic_image_deref_samples;
686 break;
687 case ir_intrinsic_ssbo_store:
688 op = nir_intrinsic_store_ssbo;
689 break;
690 case ir_intrinsic_ssbo_load:
691 op = nir_intrinsic_load_ssbo;
692 break;
693 case ir_intrinsic_ssbo_atomic_add:
694 op = ir->return_deref->type->is_integer_32_64()
695 ? nir_intrinsic_ssbo_atomic_add : nir_intrinsic_ssbo_atomic_fadd;
696 break;
697 case ir_intrinsic_ssbo_atomic_and:
698 op = nir_intrinsic_ssbo_atomic_and;
699 break;
700 case ir_intrinsic_ssbo_atomic_or:
701 op = nir_intrinsic_ssbo_atomic_or;
702 break;
703 case ir_intrinsic_ssbo_atomic_xor:
704 op = nir_intrinsic_ssbo_atomic_xor;
705 break;
706 case ir_intrinsic_ssbo_atomic_min:
707 assert(ir->return_deref);
708 if (ir->return_deref->type == glsl_type::int_type)
709 op = nir_intrinsic_ssbo_atomic_imin;
710 else if (ir->return_deref->type == glsl_type::uint_type)
711 op = nir_intrinsic_ssbo_atomic_umin;
712 else if (ir->return_deref->type == glsl_type::float_type)
713 op = nir_intrinsic_ssbo_atomic_fmin;
714 else
715 unreachable("Invalid type");
716 break;
717 case ir_intrinsic_ssbo_atomic_max:
718 assert(ir->return_deref);
719 if (ir->return_deref->type == glsl_type::int_type)
720 op = nir_intrinsic_ssbo_atomic_imax;
721 else if (ir->return_deref->type == glsl_type::uint_type)
722 op = nir_intrinsic_ssbo_atomic_umax;
723 else if (ir->return_deref->type == glsl_type::float_type)
724 op = nir_intrinsic_ssbo_atomic_fmax;
725 else
726 unreachable("Invalid type");
727 break;
728 case ir_intrinsic_ssbo_atomic_exchange:
729 op = nir_intrinsic_ssbo_atomic_exchange;
730 break;
731 case ir_intrinsic_ssbo_atomic_comp_swap:
732 op = ir->return_deref->type->is_integer_32_64()
733 ? nir_intrinsic_ssbo_atomic_comp_swap
734 : nir_intrinsic_ssbo_atomic_fcomp_swap;
735 break;
736 case ir_intrinsic_shader_clock:
737 op = nir_intrinsic_shader_clock;
738 break;
739 case ir_intrinsic_begin_invocation_interlock:
740 op = nir_intrinsic_begin_invocation_interlock;
741 break;
742 case ir_intrinsic_end_invocation_interlock:
743 op = nir_intrinsic_end_invocation_interlock;
744 break;
745 case ir_intrinsic_begin_fragment_shader_ordering:
746 op = nir_intrinsic_begin_fragment_shader_ordering;
747 break;
748 case ir_intrinsic_group_memory_barrier:
749 op = nir_intrinsic_group_memory_barrier;
750 break;
751 case ir_intrinsic_memory_barrier_atomic_counter:
752 op = nir_intrinsic_memory_barrier_atomic_counter;
753 break;
754 case ir_intrinsic_memory_barrier_buffer:
755 op = nir_intrinsic_memory_barrier_buffer;
756 break;
757 case ir_intrinsic_memory_barrier_image:
758 op = nir_intrinsic_memory_barrier_image;
759 break;
760 case ir_intrinsic_memory_barrier_shared:
761 op = nir_intrinsic_memory_barrier_shared;
762 break;
763 case ir_intrinsic_shared_load:
764 op = nir_intrinsic_load_shared;
765 break;
766 case ir_intrinsic_shared_store:
767 op = nir_intrinsic_store_shared;
768 break;
769 case ir_intrinsic_shared_atomic_add:
770 op = ir->return_deref->type->is_integer_32_64()
771 ? nir_intrinsic_shared_atomic_add
772 : nir_intrinsic_shared_atomic_fadd;
773 break;
774 case ir_intrinsic_shared_atomic_and:
775 op = nir_intrinsic_shared_atomic_and;
776 break;
777 case ir_intrinsic_shared_atomic_or:
778 op = nir_intrinsic_shared_atomic_or;
779 break;
780 case ir_intrinsic_shared_atomic_xor:
781 op = nir_intrinsic_shared_atomic_xor;
782 break;
783 case ir_intrinsic_shared_atomic_min:
784 assert(ir->return_deref);
785 if (ir->return_deref->type == glsl_type::int_type)
786 op = nir_intrinsic_shared_atomic_imin;
787 else if (ir->return_deref->type == glsl_type::uint_type)
788 op = nir_intrinsic_shared_atomic_umin;
789 else if (ir->return_deref->type == glsl_type::float_type)
790 op = nir_intrinsic_shared_atomic_fmin;
791 else
792 unreachable("Invalid type");
793 break;
794 case ir_intrinsic_shared_atomic_max:
795 assert(ir->return_deref);
796 if (ir->return_deref->type == glsl_type::int_type)
797 op = nir_intrinsic_shared_atomic_imax;
798 else if (ir->return_deref->type == glsl_type::uint_type)
799 op = nir_intrinsic_shared_atomic_umax;
800 else if (ir->return_deref->type == glsl_type::float_type)
801 op = nir_intrinsic_shared_atomic_fmax;
802 else
803 unreachable("Invalid type");
804 break;
805 case ir_intrinsic_shared_atomic_exchange:
806 op = nir_intrinsic_shared_atomic_exchange;
807 break;
808 case ir_intrinsic_shared_atomic_comp_swap:
809 op = ir->return_deref->type->is_integer_32_64()
810 ? nir_intrinsic_shared_atomic_comp_swap
811 : nir_intrinsic_shared_atomic_fcomp_swap;
812 break;
813 case ir_intrinsic_vote_any:
814 op = nir_intrinsic_vote_any;
815 break;
816 case ir_intrinsic_vote_all:
817 op = nir_intrinsic_vote_all;
818 break;
819 case ir_intrinsic_vote_eq:
820 op = nir_intrinsic_vote_ieq;
821 break;
822 case ir_intrinsic_ballot:
823 op = nir_intrinsic_ballot;
824 break;
825 case ir_intrinsic_read_invocation:
826 op = nir_intrinsic_read_invocation;
827 break;
828 case ir_intrinsic_read_first_invocation:
829 op = nir_intrinsic_read_first_invocation;
830 break;
831 default:
832 unreachable("not reached");
833 }
834
835 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
836 nir_dest *dest = &instr->dest;
837
838 switch (op) {
839 case nir_intrinsic_atomic_counter_read_deref:
840 case nir_intrinsic_atomic_counter_inc_deref:
841 case nir_intrinsic_atomic_counter_pre_dec_deref:
842 case nir_intrinsic_atomic_counter_add_deref:
843 case nir_intrinsic_atomic_counter_min_deref:
844 case nir_intrinsic_atomic_counter_max_deref:
845 case nir_intrinsic_atomic_counter_and_deref:
846 case nir_intrinsic_atomic_counter_or_deref:
847 case nir_intrinsic_atomic_counter_xor_deref:
848 case nir_intrinsic_atomic_counter_exchange_deref:
849 case nir_intrinsic_atomic_counter_comp_swap_deref: {
850 /* Set the counter variable dereference. */
851 exec_node *param = ir->actual_parameters.get_head();
852 ir_dereference *counter = (ir_dereference *)param;
853
854 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
855 param = param->get_next();
856
857 /* Set the intrinsic destination. */
858 if (ir->return_deref) {
859 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
860 }
861
862 /* Set the intrinsic parameters. */
863 if (!param->is_tail_sentinel()) {
864 instr->src[1] =
865 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
866 param = param->get_next();
867 }
868
869 if (!param->is_tail_sentinel()) {
870 instr->src[2] =
871 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
872 param = param->get_next();
873 }
874
875 nir_builder_instr_insert(&b, &instr->instr);
876 break;
877 }
878 case nir_intrinsic_image_deref_load:
879 case nir_intrinsic_image_deref_store:
880 case nir_intrinsic_image_deref_atomic_add:
881 case nir_intrinsic_image_deref_atomic_min:
882 case nir_intrinsic_image_deref_atomic_max:
883 case nir_intrinsic_image_deref_atomic_and:
884 case nir_intrinsic_image_deref_atomic_or:
885 case nir_intrinsic_image_deref_atomic_xor:
886 case nir_intrinsic_image_deref_atomic_exchange:
887 case nir_intrinsic_image_deref_atomic_comp_swap:
888 case nir_intrinsic_image_deref_atomic_fadd:
889 case nir_intrinsic_image_deref_samples:
890 case nir_intrinsic_image_deref_size: {
891 nir_ssa_undef_instr *instr_undef =
892 nir_ssa_undef_instr_create(shader, 1, 32);
893 nir_builder_instr_insert(&b, &instr_undef->instr);
894
895 /* Set the image variable dereference. */
896 exec_node *param = ir->actual_parameters.get_head();
897 ir_dereference *image = (ir_dereference *)param;
898 const glsl_type *type =
899 image->variable_referenced()->type->without_array();
900
901 instr->src[0] = nir_src_for_ssa(&evaluate_deref(image)->dest.ssa);
902 param = param->get_next();
903
904 /* Set the intrinsic destination. */
905 if (ir->return_deref) {
906 unsigned num_components = ir->return_deref->type->vector_elements;
907 nir_ssa_dest_init(&instr->instr, &instr->dest,
908 num_components, 32, NULL);
909 }
910
911 if (op == nir_intrinsic_image_deref_size) {
912 instr->num_components = instr->dest.ssa.num_components;
913 } else if (op == nir_intrinsic_image_deref_load ||
914 op == nir_intrinsic_image_deref_store) {
915 instr->num_components = 4;
916 }
917
918 if (op == nir_intrinsic_image_deref_size ||
919 op == nir_intrinsic_image_deref_samples) {
920 nir_builder_instr_insert(&b, &instr->instr);
921 break;
922 }
923
924 /* Set the address argument, extending the coordinate vector to four
925 * components.
926 */
927 nir_ssa_def *src_addr =
928 evaluate_rvalue((ir_dereference *)param);
929 nir_ssa_def *srcs[4];
930
931 for (int i = 0; i < 4; i++) {
932 if (i < type->coordinate_components())
933 srcs[i] = nir_channel(&b, src_addr, i);
934 else
935 srcs[i] = &instr_undef->def;
936 }
937
938 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
939 param = param->get_next();
940
941 /* Set the sample argument, which is undefined for single-sample
942 * images.
943 */
944 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
945 instr->src[2] =
946 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
947 param = param->get_next();
948 } else {
949 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
950 }
951
952 /* Set the intrinsic parameters. */
953 if (!param->is_tail_sentinel()) {
954 instr->src[3] =
955 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
956 param = param->get_next();
957 }
958
959 if (!param->is_tail_sentinel()) {
960 instr->src[4] =
961 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
962 param = param->get_next();
963 }
964 nir_builder_instr_insert(&b, &instr->instr);
965 break;
966 }
967 case nir_intrinsic_memory_barrier:
968 case nir_intrinsic_group_memory_barrier:
969 case nir_intrinsic_memory_barrier_atomic_counter:
970 case nir_intrinsic_memory_barrier_buffer:
971 case nir_intrinsic_memory_barrier_image:
972 case nir_intrinsic_memory_barrier_shared:
973 nir_builder_instr_insert(&b, &instr->instr);
974 break;
975 case nir_intrinsic_shader_clock:
976 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
977 instr->num_components = 2;
978 nir_builder_instr_insert(&b, &instr->instr);
979 break;
980 case nir_intrinsic_begin_invocation_interlock:
981 nir_builder_instr_insert(&b, &instr->instr);
982 break;
983 case nir_intrinsic_end_invocation_interlock:
984 nir_builder_instr_insert(&b, &instr->instr);
985 break;
986 case nir_intrinsic_begin_fragment_shader_ordering:
987 nir_builder_instr_insert(&b, &instr->instr);
988 break;
989 case nir_intrinsic_store_ssbo: {
990 exec_node *param = ir->actual_parameters.get_head();
991 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
992
993 param = param->get_next();
994 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
995
996 param = param->get_next();
997 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
998
999 param = param->get_next();
1000 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1001 assert(write_mask);
1002
1003 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1004 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1005 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1006 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1007 instr->num_components = val->type->vector_elements;
1008
1009 nir_builder_instr_insert(&b, &instr->instr);
1010 break;
1011 }
1012 case nir_intrinsic_load_ssbo: {
1013 exec_node *param = ir->actual_parameters.get_head();
1014 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1015
1016 param = param->get_next();
1017 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1018
1019 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1020 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1021
1022 const glsl_type *type = ir->return_deref->var->type;
1023 instr->num_components = type->vector_elements;
1024
1025 /* Setup destination register */
1026 unsigned bit_size = glsl_get_bit_size(type);
1027 nir_ssa_dest_init(&instr->instr, &instr->dest,
1028 type->vector_elements, bit_size, NULL);
1029
1030 /* Insert the created nir instruction now since in the case of boolean
1031 * result we will need to emit another instruction after it
1032 */
1033 nir_builder_instr_insert(&b, &instr->instr);
1034
1035 /*
1036 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1037 * consider a true boolean to be ~0. Fix this up with a != 0
1038 * comparison.
1039 */
1040 if (type->is_boolean()) {
1041 nir_alu_instr *load_ssbo_compare =
1042 nir_alu_instr_create(shader, nir_op_ine);
1043 load_ssbo_compare->src[0].src.is_ssa = true;
1044 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1045 load_ssbo_compare->src[1].src =
1046 nir_src_for_ssa(nir_imm_int(&b, 0));
1047 for (unsigned i = 0; i < type->vector_elements; i++)
1048 load_ssbo_compare->src[1].swizzle[i] = 0;
1049 nir_ssa_dest_init(&load_ssbo_compare->instr,
1050 &load_ssbo_compare->dest.dest,
1051 type->vector_elements, bit_size, NULL);
1052 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1053 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1054 dest = &load_ssbo_compare->dest.dest;
1055 }
1056 break;
1057 }
1058 case nir_intrinsic_ssbo_atomic_add:
1059 case nir_intrinsic_ssbo_atomic_imin:
1060 case nir_intrinsic_ssbo_atomic_umin:
1061 case nir_intrinsic_ssbo_atomic_imax:
1062 case nir_intrinsic_ssbo_atomic_umax:
1063 case nir_intrinsic_ssbo_atomic_and:
1064 case nir_intrinsic_ssbo_atomic_or:
1065 case nir_intrinsic_ssbo_atomic_xor:
1066 case nir_intrinsic_ssbo_atomic_exchange:
1067 case nir_intrinsic_ssbo_atomic_comp_swap:
1068 case nir_intrinsic_ssbo_atomic_fadd:
1069 case nir_intrinsic_ssbo_atomic_fmin:
1070 case nir_intrinsic_ssbo_atomic_fmax:
1071 case nir_intrinsic_ssbo_atomic_fcomp_swap: {
1072 int param_count = ir->actual_parameters.length();
1073 assert(param_count == 3 || param_count == 4);
1074
1075 /* Block index */
1076 exec_node *param = ir->actual_parameters.get_head();
1077 ir_instruction *inst = (ir_instruction *) param;
1078 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1079
1080 /* Offset */
1081 param = param->get_next();
1082 inst = (ir_instruction *) param;
1083 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1084
1085 /* data1 parameter (this is always present) */
1086 param = param->get_next();
1087 inst = (ir_instruction *) param;
1088 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1089
1090 /* data2 parameter (only with atomic_comp_swap) */
1091 if (param_count == 4) {
1092 assert(op == nir_intrinsic_ssbo_atomic_comp_swap ||
1093 op == nir_intrinsic_ssbo_atomic_fcomp_swap);
1094 param = param->get_next();
1095 inst = (ir_instruction *) param;
1096 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1097 }
1098
1099 /* Atomic result */
1100 assert(ir->return_deref);
1101 nir_ssa_dest_init(&instr->instr, &instr->dest,
1102 ir->return_deref->type->vector_elements, 32, NULL);
1103 nir_builder_instr_insert(&b, &instr->instr);
1104 break;
1105 }
1106 case nir_intrinsic_load_shared: {
1107 exec_node *param = ir->actual_parameters.get_head();
1108 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1109
1110 nir_intrinsic_set_base(instr, 0);
1111 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1112
1113 const glsl_type *type = ir->return_deref->var->type;
1114 instr->num_components = type->vector_elements;
1115
1116 /* Setup destination register */
1117 unsigned bit_size = glsl_get_bit_size(type);
1118 nir_ssa_dest_init(&instr->instr, &instr->dest,
1119 type->vector_elements, bit_size, NULL);
1120
1121 nir_builder_instr_insert(&b, &instr->instr);
1122 break;
1123 }
1124 case nir_intrinsic_store_shared: {
1125 exec_node *param = ir->actual_parameters.get_head();
1126 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1127
1128 param = param->get_next();
1129 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1130
1131 param = param->get_next();
1132 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1133 assert(write_mask);
1134
1135 nir_intrinsic_set_base(instr, 0);
1136 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1137
1138 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1139
1140 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1141 instr->num_components = val->type->vector_elements;
1142
1143 nir_builder_instr_insert(&b, &instr->instr);
1144 break;
1145 }
1146 case nir_intrinsic_shared_atomic_add:
1147 case nir_intrinsic_shared_atomic_imin:
1148 case nir_intrinsic_shared_atomic_umin:
1149 case nir_intrinsic_shared_atomic_imax:
1150 case nir_intrinsic_shared_atomic_umax:
1151 case nir_intrinsic_shared_atomic_and:
1152 case nir_intrinsic_shared_atomic_or:
1153 case nir_intrinsic_shared_atomic_xor:
1154 case nir_intrinsic_shared_atomic_exchange:
1155 case nir_intrinsic_shared_atomic_comp_swap:
1156 case nir_intrinsic_shared_atomic_fadd:
1157 case nir_intrinsic_shared_atomic_fmin:
1158 case nir_intrinsic_shared_atomic_fmax:
1159 case nir_intrinsic_shared_atomic_fcomp_swap: {
1160 int param_count = ir->actual_parameters.length();
1161 assert(param_count == 2 || param_count == 3);
1162
1163 /* Offset */
1164 exec_node *param = ir->actual_parameters.get_head();
1165 ir_instruction *inst = (ir_instruction *) param;
1166 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1167
1168 /* data1 parameter (this is always present) */
1169 param = param->get_next();
1170 inst = (ir_instruction *) param;
1171 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1172
1173 /* data2 parameter (only with atomic_comp_swap) */
1174 if (param_count == 3) {
1175 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1176 op == nir_intrinsic_shared_atomic_fcomp_swap);
1177 param = param->get_next();
1178 inst = (ir_instruction *) param;
1179 instr->src[2] =
1180 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1181 }
1182
1183 /* Atomic result */
1184 assert(ir->return_deref);
1185 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1186 nir_ssa_dest_init(&instr->instr, &instr->dest,
1187 ir->return_deref->type->vector_elements,
1188 bit_size, NULL);
1189 nir_builder_instr_insert(&b, &instr->instr);
1190 break;
1191 }
1192 case nir_intrinsic_vote_any:
1193 case nir_intrinsic_vote_all:
1194 case nir_intrinsic_vote_ieq: {
1195 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1196 instr->num_components = 1;
1197
1198 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1199 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1200
1201 nir_builder_instr_insert(&b, &instr->instr);
1202 break;
1203 }
1204
1205 case nir_intrinsic_ballot: {
1206 nir_ssa_dest_init(&instr->instr, &instr->dest,
1207 ir->return_deref->type->vector_elements, 64, NULL);
1208 instr->num_components = ir->return_deref->type->vector_elements;
1209
1210 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1211 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1212
1213 nir_builder_instr_insert(&b, &instr->instr);
1214 break;
1215 }
1216 case nir_intrinsic_read_invocation: {
1217 nir_ssa_dest_init(&instr->instr, &instr->dest,
1218 ir->return_deref->type->vector_elements, 32, NULL);
1219 instr->num_components = ir->return_deref->type->vector_elements;
1220
1221 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1222 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1223
1224 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1225 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1226
1227 nir_builder_instr_insert(&b, &instr->instr);
1228 break;
1229 }
1230 case nir_intrinsic_read_first_invocation: {
1231 nir_ssa_dest_init(&instr->instr, &instr->dest,
1232 ir->return_deref->type->vector_elements, 32, NULL);
1233 instr->num_components = ir->return_deref->type->vector_elements;
1234
1235 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1236 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1237
1238 nir_builder_instr_insert(&b, &instr->instr);
1239 break;
1240 }
1241 default:
1242 unreachable("not reached");
1243 }
1244
1245 if (ir->return_deref)
1246 nir_store_deref(&b, evaluate_deref(ir->return_deref), &dest->ssa, ~0);
1247
1248 return;
1249 }
1250
1251 unreachable("glsl_to_nir only handles function calls to intrinsics");
1252 }
1253
1254 void
1255 nir_visitor::visit(ir_assignment *ir)
1256 {
1257 unsigned num_components = ir->lhs->type->vector_elements;
1258
1259 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1260 ir->lhs->variable_referenced()->data.precise;
1261
1262 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1263 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1264 if (ir->condition) {
1265 nir_push_if(&b, evaluate_rvalue(ir->condition));
1266 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1267 nir_pop_if(&b, NULL);
1268 } else {
1269 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1270 }
1271 return;
1272 }
1273
1274 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1275
1276 ir->lhs->accept(this);
1277 nir_deref_instr *lhs_deref = this->deref;
1278 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1279
1280 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1281 /* GLSL IR will give us the input to the write-masked assignment in a
1282 * single packed vector. So, for example, if the writemask is xzw, then
1283 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1284 * from the load.
1285 */
1286 unsigned swiz[4];
1287 unsigned component = 0;
1288 for (unsigned i = 0; i < 4; i++) {
1289 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1290 }
1291 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1292 }
1293
1294 if (ir->condition) {
1295 nir_push_if(&b, evaluate_rvalue(ir->condition));
1296 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1297 nir_pop_if(&b, NULL);
1298 } else {
1299 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1300 }
1301 }
1302
1303 /*
1304 * Given an instruction, returns a pointer to its destination or NULL if there
1305 * is no destination.
1306 *
1307 * Note that this only handles instructions we generate at this level.
1308 */
1309 static nir_dest *
1310 get_instr_dest(nir_instr *instr)
1311 {
1312 nir_alu_instr *alu_instr;
1313 nir_intrinsic_instr *intrinsic_instr;
1314 nir_tex_instr *tex_instr;
1315
1316 switch (instr->type) {
1317 case nir_instr_type_alu:
1318 alu_instr = nir_instr_as_alu(instr);
1319 return &alu_instr->dest.dest;
1320
1321 case nir_instr_type_intrinsic:
1322 intrinsic_instr = nir_instr_as_intrinsic(instr);
1323 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1324 return &intrinsic_instr->dest;
1325 else
1326 return NULL;
1327
1328 case nir_instr_type_tex:
1329 tex_instr = nir_instr_as_tex(instr);
1330 return &tex_instr->dest;
1331
1332 default:
1333 unreachable("not reached");
1334 }
1335
1336 return NULL;
1337 }
1338
1339 void
1340 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1341 unsigned bit_size)
1342 {
1343 nir_dest *dest = get_instr_dest(instr);
1344
1345 if (dest)
1346 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1347
1348 nir_builder_instr_insert(&b, instr);
1349
1350 if (dest) {
1351 assert(dest->is_ssa);
1352 this->result = &dest->ssa;
1353 }
1354 }
1355
1356 nir_ssa_def *
1357 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1358 {
1359 ir->accept(this);
1360 if (ir->as_dereference() || ir->as_constant()) {
1361 /*
1362 * A dereference is being used on the right hand side, which means we
1363 * must emit a variable load.
1364 */
1365
1366 this->result = nir_load_deref(&b, this->deref);
1367 }
1368
1369 return this->result;
1370 }
1371
1372 static bool
1373 type_is_float(glsl_base_type type)
1374 {
1375 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1376 type == GLSL_TYPE_FLOAT16;
1377 }
1378
1379 static bool
1380 type_is_signed(glsl_base_type type)
1381 {
1382 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1383 type == GLSL_TYPE_INT16;
1384 }
1385
1386 void
1387 nir_visitor::visit(ir_expression *ir)
1388 {
1389 /* Some special cases */
1390 switch (ir->operation) {
1391 case ir_binop_ubo_load: {
1392 nir_intrinsic_instr *load =
1393 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1394 unsigned bit_size = glsl_get_bit_size(ir->type);
1395 load->num_components = ir->type->vector_elements;
1396 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1397 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1398 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1399
1400 /*
1401 * In UBO's, a true boolean value is any non-zero value, but we consider
1402 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1403 */
1404
1405 if (ir->type->is_boolean())
1406 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1407
1408 return;
1409 }
1410
1411 case ir_unop_interpolate_at_centroid:
1412 case ir_binop_interpolate_at_offset:
1413 case ir_binop_interpolate_at_sample: {
1414 ir_dereference *deref = ir->operands[0]->as_dereference();
1415 ir_swizzle *swizzle = NULL;
1416 if (!deref) {
1417 /* the api does not allow a swizzle here, but the varying packing code
1418 * may have pushed one into here.
1419 */
1420 swizzle = ir->operands[0]->as_swizzle();
1421 assert(swizzle);
1422 deref = swizzle->val->as_dereference();
1423 assert(deref);
1424 }
1425
1426 deref->accept(this);
1427
1428 nir_intrinsic_op op;
1429 if (this->deref->mode == nir_var_shader_in) {
1430 switch (ir->operation) {
1431 case ir_unop_interpolate_at_centroid:
1432 op = nir_intrinsic_interp_deref_at_centroid;
1433 break;
1434 case ir_binop_interpolate_at_offset:
1435 op = nir_intrinsic_interp_deref_at_offset;
1436 break;
1437 case ir_binop_interpolate_at_sample:
1438 op = nir_intrinsic_interp_deref_at_sample;
1439 break;
1440 default:
1441 unreachable("Invalid interpolation intrinsic");
1442 }
1443 } else {
1444 /* This case can happen if the vertex shader does not write the
1445 * given varying. In this case, the linker will lower it to a
1446 * global variable. Since interpolating a variable makes no
1447 * sense, we'll just turn it into a load which will probably
1448 * eventually end up as an SSA definition.
1449 */
1450 assert(this->deref->mode == nir_var_global);
1451 op = nir_intrinsic_load_deref;
1452 }
1453
1454 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1455 intrin->num_components = deref->type->vector_elements;
1456 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1457
1458 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1459 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1460 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1461
1462 unsigned bit_size = glsl_get_bit_size(deref->type);
1463 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1464
1465 if (swizzle) {
1466 unsigned swiz[4] = {
1467 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1468 };
1469
1470 result = nir_swizzle(&b, result, swiz,
1471 swizzle->type->vector_elements, false);
1472 }
1473
1474 return;
1475 }
1476
1477 default:
1478 break;
1479 }
1480
1481 nir_ssa_def *srcs[4];
1482 for (unsigned i = 0; i < ir->num_operands; i++)
1483 srcs[i] = evaluate_rvalue(ir->operands[i]);
1484
1485 glsl_base_type types[4];
1486 for (unsigned i = 0; i < ir->num_operands; i++)
1487 if (supports_ints)
1488 types[i] = ir->operands[i]->type->base_type;
1489 else
1490 types[i] = GLSL_TYPE_FLOAT;
1491
1492 glsl_base_type out_type;
1493 if (supports_ints)
1494 out_type = ir->type->base_type;
1495 else
1496 out_type = GLSL_TYPE_FLOAT;
1497
1498 switch (ir->operation) {
1499 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1500 case ir_unop_logic_not:
1501 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1502 break;
1503 case ir_unop_neg:
1504 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1505 : nir_ineg(&b, srcs[0]);
1506 break;
1507 case ir_unop_abs:
1508 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1509 : nir_iabs(&b, srcs[0]);
1510 break;
1511 case ir_unop_saturate:
1512 assert(type_is_float(types[0]));
1513 result = nir_fsat(&b, srcs[0]);
1514 break;
1515 case ir_unop_sign:
1516 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1517 : nir_isign(&b, srcs[0]);
1518 break;
1519 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1520 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1521 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1522 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1523 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1524 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1525 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1526 case ir_unop_i2f:
1527 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1528 break;
1529 case ir_unop_u2f:
1530 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1531 break;
1532 case ir_unop_b2f:
1533 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1534 break;
1535 case ir_unop_f2i:
1536 case ir_unop_f2u:
1537 case ir_unop_f2b:
1538 case ir_unop_i2b:
1539 case ir_unop_b2i:
1540 case ir_unop_b2i64:
1541 case ir_unop_d2f:
1542 case ir_unop_f2d:
1543 case ir_unop_d2i:
1544 case ir_unop_d2u:
1545 case ir_unop_d2b:
1546 case ir_unop_i2d:
1547 case ir_unop_u2d:
1548 case ir_unop_i642i:
1549 case ir_unop_i642u:
1550 case ir_unop_i642f:
1551 case ir_unop_i642b:
1552 case ir_unop_i642d:
1553 case ir_unop_u642i:
1554 case ir_unop_u642u:
1555 case ir_unop_u642f:
1556 case ir_unop_u642d:
1557 case ir_unop_i2i64:
1558 case ir_unop_u2i64:
1559 case ir_unop_f2i64:
1560 case ir_unop_d2i64:
1561 case ir_unop_i2u64:
1562 case ir_unop_u2u64:
1563 case ir_unop_f2u64:
1564 case ir_unop_d2u64:
1565 case ir_unop_i2u:
1566 case ir_unop_u2i:
1567 case ir_unop_i642u64:
1568 case ir_unop_u642i64: {
1569 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1570 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1571 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1572 nir_rounding_mode_undef),
1573 srcs[0], NULL, NULL, NULL);
1574 /* b2i and b2f don't have fixed bit-size versions so the builder will
1575 * just assume 32 and we have to fix it up here.
1576 */
1577 result->bit_size = nir_alu_type_get_type_size(dst_type);
1578 break;
1579 }
1580
1581 case ir_unop_bitcast_i2f:
1582 case ir_unop_bitcast_f2i:
1583 case ir_unop_bitcast_u2f:
1584 case ir_unop_bitcast_f2u:
1585 case ir_unop_bitcast_i642d:
1586 case ir_unop_bitcast_d2i64:
1587 case ir_unop_bitcast_u642d:
1588 case ir_unop_bitcast_d2u64:
1589 case ir_unop_subroutine_to_int:
1590 /* no-op */
1591 result = nir_imov(&b, srcs[0]);
1592 break;
1593 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1594 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1595 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1596 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1597 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1598 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1599 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1600 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1601 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1602 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1603 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1604 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1605 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1606 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1607 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1608 case ir_unop_pack_snorm_2x16:
1609 result = nir_pack_snorm_2x16(&b, srcs[0]);
1610 break;
1611 case ir_unop_pack_snorm_4x8:
1612 result = nir_pack_snorm_4x8(&b, srcs[0]);
1613 break;
1614 case ir_unop_pack_unorm_2x16:
1615 result = nir_pack_unorm_2x16(&b, srcs[0]);
1616 break;
1617 case ir_unop_pack_unorm_4x8:
1618 result = nir_pack_unorm_4x8(&b, srcs[0]);
1619 break;
1620 case ir_unop_pack_half_2x16:
1621 result = nir_pack_half_2x16(&b, srcs[0]);
1622 break;
1623 case ir_unop_unpack_snorm_2x16:
1624 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1625 break;
1626 case ir_unop_unpack_snorm_4x8:
1627 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1628 break;
1629 case ir_unop_unpack_unorm_2x16:
1630 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1631 break;
1632 case ir_unop_unpack_unorm_4x8:
1633 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1634 break;
1635 case ir_unop_unpack_half_2x16:
1636 result = nir_unpack_half_2x16(&b, srcs[0]);
1637 break;
1638 case ir_unop_pack_sampler_2x32:
1639 case ir_unop_pack_image_2x32:
1640 case ir_unop_pack_double_2x32:
1641 case ir_unop_pack_int_2x32:
1642 case ir_unop_pack_uint_2x32:
1643 result = nir_pack_64_2x32(&b, srcs[0]);
1644 break;
1645 case ir_unop_unpack_sampler_2x32:
1646 case ir_unop_unpack_image_2x32:
1647 case ir_unop_unpack_double_2x32:
1648 case ir_unop_unpack_int_2x32:
1649 case ir_unop_unpack_uint_2x32:
1650 result = nir_unpack_64_2x32(&b, srcs[0]);
1651 break;
1652 case ir_unop_bitfield_reverse:
1653 result = nir_bitfield_reverse(&b, srcs[0]);
1654 break;
1655 case ir_unop_bit_count:
1656 result = nir_bit_count(&b, srcs[0]);
1657 break;
1658 case ir_unop_find_msb:
1659 switch (types[0]) {
1660 case GLSL_TYPE_UINT:
1661 result = nir_ufind_msb(&b, srcs[0]);
1662 break;
1663 case GLSL_TYPE_INT:
1664 result = nir_ifind_msb(&b, srcs[0]);
1665 break;
1666 default:
1667 unreachable("Invalid type for findMSB()");
1668 }
1669 break;
1670 case ir_unop_find_lsb:
1671 result = nir_find_lsb(&b, srcs[0]);
1672 break;
1673
1674 case ir_unop_noise:
1675 switch (ir->type->vector_elements) {
1676 case 1:
1677 switch (ir->operands[0]->type->vector_elements) {
1678 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1679 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1680 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1681 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1682 default: unreachable("not reached");
1683 }
1684 break;
1685 case 2:
1686 switch (ir->operands[0]->type->vector_elements) {
1687 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1688 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1689 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1690 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1691 default: unreachable("not reached");
1692 }
1693 break;
1694 case 3:
1695 switch (ir->operands[0]->type->vector_elements) {
1696 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1697 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1698 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1699 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1700 default: unreachable("not reached");
1701 }
1702 break;
1703 case 4:
1704 switch (ir->operands[0]->type->vector_elements) {
1705 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1706 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1707 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1708 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1709 default: unreachable("not reached");
1710 }
1711 break;
1712 default:
1713 unreachable("not reached");
1714 }
1715 break;
1716 case ir_unop_get_buffer_size: {
1717 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1718 this->shader,
1719 nir_intrinsic_get_buffer_size);
1720 load->num_components = ir->type->vector_elements;
1721 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1722 unsigned bit_size = glsl_get_bit_size(ir->type);
1723 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1724 return;
1725 }
1726
1727 case ir_binop_add:
1728 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1729 : nir_iadd(&b, srcs[0], srcs[1]);
1730 break;
1731 case ir_binop_sub:
1732 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1733 : nir_isub(&b, srcs[0], srcs[1]);
1734 break;
1735 case ir_binop_mul:
1736 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1737 : nir_imul(&b, srcs[0], srcs[1]);
1738 break;
1739 case ir_binop_div:
1740 if (type_is_float(out_type))
1741 result = nir_fdiv(&b, srcs[0], srcs[1]);
1742 else if (type_is_signed(out_type))
1743 result = nir_idiv(&b, srcs[0], srcs[1]);
1744 else
1745 result = nir_udiv(&b, srcs[0], srcs[1]);
1746 break;
1747 case ir_binop_mod:
1748 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1749 : nir_umod(&b, srcs[0], srcs[1]);
1750 break;
1751 case ir_binop_min:
1752 if (type_is_float(out_type))
1753 result = nir_fmin(&b, srcs[0], srcs[1]);
1754 else if (type_is_signed(out_type))
1755 result = nir_imin(&b, srcs[0], srcs[1]);
1756 else
1757 result = nir_umin(&b, srcs[0], srcs[1]);
1758 break;
1759 case ir_binop_max:
1760 if (type_is_float(out_type))
1761 result = nir_fmax(&b, srcs[0], srcs[1]);
1762 else if (type_is_signed(out_type))
1763 result = nir_imax(&b, srcs[0], srcs[1]);
1764 else
1765 result = nir_umax(&b, srcs[0], srcs[1]);
1766 break;
1767 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1768 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1769 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1770 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1771 case ir_binop_logic_and:
1772 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1773 : nir_fand(&b, srcs[0], srcs[1]);
1774 break;
1775 case ir_binop_logic_or:
1776 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1777 : nir_for(&b, srcs[0], srcs[1]);
1778 break;
1779 case ir_binop_logic_xor:
1780 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1781 : nir_fxor(&b, srcs[0], srcs[1]);
1782 break;
1783 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1784 case ir_binop_rshift:
1785 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1786 : nir_ushr(&b, srcs[0], srcs[1]);
1787 break;
1788 case ir_binop_imul_high:
1789 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1790 : nir_umul_high(&b, srcs[0], srcs[1]);
1791 break;
1792 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1793 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1794 case ir_binop_less:
1795 if (supports_ints) {
1796 if (type_is_float(types[0]))
1797 result = nir_flt(&b, srcs[0], srcs[1]);
1798 else if (type_is_signed(types[0]))
1799 result = nir_ilt(&b, srcs[0], srcs[1]);
1800 else
1801 result = nir_ult(&b, srcs[0], srcs[1]);
1802 } else {
1803 result = nir_slt(&b, srcs[0], srcs[1]);
1804 }
1805 break;
1806 case ir_binop_gequal:
1807 if (supports_ints) {
1808 if (type_is_float(types[0]))
1809 result = nir_fge(&b, srcs[0], srcs[1]);
1810 else if (type_is_signed(types[0]))
1811 result = nir_ige(&b, srcs[0], srcs[1]);
1812 else
1813 result = nir_uge(&b, srcs[0], srcs[1]);
1814 } else {
1815 result = nir_sge(&b, srcs[0], srcs[1]);
1816 }
1817 break;
1818 case ir_binop_equal:
1819 if (supports_ints) {
1820 if (type_is_float(types[0]))
1821 result = nir_feq(&b, srcs[0], srcs[1]);
1822 else
1823 result = nir_ieq(&b, srcs[0], srcs[1]);
1824 } else {
1825 result = nir_seq(&b, srcs[0], srcs[1]);
1826 }
1827 break;
1828 case ir_binop_nequal:
1829 if (supports_ints) {
1830 if (type_is_float(types[0]))
1831 result = nir_fne(&b, srcs[0], srcs[1]);
1832 else
1833 result = nir_ine(&b, srcs[0], srcs[1]);
1834 } else {
1835 result = nir_sne(&b, srcs[0], srcs[1]);
1836 }
1837 break;
1838 case ir_binop_all_equal:
1839 if (supports_ints) {
1840 if (type_is_float(types[0])) {
1841 switch (ir->operands[0]->type->vector_elements) {
1842 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1843 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1844 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1845 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1846 default:
1847 unreachable("not reached");
1848 }
1849 } else {
1850 switch (ir->operands[0]->type->vector_elements) {
1851 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1852 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1853 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1854 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1855 default:
1856 unreachable("not reached");
1857 }
1858 }
1859 } else {
1860 switch (ir->operands[0]->type->vector_elements) {
1861 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1862 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1863 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1864 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1865 default:
1866 unreachable("not reached");
1867 }
1868 }
1869 break;
1870 case ir_binop_any_nequal:
1871 if (supports_ints) {
1872 if (type_is_float(types[0])) {
1873 switch (ir->operands[0]->type->vector_elements) {
1874 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1875 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1876 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1877 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1878 default:
1879 unreachable("not reached");
1880 }
1881 } else {
1882 switch (ir->operands[0]->type->vector_elements) {
1883 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1884 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1885 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1886 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1887 default:
1888 unreachable("not reached");
1889 }
1890 }
1891 } else {
1892 switch (ir->operands[0]->type->vector_elements) {
1893 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1894 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1895 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1896 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1897 default:
1898 unreachable("not reached");
1899 }
1900 }
1901 break;
1902 case ir_binop_dot:
1903 switch (ir->operands[0]->type->vector_elements) {
1904 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1905 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1906 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1907 default:
1908 unreachable("not reached");
1909 }
1910 break;
1911 case ir_binop_vector_extract: {
1912 result = nir_channel(&b, srcs[0], 0);
1913 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
1914 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
1915 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
1916 swizzled, result);
1917 }
1918 break;
1919 }
1920
1921 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1922 case ir_triop_fma:
1923 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1924 break;
1925 case ir_triop_lrp:
1926 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1927 break;
1928 case ir_triop_csel:
1929 if (supports_ints)
1930 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1931 else
1932 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1933 break;
1934 case ir_triop_bitfield_extract:
1935 result = (out_type == GLSL_TYPE_INT) ?
1936 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1937 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1938 break;
1939 case ir_quadop_bitfield_insert:
1940 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1941 break;
1942 case ir_quadop_vector:
1943 result = nir_vec(&b, srcs, ir->type->vector_elements);
1944 break;
1945
1946 default:
1947 unreachable("not reached");
1948 }
1949 }
1950
1951 void
1952 nir_visitor::visit(ir_swizzle *ir)
1953 {
1954 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1955 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1956 ir->type->vector_elements, !supports_ints);
1957 }
1958
1959 void
1960 nir_visitor::visit(ir_texture *ir)
1961 {
1962 unsigned num_srcs;
1963 nir_texop op;
1964 switch (ir->op) {
1965 case ir_tex:
1966 op = nir_texop_tex;
1967 num_srcs = 1; /* coordinate */
1968 break;
1969
1970 case ir_txb:
1971 case ir_txl:
1972 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1973 num_srcs = 2; /* coordinate, bias/lod */
1974 break;
1975
1976 case ir_txd:
1977 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1978 num_srcs = 3;
1979 break;
1980
1981 case ir_txf:
1982 op = nir_texop_txf;
1983 if (ir->lod_info.lod != NULL)
1984 num_srcs = 2; /* coordinate, lod */
1985 else
1986 num_srcs = 1; /* coordinate */
1987 break;
1988
1989 case ir_txf_ms:
1990 op = nir_texop_txf_ms;
1991 num_srcs = 2; /* coordinate, sample_index */
1992 break;
1993
1994 case ir_txs:
1995 op = nir_texop_txs;
1996 if (ir->lod_info.lod != NULL)
1997 num_srcs = 1; /* lod */
1998 else
1999 num_srcs = 0;
2000 break;
2001
2002 case ir_lod:
2003 op = nir_texop_lod;
2004 num_srcs = 1; /* coordinate */
2005 break;
2006
2007 case ir_tg4:
2008 op = nir_texop_tg4;
2009 num_srcs = 1; /* coordinate */
2010 break;
2011
2012 case ir_query_levels:
2013 op = nir_texop_query_levels;
2014 num_srcs = 0;
2015 break;
2016
2017 case ir_texture_samples:
2018 op = nir_texop_texture_samples;
2019 num_srcs = 0;
2020 break;
2021
2022 case ir_samples_identical:
2023 op = nir_texop_samples_identical;
2024 num_srcs = 1; /* coordinate */
2025 break;
2026
2027 default:
2028 unreachable("not reached");
2029 }
2030
2031 if (ir->projector != NULL)
2032 num_srcs++;
2033 if (ir->shadow_comparator != NULL)
2034 num_srcs++;
2035 if (ir->offset != NULL)
2036 num_srcs++;
2037
2038 /* Add one for the texture deref */
2039 num_srcs += 2;
2040
2041 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2042
2043 instr->op = op;
2044 instr->sampler_dim =
2045 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2046 instr->is_array = ir->sampler->type->sampler_array;
2047 instr->is_shadow = ir->sampler->type->sampler_shadow;
2048 if (instr->is_shadow)
2049 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2050 switch (ir->type->base_type) {
2051 case GLSL_TYPE_FLOAT:
2052 instr->dest_type = nir_type_float;
2053 break;
2054 case GLSL_TYPE_INT:
2055 instr->dest_type = nir_type_int;
2056 break;
2057 case GLSL_TYPE_BOOL:
2058 case GLSL_TYPE_UINT:
2059 instr->dest_type = nir_type_uint;
2060 break;
2061 default:
2062 unreachable("not reached");
2063 }
2064
2065 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2066 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2067 instr->src[0].src_type = nir_tex_src_texture_deref;
2068 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2069 instr->src[1].src_type = nir_tex_src_sampler_deref;
2070
2071 unsigned src_number = 2;
2072
2073 if (ir->coordinate != NULL) {
2074 instr->coord_components = ir->coordinate->type->vector_elements;
2075 instr->src[src_number].src =
2076 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2077 instr->src[src_number].src_type = nir_tex_src_coord;
2078 src_number++;
2079 }
2080
2081 if (ir->projector != NULL) {
2082 instr->src[src_number].src =
2083 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2084 instr->src[src_number].src_type = nir_tex_src_projector;
2085 src_number++;
2086 }
2087
2088 if (ir->shadow_comparator != NULL) {
2089 instr->src[src_number].src =
2090 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2091 instr->src[src_number].src_type = nir_tex_src_comparator;
2092 src_number++;
2093 }
2094
2095 if (ir->offset != NULL) {
2096 /* we don't support multiple offsets yet */
2097 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2098
2099 instr->src[src_number].src =
2100 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2101 instr->src[src_number].src_type = nir_tex_src_offset;
2102 src_number++;
2103 }
2104
2105 switch (ir->op) {
2106 case ir_txb:
2107 instr->src[src_number].src =
2108 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2109 instr->src[src_number].src_type = nir_tex_src_bias;
2110 src_number++;
2111 break;
2112
2113 case ir_txl:
2114 case ir_txf:
2115 case ir_txs:
2116 if (ir->lod_info.lod != NULL) {
2117 instr->src[src_number].src =
2118 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2119 instr->src[src_number].src_type = nir_tex_src_lod;
2120 src_number++;
2121 }
2122 break;
2123
2124 case ir_txd:
2125 instr->src[src_number].src =
2126 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2127 instr->src[src_number].src_type = nir_tex_src_ddx;
2128 src_number++;
2129 instr->src[src_number].src =
2130 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2131 instr->src[src_number].src_type = nir_tex_src_ddy;
2132 src_number++;
2133 break;
2134
2135 case ir_txf_ms:
2136 instr->src[src_number].src =
2137 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2138 instr->src[src_number].src_type = nir_tex_src_ms_index;
2139 src_number++;
2140 break;
2141
2142 case ir_tg4:
2143 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2144 break;
2145
2146 default:
2147 break;
2148 }
2149
2150 assert(src_number == num_srcs);
2151
2152 unsigned bit_size = glsl_get_bit_size(ir->type);
2153 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2154 }
2155
2156 void
2157 nir_visitor::visit(ir_constant *ir)
2158 {
2159 /*
2160 * We don't know if this variable is an array or struct that gets
2161 * dereferenced, so do the safe thing an make it a variable with a
2162 * constant initializer and return a dereference.
2163 */
2164
2165 nir_variable *var =
2166 nir_local_variable_create(this->impl, ir->type, "const_temp");
2167 var->data.read_only = true;
2168 var->constant_initializer = constant_copy(ir, var);
2169
2170 this->deref = nir_build_deref_var(&b, var);
2171 }
2172
2173 void
2174 nir_visitor::visit(ir_dereference_variable *ir)
2175 {
2176 struct hash_entry *entry =
2177 _mesa_hash_table_search(this->var_table, ir->var);
2178 assert(entry);
2179 nir_variable *var = (nir_variable *) entry->data;
2180
2181 this->deref = nir_build_deref_var(&b, var);
2182 }
2183
2184 void
2185 nir_visitor::visit(ir_dereference_record *ir)
2186 {
2187 ir->record->accept(this);
2188
2189 int field_index = ir->field_idx;
2190 assert(field_index >= 0);
2191
2192 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2193 }
2194
2195 void
2196 nir_visitor::visit(ir_dereference_array *ir)
2197 {
2198 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2199
2200 ir->array->accept(this);
2201
2202 this->deref = nir_build_deref_array(&b, this->deref, index);
2203 }
2204
2205 void
2206 nir_visitor::visit(ir_barrier *)
2207 {
2208 nir_intrinsic_instr *instr =
2209 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2210 nir_builder_instr_insert(&b, &instr->instr);
2211 }