mesa: Add GL/GLSL plumbing for ARB_fragment_shader_interlock.
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 /*
38 * pass to lower GLSL IR to NIR
39 *
40 * This will lower variable dereferences to loads/stores of corresponding
41 * variables in NIR - the variables will be converted to registers in a later
42 * pass.
43 */
44
45 namespace {
46
47 class nir_visitor : public ir_visitor
48 {
49 public:
50 nir_visitor(nir_shader *shader);
51 ~nir_visitor();
52
53 virtual void visit(ir_variable *);
54 virtual void visit(ir_function *);
55 virtual void visit(ir_function_signature *);
56 virtual void visit(ir_loop *);
57 virtual void visit(ir_if *);
58 virtual void visit(ir_discard *);
59 virtual void visit(ir_loop_jump *);
60 virtual void visit(ir_return *);
61 virtual void visit(ir_call *);
62 virtual void visit(ir_assignment *);
63 virtual void visit(ir_emit_vertex *);
64 virtual void visit(ir_end_primitive *);
65 virtual void visit(ir_expression *);
66 virtual void visit(ir_swizzle *);
67 virtual void visit(ir_texture *);
68 virtual void visit(ir_constant *);
69 virtual void visit(ir_dereference_variable *);
70 virtual void visit(ir_dereference_record *);
71 virtual void visit(ir_dereference_array *);
72 virtual void visit(ir_barrier *);
73
74 void create_function(ir_function_signature *ir);
75
76 private:
77 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
78 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
79
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
83 nir_ssa_def *src2);
84 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
85 nir_ssa_def *src2, nir_ssa_def *src3);
86
87 bool supports_ints;
88
89 nir_shader *shader;
90 nir_function_impl *impl;
91 nir_builder b;
92 nir_ssa_def *result; /* result of the expression tree last visited */
93
94 nir_deref_var *evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir);
95
96 /* the head of the dereference chain we're creating */
97 nir_deref_var *deref_head;
98 /* the tail of the dereference chain we're creating */
99 nir_deref *deref_tail;
100
101 nir_variable *var; /* variable created by ir_variable visitor */
102
103 /* whether the IR we're operating on is per-function or global */
104 bool is_global;
105
106 /* map of ir_variable -> nir_variable */
107 struct hash_table *var_table;
108
109 /* map of ir_function_signature -> nir_function_overload */
110 struct hash_table *overload_table;
111 };
112
113 /*
114 * This visitor runs before the main visitor, calling create_function() for
115 * each function so that the main visitor can resolve forward references in
116 * calls.
117 */
118
119 class nir_function_visitor : public ir_hierarchical_visitor
120 {
121 public:
122 nir_function_visitor(nir_visitor *v) : visitor(v)
123 {
124 }
125 virtual ir_visitor_status visit_enter(ir_function *);
126
127 private:
128 nir_visitor *visitor;
129 };
130
131 } /* end of anonymous namespace */
132
133 static void
134 nir_remap_attributes(nir_shader *shader,
135 const nir_shader_compiler_options *options)
136 {
137 if (options->vs_inputs_dual_locations) {
138 nir_foreach_variable(var, &shader->inputs) {
139 var->data.location +=
140 _mesa_bitcount_64(shader->info.vs.double_inputs &
141 BITFIELD64_MASK(var->data.location));
142 }
143 }
144
145 /* Once the remap is done, reset double_inputs_read, so later it will have
146 * which location/slots are doubles */
147 shader->info.vs.double_inputs = 0;
148 }
149
150 nir_shader *
151 glsl_to_nir(const struct gl_shader_program *shader_prog,
152 gl_shader_stage stage,
153 const nir_shader_compiler_options *options)
154 {
155 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
156
157 nir_shader *shader = nir_shader_create(NULL, stage, options,
158 &sh->Program->info);
159
160 nir_visitor v1(shader);
161 nir_function_visitor v2(&v1);
162 v2.run(sh->ir);
163 visit_exec_list(sh->ir, &v1);
164
165 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
166
167 /* Remap the locations to slots so those requiring two slots will occupy
168 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
169 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
170 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
171 if (shader->info.stage == MESA_SHADER_VERTEX)
172 nir_remap_attributes(shader, options);
173
174 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
175 if (shader_prog->Label)
176 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
177
178 /* Check for transform feedback varyings specified via the API */
179 shader->info.has_transform_feedback_varyings =
180 shader_prog->TransformFeedback.NumVarying > 0;
181
182 /* Check for transform feedback varyings specified in the Shader */
183 if (shader_prog->last_vert_prog)
184 shader->info.has_transform_feedback_varyings |=
185 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
186
187 return shader;
188 }
189
190 nir_visitor::nir_visitor(nir_shader *shader)
191 {
192 this->supports_ints = shader->options->native_integers;
193 this->shader = shader;
194 this->is_global = true;
195 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
196 _mesa_key_pointer_equal);
197 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
198 _mesa_key_pointer_equal);
199 this->result = NULL;
200 this->impl = NULL;
201 this->var = NULL;
202 this->deref_head = NULL;
203 this->deref_tail = NULL;
204 memset(&this->b, 0, sizeof(this->b));
205 }
206
207 nir_visitor::~nir_visitor()
208 {
209 _mesa_hash_table_destroy(this->var_table, NULL);
210 _mesa_hash_table_destroy(this->overload_table, NULL);
211 }
212
213 nir_deref_var *
214 nir_visitor::evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir)
215 {
216 ir->accept(this);
217 ralloc_steal(mem_ctx, this->deref_head);
218 return this->deref_head;
219 }
220
221 static nir_constant *
222 constant_copy(ir_constant *ir, void *mem_ctx)
223 {
224 if (ir == NULL)
225 return NULL;
226
227 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
228
229 const unsigned rows = ir->type->vector_elements;
230 const unsigned cols = ir->type->matrix_columns;
231 unsigned i;
232
233 ret->num_elements = 0;
234 switch (ir->type->base_type) {
235 case GLSL_TYPE_UINT:
236 /* Only float base types can be matrices. */
237 assert(cols == 1);
238
239 for (unsigned r = 0; r < rows; r++)
240 ret->values[0].u32[r] = ir->value.u[r];
241
242 break;
243
244 case GLSL_TYPE_INT:
245 /* Only float base types can be matrices. */
246 assert(cols == 1);
247
248 for (unsigned r = 0; r < rows; r++)
249 ret->values[0].i32[r] = ir->value.i[r];
250
251 break;
252
253 case GLSL_TYPE_FLOAT:
254 for (unsigned c = 0; c < cols; c++) {
255 for (unsigned r = 0; r < rows; r++)
256 ret->values[c].f32[r] = ir->value.f[c * rows + r];
257 }
258 break;
259
260 case GLSL_TYPE_DOUBLE:
261 for (unsigned c = 0; c < cols; c++) {
262 for (unsigned r = 0; r < rows; r++)
263 ret->values[c].f64[r] = ir->value.d[c * rows + r];
264 }
265 break;
266
267 case GLSL_TYPE_UINT64:
268 /* Only float base types can be matrices. */
269 assert(cols == 1);
270
271 for (unsigned r = 0; r < rows; r++)
272 ret->values[0].u64[r] = ir->value.u64[r];
273 break;
274
275 case GLSL_TYPE_INT64:
276 /* Only float base types can be matrices. */
277 assert(cols == 1);
278
279 for (unsigned r = 0; r < rows; r++)
280 ret->values[0].i64[r] = ir->value.i64[r];
281 break;
282
283 case GLSL_TYPE_BOOL:
284 /* Only float base types can be matrices. */
285 assert(cols == 1);
286
287 for (unsigned r = 0; r < rows; r++)
288 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
289
290 break;
291
292 case GLSL_TYPE_STRUCT:
293 case GLSL_TYPE_ARRAY:
294 ret->elements = ralloc_array(mem_ctx, nir_constant *,
295 ir->type->length);
296 ret->num_elements = ir->type->length;
297
298 for (i = 0; i < ir->type->length; i++)
299 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
300 break;
301
302 default:
303 unreachable("not reached");
304 }
305
306 return ret;
307 }
308
309 void
310 nir_visitor::visit(ir_variable *ir)
311 {
312 /* TODO: In future we should switch to using the NIR lowering pass but for
313 * now just ignore these variables as GLSL IR should have lowered them.
314 * Anything remaining are just dead vars that weren't cleaned up.
315 */
316 if (ir->data.mode == ir_var_shader_shared)
317 return;
318
319 nir_variable *var = rzalloc(shader, nir_variable);
320 var->type = ir->type;
321 var->name = ralloc_strdup(var, ir->name);
322
323 var->data.always_active_io = ir->data.always_active_io;
324 var->data.read_only = ir->data.read_only;
325 var->data.centroid = ir->data.centroid;
326 var->data.sample = ir->data.sample;
327 var->data.patch = ir->data.patch;
328 var->data.invariant = ir->data.invariant;
329 var->data.location = ir->data.location;
330 var->data.stream = ir->data.stream;
331 var->data.compact = false;
332
333 switch(ir->data.mode) {
334 case ir_var_auto:
335 case ir_var_temporary:
336 if (is_global)
337 var->data.mode = nir_var_global;
338 else
339 var->data.mode = nir_var_local;
340 break;
341
342 case ir_var_function_in:
343 case ir_var_function_out:
344 case ir_var_function_inout:
345 case ir_var_const_in:
346 var->data.mode = nir_var_local;
347 break;
348
349 case ir_var_shader_in:
350 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
351 ir->data.location == VARYING_SLOT_FACE) {
352 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
353 var->data.location = SYSTEM_VALUE_FRONT_FACE;
354 var->data.mode = nir_var_system_value;
355 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
356 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
357 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
358 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
359 var->data.mode = nir_var_system_value;
360 } else {
361 var->data.mode = nir_var_shader_in;
362
363 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
364 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
365 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
366 var->data.compact = ir->type->without_array()->is_scalar();
367 }
368 }
369
370 /* Mark all the locations that require two slots */
371 if (shader->info.stage == MESA_SHADER_VERTEX &&
372 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
373 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
374 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
375 shader->info.vs.double_inputs |= bitfield;
376 }
377 }
378 break;
379
380 case ir_var_shader_out:
381 var->data.mode = nir_var_shader_out;
382 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
383 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
384 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
385 var->data.compact = ir->type->without_array()->is_scalar();
386 }
387 break;
388
389 case ir_var_uniform:
390 var->data.mode = nir_var_uniform;
391 break;
392
393 case ir_var_shader_storage:
394 var->data.mode = nir_var_shader_storage;
395 break;
396
397 case ir_var_system_value:
398 var->data.mode = nir_var_system_value;
399 break;
400
401 default:
402 unreachable("not reached");
403 }
404
405 var->data.interpolation = ir->data.interpolation;
406 var->data.origin_upper_left = ir->data.origin_upper_left;
407 var->data.pixel_center_integer = ir->data.pixel_center_integer;
408 var->data.location_frac = ir->data.location_frac;
409
410 if (var->data.pixel_center_integer) {
411 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
412 shader->info.fs.pixel_center_integer = true;
413 }
414
415 switch (ir->data.depth_layout) {
416 case ir_depth_layout_none:
417 var->data.depth_layout = nir_depth_layout_none;
418 break;
419 case ir_depth_layout_any:
420 var->data.depth_layout = nir_depth_layout_any;
421 break;
422 case ir_depth_layout_greater:
423 var->data.depth_layout = nir_depth_layout_greater;
424 break;
425 case ir_depth_layout_less:
426 var->data.depth_layout = nir_depth_layout_less;
427 break;
428 case ir_depth_layout_unchanged:
429 var->data.depth_layout = nir_depth_layout_unchanged;
430 break;
431 default:
432 unreachable("not reached");
433 }
434
435 var->data.index = ir->data.index;
436 var->data.descriptor_set = 0;
437 var->data.binding = ir->data.binding;
438 var->data.bindless = ir->data.bindless;
439 var->data.offset = ir->data.offset;
440 var->data.image.read_only = ir->data.memory_read_only;
441 var->data.image.write_only = ir->data.memory_write_only;
442 var->data.image.coherent = ir->data.memory_coherent;
443 var->data.image._volatile = ir->data.memory_volatile;
444 var->data.image.restrict_flag = ir->data.memory_restrict;
445 var->data.image.format = ir->data.image_format;
446 var->data.fb_fetch_output = ir->data.fb_fetch_output;
447
448 var->num_state_slots = ir->get_num_state_slots();
449 if (var->num_state_slots > 0) {
450 var->state_slots = rzalloc_array(var, nir_state_slot,
451 var->num_state_slots);
452
453 ir_state_slot *state_slots = ir->get_state_slots();
454 for (unsigned i = 0; i < var->num_state_slots; i++) {
455 for (unsigned j = 0; j < 5; j++)
456 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
457 var->state_slots[i].swizzle = state_slots[i].swizzle;
458 }
459 } else {
460 var->state_slots = NULL;
461 }
462
463 var->constant_initializer = constant_copy(ir->constant_initializer, var);
464
465 var->interface_type = ir->get_interface_type();
466
467 if (var->data.mode == nir_var_local)
468 nir_function_impl_add_variable(impl, var);
469 else
470 nir_shader_add_variable(shader, var);
471
472 _mesa_hash_table_insert(var_table, ir, var);
473 this->var = var;
474 }
475
476 ir_visitor_status
477 nir_function_visitor::visit_enter(ir_function *ir)
478 {
479 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
480 visitor->create_function(sig);
481 }
482 return visit_continue_with_parent;
483 }
484
485 void
486 nir_visitor::create_function(ir_function_signature *ir)
487 {
488 if (ir->is_intrinsic())
489 return;
490
491 nir_function *func = nir_function_create(shader, ir->function_name());
492
493 assert(ir->parameters.is_empty());
494 assert(ir->return_type == glsl_type::void_type);
495
496 _mesa_hash_table_insert(this->overload_table, ir, func);
497 }
498
499 void
500 nir_visitor::visit(ir_function *ir)
501 {
502 foreach_in_list(ir_function_signature, sig, &ir->signatures)
503 sig->accept(this);
504 }
505
506 void
507 nir_visitor::visit(ir_function_signature *ir)
508 {
509 if (ir->is_intrinsic())
510 return;
511
512 struct hash_entry *entry =
513 _mesa_hash_table_search(this->overload_table, ir);
514
515 assert(entry);
516 nir_function *func = (nir_function *) entry->data;
517
518 if (ir->is_defined) {
519 nir_function_impl *impl = nir_function_impl_create(func);
520 this->impl = impl;
521
522 assert(strcmp(func->name, "main") == 0);
523 assert(ir->parameters.is_empty());
524 assert(func->return_type == glsl_type::void_type);
525
526 this->is_global = false;
527
528 nir_builder_init(&b, impl);
529 b.cursor = nir_after_cf_list(&impl->body);
530 visit_exec_list(&ir->body, this);
531
532 this->is_global = true;
533 } else {
534 func->impl = NULL;
535 }
536 }
537
538 void
539 nir_visitor::visit(ir_loop *ir)
540 {
541 nir_push_loop(&b);
542 visit_exec_list(&ir->body_instructions, this);
543 nir_pop_loop(&b, NULL);
544 }
545
546 void
547 nir_visitor::visit(ir_if *ir)
548 {
549 nir_push_if(&b, evaluate_rvalue(ir->condition));
550 visit_exec_list(&ir->then_instructions, this);
551 nir_push_else(&b, NULL);
552 visit_exec_list(&ir->else_instructions, this);
553 nir_pop_if(&b, NULL);
554 }
555
556 void
557 nir_visitor::visit(ir_discard *ir)
558 {
559 /*
560 * discards aren't treated as control flow, because before we lower them
561 * they can appear anywhere in the shader and the stuff after them may still
562 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
563 * discards will be immediately followed by a return.
564 */
565
566 nir_intrinsic_instr *discard;
567 if (ir->condition) {
568 discard = nir_intrinsic_instr_create(this->shader,
569 nir_intrinsic_discard_if);
570 discard->src[0] =
571 nir_src_for_ssa(evaluate_rvalue(ir->condition));
572 } else {
573 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
574 }
575
576 nir_builder_instr_insert(&b, &discard->instr);
577 }
578
579 void
580 nir_visitor::visit(ir_emit_vertex *ir)
581 {
582 nir_intrinsic_instr *instr =
583 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
584 nir_intrinsic_set_stream_id(instr, ir->stream_id());
585 nir_builder_instr_insert(&b, &instr->instr);
586 }
587
588 void
589 nir_visitor::visit(ir_end_primitive *ir)
590 {
591 nir_intrinsic_instr *instr =
592 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
593 nir_intrinsic_set_stream_id(instr, ir->stream_id());
594 nir_builder_instr_insert(&b, &instr->instr);
595 }
596
597 void
598 nir_visitor::visit(ir_loop_jump *ir)
599 {
600 nir_jump_type type;
601 switch (ir->mode) {
602 case ir_loop_jump::jump_break:
603 type = nir_jump_break;
604 break;
605 case ir_loop_jump::jump_continue:
606 type = nir_jump_continue;
607 break;
608 default:
609 unreachable("not reached");
610 }
611
612 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
613 nir_builder_instr_insert(&b, &instr->instr);
614 }
615
616 void
617 nir_visitor::visit(ir_return *ir)
618 {
619 if (ir->value != NULL) {
620 nir_intrinsic_instr *copy =
621 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
622
623 copy->variables[0] = nir_deref_var_create(copy, this->impl->return_var);
624 copy->variables[1] = evaluate_deref(&copy->instr, ir->value);
625 }
626
627 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
628 nir_builder_instr_insert(&b, &instr->instr);
629 }
630
631 void
632 nir_visitor::visit(ir_call *ir)
633 {
634 if (ir->callee->is_intrinsic()) {
635 nir_intrinsic_op op;
636
637 switch (ir->callee->intrinsic_id) {
638 case ir_intrinsic_atomic_counter_read:
639 op = nir_intrinsic_atomic_counter_read_var;
640 break;
641 case ir_intrinsic_atomic_counter_increment:
642 op = nir_intrinsic_atomic_counter_inc_var;
643 break;
644 case ir_intrinsic_atomic_counter_predecrement:
645 op = nir_intrinsic_atomic_counter_dec_var;
646 break;
647 case ir_intrinsic_atomic_counter_add:
648 op = nir_intrinsic_atomic_counter_add_var;
649 break;
650 case ir_intrinsic_atomic_counter_and:
651 op = nir_intrinsic_atomic_counter_and_var;
652 break;
653 case ir_intrinsic_atomic_counter_or:
654 op = nir_intrinsic_atomic_counter_or_var;
655 break;
656 case ir_intrinsic_atomic_counter_xor:
657 op = nir_intrinsic_atomic_counter_xor_var;
658 break;
659 case ir_intrinsic_atomic_counter_min:
660 op = nir_intrinsic_atomic_counter_min_var;
661 break;
662 case ir_intrinsic_atomic_counter_max:
663 op = nir_intrinsic_atomic_counter_max_var;
664 break;
665 case ir_intrinsic_atomic_counter_exchange:
666 op = nir_intrinsic_atomic_counter_exchange_var;
667 break;
668 case ir_intrinsic_atomic_counter_comp_swap:
669 op = nir_intrinsic_atomic_counter_comp_swap_var;
670 break;
671 case ir_intrinsic_image_load:
672 op = nir_intrinsic_image_var_load;
673 break;
674 case ir_intrinsic_image_store:
675 op = nir_intrinsic_image_var_store;
676 break;
677 case ir_intrinsic_image_atomic_add:
678 op = nir_intrinsic_image_var_atomic_add;
679 break;
680 case ir_intrinsic_image_atomic_min:
681 op = nir_intrinsic_image_var_atomic_min;
682 break;
683 case ir_intrinsic_image_atomic_max:
684 op = nir_intrinsic_image_var_atomic_max;
685 break;
686 case ir_intrinsic_image_atomic_and:
687 op = nir_intrinsic_image_var_atomic_and;
688 break;
689 case ir_intrinsic_image_atomic_or:
690 op = nir_intrinsic_image_var_atomic_or;
691 break;
692 case ir_intrinsic_image_atomic_xor:
693 op = nir_intrinsic_image_var_atomic_xor;
694 break;
695 case ir_intrinsic_image_atomic_exchange:
696 op = nir_intrinsic_image_var_atomic_exchange;
697 break;
698 case ir_intrinsic_image_atomic_comp_swap:
699 op = nir_intrinsic_image_var_atomic_comp_swap;
700 break;
701 case ir_intrinsic_memory_barrier:
702 op = nir_intrinsic_memory_barrier;
703 break;
704 case ir_intrinsic_image_size:
705 op = nir_intrinsic_image_var_size;
706 break;
707 case ir_intrinsic_image_samples:
708 op = nir_intrinsic_image_var_samples;
709 break;
710 case ir_intrinsic_ssbo_store:
711 op = nir_intrinsic_store_ssbo;
712 break;
713 case ir_intrinsic_ssbo_load:
714 op = nir_intrinsic_load_ssbo;
715 break;
716 case ir_intrinsic_ssbo_atomic_add:
717 op = nir_intrinsic_ssbo_atomic_add;
718 break;
719 case ir_intrinsic_ssbo_atomic_and:
720 op = nir_intrinsic_ssbo_atomic_and;
721 break;
722 case ir_intrinsic_ssbo_atomic_or:
723 op = nir_intrinsic_ssbo_atomic_or;
724 break;
725 case ir_intrinsic_ssbo_atomic_xor:
726 op = nir_intrinsic_ssbo_atomic_xor;
727 break;
728 case ir_intrinsic_ssbo_atomic_min:
729 assert(ir->return_deref);
730 if (ir->return_deref->type == glsl_type::int_type)
731 op = nir_intrinsic_ssbo_atomic_imin;
732 else if (ir->return_deref->type == glsl_type::uint_type)
733 op = nir_intrinsic_ssbo_atomic_umin;
734 else
735 unreachable("Invalid type");
736 break;
737 case ir_intrinsic_ssbo_atomic_max:
738 assert(ir->return_deref);
739 if (ir->return_deref->type == glsl_type::int_type)
740 op = nir_intrinsic_ssbo_atomic_imax;
741 else if (ir->return_deref->type == glsl_type::uint_type)
742 op = nir_intrinsic_ssbo_atomic_umax;
743 else
744 unreachable("Invalid type");
745 break;
746 case ir_intrinsic_ssbo_atomic_exchange:
747 op = nir_intrinsic_ssbo_atomic_exchange;
748 break;
749 case ir_intrinsic_ssbo_atomic_comp_swap:
750 op = nir_intrinsic_ssbo_atomic_comp_swap;
751 break;
752 case ir_intrinsic_shader_clock:
753 op = nir_intrinsic_shader_clock;
754 break;
755 case ir_intrinsic_begin_invocation_interlock:
756 op = nir_intrinsic_begin_invocation_interlock;
757 break;
758 case ir_intrinsic_end_invocation_interlock:
759 op = nir_intrinsic_end_invocation_interlock;
760 break;
761 case ir_intrinsic_group_memory_barrier:
762 op = nir_intrinsic_group_memory_barrier;
763 break;
764 case ir_intrinsic_memory_barrier_atomic_counter:
765 op = nir_intrinsic_memory_barrier_atomic_counter;
766 break;
767 case ir_intrinsic_memory_barrier_buffer:
768 op = nir_intrinsic_memory_barrier_buffer;
769 break;
770 case ir_intrinsic_memory_barrier_image:
771 op = nir_intrinsic_memory_barrier_image;
772 break;
773 case ir_intrinsic_memory_barrier_shared:
774 op = nir_intrinsic_memory_barrier_shared;
775 break;
776 case ir_intrinsic_shared_load:
777 op = nir_intrinsic_load_shared;
778 break;
779 case ir_intrinsic_shared_store:
780 op = nir_intrinsic_store_shared;
781 break;
782 case ir_intrinsic_shared_atomic_add:
783 op = nir_intrinsic_shared_atomic_add;
784 break;
785 case ir_intrinsic_shared_atomic_and:
786 op = nir_intrinsic_shared_atomic_and;
787 break;
788 case ir_intrinsic_shared_atomic_or:
789 op = nir_intrinsic_shared_atomic_or;
790 break;
791 case ir_intrinsic_shared_atomic_xor:
792 op = nir_intrinsic_shared_atomic_xor;
793 break;
794 case ir_intrinsic_shared_atomic_min:
795 assert(ir->return_deref);
796 if (ir->return_deref->type == glsl_type::int_type)
797 op = nir_intrinsic_shared_atomic_imin;
798 else if (ir->return_deref->type == glsl_type::uint_type)
799 op = nir_intrinsic_shared_atomic_umin;
800 else
801 unreachable("Invalid type");
802 break;
803 case ir_intrinsic_shared_atomic_max:
804 assert(ir->return_deref);
805 if (ir->return_deref->type == glsl_type::int_type)
806 op = nir_intrinsic_shared_atomic_imax;
807 else if (ir->return_deref->type == glsl_type::uint_type)
808 op = nir_intrinsic_shared_atomic_umax;
809 else
810 unreachable("Invalid type");
811 break;
812 case ir_intrinsic_shared_atomic_exchange:
813 op = nir_intrinsic_shared_atomic_exchange;
814 break;
815 case ir_intrinsic_shared_atomic_comp_swap:
816 op = nir_intrinsic_shared_atomic_comp_swap;
817 break;
818 case ir_intrinsic_vote_any:
819 op = nir_intrinsic_vote_any;
820 break;
821 case ir_intrinsic_vote_all:
822 op = nir_intrinsic_vote_all;
823 break;
824 case ir_intrinsic_vote_eq:
825 op = nir_intrinsic_vote_ieq;
826 break;
827 case ir_intrinsic_ballot:
828 op = nir_intrinsic_ballot;
829 break;
830 case ir_intrinsic_read_invocation:
831 op = nir_intrinsic_read_invocation;
832 break;
833 case ir_intrinsic_read_first_invocation:
834 op = nir_intrinsic_read_first_invocation;
835 break;
836 default:
837 unreachable("not reached");
838 }
839
840 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
841 nir_dest *dest = &instr->dest;
842
843 switch (op) {
844 case nir_intrinsic_atomic_counter_read_var:
845 case nir_intrinsic_atomic_counter_inc_var:
846 case nir_intrinsic_atomic_counter_dec_var:
847 case nir_intrinsic_atomic_counter_add_var:
848 case nir_intrinsic_atomic_counter_min_var:
849 case nir_intrinsic_atomic_counter_max_var:
850 case nir_intrinsic_atomic_counter_and_var:
851 case nir_intrinsic_atomic_counter_or_var:
852 case nir_intrinsic_atomic_counter_xor_var:
853 case nir_intrinsic_atomic_counter_exchange_var:
854 case nir_intrinsic_atomic_counter_comp_swap_var: {
855 /* Set the counter variable dereference. */
856 exec_node *param = ir->actual_parameters.get_head();
857 ir_dereference *counter = (ir_dereference *)param;
858
859 instr->variables[0] = evaluate_deref(&instr->instr, counter);
860 param = param->get_next();
861
862 /* Set the intrinsic destination. */
863 if (ir->return_deref) {
864 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
865 }
866
867 /* Set the intrinsic parameters. */
868 if (!param->is_tail_sentinel()) {
869 instr->src[0] =
870 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
871 param = param->get_next();
872 }
873
874 if (!param->is_tail_sentinel()) {
875 instr->src[1] =
876 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
877 param = param->get_next();
878 }
879
880 nir_builder_instr_insert(&b, &instr->instr);
881 break;
882 }
883 case nir_intrinsic_image_var_load:
884 case nir_intrinsic_image_var_store:
885 case nir_intrinsic_image_var_atomic_add:
886 case nir_intrinsic_image_var_atomic_min:
887 case nir_intrinsic_image_var_atomic_max:
888 case nir_intrinsic_image_var_atomic_and:
889 case nir_intrinsic_image_var_atomic_or:
890 case nir_intrinsic_image_var_atomic_xor:
891 case nir_intrinsic_image_var_atomic_exchange:
892 case nir_intrinsic_image_var_atomic_comp_swap:
893 case nir_intrinsic_image_var_samples:
894 case nir_intrinsic_image_var_size: {
895 nir_ssa_undef_instr *instr_undef =
896 nir_ssa_undef_instr_create(shader, 1, 32);
897 nir_builder_instr_insert(&b, &instr_undef->instr);
898
899 /* Set the image variable dereference. */
900 exec_node *param = ir->actual_parameters.get_head();
901 ir_dereference *image = (ir_dereference *)param;
902 const glsl_type *type =
903 image->variable_referenced()->type->without_array();
904
905 instr->variables[0] = evaluate_deref(&instr->instr, image);
906 param = param->get_next();
907
908 /* Set the intrinsic destination. */
909 if (ir->return_deref) {
910 unsigned num_components = ir->return_deref->type->vector_elements;
911 if (instr->intrinsic == nir_intrinsic_image_var_size)
912 instr->num_components = num_components;
913 nir_ssa_dest_init(&instr->instr, &instr->dest,
914 num_components, 32, NULL);
915 }
916
917 if (op == nir_intrinsic_image_var_size ||
918 op == nir_intrinsic_image_var_samples) {
919 nir_builder_instr_insert(&b, &instr->instr);
920 break;
921 }
922
923 /* Set the address argument, extending the coordinate vector to four
924 * components.
925 */
926 nir_ssa_def *src_addr =
927 evaluate_rvalue((ir_dereference *)param);
928 nir_ssa_def *srcs[4];
929
930 for (int i = 0; i < 4; i++) {
931 if (i < type->coordinate_components())
932 srcs[i] = nir_channel(&b, src_addr, i);
933 else
934 srcs[i] = &instr_undef->def;
935 }
936
937 instr->src[0] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
938 param = param->get_next();
939
940 /* Set the sample argument, which is undefined for single-sample
941 * images.
942 */
943 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
944 instr->src[1] =
945 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
946 param = param->get_next();
947 } else {
948 instr->src[1] = nir_src_for_ssa(&instr_undef->def);
949 }
950
951 /* Set the intrinsic parameters. */
952 if (!param->is_tail_sentinel()) {
953 instr->src[2] =
954 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
955 param = param->get_next();
956 }
957
958 if (!param->is_tail_sentinel()) {
959 instr->src[3] =
960 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
961 param = param->get_next();
962 }
963 nir_builder_instr_insert(&b, &instr->instr);
964 break;
965 }
966 case nir_intrinsic_memory_barrier:
967 case nir_intrinsic_group_memory_barrier:
968 case nir_intrinsic_memory_barrier_atomic_counter:
969 case nir_intrinsic_memory_barrier_buffer:
970 case nir_intrinsic_memory_barrier_image:
971 case nir_intrinsic_memory_barrier_shared:
972 nir_builder_instr_insert(&b, &instr->instr);
973 break;
974 case nir_intrinsic_shader_clock:
975 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
976 instr->num_components = 2;
977 nir_builder_instr_insert(&b, &instr->instr);
978 break;
979 case nir_intrinsic_begin_invocation_interlock:
980 nir_builder_instr_insert(&b, &instr->instr);
981 break;
982 case nir_intrinsic_end_invocation_interlock:
983 nir_builder_instr_insert(&b, &instr->instr);
984 break;
985 case nir_intrinsic_store_ssbo: {
986 exec_node *param = ir->actual_parameters.get_head();
987 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
988
989 param = param->get_next();
990 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
991
992 param = param->get_next();
993 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
994
995 param = param->get_next();
996 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
997 assert(write_mask);
998
999 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1000 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1001 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1002 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1003 instr->num_components = val->type->vector_elements;
1004
1005 nir_builder_instr_insert(&b, &instr->instr);
1006 break;
1007 }
1008 case nir_intrinsic_load_ssbo: {
1009 exec_node *param = ir->actual_parameters.get_head();
1010 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1011
1012 param = param->get_next();
1013 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1014
1015 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1016 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1017
1018 const glsl_type *type = ir->return_deref->var->type;
1019 instr->num_components = type->vector_elements;
1020
1021 /* Setup destination register */
1022 unsigned bit_size = glsl_get_bit_size(type);
1023 nir_ssa_dest_init(&instr->instr, &instr->dest,
1024 type->vector_elements, bit_size, NULL);
1025
1026 /* Insert the created nir instruction now since in the case of boolean
1027 * result we will need to emit another instruction after it
1028 */
1029 nir_builder_instr_insert(&b, &instr->instr);
1030
1031 /*
1032 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1033 * consider a true boolean to be ~0. Fix this up with a != 0
1034 * comparison.
1035 */
1036 if (type->is_boolean()) {
1037 nir_alu_instr *load_ssbo_compare =
1038 nir_alu_instr_create(shader, nir_op_ine);
1039 load_ssbo_compare->src[0].src.is_ssa = true;
1040 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1041 load_ssbo_compare->src[1].src =
1042 nir_src_for_ssa(nir_imm_int(&b, 0));
1043 for (unsigned i = 0; i < type->vector_elements; i++)
1044 load_ssbo_compare->src[1].swizzle[i] = 0;
1045 nir_ssa_dest_init(&load_ssbo_compare->instr,
1046 &load_ssbo_compare->dest.dest,
1047 type->vector_elements, bit_size, NULL);
1048 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1049 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1050 dest = &load_ssbo_compare->dest.dest;
1051 }
1052 break;
1053 }
1054 case nir_intrinsic_ssbo_atomic_add:
1055 case nir_intrinsic_ssbo_atomic_imin:
1056 case nir_intrinsic_ssbo_atomic_umin:
1057 case nir_intrinsic_ssbo_atomic_imax:
1058 case nir_intrinsic_ssbo_atomic_umax:
1059 case nir_intrinsic_ssbo_atomic_and:
1060 case nir_intrinsic_ssbo_atomic_or:
1061 case nir_intrinsic_ssbo_atomic_xor:
1062 case nir_intrinsic_ssbo_atomic_exchange:
1063 case nir_intrinsic_ssbo_atomic_comp_swap: {
1064 int param_count = ir->actual_parameters.length();
1065 assert(param_count == 3 || param_count == 4);
1066
1067 /* Block index */
1068 exec_node *param = ir->actual_parameters.get_head();
1069 ir_instruction *inst = (ir_instruction *) param;
1070 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1071
1072 /* Offset */
1073 param = param->get_next();
1074 inst = (ir_instruction *) param;
1075 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1076
1077 /* data1 parameter (this is always present) */
1078 param = param->get_next();
1079 inst = (ir_instruction *) param;
1080 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1081
1082 /* data2 parameter (only with atomic_comp_swap) */
1083 if (param_count == 4) {
1084 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1085 param = param->get_next();
1086 inst = (ir_instruction *) param;
1087 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1088 }
1089
1090 /* Atomic result */
1091 assert(ir->return_deref);
1092 nir_ssa_dest_init(&instr->instr, &instr->dest,
1093 ir->return_deref->type->vector_elements, 32, NULL);
1094 nir_builder_instr_insert(&b, &instr->instr);
1095 break;
1096 }
1097 case nir_intrinsic_load_shared: {
1098 exec_node *param = ir->actual_parameters.get_head();
1099 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1100
1101 nir_intrinsic_set_base(instr, 0);
1102 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1103
1104 const glsl_type *type = ir->return_deref->var->type;
1105 instr->num_components = type->vector_elements;
1106
1107 /* Setup destination register */
1108 unsigned bit_size = glsl_get_bit_size(type);
1109 nir_ssa_dest_init(&instr->instr, &instr->dest,
1110 type->vector_elements, bit_size, NULL);
1111
1112 nir_builder_instr_insert(&b, &instr->instr);
1113 break;
1114 }
1115 case nir_intrinsic_store_shared: {
1116 exec_node *param = ir->actual_parameters.get_head();
1117 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1118
1119 param = param->get_next();
1120 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1121
1122 param = param->get_next();
1123 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1124 assert(write_mask);
1125
1126 nir_intrinsic_set_base(instr, 0);
1127 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1128
1129 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1130
1131 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1132 instr->num_components = val->type->vector_elements;
1133
1134 nir_builder_instr_insert(&b, &instr->instr);
1135 break;
1136 }
1137 case nir_intrinsic_shared_atomic_add:
1138 case nir_intrinsic_shared_atomic_imin:
1139 case nir_intrinsic_shared_atomic_umin:
1140 case nir_intrinsic_shared_atomic_imax:
1141 case nir_intrinsic_shared_atomic_umax:
1142 case nir_intrinsic_shared_atomic_and:
1143 case nir_intrinsic_shared_atomic_or:
1144 case nir_intrinsic_shared_atomic_xor:
1145 case nir_intrinsic_shared_atomic_exchange:
1146 case nir_intrinsic_shared_atomic_comp_swap: {
1147 int param_count = ir->actual_parameters.length();
1148 assert(param_count == 2 || param_count == 3);
1149
1150 /* Offset */
1151 exec_node *param = ir->actual_parameters.get_head();
1152 ir_instruction *inst = (ir_instruction *) param;
1153 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1154
1155 /* data1 parameter (this is always present) */
1156 param = param->get_next();
1157 inst = (ir_instruction *) param;
1158 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1159
1160 /* data2 parameter (only with atomic_comp_swap) */
1161 if (param_count == 3) {
1162 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1163 param = param->get_next();
1164 inst = (ir_instruction *) param;
1165 instr->src[2] =
1166 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1167 }
1168
1169 /* Atomic result */
1170 assert(ir->return_deref);
1171 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1172 nir_ssa_dest_init(&instr->instr, &instr->dest,
1173 ir->return_deref->type->vector_elements,
1174 bit_size, NULL);
1175 nir_builder_instr_insert(&b, &instr->instr);
1176 break;
1177 }
1178 case nir_intrinsic_vote_any:
1179 case nir_intrinsic_vote_all:
1180 case nir_intrinsic_vote_ieq: {
1181 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1182 instr->num_components = 1;
1183
1184 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1185 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1186
1187 nir_builder_instr_insert(&b, &instr->instr);
1188 break;
1189 }
1190
1191 case nir_intrinsic_ballot: {
1192 nir_ssa_dest_init(&instr->instr, &instr->dest,
1193 ir->return_deref->type->vector_elements, 64, NULL);
1194 instr->num_components = ir->return_deref->type->vector_elements;
1195
1196 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1197 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1198
1199 nir_builder_instr_insert(&b, &instr->instr);
1200 break;
1201 }
1202 case nir_intrinsic_read_invocation: {
1203 nir_ssa_dest_init(&instr->instr, &instr->dest,
1204 ir->return_deref->type->vector_elements, 32, NULL);
1205 instr->num_components = ir->return_deref->type->vector_elements;
1206
1207 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1208 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1209
1210 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1211 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1212
1213 nir_builder_instr_insert(&b, &instr->instr);
1214 break;
1215 }
1216 case nir_intrinsic_read_first_invocation: {
1217 nir_ssa_dest_init(&instr->instr, &instr->dest,
1218 ir->return_deref->type->vector_elements, 32, NULL);
1219 instr->num_components = ir->return_deref->type->vector_elements;
1220
1221 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1222 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1223
1224 nir_builder_instr_insert(&b, &instr->instr);
1225 break;
1226 }
1227 default:
1228 unreachable("not reached");
1229 }
1230
1231 if (ir->return_deref) {
1232 nir_intrinsic_instr *store_instr =
1233 nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
1234 store_instr->num_components = ir->return_deref->type->vector_elements;
1235 nir_intrinsic_set_write_mask(store_instr,
1236 (1 << store_instr->num_components) - 1);
1237
1238 store_instr->variables[0] =
1239 evaluate_deref(&store_instr->instr, ir->return_deref);
1240 store_instr->src[0] = nir_src_for_ssa(&dest->ssa);
1241
1242 nir_builder_instr_insert(&b, &store_instr->instr);
1243 }
1244
1245 return;
1246 }
1247
1248 struct hash_entry *entry =
1249 _mesa_hash_table_search(this->overload_table, ir->callee);
1250 assert(entry);
1251 nir_function *callee = (nir_function *) entry->data;
1252
1253 nir_call_instr *instr = nir_call_instr_create(this->shader, callee);
1254
1255 unsigned i = 0;
1256 foreach_in_list(ir_dereference, param, &ir->actual_parameters) {
1257 instr->params[i] = evaluate_deref(&instr->instr, param);
1258 i++;
1259 }
1260
1261 instr->return_deref = evaluate_deref(&instr->instr, ir->return_deref);
1262 nir_builder_instr_insert(&b, &instr->instr);
1263 }
1264
1265 void
1266 nir_visitor::visit(ir_assignment *ir)
1267 {
1268 unsigned num_components = ir->lhs->type->vector_elements;
1269
1270 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1271 ir->lhs->variable_referenced()->data.precise;
1272
1273 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1274 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1275 /* We're doing a plain-as-can-be copy, so emit a copy_var */
1276 nir_intrinsic_instr *copy =
1277 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
1278
1279 copy->variables[0] = evaluate_deref(&copy->instr, ir->lhs);
1280 copy->variables[1] = evaluate_deref(&copy->instr, ir->rhs);
1281
1282 if (ir->condition) {
1283 nir_push_if(&b, evaluate_rvalue(ir->condition));
1284 nir_builder_instr_insert(&b, &copy->instr);
1285 nir_pop_if(&b, NULL);
1286 } else {
1287 nir_builder_instr_insert(&b, &copy->instr);
1288 }
1289 return;
1290 }
1291
1292 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1293
1294 ir->lhs->accept(this);
1295 nir_deref_var *lhs_deref = this->deref_head;
1296 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1297
1298 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1299 /* GLSL IR will give us the input to the write-masked assignment in a
1300 * single packed vector. So, for example, if the writemask is xzw, then
1301 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1302 * from the load.
1303 */
1304 unsigned swiz[4];
1305 unsigned component = 0;
1306 for (unsigned i = 0; i < 4; i++) {
1307 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1308 }
1309 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1310 }
1311
1312 nir_intrinsic_instr *store =
1313 nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var);
1314 store->num_components = ir->lhs->type->vector_elements;
1315 nir_intrinsic_set_write_mask(store, ir->write_mask);
1316 store->variables[0] = nir_deref_var_clone(lhs_deref, store);
1317 store->src[0] = nir_src_for_ssa(src);
1318
1319 if (ir->condition) {
1320 nir_push_if(&b, evaluate_rvalue(ir->condition));
1321 nir_builder_instr_insert(&b, &store->instr);
1322 nir_pop_if(&b, NULL);
1323 } else {
1324 nir_builder_instr_insert(&b, &store->instr);
1325 }
1326 }
1327
1328 /*
1329 * Given an instruction, returns a pointer to its destination or NULL if there
1330 * is no destination.
1331 *
1332 * Note that this only handles instructions we generate at this level.
1333 */
1334 static nir_dest *
1335 get_instr_dest(nir_instr *instr)
1336 {
1337 nir_alu_instr *alu_instr;
1338 nir_intrinsic_instr *intrinsic_instr;
1339 nir_tex_instr *tex_instr;
1340
1341 switch (instr->type) {
1342 case nir_instr_type_alu:
1343 alu_instr = nir_instr_as_alu(instr);
1344 return &alu_instr->dest.dest;
1345
1346 case nir_instr_type_intrinsic:
1347 intrinsic_instr = nir_instr_as_intrinsic(instr);
1348 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1349 return &intrinsic_instr->dest;
1350 else
1351 return NULL;
1352
1353 case nir_instr_type_tex:
1354 tex_instr = nir_instr_as_tex(instr);
1355 return &tex_instr->dest;
1356
1357 default:
1358 unreachable("not reached");
1359 }
1360
1361 return NULL;
1362 }
1363
1364 void
1365 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1366 unsigned bit_size)
1367 {
1368 nir_dest *dest = get_instr_dest(instr);
1369
1370 if (dest)
1371 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1372
1373 nir_builder_instr_insert(&b, instr);
1374
1375 if (dest) {
1376 assert(dest->is_ssa);
1377 this->result = &dest->ssa;
1378 }
1379 }
1380
1381 nir_ssa_def *
1382 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1383 {
1384 ir->accept(this);
1385 if (ir->as_dereference() || ir->as_constant()) {
1386 /*
1387 * A dereference is being used on the right hand side, which means we
1388 * must emit a variable load.
1389 */
1390
1391 nir_intrinsic_instr *load_instr =
1392 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_var);
1393 load_instr->num_components = ir->type->vector_elements;
1394 load_instr->variables[0] = this->deref_head;
1395 ralloc_steal(load_instr, load_instr->variables[0]);
1396 unsigned bit_size = glsl_get_bit_size(ir->type);
1397 add_instr(&load_instr->instr, ir->type->vector_elements, bit_size);
1398 }
1399
1400 return this->result;
1401 }
1402
1403 static bool
1404 type_is_float(glsl_base_type type)
1405 {
1406 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1407 type == GLSL_TYPE_FLOAT16;
1408 }
1409
1410 static bool
1411 type_is_signed(glsl_base_type type)
1412 {
1413 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1414 type == GLSL_TYPE_INT16;
1415 }
1416
1417 void
1418 nir_visitor::visit(ir_expression *ir)
1419 {
1420 /* Some special cases */
1421 switch (ir->operation) {
1422 case ir_binop_ubo_load: {
1423 nir_intrinsic_instr *load =
1424 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1425 unsigned bit_size = glsl_get_bit_size(ir->type);
1426 load->num_components = ir->type->vector_elements;
1427 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1428 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1429 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1430
1431 /*
1432 * In UBO's, a true boolean value is any non-zero value, but we consider
1433 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1434 */
1435
1436 if (ir->type->is_boolean())
1437 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1438
1439 return;
1440 }
1441
1442 case ir_unop_interpolate_at_centroid:
1443 case ir_binop_interpolate_at_offset:
1444 case ir_binop_interpolate_at_sample: {
1445 ir_dereference *deref = ir->operands[0]->as_dereference();
1446 ir_swizzle *swizzle = NULL;
1447 if (!deref) {
1448 /* the api does not allow a swizzle here, but the varying packing code
1449 * may have pushed one into here.
1450 */
1451 swizzle = ir->operands[0]->as_swizzle();
1452 assert(swizzle);
1453 deref = swizzle->val->as_dereference();
1454 assert(deref);
1455 }
1456
1457 deref->accept(this);
1458
1459 nir_intrinsic_op op;
1460 if (this->deref_head->var->data.mode == nir_var_shader_in) {
1461 switch (ir->operation) {
1462 case ir_unop_interpolate_at_centroid:
1463 op = nir_intrinsic_interp_var_at_centroid;
1464 break;
1465 case ir_binop_interpolate_at_offset:
1466 op = nir_intrinsic_interp_var_at_offset;
1467 break;
1468 case ir_binop_interpolate_at_sample:
1469 op = nir_intrinsic_interp_var_at_sample;
1470 break;
1471 default:
1472 unreachable("Invalid interpolation intrinsic");
1473 }
1474 } else {
1475 /* This case can happen if the vertex shader does not write the
1476 * given varying. In this case, the linker will lower it to a
1477 * global variable. Since interpolating a variable makes no
1478 * sense, we'll just turn it into a load which will probably
1479 * eventually end up as an SSA definition.
1480 */
1481 assert(this->deref_head->var->data.mode == nir_var_global);
1482 op = nir_intrinsic_load_var;
1483 }
1484
1485 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1486 intrin->num_components = deref->type->vector_elements;
1487 intrin->variables[0] = this->deref_head;
1488 ralloc_steal(intrin, intrin->variables[0]);
1489
1490 if (intrin->intrinsic == nir_intrinsic_interp_var_at_offset ||
1491 intrin->intrinsic == nir_intrinsic_interp_var_at_sample)
1492 intrin->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1493
1494 unsigned bit_size = glsl_get_bit_size(deref->type);
1495 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1496
1497 if (swizzle) {
1498 unsigned swiz[4] = {
1499 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1500 };
1501
1502 result = nir_swizzle(&b, result, swiz,
1503 swizzle->type->vector_elements, false);
1504 }
1505
1506 return;
1507 }
1508
1509 default:
1510 break;
1511 }
1512
1513 nir_ssa_def *srcs[4];
1514 for (unsigned i = 0; i < ir->num_operands; i++)
1515 srcs[i] = evaluate_rvalue(ir->operands[i]);
1516
1517 glsl_base_type types[4];
1518 for (unsigned i = 0; i < ir->num_operands; i++)
1519 if (supports_ints)
1520 types[i] = ir->operands[i]->type->base_type;
1521 else
1522 types[i] = GLSL_TYPE_FLOAT;
1523
1524 glsl_base_type out_type;
1525 if (supports_ints)
1526 out_type = ir->type->base_type;
1527 else
1528 out_type = GLSL_TYPE_FLOAT;
1529
1530 switch (ir->operation) {
1531 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1532 case ir_unop_logic_not:
1533 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1534 break;
1535 case ir_unop_neg:
1536 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1537 : nir_ineg(&b, srcs[0]);
1538 break;
1539 case ir_unop_abs:
1540 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1541 : nir_iabs(&b, srcs[0]);
1542 break;
1543 case ir_unop_saturate:
1544 assert(type_is_float(types[0]));
1545 result = nir_fsat(&b, srcs[0]);
1546 break;
1547 case ir_unop_sign:
1548 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1549 : nir_isign(&b, srcs[0]);
1550 break;
1551 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1552 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1553 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1554 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1555 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1556 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1557 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1558 case ir_unop_i2f:
1559 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1560 break;
1561 case ir_unop_u2f:
1562 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1563 break;
1564 case ir_unop_b2f:
1565 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1566 break;
1567 case ir_unop_f2i:
1568 case ir_unop_f2u:
1569 case ir_unop_f2b:
1570 case ir_unop_i2b:
1571 case ir_unop_b2i:
1572 case ir_unop_b2i64:
1573 case ir_unop_d2f:
1574 case ir_unop_f2d:
1575 case ir_unop_d2i:
1576 case ir_unop_d2u:
1577 case ir_unop_d2b:
1578 case ir_unop_i2d:
1579 case ir_unop_u2d:
1580 case ir_unop_i642i:
1581 case ir_unop_i642u:
1582 case ir_unop_i642f:
1583 case ir_unop_i642b:
1584 case ir_unop_i642d:
1585 case ir_unop_u642i:
1586 case ir_unop_u642u:
1587 case ir_unop_u642f:
1588 case ir_unop_u642d:
1589 case ir_unop_i2i64:
1590 case ir_unop_u2i64:
1591 case ir_unop_f2i64:
1592 case ir_unop_d2i64:
1593 case ir_unop_i2u64:
1594 case ir_unop_u2u64:
1595 case ir_unop_f2u64:
1596 case ir_unop_d2u64:
1597 case ir_unop_i2u:
1598 case ir_unop_u2i:
1599 case ir_unop_i642u64:
1600 case ir_unop_u642i64: {
1601 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1602 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1603 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1604 nir_rounding_mode_undef),
1605 srcs[0], NULL, NULL, NULL);
1606 /* b2i and b2f don't have fixed bit-size versions so the builder will
1607 * just assume 32 and we have to fix it up here.
1608 */
1609 result->bit_size = nir_alu_type_get_type_size(dst_type);
1610 break;
1611 }
1612
1613 case ir_unop_bitcast_i2f:
1614 case ir_unop_bitcast_f2i:
1615 case ir_unop_bitcast_u2f:
1616 case ir_unop_bitcast_f2u:
1617 case ir_unop_bitcast_i642d:
1618 case ir_unop_bitcast_d2i64:
1619 case ir_unop_bitcast_u642d:
1620 case ir_unop_bitcast_d2u64:
1621 case ir_unop_subroutine_to_int:
1622 /* no-op */
1623 result = nir_imov(&b, srcs[0]);
1624 break;
1625 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1626 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1627 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1628 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1629 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1630 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1631 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1632 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1633 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1634 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1635 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1636 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1637 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1638 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1639 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1640 case ir_unop_pack_snorm_2x16:
1641 result = nir_pack_snorm_2x16(&b, srcs[0]);
1642 break;
1643 case ir_unop_pack_snorm_4x8:
1644 result = nir_pack_snorm_4x8(&b, srcs[0]);
1645 break;
1646 case ir_unop_pack_unorm_2x16:
1647 result = nir_pack_unorm_2x16(&b, srcs[0]);
1648 break;
1649 case ir_unop_pack_unorm_4x8:
1650 result = nir_pack_unorm_4x8(&b, srcs[0]);
1651 break;
1652 case ir_unop_pack_half_2x16:
1653 result = nir_pack_half_2x16(&b, srcs[0]);
1654 break;
1655 case ir_unop_unpack_snorm_2x16:
1656 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1657 break;
1658 case ir_unop_unpack_snorm_4x8:
1659 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1660 break;
1661 case ir_unop_unpack_unorm_2x16:
1662 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1663 break;
1664 case ir_unop_unpack_unorm_4x8:
1665 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1666 break;
1667 case ir_unop_unpack_half_2x16:
1668 result = nir_unpack_half_2x16(&b, srcs[0]);
1669 break;
1670 case ir_unop_pack_sampler_2x32:
1671 case ir_unop_pack_image_2x32:
1672 case ir_unop_pack_double_2x32:
1673 case ir_unop_pack_int_2x32:
1674 case ir_unop_pack_uint_2x32:
1675 result = nir_pack_64_2x32(&b, srcs[0]);
1676 break;
1677 case ir_unop_unpack_sampler_2x32:
1678 case ir_unop_unpack_image_2x32:
1679 case ir_unop_unpack_double_2x32:
1680 case ir_unop_unpack_int_2x32:
1681 case ir_unop_unpack_uint_2x32:
1682 result = nir_unpack_64_2x32(&b, srcs[0]);
1683 break;
1684 case ir_unop_bitfield_reverse:
1685 result = nir_bitfield_reverse(&b, srcs[0]);
1686 break;
1687 case ir_unop_bit_count:
1688 result = nir_bit_count(&b, srcs[0]);
1689 break;
1690 case ir_unop_find_msb:
1691 switch (types[0]) {
1692 case GLSL_TYPE_UINT:
1693 result = nir_ufind_msb(&b, srcs[0]);
1694 break;
1695 case GLSL_TYPE_INT:
1696 result = nir_ifind_msb(&b, srcs[0]);
1697 break;
1698 default:
1699 unreachable("Invalid type for findMSB()");
1700 }
1701 break;
1702 case ir_unop_find_lsb:
1703 result = nir_find_lsb(&b, srcs[0]);
1704 break;
1705
1706 case ir_unop_noise:
1707 switch (ir->type->vector_elements) {
1708 case 1:
1709 switch (ir->operands[0]->type->vector_elements) {
1710 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1711 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1712 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1713 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1714 default: unreachable("not reached");
1715 }
1716 break;
1717 case 2:
1718 switch (ir->operands[0]->type->vector_elements) {
1719 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1720 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1721 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1722 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1723 default: unreachable("not reached");
1724 }
1725 break;
1726 case 3:
1727 switch (ir->operands[0]->type->vector_elements) {
1728 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1729 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1730 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1731 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1732 default: unreachable("not reached");
1733 }
1734 break;
1735 case 4:
1736 switch (ir->operands[0]->type->vector_elements) {
1737 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1738 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1739 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1740 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1741 default: unreachable("not reached");
1742 }
1743 break;
1744 default:
1745 unreachable("not reached");
1746 }
1747 break;
1748 case ir_unop_get_buffer_size: {
1749 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1750 this->shader,
1751 nir_intrinsic_get_buffer_size);
1752 load->num_components = ir->type->vector_elements;
1753 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1754 unsigned bit_size = glsl_get_bit_size(ir->type);
1755 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1756 return;
1757 }
1758
1759 case ir_binop_add:
1760 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1761 : nir_iadd(&b, srcs[0], srcs[1]);
1762 break;
1763 case ir_binop_sub:
1764 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1765 : nir_isub(&b, srcs[0], srcs[1]);
1766 break;
1767 case ir_binop_mul:
1768 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1769 : nir_imul(&b, srcs[0], srcs[1]);
1770 break;
1771 case ir_binop_div:
1772 if (type_is_float(out_type))
1773 result = nir_fdiv(&b, srcs[0], srcs[1]);
1774 else if (type_is_signed(out_type))
1775 result = nir_idiv(&b, srcs[0], srcs[1]);
1776 else
1777 result = nir_udiv(&b, srcs[0], srcs[1]);
1778 break;
1779 case ir_binop_mod:
1780 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1781 : nir_umod(&b, srcs[0], srcs[1]);
1782 break;
1783 case ir_binop_min:
1784 if (type_is_float(out_type))
1785 result = nir_fmin(&b, srcs[0], srcs[1]);
1786 else if (type_is_signed(out_type))
1787 result = nir_imin(&b, srcs[0], srcs[1]);
1788 else
1789 result = nir_umin(&b, srcs[0], srcs[1]);
1790 break;
1791 case ir_binop_max:
1792 if (type_is_float(out_type))
1793 result = nir_fmax(&b, srcs[0], srcs[1]);
1794 else if (type_is_signed(out_type))
1795 result = nir_imax(&b, srcs[0], srcs[1]);
1796 else
1797 result = nir_umax(&b, srcs[0], srcs[1]);
1798 break;
1799 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1800 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1801 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1802 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1803 case ir_binop_logic_and:
1804 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1805 : nir_fand(&b, srcs[0], srcs[1]);
1806 break;
1807 case ir_binop_logic_or:
1808 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1809 : nir_for(&b, srcs[0], srcs[1]);
1810 break;
1811 case ir_binop_logic_xor:
1812 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1813 : nir_fxor(&b, srcs[0], srcs[1]);
1814 break;
1815 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1816 case ir_binop_rshift:
1817 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1818 : nir_ushr(&b, srcs[0], srcs[1]);
1819 break;
1820 case ir_binop_imul_high:
1821 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1822 : nir_umul_high(&b, srcs[0], srcs[1]);
1823 break;
1824 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1825 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1826 case ir_binop_less:
1827 if (supports_ints) {
1828 if (type_is_float(types[0]))
1829 result = nir_flt(&b, srcs[0], srcs[1]);
1830 else if (type_is_signed(types[0]))
1831 result = nir_ilt(&b, srcs[0], srcs[1]);
1832 else
1833 result = nir_ult(&b, srcs[0], srcs[1]);
1834 } else {
1835 result = nir_slt(&b, srcs[0], srcs[1]);
1836 }
1837 break;
1838 case ir_binop_gequal:
1839 if (supports_ints) {
1840 if (type_is_float(types[0]))
1841 result = nir_fge(&b, srcs[0], srcs[1]);
1842 else if (type_is_signed(types[0]))
1843 result = nir_ige(&b, srcs[0], srcs[1]);
1844 else
1845 result = nir_uge(&b, srcs[0], srcs[1]);
1846 } else {
1847 result = nir_sge(&b, srcs[0], srcs[1]);
1848 }
1849 break;
1850 case ir_binop_equal:
1851 if (supports_ints) {
1852 if (type_is_float(types[0]))
1853 result = nir_feq(&b, srcs[0], srcs[1]);
1854 else
1855 result = nir_ieq(&b, srcs[0], srcs[1]);
1856 } else {
1857 result = nir_seq(&b, srcs[0], srcs[1]);
1858 }
1859 break;
1860 case ir_binop_nequal:
1861 if (supports_ints) {
1862 if (type_is_float(types[0]))
1863 result = nir_fne(&b, srcs[0], srcs[1]);
1864 else
1865 result = nir_ine(&b, srcs[0], srcs[1]);
1866 } else {
1867 result = nir_sne(&b, srcs[0], srcs[1]);
1868 }
1869 break;
1870 case ir_binop_all_equal:
1871 if (supports_ints) {
1872 if (type_is_float(types[0])) {
1873 switch (ir->operands[0]->type->vector_elements) {
1874 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1875 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1876 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1877 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1878 default:
1879 unreachable("not reached");
1880 }
1881 } else {
1882 switch (ir->operands[0]->type->vector_elements) {
1883 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1884 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1885 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1886 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1887 default:
1888 unreachable("not reached");
1889 }
1890 }
1891 } else {
1892 switch (ir->operands[0]->type->vector_elements) {
1893 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1894 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1895 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1896 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1897 default:
1898 unreachable("not reached");
1899 }
1900 }
1901 break;
1902 case ir_binop_any_nequal:
1903 if (supports_ints) {
1904 if (type_is_float(types[0])) {
1905 switch (ir->operands[0]->type->vector_elements) {
1906 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1907 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1908 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1909 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1910 default:
1911 unreachable("not reached");
1912 }
1913 } else {
1914 switch (ir->operands[0]->type->vector_elements) {
1915 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1916 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1917 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1918 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1919 default:
1920 unreachable("not reached");
1921 }
1922 }
1923 } else {
1924 switch (ir->operands[0]->type->vector_elements) {
1925 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1926 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1927 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1928 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1929 default:
1930 unreachable("not reached");
1931 }
1932 }
1933 break;
1934 case ir_binop_dot:
1935 switch (ir->operands[0]->type->vector_elements) {
1936 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1937 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1938 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1939 default:
1940 unreachable("not reached");
1941 }
1942 break;
1943
1944 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1945 case ir_triop_fma:
1946 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1947 break;
1948 case ir_triop_lrp:
1949 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1950 break;
1951 case ir_triop_csel:
1952 if (supports_ints)
1953 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1954 else
1955 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1956 break;
1957 case ir_triop_bitfield_extract:
1958 result = (out_type == GLSL_TYPE_INT) ?
1959 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1960 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1961 break;
1962 case ir_quadop_bitfield_insert:
1963 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1964 break;
1965 case ir_quadop_vector:
1966 result = nir_vec(&b, srcs, ir->type->vector_elements);
1967 break;
1968
1969 default:
1970 unreachable("not reached");
1971 }
1972 }
1973
1974 void
1975 nir_visitor::visit(ir_swizzle *ir)
1976 {
1977 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1978 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1979 ir->type->vector_elements, !supports_ints);
1980 }
1981
1982 void
1983 nir_visitor::visit(ir_texture *ir)
1984 {
1985 unsigned num_srcs;
1986 nir_texop op;
1987 switch (ir->op) {
1988 case ir_tex:
1989 op = nir_texop_tex;
1990 num_srcs = 1; /* coordinate */
1991 break;
1992
1993 case ir_txb:
1994 case ir_txl:
1995 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1996 num_srcs = 2; /* coordinate, bias/lod */
1997 break;
1998
1999 case ir_txd:
2000 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2001 num_srcs = 3;
2002 break;
2003
2004 case ir_txf:
2005 op = nir_texop_txf;
2006 if (ir->lod_info.lod != NULL)
2007 num_srcs = 2; /* coordinate, lod */
2008 else
2009 num_srcs = 1; /* coordinate */
2010 break;
2011
2012 case ir_txf_ms:
2013 op = nir_texop_txf_ms;
2014 num_srcs = 2; /* coordinate, sample_index */
2015 break;
2016
2017 case ir_txs:
2018 op = nir_texop_txs;
2019 if (ir->lod_info.lod != NULL)
2020 num_srcs = 1; /* lod */
2021 else
2022 num_srcs = 0;
2023 break;
2024
2025 case ir_lod:
2026 op = nir_texop_lod;
2027 num_srcs = 1; /* coordinate */
2028 break;
2029
2030 case ir_tg4:
2031 op = nir_texop_tg4;
2032 num_srcs = 1; /* coordinate */
2033 break;
2034
2035 case ir_query_levels:
2036 op = nir_texop_query_levels;
2037 num_srcs = 0;
2038 break;
2039
2040 case ir_texture_samples:
2041 op = nir_texop_texture_samples;
2042 num_srcs = 0;
2043 break;
2044
2045 case ir_samples_identical:
2046 op = nir_texop_samples_identical;
2047 num_srcs = 1; /* coordinate */
2048 break;
2049
2050 default:
2051 unreachable("not reached");
2052 }
2053
2054 if (ir->projector != NULL)
2055 num_srcs++;
2056 if (ir->shadow_comparator != NULL)
2057 num_srcs++;
2058 if (ir->offset != NULL)
2059 num_srcs++;
2060
2061 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2062
2063 instr->op = op;
2064 instr->sampler_dim =
2065 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2066 instr->is_array = ir->sampler->type->sampler_array;
2067 instr->is_shadow = ir->sampler->type->sampler_shadow;
2068 if (instr->is_shadow)
2069 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2070 switch (ir->type->base_type) {
2071 case GLSL_TYPE_FLOAT:
2072 instr->dest_type = nir_type_float;
2073 break;
2074 case GLSL_TYPE_INT:
2075 instr->dest_type = nir_type_int;
2076 break;
2077 case GLSL_TYPE_BOOL:
2078 case GLSL_TYPE_UINT:
2079 instr->dest_type = nir_type_uint;
2080 break;
2081 default:
2082 unreachable("not reached");
2083 }
2084
2085 instr->texture = evaluate_deref(&instr->instr, ir->sampler);
2086
2087 unsigned src_number = 0;
2088
2089 if (ir->coordinate != NULL) {
2090 instr->coord_components = ir->coordinate->type->vector_elements;
2091 instr->src[src_number].src =
2092 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2093 instr->src[src_number].src_type = nir_tex_src_coord;
2094 src_number++;
2095 }
2096
2097 if (ir->projector != NULL) {
2098 instr->src[src_number].src =
2099 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2100 instr->src[src_number].src_type = nir_tex_src_projector;
2101 src_number++;
2102 }
2103
2104 if (ir->shadow_comparator != NULL) {
2105 instr->src[src_number].src =
2106 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2107 instr->src[src_number].src_type = nir_tex_src_comparator;
2108 src_number++;
2109 }
2110
2111 if (ir->offset != NULL) {
2112 /* we don't support multiple offsets yet */
2113 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2114
2115 instr->src[src_number].src =
2116 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2117 instr->src[src_number].src_type = nir_tex_src_offset;
2118 src_number++;
2119 }
2120
2121 switch (ir->op) {
2122 case ir_txb:
2123 instr->src[src_number].src =
2124 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2125 instr->src[src_number].src_type = nir_tex_src_bias;
2126 src_number++;
2127 break;
2128
2129 case ir_txl:
2130 case ir_txf:
2131 case ir_txs:
2132 if (ir->lod_info.lod != NULL) {
2133 instr->src[src_number].src =
2134 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2135 instr->src[src_number].src_type = nir_tex_src_lod;
2136 src_number++;
2137 }
2138 break;
2139
2140 case ir_txd:
2141 instr->src[src_number].src =
2142 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2143 instr->src[src_number].src_type = nir_tex_src_ddx;
2144 src_number++;
2145 instr->src[src_number].src =
2146 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2147 instr->src[src_number].src_type = nir_tex_src_ddy;
2148 src_number++;
2149 break;
2150
2151 case ir_txf_ms:
2152 instr->src[src_number].src =
2153 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2154 instr->src[src_number].src_type = nir_tex_src_ms_index;
2155 src_number++;
2156 break;
2157
2158 case ir_tg4:
2159 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2160 break;
2161
2162 default:
2163 break;
2164 }
2165
2166 assert(src_number == num_srcs);
2167
2168 unsigned bit_size = glsl_get_bit_size(ir->type);
2169 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2170 }
2171
2172 void
2173 nir_visitor::visit(ir_constant *ir)
2174 {
2175 /*
2176 * We don't know if this variable is an array or struct that gets
2177 * dereferenced, so do the safe thing an make it a variable with a
2178 * constant initializer and return a dereference.
2179 */
2180
2181 nir_variable *var =
2182 nir_local_variable_create(this->impl, ir->type, "const_temp");
2183 var->data.read_only = true;
2184 var->constant_initializer = constant_copy(ir, var);
2185
2186 this->deref_head = nir_deref_var_create(this->shader, var);
2187 this->deref_tail = &this->deref_head->deref;
2188 }
2189
2190 void
2191 nir_visitor::visit(ir_dereference_variable *ir)
2192 {
2193 struct hash_entry *entry =
2194 _mesa_hash_table_search(this->var_table, ir->var);
2195 assert(entry);
2196 nir_variable *var = (nir_variable *) entry->data;
2197
2198 nir_deref_var *deref = nir_deref_var_create(this->shader, var);
2199 this->deref_head = deref;
2200 this->deref_tail = &deref->deref;
2201 }
2202
2203 void
2204 nir_visitor::visit(ir_dereference_record *ir)
2205 {
2206 ir->record->accept(this);
2207
2208 int field_index = ir->field_idx;
2209 assert(field_index >= 0);
2210
2211 nir_deref_struct *deref = nir_deref_struct_create(this->deref_tail, field_index);
2212 deref->deref.type = ir->type;
2213 this->deref_tail->child = &deref->deref;
2214 this->deref_tail = &deref->deref;
2215 }
2216
2217 void
2218 nir_visitor::visit(ir_dereference_array *ir)
2219 {
2220 nir_deref_array *deref = nir_deref_array_create(this->shader);
2221 deref->deref.type = ir->type;
2222
2223 ir_constant *const_index = ir->array_index->as_constant();
2224 if (const_index != NULL) {
2225 deref->deref_array_type = nir_deref_array_type_direct;
2226 deref->base_offset = const_index->value.u[0];
2227 } else {
2228 deref->deref_array_type = nir_deref_array_type_indirect;
2229 deref->indirect =
2230 nir_src_for_ssa(evaluate_rvalue(ir->array_index));
2231 }
2232
2233 ir->array->accept(this);
2234
2235 this->deref_tail->child = &deref->deref;
2236 ralloc_steal(this->deref_tail, deref);
2237 this->deref_tail = &deref->deref;
2238 }
2239
2240 void
2241 nir_visitor::visit(ir_barrier *)
2242 {
2243 nir_intrinsic_instr *instr =
2244 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2245 nir_builder_instr_insert(&b, &instr->instr);
2246 }