nir: Add floating point atomic add instrinsics
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 /*
38 * pass to lower GLSL IR to NIR
39 *
40 * This will lower variable dereferences to loads/stores of corresponding
41 * variables in NIR - the variables will be converted to registers in a later
42 * pass.
43 */
44
45 namespace {
46
47 class nir_visitor : public ir_visitor
48 {
49 public:
50 nir_visitor(nir_shader *shader);
51 ~nir_visitor();
52
53 virtual void visit(ir_variable *);
54 virtual void visit(ir_function *);
55 virtual void visit(ir_function_signature *);
56 virtual void visit(ir_loop *);
57 virtual void visit(ir_if *);
58 virtual void visit(ir_discard *);
59 virtual void visit(ir_loop_jump *);
60 virtual void visit(ir_return *);
61 virtual void visit(ir_call *);
62 virtual void visit(ir_assignment *);
63 virtual void visit(ir_emit_vertex *);
64 virtual void visit(ir_end_primitive *);
65 virtual void visit(ir_expression *);
66 virtual void visit(ir_swizzle *);
67 virtual void visit(ir_texture *);
68 virtual void visit(ir_constant *);
69 virtual void visit(ir_dereference_variable *);
70 virtual void visit(ir_dereference_record *);
71 virtual void visit(ir_dereference_array *);
72 virtual void visit(ir_barrier *);
73
74 void create_function(ir_function_signature *ir);
75
76 private:
77 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
78 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
79
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
83 nir_ssa_def *src2);
84 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
85 nir_ssa_def *src2, nir_ssa_def *src3);
86
87 bool supports_ints;
88
89 nir_shader *shader;
90 nir_function_impl *impl;
91 nir_builder b;
92 nir_ssa_def *result; /* result of the expression tree last visited */
93
94 nir_deref_instr *evaluate_deref(ir_instruction *ir);
95
96 /* most recent deref instruction created */
97 nir_deref_instr *deref;
98
99 nir_variable *var; /* variable created by ir_variable visitor */
100
101 /* whether the IR we're operating on is per-function or global */
102 bool is_global;
103
104 /* map of ir_variable -> nir_variable */
105 struct hash_table *var_table;
106
107 /* map of ir_function_signature -> nir_function_overload */
108 struct hash_table *overload_table;
109 };
110
111 /*
112 * This visitor runs before the main visitor, calling create_function() for
113 * each function so that the main visitor can resolve forward references in
114 * calls.
115 */
116
117 class nir_function_visitor : public ir_hierarchical_visitor
118 {
119 public:
120 nir_function_visitor(nir_visitor *v) : visitor(v)
121 {
122 }
123 virtual ir_visitor_status visit_enter(ir_function *);
124
125 private:
126 nir_visitor *visitor;
127 };
128
129 } /* end of anonymous namespace */
130
131 nir_shader *
132 glsl_to_nir(const struct gl_shader_program *shader_prog,
133 gl_shader_stage stage,
134 const nir_shader_compiler_options *options)
135 {
136 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
137
138 nir_shader *shader = nir_shader_create(NULL, stage, options,
139 &sh->Program->info);
140
141 nir_visitor v1(shader);
142 nir_function_visitor v2(&v1);
143 v2.run(sh->ir);
144 visit_exec_list(sh->ir, &v1);
145
146 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
147
148 /* Remap the locations to slots so those requiring two slots will occupy
149 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
150 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
151 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
152 if (shader->info.stage == MESA_SHADER_VERTEX)
153 nir_remap_attributes(shader, options);
154
155 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
156 if (shader_prog->Label)
157 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
158
159 /* Check for transform feedback varyings specified via the API */
160 shader->info.has_transform_feedback_varyings =
161 shader_prog->TransformFeedback.NumVarying > 0;
162
163 /* Check for transform feedback varyings specified in the Shader */
164 if (shader_prog->last_vert_prog)
165 shader->info.has_transform_feedback_varyings |=
166 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
167
168 return shader;
169 }
170
171 nir_visitor::nir_visitor(nir_shader *shader)
172 {
173 this->supports_ints = shader->options->native_integers;
174 this->shader = shader;
175 this->is_global = true;
176 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
177 _mesa_key_pointer_equal);
178 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
179 _mesa_key_pointer_equal);
180 this->result = NULL;
181 this->impl = NULL;
182 this->var = NULL;
183 memset(&this->b, 0, sizeof(this->b));
184 }
185
186 nir_visitor::~nir_visitor()
187 {
188 _mesa_hash_table_destroy(this->var_table, NULL);
189 _mesa_hash_table_destroy(this->overload_table, NULL);
190 }
191
192 nir_deref_instr *
193 nir_visitor::evaluate_deref(ir_instruction *ir)
194 {
195 ir->accept(this);
196 return this->deref;
197 }
198
199 static nir_constant *
200 constant_copy(ir_constant *ir, void *mem_ctx)
201 {
202 if (ir == NULL)
203 return NULL;
204
205 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
206
207 const unsigned rows = ir->type->vector_elements;
208 const unsigned cols = ir->type->matrix_columns;
209 unsigned i;
210
211 ret->num_elements = 0;
212 switch (ir->type->base_type) {
213 case GLSL_TYPE_UINT:
214 /* Only float base types can be matrices. */
215 assert(cols == 1);
216
217 for (unsigned r = 0; r < rows; r++)
218 ret->values[0].u32[r] = ir->value.u[r];
219
220 break;
221
222 case GLSL_TYPE_INT:
223 /* Only float base types can be matrices. */
224 assert(cols == 1);
225
226 for (unsigned r = 0; r < rows; r++)
227 ret->values[0].i32[r] = ir->value.i[r];
228
229 break;
230
231 case GLSL_TYPE_FLOAT:
232 for (unsigned c = 0; c < cols; c++) {
233 for (unsigned r = 0; r < rows; r++)
234 ret->values[c].f32[r] = ir->value.f[c * rows + r];
235 }
236 break;
237
238 case GLSL_TYPE_DOUBLE:
239 for (unsigned c = 0; c < cols; c++) {
240 for (unsigned r = 0; r < rows; r++)
241 ret->values[c].f64[r] = ir->value.d[c * rows + r];
242 }
243 break;
244
245 case GLSL_TYPE_UINT64:
246 /* Only float base types can be matrices. */
247 assert(cols == 1);
248
249 for (unsigned r = 0; r < rows; r++)
250 ret->values[0].u64[r] = ir->value.u64[r];
251 break;
252
253 case GLSL_TYPE_INT64:
254 /* Only float base types can be matrices. */
255 assert(cols == 1);
256
257 for (unsigned r = 0; r < rows; r++)
258 ret->values[0].i64[r] = ir->value.i64[r];
259 break;
260
261 case GLSL_TYPE_BOOL:
262 /* Only float base types can be matrices. */
263 assert(cols == 1);
264
265 for (unsigned r = 0; r < rows; r++)
266 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
267
268 break;
269
270 case GLSL_TYPE_STRUCT:
271 case GLSL_TYPE_ARRAY:
272 ret->elements = ralloc_array(mem_ctx, nir_constant *,
273 ir->type->length);
274 ret->num_elements = ir->type->length;
275
276 for (i = 0; i < ir->type->length; i++)
277 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
278 break;
279
280 default:
281 unreachable("not reached");
282 }
283
284 return ret;
285 }
286
287 void
288 nir_visitor::visit(ir_variable *ir)
289 {
290 /* TODO: In future we should switch to using the NIR lowering pass but for
291 * now just ignore these variables as GLSL IR should have lowered them.
292 * Anything remaining are just dead vars that weren't cleaned up.
293 */
294 if (ir->data.mode == ir_var_shader_shared)
295 return;
296
297 nir_variable *var = rzalloc(shader, nir_variable);
298 var->type = ir->type;
299 var->name = ralloc_strdup(var, ir->name);
300
301 var->data.always_active_io = ir->data.always_active_io;
302 var->data.read_only = ir->data.read_only;
303 var->data.centroid = ir->data.centroid;
304 var->data.sample = ir->data.sample;
305 var->data.patch = ir->data.patch;
306 var->data.invariant = ir->data.invariant;
307 var->data.location = ir->data.location;
308 var->data.stream = ir->data.stream;
309 var->data.compact = false;
310
311 switch(ir->data.mode) {
312 case ir_var_auto:
313 case ir_var_temporary:
314 if (is_global)
315 var->data.mode = nir_var_global;
316 else
317 var->data.mode = nir_var_local;
318 break;
319
320 case ir_var_function_in:
321 case ir_var_function_out:
322 case ir_var_function_inout:
323 case ir_var_const_in:
324 var->data.mode = nir_var_local;
325 break;
326
327 case ir_var_shader_in:
328 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
329 ir->data.location == VARYING_SLOT_FACE) {
330 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
331 var->data.location = SYSTEM_VALUE_FRONT_FACE;
332 var->data.mode = nir_var_system_value;
333 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
334 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
335 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
336 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
337 var->data.mode = nir_var_system_value;
338 } else {
339 var->data.mode = nir_var_shader_in;
340
341 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
342 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
343 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
344 var->data.compact = ir->type->without_array()->is_scalar();
345 }
346 }
347
348 /* Mark all the locations that require two slots */
349 if (shader->info.stage == MESA_SHADER_VERTEX &&
350 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
351 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
352 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
353 shader->info.vs.double_inputs |= bitfield;
354 }
355 }
356 break;
357
358 case ir_var_shader_out:
359 var->data.mode = nir_var_shader_out;
360 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
361 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
362 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
363 var->data.compact = ir->type->without_array()->is_scalar();
364 }
365 break;
366
367 case ir_var_uniform:
368 var->data.mode = nir_var_uniform;
369 break;
370
371 case ir_var_shader_storage:
372 var->data.mode = nir_var_shader_storage;
373 break;
374
375 case ir_var_system_value:
376 var->data.mode = nir_var_system_value;
377 break;
378
379 default:
380 unreachable("not reached");
381 }
382
383 var->data.interpolation = ir->data.interpolation;
384 var->data.origin_upper_left = ir->data.origin_upper_left;
385 var->data.pixel_center_integer = ir->data.pixel_center_integer;
386 var->data.location_frac = ir->data.location_frac;
387
388 if (var->data.pixel_center_integer) {
389 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
390 shader->info.fs.pixel_center_integer = true;
391 }
392
393 switch (ir->data.depth_layout) {
394 case ir_depth_layout_none:
395 var->data.depth_layout = nir_depth_layout_none;
396 break;
397 case ir_depth_layout_any:
398 var->data.depth_layout = nir_depth_layout_any;
399 break;
400 case ir_depth_layout_greater:
401 var->data.depth_layout = nir_depth_layout_greater;
402 break;
403 case ir_depth_layout_less:
404 var->data.depth_layout = nir_depth_layout_less;
405 break;
406 case ir_depth_layout_unchanged:
407 var->data.depth_layout = nir_depth_layout_unchanged;
408 break;
409 default:
410 unreachable("not reached");
411 }
412
413 var->data.index = ir->data.index;
414 var->data.descriptor_set = 0;
415 var->data.binding = ir->data.binding;
416 var->data.explicit_binding = ir->data.explicit_binding;
417 var->data.bindless = ir->data.bindless;
418 var->data.offset = ir->data.offset;
419 var->data.image.read_only = ir->data.memory_read_only;
420 var->data.image.write_only = ir->data.memory_write_only;
421 var->data.image.coherent = ir->data.memory_coherent;
422 var->data.image._volatile = ir->data.memory_volatile;
423 var->data.image.restrict_flag = ir->data.memory_restrict;
424 var->data.image.format = ir->data.image_format;
425 var->data.fb_fetch_output = ir->data.fb_fetch_output;
426 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
427 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
428 var->data.xfb_buffer = ir->data.xfb_buffer;
429 var->data.xfb_stride = ir->data.xfb_stride;
430
431 var->num_state_slots = ir->get_num_state_slots();
432 if (var->num_state_slots > 0) {
433 var->state_slots = rzalloc_array(var, nir_state_slot,
434 var->num_state_slots);
435
436 ir_state_slot *state_slots = ir->get_state_slots();
437 for (unsigned i = 0; i < var->num_state_slots; i++) {
438 for (unsigned j = 0; j < 5; j++)
439 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
440 var->state_slots[i].swizzle = state_slots[i].swizzle;
441 }
442 } else {
443 var->state_slots = NULL;
444 }
445
446 var->constant_initializer = constant_copy(ir->constant_initializer, var);
447
448 var->interface_type = ir->get_interface_type();
449
450 if (var->data.mode == nir_var_local)
451 nir_function_impl_add_variable(impl, var);
452 else
453 nir_shader_add_variable(shader, var);
454
455 _mesa_hash_table_insert(var_table, ir, var);
456 this->var = var;
457 }
458
459 ir_visitor_status
460 nir_function_visitor::visit_enter(ir_function *ir)
461 {
462 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
463 visitor->create_function(sig);
464 }
465 return visit_continue_with_parent;
466 }
467
468 void
469 nir_visitor::create_function(ir_function_signature *ir)
470 {
471 if (ir->is_intrinsic())
472 return;
473
474 nir_function *func = nir_function_create(shader, ir->function_name());
475
476 assert(ir->parameters.is_empty());
477 assert(ir->return_type == glsl_type::void_type);
478
479 _mesa_hash_table_insert(this->overload_table, ir, func);
480 }
481
482 void
483 nir_visitor::visit(ir_function *ir)
484 {
485 foreach_in_list(ir_function_signature, sig, &ir->signatures)
486 sig->accept(this);
487 }
488
489 void
490 nir_visitor::visit(ir_function_signature *ir)
491 {
492 if (ir->is_intrinsic())
493 return;
494
495 struct hash_entry *entry =
496 _mesa_hash_table_search(this->overload_table, ir);
497
498 assert(entry);
499 nir_function *func = (nir_function *) entry->data;
500
501 if (ir->is_defined) {
502 nir_function_impl *impl = nir_function_impl_create(func);
503 this->impl = impl;
504
505 assert(strcmp(func->name, "main") == 0);
506 assert(ir->parameters.is_empty());
507
508 this->is_global = false;
509
510 nir_builder_init(&b, impl);
511 b.cursor = nir_after_cf_list(&impl->body);
512 visit_exec_list(&ir->body, this);
513
514 this->is_global = true;
515 } else {
516 func->impl = NULL;
517 }
518 }
519
520 void
521 nir_visitor::visit(ir_loop *ir)
522 {
523 nir_push_loop(&b);
524 visit_exec_list(&ir->body_instructions, this);
525 nir_pop_loop(&b, NULL);
526 }
527
528 void
529 nir_visitor::visit(ir_if *ir)
530 {
531 nir_push_if(&b, evaluate_rvalue(ir->condition));
532 visit_exec_list(&ir->then_instructions, this);
533 nir_push_else(&b, NULL);
534 visit_exec_list(&ir->else_instructions, this);
535 nir_pop_if(&b, NULL);
536 }
537
538 void
539 nir_visitor::visit(ir_discard *ir)
540 {
541 /*
542 * discards aren't treated as control flow, because before we lower them
543 * they can appear anywhere in the shader and the stuff after them may still
544 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
545 * discards will be immediately followed by a return.
546 */
547
548 nir_intrinsic_instr *discard;
549 if (ir->condition) {
550 discard = nir_intrinsic_instr_create(this->shader,
551 nir_intrinsic_discard_if);
552 discard->src[0] =
553 nir_src_for_ssa(evaluate_rvalue(ir->condition));
554 } else {
555 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
556 }
557
558 nir_builder_instr_insert(&b, &discard->instr);
559 }
560
561 void
562 nir_visitor::visit(ir_emit_vertex *ir)
563 {
564 nir_intrinsic_instr *instr =
565 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
566 nir_intrinsic_set_stream_id(instr, ir->stream_id());
567 nir_builder_instr_insert(&b, &instr->instr);
568 }
569
570 void
571 nir_visitor::visit(ir_end_primitive *ir)
572 {
573 nir_intrinsic_instr *instr =
574 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
575 nir_intrinsic_set_stream_id(instr, ir->stream_id());
576 nir_builder_instr_insert(&b, &instr->instr);
577 }
578
579 void
580 nir_visitor::visit(ir_loop_jump *ir)
581 {
582 nir_jump_type type;
583 switch (ir->mode) {
584 case ir_loop_jump::jump_break:
585 type = nir_jump_break;
586 break;
587 case ir_loop_jump::jump_continue:
588 type = nir_jump_continue;
589 break;
590 default:
591 unreachable("not reached");
592 }
593
594 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
595 nir_builder_instr_insert(&b, &instr->instr);
596 }
597
598 void
599 nir_visitor::visit(ir_return *ir)
600 {
601 assert(ir->value == NULL);
602 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
603 nir_builder_instr_insert(&b, &instr->instr);
604 }
605
606 void
607 nir_visitor::visit(ir_call *ir)
608 {
609 if (ir->callee->is_intrinsic()) {
610 nir_intrinsic_op op;
611
612 switch (ir->callee->intrinsic_id) {
613 case ir_intrinsic_atomic_counter_read:
614 op = nir_intrinsic_atomic_counter_read_deref;
615 break;
616 case ir_intrinsic_atomic_counter_increment:
617 op = nir_intrinsic_atomic_counter_inc_deref;
618 break;
619 case ir_intrinsic_atomic_counter_predecrement:
620 op = nir_intrinsic_atomic_counter_pre_dec_deref;
621 break;
622 case ir_intrinsic_atomic_counter_add:
623 op = nir_intrinsic_atomic_counter_add_deref;
624 break;
625 case ir_intrinsic_atomic_counter_and:
626 op = nir_intrinsic_atomic_counter_and_deref;
627 break;
628 case ir_intrinsic_atomic_counter_or:
629 op = nir_intrinsic_atomic_counter_or_deref;
630 break;
631 case ir_intrinsic_atomic_counter_xor:
632 op = nir_intrinsic_atomic_counter_xor_deref;
633 break;
634 case ir_intrinsic_atomic_counter_min:
635 op = nir_intrinsic_atomic_counter_min_deref;
636 break;
637 case ir_intrinsic_atomic_counter_max:
638 op = nir_intrinsic_atomic_counter_max_deref;
639 break;
640 case ir_intrinsic_atomic_counter_exchange:
641 op = nir_intrinsic_atomic_counter_exchange_deref;
642 break;
643 case ir_intrinsic_atomic_counter_comp_swap:
644 op = nir_intrinsic_atomic_counter_comp_swap_deref;
645 break;
646 case ir_intrinsic_image_load:
647 op = nir_intrinsic_image_deref_load;
648 break;
649 case ir_intrinsic_image_store:
650 op = nir_intrinsic_image_deref_store;
651 break;
652 case ir_intrinsic_image_atomic_add:
653 op = ir->return_deref->type->is_integer_32_64()
654 ? nir_intrinsic_image_deref_atomic_add
655 : nir_intrinsic_image_deref_atomic_fadd;
656 break;
657 case ir_intrinsic_image_atomic_min:
658 op = nir_intrinsic_image_deref_atomic_min;
659 break;
660 case ir_intrinsic_image_atomic_max:
661 op = nir_intrinsic_image_deref_atomic_max;
662 break;
663 case ir_intrinsic_image_atomic_and:
664 op = nir_intrinsic_image_deref_atomic_and;
665 break;
666 case ir_intrinsic_image_atomic_or:
667 op = nir_intrinsic_image_deref_atomic_or;
668 break;
669 case ir_intrinsic_image_atomic_xor:
670 op = nir_intrinsic_image_deref_atomic_xor;
671 break;
672 case ir_intrinsic_image_atomic_exchange:
673 op = nir_intrinsic_image_deref_atomic_exchange;
674 break;
675 case ir_intrinsic_image_atomic_comp_swap:
676 op = nir_intrinsic_image_deref_atomic_comp_swap;
677 break;
678 case ir_intrinsic_memory_barrier:
679 op = nir_intrinsic_memory_barrier;
680 break;
681 case ir_intrinsic_image_size:
682 op = nir_intrinsic_image_deref_size;
683 break;
684 case ir_intrinsic_image_samples:
685 op = nir_intrinsic_image_deref_samples;
686 break;
687 case ir_intrinsic_ssbo_store:
688 op = nir_intrinsic_store_ssbo;
689 break;
690 case ir_intrinsic_ssbo_load:
691 op = nir_intrinsic_load_ssbo;
692 break;
693 case ir_intrinsic_ssbo_atomic_add:
694 op = ir->return_deref->type->is_integer_32_64()
695 ? nir_intrinsic_ssbo_atomic_add : nir_intrinsic_ssbo_atomic_fadd;
696 break;
697 case ir_intrinsic_ssbo_atomic_and:
698 op = nir_intrinsic_ssbo_atomic_and;
699 break;
700 case ir_intrinsic_ssbo_atomic_or:
701 op = nir_intrinsic_ssbo_atomic_or;
702 break;
703 case ir_intrinsic_ssbo_atomic_xor:
704 op = nir_intrinsic_ssbo_atomic_xor;
705 break;
706 case ir_intrinsic_ssbo_atomic_min:
707 assert(ir->return_deref);
708 if (ir->return_deref->type == glsl_type::int_type)
709 op = nir_intrinsic_ssbo_atomic_imin;
710 else if (ir->return_deref->type == glsl_type::uint_type)
711 op = nir_intrinsic_ssbo_atomic_umin;
712 else
713 unreachable("Invalid type");
714 break;
715 case ir_intrinsic_ssbo_atomic_max:
716 assert(ir->return_deref);
717 if (ir->return_deref->type == glsl_type::int_type)
718 op = nir_intrinsic_ssbo_atomic_imax;
719 else if (ir->return_deref->type == glsl_type::uint_type)
720 op = nir_intrinsic_ssbo_atomic_umax;
721 else
722 unreachable("Invalid type");
723 break;
724 case ir_intrinsic_ssbo_atomic_exchange:
725 op = nir_intrinsic_ssbo_atomic_exchange;
726 break;
727 case ir_intrinsic_ssbo_atomic_comp_swap:
728 op = nir_intrinsic_ssbo_atomic_comp_swap;
729 break;
730 case ir_intrinsic_shader_clock:
731 op = nir_intrinsic_shader_clock;
732 break;
733 case ir_intrinsic_begin_invocation_interlock:
734 op = nir_intrinsic_begin_invocation_interlock;
735 break;
736 case ir_intrinsic_end_invocation_interlock:
737 op = nir_intrinsic_end_invocation_interlock;
738 break;
739 case ir_intrinsic_group_memory_barrier:
740 op = nir_intrinsic_group_memory_barrier;
741 break;
742 case ir_intrinsic_memory_barrier_atomic_counter:
743 op = nir_intrinsic_memory_barrier_atomic_counter;
744 break;
745 case ir_intrinsic_memory_barrier_buffer:
746 op = nir_intrinsic_memory_barrier_buffer;
747 break;
748 case ir_intrinsic_memory_barrier_image:
749 op = nir_intrinsic_memory_barrier_image;
750 break;
751 case ir_intrinsic_memory_barrier_shared:
752 op = nir_intrinsic_memory_barrier_shared;
753 break;
754 case ir_intrinsic_shared_load:
755 op = nir_intrinsic_load_shared;
756 break;
757 case ir_intrinsic_shared_store:
758 op = nir_intrinsic_store_shared;
759 break;
760 case ir_intrinsic_shared_atomic_add:
761 op = ir->return_deref->type->is_integer_32_64()
762 ? nir_intrinsic_shared_atomic_add
763 : nir_intrinsic_shared_atomic_fadd;
764 break;
765 case ir_intrinsic_shared_atomic_and:
766 op = nir_intrinsic_shared_atomic_and;
767 break;
768 case ir_intrinsic_shared_atomic_or:
769 op = nir_intrinsic_shared_atomic_or;
770 break;
771 case ir_intrinsic_shared_atomic_xor:
772 op = nir_intrinsic_shared_atomic_xor;
773 break;
774 case ir_intrinsic_shared_atomic_min:
775 assert(ir->return_deref);
776 if (ir->return_deref->type == glsl_type::int_type)
777 op = nir_intrinsic_shared_atomic_imin;
778 else if (ir->return_deref->type == glsl_type::uint_type)
779 op = nir_intrinsic_shared_atomic_umin;
780 else
781 unreachable("Invalid type");
782 break;
783 case ir_intrinsic_shared_atomic_max:
784 assert(ir->return_deref);
785 if (ir->return_deref->type == glsl_type::int_type)
786 op = nir_intrinsic_shared_atomic_imax;
787 else if (ir->return_deref->type == glsl_type::uint_type)
788 op = nir_intrinsic_shared_atomic_umax;
789 else
790 unreachable("Invalid type");
791 break;
792 case ir_intrinsic_shared_atomic_exchange:
793 op = nir_intrinsic_shared_atomic_exchange;
794 break;
795 case ir_intrinsic_shared_atomic_comp_swap:
796 op = nir_intrinsic_shared_atomic_comp_swap;
797 break;
798 case ir_intrinsic_vote_any:
799 op = nir_intrinsic_vote_any;
800 break;
801 case ir_intrinsic_vote_all:
802 op = nir_intrinsic_vote_all;
803 break;
804 case ir_intrinsic_vote_eq:
805 op = nir_intrinsic_vote_ieq;
806 break;
807 case ir_intrinsic_ballot:
808 op = nir_intrinsic_ballot;
809 break;
810 case ir_intrinsic_read_invocation:
811 op = nir_intrinsic_read_invocation;
812 break;
813 case ir_intrinsic_read_first_invocation:
814 op = nir_intrinsic_read_first_invocation;
815 break;
816 default:
817 unreachable("not reached");
818 }
819
820 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
821 nir_dest *dest = &instr->dest;
822
823 switch (op) {
824 case nir_intrinsic_atomic_counter_read_deref:
825 case nir_intrinsic_atomic_counter_inc_deref:
826 case nir_intrinsic_atomic_counter_pre_dec_deref:
827 case nir_intrinsic_atomic_counter_add_deref:
828 case nir_intrinsic_atomic_counter_min_deref:
829 case nir_intrinsic_atomic_counter_max_deref:
830 case nir_intrinsic_atomic_counter_and_deref:
831 case nir_intrinsic_atomic_counter_or_deref:
832 case nir_intrinsic_atomic_counter_xor_deref:
833 case nir_intrinsic_atomic_counter_exchange_deref:
834 case nir_intrinsic_atomic_counter_comp_swap_deref: {
835 /* Set the counter variable dereference. */
836 exec_node *param = ir->actual_parameters.get_head();
837 ir_dereference *counter = (ir_dereference *)param;
838
839 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
840 param = param->get_next();
841
842 /* Set the intrinsic destination. */
843 if (ir->return_deref) {
844 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
845 }
846
847 /* Set the intrinsic parameters. */
848 if (!param->is_tail_sentinel()) {
849 instr->src[1] =
850 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
851 param = param->get_next();
852 }
853
854 if (!param->is_tail_sentinel()) {
855 instr->src[2] =
856 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
857 param = param->get_next();
858 }
859
860 nir_builder_instr_insert(&b, &instr->instr);
861 break;
862 }
863 case nir_intrinsic_image_deref_load:
864 case nir_intrinsic_image_deref_store:
865 case nir_intrinsic_image_deref_atomic_add:
866 case nir_intrinsic_image_deref_atomic_min:
867 case nir_intrinsic_image_deref_atomic_max:
868 case nir_intrinsic_image_deref_atomic_and:
869 case nir_intrinsic_image_deref_atomic_or:
870 case nir_intrinsic_image_deref_atomic_xor:
871 case nir_intrinsic_image_deref_atomic_exchange:
872 case nir_intrinsic_image_deref_atomic_comp_swap:
873 case nir_intrinsic_image_deref_atomic_fadd:
874 case nir_intrinsic_image_deref_samples:
875 case nir_intrinsic_image_deref_size: {
876 nir_ssa_undef_instr *instr_undef =
877 nir_ssa_undef_instr_create(shader, 1, 32);
878 nir_builder_instr_insert(&b, &instr_undef->instr);
879
880 /* Set the image variable dereference. */
881 exec_node *param = ir->actual_parameters.get_head();
882 ir_dereference *image = (ir_dereference *)param;
883 const glsl_type *type =
884 image->variable_referenced()->type->without_array();
885
886 instr->src[0] = nir_src_for_ssa(&evaluate_deref(image)->dest.ssa);
887 param = param->get_next();
888
889 /* Set the intrinsic destination. */
890 if (ir->return_deref) {
891 unsigned num_components = ir->return_deref->type->vector_elements;
892 if (instr->intrinsic == nir_intrinsic_image_deref_size)
893 instr->num_components = num_components;
894 nir_ssa_dest_init(&instr->instr, &instr->dest,
895 num_components, 32, NULL);
896 }
897
898 if (op == nir_intrinsic_image_deref_size ||
899 op == nir_intrinsic_image_deref_samples) {
900 nir_builder_instr_insert(&b, &instr->instr);
901 break;
902 }
903
904 /* Set the address argument, extending the coordinate vector to four
905 * components.
906 */
907 nir_ssa_def *src_addr =
908 evaluate_rvalue((ir_dereference *)param);
909 nir_ssa_def *srcs[4];
910
911 for (int i = 0; i < 4; i++) {
912 if (i < type->coordinate_components())
913 srcs[i] = nir_channel(&b, src_addr, i);
914 else
915 srcs[i] = &instr_undef->def;
916 }
917
918 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
919 param = param->get_next();
920
921 /* Set the sample argument, which is undefined for single-sample
922 * images.
923 */
924 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
925 instr->src[2] =
926 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
927 param = param->get_next();
928 } else {
929 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
930 }
931
932 /* Set the intrinsic parameters. */
933 if (!param->is_tail_sentinel()) {
934 instr->src[3] =
935 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
936 param = param->get_next();
937 }
938
939 if (!param->is_tail_sentinel()) {
940 instr->src[4] =
941 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
942 param = param->get_next();
943 }
944 nir_builder_instr_insert(&b, &instr->instr);
945 break;
946 }
947 case nir_intrinsic_memory_barrier:
948 case nir_intrinsic_group_memory_barrier:
949 case nir_intrinsic_memory_barrier_atomic_counter:
950 case nir_intrinsic_memory_barrier_buffer:
951 case nir_intrinsic_memory_barrier_image:
952 case nir_intrinsic_memory_barrier_shared:
953 nir_builder_instr_insert(&b, &instr->instr);
954 break;
955 case nir_intrinsic_shader_clock:
956 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
957 instr->num_components = 2;
958 nir_builder_instr_insert(&b, &instr->instr);
959 break;
960 case nir_intrinsic_begin_invocation_interlock:
961 nir_builder_instr_insert(&b, &instr->instr);
962 break;
963 case nir_intrinsic_end_invocation_interlock:
964 nir_builder_instr_insert(&b, &instr->instr);
965 break;
966 case nir_intrinsic_store_ssbo: {
967 exec_node *param = ir->actual_parameters.get_head();
968 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
969
970 param = param->get_next();
971 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
972
973 param = param->get_next();
974 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
975
976 param = param->get_next();
977 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
978 assert(write_mask);
979
980 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
981 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
982 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
983 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
984 instr->num_components = val->type->vector_elements;
985
986 nir_builder_instr_insert(&b, &instr->instr);
987 break;
988 }
989 case nir_intrinsic_load_ssbo: {
990 exec_node *param = ir->actual_parameters.get_head();
991 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
992
993 param = param->get_next();
994 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
995
996 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
997 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
998
999 const glsl_type *type = ir->return_deref->var->type;
1000 instr->num_components = type->vector_elements;
1001
1002 /* Setup destination register */
1003 unsigned bit_size = glsl_get_bit_size(type);
1004 nir_ssa_dest_init(&instr->instr, &instr->dest,
1005 type->vector_elements, bit_size, NULL);
1006
1007 /* Insert the created nir instruction now since in the case of boolean
1008 * result we will need to emit another instruction after it
1009 */
1010 nir_builder_instr_insert(&b, &instr->instr);
1011
1012 /*
1013 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1014 * consider a true boolean to be ~0. Fix this up with a != 0
1015 * comparison.
1016 */
1017 if (type->is_boolean()) {
1018 nir_alu_instr *load_ssbo_compare =
1019 nir_alu_instr_create(shader, nir_op_ine);
1020 load_ssbo_compare->src[0].src.is_ssa = true;
1021 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1022 load_ssbo_compare->src[1].src =
1023 nir_src_for_ssa(nir_imm_int(&b, 0));
1024 for (unsigned i = 0; i < type->vector_elements; i++)
1025 load_ssbo_compare->src[1].swizzle[i] = 0;
1026 nir_ssa_dest_init(&load_ssbo_compare->instr,
1027 &load_ssbo_compare->dest.dest,
1028 type->vector_elements, bit_size, NULL);
1029 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1030 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1031 dest = &load_ssbo_compare->dest.dest;
1032 }
1033 break;
1034 }
1035 case nir_intrinsic_ssbo_atomic_add:
1036 case nir_intrinsic_ssbo_atomic_imin:
1037 case nir_intrinsic_ssbo_atomic_umin:
1038 case nir_intrinsic_ssbo_atomic_imax:
1039 case nir_intrinsic_ssbo_atomic_umax:
1040 case nir_intrinsic_ssbo_atomic_and:
1041 case nir_intrinsic_ssbo_atomic_or:
1042 case nir_intrinsic_ssbo_atomic_xor:
1043 case nir_intrinsic_ssbo_atomic_exchange:
1044 case nir_intrinsic_ssbo_atomic_comp_swap:
1045 case nir_intrinsic_ssbo_atomic_fadd: {
1046 int param_count = ir->actual_parameters.length();
1047 assert(param_count == 3 || param_count == 4);
1048
1049 /* Block index */
1050 exec_node *param = ir->actual_parameters.get_head();
1051 ir_instruction *inst = (ir_instruction *) param;
1052 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1053
1054 /* Offset */
1055 param = param->get_next();
1056 inst = (ir_instruction *) param;
1057 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1058
1059 /* data1 parameter (this is always present) */
1060 param = param->get_next();
1061 inst = (ir_instruction *) param;
1062 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1063
1064 /* data2 parameter (only with atomic_comp_swap) */
1065 if (param_count == 4) {
1066 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1067 param = param->get_next();
1068 inst = (ir_instruction *) param;
1069 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1070 }
1071
1072 /* Atomic result */
1073 assert(ir->return_deref);
1074 nir_ssa_dest_init(&instr->instr, &instr->dest,
1075 ir->return_deref->type->vector_elements, 32, NULL);
1076 nir_builder_instr_insert(&b, &instr->instr);
1077 break;
1078 }
1079 case nir_intrinsic_load_shared: {
1080 exec_node *param = ir->actual_parameters.get_head();
1081 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1082
1083 nir_intrinsic_set_base(instr, 0);
1084 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1085
1086 const glsl_type *type = ir->return_deref->var->type;
1087 instr->num_components = type->vector_elements;
1088
1089 /* Setup destination register */
1090 unsigned bit_size = glsl_get_bit_size(type);
1091 nir_ssa_dest_init(&instr->instr, &instr->dest,
1092 type->vector_elements, bit_size, NULL);
1093
1094 nir_builder_instr_insert(&b, &instr->instr);
1095 break;
1096 }
1097 case nir_intrinsic_store_shared: {
1098 exec_node *param = ir->actual_parameters.get_head();
1099 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1100
1101 param = param->get_next();
1102 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1103
1104 param = param->get_next();
1105 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1106 assert(write_mask);
1107
1108 nir_intrinsic_set_base(instr, 0);
1109 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1110
1111 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1112
1113 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1114 instr->num_components = val->type->vector_elements;
1115
1116 nir_builder_instr_insert(&b, &instr->instr);
1117 break;
1118 }
1119 case nir_intrinsic_shared_atomic_add:
1120 case nir_intrinsic_shared_atomic_imin:
1121 case nir_intrinsic_shared_atomic_umin:
1122 case nir_intrinsic_shared_atomic_imax:
1123 case nir_intrinsic_shared_atomic_umax:
1124 case nir_intrinsic_shared_atomic_and:
1125 case nir_intrinsic_shared_atomic_or:
1126 case nir_intrinsic_shared_atomic_xor:
1127 case nir_intrinsic_shared_atomic_exchange:
1128 case nir_intrinsic_shared_atomic_comp_swap:
1129 case nir_intrinsic_shared_atomic_fadd: {
1130 int param_count = ir->actual_parameters.length();
1131 assert(param_count == 2 || param_count == 3);
1132
1133 /* Offset */
1134 exec_node *param = ir->actual_parameters.get_head();
1135 ir_instruction *inst = (ir_instruction *) param;
1136 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1137
1138 /* data1 parameter (this is always present) */
1139 param = param->get_next();
1140 inst = (ir_instruction *) param;
1141 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1142
1143 /* data2 parameter (only with atomic_comp_swap) */
1144 if (param_count == 3) {
1145 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1146 param = param->get_next();
1147 inst = (ir_instruction *) param;
1148 instr->src[2] =
1149 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1150 }
1151
1152 /* Atomic result */
1153 assert(ir->return_deref);
1154 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1155 nir_ssa_dest_init(&instr->instr, &instr->dest,
1156 ir->return_deref->type->vector_elements,
1157 bit_size, NULL);
1158 nir_builder_instr_insert(&b, &instr->instr);
1159 break;
1160 }
1161 case nir_intrinsic_vote_any:
1162 case nir_intrinsic_vote_all:
1163 case nir_intrinsic_vote_ieq: {
1164 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1165 instr->num_components = 1;
1166
1167 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1168 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1169
1170 nir_builder_instr_insert(&b, &instr->instr);
1171 break;
1172 }
1173
1174 case nir_intrinsic_ballot: {
1175 nir_ssa_dest_init(&instr->instr, &instr->dest,
1176 ir->return_deref->type->vector_elements, 64, NULL);
1177 instr->num_components = ir->return_deref->type->vector_elements;
1178
1179 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1180 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1181
1182 nir_builder_instr_insert(&b, &instr->instr);
1183 break;
1184 }
1185 case nir_intrinsic_read_invocation: {
1186 nir_ssa_dest_init(&instr->instr, &instr->dest,
1187 ir->return_deref->type->vector_elements, 32, NULL);
1188 instr->num_components = ir->return_deref->type->vector_elements;
1189
1190 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1191 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1192
1193 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1194 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1195
1196 nir_builder_instr_insert(&b, &instr->instr);
1197 break;
1198 }
1199 case nir_intrinsic_read_first_invocation: {
1200 nir_ssa_dest_init(&instr->instr, &instr->dest,
1201 ir->return_deref->type->vector_elements, 32, NULL);
1202 instr->num_components = ir->return_deref->type->vector_elements;
1203
1204 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1205 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1206
1207 nir_builder_instr_insert(&b, &instr->instr);
1208 break;
1209 }
1210 default:
1211 unreachable("not reached");
1212 }
1213
1214 if (ir->return_deref)
1215 nir_store_deref(&b, evaluate_deref(ir->return_deref), &dest->ssa, ~0);
1216
1217 return;
1218 }
1219
1220 unreachable("glsl_to_nir only handles function calls to intrinsics");
1221 }
1222
1223 void
1224 nir_visitor::visit(ir_assignment *ir)
1225 {
1226 unsigned num_components = ir->lhs->type->vector_elements;
1227
1228 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1229 ir->lhs->variable_referenced()->data.precise;
1230
1231 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1232 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1233 if (ir->condition) {
1234 nir_push_if(&b, evaluate_rvalue(ir->condition));
1235 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1236 nir_pop_if(&b, NULL);
1237 } else {
1238 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1239 }
1240 return;
1241 }
1242
1243 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1244
1245 ir->lhs->accept(this);
1246 nir_deref_instr *lhs_deref = this->deref;
1247 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1248
1249 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1250 /* GLSL IR will give us the input to the write-masked assignment in a
1251 * single packed vector. So, for example, if the writemask is xzw, then
1252 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1253 * from the load.
1254 */
1255 unsigned swiz[4];
1256 unsigned component = 0;
1257 for (unsigned i = 0; i < 4; i++) {
1258 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1259 }
1260 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1261 }
1262
1263 if (ir->condition) {
1264 nir_push_if(&b, evaluate_rvalue(ir->condition));
1265 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1266 nir_pop_if(&b, NULL);
1267 } else {
1268 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1269 }
1270 }
1271
1272 /*
1273 * Given an instruction, returns a pointer to its destination or NULL if there
1274 * is no destination.
1275 *
1276 * Note that this only handles instructions we generate at this level.
1277 */
1278 static nir_dest *
1279 get_instr_dest(nir_instr *instr)
1280 {
1281 nir_alu_instr *alu_instr;
1282 nir_intrinsic_instr *intrinsic_instr;
1283 nir_tex_instr *tex_instr;
1284
1285 switch (instr->type) {
1286 case nir_instr_type_alu:
1287 alu_instr = nir_instr_as_alu(instr);
1288 return &alu_instr->dest.dest;
1289
1290 case nir_instr_type_intrinsic:
1291 intrinsic_instr = nir_instr_as_intrinsic(instr);
1292 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1293 return &intrinsic_instr->dest;
1294 else
1295 return NULL;
1296
1297 case nir_instr_type_tex:
1298 tex_instr = nir_instr_as_tex(instr);
1299 return &tex_instr->dest;
1300
1301 default:
1302 unreachable("not reached");
1303 }
1304
1305 return NULL;
1306 }
1307
1308 void
1309 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1310 unsigned bit_size)
1311 {
1312 nir_dest *dest = get_instr_dest(instr);
1313
1314 if (dest)
1315 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1316
1317 nir_builder_instr_insert(&b, instr);
1318
1319 if (dest) {
1320 assert(dest->is_ssa);
1321 this->result = &dest->ssa;
1322 }
1323 }
1324
1325 nir_ssa_def *
1326 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1327 {
1328 ir->accept(this);
1329 if (ir->as_dereference() || ir->as_constant()) {
1330 /*
1331 * A dereference is being used on the right hand side, which means we
1332 * must emit a variable load.
1333 */
1334
1335 this->result = nir_load_deref(&b, this->deref);
1336 }
1337
1338 return this->result;
1339 }
1340
1341 static bool
1342 type_is_float(glsl_base_type type)
1343 {
1344 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1345 type == GLSL_TYPE_FLOAT16;
1346 }
1347
1348 static bool
1349 type_is_signed(glsl_base_type type)
1350 {
1351 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1352 type == GLSL_TYPE_INT16;
1353 }
1354
1355 void
1356 nir_visitor::visit(ir_expression *ir)
1357 {
1358 /* Some special cases */
1359 switch (ir->operation) {
1360 case ir_binop_ubo_load: {
1361 nir_intrinsic_instr *load =
1362 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1363 unsigned bit_size = glsl_get_bit_size(ir->type);
1364 load->num_components = ir->type->vector_elements;
1365 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1366 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1367 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1368
1369 /*
1370 * In UBO's, a true boolean value is any non-zero value, but we consider
1371 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1372 */
1373
1374 if (ir->type->is_boolean())
1375 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1376
1377 return;
1378 }
1379
1380 case ir_unop_interpolate_at_centroid:
1381 case ir_binop_interpolate_at_offset:
1382 case ir_binop_interpolate_at_sample: {
1383 ir_dereference *deref = ir->operands[0]->as_dereference();
1384 ir_swizzle *swizzle = NULL;
1385 if (!deref) {
1386 /* the api does not allow a swizzle here, but the varying packing code
1387 * may have pushed one into here.
1388 */
1389 swizzle = ir->operands[0]->as_swizzle();
1390 assert(swizzle);
1391 deref = swizzle->val->as_dereference();
1392 assert(deref);
1393 }
1394
1395 deref->accept(this);
1396
1397 nir_intrinsic_op op;
1398 if (this->deref->mode == nir_var_shader_in) {
1399 switch (ir->operation) {
1400 case ir_unop_interpolate_at_centroid:
1401 op = nir_intrinsic_interp_deref_at_centroid;
1402 break;
1403 case ir_binop_interpolate_at_offset:
1404 op = nir_intrinsic_interp_deref_at_offset;
1405 break;
1406 case ir_binop_interpolate_at_sample:
1407 op = nir_intrinsic_interp_deref_at_sample;
1408 break;
1409 default:
1410 unreachable("Invalid interpolation intrinsic");
1411 }
1412 } else {
1413 /* This case can happen if the vertex shader does not write the
1414 * given varying. In this case, the linker will lower it to a
1415 * global variable. Since interpolating a variable makes no
1416 * sense, we'll just turn it into a load which will probably
1417 * eventually end up as an SSA definition.
1418 */
1419 assert(this->deref->mode == nir_var_global);
1420 op = nir_intrinsic_load_deref;
1421 }
1422
1423 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1424 intrin->num_components = deref->type->vector_elements;
1425 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1426
1427 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1428 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1429 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1430
1431 unsigned bit_size = glsl_get_bit_size(deref->type);
1432 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1433
1434 if (swizzle) {
1435 unsigned swiz[4] = {
1436 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1437 };
1438
1439 result = nir_swizzle(&b, result, swiz,
1440 swizzle->type->vector_elements, false);
1441 }
1442
1443 return;
1444 }
1445
1446 default:
1447 break;
1448 }
1449
1450 nir_ssa_def *srcs[4];
1451 for (unsigned i = 0; i < ir->num_operands; i++)
1452 srcs[i] = evaluate_rvalue(ir->operands[i]);
1453
1454 glsl_base_type types[4];
1455 for (unsigned i = 0; i < ir->num_operands; i++)
1456 if (supports_ints)
1457 types[i] = ir->operands[i]->type->base_type;
1458 else
1459 types[i] = GLSL_TYPE_FLOAT;
1460
1461 glsl_base_type out_type;
1462 if (supports_ints)
1463 out_type = ir->type->base_type;
1464 else
1465 out_type = GLSL_TYPE_FLOAT;
1466
1467 switch (ir->operation) {
1468 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1469 case ir_unop_logic_not:
1470 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1471 break;
1472 case ir_unop_neg:
1473 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1474 : nir_ineg(&b, srcs[0]);
1475 break;
1476 case ir_unop_abs:
1477 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1478 : nir_iabs(&b, srcs[0]);
1479 break;
1480 case ir_unop_saturate:
1481 assert(type_is_float(types[0]));
1482 result = nir_fsat(&b, srcs[0]);
1483 break;
1484 case ir_unop_sign:
1485 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1486 : nir_isign(&b, srcs[0]);
1487 break;
1488 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1489 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1490 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1491 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1492 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1493 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1494 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1495 case ir_unop_i2f:
1496 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1497 break;
1498 case ir_unop_u2f:
1499 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1500 break;
1501 case ir_unop_b2f:
1502 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1503 break;
1504 case ir_unop_f2i:
1505 case ir_unop_f2u:
1506 case ir_unop_f2b:
1507 case ir_unop_i2b:
1508 case ir_unop_b2i:
1509 case ir_unop_b2i64:
1510 case ir_unop_d2f:
1511 case ir_unop_f2d:
1512 case ir_unop_d2i:
1513 case ir_unop_d2u:
1514 case ir_unop_d2b:
1515 case ir_unop_i2d:
1516 case ir_unop_u2d:
1517 case ir_unop_i642i:
1518 case ir_unop_i642u:
1519 case ir_unop_i642f:
1520 case ir_unop_i642b:
1521 case ir_unop_i642d:
1522 case ir_unop_u642i:
1523 case ir_unop_u642u:
1524 case ir_unop_u642f:
1525 case ir_unop_u642d:
1526 case ir_unop_i2i64:
1527 case ir_unop_u2i64:
1528 case ir_unop_f2i64:
1529 case ir_unop_d2i64:
1530 case ir_unop_i2u64:
1531 case ir_unop_u2u64:
1532 case ir_unop_f2u64:
1533 case ir_unop_d2u64:
1534 case ir_unop_i2u:
1535 case ir_unop_u2i:
1536 case ir_unop_i642u64:
1537 case ir_unop_u642i64: {
1538 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1539 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1540 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1541 nir_rounding_mode_undef),
1542 srcs[0], NULL, NULL, NULL);
1543 /* b2i and b2f don't have fixed bit-size versions so the builder will
1544 * just assume 32 and we have to fix it up here.
1545 */
1546 result->bit_size = nir_alu_type_get_type_size(dst_type);
1547 break;
1548 }
1549
1550 case ir_unop_bitcast_i2f:
1551 case ir_unop_bitcast_f2i:
1552 case ir_unop_bitcast_u2f:
1553 case ir_unop_bitcast_f2u:
1554 case ir_unop_bitcast_i642d:
1555 case ir_unop_bitcast_d2i64:
1556 case ir_unop_bitcast_u642d:
1557 case ir_unop_bitcast_d2u64:
1558 case ir_unop_subroutine_to_int:
1559 /* no-op */
1560 result = nir_imov(&b, srcs[0]);
1561 break;
1562 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1563 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1564 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1565 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1566 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1567 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1568 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1569 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1570 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1571 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1572 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1573 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1574 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1575 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1576 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1577 case ir_unop_pack_snorm_2x16:
1578 result = nir_pack_snorm_2x16(&b, srcs[0]);
1579 break;
1580 case ir_unop_pack_snorm_4x8:
1581 result = nir_pack_snorm_4x8(&b, srcs[0]);
1582 break;
1583 case ir_unop_pack_unorm_2x16:
1584 result = nir_pack_unorm_2x16(&b, srcs[0]);
1585 break;
1586 case ir_unop_pack_unorm_4x8:
1587 result = nir_pack_unorm_4x8(&b, srcs[0]);
1588 break;
1589 case ir_unop_pack_half_2x16:
1590 result = nir_pack_half_2x16(&b, srcs[0]);
1591 break;
1592 case ir_unop_unpack_snorm_2x16:
1593 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1594 break;
1595 case ir_unop_unpack_snorm_4x8:
1596 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1597 break;
1598 case ir_unop_unpack_unorm_2x16:
1599 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1600 break;
1601 case ir_unop_unpack_unorm_4x8:
1602 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1603 break;
1604 case ir_unop_unpack_half_2x16:
1605 result = nir_unpack_half_2x16(&b, srcs[0]);
1606 break;
1607 case ir_unop_pack_sampler_2x32:
1608 case ir_unop_pack_image_2x32:
1609 case ir_unop_pack_double_2x32:
1610 case ir_unop_pack_int_2x32:
1611 case ir_unop_pack_uint_2x32:
1612 result = nir_pack_64_2x32(&b, srcs[0]);
1613 break;
1614 case ir_unop_unpack_sampler_2x32:
1615 case ir_unop_unpack_image_2x32:
1616 case ir_unop_unpack_double_2x32:
1617 case ir_unop_unpack_int_2x32:
1618 case ir_unop_unpack_uint_2x32:
1619 result = nir_unpack_64_2x32(&b, srcs[0]);
1620 break;
1621 case ir_unop_bitfield_reverse:
1622 result = nir_bitfield_reverse(&b, srcs[0]);
1623 break;
1624 case ir_unop_bit_count:
1625 result = nir_bit_count(&b, srcs[0]);
1626 break;
1627 case ir_unop_find_msb:
1628 switch (types[0]) {
1629 case GLSL_TYPE_UINT:
1630 result = nir_ufind_msb(&b, srcs[0]);
1631 break;
1632 case GLSL_TYPE_INT:
1633 result = nir_ifind_msb(&b, srcs[0]);
1634 break;
1635 default:
1636 unreachable("Invalid type for findMSB()");
1637 }
1638 break;
1639 case ir_unop_find_lsb:
1640 result = nir_find_lsb(&b, srcs[0]);
1641 break;
1642
1643 case ir_unop_noise:
1644 switch (ir->type->vector_elements) {
1645 case 1:
1646 switch (ir->operands[0]->type->vector_elements) {
1647 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1648 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1649 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1650 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1651 default: unreachable("not reached");
1652 }
1653 break;
1654 case 2:
1655 switch (ir->operands[0]->type->vector_elements) {
1656 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1657 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1658 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1659 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1660 default: unreachable("not reached");
1661 }
1662 break;
1663 case 3:
1664 switch (ir->operands[0]->type->vector_elements) {
1665 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1666 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1667 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1668 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1669 default: unreachable("not reached");
1670 }
1671 break;
1672 case 4:
1673 switch (ir->operands[0]->type->vector_elements) {
1674 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1675 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1676 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1677 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1678 default: unreachable("not reached");
1679 }
1680 break;
1681 default:
1682 unreachable("not reached");
1683 }
1684 break;
1685 case ir_unop_get_buffer_size: {
1686 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1687 this->shader,
1688 nir_intrinsic_get_buffer_size);
1689 load->num_components = ir->type->vector_elements;
1690 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1691 unsigned bit_size = glsl_get_bit_size(ir->type);
1692 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1693 return;
1694 }
1695
1696 case ir_binop_add:
1697 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1698 : nir_iadd(&b, srcs[0], srcs[1]);
1699 break;
1700 case ir_binop_sub:
1701 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1702 : nir_isub(&b, srcs[0], srcs[1]);
1703 break;
1704 case ir_binop_mul:
1705 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1706 : nir_imul(&b, srcs[0], srcs[1]);
1707 break;
1708 case ir_binop_div:
1709 if (type_is_float(out_type))
1710 result = nir_fdiv(&b, srcs[0], srcs[1]);
1711 else if (type_is_signed(out_type))
1712 result = nir_idiv(&b, srcs[0], srcs[1]);
1713 else
1714 result = nir_udiv(&b, srcs[0], srcs[1]);
1715 break;
1716 case ir_binop_mod:
1717 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1718 : nir_umod(&b, srcs[0], srcs[1]);
1719 break;
1720 case ir_binop_min:
1721 if (type_is_float(out_type))
1722 result = nir_fmin(&b, srcs[0], srcs[1]);
1723 else if (type_is_signed(out_type))
1724 result = nir_imin(&b, srcs[0], srcs[1]);
1725 else
1726 result = nir_umin(&b, srcs[0], srcs[1]);
1727 break;
1728 case ir_binop_max:
1729 if (type_is_float(out_type))
1730 result = nir_fmax(&b, srcs[0], srcs[1]);
1731 else if (type_is_signed(out_type))
1732 result = nir_imax(&b, srcs[0], srcs[1]);
1733 else
1734 result = nir_umax(&b, srcs[0], srcs[1]);
1735 break;
1736 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1737 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1738 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1739 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1740 case ir_binop_logic_and:
1741 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1742 : nir_fand(&b, srcs[0], srcs[1]);
1743 break;
1744 case ir_binop_logic_or:
1745 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1746 : nir_for(&b, srcs[0], srcs[1]);
1747 break;
1748 case ir_binop_logic_xor:
1749 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1750 : nir_fxor(&b, srcs[0], srcs[1]);
1751 break;
1752 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1753 case ir_binop_rshift:
1754 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1755 : nir_ushr(&b, srcs[0], srcs[1]);
1756 break;
1757 case ir_binop_imul_high:
1758 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1759 : nir_umul_high(&b, srcs[0], srcs[1]);
1760 break;
1761 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1762 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1763 case ir_binop_less:
1764 if (supports_ints) {
1765 if (type_is_float(types[0]))
1766 result = nir_flt(&b, srcs[0], srcs[1]);
1767 else if (type_is_signed(types[0]))
1768 result = nir_ilt(&b, srcs[0], srcs[1]);
1769 else
1770 result = nir_ult(&b, srcs[0], srcs[1]);
1771 } else {
1772 result = nir_slt(&b, srcs[0], srcs[1]);
1773 }
1774 break;
1775 case ir_binop_gequal:
1776 if (supports_ints) {
1777 if (type_is_float(types[0]))
1778 result = nir_fge(&b, srcs[0], srcs[1]);
1779 else if (type_is_signed(types[0]))
1780 result = nir_ige(&b, srcs[0], srcs[1]);
1781 else
1782 result = nir_uge(&b, srcs[0], srcs[1]);
1783 } else {
1784 result = nir_sge(&b, srcs[0], srcs[1]);
1785 }
1786 break;
1787 case ir_binop_equal:
1788 if (supports_ints) {
1789 if (type_is_float(types[0]))
1790 result = nir_feq(&b, srcs[0], srcs[1]);
1791 else
1792 result = nir_ieq(&b, srcs[0], srcs[1]);
1793 } else {
1794 result = nir_seq(&b, srcs[0], srcs[1]);
1795 }
1796 break;
1797 case ir_binop_nequal:
1798 if (supports_ints) {
1799 if (type_is_float(types[0]))
1800 result = nir_fne(&b, srcs[0], srcs[1]);
1801 else
1802 result = nir_ine(&b, srcs[0], srcs[1]);
1803 } else {
1804 result = nir_sne(&b, srcs[0], srcs[1]);
1805 }
1806 break;
1807 case ir_binop_all_equal:
1808 if (supports_ints) {
1809 if (type_is_float(types[0])) {
1810 switch (ir->operands[0]->type->vector_elements) {
1811 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1812 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1813 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1814 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1815 default:
1816 unreachable("not reached");
1817 }
1818 } else {
1819 switch (ir->operands[0]->type->vector_elements) {
1820 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1821 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1822 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1823 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1824 default:
1825 unreachable("not reached");
1826 }
1827 }
1828 } else {
1829 switch (ir->operands[0]->type->vector_elements) {
1830 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1831 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1832 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1833 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1834 default:
1835 unreachable("not reached");
1836 }
1837 }
1838 break;
1839 case ir_binop_any_nequal:
1840 if (supports_ints) {
1841 if (type_is_float(types[0])) {
1842 switch (ir->operands[0]->type->vector_elements) {
1843 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1844 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1845 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1846 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1847 default:
1848 unreachable("not reached");
1849 }
1850 } else {
1851 switch (ir->operands[0]->type->vector_elements) {
1852 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1853 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1854 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1855 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1856 default:
1857 unreachable("not reached");
1858 }
1859 }
1860 } else {
1861 switch (ir->operands[0]->type->vector_elements) {
1862 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1863 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1864 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1865 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1866 default:
1867 unreachable("not reached");
1868 }
1869 }
1870 break;
1871 case ir_binop_dot:
1872 switch (ir->operands[0]->type->vector_elements) {
1873 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1874 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1875 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1876 default:
1877 unreachable("not reached");
1878 }
1879 break;
1880 case ir_binop_vector_extract: {
1881 result = nir_channel(&b, srcs[0], 0);
1882 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
1883 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
1884 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
1885 swizzled, result);
1886 }
1887 break;
1888 }
1889
1890 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1891 case ir_triop_fma:
1892 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1893 break;
1894 case ir_triop_lrp:
1895 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1896 break;
1897 case ir_triop_csel:
1898 if (supports_ints)
1899 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1900 else
1901 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1902 break;
1903 case ir_triop_bitfield_extract:
1904 result = (out_type == GLSL_TYPE_INT) ?
1905 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1906 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1907 break;
1908 case ir_quadop_bitfield_insert:
1909 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1910 break;
1911 case ir_quadop_vector:
1912 result = nir_vec(&b, srcs, ir->type->vector_elements);
1913 break;
1914
1915 default:
1916 unreachable("not reached");
1917 }
1918 }
1919
1920 void
1921 nir_visitor::visit(ir_swizzle *ir)
1922 {
1923 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1924 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1925 ir->type->vector_elements, !supports_ints);
1926 }
1927
1928 void
1929 nir_visitor::visit(ir_texture *ir)
1930 {
1931 unsigned num_srcs;
1932 nir_texop op;
1933 switch (ir->op) {
1934 case ir_tex:
1935 op = nir_texop_tex;
1936 num_srcs = 1; /* coordinate */
1937 break;
1938
1939 case ir_txb:
1940 case ir_txl:
1941 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1942 num_srcs = 2; /* coordinate, bias/lod */
1943 break;
1944
1945 case ir_txd:
1946 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1947 num_srcs = 3;
1948 break;
1949
1950 case ir_txf:
1951 op = nir_texop_txf;
1952 if (ir->lod_info.lod != NULL)
1953 num_srcs = 2; /* coordinate, lod */
1954 else
1955 num_srcs = 1; /* coordinate */
1956 break;
1957
1958 case ir_txf_ms:
1959 op = nir_texop_txf_ms;
1960 num_srcs = 2; /* coordinate, sample_index */
1961 break;
1962
1963 case ir_txs:
1964 op = nir_texop_txs;
1965 if (ir->lod_info.lod != NULL)
1966 num_srcs = 1; /* lod */
1967 else
1968 num_srcs = 0;
1969 break;
1970
1971 case ir_lod:
1972 op = nir_texop_lod;
1973 num_srcs = 1; /* coordinate */
1974 break;
1975
1976 case ir_tg4:
1977 op = nir_texop_tg4;
1978 num_srcs = 1; /* coordinate */
1979 break;
1980
1981 case ir_query_levels:
1982 op = nir_texop_query_levels;
1983 num_srcs = 0;
1984 break;
1985
1986 case ir_texture_samples:
1987 op = nir_texop_texture_samples;
1988 num_srcs = 0;
1989 break;
1990
1991 case ir_samples_identical:
1992 op = nir_texop_samples_identical;
1993 num_srcs = 1; /* coordinate */
1994 break;
1995
1996 default:
1997 unreachable("not reached");
1998 }
1999
2000 if (ir->projector != NULL)
2001 num_srcs++;
2002 if (ir->shadow_comparator != NULL)
2003 num_srcs++;
2004 if (ir->offset != NULL)
2005 num_srcs++;
2006
2007 /* Add one for the texture deref */
2008 num_srcs += 2;
2009
2010 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2011
2012 instr->op = op;
2013 instr->sampler_dim =
2014 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2015 instr->is_array = ir->sampler->type->sampler_array;
2016 instr->is_shadow = ir->sampler->type->sampler_shadow;
2017 if (instr->is_shadow)
2018 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2019 switch (ir->type->base_type) {
2020 case GLSL_TYPE_FLOAT:
2021 instr->dest_type = nir_type_float;
2022 break;
2023 case GLSL_TYPE_INT:
2024 instr->dest_type = nir_type_int;
2025 break;
2026 case GLSL_TYPE_BOOL:
2027 case GLSL_TYPE_UINT:
2028 instr->dest_type = nir_type_uint;
2029 break;
2030 default:
2031 unreachable("not reached");
2032 }
2033
2034 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2035 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2036 instr->src[0].src_type = nir_tex_src_texture_deref;
2037 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2038 instr->src[1].src_type = nir_tex_src_sampler_deref;
2039
2040 unsigned src_number = 2;
2041
2042 if (ir->coordinate != NULL) {
2043 instr->coord_components = ir->coordinate->type->vector_elements;
2044 instr->src[src_number].src =
2045 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2046 instr->src[src_number].src_type = nir_tex_src_coord;
2047 src_number++;
2048 }
2049
2050 if (ir->projector != NULL) {
2051 instr->src[src_number].src =
2052 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2053 instr->src[src_number].src_type = nir_tex_src_projector;
2054 src_number++;
2055 }
2056
2057 if (ir->shadow_comparator != NULL) {
2058 instr->src[src_number].src =
2059 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2060 instr->src[src_number].src_type = nir_tex_src_comparator;
2061 src_number++;
2062 }
2063
2064 if (ir->offset != NULL) {
2065 /* we don't support multiple offsets yet */
2066 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2067
2068 instr->src[src_number].src =
2069 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2070 instr->src[src_number].src_type = nir_tex_src_offset;
2071 src_number++;
2072 }
2073
2074 switch (ir->op) {
2075 case ir_txb:
2076 instr->src[src_number].src =
2077 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2078 instr->src[src_number].src_type = nir_tex_src_bias;
2079 src_number++;
2080 break;
2081
2082 case ir_txl:
2083 case ir_txf:
2084 case ir_txs:
2085 if (ir->lod_info.lod != NULL) {
2086 instr->src[src_number].src =
2087 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2088 instr->src[src_number].src_type = nir_tex_src_lod;
2089 src_number++;
2090 }
2091 break;
2092
2093 case ir_txd:
2094 instr->src[src_number].src =
2095 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2096 instr->src[src_number].src_type = nir_tex_src_ddx;
2097 src_number++;
2098 instr->src[src_number].src =
2099 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2100 instr->src[src_number].src_type = nir_tex_src_ddy;
2101 src_number++;
2102 break;
2103
2104 case ir_txf_ms:
2105 instr->src[src_number].src =
2106 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2107 instr->src[src_number].src_type = nir_tex_src_ms_index;
2108 src_number++;
2109 break;
2110
2111 case ir_tg4:
2112 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2113 break;
2114
2115 default:
2116 break;
2117 }
2118
2119 assert(src_number == num_srcs);
2120
2121 unsigned bit_size = glsl_get_bit_size(ir->type);
2122 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2123 }
2124
2125 void
2126 nir_visitor::visit(ir_constant *ir)
2127 {
2128 /*
2129 * We don't know if this variable is an array or struct that gets
2130 * dereferenced, so do the safe thing an make it a variable with a
2131 * constant initializer and return a dereference.
2132 */
2133
2134 nir_variable *var =
2135 nir_local_variable_create(this->impl, ir->type, "const_temp");
2136 var->data.read_only = true;
2137 var->constant_initializer = constant_copy(ir, var);
2138
2139 this->deref = nir_build_deref_var(&b, var);
2140 }
2141
2142 void
2143 nir_visitor::visit(ir_dereference_variable *ir)
2144 {
2145 struct hash_entry *entry =
2146 _mesa_hash_table_search(this->var_table, ir->var);
2147 assert(entry);
2148 nir_variable *var = (nir_variable *) entry->data;
2149
2150 this->deref = nir_build_deref_var(&b, var);
2151 }
2152
2153 void
2154 nir_visitor::visit(ir_dereference_record *ir)
2155 {
2156 ir->record->accept(this);
2157
2158 int field_index = ir->field_idx;
2159 assert(field_index >= 0);
2160
2161 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2162 }
2163
2164 void
2165 nir_visitor::visit(ir_dereference_array *ir)
2166 {
2167 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2168
2169 ir->array->accept(this);
2170
2171 this->deref = nir_build_deref_array(&b, this->deref, index);
2172 }
2173
2174 void
2175 nir_visitor::visit(ir_barrier *)
2176 {
2177 nir_intrinsic_instr *instr =
2178 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2179 nir_builder_instr_insert(&b, &instr->instr);
2180 }