nir: Use derefs in nir_lower_samplers
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 /*
38 * pass to lower GLSL IR to NIR
39 *
40 * This will lower variable dereferences to loads/stores of corresponding
41 * variables in NIR - the variables will be converted to registers in a later
42 * pass.
43 */
44
45 namespace {
46
47 class nir_visitor : public ir_visitor
48 {
49 public:
50 nir_visitor(nir_shader *shader);
51 ~nir_visitor();
52
53 virtual void visit(ir_variable *);
54 virtual void visit(ir_function *);
55 virtual void visit(ir_function_signature *);
56 virtual void visit(ir_loop *);
57 virtual void visit(ir_if *);
58 virtual void visit(ir_discard *);
59 virtual void visit(ir_loop_jump *);
60 virtual void visit(ir_return *);
61 virtual void visit(ir_call *);
62 virtual void visit(ir_assignment *);
63 virtual void visit(ir_emit_vertex *);
64 virtual void visit(ir_end_primitive *);
65 virtual void visit(ir_expression *);
66 virtual void visit(ir_swizzle *);
67 virtual void visit(ir_texture *);
68 virtual void visit(ir_constant *);
69 virtual void visit(ir_dereference_variable *);
70 virtual void visit(ir_dereference_record *);
71 virtual void visit(ir_dereference_array *);
72 virtual void visit(ir_barrier *);
73
74 void create_function(ir_function_signature *ir);
75
76 private:
77 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
78 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
79
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
83 nir_ssa_def *src2);
84 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
85 nir_ssa_def *src2, nir_ssa_def *src3);
86
87 bool supports_ints;
88
89 nir_shader *shader;
90 nir_function_impl *impl;
91 nir_builder b;
92 nir_ssa_def *result; /* result of the expression tree last visited */
93
94 nir_deref_instr *evaluate_deref(ir_instruction *ir);
95
96 /* most recent deref instruction created */
97 nir_deref_instr *deref;
98
99 nir_variable *var; /* variable created by ir_variable visitor */
100
101 /* whether the IR we're operating on is per-function or global */
102 bool is_global;
103
104 /* map of ir_variable -> nir_variable */
105 struct hash_table *var_table;
106
107 /* map of ir_function_signature -> nir_function_overload */
108 struct hash_table *overload_table;
109 };
110
111 /*
112 * This visitor runs before the main visitor, calling create_function() for
113 * each function so that the main visitor can resolve forward references in
114 * calls.
115 */
116
117 class nir_function_visitor : public ir_hierarchical_visitor
118 {
119 public:
120 nir_function_visitor(nir_visitor *v) : visitor(v)
121 {
122 }
123 virtual ir_visitor_status visit_enter(ir_function *);
124
125 private:
126 nir_visitor *visitor;
127 };
128
129 } /* end of anonymous namespace */
130
131 static void
132 nir_remap_attributes(nir_shader *shader,
133 const nir_shader_compiler_options *options)
134 {
135 if (options->vs_inputs_dual_locations) {
136 nir_foreach_variable(var, &shader->inputs) {
137 var->data.location +=
138 _mesa_bitcount_64(shader->info.vs.double_inputs &
139 BITFIELD64_MASK(var->data.location));
140 }
141 }
142
143 /* Once the remap is done, reset double_inputs_read, so later it will have
144 * which location/slots are doubles */
145 shader->info.vs.double_inputs = 0;
146 }
147
148 nir_shader *
149 glsl_to_nir(const struct gl_shader_program *shader_prog,
150 gl_shader_stage stage,
151 const nir_shader_compiler_options *options)
152 {
153 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
154
155 nir_shader *shader = nir_shader_create(NULL, stage, options,
156 &sh->Program->info);
157
158 nir_visitor v1(shader);
159 nir_function_visitor v2(&v1);
160 v2.run(sh->ir);
161 visit_exec_list(sh->ir, &v1);
162
163 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
164
165 /* Remap the locations to slots so those requiring two slots will occupy
166 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
167 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
168 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
169 if (shader->info.stage == MESA_SHADER_VERTEX)
170 nir_remap_attributes(shader, options);
171
172 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
173 if (shader_prog->Label)
174 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
175
176 /* Check for transform feedback varyings specified via the API */
177 shader->info.has_transform_feedback_varyings =
178 shader_prog->TransformFeedback.NumVarying > 0;
179
180 /* Check for transform feedback varyings specified in the Shader */
181 if (shader_prog->last_vert_prog)
182 shader->info.has_transform_feedback_varyings |=
183 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
184
185 return shader;
186 }
187
188 nir_visitor::nir_visitor(nir_shader *shader)
189 {
190 this->supports_ints = shader->options->native_integers;
191 this->shader = shader;
192 this->is_global = true;
193 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
194 _mesa_key_pointer_equal);
195 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
196 _mesa_key_pointer_equal);
197 this->result = NULL;
198 this->impl = NULL;
199 this->var = NULL;
200 memset(&this->b, 0, sizeof(this->b));
201 }
202
203 nir_visitor::~nir_visitor()
204 {
205 _mesa_hash_table_destroy(this->var_table, NULL);
206 _mesa_hash_table_destroy(this->overload_table, NULL);
207 }
208
209 nir_deref_instr *
210 nir_visitor::evaluate_deref(ir_instruction *ir)
211 {
212 ir->accept(this);
213 return this->deref;
214 }
215
216 static nir_constant *
217 constant_copy(ir_constant *ir, void *mem_ctx)
218 {
219 if (ir == NULL)
220 return NULL;
221
222 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
223
224 const unsigned rows = ir->type->vector_elements;
225 const unsigned cols = ir->type->matrix_columns;
226 unsigned i;
227
228 ret->num_elements = 0;
229 switch (ir->type->base_type) {
230 case GLSL_TYPE_UINT:
231 /* Only float base types can be matrices. */
232 assert(cols == 1);
233
234 for (unsigned r = 0; r < rows; r++)
235 ret->values[0].u32[r] = ir->value.u[r];
236
237 break;
238
239 case GLSL_TYPE_INT:
240 /* Only float base types can be matrices. */
241 assert(cols == 1);
242
243 for (unsigned r = 0; r < rows; r++)
244 ret->values[0].i32[r] = ir->value.i[r];
245
246 break;
247
248 case GLSL_TYPE_FLOAT:
249 for (unsigned c = 0; c < cols; c++) {
250 for (unsigned r = 0; r < rows; r++)
251 ret->values[c].f32[r] = ir->value.f[c * rows + r];
252 }
253 break;
254
255 case GLSL_TYPE_DOUBLE:
256 for (unsigned c = 0; c < cols; c++) {
257 for (unsigned r = 0; r < rows; r++)
258 ret->values[c].f64[r] = ir->value.d[c * rows + r];
259 }
260 break;
261
262 case GLSL_TYPE_UINT64:
263 /* Only float base types can be matrices. */
264 assert(cols == 1);
265
266 for (unsigned r = 0; r < rows; r++)
267 ret->values[0].u64[r] = ir->value.u64[r];
268 break;
269
270 case GLSL_TYPE_INT64:
271 /* Only float base types can be matrices. */
272 assert(cols == 1);
273
274 for (unsigned r = 0; r < rows; r++)
275 ret->values[0].i64[r] = ir->value.i64[r];
276 break;
277
278 case GLSL_TYPE_BOOL:
279 /* Only float base types can be matrices. */
280 assert(cols == 1);
281
282 for (unsigned r = 0; r < rows; r++)
283 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
284
285 break;
286
287 case GLSL_TYPE_STRUCT:
288 case GLSL_TYPE_ARRAY:
289 ret->elements = ralloc_array(mem_ctx, nir_constant *,
290 ir->type->length);
291 ret->num_elements = ir->type->length;
292
293 for (i = 0; i < ir->type->length; i++)
294 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
295 break;
296
297 default:
298 unreachable("not reached");
299 }
300
301 return ret;
302 }
303
304 void
305 nir_visitor::visit(ir_variable *ir)
306 {
307 /* TODO: In future we should switch to using the NIR lowering pass but for
308 * now just ignore these variables as GLSL IR should have lowered them.
309 * Anything remaining are just dead vars that weren't cleaned up.
310 */
311 if (ir->data.mode == ir_var_shader_shared)
312 return;
313
314 nir_variable *var = rzalloc(shader, nir_variable);
315 var->type = ir->type;
316 var->name = ralloc_strdup(var, ir->name);
317
318 var->data.always_active_io = ir->data.always_active_io;
319 var->data.read_only = ir->data.read_only;
320 var->data.centroid = ir->data.centroid;
321 var->data.sample = ir->data.sample;
322 var->data.patch = ir->data.patch;
323 var->data.invariant = ir->data.invariant;
324 var->data.location = ir->data.location;
325 var->data.stream = ir->data.stream;
326 var->data.compact = false;
327
328 switch(ir->data.mode) {
329 case ir_var_auto:
330 case ir_var_temporary:
331 if (is_global)
332 var->data.mode = nir_var_global;
333 else
334 var->data.mode = nir_var_local;
335 break;
336
337 case ir_var_function_in:
338 case ir_var_function_out:
339 case ir_var_function_inout:
340 case ir_var_const_in:
341 var->data.mode = nir_var_local;
342 break;
343
344 case ir_var_shader_in:
345 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
346 ir->data.location == VARYING_SLOT_FACE) {
347 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
348 var->data.location = SYSTEM_VALUE_FRONT_FACE;
349 var->data.mode = nir_var_system_value;
350 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
351 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
352 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
353 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
354 var->data.mode = nir_var_system_value;
355 } else {
356 var->data.mode = nir_var_shader_in;
357
358 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
359 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
360 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
361 var->data.compact = ir->type->without_array()->is_scalar();
362 }
363 }
364
365 /* Mark all the locations that require two slots */
366 if (shader->info.stage == MESA_SHADER_VERTEX &&
367 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
368 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
369 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
370 shader->info.vs.double_inputs |= bitfield;
371 }
372 }
373 break;
374
375 case ir_var_shader_out:
376 var->data.mode = nir_var_shader_out;
377 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
378 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
379 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
380 var->data.compact = ir->type->without_array()->is_scalar();
381 }
382 break;
383
384 case ir_var_uniform:
385 var->data.mode = nir_var_uniform;
386 break;
387
388 case ir_var_shader_storage:
389 var->data.mode = nir_var_shader_storage;
390 break;
391
392 case ir_var_system_value:
393 var->data.mode = nir_var_system_value;
394 break;
395
396 default:
397 unreachable("not reached");
398 }
399
400 var->data.interpolation = ir->data.interpolation;
401 var->data.origin_upper_left = ir->data.origin_upper_left;
402 var->data.pixel_center_integer = ir->data.pixel_center_integer;
403 var->data.location_frac = ir->data.location_frac;
404
405 if (var->data.pixel_center_integer) {
406 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
407 shader->info.fs.pixel_center_integer = true;
408 }
409
410 switch (ir->data.depth_layout) {
411 case ir_depth_layout_none:
412 var->data.depth_layout = nir_depth_layout_none;
413 break;
414 case ir_depth_layout_any:
415 var->data.depth_layout = nir_depth_layout_any;
416 break;
417 case ir_depth_layout_greater:
418 var->data.depth_layout = nir_depth_layout_greater;
419 break;
420 case ir_depth_layout_less:
421 var->data.depth_layout = nir_depth_layout_less;
422 break;
423 case ir_depth_layout_unchanged:
424 var->data.depth_layout = nir_depth_layout_unchanged;
425 break;
426 default:
427 unreachable("not reached");
428 }
429
430 var->data.index = ir->data.index;
431 var->data.descriptor_set = 0;
432 var->data.binding = ir->data.binding;
433 var->data.explicit_binding = ir->data.explicit_binding;
434 var->data.bindless = ir->data.bindless;
435 var->data.offset = ir->data.offset;
436 var->data.image.read_only = ir->data.memory_read_only;
437 var->data.image.write_only = ir->data.memory_write_only;
438 var->data.image.coherent = ir->data.memory_coherent;
439 var->data.image._volatile = ir->data.memory_volatile;
440 var->data.image.restrict_flag = ir->data.memory_restrict;
441 var->data.image.format = ir->data.image_format;
442 var->data.fb_fetch_output = ir->data.fb_fetch_output;
443
444 var->num_state_slots = ir->get_num_state_slots();
445 if (var->num_state_slots > 0) {
446 var->state_slots = rzalloc_array(var, nir_state_slot,
447 var->num_state_slots);
448
449 ir_state_slot *state_slots = ir->get_state_slots();
450 for (unsigned i = 0; i < var->num_state_slots; i++) {
451 for (unsigned j = 0; j < 5; j++)
452 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
453 var->state_slots[i].swizzle = state_slots[i].swizzle;
454 }
455 } else {
456 var->state_slots = NULL;
457 }
458
459 var->constant_initializer = constant_copy(ir->constant_initializer, var);
460
461 var->interface_type = ir->get_interface_type();
462
463 if (var->data.mode == nir_var_local)
464 nir_function_impl_add_variable(impl, var);
465 else
466 nir_shader_add_variable(shader, var);
467
468 _mesa_hash_table_insert(var_table, ir, var);
469 this->var = var;
470 }
471
472 ir_visitor_status
473 nir_function_visitor::visit_enter(ir_function *ir)
474 {
475 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
476 visitor->create_function(sig);
477 }
478 return visit_continue_with_parent;
479 }
480
481 void
482 nir_visitor::create_function(ir_function_signature *ir)
483 {
484 if (ir->is_intrinsic())
485 return;
486
487 nir_function *func = nir_function_create(shader, ir->function_name());
488
489 assert(ir->parameters.is_empty());
490 assert(ir->return_type == glsl_type::void_type);
491
492 _mesa_hash_table_insert(this->overload_table, ir, func);
493 }
494
495 void
496 nir_visitor::visit(ir_function *ir)
497 {
498 foreach_in_list(ir_function_signature, sig, &ir->signatures)
499 sig->accept(this);
500 }
501
502 void
503 nir_visitor::visit(ir_function_signature *ir)
504 {
505 if (ir->is_intrinsic())
506 return;
507
508 struct hash_entry *entry =
509 _mesa_hash_table_search(this->overload_table, ir);
510
511 assert(entry);
512 nir_function *func = (nir_function *) entry->data;
513
514 if (ir->is_defined) {
515 nir_function_impl *impl = nir_function_impl_create(func);
516 this->impl = impl;
517
518 assert(strcmp(func->name, "main") == 0);
519 assert(ir->parameters.is_empty());
520
521 this->is_global = false;
522
523 nir_builder_init(&b, impl);
524 b.cursor = nir_after_cf_list(&impl->body);
525 visit_exec_list(&ir->body, this);
526
527 this->is_global = true;
528 } else {
529 func->impl = NULL;
530 }
531 }
532
533 void
534 nir_visitor::visit(ir_loop *ir)
535 {
536 nir_push_loop(&b);
537 visit_exec_list(&ir->body_instructions, this);
538 nir_pop_loop(&b, NULL);
539 }
540
541 void
542 nir_visitor::visit(ir_if *ir)
543 {
544 nir_push_if(&b, evaluate_rvalue(ir->condition));
545 visit_exec_list(&ir->then_instructions, this);
546 nir_push_else(&b, NULL);
547 visit_exec_list(&ir->else_instructions, this);
548 nir_pop_if(&b, NULL);
549 }
550
551 void
552 nir_visitor::visit(ir_discard *ir)
553 {
554 /*
555 * discards aren't treated as control flow, because before we lower them
556 * they can appear anywhere in the shader and the stuff after them may still
557 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
558 * discards will be immediately followed by a return.
559 */
560
561 nir_intrinsic_instr *discard;
562 if (ir->condition) {
563 discard = nir_intrinsic_instr_create(this->shader,
564 nir_intrinsic_discard_if);
565 discard->src[0] =
566 nir_src_for_ssa(evaluate_rvalue(ir->condition));
567 } else {
568 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
569 }
570
571 nir_builder_instr_insert(&b, &discard->instr);
572 }
573
574 void
575 nir_visitor::visit(ir_emit_vertex *ir)
576 {
577 nir_intrinsic_instr *instr =
578 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
579 nir_intrinsic_set_stream_id(instr, ir->stream_id());
580 nir_builder_instr_insert(&b, &instr->instr);
581 }
582
583 void
584 nir_visitor::visit(ir_end_primitive *ir)
585 {
586 nir_intrinsic_instr *instr =
587 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
588 nir_intrinsic_set_stream_id(instr, ir->stream_id());
589 nir_builder_instr_insert(&b, &instr->instr);
590 }
591
592 void
593 nir_visitor::visit(ir_loop_jump *ir)
594 {
595 nir_jump_type type;
596 switch (ir->mode) {
597 case ir_loop_jump::jump_break:
598 type = nir_jump_break;
599 break;
600 case ir_loop_jump::jump_continue:
601 type = nir_jump_continue;
602 break;
603 default:
604 unreachable("not reached");
605 }
606
607 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
608 nir_builder_instr_insert(&b, &instr->instr);
609 }
610
611 void
612 nir_visitor::visit(ir_return *ir)
613 {
614 assert(ir->value == NULL);
615 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
616 nir_builder_instr_insert(&b, &instr->instr);
617 }
618
619 void
620 nir_visitor::visit(ir_call *ir)
621 {
622 if (ir->callee->is_intrinsic()) {
623 nir_intrinsic_op op;
624
625 switch (ir->callee->intrinsic_id) {
626 case ir_intrinsic_atomic_counter_read:
627 op = nir_intrinsic_atomic_counter_read_deref;
628 break;
629 case ir_intrinsic_atomic_counter_increment:
630 op = nir_intrinsic_atomic_counter_inc_deref;
631 break;
632 case ir_intrinsic_atomic_counter_predecrement:
633 op = nir_intrinsic_atomic_counter_dec_deref;
634 break;
635 case ir_intrinsic_atomic_counter_add:
636 op = nir_intrinsic_atomic_counter_add_deref;
637 break;
638 case ir_intrinsic_atomic_counter_and:
639 op = nir_intrinsic_atomic_counter_and_deref;
640 break;
641 case ir_intrinsic_atomic_counter_or:
642 op = nir_intrinsic_atomic_counter_or_deref;
643 break;
644 case ir_intrinsic_atomic_counter_xor:
645 op = nir_intrinsic_atomic_counter_xor_deref;
646 break;
647 case ir_intrinsic_atomic_counter_min:
648 op = nir_intrinsic_atomic_counter_min_deref;
649 break;
650 case ir_intrinsic_atomic_counter_max:
651 op = nir_intrinsic_atomic_counter_max_deref;
652 break;
653 case ir_intrinsic_atomic_counter_exchange:
654 op = nir_intrinsic_atomic_counter_exchange_deref;
655 break;
656 case ir_intrinsic_atomic_counter_comp_swap:
657 op = nir_intrinsic_atomic_counter_comp_swap_deref;
658 break;
659 case ir_intrinsic_image_load:
660 op = nir_intrinsic_image_deref_load;
661 break;
662 case ir_intrinsic_image_store:
663 op = nir_intrinsic_image_deref_store;
664 break;
665 case ir_intrinsic_image_atomic_add:
666 op = nir_intrinsic_image_deref_atomic_add;
667 break;
668 case ir_intrinsic_image_atomic_min:
669 op = nir_intrinsic_image_deref_atomic_min;
670 break;
671 case ir_intrinsic_image_atomic_max:
672 op = nir_intrinsic_image_deref_atomic_max;
673 break;
674 case ir_intrinsic_image_atomic_and:
675 op = nir_intrinsic_image_deref_atomic_and;
676 break;
677 case ir_intrinsic_image_atomic_or:
678 op = nir_intrinsic_image_deref_atomic_or;
679 break;
680 case ir_intrinsic_image_atomic_xor:
681 op = nir_intrinsic_image_deref_atomic_xor;
682 break;
683 case ir_intrinsic_image_atomic_exchange:
684 op = nir_intrinsic_image_deref_atomic_exchange;
685 break;
686 case ir_intrinsic_image_atomic_comp_swap:
687 op = nir_intrinsic_image_deref_atomic_comp_swap;
688 break;
689 case ir_intrinsic_memory_barrier:
690 op = nir_intrinsic_memory_barrier;
691 break;
692 case ir_intrinsic_image_size:
693 op = nir_intrinsic_image_deref_size;
694 break;
695 case ir_intrinsic_image_samples:
696 op = nir_intrinsic_image_deref_samples;
697 break;
698 case ir_intrinsic_ssbo_store:
699 op = nir_intrinsic_store_ssbo;
700 break;
701 case ir_intrinsic_ssbo_load:
702 op = nir_intrinsic_load_ssbo;
703 break;
704 case ir_intrinsic_ssbo_atomic_add:
705 op = nir_intrinsic_ssbo_atomic_add;
706 break;
707 case ir_intrinsic_ssbo_atomic_and:
708 op = nir_intrinsic_ssbo_atomic_and;
709 break;
710 case ir_intrinsic_ssbo_atomic_or:
711 op = nir_intrinsic_ssbo_atomic_or;
712 break;
713 case ir_intrinsic_ssbo_atomic_xor:
714 op = nir_intrinsic_ssbo_atomic_xor;
715 break;
716 case ir_intrinsic_ssbo_atomic_min:
717 assert(ir->return_deref);
718 if (ir->return_deref->type == glsl_type::int_type)
719 op = nir_intrinsic_ssbo_atomic_imin;
720 else if (ir->return_deref->type == glsl_type::uint_type)
721 op = nir_intrinsic_ssbo_atomic_umin;
722 else
723 unreachable("Invalid type");
724 break;
725 case ir_intrinsic_ssbo_atomic_max:
726 assert(ir->return_deref);
727 if (ir->return_deref->type == glsl_type::int_type)
728 op = nir_intrinsic_ssbo_atomic_imax;
729 else if (ir->return_deref->type == glsl_type::uint_type)
730 op = nir_intrinsic_ssbo_atomic_umax;
731 else
732 unreachable("Invalid type");
733 break;
734 case ir_intrinsic_ssbo_atomic_exchange:
735 op = nir_intrinsic_ssbo_atomic_exchange;
736 break;
737 case ir_intrinsic_ssbo_atomic_comp_swap:
738 op = nir_intrinsic_ssbo_atomic_comp_swap;
739 break;
740 case ir_intrinsic_shader_clock:
741 op = nir_intrinsic_shader_clock;
742 break;
743 case ir_intrinsic_begin_invocation_interlock:
744 op = nir_intrinsic_begin_invocation_interlock;
745 break;
746 case ir_intrinsic_end_invocation_interlock:
747 op = nir_intrinsic_end_invocation_interlock;
748 break;
749 case ir_intrinsic_group_memory_barrier:
750 op = nir_intrinsic_group_memory_barrier;
751 break;
752 case ir_intrinsic_memory_barrier_atomic_counter:
753 op = nir_intrinsic_memory_barrier_atomic_counter;
754 break;
755 case ir_intrinsic_memory_barrier_buffer:
756 op = nir_intrinsic_memory_barrier_buffer;
757 break;
758 case ir_intrinsic_memory_barrier_image:
759 op = nir_intrinsic_memory_barrier_image;
760 break;
761 case ir_intrinsic_memory_barrier_shared:
762 op = nir_intrinsic_memory_barrier_shared;
763 break;
764 case ir_intrinsic_shared_load:
765 op = nir_intrinsic_load_shared;
766 break;
767 case ir_intrinsic_shared_store:
768 op = nir_intrinsic_store_shared;
769 break;
770 case ir_intrinsic_shared_atomic_add:
771 op = nir_intrinsic_shared_atomic_add;
772 break;
773 case ir_intrinsic_shared_atomic_and:
774 op = nir_intrinsic_shared_atomic_and;
775 break;
776 case ir_intrinsic_shared_atomic_or:
777 op = nir_intrinsic_shared_atomic_or;
778 break;
779 case ir_intrinsic_shared_atomic_xor:
780 op = nir_intrinsic_shared_atomic_xor;
781 break;
782 case ir_intrinsic_shared_atomic_min:
783 assert(ir->return_deref);
784 if (ir->return_deref->type == glsl_type::int_type)
785 op = nir_intrinsic_shared_atomic_imin;
786 else if (ir->return_deref->type == glsl_type::uint_type)
787 op = nir_intrinsic_shared_atomic_umin;
788 else
789 unreachable("Invalid type");
790 break;
791 case ir_intrinsic_shared_atomic_max:
792 assert(ir->return_deref);
793 if (ir->return_deref->type == glsl_type::int_type)
794 op = nir_intrinsic_shared_atomic_imax;
795 else if (ir->return_deref->type == glsl_type::uint_type)
796 op = nir_intrinsic_shared_atomic_umax;
797 else
798 unreachable("Invalid type");
799 break;
800 case ir_intrinsic_shared_atomic_exchange:
801 op = nir_intrinsic_shared_atomic_exchange;
802 break;
803 case ir_intrinsic_shared_atomic_comp_swap:
804 op = nir_intrinsic_shared_atomic_comp_swap;
805 break;
806 case ir_intrinsic_vote_any:
807 op = nir_intrinsic_vote_any;
808 break;
809 case ir_intrinsic_vote_all:
810 op = nir_intrinsic_vote_all;
811 break;
812 case ir_intrinsic_vote_eq:
813 op = nir_intrinsic_vote_ieq;
814 break;
815 case ir_intrinsic_ballot:
816 op = nir_intrinsic_ballot;
817 break;
818 case ir_intrinsic_read_invocation:
819 op = nir_intrinsic_read_invocation;
820 break;
821 case ir_intrinsic_read_first_invocation:
822 op = nir_intrinsic_read_first_invocation;
823 break;
824 default:
825 unreachable("not reached");
826 }
827
828 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
829 nir_dest *dest = &instr->dest;
830
831 switch (op) {
832 case nir_intrinsic_atomic_counter_read_deref:
833 case nir_intrinsic_atomic_counter_inc_deref:
834 case nir_intrinsic_atomic_counter_dec_deref:
835 case nir_intrinsic_atomic_counter_add_deref:
836 case nir_intrinsic_atomic_counter_min_deref:
837 case nir_intrinsic_atomic_counter_max_deref:
838 case nir_intrinsic_atomic_counter_and_deref:
839 case nir_intrinsic_atomic_counter_or_deref:
840 case nir_intrinsic_atomic_counter_xor_deref:
841 case nir_intrinsic_atomic_counter_exchange_deref:
842 case nir_intrinsic_atomic_counter_comp_swap_deref: {
843 /* Set the counter variable dereference. */
844 exec_node *param = ir->actual_parameters.get_head();
845 ir_dereference *counter = (ir_dereference *)param;
846
847 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
848 param = param->get_next();
849
850 /* Set the intrinsic destination. */
851 if (ir->return_deref) {
852 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
853 }
854
855 /* Set the intrinsic parameters. */
856 if (!param->is_tail_sentinel()) {
857 instr->src[1] =
858 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
859 param = param->get_next();
860 }
861
862 if (!param->is_tail_sentinel()) {
863 instr->src[2] =
864 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
865 param = param->get_next();
866 }
867
868 nir_builder_instr_insert(&b, &instr->instr);
869 break;
870 }
871 case nir_intrinsic_image_deref_load:
872 case nir_intrinsic_image_deref_store:
873 case nir_intrinsic_image_deref_atomic_add:
874 case nir_intrinsic_image_deref_atomic_min:
875 case nir_intrinsic_image_deref_atomic_max:
876 case nir_intrinsic_image_deref_atomic_and:
877 case nir_intrinsic_image_deref_atomic_or:
878 case nir_intrinsic_image_deref_atomic_xor:
879 case nir_intrinsic_image_deref_atomic_exchange:
880 case nir_intrinsic_image_deref_atomic_comp_swap:
881 case nir_intrinsic_image_deref_samples:
882 case nir_intrinsic_image_deref_size: {
883 nir_ssa_undef_instr *instr_undef =
884 nir_ssa_undef_instr_create(shader, 1, 32);
885 nir_builder_instr_insert(&b, &instr_undef->instr);
886
887 /* Set the image variable dereference. */
888 exec_node *param = ir->actual_parameters.get_head();
889 ir_dereference *image = (ir_dereference *)param;
890 const glsl_type *type =
891 image->variable_referenced()->type->without_array();
892
893 instr->src[0] = nir_src_for_ssa(&evaluate_deref(image)->dest.ssa);
894 param = param->get_next();
895
896 /* Set the intrinsic destination. */
897 if (ir->return_deref) {
898 unsigned num_components = ir->return_deref->type->vector_elements;
899 if (instr->intrinsic == nir_intrinsic_image_deref_size)
900 instr->num_components = num_components;
901 nir_ssa_dest_init(&instr->instr, &instr->dest,
902 num_components, 32, NULL);
903 }
904
905 if (op == nir_intrinsic_image_deref_size ||
906 op == nir_intrinsic_image_deref_samples) {
907 nir_builder_instr_insert(&b, &instr->instr);
908 break;
909 }
910
911 /* Set the address argument, extending the coordinate vector to four
912 * components.
913 */
914 nir_ssa_def *src_addr =
915 evaluate_rvalue((ir_dereference *)param);
916 nir_ssa_def *srcs[4];
917
918 for (int i = 0; i < 4; i++) {
919 if (i < type->coordinate_components())
920 srcs[i] = nir_channel(&b, src_addr, i);
921 else
922 srcs[i] = &instr_undef->def;
923 }
924
925 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
926 param = param->get_next();
927
928 /* Set the sample argument, which is undefined for single-sample
929 * images.
930 */
931 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
932 instr->src[2] =
933 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
934 param = param->get_next();
935 } else {
936 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
937 }
938
939 /* Set the intrinsic parameters. */
940 if (!param->is_tail_sentinel()) {
941 instr->src[3] =
942 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
943 param = param->get_next();
944 }
945
946 if (!param->is_tail_sentinel()) {
947 instr->src[4] =
948 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
949 param = param->get_next();
950 }
951 nir_builder_instr_insert(&b, &instr->instr);
952 break;
953 }
954 case nir_intrinsic_memory_barrier:
955 case nir_intrinsic_group_memory_barrier:
956 case nir_intrinsic_memory_barrier_atomic_counter:
957 case nir_intrinsic_memory_barrier_buffer:
958 case nir_intrinsic_memory_barrier_image:
959 case nir_intrinsic_memory_barrier_shared:
960 nir_builder_instr_insert(&b, &instr->instr);
961 break;
962 case nir_intrinsic_shader_clock:
963 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
964 instr->num_components = 2;
965 nir_builder_instr_insert(&b, &instr->instr);
966 break;
967 case nir_intrinsic_begin_invocation_interlock:
968 nir_builder_instr_insert(&b, &instr->instr);
969 break;
970 case nir_intrinsic_end_invocation_interlock:
971 nir_builder_instr_insert(&b, &instr->instr);
972 break;
973 case nir_intrinsic_store_ssbo: {
974 exec_node *param = ir->actual_parameters.get_head();
975 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
976
977 param = param->get_next();
978 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
979
980 param = param->get_next();
981 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
982
983 param = param->get_next();
984 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
985 assert(write_mask);
986
987 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
988 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
989 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
990 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
991 instr->num_components = val->type->vector_elements;
992
993 nir_builder_instr_insert(&b, &instr->instr);
994 break;
995 }
996 case nir_intrinsic_load_ssbo: {
997 exec_node *param = ir->actual_parameters.get_head();
998 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
999
1000 param = param->get_next();
1001 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1002
1003 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1004 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1005
1006 const glsl_type *type = ir->return_deref->var->type;
1007 instr->num_components = type->vector_elements;
1008
1009 /* Setup destination register */
1010 unsigned bit_size = glsl_get_bit_size(type);
1011 nir_ssa_dest_init(&instr->instr, &instr->dest,
1012 type->vector_elements, bit_size, NULL);
1013
1014 /* Insert the created nir instruction now since in the case of boolean
1015 * result we will need to emit another instruction after it
1016 */
1017 nir_builder_instr_insert(&b, &instr->instr);
1018
1019 /*
1020 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1021 * consider a true boolean to be ~0. Fix this up with a != 0
1022 * comparison.
1023 */
1024 if (type->is_boolean()) {
1025 nir_alu_instr *load_ssbo_compare =
1026 nir_alu_instr_create(shader, nir_op_ine);
1027 load_ssbo_compare->src[0].src.is_ssa = true;
1028 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1029 load_ssbo_compare->src[1].src =
1030 nir_src_for_ssa(nir_imm_int(&b, 0));
1031 for (unsigned i = 0; i < type->vector_elements; i++)
1032 load_ssbo_compare->src[1].swizzle[i] = 0;
1033 nir_ssa_dest_init(&load_ssbo_compare->instr,
1034 &load_ssbo_compare->dest.dest,
1035 type->vector_elements, bit_size, NULL);
1036 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1037 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1038 dest = &load_ssbo_compare->dest.dest;
1039 }
1040 break;
1041 }
1042 case nir_intrinsic_ssbo_atomic_add:
1043 case nir_intrinsic_ssbo_atomic_imin:
1044 case nir_intrinsic_ssbo_atomic_umin:
1045 case nir_intrinsic_ssbo_atomic_imax:
1046 case nir_intrinsic_ssbo_atomic_umax:
1047 case nir_intrinsic_ssbo_atomic_and:
1048 case nir_intrinsic_ssbo_atomic_or:
1049 case nir_intrinsic_ssbo_atomic_xor:
1050 case nir_intrinsic_ssbo_atomic_exchange:
1051 case nir_intrinsic_ssbo_atomic_comp_swap: {
1052 int param_count = ir->actual_parameters.length();
1053 assert(param_count == 3 || param_count == 4);
1054
1055 /* Block index */
1056 exec_node *param = ir->actual_parameters.get_head();
1057 ir_instruction *inst = (ir_instruction *) param;
1058 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1059
1060 /* Offset */
1061 param = param->get_next();
1062 inst = (ir_instruction *) param;
1063 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1064
1065 /* data1 parameter (this is always present) */
1066 param = param->get_next();
1067 inst = (ir_instruction *) param;
1068 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1069
1070 /* data2 parameter (only with atomic_comp_swap) */
1071 if (param_count == 4) {
1072 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1073 param = param->get_next();
1074 inst = (ir_instruction *) param;
1075 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1076 }
1077
1078 /* Atomic result */
1079 assert(ir->return_deref);
1080 nir_ssa_dest_init(&instr->instr, &instr->dest,
1081 ir->return_deref->type->vector_elements, 32, NULL);
1082 nir_builder_instr_insert(&b, &instr->instr);
1083 break;
1084 }
1085 case nir_intrinsic_load_shared: {
1086 exec_node *param = ir->actual_parameters.get_head();
1087 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1088
1089 nir_intrinsic_set_base(instr, 0);
1090 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1091
1092 const glsl_type *type = ir->return_deref->var->type;
1093 instr->num_components = type->vector_elements;
1094
1095 /* Setup destination register */
1096 unsigned bit_size = glsl_get_bit_size(type);
1097 nir_ssa_dest_init(&instr->instr, &instr->dest,
1098 type->vector_elements, bit_size, NULL);
1099
1100 nir_builder_instr_insert(&b, &instr->instr);
1101 break;
1102 }
1103 case nir_intrinsic_store_shared: {
1104 exec_node *param = ir->actual_parameters.get_head();
1105 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1106
1107 param = param->get_next();
1108 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1109
1110 param = param->get_next();
1111 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1112 assert(write_mask);
1113
1114 nir_intrinsic_set_base(instr, 0);
1115 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1116
1117 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1118
1119 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1120 instr->num_components = val->type->vector_elements;
1121
1122 nir_builder_instr_insert(&b, &instr->instr);
1123 break;
1124 }
1125 case nir_intrinsic_shared_atomic_add:
1126 case nir_intrinsic_shared_atomic_imin:
1127 case nir_intrinsic_shared_atomic_umin:
1128 case nir_intrinsic_shared_atomic_imax:
1129 case nir_intrinsic_shared_atomic_umax:
1130 case nir_intrinsic_shared_atomic_and:
1131 case nir_intrinsic_shared_atomic_or:
1132 case nir_intrinsic_shared_atomic_xor:
1133 case nir_intrinsic_shared_atomic_exchange:
1134 case nir_intrinsic_shared_atomic_comp_swap: {
1135 int param_count = ir->actual_parameters.length();
1136 assert(param_count == 2 || param_count == 3);
1137
1138 /* Offset */
1139 exec_node *param = ir->actual_parameters.get_head();
1140 ir_instruction *inst = (ir_instruction *) param;
1141 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1142
1143 /* data1 parameter (this is always present) */
1144 param = param->get_next();
1145 inst = (ir_instruction *) param;
1146 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1147
1148 /* data2 parameter (only with atomic_comp_swap) */
1149 if (param_count == 3) {
1150 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1151 param = param->get_next();
1152 inst = (ir_instruction *) param;
1153 instr->src[2] =
1154 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1155 }
1156
1157 /* Atomic result */
1158 assert(ir->return_deref);
1159 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1160 nir_ssa_dest_init(&instr->instr, &instr->dest,
1161 ir->return_deref->type->vector_elements,
1162 bit_size, NULL);
1163 nir_builder_instr_insert(&b, &instr->instr);
1164 break;
1165 }
1166 case nir_intrinsic_vote_any:
1167 case nir_intrinsic_vote_all:
1168 case nir_intrinsic_vote_ieq: {
1169 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1170 instr->num_components = 1;
1171
1172 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1173 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1174
1175 nir_builder_instr_insert(&b, &instr->instr);
1176 break;
1177 }
1178
1179 case nir_intrinsic_ballot: {
1180 nir_ssa_dest_init(&instr->instr, &instr->dest,
1181 ir->return_deref->type->vector_elements, 64, NULL);
1182 instr->num_components = ir->return_deref->type->vector_elements;
1183
1184 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1185 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1186
1187 nir_builder_instr_insert(&b, &instr->instr);
1188 break;
1189 }
1190 case nir_intrinsic_read_invocation: {
1191 nir_ssa_dest_init(&instr->instr, &instr->dest,
1192 ir->return_deref->type->vector_elements, 32, NULL);
1193 instr->num_components = ir->return_deref->type->vector_elements;
1194
1195 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1196 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1197
1198 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1199 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1200
1201 nir_builder_instr_insert(&b, &instr->instr);
1202 break;
1203 }
1204 case nir_intrinsic_read_first_invocation: {
1205 nir_ssa_dest_init(&instr->instr, &instr->dest,
1206 ir->return_deref->type->vector_elements, 32, NULL);
1207 instr->num_components = ir->return_deref->type->vector_elements;
1208
1209 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1210 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1211
1212 nir_builder_instr_insert(&b, &instr->instr);
1213 break;
1214 }
1215 default:
1216 unreachable("not reached");
1217 }
1218
1219 if (ir->return_deref)
1220 nir_store_deref(&b, evaluate_deref(ir->return_deref), &dest->ssa, ~0);
1221
1222 return;
1223 }
1224
1225 unreachable("glsl_to_nir only handles function calls to intrinsics");
1226 }
1227
1228 void
1229 nir_visitor::visit(ir_assignment *ir)
1230 {
1231 unsigned num_components = ir->lhs->type->vector_elements;
1232
1233 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1234 ir->lhs->variable_referenced()->data.precise;
1235
1236 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1237 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1238 if (ir->condition) {
1239 nir_push_if(&b, evaluate_rvalue(ir->condition));
1240 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1241 nir_pop_if(&b, NULL);
1242 } else {
1243 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1244 }
1245 return;
1246 }
1247
1248 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1249
1250 ir->lhs->accept(this);
1251 nir_deref_instr *lhs_deref = this->deref;
1252 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1253
1254 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1255 /* GLSL IR will give us the input to the write-masked assignment in a
1256 * single packed vector. So, for example, if the writemask is xzw, then
1257 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1258 * from the load.
1259 */
1260 unsigned swiz[4];
1261 unsigned component = 0;
1262 for (unsigned i = 0; i < 4; i++) {
1263 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1264 }
1265 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1266 }
1267
1268 if (ir->condition) {
1269 nir_push_if(&b, evaluate_rvalue(ir->condition));
1270 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1271 nir_pop_if(&b, NULL);
1272 } else {
1273 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1274 }
1275 }
1276
1277 /*
1278 * Given an instruction, returns a pointer to its destination or NULL if there
1279 * is no destination.
1280 *
1281 * Note that this only handles instructions we generate at this level.
1282 */
1283 static nir_dest *
1284 get_instr_dest(nir_instr *instr)
1285 {
1286 nir_alu_instr *alu_instr;
1287 nir_intrinsic_instr *intrinsic_instr;
1288 nir_tex_instr *tex_instr;
1289
1290 switch (instr->type) {
1291 case nir_instr_type_alu:
1292 alu_instr = nir_instr_as_alu(instr);
1293 return &alu_instr->dest.dest;
1294
1295 case nir_instr_type_intrinsic:
1296 intrinsic_instr = nir_instr_as_intrinsic(instr);
1297 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1298 return &intrinsic_instr->dest;
1299 else
1300 return NULL;
1301
1302 case nir_instr_type_tex:
1303 tex_instr = nir_instr_as_tex(instr);
1304 return &tex_instr->dest;
1305
1306 default:
1307 unreachable("not reached");
1308 }
1309
1310 return NULL;
1311 }
1312
1313 void
1314 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1315 unsigned bit_size)
1316 {
1317 nir_dest *dest = get_instr_dest(instr);
1318
1319 if (dest)
1320 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1321
1322 nir_builder_instr_insert(&b, instr);
1323
1324 if (dest) {
1325 assert(dest->is_ssa);
1326 this->result = &dest->ssa;
1327 }
1328 }
1329
1330 nir_ssa_def *
1331 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1332 {
1333 ir->accept(this);
1334 if (ir->as_dereference() || ir->as_constant()) {
1335 /*
1336 * A dereference is being used on the right hand side, which means we
1337 * must emit a variable load.
1338 */
1339
1340 this->result = nir_load_deref(&b, this->deref);
1341 }
1342
1343 return this->result;
1344 }
1345
1346 static bool
1347 type_is_float(glsl_base_type type)
1348 {
1349 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1350 type == GLSL_TYPE_FLOAT16;
1351 }
1352
1353 static bool
1354 type_is_signed(glsl_base_type type)
1355 {
1356 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1357 type == GLSL_TYPE_INT16;
1358 }
1359
1360 void
1361 nir_visitor::visit(ir_expression *ir)
1362 {
1363 /* Some special cases */
1364 switch (ir->operation) {
1365 case ir_binop_ubo_load: {
1366 nir_intrinsic_instr *load =
1367 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1368 unsigned bit_size = glsl_get_bit_size(ir->type);
1369 load->num_components = ir->type->vector_elements;
1370 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1371 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1372 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1373
1374 /*
1375 * In UBO's, a true boolean value is any non-zero value, but we consider
1376 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1377 */
1378
1379 if (ir->type->is_boolean())
1380 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1381
1382 return;
1383 }
1384
1385 case ir_unop_interpolate_at_centroid:
1386 case ir_binop_interpolate_at_offset:
1387 case ir_binop_interpolate_at_sample: {
1388 ir_dereference *deref = ir->operands[0]->as_dereference();
1389 ir_swizzle *swizzle = NULL;
1390 if (!deref) {
1391 /* the api does not allow a swizzle here, but the varying packing code
1392 * may have pushed one into here.
1393 */
1394 swizzle = ir->operands[0]->as_swizzle();
1395 assert(swizzle);
1396 deref = swizzle->val->as_dereference();
1397 assert(deref);
1398 }
1399
1400 deref->accept(this);
1401
1402 nir_intrinsic_op op;
1403 if (this->deref->mode == nir_var_shader_in) {
1404 switch (ir->operation) {
1405 case ir_unop_interpolate_at_centroid:
1406 op = nir_intrinsic_interp_deref_at_centroid;
1407 break;
1408 case ir_binop_interpolate_at_offset:
1409 op = nir_intrinsic_interp_deref_at_offset;
1410 break;
1411 case ir_binop_interpolate_at_sample:
1412 op = nir_intrinsic_interp_deref_at_sample;
1413 break;
1414 default:
1415 unreachable("Invalid interpolation intrinsic");
1416 }
1417 } else {
1418 /* This case can happen if the vertex shader does not write the
1419 * given varying. In this case, the linker will lower it to a
1420 * global variable. Since interpolating a variable makes no
1421 * sense, we'll just turn it into a load which will probably
1422 * eventually end up as an SSA definition.
1423 */
1424 assert(this->deref->mode == nir_var_global);
1425 op = nir_intrinsic_load_deref;
1426 }
1427
1428 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1429 intrin->num_components = deref->type->vector_elements;
1430 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1431
1432 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1433 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1434 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1435
1436 unsigned bit_size = glsl_get_bit_size(deref->type);
1437 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1438
1439 if (swizzle) {
1440 unsigned swiz[4] = {
1441 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1442 };
1443
1444 result = nir_swizzle(&b, result, swiz,
1445 swizzle->type->vector_elements, false);
1446 }
1447
1448 return;
1449 }
1450
1451 default:
1452 break;
1453 }
1454
1455 nir_ssa_def *srcs[4];
1456 for (unsigned i = 0; i < ir->num_operands; i++)
1457 srcs[i] = evaluate_rvalue(ir->operands[i]);
1458
1459 glsl_base_type types[4];
1460 for (unsigned i = 0; i < ir->num_operands; i++)
1461 if (supports_ints)
1462 types[i] = ir->operands[i]->type->base_type;
1463 else
1464 types[i] = GLSL_TYPE_FLOAT;
1465
1466 glsl_base_type out_type;
1467 if (supports_ints)
1468 out_type = ir->type->base_type;
1469 else
1470 out_type = GLSL_TYPE_FLOAT;
1471
1472 switch (ir->operation) {
1473 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1474 case ir_unop_logic_not:
1475 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1476 break;
1477 case ir_unop_neg:
1478 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1479 : nir_ineg(&b, srcs[0]);
1480 break;
1481 case ir_unop_abs:
1482 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1483 : nir_iabs(&b, srcs[0]);
1484 break;
1485 case ir_unop_saturate:
1486 assert(type_is_float(types[0]));
1487 result = nir_fsat(&b, srcs[0]);
1488 break;
1489 case ir_unop_sign:
1490 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1491 : nir_isign(&b, srcs[0]);
1492 break;
1493 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1494 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1495 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1496 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1497 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1498 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1499 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1500 case ir_unop_i2f:
1501 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1502 break;
1503 case ir_unop_u2f:
1504 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1505 break;
1506 case ir_unop_b2f:
1507 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1508 break;
1509 case ir_unop_f2i:
1510 case ir_unop_f2u:
1511 case ir_unop_f2b:
1512 case ir_unop_i2b:
1513 case ir_unop_b2i:
1514 case ir_unop_b2i64:
1515 case ir_unop_d2f:
1516 case ir_unop_f2d:
1517 case ir_unop_d2i:
1518 case ir_unop_d2u:
1519 case ir_unop_d2b:
1520 case ir_unop_i2d:
1521 case ir_unop_u2d:
1522 case ir_unop_i642i:
1523 case ir_unop_i642u:
1524 case ir_unop_i642f:
1525 case ir_unop_i642b:
1526 case ir_unop_i642d:
1527 case ir_unop_u642i:
1528 case ir_unop_u642u:
1529 case ir_unop_u642f:
1530 case ir_unop_u642d:
1531 case ir_unop_i2i64:
1532 case ir_unop_u2i64:
1533 case ir_unop_f2i64:
1534 case ir_unop_d2i64:
1535 case ir_unop_i2u64:
1536 case ir_unop_u2u64:
1537 case ir_unop_f2u64:
1538 case ir_unop_d2u64:
1539 case ir_unop_i2u:
1540 case ir_unop_u2i:
1541 case ir_unop_i642u64:
1542 case ir_unop_u642i64: {
1543 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1544 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1545 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1546 nir_rounding_mode_undef),
1547 srcs[0], NULL, NULL, NULL);
1548 /* b2i and b2f don't have fixed bit-size versions so the builder will
1549 * just assume 32 and we have to fix it up here.
1550 */
1551 result->bit_size = nir_alu_type_get_type_size(dst_type);
1552 break;
1553 }
1554
1555 case ir_unop_bitcast_i2f:
1556 case ir_unop_bitcast_f2i:
1557 case ir_unop_bitcast_u2f:
1558 case ir_unop_bitcast_f2u:
1559 case ir_unop_bitcast_i642d:
1560 case ir_unop_bitcast_d2i64:
1561 case ir_unop_bitcast_u642d:
1562 case ir_unop_bitcast_d2u64:
1563 case ir_unop_subroutine_to_int:
1564 /* no-op */
1565 result = nir_imov(&b, srcs[0]);
1566 break;
1567 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1568 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1569 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1570 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1571 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1572 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1573 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1574 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1575 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1576 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1577 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1578 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1579 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1580 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1581 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1582 case ir_unop_pack_snorm_2x16:
1583 result = nir_pack_snorm_2x16(&b, srcs[0]);
1584 break;
1585 case ir_unop_pack_snorm_4x8:
1586 result = nir_pack_snorm_4x8(&b, srcs[0]);
1587 break;
1588 case ir_unop_pack_unorm_2x16:
1589 result = nir_pack_unorm_2x16(&b, srcs[0]);
1590 break;
1591 case ir_unop_pack_unorm_4x8:
1592 result = nir_pack_unorm_4x8(&b, srcs[0]);
1593 break;
1594 case ir_unop_pack_half_2x16:
1595 result = nir_pack_half_2x16(&b, srcs[0]);
1596 break;
1597 case ir_unop_unpack_snorm_2x16:
1598 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1599 break;
1600 case ir_unop_unpack_snorm_4x8:
1601 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1602 break;
1603 case ir_unop_unpack_unorm_2x16:
1604 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1605 break;
1606 case ir_unop_unpack_unorm_4x8:
1607 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1608 break;
1609 case ir_unop_unpack_half_2x16:
1610 result = nir_unpack_half_2x16(&b, srcs[0]);
1611 break;
1612 case ir_unop_pack_sampler_2x32:
1613 case ir_unop_pack_image_2x32:
1614 case ir_unop_pack_double_2x32:
1615 case ir_unop_pack_int_2x32:
1616 case ir_unop_pack_uint_2x32:
1617 result = nir_pack_64_2x32(&b, srcs[0]);
1618 break;
1619 case ir_unop_unpack_sampler_2x32:
1620 case ir_unop_unpack_image_2x32:
1621 case ir_unop_unpack_double_2x32:
1622 case ir_unop_unpack_int_2x32:
1623 case ir_unop_unpack_uint_2x32:
1624 result = nir_unpack_64_2x32(&b, srcs[0]);
1625 break;
1626 case ir_unop_bitfield_reverse:
1627 result = nir_bitfield_reverse(&b, srcs[0]);
1628 break;
1629 case ir_unop_bit_count:
1630 result = nir_bit_count(&b, srcs[0]);
1631 break;
1632 case ir_unop_find_msb:
1633 switch (types[0]) {
1634 case GLSL_TYPE_UINT:
1635 result = nir_ufind_msb(&b, srcs[0]);
1636 break;
1637 case GLSL_TYPE_INT:
1638 result = nir_ifind_msb(&b, srcs[0]);
1639 break;
1640 default:
1641 unreachable("Invalid type for findMSB()");
1642 }
1643 break;
1644 case ir_unop_find_lsb:
1645 result = nir_find_lsb(&b, srcs[0]);
1646 break;
1647
1648 case ir_unop_noise:
1649 switch (ir->type->vector_elements) {
1650 case 1:
1651 switch (ir->operands[0]->type->vector_elements) {
1652 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1653 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1654 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1655 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1656 default: unreachable("not reached");
1657 }
1658 break;
1659 case 2:
1660 switch (ir->operands[0]->type->vector_elements) {
1661 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1662 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1663 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1664 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1665 default: unreachable("not reached");
1666 }
1667 break;
1668 case 3:
1669 switch (ir->operands[0]->type->vector_elements) {
1670 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1671 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1672 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1673 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1674 default: unreachable("not reached");
1675 }
1676 break;
1677 case 4:
1678 switch (ir->operands[0]->type->vector_elements) {
1679 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1680 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1681 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1682 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1683 default: unreachable("not reached");
1684 }
1685 break;
1686 default:
1687 unreachable("not reached");
1688 }
1689 break;
1690 case ir_unop_get_buffer_size: {
1691 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1692 this->shader,
1693 nir_intrinsic_get_buffer_size);
1694 load->num_components = ir->type->vector_elements;
1695 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1696 unsigned bit_size = glsl_get_bit_size(ir->type);
1697 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1698 return;
1699 }
1700
1701 case ir_binop_add:
1702 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1703 : nir_iadd(&b, srcs[0], srcs[1]);
1704 break;
1705 case ir_binop_sub:
1706 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1707 : nir_isub(&b, srcs[0], srcs[1]);
1708 break;
1709 case ir_binop_mul:
1710 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1711 : nir_imul(&b, srcs[0], srcs[1]);
1712 break;
1713 case ir_binop_div:
1714 if (type_is_float(out_type))
1715 result = nir_fdiv(&b, srcs[0], srcs[1]);
1716 else if (type_is_signed(out_type))
1717 result = nir_idiv(&b, srcs[0], srcs[1]);
1718 else
1719 result = nir_udiv(&b, srcs[0], srcs[1]);
1720 break;
1721 case ir_binop_mod:
1722 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1723 : nir_umod(&b, srcs[0], srcs[1]);
1724 break;
1725 case ir_binop_min:
1726 if (type_is_float(out_type))
1727 result = nir_fmin(&b, srcs[0], srcs[1]);
1728 else if (type_is_signed(out_type))
1729 result = nir_imin(&b, srcs[0], srcs[1]);
1730 else
1731 result = nir_umin(&b, srcs[0], srcs[1]);
1732 break;
1733 case ir_binop_max:
1734 if (type_is_float(out_type))
1735 result = nir_fmax(&b, srcs[0], srcs[1]);
1736 else if (type_is_signed(out_type))
1737 result = nir_imax(&b, srcs[0], srcs[1]);
1738 else
1739 result = nir_umax(&b, srcs[0], srcs[1]);
1740 break;
1741 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1742 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1743 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1744 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1745 case ir_binop_logic_and:
1746 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1747 : nir_fand(&b, srcs[0], srcs[1]);
1748 break;
1749 case ir_binop_logic_or:
1750 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1751 : nir_for(&b, srcs[0], srcs[1]);
1752 break;
1753 case ir_binop_logic_xor:
1754 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1755 : nir_fxor(&b, srcs[0], srcs[1]);
1756 break;
1757 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1758 case ir_binop_rshift:
1759 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1760 : nir_ushr(&b, srcs[0], srcs[1]);
1761 break;
1762 case ir_binop_imul_high:
1763 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1764 : nir_umul_high(&b, srcs[0], srcs[1]);
1765 break;
1766 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1767 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1768 case ir_binop_less:
1769 if (supports_ints) {
1770 if (type_is_float(types[0]))
1771 result = nir_flt(&b, srcs[0], srcs[1]);
1772 else if (type_is_signed(types[0]))
1773 result = nir_ilt(&b, srcs[0], srcs[1]);
1774 else
1775 result = nir_ult(&b, srcs[0], srcs[1]);
1776 } else {
1777 result = nir_slt(&b, srcs[0], srcs[1]);
1778 }
1779 break;
1780 case ir_binop_gequal:
1781 if (supports_ints) {
1782 if (type_is_float(types[0]))
1783 result = nir_fge(&b, srcs[0], srcs[1]);
1784 else if (type_is_signed(types[0]))
1785 result = nir_ige(&b, srcs[0], srcs[1]);
1786 else
1787 result = nir_uge(&b, srcs[0], srcs[1]);
1788 } else {
1789 result = nir_sge(&b, srcs[0], srcs[1]);
1790 }
1791 break;
1792 case ir_binop_equal:
1793 if (supports_ints) {
1794 if (type_is_float(types[0]))
1795 result = nir_feq(&b, srcs[0], srcs[1]);
1796 else
1797 result = nir_ieq(&b, srcs[0], srcs[1]);
1798 } else {
1799 result = nir_seq(&b, srcs[0], srcs[1]);
1800 }
1801 break;
1802 case ir_binop_nequal:
1803 if (supports_ints) {
1804 if (type_is_float(types[0]))
1805 result = nir_fne(&b, srcs[0], srcs[1]);
1806 else
1807 result = nir_ine(&b, srcs[0], srcs[1]);
1808 } else {
1809 result = nir_sne(&b, srcs[0], srcs[1]);
1810 }
1811 break;
1812 case ir_binop_all_equal:
1813 if (supports_ints) {
1814 if (type_is_float(types[0])) {
1815 switch (ir->operands[0]->type->vector_elements) {
1816 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1817 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1818 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1819 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1820 default:
1821 unreachable("not reached");
1822 }
1823 } else {
1824 switch (ir->operands[0]->type->vector_elements) {
1825 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1826 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1827 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1828 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1829 default:
1830 unreachable("not reached");
1831 }
1832 }
1833 } else {
1834 switch (ir->operands[0]->type->vector_elements) {
1835 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1836 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1837 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1838 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1839 default:
1840 unreachable("not reached");
1841 }
1842 }
1843 break;
1844 case ir_binop_any_nequal:
1845 if (supports_ints) {
1846 if (type_is_float(types[0])) {
1847 switch (ir->operands[0]->type->vector_elements) {
1848 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1849 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1850 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1851 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1852 default:
1853 unreachable("not reached");
1854 }
1855 } else {
1856 switch (ir->operands[0]->type->vector_elements) {
1857 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1858 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1859 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1860 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1861 default:
1862 unreachable("not reached");
1863 }
1864 }
1865 } else {
1866 switch (ir->operands[0]->type->vector_elements) {
1867 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1868 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1869 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1870 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1871 default:
1872 unreachable("not reached");
1873 }
1874 }
1875 break;
1876 case ir_binop_dot:
1877 switch (ir->operands[0]->type->vector_elements) {
1878 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1879 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1880 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1881 default:
1882 unreachable("not reached");
1883 }
1884 break;
1885 case ir_binop_vector_extract: {
1886 result = nir_channel(&b, srcs[0], 0);
1887 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
1888 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
1889 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
1890 swizzled, result);
1891 }
1892 break;
1893 }
1894
1895 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1896 case ir_triop_fma:
1897 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1898 break;
1899 case ir_triop_lrp:
1900 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1901 break;
1902 case ir_triop_csel:
1903 if (supports_ints)
1904 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1905 else
1906 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1907 break;
1908 case ir_triop_bitfield_extract:
1909 result = (out_type == GLSL_TYPE_INT) ?
1910 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1911 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1912 break;
1913 case ir_quadop_bitfield_insert:
1914 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1915 break;
1916 case ir_quadop_vector:
1917 result = nir_vec(&b, srcs, ir->type->vector_elements);
1918 break;
1919
1920 default:
1921 unreachable("not reached");
1922 }
1923 }
1924
1925 void
1926 nir_visitor::visit(ir_swizzle *ir)
1927 {
1928 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1929 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1930 ir->type->vector_elements, !supports_ints);
1931 }
1932
1933 void
1934 nir_visitor::visit(ir_texture *ir)
1935 {
1936 unsigned num_srcs;
1937 nir_texop op;
1938 switch (ir->op) {
1939 case ir_tex:
1940 op = nir_texop_tex;
1941 num_srcs = 1; /* coordinate */
1942 break;
1943
1944 case ir_txb:
1945 case ir_txl:
1946 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1947 num_srcs = 2; /* coordinate, bias/lod */
1948 break;
1949
1950 case ir_txd:
1951 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1952 num_srcs = 3;
1953 break;
1954
1955 case ir_txf:
1956 op = nir_texop_txf;
1957 if (ir->lod_info.lod != NULL)
1958 num_srcs = 2; /* coordinate, lod */
1959 else
1960 num_srcs = 1; /* coordinate */
1961 break;
1962
1963 case ir_txf_ms:
1964 op = nir_texop_txf_ms;
1965 num_srcs = 2; /* coordinate, sample_index */
1966 break;
1967
1968 case ir_txs:
1969 op = nir_texop_txs;
1970 if (ir->lod_info.lod != NULL)
1971 num_srcs = 1; /* lod */
1972 else
1973 num_srcs = 0;
1974 break;
1975
1976 case ir_lod:
1977 op = nir_texop_lod;
1978 num_srcs = 1; /* coordinate */
1979 break;
1980
1981 case ir_tg4:
1982 op = nir_texop_tg4;
1983 num_srcs = 1; /* coordinate */
1984 break;
1985
1986 case ir_query_levels:
1987 op = nir_texop_query_levels;
1988 num_srcs = 0;
1989 break;
1990
1991 case ir_texture_samples:
1992 op = nir_texop_texture_samples;
1993 num_srcs = 0;
1994 break;
1995
1996 case ir_samples_identical:
1997 op = nir_texop_samples_identical;
1998 num_srcs = 1; /* coordinate */
1999 break;
2000
2001 default:
2002 unreachable("not reached");
2003 }
2004
2005 if (ir->projector != NULL)
2006 num_srcs++;
2007 if (ir->shadow_comparator != NULL)
2008 num_srcs++;
2009 if (ir->offset != NULL)
2010 num_srcs++;
2011
2012 /* Add one for the texture deref */
2013 num_srcs += 2;
2014
2015 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2016
2017 instr->op = op;
2018 instr->sampler_dim =
2019 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2020 instr->is_array = ir->sampler->type->sampler_array;
2021 instr->is_shadow = ir->sampler->type->sampler_shadow;
2022 if (instr->is_shadow)
2023 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2024 switch (ir->type->base_type) {
2025 case GLSL_TYPE_FLOAT:
2026 instr->dest_type = nir_type_float;
2027 break;
2028 case GLSL_TYPE_INT:
2029 instr->dest_type = nir_type_int;
2030 break;
2031 case GLSL_TYPE_BOOL:
2032 case GLSL_TYPE_UINT:
2033 instr->dest_type = nir_type_uint;
2034 break;
2035 default:
2036 unreachable("not reached");
2037 }
2038
2039 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2040 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2041 instr->src[0].src_type = nir_tex_src_texture_deref;
2042 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2043 instr->src[1].src_type = nir_tex_src_sampler_deref;
2044
2045 unsigned src_number = 2;
2046
2047 if (ir->coordinate != NULL) {
2048 instr->coord_components = ir->coordinate->type->vector_elements;
2049 instr->src[src_number].src =
2050 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2051 instr->src[src_number].src_type = nir_tex_src_coord;
2052 src_number++;
2053 }
2054
2055 if (ir->projector != NULL) {
2056 instr->src[src_number].src =
2057 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2058 instr->src[src_number].src_type = nir_tex_src_projector;
2059 src_number++;
2060 }
2061
2062 if (ir->shadow_comparator != NULL) {
2063 instr->src[src_number].src =
2064 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2065 instr->src[src_number].src_type = nir_tex_src_comparator;
2066 src_number++;
2067 }
2068
2069 if (ir->offset != NULL) {
2070 /* we don't support multiple offsets yet */
2071 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2072
2073 instr->src[src_number].src =
2074 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2075 instr->src[src_number].src_type = nir_tex_src_offset;
2076 src_number++;
2077 }
2078
2079 switch (ir->op) {
2080 case ir_txb:
2081 instr->src[src_number].src =
2082 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2083 instr->src[src_number].src_type = nir_tex_src_bias;
2084 src_number++;
2085 break;
2086
2087 case ir_txl:
2088 case ir_txf:
2089 case ir_txs:
2090 if (ir->lod_info.lod != NULL) {
2091 instr->src[src_number].src =
2092 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2093 instr->src[src_number].src_type = nir_tex_src_lod;
2094 src_number++;
2095 }
2096 break;
2097
2098 case ir_txd:
2099 instr->src[src_number].src =
2100 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2101 instr->src[src_number].src_type = nir_tex_src_ddx;
2102 src_number++;
2103 instr->src[src_number].src =
2104 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2105 instr->src[src_number].src_type = nir_tex_src_ddy;
2106 src_number++;
2107 break;
2108
2109 case ir_txf_ms:
2110 instr->src[src_number].src =
2111 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2112 instr->src[src_number].src_type = nir_tex_src_ms_index;
2113 src_number++;
2114 break;
2115
2116 case ir_tg4:
2117 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2118 break;
2119
2120 default:
2121 break;
2122 }
2123
2124 assert(src_number == num_srcs);
2125
2126 unsigned bit_size = glsl_get_bit_size(ir->type);
2127 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2128 }
2129
2130 void
2131 nir_visitor::visit(ir_constant *ir)
2132 {
2133 /*
2134 * We don't know if this variable is an array or struct that gets
2135 * dereferenced, so do the safe thing an make it a variable with a
2136 * constant initializer and return a dereference.
2137 */
2138
2139 nir_variable *var =
2140 nir_local_variable_create(this->impl, ir->type, "const_temp");
2141 var->data.read_only = true;
2142 var->constant_initializer = constant_copy(ir, var);
2143
2144 this->deref = nir_build_deref_var(&b, var);
2145 }
2146
2147 void
2148 nir_visitor::visit(ir_dereference_variable *ir)
2149 {
2150 struct hash_entry *entry =
2151 _mesa_hash_table_search(this->var_table, ir->var);
2152 assert(entry);
2153 nir_variable *var = (nir_variable *) entry->data;
2154
2155 this->deref = nir_build_deref_var(&b, var);
2156 }
2157
2158 void
2159 nir_visitor::visit(ir_dereference_record *ir)
2160 {
2161 ir->record->accept(this);
2162
2163 int field_index = ir->field_idx;
2164 assert(field_index >= 0);
2165
2166 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2167 }
2168
2169 void
2170 nir_visitor::visit(ir_dereference_array *ir)
2171 {
2172 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2173
2174 ir->array->accept(this);
2175
2176 this->deref = nir_build_deref_array(&b, this->deref, index);
2177 }
2178
2179 void
2180 nir_visitor::visit(ir_barrier *)
2181 {
2182 nir_intrinsic_instr *instr =
2183 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2184 nir_builder_instr_insert(&b, &instr->instr);
2185 }