glsl/nir: Only claim to handle intrinsic functions
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36
37 /*
38 * pass to lower GLSL IR to NIR
39 *
40 * This will lower variable dereferences to loads/stores of corresponding
41 * variables in NIR - the variables will be converted to registers in a later
42 * pass.
43 */
44
45 namespace {
46
47 class nir_visitor : public ir_visitor
48 {
49 public:
50 nir_visitor(nir_shader *shader);
51 ~nir_visitor();
52
53 virtual void visit(ir_variable *);
54 virtual void visit(ir_function *);
55 virtual void visit(ir_function_signature *);
56 virtual void visit(ir_loop *);
57 virtual void visit(ir_if *);
58 virtual void visit(ir_discard *);
59 virtual void visit(ir_loop_jump *);
60 virtual void visit(ir_return *);
61 virtual void visit(ir_call *);
62 virtual void visit(ir_assignment *);
63 virtual void visit(ir_emit_vertex *);
64 virtual void visit(ir_end_primitive *);
65 virtual void visit(ir_expression *);
66 virtual void visit(ir_swizzle *);
67 virtual void visit(ir_texture *);
68 virtual void visit(ir_constant *);
69 virtual void visit(ir_dereference_variable *);
70 virtual void visit(ir_dereference_record *);
71 virtual void visit(ir_dereference_array *);
72 virtual void visit(ir_barrier *);
73
74 void create_function(ir_function_signature *ir);
75
76 private:
77 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
78 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
79
80 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
83 nir_ssa_def *src2);
84 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
85 nir_ssa_def *src2, nir_ssa_def *src3);
86
87 bool supports_ints;
88
89 nir_shader *shader;
90 nir_function_impl *impl;
91 nir_builder b;
92 nir_ssa_def *result; /* result of the expression tree last visited */
93
94 nir_deref_var *evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir);
95
96 /* the head of the dereference chain we're creating */
97 nir_deref_var *deref_head;
98 /* the tail of the dereference chain we're creating */
99 nir_deref *deref_tail;
100
101 nir_variable *var; /* variable created by ir_variable visitor */
102
103 /* whether the IR we're operating on is per-function or global */
104 bool is_global;
105
106 /* map of ir_variable -> nir_variable */
107 struct hash_table *var_table;
108
109 /* map of ir_function_signature -> nir_function_overload */
110 struct hash_table *overload_table;
111 };
112
113 /*
114 * This visitor runs before the main visitor, calling create_function() for
115 * each function so that the main visitor can resolve forward references in
116 * calls.
117 */
118
119 class nir_function_visitor : public ir_hierarchical_visitor
120 {
121 public:
122 nir_function_visitor(nir_visitor *v) : visitor(v)
123 {
124 }
125 virtual ir_visitor_status visit_enter(ir_function *);
126
127 private:
128 nir_visitor *visitor;
129 };
130
131 } /* end of anonymous namespace */
132
133 static void
134 nir_remap_attributes(nir_shader *shader,
135 const nir_shader_compiler_options *options)
136 {
137 if (options->vs_inputs_dual_locations) {
138 nir_foreach_variable(var, &shader->inputs) {
139 var->data.location +=
140 _mesa_bitcount_64(shader->info.vs.double_inputs &
141 BITFIELD64_MASK(var->data.location));
142 }
143 }
144
145 /* Once the remap is done, reset double_inputs_read, so later it will have
146 * which location/slots are doubles */
147 shader->info.vs.double_inputs = 0;
148 }
149
150 nir_shader *
151 glsl_to_nir(const struct gl_shader_program *shader_prog,
152 gl_shader_stage stage,
153 const nir_shader_compiler_options *options)
154 {
155 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
156
157 nir_shader *shader = nir_shader_create(NULL, stage, options,
158 &sh->Program->info);
159
160 nir_visitor v1(shader);
161 nir_function_visitor v2(&v1);
162 v2.run(sh->ir);
163 visit_exec_list(sh->ir, &v1);
164
165 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
166
167 /* Remap the locations to slots so those requiring two slots will occupy
168 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
169 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
170 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
171 if (shader->info.stage == MESA_SHADER_VERTEX)
172 nir_remap_attributes(shader, options);
173
174 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
175 if (shader_prog->Label)
176 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
177
178 /* Check for transform feedback varyings specified via the API */
179 shader->info.has_transform_feedback_varyings =
180 shader_prog->TransformFeedback.NumVarying > 0;
181
182 /* Check for transform feedback varyings specified in the Shader */
183 if (shader_prog->last_vert_prog)
184 shader->info.has_transform_feedback_varyings |=
185 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
186
187 return shader;
188 }
189
190 nir_visitor::nir_visitor(nir_shader *shader)
191 {
192 this->supports_ints = shader->options->native_integers;
193 this->shader = shader;
194 this->is_global = true;
195 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
196 _mesa_key_pointer_equal);
197 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
198 _mesa_key_pointer_equal);
199 this->result = NULL;
200 this->impl = NULL;
201 this->var = NULL;
202 this->deref_head = NULL;
203 this->deref_tail = NULL;
204 memset(&this->b, 0, sizeof(this->b));
205 }
206
207 nir_visitor::~nir_visitor()
208 {
209 _mesa_hash_table_destroy(this->var_table, NULL);
210 _mesa_hash_table_destroy(this->overload_table, NULL);
211 }
212
213 nir_deref_var *
214 nir_visitor::evaluate_deref(nir_instr *mem_ctx, ir_instruction *ir)
215 {
216 ir->accept(this);
217 ralloc_steal(mem_ctx, this->deref_head);
218 return this->deref_head;
219 }
220
221 static nir_constant *
222 constant_copy(ir_constant *ir, void *mem_ctx)
223 {
224 if (ir == NULL)
225 return NULL;
226
227 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
228
229 const unsigned rows = ir->type->vector_elements;
230 const unsigned cols = ir->type->matrix_columns;
231 unsigned i;
232
233 ret->num_elements = 0;
234 switch (ir->type->base_type) {
235 case GLSL_TYPE_UINT:
236 /* Only float base types can be matrices. */
237 assert(cols == 1);
238
239 for (unsigned r = 0; r < rows; r++)
240 ret->values[0].u32[r] = ir->value.u[r];
241
242 break;
243
244 case GLSL_TYPE_INT:
245 /* Only float base types can be matrices. */
246 assert(cols == 1);
247
248 for (unsigned r = 0; r < rows; r++)
249 ret->values[0].i32[r] = ir->value.i[r];
250
251 break;
252
253 case GLSL_TYPE_FLOAT:
254 for (unsigned c = 0; c < cols; c++) {
255 for (unsigned r = 0; r < rows; r++)
256 ret->values[c].f32[r] = ir->value.f[c * rows + r];
257 }
258 break;
259
260 case GLSL_TYPE_DOUBLE:
261 for (unsigned c = 0; c < cols; c++) {
262 for (unsigned r = 0; r < rows; r++)
263 ret->values[c].f64[r] = ir->value.d[c * rows + r];
264 }
265 break;
266
267 case GLSL_TYPE_UINT64:
268 /* Only float base types can be matrices. */
269 assert(cols == 1);
270
271 for (unsigned r = 0; r < rows; r++)
272 ret->values[0].u64[r] = ir->value.u64[r];
273 break;
274
275 case GLSL_TYPE_INT64:
276 /* Only float base types can be matrices. */
277 assert(cols == 1);
278
279 for (unsigned r = 0; r < rows; r++)
280 ret->values[0].i64[r] = ir->value.i64[r];
281 break;
282
283 case GLSL_TYPE_BOOL:
284 /* Only float base types can be matrices. */
285 assert(cols == 1);
286
287 for (unsigned r = 0; r < rows; r++)
288 ret->values[0].u32[r] = ir->value.b[r] ? NIR_TRUE : NIR_FALSE;
289
290 break;
291
292 case GLSL_TYPE_STRUCT:
293 case GLSL_TYPE_ARRAY:
294 ret->elements = ralloc_array(mem_ctx, nir_constant *,
295 ir->type->length);
296 ret->num_elements = ir->type->length;
297
298 for (i = 0; i < ir->type->length; i++)
299 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
300 break;
301
302 default:
303 unreachable("not reached");
304 }
305
306 return ret;
307 }
308
309 void
310 nir_visitor::visit(ir_variable *ir)
311 {
312 /* TODO: In future we should switch to using the NIR lowering pass but for
313 * now just ignore these variables as GLSL IR should have lowered them.
314 * Anything remaining are just dead vars that weren't cleaned up.
315 */
316 if (ir->data.mode == ir_var_shader_shared)
317 return;
318
319 nir_variable *var = rzalloc(shader, nir_variable);
320 var->type = ir->type;
321 var->name = ralloc_strdup(var, ir->name);
322
323 var->data.always_active_io = ir->data.always_active_io;
324 var->data.read_only = ir->data.read_only;
325 var->data.centroid = ir->data.centroid;
326 var->data.sample = ir->data.sample;
327 var->data.patch = ir->data.patch;
328 var->data.invariant = ir->data.invariant;
329 var->data.location = ir->data.location;
330 var->data.stream = ir->data.stream;
331 var->data.compact = false;
332
333 switch(ir->data.mode) {
334 case ir_var_auto:
335 case ir_var_temporary:
336 if (is_global)
337 var->data.mode = nir_var_global;
338 else
339 var->data.mode = nir_var_local;
340 break;
341
342 case ir_var_function_in:
343 case ir_var_function_out:
344 case ir_var_function_inout:
345 case ir_var_const_in:
346 var->data.mode = nir_var_local;
347 break;
348
349 case ir_var_shader_in:
350 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
351 ir->data.location == VARYING_SLOT_FACE) {
352 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
353 var->data.location = SYSTEM_VALUE_FRONT_FACE;
354 var->data.mode = nir_var_system_value;
355 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
356 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
357 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
358 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
359 var->data.mode = nir_var_system_value;
360 } else {
361 var->data.mode = nir_var_shader_in;
362
363 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
364 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
365 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
366 var->data.compact = ir->type->without_array()->is_scalar();
367 }
368 }
369
370 /* Mark all the locations that require two slots */
371 if (shader->info.stage == MESA_SHADER_VERTEX &&
372 glsl_type_is_dual_slot(glsl_without_array(var->type))) {
373 for (unsigned i = 0; i < glsl_count_attribute_slots(var->type, true); i++) {
374 uint64_t bitfield = BITFIELD64_BIT(var->data.location + i);
375 shader->info.vs.double_inputs |= bitfield;
376 }
377 }
378 break;
379
380 case ir_var_shader_out:
381 var->data.mode = nir_var_shader_out;
382 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
383 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
384 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
385 var->data.compact = ir->type->without_array()->is_scalar();
386 }
387 break;
388
389 case ir_var_uniform:
390 var->data.mode = nir_var_uniform;
391 break;
392
393 case ir_var_shader_storage:
394 var->data.mode = nir_var_shader_storage;
395 break;
396
397 case ir_var_system_value:
398 var->data.mode = nir_var_system_value;
399 break;
400
401 default:
402 unreachable("not reached");
403 }
404
405 var->data.interpolation = ir->data.interpolation;
406 var->data.origin_upper_left = ir->data.origin_upper_left;
407 var->data.pixel_center_integer = ir->data.pixel_center_integer;
408 var->data.location_frac = ir->data.location_frac;
409
410 if (var->data.pixel_center_integer) {
411 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
412 shader->info.fs.pixel_center_integer = true;
413 }
414
415 switch (ir->data.depth_layout) {
416 case ir_depth_layout_none:
417 var->data.depth_layout = nir_depth_layout_none;
418 break;
419 case ir_depth_layout_any:
420 var->data.depth_layout = nir_depth_layout_any;
421 break;
422 case ir_depth_layout_greater:
423 var->data.depth_layout = nir_depth_layout_greater;
424 break;
425 case ir_depth_layout_less:
426 var->data.depth_layout = nir_depth_layout_less;
427 break;
428 case ir_depth_layout_unchanged:
429 var->data.depth_layout = nir_depth_layout_unchanged;
430 break;
431 default:
432 unreachable("not reached");
433 }
434
435 var->data.index = ir->data.index;
436 var->data.descriptor_set = 0;
437 var->data.binding = ir->data.binding;
438 var->data.explicit_binding = ir->data.explicit_binding;
439 var->data.bindless = ir->data.bindless;
440 var->data.offset = ir->data.offset;
441 var->data.image.read_only = ir->data.memory_read_only;
442 var->data.image.write_only = ir->data.memory_write_only;
443 var->data.image.coherent = ir->data.memory_coherent;
444 var->data.image._volatile = ir->data.memory_volatile;
445 var->data.image.restrict_flag = ir->data.memory_restrict;
446 var->data.image.format = ir->data.image_format;
447 var->data.fb_fetch_output = ir->data.fb_fetch_output;
448
449 var->num_state_slots = ir->get_num_state_slots();
450 if (var->num_state_slots > 0) {
451 var->state_slots = rzalloc_array(var, nir_state_slot,
452 var->num_state_slots);
453
454 ir_state_slot *state_slots = ir->get_state_slots();
455 for (unsigned i = 0; i < var->num_state_slots; i++) {
456 for (unsigned j = 0; j < 5; j++)
457 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
458 var->state_slots[i].swizzle = state_slots[i].swizzle;
459 }
460 } else {
461 var->state_slots = NULL;
462 }
463
464 var->constant_initializer = constant_copy(ir->constant_initializer, var);
465
466 var->interface_type = ir->get_interface_type();
467
468 if (var->data.mode == nir_var_local)
469 nir_function_impl_add_variable(impl, var);
470 else
471 nir_shader_add_variable(shader, var);
472
473 _mesa_hash_table_insert(var_table, ir, var);
474 this->var = var;
475 }
476
477 ir_visitor_status
478 nir_function_visitor::visit_enter(ir_function *ir)
479 {
480 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
481 visitor->create_function(sig);
482 }
483 return visit_continue_with_parent;
484 }
485
486 void
487 nir_visitor::create_function(ir_function_signature *ir)
488 {
489 if (ir->is_intrinsic())
490 return;
491
492 nir_function *func = nir_function_create(shader, ir->function_name());
493
494 assert(ir->parameters.is_empty());
495 assert(ir->return_type == glsl_type::void_type);
496
497 _mesa_hash_table_insert(this->overload_table, ir, func);
498 }
499
500 void
501 nir_visitor::visit(ir_function *ir)
502 {
503 foreach_in_list(ir_function_signature, sig, &ir->signatures)
504 sig->accept(this);
505 }
506
507 void
508 nir_visitor::visit(ir_function_signature *ir)
509 {
510 if (ir->is_intrinsic())
511 return;
512
513 struct hash_entry *entry =
514 _mesa_hash_table_search(this->overload_table, ir);
515
516 assert(entry);
517 nir_function *func = (nir_function *) entry->data;
518
519 if (ir->is_defined) {
520 nir_function_impl *impl = nir_function_impl_create(func);
521 this->impl = impl;
522
523 assert(strcmp(func->name, "main") == 0);
524 assert(ir->parameters.is_empty());
525 assert(func->return_type == glsl_type::void_type);
526
527 this->is_global = false;
528
529 nir_builder_init(&b, impl);
530 b.cursor = nir_after_cf_list(&impl->body);
531 visit_exec_list(&ir->body, this);
532
533 this->is_global = true;
534 } else {
535 func->impl = NULL;
536 }
537 }
538
539 void
540 nir_visitor::visit(ir_loop *ir)
541 {
542 nir_push_loop(&b);
543 visit_exec_list(&ir->body_instructions, this);
544 nir_pop_loop(&b, NULL);
545 }
546
547 void
548 nir_visitor::visit(ir_if *ir)
549 {
550 nir_push_if(&b, evaluate_rvalue(ir->condition));
551 visit_exec_list(&ir->then_instructions, this);
552 nir_push_else(&b, NULL);
553 visit_exec_list(&ir->else_instructions, this);
554 nir_pop_if(&b, NULL);
555 }
556
557 void
558 nir_visitor::visit(ir_discard *ir)
559 {
560 /*
561 * discards aren't treated as control flow, because before we lower them
562 * they can appear anywhere in the shader and the stuff after them may still
563 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
564 * discards will be immediately followed by a return.
565 */
566
567 nir_intrinsic_instr *discard;
568 if (ir->condition) {
569 discard = nir_intrinsic_instr_create(this->shader,
570 nir_intrinsic_discard_if);
571 discard->src[0] =
572 nir_src_for_ssa(evaluate_rvalue(ir->condition));
573 } else {
574 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
575 }
576
577 nir_builder_instr_insert(&b, &discard->instr);
578 }
579
580 void
581 nir_visitor::visit(ir_emit_vertex *ir)
582 {
583 nir_intrinsic_instr *instr =
584 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
585 nir_intrinsic_set_stream_id(instr, ir->stream_id());
586 nir_builder_instr_insert(&b, &instr->instr);
587 }
588
589 void
590 nir_visitor::visit(ir_end_primitive *ir)
591 {
592 nir_intrinsic_instr *instr =
593 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
594 nir_intrinsic_set_stream_id(instr, ir->stream_id());
595 nir_builder_instr_insert(&b, &instr->instr);
596 }
597
598 void
599 nir_visitor::visit(ir_loop_jump *ir)
600 {
601 nir_jump_type type;
602 switch (ir->mode) {
603 case ir_loop_jump::jump_break:
604 type = nir_jump_break;
605 break;
606 case ir_loop_jump::jump_continue:
607 type = nir_jump_continue;
608 break;
609 default:
610 unreachable("not reached");
611 }
612
613 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
614 nir_builder_instr_insert(&b, &instr->instr);
615 }
616
617 void
618 nir_visitor::visit(ir_return *ir)
619 {
620 assert(ir->value == NULL);
621 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
622 nir_builder_instr_insert(&b, &instr->instr);
623 }
624
625 void
626 nir_visitor::visit(ir_call *ir)
627 {
628 if (ir->callee->is_intrinsic()) {
629 nir_intrinsic_op op;
630
631 switch (ir->callee->intrinsic_id) {
632 case ir_intrinsic_atomic_counter_read:
633 op = nir_intrinsic_atomic_counter_read_var;
634 break;
635 case ir_intrinsic_atomic_counter_increment:
636 op = nir_intrinsic_atomic_counter_inc_var;
637 break;
638 case ir_intrinsic_atomic_counter_predecrement:
639 op = nir_intrinsic_atomic_counter_dec_var;
640 break;
641 case ir_intrinsic_atomic_counter_add:
642 op = nir_intrinsic_atomic_counter_add_var;
643 break;
644 case ir_intrinsic_atomic_counter_and:
645 op = nir_intrinsic_atomic_counter_and_var;
646 break;
647 case ir_intrinsic_atomic_counter_or:
648 op = nir_intrinsic_atomic_counter_or_var;
649 break;
650 case ir_intrinsic_atomic_counter_xor:
651 op = nir_intrinsic_atomic_counter_xor_var;
652 break;
653 case ir_intrinsic_atomic_counter_min:
654 op = nir_intrinsic_atomic_counter_min_var;
655 break;
656 case ir_intrinsic_atomic_counter_max:
657 op = nir_intrinsic_atomic_counter_max_var;
658 break;
659 case ir_intrinsic_atomic_counter_exchange:
660 op = nir_intrinsic_atomic_counter_exchange_var;
661 break;
662 case ir_intrinsic_atomic_counter_comp_swap:
663 op = nir_intrinsic_atomic_counter_comp_swap_var;
664 break;
665 case ir_intrinsic_image_load:
666 op = nir_intrinsic_image_var_load;
667 break;
668 case ir_intrinsic_image_store:
669 op = nir_intrinsic_image_var_store;
670 break;
671 case ir_intrinsic_image_atomic_add:
672 op = nir_intrinsic_image_var_atomic_add;
673 break;
674 case ir_intrinsic_image_atomic_min:
675 op = nir_intrinsic_image_var_atomic_min;
676 break;
677 case ir_intrinsic_image_atomic_max:
678 op = nir_intrinsic_image_var_atomic_max;
679 break;
680 case ir_intrinsic_image_atomic_and:
681 op = nir_intrinsic_image_var_atomic_and;
682 break;
683 case ir_intrinsic_image_atomic_or:
684 op = nir_intrinsic_image_var_atomic_or;
685 break;
686 case ir_intrinsic_image_atomic_xor:
687 op = nir_intrinsic_image_var_atomic_xor;
688 break;
689 case ir_intrinsic_image_atomic_exchange:
690 op = nir_intrinsic_image_var_atomic_exchange;
691 break;
692 case ir_intrinsic_image_atomic_comp_swap:
693 op = nir_intrinsic_image_var_atomic_comp_swap;
694 break;
695 case ir_intrinsic_memory_barrier:
696 op = nir_intrinsic_memory_barrier;
697 break;
698 case ir_intrinsic_image_size:
699 op = nir_intrinsic_image_var_size;
700 break;
701 case ir_intrinsic_image_samples:
702 op = nir_intrinsic_image_var_samples;
703 break;
704 case ir_intrinsic_ssbo_store:
705 op = nir_intrinsic_store_ssbo;
706 break;
707 case ir_intrinsic_ssbo_load:
708 op = nir_intrinsic_load_ssbo;
709 break;
710 case ir_intrinsic_ssbo_atomic_add:
711 op = nir_intrinsic_ssbo_atomic_add;
712 break;
713 case ir_intrinsic_ssbo_atomic_and:
714 op = nir_intrinsic_ssbo_atomic_and;
715 break;
716 case ir_intrinsic_ssbo_atomic_or:
717 op = nir_intrinsic_ssbo_atomic_or;
718 break;
719 case ir_intrinsic_ssbo_atomic_xor:
720 op = nir_intrinsic_ssbo_atomic_xor;
721 break;
722 case ir_intrinsic_ssbo_atomic_min:
723 assert(ir->return_deref);
724 if (ir->return_deref->type == glsl_type::int_type)
725 op = nir_intrinsic_ssbo_atomic_imin;
726 else if (ir->return_deref->type == glsl_type::uint_type)
727 op = nir_intrinsic_ssbo_atomic_umin;
728 else
729 unreachable("Invalid type");
730 break;
731 case ir_intrinsic_ssbo_atomic_max:
732 assert(ir->return_deref);
733 if (ir->return_deref->type == glsl_type::int_type)
734 op = nir_intrinsic_ssbo_atomic_imax;
735 else if (ir->return_deref->type == glsl_type::uint_type)
736 op = nir_intrinsic_ssbo_atomic_umax;
737 else
738 unreachable("Invalid type");
739 break;
740 case ir_intrinsic_ssbo_atomic_exchange:
741 op = nir_intrinsic_ssbo_atomic_exchange;
742 break;
743 case ir_intrinsic_ssbo_atomic_comp_swap:
744 op = nir_intrinsic_ssbo_atomic_comp_swap;
745 break;
746 case ir_intrinsic_shader_clock:
747 op = nir_intrinsic_shader_clock;
748 break;
749 case ir_intrinsic_begin_invocation_interlock:
750 op = nir_intrinsic_begin_invocation_interlock;
751 break;
752 case ir_intrinsic_end_invocation_interlock:
753 op = nir_intrinsic_end_invocation_interlock;
754 break;
755 case ir_intrinsic_group_memory_barrier:
756 op = nir_intrinsic_group_memory_barrier;
757 break;
758 case ir_intrinsic_memory_barrier_atomic_counter:
759 op = nir_intrinsic_memory_barrier_atomic_counter;
760 break;
761 case ir_intrinsic_memory_barrier_buffer:
762 op = nir_intrinsic_memory_barrier_buffer;
763 break;
764 case ir_intrinsic_memory_barrier_image:
765 op = nir_intrinsic_memory_barrier_image;
766 break;
767 case ir_intrinsic_memory_barrier_shared:
768 op = nir_intrinsic_memory_barrier_shared;
769 break;
770 case ir_intrinsic_shared_load:
771 op = nir_intrinsic_load_shared;
772 break;
773 case ir_intrinsic_shared_store:
774 op = nir_intrinsic_store_shared;
775 break;
776 case ir_intrinsic_shared_atomic_add:
777 op = nir_intrinsic_shared_atomic_add;
778 break;
779 case ir_intrinsic_shared_atomic_and:
780 op = nir_intrinsic_shared_atomic_and;
781 break;
782 case ir_intrinsic_shared_atomic_or:
783 op = nir_intrinsic_shared_atomic_or;
784 break;
785 case ir_intrinsic_shared_atomic_xor:
786 op = nir_intrinsic_shared_atomic_xor;
787 break;
788 case ir_intrinsic_shared_atomic_min:
789 assert(ir->return_deref);
790 if (ir->return_deref->type == glsl_type::int_type)
791 op = nir_intrinsic_shared_atomic_imin;
792 else if (ir->return_deref->type == glsl_type::uint_type)
793 op = nir_intrinsic_shared_atomic_umin;
794 else
795 unreachable("Invalid type");
796 break;
797 case ir_intrinsic_shared_atomic_max:
798 assert(ir->return_deref);
799 if (ir->return_deref->type == glsl_type::int_type)
800 op = nir_intrinsic_shared_atomic_imax;
801 else if (ir->return_deref->type == glsl_type::uint_type)
802 op = nir_intrinsic_shared_atomic_umax;
803 else
804 unreachable("Invalid type");
805 break;
806 case ir_intrinsic_shared_atomic_exchange:
807 op = nir_intrinsic_shared_atomic_exchange;
808 break;
809 case ir_intrinsic_shared_atomic_comp_swap:
810 op = nir_intrinsic_shared_atomic_comp_swap;
811 break;
812 case ir_intrinsic_vote_any:
813 op = nir_intrinsic_vote_any;
814 break;
815 case ir_intrinsic_vote_all:
816 op = nir_intrinsic_vote_all;
817 break;
818 case ir_intrinsic_vote_eq:
819 op = nir_intrinsic_vote_ieq;
820 break;
821 case ir_intrinsic_ballot:
822 op = nir_intrinsic_ballot;
823 break;
824 case ir_intrinsic_read_invocation:
825 op = nir_intrinsic_read_invocation;
826 break;
827 case ir_intrinsic_read_first_invocation:
828 op = nir_intrinsic_read_first_invocation;
829 break;
830 default:
831 unreachable("not reached");
832 }
833
834 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
835 nir_dest *dest = &instr->dest;
836
837 switch (op) {
838 case nir_intrinsic_atomic_counter_read_var:
839 case nir_intrinsic_atomic_counter_inc_var:
840 case nir_intrinsic_atomic_counter_dec_var:
841 case nir_intrinsic_atomic_counter_add_var:
842 case nir_intrinsic_atomic_counter_min_var:
843 case nir_intrinsic_atomic_counter_max_var:
844 case nir_intrinsic_atomic_counter_and_var:
845 case nir_intrinsic_atomic_counter_or_var:
846 case nir_intrinsic_atomic_counter_xor_var:
847 case nir_intrinsic_atomic_counter_exchange_var:
848 case nir_intrinsic_atomic_counter_comp_swap_var: {
849 /* Set the counter variable dereference. */
850 exec_node *param = ir->actual_parameters.get_head();
851 ir_dereference *counter = (ir_dereference *)param;
852
853 instr->variables[0] = evaluate_deref(&instr->instr, counter);
854 param = param->get_next();
855
856 /* Set the intrinsic destination. */
857 if (ir->return_deref) {
858 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
859 }
860
861 /* Set the intrinsic parameters. */
862 if (!param->is_tail_sentinel()) {
863 instr->src[0] =
864 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
865 param = param->get_next();
866 }
867
868 if (!param->is_tail_sentinel()) {
869 instr->src[1] =
870 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
871 param = param->get_next();
872 }
873
874 nir_builder_instr_insert(&b, &instr->instr);
875 break;
876 }
877 case nir_intrinsic_image_var_load:
878 case nir_intrinsic_image_var_store:
879 case nir_intrinsic_image_var_atomic_add:
880 case nir_intrinsic_image_var_atomic_min:
881 case nir_intrinsic_image_var_atomic_max:
882 case nir_intrinsic_image_var_atomic_and:
883 case nir_intrinsic_image_var_atomic_or:
884 case nir_intrinsic_image_var_atomic_xor:
885 case nir_intrinsic_image_var_atomic_exchange:
886 case nir_intrinsic_image_var_atomic_comp_swap:
887 case nir_intrinsic_image_var_samples:
888 case nir_intrinsic_image_var_size: {
889 nir_ssa_undef_instr *instr_undef =
890 nir_ssa_undef_instr_create(shader, 1, 32);
891 nir_builder_instr_insert(&b, &instr_undef->instr);
892
893 /* Set the image variable dereference. */
894 exec_node *param = ir->actual_parameters.get_head();
895 ir_dereference *image = (ir_dereference *)param;
896 const glsl_type *type =
897 image->variable_referenced()->type->without_array();
898
899 instr->variables[0] = evaluate_deref(&instr->instr, image);
900 param = param->get_next();
901
902 /* Set the intrinsic destination. */
903 if (ir->return_deref) {
904 unsigned num_components = ir->return_deref->type->vector_elements;
905 if (instr->intrinsic == nir_intrinsic_image_var_size)
906 instr->num_components = num_components;
907 nir_ssa_dest_init(&instr->instr, &instr->dest,
908 num_components, 32, NULL);
909 }
910
911 if (op == nir_intrinsic_image_var_size ||
912 op == nir_intrinsic_image_var_samples) {
913 nir_builder_instr_insert(&b, &instr->instr);
914 break;
915 }
916
917 /* Set the address argument, extending the coordinate vector to four
918 * components.
919 */
920 nir_ssa_def *src_addr =
921 evaluate_rvalue((ir_dereference *)param);
922 nir_ssa_def *srcs[4];
923
924 for (int i = 0; i < 4; i++) {
925 if (i < type->coordinate_components())
926 srcs[i] = nir_channel(&b, src_addr, i);
927 else
928 srcs[i] = &instr_undef->def;
929 }
930
931 instr->src[0] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
932 param = param->get_next();
933
934 /* Set the sample argument, which is undefined for single-sample
935 * images.
936 */
937 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
938 instr->src[1] =
939 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
940 param = param->get_next();
941 } else {
942 instr->src[1] = nir_src_for_ssa(&instr_undef->def);
943 }
944
945 /* Set the intrinsic parameters. */
946 if (!param->is_tail_sentinel()) {
947 instr->src[2] =
948 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
949 param = param->get_next();
950 }
951
952 if (!param->is_tail_sentinel()) {
953 instr->src[3] =
954 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
955 param = param->get_next();
956 }
957 nir_builder_instr_insert(&b, &instr->instr);
958 break;
959 }
960 case nir_intrinsic_memory_barrier:
961 case nir_intrinsic_group_memory_barrier:
962 case nir_intrinsic_memory_barrier_atomic_counter:
963 case nir_intrinsic_memory_barrier_buffer:
964 case nir_intrinsic_memory_barrier_image:
965 case nir_intrinsic_memory_barrier_shared:
966 nir_builder_instr_insert(&b, &instr->instr);
967 break;
968 case nir_intrinsic_shader_clock:
969 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
970 instr->num_components = 2;
971 nir_builder_instr_insert(&b, &instr->instr);
972 break;
973 case nir_intrinsic_begin_invocation_interlock:
974 nir_builder_instr_insert(&b, &instr->instr);
975 break;
976 case nir_intrinsic_end_invocation_interlock:
977 nir_builder_instr_insert(&b, &instr->instr);
978 break;
979 case nir_intrinsic_store_ssbo: {
980 exec_node *param = ir->actual_parameters.get_head();
981 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
982
983 param = param->get_next();
984 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
985
986 param = param->get_next();
987 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
988
989 param = param->get_next();
990 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
991 assert(write_mask);
992
993 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
994 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
995 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
996 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
997 instr->num_components = val->type->vector_elements;
998
999 nir_builder_instr_insert(&b, &instr->instr);
1000 break;
1001 }
1002 case nir_intrinsic_load_ssbo: {
1003 exec_node *param = ir->actual_parameters.get_head();
1004 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1005
1006 param = param->get_next();
1007 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1008
1009 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1010 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1011
1012 const glsl_type *type = ir->return_deref->var->type;
1013 instr->num_components = type->vector_elements;
1014
1015 /* Setup destination register */
1016 unsigned bit_size = glsl_get_bit_size(type);
1017 nir_ssa_dest_init(&instr->instr, &instr->dest,
1018 type->vector_elements, bit_size, NULL);
1019
1020 /* Insert the created nir instruction now since in the case of boolean
1021 * result we will need to emit another instruction after it
1022 */
1023 nir_builder_instr_insert(&b, &instr->instr);
1024
1025 /*
1026 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1027 * consider a true boolean to be ~0. Fix this up with a != 0
1028 * comparison.
1029 */
1030 if (type->is_boolean()) {
1031 nir_alu_instr *load_ssbo_compare =
1032 nir_alu_instr_create(shader, nir_op_ine);
1033 load_ssbo_compare->src[0].src.is_ssa = true;
1034 load_ssbo_compare->src[0].src.ssa = &instr->dest.ssa;
1035 load_ssbo_compare->src[1].src =
1036 nir_src_for_ssa(nir_imm_int(&b, 0));
1037 for (unsigned i = 0; i < type->vector_elements; i++)
1038 load_ssbo_compare->src[1].swizzle[i] = 0;
1039 nir_ssa_dest_init(&load_ssbo_compare->instr,
1040 &load_ssbo_compare->dest.dest,
1041 type->vector_elements, bit_size, NULL);
1042 load_ssbo_compare->dest.write_mask = (1 << type->vector_elements) - 1;
1043 nir_builder_instr_insert(&b, &load_ssbo_compare->instr);
1044 dest = &load_ssbo_compare->dest.dest;
1045 }
1046 break;
1047 }
1048 case nir_intrinsic_ssbo_atomic_add:
1049 case nir_intrinsic_ssbo_atomic_imin:
1050 case nir_intrinsic_ssbo_atomic_umin:
1051 case nir_intrinsic_ssbo_atomic_imax:
1052 case nir_intrinsic_ssbo_atomic_umax:
1053 case nir_intrinsic_ssbo_atomic_and:
1054 case nir_intrinsic_ssbo_atomic_or:
1055 case nir_intrinsic_ssbo_atomic_xor:
1056 case nir_intrinsic_ssbo_atomic_exchange:
1057 case nir_intrinsic_ssbo_atomic_comp_swap: {
1058 int param_count = ir->actual_parameters.length();
1059 assert(param_count == 3 || param_count == 4);
1060
1061 /* Block index */
1062 exec_node *param = ir->actual_parameters.get_head();
1063 ir_instruction *inst = (ir_instruction *) param;
1064 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1065
1066 /* Offset */
1067 param = param->get_next();
1068 inst = (ir_instruction *) param;
1069 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1070
1071 /* data1 parameter (this is always present) */
1072 param = param->get_next();
1073 inst = (ir_instruction *) param;
1074 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1075
1076 /* data2 parameter (only with atomic_comp_swap) */
1077 if (param_count == 4) {
1078 assert(op == nir_intrinsic_ssbo_atomic_comp_swap);
1079 param = param->get_next();
1080 inst = (ir_instruction *) param;
1081 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1082 }
1083
1084 /* Atomic result */
1085 assert(ir->return_deref);
1086 nir_ssa_dest_init(&instr->instr, &instr->dest,
1087 ir->return_deref->type->vector_elements, 32, NULL);
1088 nir_builder_instr_insert(&b, &instr->instr);
1089 break;
1090 }
1091 case nir_intrinsic_load_shared: {
1092 exec_node *param = ir->actual_parameters.get_head();
1093 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1094
1095 nir_intrinsic_set_base(instr, 0);
1096 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1097
1098 const glsl_type *type = ir->return_deref->var->type;
1099 instr->num_components = type->vector_elements;
1100
1101 /* Setup destination register */
1102 unsigned bit_size = glsl_get_bit_size(type);
1103 nir_ssa_dest_init(&instr->instr, &instr->dest,
1104 type->vector_elements, bit_size, NULL);
1105
1106 nir_builder_instr_insert(&b, &instr->instr);
1107 break;
1108 }
1109 case nir_intrinsic_store_shared: {
1110 exec_node *param = ir->actual_parameters.get_head();
1111 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1112
1113 param = param->get_next();
1114 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1115
1116 param = param->get_next();
1117 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1118 assert(write_mask);
1119
1120 nir_intrinsic_set_base(instr, 0);
1121 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1122
1123 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1124
1125 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(val));
1126 instr->num_components = val->type->vector_elements;
1127
1128 nir_builder_instr_insert(&b, &instr->instr);
1129 break;
1130 }
1131 case nir_intrinsic_shared_atomic_add:
1132 case nir_intrinsic_shared_atomic_imin:
1133 case nir_intrinsic_shared_atomic_umin:
1134 case nir_intrinsic_shared_atomic_imax:
1135 case nir_intrinsic_shared_atomic_umax:
1136 case nir_intrinsic_shared_atomic_and:
1137 case nir_intrinsic_shared_atomic_or:
1138 case nir_intrinsic_shared_atomic_xor:
1139 case nir_intrinsic_shared_atomic_exchange:
1140 case nir_intrinsic_shared_atomic_comp_swap: {
1141 int param_count = ir->actual_parameters.length();
1142 assert(param_count == 2 || param_count == 3);
1143
1144 /* Offset */
1145 exec_node *param = ir->actual_parameters.get_head();
1146 ir_instruction *inst = (ir_instruction *) param;
1147 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1148
1149 /* data1 parameter (this is always present) */
1150 param = param->get_next();
1151 inst = (ir_instruction *) param;
1152 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1153
1154 /* data2 parameter (only with atomic_comp_swap) */
1155 if (param_count == 3) {
1156 assert(op == nir_intrinsic_shared_atomic_comp_swap);
1157 param = param->get_next();
1158 inst = (ir_instruction *) param;
1159 instr->src[2] =
1160 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1161 }
1162
1163 /* Atomic result */
1164 assert(ir->return_deref);
1165 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1166 nir_ssa_dest_init(&instr->instr, &instr->dest,
1167 ir->return_deref->type->vector_elements,
1168 bit_size, NULL);
1169 nir_builder_instr_insert(&b, &instr->instr);
1170 break;
1171 }
1172 case nir_intrinsic_vote_any:
1173 case nir_intrinsic_vote_all:
1174 case nir_intrinsic_vote_ieq: {
1175 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1176 instr->num_components = 1;
1177
1178 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1179 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1180
1181 nir_builder_instr_insert(&b, &instr->instr);
1182 break;
1183 }
1184
1185 case nir_intrinsic_ballot: {
1186 nir_ssa_dest_init(&instr->instr, &instr->dest,
1187 ir->return_deref->type->vector_elements, 64, NULL);
1188 instr->num_components = ir->return_deref->type->vector_elements;
1189
1190 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1191 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1192
1193 nir_builder_instr_insert(&b, &instr->instr);
1194 break;
1195 }
1196 case nir_intrinsic_read_invocation: {
1197 nir_ssa_dest_init(&instr->instr, &instr->dest,
1198 ir->return_deref->type->vector_elements, 32, NULL);
1199 instr->num_components = ir->return_deref->type->vector_elements;
1200
1201 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1202 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1203
1204 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1205 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1206
1207 nir_builder_instr_insert(&b, &instr->instr);
1208 break;
1209 }
1210 case nir_intrinsic_read_first_invocation: {
1211 nir_ssa_dest_init(&instr->instr, &instr->dest,
1212 ir->return_deref->type->vector_elements, 32, NULL);
1213 instr->num_components = ir->return_deref->type->vector_elements;
1214
1215 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1216 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1217
1218 nir_builder_instr_insert(&b, &instr->instr);
1219 break;
1220 }
1221 default:
1222 unreachable("not reached");
1223 }
1224
1225 if (ir->return_deref) {
1226 nir_intrinsic_instr *store_instr =
1227 nir_intrinsic_instr_create(shader, nir_intrinsic_store_var);
1228 store_instr->num_components = ir->return_deref->type->vector_elements;
1229 nir_intrinsic_set_write_mask(store_instr,
1230 (1 << store_instr->num_components) - 1);
1231
1232 store_instr->variables[0] =
1233 evaluate_deref(&store_instr->instr, ir->return_deref);
1234 store_instr->src[0] = nir_src_for_ssa(&dest->ssa);
1235
1236 nir_builder_instr_insert(&b, &store_instr->instr);
1237 }
1238
1239 return;
1240 }
1241
1242 unreachable("glsl_to_nir only handles function calls to intrinsics");
1243 }
1244
1245 void
1246 nir_visitor::visit(ir_assignment *ir)
1247 {
1248 unsigned num_components = ir->lhs->type->vector_elements;
1249
1250 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1251 ir->lhs->variable_referenced()->data.precise;
1252
1253 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1254 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1255 /* We're doing a plain-as-can-be copy, so emit a copy_var */
1256 nir_intrinsic_instr *copy =
1257 nir_intrinsic_instr_create(this->shader, nir_intrinsic_copy_var);
1258
1259 copy->variables[0] = evaluate_deref(&copy->instr, ir->lhs);
1260 copy->variables[1] = evaluate_deref(&copy->instr, ir->rhs);
1261
1262 if (ir->condition) {
1263 nir_push_if(&b, evaluate_rvalue(ir->condition));
1264 nir_builder_instr_insert(&b, &copy->instr);
1265 nir_pop_if(&b, NULL);
1266 } else {
1267 nir_builder_instr_insert(&b, &copy->instr);
1268 }
1269 return;
1270 }
1271
1272 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1273
1274 ir->lhs->accept(this);
1275 nir_deref_var *lhs_deref = this->deref_head;
1276 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1277
1278 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1279 /* GLSL IR will give us the input to the write-masked assignment in a
1280 * single packed vector. So, for example, if the writemask is xzw, then
1281 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1282 * from the load.
1283 */
1284 unsigned swiz[4];
1285 unsigned component = 0;
1286 for (unsigned i = 0; i < 4; i++) {
1287 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1288 }
1289 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1290 }
1291
1292 nir_intrinsic_instr *store =
1293 nir_intrinsic_instr_create(this->shader, nir_intrinsic_store_var);
1294 store->num_components = ir->lhs->type->vector_elements;
1295 nir_intrinsic_set_write_mask(store, ir->write_mask);
1296 store->variables[0] = nir_deref_var_clone(lhs_deref, store);
1297 store->src[0] = nir_src_for_ssa(src);
1298
1299 if (ir->condition) {
1300 nir_push_if(&b, evaluate_rvalue(ir->condition));
1301 nir_builder_instr_insert(&b, &store->instr);
1302 nir_pop_if(&b, NULL);
1303 } else {
1304 nir_builder_instr_insert(&b, &store->instr);
1305 }
1306 }
1307
1308 /*
1309 * Given an instruction, returns a pointer to its destination or NULL if there
1310 * is no destination.
1311 *
1312 * Note that this only handles instructions we generate at this level.
1313 */
1314 static nir_dest *
1315 get_instr_dest(nir_instr *instr)
1316 {
1317 nir_alu_instr *alu_instr;
1318 nir_intrinsic_instr *intrinsic_instr;
1319 nir_tex_instr *tex_instr;
1320
1321 switch (instr->type) {
1322 case nir_instr_type_alu:
1323 alu_instr = nir_instr_as_alu(instr);
1324 return &alu_instr->dest.dest;
1325
1326 case nir_instr_type_intrinsic:
1327 intrinsic_instr = nir_instr_as_intrinsic(instr);
1328 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1329 return &intrinsic_instr->dest;
1330 else
1331 return NULL;
1332
1333 case nir_instr_type_tex:
1334 tex_instr = nir_instr_as_tex(instr);
1335 return &tex_instr->dest;
1336
1337 default:
1338 unreachable("not reached");
1339 }
1340
1341 return NULL;
1342 }
1343
1344 void
1345 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1346 unsigned bit_size)
1347 {
1348 nir_dest *dest = get_instr_dest(instr);
1349
1350 if (dest)
1351 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1352
1353 nir_builder_instr_insert(&b, instr);
1354
1355 if (dest) {
1356 assert(dest->is_ssa);
1357 this->result = &dest->ssa;
1358 }
1359 }
1360
1361 nir_ssa_def *
1362 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1363 {
1364 ir->accept(this);
1365 if (ir->as_dereference() || ir->as_constant()) {
1366 /*
1367 * A dereference is being used on the right hand side, which means we
1368 * must emit a variable load.
1369 */
1370
1371 nir_intrinsic_instr *load_instr =
1372 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_var);
1373 load_instr->num_components = ir->type->vector_elements;
1374 load_instr->variables[0] = this->deref_head;
1375 ralloc_steal(load_instr, load_instr->variables[0]);
1376 unsigned bit_size = glsl_get_bit_size(ir->type);
1377 add_instr(&load_instr->instr, ir->type->vector_elements, bit_size);
1378 }
1379
1380 return this->result;
1381 }
1382
1383 static bool
1384 type_is_float(glsl_base_type type)
1385 {
1386 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1387 type == GLSL_TYPE_FLOAT16;
1388 }
1389
1390 static bool
1391 type_is_signed(glsl_base_type type)
1392 {
1393 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1394 type == GLSL_TYPE_INT16;
1395 }
1396
1397 void
1398 nir_visitor::visit(ir_expression *ir)
1399 {
1400 /* Some special cases */
1401 switch (ir->operation) {
1402 case ir_binop_ubo_load: {
1403 nir_intrinsic_instr *load =
1404 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1405 unsigned bit_size = glsl_get_bit_size(ir->type);
1406 load->num_components = ir->type->vector_elements;
1407 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1408 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1409 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1410
1411 /*
1412 * In UBO's, a true boolean value is any non-zero value, but we consider
1413 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1414 */
1415
1416 if (ir->type->is_boolean())
1417 this->result = nir_ine(&b, &load->dest.ssa, nir_imm_int(&b, 0));
1418
1419 return;
1420 }
1421
1422 case ir_unop_interpolate_at_centroid:
1423 case ir_binop_interpolate_at_offset:
1424 case ir_binop_interpolate_at_sample: {
1425 ir_dereference *deref = ir->operands[0]->as_dereference();
1426 ir_swizzle *swizzle = NULL;
1427 if (!deref) {
1428 /* the api does not allow a swizzle here, but the varying packing code
1429 * may have pushed one into here.
1430 */
1431 swizzle = ir->operands[0]->as_swizzle();
1432 assert(swizzle);
1433 deref = swizzle->val->as_dereference();
1434 assert(deref);
1435 }
1436
1437 deref->accept(this);
1438
1439 nir_intrinsic_op op;
1440 if (this->deref_head->var->data.mode == nir_var_shader_in) {
1441 switch (ir->operation) {
1442 case ir_unop_interpolate_at_centroid:
1443 op = nir_intrinsic_interp_var_at_centroid;
1444 break;
1445 case ir_binop_interpolate_at_offset:
1446 op = nir_intrinsic_interp_var_at_offset;
1447 break;
1448 case ir_binop_interpolate_at_sample:
1449 op = nir_intrinsic_interp_var_at_sample;
1450 break;
1451 default:
1452 unreachable("Invalid interpolation intrinsic");
1453 }
1454 } else {
1455 /* This case can happen if the vertex shader does not write the
1456 * given varying. In this case, the linker will lower it to a
1457 * global variable. Since interpolating a variable makes no
1458 * sense, we'll just turn it into a load which will probably
1459 * eventually end up as an SSA definition.
1460 */
1461 assert(this->deref_head->var->data.mode == nir_var_global);
1462 op = nir_intrinsic_load_var;
1463 }
1464
1465 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1466 intrin->num_components = deref->type->vector_elements;
1467 intrin->variables[0] = this->deref_head;
1468 ralloc_steal(intrin, intrin->variables[0]);
1469
1470 if (intrin->intrinsic == nir_intrinsic_interp_var_at_offset ||
1471 intrin->intrinsic == nir_intrinsic_interp_var_at_sample)
1472 intrin->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1473
1474 unsigned bit_size = glsl_get_bit_size(deref->type);
1475 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1476
1477 if (swizzle) {
1478 unsigned swiz[4] = {
1479 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1480 };
1481
1482 result = nir_swizzle(&b, result, swiz,
1483 swizzle->type->vector_elements, false);
1484 }
1485
1486 return;
1487 }
1488
1489 default:
1490 break;
1491 }
1492
1493 nir_ssa_def *srcs[4];
1494 for (unsigned i = 0; i < ir->num_operands; i++)
1495 srcs[i] = evaluate_rvalue(ir->operands[i]);
1496
1497 glsl_base_type types[4];
1498 for (unsigned i = 0; i < ir->num_operands; i++)
1499 if (supports_ints)
1500 types[i] = ir->operands[i]->type->base_type;
1501 else
1502 types[i] = GLSL_TYPE_FLOAT;
1503
1504 glsl_base_type out_type;
1505 if (supports_ints)
1506 out_type = ir->type->base_type;
1507 else
1508 out_type = GLSL_TYPE_FLOAT;
1509
1510 switch (ir->operation) {
1511 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1512 case ir_unop_logic_not:
1513 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1514 break;
1515 case ir_unop_neg:
1516 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1517 : nir_ineg(&b, srcs[0]);
1518 break;
1519 case ir_unop_abs:
1520 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1521 : nir_iabs(&b, srcs[0]);
1522 break;
1523 case ir_unop_saturate:
1524 assert(type_is_float(types[0]));
1525 result = nir_fsat(&b, srcs[0]);
1526 break;
1527 case ir_unop_sign:
1528 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1529 : nir_isign(&b, srcs[0]);
1530 break;
1531 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1532 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1533 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1534 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1535 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1536 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1537 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1538 case ir_unop_i2f:
1539 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1540 break;
1541 case ir_unop_u2f:
1542 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1543 break;
1544 case ir_unop_b2f:
1545 result = supports_ints ? nir_b2f(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1546 break;
1547 case ir_unop_f2i:
1548 case ir_unop_f2u:
1549 case ir_unop_f2b:
1550 case ir_unop_i2b:
1551 case ir_unop_b2i:
1552 case ir_unop_b2i64:
1553 case ir_unop_d2f:
1554 case ir_unop_f2d:
1555 case ir_unop_d2i:
1556 case ir_unop_d2u:
1557 case ir_unop_d2b:
1558 case ir_unop_i2d:
1559 case ir_unop_u2d:
1560 case ir_unop_i642i:
1561 case ir_unop_i642u:
1562 case ir_unop_i642f:
1563 case ir_unop_i642b:
1564 case ir_unop_i642d:
1565 case ir_unop_u642i:
1566 case ir_unop_u642u:
1567 case ir_unop_u642f:
1568 case ir_unop_u642d:
1569 case ir_unop_i2i64:
1570 case ir_unop_u2i64:
1571 case ir_unop_f2i64:
1572 case ir_unop_d2i64:
1573 case ir_unop_i2u64:
1574 case ir_unop_u2u64:
1575 case ir_unop_f2u64:
1576 case ir_unop_d2u64:
1577 case ir_unop_i2u:
1578 case ir_unop_u2i:
1579 case ir_unop_i642u64:
1580 case ir_unop_u642i64: {
1581 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1582 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1583 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1584 nir_rounding_mode_undef),
1585 srcs[0], NULL, NULL, NULL);
1586 /* b2i and b2f don't have fixed bit-size versions so the builder will
1587 * just assume 32 and we have to fix it up here.
1588 */
1589 result->bit_size = nir_alu_type_get_type_size(dst_type);
1590 break;
1591 }
1592
1593 case ir_unop_bitcast_i2f:
1594 case ir_unop_bitcast_f2i:
1595 case ir_unop_bitcast_u2f:
1596 case ir_unop_bitcast_f2u:
1597 case ir_unop_bitcast_i642d:
1598 case ir_unop_bitcast_d2i64:
1599 case ir_unop_bitcast_u642d:
1600 case ir_unop_bitcast_d2u64:
1601 case ir_unop_subroutine_to_int:
1602 /* no-op */
1603 result = nir_imov(&b, srcs[0]);
1604 break;
1605 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1606 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1607 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1608 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1609 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1610 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1611 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1612 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1613 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1614 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1615 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1616 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1617 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1618 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1619 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1620 case ir_unop_pack_snorm_2x16:
1621 result = nir_pack_snorm_2x16(&b, srcs[0]);
1622 break;
1623 case ir_unop_pack_snorm_4x8:
1624 result = nir_pack_snorm_4x8(&b, srcs[0]);
1625 break;
1626 case ir_unop_pack_unorm_2x16:
1627 result = nir_pack_unorm_2x16(&b, srcs[0]);
1628 break;
1629 case ir_unop_pack_unorm_4x8:
1630 result = nir_pack_unorm_4x8(&b, srcs[0]);
1631 break;
1632 case ir_unop_pack_half_2x16:
1633 result = nir_pack_half_2x16(&b, srcs[0]);
1634 break;
1635 case ir_unop_unpack_snorm_2x16:
1636 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1637 break;
1638 case ir_unop_unpack_snorm_4x8:
1639 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1640 break;
1641 case ir_unop_unpack_unorm_2x16:
1642 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1643 break;
1644 case ir_unop_unpack_unorm_4x8:
1645 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1646 break;
1647 case ir_unop_unpack_half_2x16:
1648 result = nir_unpack_half_2x16(&b, srcs[0]);
1649 break;
1650 case ir_unop_pack_sampler_2x32:
1651 case ir_unop_pack_image_2x32:
1652 case ir_unop_pack_double_2x32:
1653 case ir_unop_pack_int_2x32:
1654 case ir_unop_pack_uint_2x32:
1655 result = nir_pack_64_2x32(&b, srcs[0]);
1656 break;
1657 case ir_unop_unpack_sampler_2x32:
1658 case ir_unop_unpack_image_2x32:
1659 case ir_unop_unpack_double_2x32:
1660 case ir_unop_unpack_int_2x32:
1661 case ir_unop_unpack_uint_2x32:
1662 result = nir_unpack_64_2x32(&b, srcs[0]);
1663 break;
1664 case ir_unop_bitfield_reverse:
1665 result = nir_bitfield_reverse(&b, srcs[0]);
1666 break;
1667 case ir_unop_bit_count:
1668 result = nir_bit_count(&b, srcs[0]);
1669 break;
1670 case ir_unop_find_msb:
1671 switch (types[0]) {
1672 case GLSL_TYPE_UINT:
1673 result = nir_ufind_msb(&b, srcs[0]);
1674 break;
1675 case GLSL_TYPE_INT:
1676 result = nir_ifind_msb(&b, srcs[0]);
1677 break;
1678 default:
1679 unreachable("Invalid type for findMSB()");
1680 }
1681 break;
1682 case ir_unop_find_lsb:
1683 result = nir_find_lsb(&b, srcs[0]);
1684 break;
1685
1686 case ir_unop_noise:
1687 switch (ir->type->vector_elements) {
1688 case 1:
1689 switch (ir->operands[0]->type->vector_elements) {
1690 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1691 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1692 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1693 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1694 default: unreachable("not reached");
1695 }
1696 break;
1697 case 2:
1698 switch (ir->operands[0]->type->vector_elements) {
1699 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1700 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1701 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1702 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1703 default: unreachable("not reached");
1704 }
1705 break;
1706 case 3:
1707 switch (ir->operands[0]->type->vector_elements) {
1708 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1709 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1710 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1711 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1712 default: unreachable("not reached");
1713 }
1714 break;
1715 case 4:
1716 switch (ir->operands[0]->type->vector_elements) {
1717 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1718 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1719 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1720 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1721 default: unreachable("not reached");
1722 }
1723 break;
1724 default:
1725 unreachable("not reached");
1726 }
1727 break;
1728 case ir_unop_get_buffer_size: {
1729 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1730 this->shader,
1731 nir_intrinsic_get_buffer_size);
1732 load->num_components = ir->type->vector_elements;
1733 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1734 unsigned bit_size = glsl_get_bit_size(ir->type);
1735 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1736 return;
1737 }
1738
1739 case ir_binop_add:
1740 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1741 : nir_iadd(&b, srcs[0], srcs[1]);
1742 break;
1743 case ir_binop_sub:
1744 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1745 : nir_isub(&b, srcs[0], srcs[1]);
1746 break;
1747 case ir_binop_mul:
1748 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1749 : nir_imul(&b, srcs[0], srcs[1]);
1750 break;
1751 case ir_binop_div:
1752 if (type_is_float(out_type))
1753 result = nir_fdiv(&b, srcs[0], srcs[1]);
1754 else if (type_is_signed(out_type))
1755 result = nir_idiv(&b, srcs[0], srcs[1]);
1756 else
1757 result = nir_udiv(&b, srcs[0], srcs[1]);
1758 break;
1759 case ir_binop_mod:
1760 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1761 : nir_umod(&b, srcs[0], srcs[1]);
1762 break;
1763 case ir_binop_min:
1764 if (type_is_float(out_type))
1765 result = nir_fmin(&b, srcs[0], srcs[1]);
1766 else if (type_is_signed(out_type))
1767 result = nir_imin(&b, srcs[0], srcs[1]);
1768 else
1769 result = nir_umin(&b, srcs[0], srcs[1]);
1770 break;
1771 case ir_binop_max:
1772 if (type_is_float(out_type))
1773 result = nir_fmax(&b, srcs[0], srcs[1]);
1774 else if (type_is_signed(out_type))
1775 result = nir_imax(&b, srcs[0], srcs[1]);
1776 else
1777 result = nir_umax(&b, srcs[0], srcs[1]);
1778 break;
1779 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1780 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1781 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1782 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1783 case ir_binop_logic_and:
1784 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1785 : nir_fand(&b, srcs[0], srcs[1]);
1786 break;
1787 case ir_binop_logic_or:
1788 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1789 : nir_for(&b, srcs[0], srcs[1]);
1790 break;
1791 case ir_binop_logic_xor:
1792 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1793 : nir_fxor(&b, srcs[0], srcs[1]);
1794 break;
1795 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1796 case ir_binop_rshift:
1797 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1798 : nir_ushr(&b, srcs[0], srcs[1]);
1799 break;
1800 case ir_binop_imul_high:
1801 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1802 : nir_umul_high(&b, srcs[0], srcs[1]);
1803 break;
1804 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1805 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1806 case ir_binop_less:
1807 if (supports_ints) {
1808 if (type_is_float(types[0]))
1809 result = nir_flt(&b, srcs[0], srcs[1]);
1810 else if (type_is_signed(types[0]))
1811 result = nir_ilt(&b, srcs[0], srcs[1]);
1812 else
1813 result = nir_ult(&b, srcs[0], srcs[1]);
1814 } else {
1815 result = nir_slt(&b, srcs[0], srcs[1]);
1816 }
1817 break;
1818 case ir_binop_gequal:
1819 if (supports_ints) {
1820 if (type_is_float(types[0]))
1821 result = nir_fge(&b, srcs[0], srcs[1]);
1822 else if (type_is_signed(types[0]))
1823 result = nir_ige(&b, srcs[0], srcs[1]);
1824 else
1825 result = nir_uge(&b, srcs[0], srcs[1]);
1826 } else {
1827 result = nir_sge(&b, srcs[0], srcs[1]);
1828 }
1829 break;
1830 case ir_binop_equal:
1831 if (supports_ints) {
1832 if (type_is_float(types[0]))
1833 result = nir_feq(&b, srcs[0], srcs[1]);
1834 else
1835 result = nir_ieq(&b, srcs[0], srcs[1]);
1836 } else {
1837 result = nir_seq(&b, srcs[0], srcs[1]);
1838 }
1839 break;
1840 case ir_binop_nequal:
1841 if (supports_ints) {
1842 if (type_is_float(types[0]))
1843 result = nir_fne(&b, srcs[0], srcs[1]);
1844 else
1845 result = nir_ine(&b, srcs[0], srcs[1]);
1846 } else {
1847 result = nir_sne(&b, srcs[0], srcs[1]);
1848 }
1849 break;
1850 case ir_binop_all_equal:
1851 if (supports_ints) {
1852 if (type_is_float(types[0])) {
1853 switch (ir->operands[0]->type->vector_elements) {
1854 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1855 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1856 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1857 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1858 default:
1859 unreachable("not reached");
1860 }
1861 } else {
1862 switch (ir->operands[0]->type->vector_elements) {
1863 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1864 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1865 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1866 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1867 default:
1868 unreachable("not reached");
1869 }
1870 }
1871 } else {
1872 switch (ir->operands[0]->type->vector_elements) {
1873 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1874 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1875 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1876 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1877 default:
1878 unreachable("not reached");
1879 }
1880 }
1881 break;
1882 case ir_binop_any_nequal:
1883 if (supports_ints) {
1884 if (type_is_float(types[0])) {
1885 switch (ir->operands[0]->type->vector_elements) {
1886 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1887 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1888 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1889 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1890 default:
1891 unreachable("not reached");
1892 }
1893 } else {
1894 switch (ir->operands[0]->type->vector_elements) {
1895 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1896 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1897 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1898 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1899 default:
1900 unreachable("not reached");
1901 }
1902 }
1903 } else {
1904 switch (ir->operands[0]->type->vector_elements) {
1905 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1906 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1907 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1908 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1909 default:
1910 unreachable("not reached");
1911 }
1912 }
1913 break;
1914 case ir_binop_dot:
1915 switch (ir->operands[0]->type->vector_elements) {
1916 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1917 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1918 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1919 default:
1920 unreachable("not reached");
1921 }
1922 break;
1923 case ir_binop_vector_extract: {
1924 result = nir_channel(&b, srcs[0], 0);
1925 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
1926 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
1927 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
1928 swizzled, result);
1929 }
1930 break;
1931 }
1932
1933 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1934 case ir_triop_fma:
1935 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1936 break;
1937 case ir_triop_lrp:
1938 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1939 break;
1940 case ir_triop_csel:
1941 if (supports_ints)
1942 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1943 else
1944 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1945 break;
1946 case ir_triop_bitfield_extract:
1947 result = (out_type == GLSL_TYPE_INT) ?
1948 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1949 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1950 break;
1951 case ir_quadop_bitfield_insert:
1952 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1953 break;
1954 case ir_quadop_vector:
1955 result = nir_vec(&b, srcs, ir->type->vector_elements);
1956 break;
1957
1958 default:
1959 unreachable("not reached");
1960 }
1961 }
1962
1963 void
1964 nir_visitor::visit(ir_swizzle *ir)
1965 {
1966 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1967 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1968 ir->type->vector_elements, !supports_ints);
1969 }
1970
1971 void
1972 nir_visitor::visit(ir_texture *ir)
1973 {
1974 unsigned num_srcs;
1975 nir_texop op;
1976 switch (ir->op) {
1977 case ir_tex:
1978 op = nir_texop_tex;
1979 num_srcs = 1; /* coordinate */
1980 break;
1981
1982 case ir_txb:
1983 case ir_txl:
1984 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1985 num_srcs = 2; /* coordinate, bias/lod */
1986 break;
1987
1988 case ir_txd:
1989 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1990 num_srcs = 3;
1991 break;
1992
1993 case ir_txf:
1994 op = nir_texop_txf;
1995 if (ir->lod_info.lod != NULL)
1996 num_srcs = 2; /* coordinate, lod */
1997 else
1998 num_srcs = 1; /* coordinate */
1999 break;
2000
2001 case ir_txf_ms:
2002 op = nir_texop_txf_ms;
2003 num_srcs = 2; /* coordinate, sample_index */
2004 break;
2005
2006 case ir_txs:
2007 op = nir_texop_txs;
2008 if (ir->lod_info.lod != NULL)
2009 num_srcs = 1; /* lod */
2010 else
2011 num_srcs = 0;
2012 break;
2013
2014 case ir_lod:
2015 op = nir_texop_lod;
2016 num_srcs = 1; /* coordinate */
2017 break;
2018
2019 case ir_tg4:
2020 op = nir_texop_tg4;
2021 num_srcs = 1; /* coordinate */
2022 break;
2023
2024 case ir_query_levels:
2025 op = nir_texop_query_levels;
2026 num_srcs = 0;
2027 break;
2028
2029 case ir_texture_samples:
2030 op = nir_texop_texture_samples;
2031 num_srcs = 0;
2032 break;
2033
2034 case ir_samples_identical:
2035 op = nir_texop_samples_identical;
2036 num_srcs = 1; /* coordinate */
2037 break;
2038
2039 default:
2040 unreachable("not reached");
2041 }
2042
2043 if (ir->projector != NULL)
2044 num_srcs++;
2045 if (ir->shadow_comparator != NULL)
2046 num_srcs++;
2047 if (ir->offset != NULL)
2048 num_srcs++;
2049
2050 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2051
2052 instr->op = op;
2053 instr->sampler_dim =
2054 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2055 instr->is_array = ir->sampler->type->sampler_array;
2056 instr->is_shadow = ir->sampler->type->sampler_shadow;
2057 if (instr->is_shadow)
2058 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2059 switch (ir->type->base_type) {
2060 case GLSL_TYPE_FLOAT:
2061 instr->dest_type = nir_type_float;
2062 break;
2063 case GLSL_TYPE_INT:
2064 instr->dest_type = nir_type_int;
2065 break;
2066 case GLSL_TYPE_BOOL:
2067 case GLSL_TYPE_UINT:
2068 instr->dest_type = nir_type_uint;
2069 break;
2070 default:
2071 unreachable("not reached");
2072 }
2073
2074 instr->texture = evaluate_deref(&instr->instr, ir->sampler);
2075
2076 unsigned src_number = 0;
2077
2078 if (ir->coordinate != NULL) {
2079 instr->coord_components = ir->coordinate->type->vector_elements;
2080 instr->src[src_number].src =
2081 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2082 instr->src[src_number].src_type = nir_tex_src_coord;
2083 src_number++;
2084 }
2085
2086 if (ir->projector != NULL) {
2087 instr->src[src_number].src =
2088 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2089 instr->src[src_number].src_type = nir_tex_src_projector;
2090 src_number++;
2091 }
2092
2093 if (ir->shadow_comparator != NULL) {
2094 instr->src[src_number].src =
2095 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2096 instr->src[src_number].src_type = nir_tex_src_comparator;
2097 src_number++;
2098 }
2099
2100 if (ir->offset != NULL) {
2101 /* we don't support multiple offsets yet */
2102 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2103
2104 instr->src[src_number].src =
2105 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2106 instr->src[src_number].src_type = nir_tex_src_offset;
2107 src_number++;
2108 }
2109
2110 switch (ir->op) {
2111 case ir_txb:
2112 instr->src[src_number].src =
2113 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2114 instr->src[src_number].src_type = nir_tex_src_bias;
2115 src_number++;
2116 break;
2117
2118 case ir_txl:
2119 case ir_txf:
2120 case ir_txs:
2121 if (ir->lod_info.lod != NULL) {
2122 instr->src[src_number].src =
2123 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2124 instr->src[src_number].src_type = nir_tex_src_lod;
2125 src_number++;
2126 }
2127 break;
2128
2129 case ir_txd:
2130 instr->src[src_number].src =
2131 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2132 instr->src[src_number].src_type = nir_tex_src_ddx;
2133 src_number++;
2134 instr->src[src_number].src =
2135 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2136 instr->src[src_number].src_type = nir_tex_src_ddy;
2137 src_number++;
2138 break;
2139
2140 case ir_txf_ms:
2141 instr->src[src_number].src =
2142 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2143 instr->src[src_number].src_type = nir_tex_src_ms_index;
2144 src_number++;
2145 break;
2146
2147 case ir_tg4:
2148 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2149 break;
2150
2151 default:
2152 break;
2153 }
2154
2155 assert(src_number == num_srcs);
2156
2157 unsigned bit_size = glsl_get_bit_size(ir->type);
2158 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2159 }
2160
2161 void
2162 nir_visitor::visit(ir_constant *ir)
2163 {
2164 /*
2165 * We don't know if this variable is an array or struct that gets
2166 * dereferenced, so do the safe thing an make it a variable with a
2167 * constant initializer and return a dereference.
2168 */
2169
2170 nir_variable *var =
2171 nir_local_variable_create(this->impl, ir->type, "const_temp");
2172 var->data.read_only = true;
2173 var->constant_initializer = constant_copy(ir, var);
2174
2175 this->deref_head = nir_deref_var_create(this->shader, var);
2176 this->deref_tail = &this->deref_head->deref;
2177 }
2178
2179 void
2180 nir_visitor::visit(ir_dereference_variable *ir)
2181 {
2182 struct hash_entry *entry =
2183 _mesa_hash_table_search(this->var_table, ir->var);
2184 assert(entry);
2185 nir_variable *var = (nir_variable *) entry->data;
2186
2187 nir_deref_var *deref = nir_deref_var_create(this->shader, var);
2188 this->deref_head = deref;
2189 this->deref_tail = &deref->deref;
2190 }
2191
2192 void
2193 nir_visitor::visit(ir_dereference_record *ir)
2194 {
2195 ir->record->accept(this);
2196
2197 int field_index = ir->field_idx;
2198 assert(field_index >= 0);
2199
2200 nir_deref_struct *deref = nir_deref_struct_create(this->deref_tail, field_index);
2201 deref->deref.type = ir->type;
2202 this->deref_tail->child = &deref->deref;
2203 this->deref_tail = &deref->deref;
2204 }
2205
2206 void
2207 nir_visitor::visit(ir_dereference_array *ir)
2208 {
2209 nir_deref_array *deref = nir_deref_array_create(this->shader);
2210 deref->deref.type = ir->type;
2211
2212 ir_constant *const_index = ir->array_index->as_constant();
2213 if (const_index != NULL) {
2214 deref->deref_array_type = nir_deref_array_type_direct;
2215 deref->base_offset = const_index->value.u[0];
2216 } else {
2217 deref->deref_array_type = nir_deref_array_type_indirect;
2218 deref->indirect =
2219 nir_src_for_ssa(evaluate_rvalue(ir->array_index));
2220 }
2221
2222 ir->array->accept(this);
2223
2224 this->deref_tail->child = &deref->deref;
2225 ralloc_steal(this->deref_tail, deref);
2226 this->deref_tail = &deref->deref;
2227 }
2228
2229 void
2230 nir_visitor::visit(ir_barrier *)
2231 {
2232 nir_intrinsic_instr *instr =
2233 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2234 nir_builder_instr_insert(&b, &instr->instr);
2235 }