glsl: copy the how_declared field when converting to nir
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "float64_glsl.h"
29 #include "glsl_to_nir.h"
30 #include "ir_visitor.h"
31 #include "ir_hierarchical_visitor.h"
32 #include "ir.h"
33 #include "ir_optimization.h"
34 #include "program.h"
35 #include "compiler/nir/nir_control_flow.h"
36 #include "compiler/nir/nir_builder.h"
37 #include "compiler/nir/nir_builtin_builder.h"
38 #include "compiler/nir/nir_deref.h"
39 #include "main/errors.h"
40 #include "main/imports.h"
41 #include "main/mtypes.h"
42 #include "main/shaderobj.h"
43 #include "util/u_math.h"
44
45 /*
46 * pass to lower GLSL IR to NIR
47 *
48 * This will lower variable dereferences to loads/stores of corresponding
49 * variables in NIR - the variables will be converted to registers in a later
50 * pass.
51 */
52
53 namespace {
54
55 class nir_visitor : public ir_visitor
56 {
57 public:
58 nir_visitor(gl_context *ctx, nir_shader *shader);
59 ~nir_visitor();
60
61 virtual void visit(ir_variable *);
62 virtual void visit(ir_function *);
63 virtual void visit(ir_function_signature *);
64 virtual void visit(ir_loop *);
65 virtual void visit(ir_if *);
66 virtual void visit(ir_discard *);
67 virtual void visit(ir_demote *);
68 virtual void visit(ir_loop_jump *);
69 virtual void visit(ir_return *);
70 virtual void visit(ir_call *);
71 virtual void visit(ir_assignment *);
72 virtual void visit(ir_emit_vertex *);
73 virtual void visit(ir_end_primitive *);
74 virtual void visit(ir_expression *);
75 virtual void visit(ir_swizzle *);
76 virtual void visit(ir_texture *);
77 virtual void visit(ir_constant *);
78 virtual void visit(ir_dereference_variable *);
79 virtual void visit(ir_dereference_record *);
80 virtual void visit(ir_dereference_array *);
81 virtual void visit(ir_barrier *);
82
83 void create_function(ir_function_signature *ir);
84
85 private:
86 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
87 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
88
89 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
90 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
91 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
92 nir_ssa_def *src2);
93 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
94 nir_ssa_def *src2, nir_ssa_def *src3);
95
96 bool supports_std430;
97
98 nir_shader *shader;
99 nir_function_impl *impl;
100 nir_builder b;
101 nir_ssa_def *result; /* result of the expression tree last visited */
102
103 nir_deref_instr *evaluate_deref(ir_instruction *ir);
104
105 nir_constant *constant_copy(ir_constant *ir, void *mem_ctx);
106
107 /* most recent deref instruction created */
108 nir_deref_instr *deref;
109
110 /* whether the IR we're operating on is per-function or global */
111 bool is_global;
112
113 ir_function_signature *sig;
114
115 /* map of ir_variable -> nir_variable */
116 struct hash_table *var_table;
117
118 /* map of ir_function_signature -> nir_function_overload */
119 struct hash_table *overload_table;
120 };
121
122 /*
123 * This visitor runs before the main visitor, calling create_function() for
124 * each function so that the main visitor can resolve forward references in
125 * calls.
126 */
127
128 class nir_function_visitor : public ir_hierarchical_visitor
129 {
130 public:
131 nir_function_visitor(nir_visitor *v) : visitor(v)
132 {
133 }
134 virtual ir_visitor_status visit_enter(ir_function *);
135
136 private:
137 nir_visitor *visitor;
138 };
139
140 /* glsl_to_nir can only handle converting certain function paramaters
141 * to NIR. This visitor checks for parameters it can't currently handle.
142 */
143 class ir_function_param_visitor : public ir_hierarchical_visitor
144 {
145 public:
146 ir_function_param_visitor()
147 : unsupported(false)
148 {
149 }
150
151 virtual ir_visitor_status visit_enter(ir_function_signature *ir)
152 {
153
154 if (ir->is_intrinsic())
155 return visit_continue;
156
157 foreach_in_list(ir_variable, param, &ir->parameters) {
158 if (!param->type->is_vector() || !param->type->is_scalar()) {
159 unsupported = true;
160 return visit_stop;
161 }
162
163 if (param->data.mode == ir_var_function_inout) {
164 unsupported = true;
165 return visit_stop;
166 }
167 }
168
169 return visit_continue;
170 }
171
172 bool unsupported;
173 };
174
175 } /* end of anonymous namespace */
176
177
178 static bool
179 has_unsupported_function_param(exec_list *ir)
180 {
181 ir_function_param_visitor visitor;
182 visit_list_elements(&visitor, ir);
183 return visitor.unsupported;
184 }
185
186 nir_shader *
187 glsl_to_nir(struct gl_context *ctx,
188 const struct gl_shader_program *shader_prog,
189 gl_shader_stage stage,
190 const nir_shader_compiler_options *options)
191 {
192 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
193
194 const struct gl_shader_compiler_options *gl_options =
195 &ctx->Const.ShaderCompilerOptions[stage];
196
197 /* glsl_to_nir can only handle converting certain function paramaters
198 * to NIR. If we find something we can't handle then we get the GLSL IR
199 * opts to remove it before we continue on.
200 *
201 * TODO: add missing glsl ir to nir support and remove this loop.
202 */
203 while (has_unsupported_function_param(sh->ir)) {
204 do_common_optimization(sh->ir, true, true, gl_options,
205 ctx->Const.NativeIntegers);
206 }
207
208 nir_shader *shader = nir_shader_create(NULL, stage, options,
209 &sh->Program->info);
210
211 nir_visitor v1(ctx, shader);
212 nir_function_visitor v2(&v1);
213 v2.run(sh->ir);
214 visit_exec_list(sh->ir, &v1);
215
216 nir_validate_shader(shader, "after glsl to nir, before function inline");
217
218 /* We have to lower away local constant initializers right before we
219 * inline functions. That way they get properly initialized at the top
220 * of the function and not at the top of its caller.
221 */
222 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
223 nir_lower_returns(shader);
224 nir_inline_functions(shader);
225 nir_opt_deref(shader);
226
227 nir_validate_shader(shader, "after function inlining and return lowering");
228
229 /* Now that we have inlined everything remove all of the functions except
230 * main().
231 */
232 foreach_list_typed_safe(nir_function, function, node, &(shader)->functions){
233 if (strcmp("main", function->name) != 0) {
234 exec_node_remove(&function->node);
235 }
236 }
237
238 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
239 if (shader_prog->Label)
240 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
241
242 /* Check for transform feedback varyings specified via the API */
243 shader->info.has_transform_feedback_varyings =
244 shader_prog->TransformFeedback.NumVarying > 0;
245
246 /* Check for transform feedback varyings specified in the Shader */
247 if (shader_prog->last_vert_prog)
248 shader->info.has_transform_feedback_varyings |=
249 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
250
251 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
252 shader->info.fs.pixel_center_integer = sh->Program->info.fs.pixel_center_integer;
253 shader->info.fs.origin_upper_left = sh->Program->info.fs.origin_upper_left;
254 }
255
256 return shader;
257 }
258
259 nir_visitor::nir_visitor(gl_context *ctx, nir_shader *shader)
260 {
261 this->supports_std430 = ctx->Const.UseSTD430AsDefaultPacking;
262 this->shader = shader;
263 this->is_global = true;
264 this->var_table = _mesa_pointer_hash_table_create(NULL);
265 this->overload_table = _mesa_pointer_hash_table_create(NULL);
266 this->result = NULL;
267 this->impl = NULL;
268 this->deref = NULL;
269 this->sig = NULL;
270 memset(&this->b, 0, sizeof(this->b));
271 }
272
273 nir_visitor::~nir_visitor()
274 {
275 _mesa_hash_table_destroy(this->var_table, NULL);
276 _mesa_hash_table_destroy(this->overload_table, NULL);
277 }
278
279 nir_deref_instr *
280 nir_visitor::evaluate_deref(ir_instruction *ir)
281 {
282 ir->accept(this);
283 return this->deref;
284 }
285
286 nir_constant *
287 nir_visitor::constant_copy(ir_constant *ir, void *mem_ctx)
288 {
289 if (ir == NULL)
290 return NULL;
291
292 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
293
294 const unsigned rows = ir->type->vector_elements;
295 const unsigned cols = ir->type->matrix_columns;
296 unsigned i;
297
298 ret->num_elements = 0;
299 switch (ir->type->base_type) {
300 case GLSL_TYPE_UINT:
301 /* Only float base types can be matrices. */
302 assert(cols == 1);
303
304 for (unsigned r = 0; r < rows; r++)
305 ret->values[r].u32 = ir->value.u[r];
306
307 break;
308
309 case GLSL_TYPE_INT:
310 /* Only float base types can be matrices. */
311 assert(cols == 1);
312
313 for (unsigned r = 0; r < rows; r++)
314 ret->values[r].i32 = ir->value.i[r];
315
316 break;
317
318 case GLSL_TYPE_FLOAT:
319 case GLSL_TYPE_DOUBLE:
320 if (cols > 1) {
321 ret->elements = ralloc_array(mem_ctx, nir_constant *, cols);
322 ret->num_elements = cols;
323 for (unsigned c = 0; c < cols; c++) {
324 nir_constant *col_const = rzalloc(mem_ctx, nir_constant);
325 col_const->num_elements = 0;
326 switch (ir->type->base_type) {
327 case GLSL_TYPE_FLOAT:
328 for (unsigned r = 0; r < rows; r++)
329 col_const->values[r].f32 = ir->value.f[c * rows + r];
330 break;
331
332 case GLSL_TYPE_DOUBLE:
333 for (unsigned r = 0; r < rows; r++)
334 col_const->values[r].f64 = ir->value.d[c * rows + r];
335 break;
336
337 default:
338 unreachable("Cannot get here from the first level switch");
339 }
340 ret->elements[c] = col_const;
341 }
342 } else {
343 switch (ir->type->base_type) {
344 case GLSL_TYPE_FLOAT:
345 for (unsigned r = 0; r < rows; r++)
346 ret->values[r].f32 = ir->value.f[r];
347 break;
348
349 case GLSL_TYPE_DOUBLE:
350 for (unsigned r = 0; r < rows; r++)
351 ret->values[r].f64 = ir->value.d[r];
352 break;
353
354 default:
355 unreachable("Cannot get here from the first level switch");
356 }
357 }
358 break;
359
360 case GLSL_TYPE_UINT64:
361 /* Only float base types can be matrices. */
362 assert(cols == 1);
363
364 for (unsigned r = 0; r < rows; r++)
365 ret->values[r].u64 = ir->value.u64[r];
366 break;
367
368 case GLSL_TYPE_INT64:
369 /* Only float base types can be matrices. */
370 assert(cols == 1);
371
372 for (unsigned r = 0; r < rows; r++)
373 ret->values[r].i64 = ir->value.i64[r];
374 break;
375
376 case GLSL_TYPE_BOOL:
377 /* Only float base types can be matrices. */
378 assert(cols == 1);
379
380 for (unsigned r = 0; r < rows; r++)
381 ret->values[r].b = ir->value.b[r];
382
383 break;
384
385 case GLSL_TYPE_STRUCT:
386 case GLSL_TYPE_ARRAY:
387 ret->elements = ralloc_array(mem_ctx, nir_constant *,
388 ir->type->length);
389 ret->num_elements = ir->type->length;
390
391 for (i = 0; i < ir->type->length; i++)
392 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
393 break;
394
395 default:
396 unreachable("not reached");
397 }
398
399 return ret;
400 }
401
402 static const glsl_type *
403 wrap_type_in_array(const glsl_type *elem_type, const glsl_type *array_type)
404 {
405 if (!array_type->is_array())
406 return elem_type;
407
408 elem_type = wrap_type_in_array(elem_type, array_type->fields.array);
409
410 return glsl_type::get_array_instance(elem_type, array_type->length);
411 }
412
413 static unsigned
414 get_nir_how_declared(unsigned how_declared)
415 {
416 if (how_declared == ir_var_hidden)
417 return nir_var_hidden;
418
419 return nir_var_declared_normally;
420 }
421
422 void
423 nir_visitor::visit(ir_variable *ir)
424 {
425 /* TODO: In future we should switch to using the NIR lowering pass but for
426 * now just ignore these variables as GLSL IR should have lowered them.
427 * Anything remaining are just dead vars that weren't cleaned up.
428 */
429 if (ir->data.mode == ir_var_shader_shared)
430 return;
431
432 /* FINISHME: inout parameters */
433 assert(ir->data.mode != ir_var_function_inout);
434
435 if (ir->data.mode == ir_var_function_out)
436 return;
437
438 nir_variable *var = rzalloc(shader, nir_variable);
439 var->type = ir->type;
440 var->name = ralloc_strdup(var, ir->name);
441
442 var->data.always_active_io = ir->data.always_active_io;
443 var->data.read_only = ir->data.read_only;
444 var->data.centroid = ir->data.centroid;
445 var->data.sample = ir->data.sample;
446 var->data.patch = ir->data.patch;
447 var->data.how_declared = get_nir_how_declared(ir->data.how_declared);
448 var->data.invariant = ir->data.invariant;
449 var->data.location = ir->data.location;
450 var->data.stream = ir->data.stream;
451 if (ir->data.stream & (1u << 31))
452 var->data.stream |= NIR_STREAM_PACKED;
453 var->data.compact = false;
454
455 switch(ir->data.mode) {
456 case ir_var_auto:
457 case ir_var_temporary:
458 if (is_global)
459 var->data.mode = nir_var_shader_temp;
460 else
461 var->data.mode = nir_var_function_temp;
462 break;
463
464 case ir_var_function_in:
465 case ir_var_const_in:
466 var->data.mode = nir_var_function_temp;
467 break;
468
469 case ir_var_shader_in:
470 if (shader->info.stage == MESA_SHADER_GEOMETRY &&
471 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
472 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
473 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
474 var->data.mode = nir_var_system_value;
475 } else {
476 var->data.mode = nir_var_shader_in;
477
478 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
479 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
480 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
481 var->data.compact = ir->type->without_array()->is_scalar();
482 }
483
484 if (shader->info.stage > MESA_SHADER_VERTEX &&
485 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
486 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
487 var->data.compact = ir->type->without_array()->is_scalar();
488 }
489 }
490 break;
491
492 case ir_var_shader_out:
493 var->data.mode = nir_var_shader_out;
494 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
495 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
496 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
497 var->data.compact = ir->type->without_array()->is_scalar();
498 }
499
500 if (shader->info.stage <= MESA_SHADER_GEOMETRY &&
501 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
502 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
503 var->data.compact = ir->type->without_array()->is_scalar();
504 }
505 break;
506
507 case ir_var_uniform:
508 if (ir->get_interface_type())
509 var->data.mode = nir_var_mem_ubo;
510 else
511 var->data.mode = nir_var_uniform;
512 break;
513
514 case ir_var_shader_storage:
515 var->data.mode = nir_var_mem_ssbo;
516 break;
517
518 case ir_var_system_value:
519 var->data.mode = nir_var_system_value;
520 break;
521
522 default:
523 unreachable("not reached");
524 }
525
526 unsigned mem_access = 0;
527 if (ir->data.memory_read_only)
528 mem_access |= ACCESS_NON_WRITEABLE;
529 if (ir->data.memory_write_only)
530 mem_access |= ACCESS_NON_READABLE;
531 if (ir->data.memory_coherent)
532 mem_access |= ACCESS_COHERENT;
533 if (ir->data.memory_volatile)
534 mem_access |= ACCESS_VOLATILE;
535 if (ir->data.memory_restrict)
536 mem_access |= ACCESS_RESTRICT;
537
538 /* For UBO and SSBO variables, we need explicit types */
539 if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
540 const glsl_type *explicit_ifc_type =
541 ir->get_interface_type()->get_explicit_interface_type(supports_std430);
542
543 if (ir->type->without_array()->is_interface()) {
544 /* If the type contains the interface, wrap the explicit type in the
545 * right number of arrays.
546 */
547 var->type = wrap_type_in_array(explicit_ifc_type, ir->type);
548 } else {
549 /* Otherwise, this variable is one entry in the interface */
550 UNUSED bool found = false;
551 for (unsigned i = 0; i < explicit_ifc_type->length; i++) {
552 const glsl_struct_field *field =
553 &explicit_ifc_type->fields.structure[i];
554 if (strcmp(ir->name, field->name) != 0)
555 continue;
556
557 var->type = field->type;
558 if (field->memory_read_only)
559 mem_access |= ACCESS_NON_WRITEABLE;
560 if (field->memory_write_only)
561 mem_access |= ACCESS_NON_READABLE;
562 if (field->memory_coherent)
563 mem_access |= ACCESS_COHERENT;
564 if (field->memory_volatile)
565 mem_access |= ACCESS_VOLATILE;
566 if (field->memory_restrict)
567 mem_access |= ACCESS_RESTRICT;
568
569 found = true;
570 break;
571 }
572 assert(found);
573 }
574 }
575
576 var->data.interpolation = ir->data.interpolation;
577 var->data.location_frac = ir->data.location_frac;
578
579 switch (ir->data.depth_layout) {
580 case ir_depth_layout_none:
581 var->data.depth_layout = nir_depth_layout_none;
582 break;
583 case ir_depth_layout_any:
584 var->data.depth_layout = nir_depth_layout_any;
585 break;
586 case ir_depth_layout_greater:
587 var->data.depth_layout = nir_depth_layout_greater;
588 break;
589 case ir_depth_layout_less:
590 var->data.depth_layout = nir_depth_layout_less;
591 break;
592 case ir_depth_layout_unchanged:
593 var->data.depth_layout = nir_depth_layout_unchanged;
594 break;
595 default:
596 unreachable("not reached");
597 }
598
599 var->data.index = ir->data.index;
600 var->data.descriptor_set = 0;
601 var->data.binding = ir->data.binding;
602 var->data.explicit_binding = ir->data.explicit_binding;
603 var->data.bindless = ir->data.bindless;
604 var->data.offset = ir->data.offset;
605 var->data.access = (gl_access_qualifier)mem_access;
606
607 if (var->type->without_array()->is_image()) {
608 var->data.image.format = ir->data.image_format;
609 } else if (var->data.mode == nir_var_shader_out) {
610 var->data.xfb.buffer = ir->data.xfb_buffer;
611 var->data.xfb.stride = ir->data.xfb_stride;
612 }
613
614 var->data.fb_fetch_output = ir->data.fb_fetch_output;
615 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
616 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
617
618 var->num_state_slots = ir->get_num_state_slots();
619 if (var->num_state_slots > 0) {
620 var->state_slots = rzalloc_array(var, nir_state_slot,
621 var->num_state_slots);
622
623 ir_state_slot *state_slots = ir->get_state_slots();
624 for (unsigned i = 0; i < var->num_state_slots; i++) {
625 for (unsigned j = 0; j < 5; j++)
626 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
627 var->state_slots[i].swizzle = state_slots[i].swizzle;
628 }
629 } else {
630 var->state_slots = NULL;
631 }
632
633 var->constant_initializer = constant_copy(ir->constant_initializer, var);
634
635 var->interface_type = ir->get_interface_type();
636
637 if (var->data.mode == nir_var_function_temp)
638 nir_function_impl_add_variable(impl, var);
639 else
640 nir_shader_add_variable(shader, var);
641
642 _mesa_hash_table_insert(var_table, ir, var);
643 }
644
645 ir_visitor_status
646 nir_function_visitor::visit_enter(ir_function *ir)
647 {
648 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
649 visitor->create_function(sig);
650 }
651 return visit_continue_with_parent;
652 }
653
654 void
655 nir_visitor::create_function(ir_function_signature *ir)
656 {
657 if (ir->is_intrinsic())
658 return;
659
660 nir_function *func = nir_function_create(shader, ir->function_name());
661 if (strcmp(ir->function_name(), "main") == 0)
662 func->is_entrypoint = true;
663
664 func->num_params = ir->parameters.length() +
665 (ir->return_type != glsl_type::void_type);
666 func->params = ralloc_array(shader, nir_parameter, func->num_params);
667
668 unsigned np = 0;
669
670 if (ir->return_type != glsl_type::void_type) {
671 /* The return value is a variable deref (basically an out parameter) */
672 func->params[np].num_components = 1;
673 func->params[np].bit_size = 32;
674 np++;
675 }
676
677 foreach_in_list(ir_variable, param, &ir->parameters) {
678 /* FINISHME: pass arrays, structs, etc by reference? */
679 assert(param->type->is_vector() || param->type->is_scalar());
680
681 if (param->data.mode == ir_var_function_in) {
682 func->params[np].num_components = param->type->vector_elements;
683 func->params[np].bit_size = glsl_get_bit_size(param->type);
684 } else {
685 func->params[np].num_components = 1;
686 func->params[np].bit_size = 32;
687 }
688 np++;
689 }
690 assert(np == func->num_params);
691
692 _mesa_hash_table_insert(this->overload_table, ir, func);
693 }
694
695 void
696 nir_visitor::visit(ir_function *ir)
697 {
698 foreach_in_list(ir_function_signature, sig, &ir->signatures)
699 sig->accept(this);
700 }
701
702 void
703 nir_visitor::visit(ir_function_signature *ir)
704 {
705 if (ir->is_intrinsic())
706 return;
707
708 this->sig = ir;
709
710 struct hash_entry *entry =
711 _mesa_hash_table_search(this->overload_table, ir);
712
713 assert(entry);
714 nir_function *func = (nir_function *) entry->data;
715
716 if (ir->is_defined) {
717 nir_function_impl *impl = nir_function_impl_create(func);
718 this->impl = impl;
719
720 this->is_global = false;
721
722 nir_builder_init(&b, impl);
723 b.cursor = nir_after_cf_list(&impl->body);
724
725 unsigned i = (ir->return_type != glsl_type::void_type) ? 1 : 0;
726
727 foreach_in_list(ir_variable, param, &ir->parameters) {
728 nir_variable *var =
729 nir_local_variable_create(impl, param->type, param->name);
730
731 if (param->data.mode == ir_var_function_in) {
732 nir_store_var(&b, var, nir_load_param(&b, i), ~0);
733 }
734
735 _mesa_hash_table_insert(var_table, param, var);
736 i++;
737 }
738
739 visit_exec_list(&ir->body, this);
740
741 this->is_global = true;
742 } else {
743 func->impl = NULL;
744 }
745 }
746
747 void
748 nir_visitor::visit(ir_loop *ir)
749 {
750 nir_push_loop(&b);
751 visit_exec_list(&ir->body_instructions, this);
752 nir_pop_loop(&b, NULL);
753 }
754
755 void
756 nir_visitor::visit(ir_if *ir)
757 {
758 nir_push_if(&b, evaluate_rvalue(ir->condition));
759 visit_exec_list(&ir->then_instructions, this);
760 nir_push_else(&b, NULL);
761 visit_exec_list(&ir->else_instructions, this);
762 nir_pop_if(&b, NULL);
763 }
764
765 void
766 nir_visitor::visit(ir_discard *ir)
767 {
768 /*
769 * discards aren't treated as control flow, because before we lower them
770 * they can appear anywhere in the shader and the stuff after them may still
771 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
772 * discards will be immediately followed by a return.
773 */
774
775 nir_intrinsic_instr *discard;
776 if (ir->condition) {
777 discard = nir_intrinsic_instr_create(this->shader,
778 nir_intrinsic_discard_if);
779 discard->src[0] =
780 nir_src_for_ssa(evaluate_rvalue(ir->condition));
781 } else {
782 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
783 }
784
785 nir_builder_instr_insert(&b, &discard->instr);
786 }
787
788 void
789 nir_visitor::visit(ir_demote *ir)
790 {
791 nir_intrinsic_instr *demote =
792 nir_intrinsic_instr_create(this->shader, nir_intrinsic_demote);
793
794 nir_builder_instr_insert(&b, &demote->instr);
795 }
796
797 void
798 nir_visitor::visit(ir_emit_vertex *ir)
799 {
800 nir_intrinsic_instr *instr =
801 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
802 nir_intrinsic_set_stream_id(instr, ir->stream_id());
803 nir_builder_instr_insert(&b, &instr->instr);
804 }
805
806 void
807 nir_visitor::visit(ir_end_primitive *ir)
808 {
809 nir_intrinsic_instr *instr =
810 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
811 nir_intrinsic_set_stream_id(instr, ir->stream_id());
812 nir_builder_instr_insert(&b, &instr->instr);
813 }
814
815 void
816 nir_visitor::visit(ir_loop_jump *ir)
817 {
818 nir_jump_type type;
819 switch (ir->mode) {
820 case ir_loop_jump::jump_break:
821 type = nir_jump_break;
822 break;
823 case ir_loop_jump::jump_continue:
824 type = nir_jump_continue;
825 break;
826 default:
827 unreachable("not reached");
828 }
829
830 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
831 nir_builder_instr_insert(&b, &instr->instr);
832 }
833
834 void
835 nir_visitor::visit(ir_return *ir)
836 {
837 if (ir->value != NULL) {
838 nir_deref_instr *ret_deref =
839 nir_build_deref_cast(&b, nir_load_param(&b, 0),
840 nir_var_function_temp, ir->value->type, 0);
841
842 nir_ssa_def *val = evaluate_rvalue(ir->value);
843 nir_store_deref(&b, ret_deref, val, ~0);
844 }
845
846 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
847 nir_builder_instr_insert(&b, &instr->instr);
848 }
849
850 static void
851 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
852 {
853 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
854 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
855 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
856 }
857
858 /* Accumulate any qualifiers along the deref chain to get the actual
859 * load/store qualifier.
860 */
861
862 static enum gl_access_qualifier
863 deref_get_qualifier(nir_deref_instr *deref)
864 {
865 nir_deref_path path;
866 nir_deref_path_init(&path, deref, NULL);
867
868 unsigned qualifiers = path.path[0]->var->data.access;
869
870 const glsl_type *parent_type = path.path[0]->type;
871 for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
872 nir_deref_instr *cur = *cur_ptr;
873
874 if (parent_type->is_interface()) {
875 const struct glsl_struct_field *field =
876 &parent_type->fields.structure[cur->strct.index];
877 if (field->memory_read_only)
878 qualifiers |= ACCESS_NON_WRITEABLE;
879 if (field->memory_write_only)
880 qualifiers |= ACCESS_NON_READABLE;
881 if (field->memory_coherent)
882 qualifiers |= ACCESS_COHERENT;
883 if (field->memory_volatile)
884 qualifiers |= ACCESS_VOLATILE;
885 if (field->memory_restrict)
886 qualifiers |= ACCESS_RESTRICT;
887 }
888
889 parent_type = cur->type;
890 }
891
892 nir_deref_path_finish(&path);
893
894 return (gl_access_qualifier) qualifiers;
895 }
896
897 void
898 nir_visitor::visit(ir_call *ir)
899 {
900 if (ir->callee->is_intrinsic()) {
901 nir_intrinsic_op op;
902
903 switch (ir->callee->intrinsic_id) {
904 case ir_intrinsic_generic_atomic_add:
905 op = ir->return_deref->type->is_integer_32_64()
906 ? nir_intrinsic_deref_atomic_add : nir_intrinsic_deref_atomic_fadd;
907 break;
908 case ir_intrinsic_generic_atomic_and:
909 op = nir_intrinsic_deref_atomic_and;
910 break;
911 case ir_intrinsic_generic_atomic_or:
912 op = nir_intrinsic_deref_atomic_or;
913 break;
914 case ir_intrinsic_generic_atomic_xor:
915 op = nir_intrinsic_deref_atomic_xor;
916 break;
917 case ir_intrinsic_generic_atomic_min:
918 assert(ir->return_deref);
919 if (ir->return_deref->type == glsl_type::int_type)
920 op = nir_intrinsic_deref_atomic_imin;
921 else if (ir->return_deref->type == glsl_type::uint_type)
922 op = nir_intrinsic_deref_atomic_umin;
923 else if (ir->return_deref->type == glsl_type::float_type)
924 op = nir_intrinsic_deref_atomic_fmin;
925 else
926 unreachable("Invalid type");
927 break;
928 case ir_intrinsic_generic_atomic_max:
929 assert(ir->return_deref);
930 if (ir->return_deref->type == glsl_type::int_type)
931 op = nir_intrinsic_deref_atomic_imax;
932 else if (ir->return_deref->type == glsl_type::uint_type)
933 op = nir_intrinsic_deref_atomic_umax;
934 else if (ir->return_deref->type == glsl_type::float_type)
935 op = nir_intrinsic_deref_atomic_fmax;
936 else
937 unreachable("Invalid type");
938 break;
939 case ir_intrinsic_generic_atomic_exchange:
940 op = nir_intrinsic_deref_atomic_exchange;
941 break;
942 case ir_intrinsic_generic_atomic_comp_swap:
943 op = ir->return_deref->type->is_integer_32_64()
944 ? nir_intrinsic_deref_atomic_comp_swap
945 : nir_intrinsic_deref_atomic_fcomp_swap;
946 break;
947 case ir_intrinsic_atomic_counter_read:
948 op = nir_intrinsic_atomic_counter_read_deref;
949 break;
950 case ir_intrinsic_atomic_counter_increment:
951 op = nir_intrinsic_atomic_counter_inc_deref;
952 break;
953 case ir_intrinsic_atomic_counter_predecrement:
954 op = nir_intrinsic_atomic_counter_pre_dec_deref;
955 break;
956 case ir_intrinsic_atomic_counter_add:
957 op = nir_intrinsic_atomic_counter_add_deref;
958 break;
959 case ir_intrinsic_atomic_counter_and:
960 op = nir_intrinsic_atomic_counter_and_deref;
961 break;
962 case ir_intrinsic_atomic_counter_or:
963 op = nir_intrinsic_atomic_counter_or_deref;
964 break;
965 case ir_intrinsic_atomic_counter_xor:
966 op = nir_intrinsic_atomic_counter_xor_deref;
967 break;
968 case ir_intrinsic_atomic_counter_min:
969 op = nir_intrinsic_atomic_counter_min_deref;
970 break;
971 case ir_intrinsic_atomic_counter_max:
972 op = nir_intrinsic_atomic_counter_max_deref;
973 break;
974 case ir_intrinsic_atomic_counter_exchange:
975 op = nir_intrinsic_atomic_counter_exchange_deref;
976 break;
977 case ir_intrinsic_atomic_counter_comp_swap:
978 op = nir_intrinsic_atomic_counter_comp_swap_deref;
979 break;
980 case ir_intrinsic_image_load:
981 op = nir_intrinsic_image_deref_load;
982 break;
983 case ir_intrinsic_image_store:
984 op = nir_intrinsic_image_deref_store;
985 break;
986 case ir_intrinsic_image_atomic_add:
987 op = ir->return_deref->type->is_integer_32_64()
988 ? nir_intrinsic_image_deref_atomic_add
989 : nir_intrinsic_image_deref_atomic_fadd;
990 break;
991 case ir_intrinsic_image_atomic_min:
992 if (ir->return_deref->type == glsl_type::int_type)
993 op = nir_intrinsic_image_deref_atomic_imin;
994 else if (ir->return_deref->type == glsl_type::uint_type)
995 op = nir_intrinsic_image_deref_atomic_umin;
996 else
997 unreachable("Invalid type");
998 break;
999 case ir_intrinsic_image_atomic_max:
1000 if (ir->return_deref->type == glsl_type::int_type)
1001 op = nir_intrinsic_image_deref_atomic_imax;
1002 else if (ir->return_deref->type == glsl_type::uint_type)
1003 op = nir_intrinsic_image_deref_atomic_umax;
1004 else
1005 unreachable("Invalid type");
1006 break;
1007 case ir_intrinsic_image_atomic_and:
1008 op = nir_intrinsic_image_deref_atomic_and;
1009 break;
1010 case ir_intrinsic_image_atomic_or:
1011 op = nir_intrinsic_image_deref_atomic_or;
1012 break;
1013 case ir_intrinsic_image_atomic_xor:
1014 op = nir_intrinsic_image_deref_atomic_xor;
1015 break;
1016 case ir_intrinsic_image_atomic_exchange:
1017 op = nir_intrinsic_image_deref_atomic_exchange;
1018 break;
1019 case ir_intrinsic_image_atomic_comp_swap:
1020 op = nir_intrinsic_image_deref_atomic_comp_swap;
1021 break;
1022 case ir_intrinsic_image_atomic_inc_wrap:
1023 op = nir_intrinsic_image_deref_atomic_inc_wrap;
1024 break;
1025 case ir_intrinsic_image_atomic_dec_wrap:
1026 op = nir_intrinsic_image_deref_atomic_dec_wrap;
1027 break;
1028 case ir_intrinsic_memory_barrier:
1029 op = nir_intrinsic_memory_barrier;
1030 break;
1031 case ir_intrinsic_image_size:
1032 op = nir_intrinsic_image_deref_size;
1033 break;
1034 case ir_intrinsic_image_samples:
1035 op = nir_intrinsic_image_deref_samples;
1036 break;
1037 case ir_intrinsic_ssbo_store:
1038 op = nir_intrinsic_store_ssbo;
1039 break;
1040 case ir_intrinsic_ssbo_load:
1041 op = nir_intrinsic_load_ssbo;
1042 break;
1043 case ir_intrinsic_ssbo_atomic_add:
1044 op = ir->return_deref->type->is_integer_32_64()
1045 ? nir_intrinsic_ssbo_atomic_add : nir_intrinsic_ssbo_atomic_fadd;
1046 break;
1047 case ir_intrinsic_ssbo_atomic_and:
1048 op = nir_intrinsic_ssbo_atomic_and;
1049 break;
1050 case ir_intrinsic_ssbo_atomic_or:
1051 op = nir_intrinsic_ssbo_atomic_or;
1052 break;
1053 case ir_intrinsic_ssbo_atomic_xor:
1054 op = nir_intrinsic_ssbo_atomic_xor;
1055 break;
1056 case ir_intrinsic_ssbo_atomic_min:
1057 assert(ir->return_deref);
1058 if (ir->return_deref->type == glsl_type::int_type)
1059 op = nir_intrinsic_ssbo_atomic_imin;
1060 else if (ir->return_deref->type == glsl_type::uint_type)
1061 op = nir_intrinsic_ssbo_atomic_umin;
1062 else if (ir->return_deref->type == glsl_type::float_type)
1063 op = nir_intrinsic_ssbo_atomic_fmin;
1064 else
1065 unreachable("Invalid type");
1066 break;
1067 case ir_intrinsic_ssbo_atomic_max:
1068 assert(ir->return_deref);
1069 if (ir->return_deref->type == glsl_type::int_type)
1070 op = nir_intrinsic_ssbo_atomic_imax;
1071 else if (ir->return_deref->type == glsl_type::uint_type)
1072 op = nir_intrinsic_ssbo_atomic_umax;
1073 else if (ir->return_deref->type == glsl_type::float_type)
1074 op = nir_intrinsic_ssbo_atomic_fmax;
1075 else
1076 unreachable("Invalid type");
1077 break;
1078 case ir_intrinsic_ssbo_atomic_exchange:
1079 op = nir_intrinsic_ssbo_atomic_exchange;
1080 break;
1081 case ir_intrinsic_ssbo_atomic_comp_swap:
1082 op = ir->return_deref->type->is_integer_32_64()
1083 ? nir_intrinsic_ssbo_atomic_comp_swap
1084 : nir_intrinsic_ssbo_atomic_fcomp_swap;
1085 break;
1086 case ir_intrinsic_shader_clock:
1087 op = nir_intrinsic_shader_clock;
1088 break;
1089 case ir_intrinsic_begin_invocation_interlock:
1090 op = nir_intrinsic_begin_invocation_interlock;
1091 break;
1092 case ir_intrinsic_end_invocation_interlock:
1093 op = nir_intrinsic_end_invocation_interlock;
1094 break;
1095 case ir_intrinsic_group_memory_barrier:
1096 op = nir_intrinsic_group_memory_barrier;
1097 break;
1098 case ir_intrinsic_memory_barrier_atomic_counter:
1099 op = nir_intrinsic_memory_barrier_atomic_counter;
1100 break;
1101 case ir_intrinsic_memory_barrier_buffer:
1102 op = nir_intrinsic_memory_barrier_buffer;
1103 break;
1104 case ir_intrinsic_memory_barrier_image:
1105 op = nir_intrinsic_memory_barrier_image;
1106 break;
1107 case ir_intrinsic_memory_barrier_shared:
1108 op = nir_intrinsic_memory_barrier_shared;
1109 break;
1110 case ir_intrinsic_shared_load:
1111 op = nir_intrinsic_load_shared;
1112 break;
1113 case ir_intrinsic_shared_store:
1114 op = nir_intrinsic_store_shared;
1115 break;
1116 case ir_intrinsic_shared_atomic_add:
1117 op = ir->return_deref->type->is_integer_32_64()
1118 ? nir_intrinsic_shared_atomic_add
1119 : nir_intrinsic_shared_atomic_fadd;
1120 break;
1121 case ir_intrinsic_shared_atomic_and:
1122 op = nir_intrinsic_shared_atomic_and;
1123 break;
1124 case ir_intrinsic_shared_atomic_or:
1125 op = nir_intrinsic_shared_atomic_or;
1126 break;
1127 case ir_intrinsic_shared_atomic_xor:
1128 op = nir_intrinsic_shared_atomic_xor;
1129 break;
1130 case ir_intrinsic_shared_atomic_min:
1131 assert(ir->return_deref);
1132 if (ir->return_deref->type == glsl_type::int_type)
1133 op = nir_intrinsic_shared_atomic_imin;
1134 else if (ir->return_deref->type == glsl_type::uint_type)
1135 op = nir_intrinsic_shared_atomic_umin;
1136 else if (ir->return_deref->type == glsl_type::float_type)
1137 op = nir_intrinsic_shared_atomic_fmin;
1138 else
1139 unreachable("Invalid type");
1140 break;
1141 case ir_intrinsic_shared_atomic_max:
1142 assert(ir->return_deref);
1143 if (ir->return_deref->type == glsl_type::int_type)
1144 op = nir_intrinsic_shared_atomic_imax;
1145 else if (ir->return_deref->type == glsl_type::uint_type)
1146 op = nir_intrinsic_shared_atomic_umax;
1147 else if (ir->return_deref->type == glsl_type::float_type)
1148 op = nir_intrinsic_shared_atomic_fmax;
1149 else
1150 unreachable("Invalid type");
1151 break;
1152 case ir_intrinsic_shared_atomic_exchange:
1153 op = nir_intrinsic_shared_atomic_exchange;
1154 break;
1155 case ir_intrinsic_shared_atomic_comp_swap:
1156 op = ir->return_deref->type->is_integer_32_64()
1157 ? nir_intrinsic_shared_atomic_comp_swap
1158 : nir_intrinsic_shared_atomic_fcomp_swap;
1159 break;
1160 case ir_intrinsic_vote_any:
1161 op = nir_intrinsic_vote_any;
1162 break;
1163 case ir_intrinsic_vote_all:
1164 op = nir_intrinsic_vote_all;
1165 break;
1166 case ir_intrinsic_vote_eq:
1167 op = nir_intrinsic_vote_ieq;
1168 break;
1169 case ir_intrinsic_ballot:
1170 op = nir_intrinsic_ballot;
1171 break;
1172 case ir_intrinsic_read_invocation:
1173 op = nir_intrinsic_read_invocation;
1174 break;
1175 case ir_intrinsic_read_first_invocation:
1176 op = nir_intrinsic_read_first_invocation;
1177 break;
1178 case ir_intrinsic_helper_invocation:
1179 op = nir_intrinsic_is_helper_invocation;
1180 break;
1181 default:
1182 unreachable("not reached");
1183 }
1184
1185 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
1186 nir_ssa_def *ret = &instr->dest.ssa;
1187
1188 switch (op) {
1189 case nir_intrinsic_deref_atomic_add:
1190 case nir_intrinsic_deref_atomic_imin:
1191 case nir_intrinsic_deref_atomic_umin:
1192 case nir_intrinsic_deref_atomic_imax:
1193 case nir_intrinsic_deref_atomic_umax:
1194 case nir_intrinsic_deref_atomic_and:
1195 case nir_intrinsic_deref_atomic_or:
1196 case nir_intrinsic_deref_atomic_xor:
1197 case nir_intrinsic_deref_atomic_exchange:
1198 case nir_intrinsic_deref_atomic_comp_swap:
1199 case nir_intrinsic_deref_atomic_fadd:
1200 case nir_intrinsic_deref_atomic_fmin:
1201 case nir_intrinsic_deref_atomic_fmax:
1202 case nir_intrinsic_deref_atomic_fcomp_swap: {
1203 int param_count = ir->actual_parameters.length();
1204 assert(param_count == 2 || param_count == 3);
1205
1206 /* Deref */
1207 exec_node *param = ir->actual_parameters.get_head();
1208 ir_rvalue *rvalue = (ir_rvalue *) param;
1209 ir_dereference *deref = rvalue->as_dereference();
1210 ir_swizzle *swizzle = NULL;
1211 if (!deref) {
1212 /* We may have a swizzle to pick off a single vec4 component */
1213 swizzle = rvalue->as_swizzle();
1214 assert(swizzle && swizzle->type->vector_elements == 1);
1215 deref = swizzle->val->as_dereference();
1216 assert(deref);
1217 }
1218 nir_deref_instr *nir_deref = evaluate_deref(deref);
1219 if (swizzle) {
1220 nir_deref = nir_build_deref_array_imm(&b, nir_deref,
1221 swizzle->mask.x);
1222 }
1223 instr->src[0] = nir_src_for_ssa(&nir_deref->dest.ssa);
1224
1225 nir_intrinsic_set_access(instr, deref_get_qualifier(nir_deref));
1226
1227 /* data1 parameter (this is always present) */
1228 param = param->get_next();
1229 ir_instruction *inst = (ir_instruction *) param;
1230 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1231
1232 /* data2 parameter (only with atomic_comp_swap) */
1233 if (param_count == 3) {
1234 assert(op == nir_intrinsic_deref_atomic_comp_swap ||
1235 op == nir_intrinsic_deref_atomic_fcomp_swap);
1236 param = param->get_next();
1237 inst = (ir_instruction *) param;
1238 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1239 }
1240
1241 /* Atomic result */
1242 assert(ir->return_deref);
1243 nir_ssa_dest_init(&instr->instr, &instr->dest,
1244 ir->return_deref->type->vector_elements, 32, NULL);
1245 nir_builder_instr_insert(&b, &instr->instr);
1246 break;
1247 }
1248 case nir_intrinsic_atomic_counter_read_deref:
1249 case nir_intrinsic_atomic_counter_inc_deref:
1250 case nir_intrinsic_atomic_counter_pre_dec_deref:
1251 case nir_intrinsic_atomic_counter_add_deref:
1252 case nir_intrinsic_atomic_counter_min_deref:
1253 case nir_intrinsic_atomic_counter_max_deref:
1254 case nir_intrinsic_atomic_counter_and_deref:
1255 case nir_intrinsic_atomic_counter_or_deref:
1256 case nir_intrinsic_atomic_counter_xor_deref:
1257 case nir_intrinsic_atomic_counter_exchange_deref:
1258 case nir_intrinsic_atomic_counter_comp_swap_deref: {
1259 /* Set the counter variable dereference. */
1260 exec_node *param = ir->actual_parameters.get_head();
1261 ir_dereference *counter = (ir_dereference *)param;
1262
1263 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
1264 param = param->get_next();
1265
1266 /* Set the intrinsic destination. */
1267 if (ir->return_deref) {
1268 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1269 }
1270
1271 /* Set the intrinsic parameters. */
1272 if (!param->is_tail_sentinel()) {
1273 instr->src[1] =
1274 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1275 param = param->get_next();
1276 }
1277
1278 if (!param->is_tail_sentinel()) {
1279 instr->src[2] =
1280 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1281 param = param->get_next();
1282 }
1283
1284 nir_builder_instr_insert(&b, &instr->instr);
1285 break;
1286 }
1287 case nir_intrinsic_image_deref_load:
1288 case nir_intrinsic_image_deref_store:
1289 case nir_intrinsic_image_deref_atomic_add:
1290 case nir_intrinsic_image_deref_atomic_imin:
1291 case nir_intrinsic_image_deref_atomic_umin:
1292 case nir_intrinsic_image_deref_atomic_imax:
1293 case nir_intrinsic_image_deref_atomic_umax:
1294 case nir_intrinsic_image_deref_atomic_and:
1295 case nir_intrinsic_image_deref_atomic_or:
1296 case nir_intrinsic_image_deref_atomic_xor:
1297 case nir_intrinsic_image_deref_atomic_exchange:
1298 case nir_intrinsic_image_deref_atomic_comp_swap:
1299 case nir_intrinsic_image_deref_atomic_fadd:
1300 case nir_intrinsic_image_deref_samples:
1301 case nir_intrinsic_image_deref_size:
1302 case nir_intrinsic_image_deref_atomic_inc_wrap:
1303 case nir_intrinsic_image_deref_atomic_dec_wrap: {
1304 nir_ssa_undef_instr *instr_undef =
1305 nir_ssa_undef_instr_create(shader, 1, 32);
1306 nir_builder_instr_insert(&b, &instr_undef->instr);
1307
1308 /* Set the image variable dereference. */
1309 exec_node *param = ir->actual_parameters.get_head();
1310 ir_dereference *image = (ir_dereference *)param;
1311 nir_deref_instr *deref = evaluate_deref(image);
1312 const glsl_type *type = deref->type;
1313
1314 nir_intrinsic_set_access(instr, deref_get_qualifier(deref));
1315
1316 instr->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1317 param = param->get_next();
1318
1319 /* Set the intrinsic destination. */
1320 if (ir->return_deref) {
1321 unsigned num_components = ir->return_deref->type->vector_elements;
1322 nir_ssa_dest_init(&instr->instr, &instr->dest,
1323 num_components, 32, NULL);
1324 }
1325
1326 if (op == nir_intrinsic_image_deref_size) {
1327 instr->num_components = instr->dest.ssa.num_components;
1328 } else if (op == nir_intrinsic_image_deref_load ||
1329 op == nir_intrinsic_image_deref_store) {
1330 instr->num_components = 4;
1331 }
1332
1333 if (op == nir_intrinsic_image_deref_size ||
1334 op == nir_intrinsic_image_deref_samples) {
1335 nir_builder_instr_insert(&b, &instr->instr);
1336 break;
1337 }
1338
1339 /* Set the address argument, extending the coordinate vector to four
1340 * components.
1341 */
1342 nir_ssa_def *src_addr =
1343 evaluate_rvalue((ir_dereference *)param);
1344 nir_ssa_def *srcs[4];
1345
1346 for (int i = 0; i < 4; i++) {
1347 if (i < type->coordinate_components())
1348 srcs[i] = nir_channel(&b, src_addr, i);
1349 else
1350 srcs[i] = &instr_undef->def;
1351 }
1352
1353 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
1354 param = param->get_next();
1355
1356 /* Set the sample argument, which is undefined for single-sample
1357 * images.
1358 */
1359 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
1360 instr->src[2] =
1361 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1362 param = param->get_next();
1363 } else {
1364 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
1365 }
1366
1367 /* Set the intrinsic parameters. */
1368 if (!param->is_tail_sentinel()) {
1369 instr->src[3] =
1370 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1371 param = param->get_next();
1372 }
1373
1374 if (!param->is_tail_sentinel()) {
1375 instr->src[4] =
1376 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1377 param = param->get_next();
1378 }
1379 nir_builder_instr_insert(&b, &instr->instr);
1380 break;
1381 }
1382 case nir_intrinsic_memory_barrier:
1383 case nir_intrinsic_group_memory_barrier:
1384 case nir_intrinsic_memory_barrier_atomic_counter:
1385 case nir_intrinsic_memory_barrier_buffer:
1386 case nir_intrinsic_memory_barrier_image:
1387 case nir_intrinsic_memory_barrier_shared:
1388 nir_builder_instr_insert(&b, &instr->instr);
1389 break;
1390 case nir_intrinsic_shader_clock:
1391 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
1392 instr->num_components = 2;
1393 nir_builder_instr_insert(&b, &instr->instr);
1394 break;
1395 case nir_intrinsic_begin_invocation_interlock:
1396 nir_builder_instr_insert(&b, &instr->instr);
1397 break;
1398 case nir_intrinsic_end_invocation_interlock:
1399 nir_builder_instr_insert(&b, &instr->instr);
1400 break;
1401 case nir_intrinsic_store_ssbo: {
1402 exec_node *param = ir->actual_parameters.get_head();
1403 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1404
1405 param = param->get_next();
1406 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1407
1408 param = param->get_next();
1409 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1410
1411 param = param->get_next();
1412 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1413 assert(write_mask);
1414
1415 nir_ssa_def *nir_val = evaluate_rvalue(val);
1416 if (val->type->is_boolean())
1417 nir_val = nir_b2i32(&b, nir_val);
1418
1419 instr->src[0] = nir_src_for_ssa(nir_val);
1420 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1421 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1422 intrinsic_set_std430_align(instr, val->type);
1423 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1424 instr->num_components = val->type->vector_elements;
1425
1426 nir_builder_instr_insert(&b, &instr->instr);
1427 break;
1428 }
1429 case nir_intrinsic_load_ssbo: {
1430 exec_node *param = ir->actual_parameters.get_head();
1431 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1432
1433 param = param->get_next();
1434 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1435
1436 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1437 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1438
1439 const glsl_type *type = ir->return_deref->var->type;
1440 instr->num_components = type->vector_elements;
1441 intrinsic_set_std430_align(instr, type);
1442
1443 /* Setup destination register */
1444 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1445 nir_ssa_dest_init(&instr->instr, &instr->dest,
1446 type->vector_elements, bit_size, NULL);
1447
1448 /* Insert the created nir instruction now since in the case of boolean
1449 * result we will need to emit another instruction after it
1450 */
1451 nir_builder_instr_insert(&b, &instr->instr);
1452
1453 /*
1454 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1455 * consider a true boolean to be ~0. Fix this up with a != 0
1456 * comparison.
1457 */
1458 if (type->is_boolean())
1459 ret = nir_i2b(&b, &instr->dest.ssa);
1460 break;
1461 }
1462 case nir_intrinsic_ssbo_atomic_add:
1463 case nir_intrinsic_ssbo_atomic_imin:
1464 case nir_intrinsic_ssbo_atomic_umin:
1465 case nir_intrinsic_ssbo_atomic_imax:
1466 case nir_intrinsic_ssbo_atomic_umax:
1467 case nir_intrinsic_ssbo_atomic_and:
1468 case nir_intrinsic_ssbo_atomic_or:
1469 case nir_intrinsic_ssbo_atomic_xor:
1470 case nir_intrinsic_ssbo_atomic_exchange:
1471 case nir_intrinsic_ssbo_atomic_comp_swap:
1472 case nir_intrinsic_ssbo_atomic_fadd:
1473 case nir_intrinsic_ssbo_atomic_fmin:
1474 case nir_intrinsic_ssbo_atomic_fmax:
1475 case nir_intrinsic_ssbo_atomic_fcomp_swap: {
1476 int param_count = ir->actual_parameters.length();
1477 assert(param_count == 3 || param_count == 4);
1478
1479 /* Block index */
1480 exec_node *param = ir->actual_parameters.get_head();
1481 ir_instruction *inst = (ir_instruction *) param;
1482 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1483
1484 /* Offset */
1485 param = param->get_next();
1486 inst = (ir_instruction *) param;
1487 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1488
1489 /* data1 parameter (this is always present) */
1490 param = param->get_next();
1491 inst = (ir_instruction *) param;
1492 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1493
1494 /* data2 parameter (only with atomic_comp_swap) */
1495 if (param_count == 4) {
1496 assert(op == nir_intrinsic_ssbo_atomic_comp_swap ||
1497 op == nir_intrinsic_ssbo_atomic_fcomp_swap);
1498 param = param->get_next();
1499 inst = (ir_instruction *) param;
1500 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1501 }
1502
1503 /* Atomic result */
1504 assert(ir->return_deref);
1505 nir_ssa_dest_init(&instr->instr, &instr->dest,
1506 ir->return_deref->type->vector_elements, 32, NULL);
1507 nir_builder_instr_insert(&b, &instr->instr);
1508 break;
1509 }
1510 case nir_intrinsic_load_shared: {
1511 exec_node *param = ir->actual_parameters.get_head();
1512 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1513
1514 nir_intrinsic_set_base(instr, 0);
1515 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1516
1517 const glsl_type *type = ir->return_deref->var->type;
1518 instr->num_components = type->vector_elements;
1519 intrinsic_set_std430_align(instr, type);
1520
1521 /* Setup destination register */
1522 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1523 nir_ssa_dest_init(&instr->instr, &instr->dest,
1524 type->vector_elements, bit_size, NULL);
1525
1526 nir_builder_instr_insert(&b, &instr->instr);
1527
1528 /* The value in shared memory is a 32-bit value */
1529 if (type->is_boolean())
1530 ret = nir_i2b(&b, &instr->dest.ssa);
1531 break;
1532 }
1533 case nir_intrinsic_store_shared: {
1534 exec_node *param = ir->actual_parameters.get_head();
1535 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1536
1537 param = param->get_next();
1538 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1539
1540 param = param->get_next();
1541 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1542 assert(write_mask);
1543
1544 nir_intrinsic_set_base(instr, 0);
1545 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1546
1547 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1548
1549 nir_ssa_def *nir_val = evaluate_rvalue(val);
1550 /* The value in shared memory is a 32-bit value */
1551 if (val->type->is_boolean())
1552 nir_val = nir_b2i32(&b, nir_val);
1553
1554 instr->src[0] = nir_src_for_ssa(nir_val);
1555 instr->num_components = val->type->vector_elements;
1556 intrinsic_set_std430_align(instr, val->type);
1557
1558 nir_builder_instr_insert(&b, &instr->instr);
1559 break;
1560 }
1561 case nir_intrinsic_shared_atomic_add:
1562 case nir_intrinsic_shared_atomic_imin:
1563 case nir_intrinsic_shared_atomic_umin:
1564 case nir_intrinsic_shared_atomic_imax:
1565 case nir_intrinsic_shared_atomic_umax:
1566 case nir_intrinsic_shared_atomic_and:
1567 case nir_intrinsic_shared_atomic_or:
1568 case nir_intrinsic_shared_atomic_xor:
1569 case nir_intrinsic_shared_atomic_exchange:
1570 case nir_intrinsic_shared_atomic_comp_swap:
1571 case nir_intrinsic_shared_atomic_fadd:
1572 case nir_intrinsic_shared_atomic_fmin:
1573 case nir_intrinsic_shared_atomic_fmax:
1574 case nir_intrinsic_shared_atomic_fcomp_swap: {
1575 int param_count = ir->actual_parameters.length();
1576 assert(param_count == 2 || param_count == 3);
1577
1578 /* Offset */
1579 exec_node *param = ir->actual_parameters.get_head();
1580 ir_instruction *inst = (ir_instruction *) param;
1581 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1582
1583 /* data1 parameter (this is always present) */
1584 param = param->get_next();
1585 inst = (ir_instruction *) param;
1586 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1587
1588 /* data2 parameter (only with atomic_comp_swap) */
1589 if (param_count == 3) {
1590 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1591 op == nir_intrinsic_shared_atomic_fcomp_swap);
1592 param = param->get_next();
1593 inst = (ir_instruction *) param;
1594 instr->src[2] =
1595 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1596 }
1597
1598 /* Atomic result */
1599 assert(ir->return_deref);
1600 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1601 nir_ssa_dest_init(&instr->instr, &instr->dest,
1602 ir->return_deref->type->vector_elements,
1603 bit_size, NULL);
1604 nir_builder_instr_insert(&b, &instr->instr);
1605 break;
1606 }
1607 case nir_intrinsic_vote_any:
1608 case nir_intrinsic_vote_all:
1609 case nir_intrinsic_vote_ieq: {
1610 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1611 instr->num_components = 1;
1612
1613 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1614 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1615
1616 nir_builder_instr_insert(&b, &instr->instr);
1617 break;
1618 }
1619
1620 case nir_intrinsic_ballot: {
1621 nir_ssa_dest_init(&instr->instr, &instr->dest,
1622 ir->return_deref->type->vector_elements, 64, NULL);
1623 instr->num_components = ir->return_deref->type->vector_elements;
1624
1625 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1626 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1627
1628 nir_builder_instr_insert(&b, &instr->instr);
1629 break;
1630 }
1631 case nir_intrinsic_read_invocation: {
1632 nir_ssa_dest_init(&instr->instr, &instr->dest,
1633 ir->return_deref->type->vector_elements, 32, NULL);
1634 instr->num_components = ir->return_deref->type->vector_elements;
1635
1636 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1637 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1638
1639 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1640 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1641
1642 nir_builder_instr_insert(&b, &instr->instr);
1643 break;
1644 }
1645 case nir_intrinsic_read_first_invocation: {
1646 nir_ssa_dest_init(&instr->instr, &instr->dest,
1647 ir->return_deref->type->vector_elements, 32, NULL);
1648 instr->num_components = ir->return_deref->type->vector_elements;
1649
1650 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1651 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1652
1653 nir_builder_instr_insert(&b, &instr->instr);
1654 break;
1655 }
1656 case nir_intrinsic_is_helper_invocation: {
1657 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1658 instr->num_components = 1;
1659 nir_builder_instr_insert(&b, &instr->instr);
1660 break;
1661 }
1662 default:
1663 unreachable("not reached");
1664 }
1665
1666 if (ir->return_deref)
1667 nir_store_deref(&b, evaluate_deref(ir->return_deref), ret, ~0);
1668
1669 return;
1670 }
1671
1672 struct hash_entry *entry =
1673 _mesa_hash_table_search(this->overload_table, ir->callee);
1674 assert(entry);
1675 nir_function *callee = (nir_function *) entry->data;
1676
1677 nir_call_instr *call = nir_call_instr_create(this->shader, callee);
1678
1679 unsigned i = 0;
1680 nir_deref_instr *ret_deref = NULL;
1681 if (ir->return_deref) {
1682 nir_variable *ret_tmp =
1683 nir_local_variable_create(this->impl, ir->return_deref->type,
1684 "return_tmp");
1685 ret_deref = nir_build_deref_var(&b, ret_tmp);
1686 call->params[i++] = nir_src_for_ssa(&ret_deref->dest.ssa);
1687 }
1688
1689 foreach_two_lists(formal_node, &ir->callee->parameters,
1690 actual_node, &ir->actual_parameters) {
1691 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1692 ir_variable *sig_param = (ir_variable *) formal_node;
1693
1694 if (sig_param->data.mode == ir_var_function_out) {
1695 nir_deref_instr *out_deref = evaluate_deref(param_rvalue);
1696 call->params[i] = nir_src_for_ssa(&out_deref->dest.ssa);
1697 } else if (sig_param->data.mode == ir_var_function_in) {
1698 nir_ssa_def *val = evaluate_rvalue(param_rvalue);
1699 nir_src src = nir_src_for_ssa(val);
1700
1701 nir_src_copy(&call->params[i], &src, call);
1702 } else if (sig_param->data.mode == ir_var_function_inout) {
1703 unreachable("unimplemented: inout parameters");
1704 }
1705
1706 i++;
1707 }
1708
1709 nir_builder_instr_insert(&b, &call->instr);
1710
1711 if (ir->return_deref)
1712 nir_store_deref(&b, evaluate_deref(ir->return_deref), nir_load_deref(&b, ret_deref), ~0);
1713 }
1714
1715 void
1716 nir_visitor::visit(ir_assignment *ir)
1717 {
1718 unsigned num_components = ir->lhs->type->vector_elements;
1719
1720 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1721 ir->lhs->variable_referenced()->data.precise;
1722
1723 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1724 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1725 nir_deref_instr *lhs = evaluate_deref(ir->lhs);
1726 nir_deref_instr *rhs = evaluate_deref(ir->rhs);
1727 enum gl_access_qualifier lhs_qualifiers = deref_get_qualifier(lhs);
1728 enum gl_access_qualifier rhs_qualifiers = deref_get_qualifier(rhs);
1729 if (ir->condition) {
1730 nir_push_if(&b, evaluate_rvalue(ir->condition));
1731 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1732 rhs_qualifiers);
1733 nir_pop_if(&b, NULL);
1734 } else {
1735 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1736 rhs_qualifiers);
1737 }
1738 return;
1739 }
1740
1741 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1742
1743 ir->lhs->accept(this);
1744 nir_deref_instr *lhs_deref = this->deref;
1745 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1746
1747 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1748 /* GLSL IR will give us the input to the write-masked assignment in a
1749 * single packed vector. So, for example, if the writemask is xzw, then
1750 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1751 * from the load.
1752 */
1753 unsigned swiz[4];
1754 unsigned component = 0;
1755 for (unsigned i = 0; i < 4; i++) {
1756 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1757 }
1758 src = nir_swizzle(&b, src, swiz, num_components);
1759 }
1760
1761 enum gl_access_qualifier qualifiers = deref_get_qualifier(lhs_deref);
1762 if (ir->condition) {
1763 nir_push_if(&b, evaluate_rvalue(ir->condition));
1764 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1765 qualifiers);
1766 nir_pop_if(&b, NULL);
1767 } else {
1768 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1769 qualifiers);
1770 }
1771 }
1772
1773 /*
1774 * Given an instruction, returns a pointer to its destination or NULL if there
1775 * is no destination.
1776 *
1777 * Note that this only handles instructions we generate at this level.
1778 */
1779 static nir_dest *
1780 get_instr_dest(nir_instr *instr)
1781 {
1782 nir_alu_instr *alu_instr;
1783 nir_intrinsic_instr *intrinsic_instr;
1784 nir_tex_instr *tex_instr;
1785
1786 switch (instr->type) {
1787 case nir_instr_type_alu:
1788 alu_instr = nir_instr_as_alu(instr);
1789 return &alu_instr->dest.dest;
1790
1791 case nir_instr_type_intrinsic:
1792 intrinsic_instr = nir_instr_as_intrinsic(instr);
1793 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1794 return &intrinsic_instr->dest;
1795 else
1796 return NULL;
1797
1798 case nir_instr_type_tex:
1799 tex_instr = nir_instr_as_tex(instr);
1800 return &tex_instr->dest;
1801
1802 default:
1803 unreachable("not reached");
1804 }
1805
1806 return NULL;
1807 }
1808
1809 void
1810 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1811 unsigned bit_size)
1812 {
1813 nir_dest *dest = get_instr_dest(instr);
1814
1815 if (dest)
1816 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1817
1818 nir_builder_instr_insert(&b, instr);
1819
1820 if (dest) {
1821 assert(dest->is_ssa);
1822 this->result = &dest->ssa;
1823 }
1824 }
1825
1826 nir_ssa_def *
1827 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1828 {
1829 ir->accept(this);
1830 if (ir->as_dereference() || ir->as_constant()) {
1831 /*
1832 * A dereference is being used on the right hand side, which means we
1833 * must emit a variable load.
1834 */
1835
1836 enum gl_access_qualifier access = deref_get_qualifier(this->deref);
1837 this->result = nir_load_deref_with_access(&b, this->deref, access);
1838 }
1839
1840 return this->result;
1841 }
1842
1843 static bool
1844 type_is_float(glsl_base_type type)
1845 {
1846 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1847 type == GLSL_TYPE_FLOAT16;
1848 }
1849
1850 static bool
1851 type_is_signed(glsl_base_type type)
1852 {
1853 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1854 type == GLSL_TYPE_INT16;
1855 }
1856
1857 void
1858 nir_visitor::visit(ir_expression *ir)
1859 {
1860 /* Some special cases */
1861 switch (ir->operation) {
1862 case ir_binop_ubo_load: {
1863 nir_intrinsic_instr *load =
1864 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1865 unsigned bit_size = ir->type->is_boolean() ? 32 :
1866 glsl_get_bit_size(ir->type);
1867 load->num_components = ir->type->vector_elements;
1868 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1869 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1870 intrinsic_set_std430_align(load, ir->type);
1871 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1872
1873 /*
1874 * In UBO's, a true boolean value is any non-zero value, but we consider
1875 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1876 */
1877
1878 if (ir->type->is_boolean())
1879 this->result = nir_i2b(&b, &load->dest.ssa);
1880
1881 return;
1882 }
1883
1884 case ir_unop_interpolate_at_centroid:
1885 case ir_binop_interpolate_at_offset:
1886 case ir_binop_interpolate_at_sample: {
1887 ir_dereference *deref = ir->operands[0]->as_dereference();
1888 ir_swizzle *swizzle = NULL;
1889 if (!deref) {
1890 /* the api does not allow a swizzle here, but the varying packing code
1891 * may have pushed one into here.
1892 */
1893 swizzle = ir->operands[0]->as_swizzle();
1894 assert(swizzle);
1895 deref = swizzle->val->as_dereference();
1896 assert(deref);
1897 }
1898
1899 deref->accept(this);
1900
1901 nir_intrinsic_op op;
1902 if (this->deref->mode == nir_var_shader_in) {
1903 switch (ir->operation) {
1904 case ir_unop_interpolate_at_centroid:
1905 op = nir_intrinsic_interp_deref_at_centroid;
1906 break;
1907 case ir_binop_interpolate_at_offset:
1908 op = nir_intrinsic_interp_deref_at_offset;
1909 break;
1910 case ir_binop_interpolate_at_sample:
1911 op = nir_intrinsic_interp_deref_at_sample;
1912 break;
1913 default:
1914 unreachable("Invalid interpolation intrinsic");
1915 }
1916 } else {
1917 /* This case can happen if the vertex shader does not write the
1918 * given varying. In this case, the linker will lower it to a
1919 * global variable. Since interpolating a variable makes no
1920 * sense, we'll just turn it into a load which will probably
1921 * eventually end up as an SSA definition.
1922 */
1923 assert(this->deref->mode == nir_var_shader_temp);
1924 op = nir_intrinsic_load_deref;
1925 }
1926
1927 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1928 intrin->num_components = deref->type->vector_elements;
1929 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1930
1931 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1932 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1933 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1934
1935 unsigned bit_size = glsl_get_bit_size(deref->type);
1936 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1937
1938 if (swizzle) {
1939 unsigned swiz[4] = {
1940 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1941 };
1942
1943 result = nir_swizzle(&b, result, swiz,
1944 swizzle->type->vector_elements);
1945 }
1946
1947 return;
1948 }
1949
1950 case ir_unop_ssbo_unsized_array_length: {
1951 nir_intrinsic_instr *intrin =
1952 nir_intrinsic_instr_create(b.shader,
1953 nir_intrinsic_deref_buffer_array_length);
1954
1955 ir_dereference *deref = ir->operands[0]->as_dereference();
1956 intrin->src[0] = nir_src_for_ssa(&evaluate_deref(deref)->dest.ssa);
1957
1958 add_instr(&intrin->instr, 1, 32);
1959 return;
1960 }
1961
1962 default:
1963 break;
1964 }
1965
1966 nir_ssa_def *srcs[4];
1967 for (unsigned i = 0; i < ir->num_operands; i++)
1968 srcs[i] = evaluate_rvalue(ir->operands[i]);
1969
1970 glsl_base_type types[4];
1971 for (unsigned i = 0; i < ir->num_operands; i++)
1972 types[i] = ir->operands[i]->type->base_type;
1973
1974 glsl_base_type out_type = ir->type->base_type;
1975
1976 switch (ir->operation) {
1977 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1978 case ir_unop_logic_not:
1979 result = nir_inot(&b, srcs[0]);
1980 break;
1981 case ir_unop_neg:
1982 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1983 : nir_ineg(&b, srcs[0]);
1984 break;
1985 case ir_unop_abs:
1986 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1987 : nir_iabs(&b, srcs[0]);
1988 break;
1989 case ir_unop_saturate:
1990 assert(type_is_float(types[0]));
1991 result = nir_fsat(&b, srcs[0]);
1992 break;
1993 case ir_unop_sign:
1994 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1995 : nir_isign(&b, srcs[0]);
1996 break;
1997 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1998 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1999 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
2000 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
2001 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
2002 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
2003 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
2004 case ir_unop_i2f:
2005 case ir_unop_u2f:
2006 case ir_unop_b2f:
2007 case ir_unop_f2i:
2008 case ir_unop_f2u:
2009 case ir_unop_f2b:
2010 case ir_unop_i2b:
2011 case ir_unop_b2i:
2012 case ir_unop_b2i64:
2013 case ir_unop_d2f:
2014 case ir_unop_f2d:
2015 case ir_unop_d2i:
2016 case ir_unop_d2u:
2017 case ir_unop_d2b:
2018 case ir_unop_i2d:
2019 case ir_unop_u2d:
2020 case ir_unop_i642i:
2021 case ir_unop_i642u:
2022 case ir_unop_i642f:
2023 case ir_unop_i642b:
2024 case ir_unop_i642d:
2025 case ir_unop_u642i:
2026 case ir_unop_u642u:
2027 case ir_unop_u642f:
2028 case ir_unop_u642d:
2029 case ir_unop_i2i64:
2030 case ir_unop_u2i64:
2031 case ir_unop_f2i64:
2032 case ir_unop_d2i64:
2033 case ir_unop_i2u64:
2034 case ir_unop_u2u64:
2035 case ir_unop_f2u64:
2036 case ir_unop_d2u64:
2037 case ir_unop_i2u:
2038 case ir_unop_u2i:
2039 case ir_unop_i642u64:
2040 case ir_unop_u642i64: {
2041 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
2042 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
2043 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
2044 nir_rounding_mode_undef),
2045 srcs[0], NULL, NULL, NULL);
2046 /* b2i and b2f don't have fixed bit-size versions so the builder will
2047 * just assume 32 and we have to fix it up here.
2048 */
2049 result->bit_size = nir_alu_type_get_type_size(dst_type);
2050 break;
2051 }
2052
2053 case ir_unop_bitcast_i2f:
2054 case ir_unop_bitcast_f2i:
2055 case ir_unop_bitcast_u2f:
2056 case ir_unop_bitcast_f2u:
2057 case ir_unop_bitcast_i642d:
2058 case ir_unop_bitcast_d2i64:
2059 case ir_unop_bitcast_u642d:
2060 case ir_unop_bitcast_d2u64:
2061 case ir_unop_subroutine_to_int:
2062 /* no-op */
2063 result = nir_mov(&b, srcs[0]);
2064 break;
2065 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
2066 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
2067 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
2068 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
2069 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
2070 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
2071 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
2072 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
2073 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
2074 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
2075 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
2076 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
2077 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
2078 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
2079 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
2080 case ir_unop_pack_snorm_2x16:
2081 result = nir_pack_snorm_2x16(&b, srcs[0]);
2082 break;
2083 case ir_unop_pack_snorm_4x8:
2084 result = nir_pack_snorm_4x8(&b, srcs[0]);
2085 break;
2086 case ir_unop_pack_unorm_2x16:
2087 result = nir_pack_unorm_2x16(&b, srcs[0]);
2088 break;
2089 case ir_unop_pack_unorm_4x8:
2090 result = nir_pack_unorm_4x8(&b, srcs[0]);
2091 break;
2092 case ir_unop_pack_half_2x16:
2093 result = nir_pack_half_2x16(&b, srcs[0]);
2094 break;
2095 case ir_unop_unpack_snorm_2x16:
2096 result = nir_unpack_snorm_2x16(&b, srcs[0]);
2097 break;
2098 case ir_unop_unpack_snorm_4x8:
2099 result = nir_unpack_snorm_4x8(&b, srcs[0]);
2100 break;
2101 case ir_unop_unpack_unorm_2x16:
2102 result = nir_unpack_unorm_2x16(&b, srcs[0]);
2103 break;
2104 case ir_unop_unpack_unorm_4x8:
2105 result = nir_unpack_unorm_4x8(&b, srcs[0]);
2106 break;
2107 case ir_unop_unpack_half_2x16:
2108 result = nir_unpack_half_2x16(&b, srcs[0]);
2109 break;
2110 case ir_unop_pack_sampler_2x32:
2111 case ir_unop_pack_image_2x32:
2112 case ir_unop_pack_double_2x32:
2113 case ir_unop_pack_int_2x32:
2114 case ir_unop_pack_uint_2x32:
2115 result = nir_pack_64_2x32(&b, srcs[0]);
2116 break;
2117 case ir_unop_unpack_sampler_2x32:
2118 case ir_unop_unpack_image_2x32:
2119 case ir_unop_unpack_double_2x32:
2120 case ir_unop_unpack_int_2x32:
2121 case ir_unop_unpack_uint_2x32:
2122 result = nir_unpack_64_2x32(&b, srcs[0]);
2123 break;
2124 case ir_unop_bitfield_reverse:
2125 result = nir_bitfield_reverse(&b, srcs[0]);
2126 break;
2127 case ir_unop_bit_count:
2128 result = nir_bit_count(&b, srcs[0]);
2129 break;
2130 case ir_unop_find_msb:
2131 switch (types[0]) {
2132 case GLSL_TYPE_UINT:
2133 result = nir_ufind_msb(&b, srcs[0]);
2134 break;
2135 case GLSL_TYPE_INT:
2136 result = nir_ifind_msb(&b, srcs[0]);
2137 break;
2138 default:
2139 unreachable("Invalid type for findMSB()");
2140 }
2141 break;
2142 case ir_unop_find_lsb:
2143 result = nir_find_lsb(&b, srcs[0]);
2144 break;
2145
2146 case ir_unop_noise:
2147 switch (ir->type->vector_elements) {
2148 case 1:
2149 switch (ir->operands[0]->type->vector_elements) {
2150 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
2151 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
2152 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
2153 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
2154 default: unreachable("not reached");
2155 }
2156 break;
2157 case 2:
2158 switch (ir->operands[0]->type->vector_elements) {
2159 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
2160 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
2161 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
2162 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
2163 default: unreachable("not reached");
2164 }
2165 break;
2166 case 3:
2167 switch (ir->operands[0]->type->vector_elements) {
2168 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
2169 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
2170 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
2171 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
2172 default: unreachable("not reached");
2173 }
2174 break;
2175 case 4:
2176 switch (ir->operands[0]->type->vector_elements) {
2177 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
2178 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
2179 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
2180 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
2181 default: unreachable("not reached");
2182 }
2183 break;
2184 default:
2185 unreachable("not reached");
2186 }
2187 break;
2188 case ir_unop_get_buffer_size: {
2189 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
2190 this->shader,
2191 nir_intrinsic_get_buffer_size);
2192 load->num_components = ir->type->vector_elements;
2193 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
2194 unsigned bit_size = glsl_get_bit_size(ir->type);
2195 add_instr(&load->instr, ir->type->vector_elements, bit_size);
2196 return;
2197 }
2198
2199 case ir_unop_atan:
2200 result = nir_atan(&b, srcs[0]);
2201 break;
2202
2203 case ir_binop_add:
2204 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
2205 : nir_iadd(&b, srcs[0], srcs[1]);
2206 break;
2207 case ir_binop_sub:
2208 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
2209 : nir_isub(&b, srcs[0], srcs[1]);
2210 break;
2211 case ir_binop_mul:
2212 if (type_is_float(out_type))
2213 result = nir_fmul(&b, srcs[0], srcs[1]);
2214 else if (out_type == GLSL_TYPE_INT64 &&
2215 (ir->operands[0]->type->base_type == GLSL_TYPE_INT ||
2216 ir->operands[1]->type->base_type == GLSL_TYPE_INT))
2217 result = nir_imul_2x32_64(&b, srcs[0], srcs[1]);
2218 else if (out_type == GLSL_TYPE_UINT64 &&
2219 (ir->operands[0]->type->base_type == GLSL_TYPE_UINT ||
2220 ir->operands[1]->type->base_type == GLSL_TYPE_UINT))
2221 result = nir_umul_2x32_64(&b, srcs[0], srcs[1]);
2222 else
2223 result = nir_imul(&b, srcs[0], srcs[1]);
2224 break;
2225 case ir_binop_div:
2226 if (type_is_float(out_type))
2227 result = nir_fdiv(&b, srcs[0], srcs[1]);
2228 else if (type_is_signed(out_type))
2229 result = nir_idiv(&b, srcs[0], srcs[1]);
2230 else
2231 result = nir_udiv(&b, srcs[0], srcs[1]);
2232 break;
2233 case ir_binop_mod:
2234 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
2235 : nir_umod(&b, srcs[0], srcs[1]);
2236 break;
2237 case ir_binop_min:
2238 if (type_is_float(out_type))
2239 result = nir_fmin(&b, srcs[0], srcs[1]);
2240 else if (type_is_signed(out_type))
2241 result = nir_imin(&b, srcs[0], srcs[1]);
2242 else
2243 result = nir_umin(&b, srcs[0], srcs[1]);
2244 break;
2245 case ir_binop_max:
2246 if (type_is_float(out_type))
2247 result = nir_fmax(&b, srcs[0], srcs[1]);
2248 else if (type_is_signed(out_type))
2249 result = nir_imax(&b, srcs[0], srcs[1]);
2250 else
2251 result = nir_umax(&b, srcs[0], srcs[1]);
2252 break;
2253 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
2254 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
2255 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
2256 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
2257 case ir_binop_logic_and:
2258 result = nir_iand(&b, srcs[0], srcs[1]);
2259 break;
2260 case ir_binop_logic_or:
2261 result = nir_ior(&b, srcs[0], srcs[1]);
2262 break;
2263 case ir_binop_logic_xor:
2264 result = nir_ixor(&b, srcs[0], srcs[1]);
2265 break;
2266 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
2267 case ir_binop_rshift:
2268 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
2269 : nir_ushr(&b, srcs[0], srcs[1]);
2270 break;
2271 case ir_binop_imul_high:
2272 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
2273 : nir_umul_high(&b, srcs[0], srcs[1]);
2274 break;
2275 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
2276 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
2277 case ir_binop_less:
2278 if (type_is_float(types[0]))
2279 result = nir_flt(&b, srcs[0], srcs[1]);
2280 else if (type_is_signed(types[0]))
2281 result = nir_ilt(&b, srcs[0], srcs[1]);
2282 else
2283 result = nir_ult(&b, srcs[0], srcs[1]);
2284 break;
2285 case ir_binop_gequal:
2286 if (type_is_float(types[0]))
2287 result = nir_fge(&b, srcs[0], srcs[1]);
2288 else if (type_is_signed(types[0]))
2289 result = nir_ige(&b, srcs[0], srcs[1]);
2290 else
2291 result = nir_uge(&b, srcs[0], srcs[1]);
2292 break;
2293 case ir_binop_equal:
2294 if (type_is_float(types[0]))
2295 result = nir_feq(&b, srcs[0], srcs[1]);
2296 else
2297 result = nir_ieq(&b, srcs[0], srcs[1]);
2298 break;
2299 case ir_binop_nequal:
2300 if (type_is_float(types[0]))
2301 result = nir_fne(&b, srcs[0], srcs[1]);
2302 else
2303 result = nir_ine(&b, srcs[0], srcs[1]);
2304 break;
2305 case ir_binop_all_equal:
2306 if (type_is_float(types[0])) {
2307 switch (ir->operands[0]->type->vector_elements) {
2308 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
2309 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
2310 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
2311 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
2312 default:
2313 unreachable("not reached");
2314 }
2315 } else {
2316 switch (ir->operands[0]->type->vector_elements) {
2317 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
2318 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
2319 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
2320 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
2321 default:
2322 unreachable("not reached");
2323 }
2324 }
2325 break;
2326 case ir_binop_any_nequal:
2327 if (type_is_float(types[0])) {
2328 switch (ir->operands[0]->type->vector_elements) {
2329 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
2330 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
2331 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
2332 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
2333 default:
2334 unreachable("not reached");
2335 }
2336 } else {
2337 switch (ir->operands[0]->type->vector_elements) {
2338 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
2339 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
2340 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
2341 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
2342 default:
2343 unreachable("not reached");
2344 }
2345 }
2346 break;
2347 case ir_binop_dot:
2348 switch (ir->operands[0]->type->vector_elements) {
2349 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
2350 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
2351 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
2352 default:
2353 unreachable("not reached");
2354 }
2355 break;
2356 case ir_binop_vector_extract: {
2357 result = nir_channel(&b, srcs[0], 0);
2358 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
2359 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
2360 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
2361 swizzled, result);
2362 }
2363 break;
2364 }
2365
2366 case ir_binop_atan2:
2367 result = nir_atan2(&b, srcs[0], srcs[1]);
2368 break;
2369
2370 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
2371 case ir_triop_fma:
2372 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
2373 break;
2374 case ir_triop_lrp:
2375 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
2376 break;
2377 case ir_triop_csel:
2378 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
2379 break;
2380 case ir_triop_bitfield_extract:
2381 result = (out_type == GLSL_TYPE_INT) ?
2382 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
2383 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
2384 break;
2385 case ir_quadop_bitfield_insert:
2386 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
2387 break;
2388 case ir_quadop_vector:
2389 result = nir_vec(&b, srcs, ir->type->vector_elements);
2390 break;
2391
2392 default:
2393 unreachable("not reached");
2394 }
2395 }
2396
2397 void
2398 nir_visitor::visit(ir_swizzle *ir)
2399 {
2400 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
2401 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
2402 ir->type->vector_elements);
2403 }
2404
2405 void
2406 nir_visitor::visit(ir_texture *ir)
2407 {
2408 unsigned num_srcs;
2409 nir_texop op;
2410 switch (ir->op) {
2411 case ir_tex:
2412 op = nir_texop_tex;
2413 num_srcs = 1; /* coordinate */
2414 break;
2415
2416 case ir_txb:
2417 case ir_txl:
2418 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2419 num_srcs = 2; /* coordinate, bias/lod */
2420 break;
2421
2422 case ir_txd:
2423 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2424 num_srcs = 3;
2425 break;
2426
2427 case ir_txf:
2428 op = nir_texop_txf;
2429 if (ir->lod_info.lod != NULL)
2430 num_srcs = 2; /* coordinate, lod */
2431 else
2432 num_srcs = 1; /* coordinate */
2433 break;
2434
2435 case ir_txf_ms:
2436 op = nir_texop_txf_ms;
2437 num_srcs = 2; /* coordinate, sample_index */
2438 break;
2439
2440 case ir_txs:
2441 op = nir_texop_txs;
2442 if (ir->lod_info.lod != NULL)
2443 num_srcs = 1; /* lod */
2444 else
2445 num_srcs = 0;
2446 break;
2447
2448 case ir_lod:
2449 op = nir_texop_lod;
2450 num_srcs = 1; /* coordinate */
2451 break;
2452
2453 case ir_tg4:
2454 op = nir_texop_tg4;
2455 num_srcs = 1; /* coordinate */
2456 break;
2457
2458 case ir_query_levels:
2459 op = nir_texop_query_levels;
2460 num_srcs = 0;
2461 break;
2462
2463 case ir_texture_samples:
2464 op = nir_texop_texture_samples;
2465 num_srcs = 0;
2466 break;
2467
2468 case ir_samples_identical:
2469 op = nir_texop_samples_identical;
2470 num_srcs = 1; /* coordinate */
2471 break;
2472
2473 default:
2474 unreachable("not reached");
2475 }
2476
2477 if (ir->projector != NULL)
2478 num_srcs++;
2479 if (ir->shadow_comparator != NULL)
2480 num_srcs++;
2481 /* offsets are constants we store inside nir_tex_intrs.offsets */
2482 if (ir->offset != NULL && !ir->offset->type->is_array())
2483 num_srcs++;
2484
2485 /* Add one for the texture deref */
2486 num_srcs += 2;
2487
2488 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2489
2490 instr->op = op;
2491 instr->sampler_dim =
2492 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2493 instr->is_array = ir->sampler->type->sampler_array;
2494 instr->is_shadow = ir->sampler->type->sampler_shadow;
2495 if (instr->is_shadow)
2496 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2497 switch (ir->type->base_type) {
2498 case GLSL_TYPE_FLOAT:
2499 instr->dest_type = nir_type_float;
2500 break;
2501 case GLSL_TYPE_INT:
2502 instr->dest_type = nir_type_int;
2503 break;
2504 case GLSL_TYPE_BOOL:
2505 case GLSL_TYPE_UINT:
2506 instr->dest_type = nir_type_uint;
2507 break;
2508 default:
2509 unreachable("not reached");
2510 }
2511
2512 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2513
2514 /* check for bindless handles */
2515 if (sampler_deref->mode != nir_var_uniform ||
2516 nir_deref_instr_get_variable(sampler_deref)->data.bindless) {
2517 nir_ssa_def *load = nir_load_deref(&b, sampler_deref);
2518 instr->src[0].src = nir_src_for_ssa(load);
2519 instr->src[0].src_type = nir_tex_src_texture_handle;
2520 instr->src[1].src = nir_src_for_ssa(load);
2521 instr->src[1].src_type = nir_tex_src_sampler_handle;
2522 } else {
2523 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2524 instr->src[0].src_type = nir_tex_src_texture_deref;
2525 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2526 instr->src[1].src_type = nir_tex_src_sampler_deref;
2527 }
2528
2529 unsigned src_number = 2;
2530
2531 if (ir->coordinate != NULL) {
2532 instr->coord_components = ir->coordinate->type->vector_elements;
2533 instr->src[src_number].src =
2534 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2535 instr->src[src_number].src_type = nir_tex_src_coord;
2536 src_number++;
2537 }
2538
2539 if (ir->projector != NULL) {
2540 instr->src[src_number].src =
2541 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2542 instr->src[src_number].src_type = nir_tex_src_projector;
2543 src_number++;
2544 }
2545
2546 if (ir->shadow_comparator != NULL) {
2547 instr->src[src_number].src =
2548 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2549 instr->src[src_number].src_type = nir_tex_src_comparator;
2550 src_number++;
2551 }
2552
2553 if (ir->offset != NULL) {
2554 if (ir->offset->type->is_array()) {
2555 for (int i = 0; i < ir->offset->type->array_size(); i++) {
2556 const ir_constant *c =
2557 ir->offset->as_constant()->get_array_element(i);
2558
2559 for (unsigned j = 0; j < 2; ++j) {
2560 int val = c->get_int_component(j);
2561 assert(val <= 31 && val >= -32);
2562 instr->tg4_offsets[i][j] = val;
2563 }
2564 }
2565 } else {
2566 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2567
2568 instr->src[src_number].src =
2569 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2570 instr->src[src_number].src_type = nir_tex_src_offset;
2571 src_number++;
2572 }
2573 }
2574
2575 switch (ir->op) {
2576 case ir_txb:
2577 instr->src[src_number].src =
2578 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2579 instr->src[src_number].src_type = nir_tex_src_bias;
2580 src_number++;
2581 break;
2582
2583 case ir_txl:
2584 case ir_txf:
2585 case ir_txs:
2586 if (ir->lod_info.lod != NULL) {
2587 instr->src[src_number].src =
2588 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2589 instr->src[src_number].src_type = nir_tex_src_lod;
2590 src_number++;
2591 }
2592 break;
2593
2594 case ir_txd:
2595 instr->src[src_number].src =
2596 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2597 instr->src[src_number].src_type = nir_tex_src_ddx;
2598 src_number++;
2599 instr->src[src_number].src =
2600 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2601 instr->src[src_number].src_type = nir_tex_src_ddy;
2602 src_number++;
2603 break;
2604
2605 case ir_txf_ms:
2606 instr->src[src_number].src =
2607 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2608 instr->src[src_number].src_type = nir_tex_src_ms_index;
2609 src_number++;
2610 break;
2611
2612 case ir_tg4:
2613 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2614 break;
2615
2616 default:
2617 break;
2618 }
2619
2620 assert(src_number == num_srcs);
2621
2622 unsigned bit_size = glsl_get_bit_size(ir->type);
2623 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2624 }
2625
2626 void
2627 nir_visitor::visit(ir_constant *ir)
2628 {
2629 /*
2630 * We don't know if this variable is an array or struct that gets
2631 * dereferenced, so do the safe thing an make it a variable with a
2632 * constant initializer and return a dereference.
2633 */
2634
2635 nir_variable *var =
2636 nir_local_variable_create(this->impl, ir->type, "const_temp");
2637 var->data.read_only = true;
2638 var->constant_initializer = constant_copy(ir, var);
2639
2640 this->deref = nir_build_deref_var(&b, var);
2641 }
2642
2643 void
2644 nir_visitor::visit(ir_dereference_variable *ir)
2645 {
2646 if (ir->variable_referenced()->data.mode == ir_var_function_out) {
2647 unsigned i = (sig->return_type != glsl_type::void_type) ? 1 : 0;
2648
2649 foreach_in_list(ir_variable, param, &sig->parameters) {
2650 if (param == ir->variable_referenced()) {
2651 break;
2652 }
2653 i++;
2654 }
2655
2656 this->deref = nir_build_deref_cast(&b, nir_load_param(&b, i),
2657 nir_var_function_temp, ir->type, 0);
2658 return;
2659 }
2660
2661 assert(ir->variable_referenced()->data.mode != ir_var_function_inout);
2662
2663 struct hash_entry *entry =
2664 _mesa_hash_table_search(this->var_table, ir->var);
2665 assert(entry);
2666 nir_variable *var = (nir_variable *) entry->data;
2667
2668 this->deref = nir_build_deref_var(&b, var);
2669 }
2670
2671 void
2672 nir_visitor::visit(ir_dereference_record *ir)
2673 {
2674 ir->record->accept(this);
2675
2676 int field_index = ir->field_idx;
2677 assert(field_index >= 0);
2678
2679 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2680 }
2681
2682 void
2683 nir_visitor::visit(ir_dereference_array *ir)
2684 {
2685 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2686
2687 ir->array->accept(this);
2688
2689 this->deref = nir_build_deref_array(&b, this->deref, index);
2690 }
2691
2692 void
2693 nir_visitor::visit(ir_barrier *)
2694 {
2695 nir_intrinsic_instr *instr =
2696 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2697 nir_builder_instr_insert(&b, &instr->instr);
2698 }
2699
2700 nir_shader *
2701 glsl_float64_funcs_to_nir(struct gl_context *ctx,
2702 const nir_shader_compiler_options *options)
2703 {
2704 /* We pretend it's a vertex shader. Ultimately, the stage shouldn't
2705 * matter because we're not optimizing anything here.
2706 */
2707 struct gl_shader *sh = _mesa_new_shader(-1, MESA_SHADER_VERTEX);
2708 sh->Source = float64_source;
2709 sh->CompileStatus = COMPILE_FAILURE;
2710 _mesa_glsl_compile_shader(ctx, sh, false, false, true);
2711
2712 if (!sh->CompileStatus) {
2713 if (sh->InfoLog) {
2714 _mesa_problem(ctx,
2715 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
2716 sh->InfoLog, float64_source);
2717 }
2718 return NULL;
2719 }
2720
2721 nir_shader *nir = nir_shader_create(NULL, MESA_SHADER_VERTEX, options, NULL);
2722
2723 nir_visitor v1(ctx, nir);
2724 nir_function_visitor v2(&v1);
2725 v2.run(sh->ir);
2726 visit_exec_list(sh->ir, &v1);
2727
2728 /* _mesa_delete_shader will try to free sh->Source but it's static const */
2729 sh->Source = NULL;
2730 _mesa_delete_shader(ctx, sh);
2731
2732 nir_validate_shader(nir, "float64_funcs_to_nir");
2733
2734 NIR_PASS_V(nir, nir_lower_constant_initializers, nir_var_function_temp);
2735 NIR_PASS_V(nir, nir_lower_returns);
2736 NIR_PASS_V(nir, nir_inline_functions);
2737 NIR_PASS_V(nir, nir_opt_deref);
2738
2739 /* Do some optimizations to clean up the shader now. By optimizing the
2740 * functions in the library, we avoid having to re-do that work every
2741 * time we inline a copy of a function. Reducing basic blocks also helps
2742 * with compile times.
2743 */
2744 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
2745 NIR_PASS_V(nir, nir_copy_prop);
2746 NIR_PASS_V(nir, nir_opt_dce);
2747 NIR_PASS_V(nir, nir_opt_cse);
2748 NIR_PASS_V(nir, nir_opt_gcm, true);
2749 NIR_PASS_V(nir, nir_opt_peephole_select, 1, false, false);
2750 NIR_PASS_V(nir, nir_opt_dce);
2751
2752 return nir;
2753 }