glsl_to_nir: rename image_access to mem_access
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "float64_glsl.h"
29 #include "glsl_to_nir.h"
30 #include "ir_visitor.h"
31 #include "ir_hierarchical_visitor.h"
32 #include "ir.h"
33 #include "ir_optimization.h"
34 #include "program.h"
35 #include "compiler/nir/nir_control_flow.h"
36 #include "compiler/nir/nir_builder.h"
37 #include "compiler/nir/nir_builtin_builder.h"
38 #include "compiler/nir/nir_deref.h"
39 #include "main/errors.h"
40 #include "main/imports.h"
41 #include "main/mtypes.h"
42 #include "main/shaderobj.h"
43 #include "util/u_math.h"
44
45 /*
46 * pass to lower GLSL IR to NIR
47 *
48 * This will lower variable dereferences to loads/stores of corresponding
49 * variables in NIR - the variables will be converted to registers in a later
50 * pass.
51 */
52
53 namespace {
54
55 class nir_visitor : public ir_visitor
56 {
57 public:
58 nir_visitor(gl_context *ctx, nir_shader *shader);
59 ~nir_visitor();
60
61 virtual void visit(ir_variable *);
62 virtual void visit(ir_function *);
63 virtual void visit(ir_function_signature *);
64 virtual void visit(ir_loop *);
65 virtual void visit(ir_if *);
66 virtual void visit(ir_discard *);
67 virtual void visit(ir_demote *);
68 virtual void visit(ir_loop_jump *);
69 virtual void visit(ir_return *);
70 virtual void visit(ir_call *);
71 virtual void visit(ir_assignment *);
72 virtual void visit(ir_emit_vertex *);
73 virtual void visit(ir_end_primitive *);
74 virtual void visit(ir_expression *);
75 virtual void visit(ir_swizzle *);
76 virtual void visit(ir_texture *);
77 virtual void visit(ir_constant *);
78 virtual void visit(ir_dereference_variable *);
79 virtual void visit(ir_dereference_record *);
80 virtual void visit(ir_dereference_array *);
81 virtual void visit(ir_barrier *);
82
83 void create_function(ir_function_signature *ir);
84
85 private:
86 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
87 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
88
89 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
90 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
91 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
92 nir_ssa_def *src2);
93 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
94 nir_ssa_def *src2, nir_ssa_def *src3);
95
96 bool supports_std430;
97
98 nir_shader *shader;
99 nir_function_impl *impl;
100 nir_builder b;
101 nir_ssa_def *result; /* result of the expression tree last visited */
102
103 nir_deref_instr *evaluate_deref(ir_instruction *ir);
104
105 nir_constant *constant_copy(ir_constant *ir, void *mem_ctx);
106
107 /* most recent deref instruction created */
108 nir_deref_instr *deref;
109
110 /* whether the IR we're operating on is per-function or global */
111 bool is_global;
112
113 ir_function_signature *sig;
114
115 /* map of ir_variable -> nir_variable */
116 struct hash_table *var_table;
117
118 /* map of ir_function_signature -> nir_function_overload */
119 struct hash_table *overload_table;
120 };
121
122 /*
123 * This visitor runs before the main visitor, calling create_function() for
124 * each function so that the main visitor can resolve forward references in
125 * calls.
126 */
127
128 class nir_function_visitor : public ir_hierarchical_visitor
129 {
130 public:
131 nir_function_visitor(nir_visitor *v) : visitor(v)
132 {
133 }
134 virtual ir_visitor_status visit_enter(ir_function *);
135
136 private:
137 nir_visitor *visitor;
138 };
139
140 /* glsl_to_nir can only handle converting certain function paramaters
141 * to NIR. This visitor checks for parameters it can't currently handle.
142 */
143 class ir_function_param_visitor : public ir_hierarchical_visitor
144 {
145 public:
146 ir_function_param_visitor()
147 : unsupported(false)
148 {
149 }
150
151 virtual ir_visitor_status visit_enter(ir_function_signature *ir)
152 {
153
154 if (ir->is_intrinsic())
155 return visit_continue;
156
157 foreach_in_list(ir_variable, param, &ir->parameters) {
158 if (!param->type->is_vector() || !param->type->is_scalar()) {
159 unsupported = true;
160 return visit_stop;
161 }
162
163 if (param->data.mode == ir_var_function_inout) {
164 unsupported = true;
165 return visit_stop;
166 }
167 }
168
169 return visit_continue;
170 }
171
172 bool unsupported;
173 };
174
175 } /* end of anonymous namespace */
176
177
178 static bool
179 has_unsupported_function_param(exec_list *ir)
180 {
181 ir_function_param_visitor visitor;
182 visit_list_elements(&visitor, ir);
183 return visitor.unsupported;
184 }
185
186 nir_shader *
187 glsl_to_nir(struct gl_context *ctx,
188 const struct gl_shader_program *shader_prog,
189 gl_shader_stage stage,
190 const nir_shader_compiler_options *options)
191 {
192 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
193
194 const struct gl_shader_compiler_options *gl_options =
195 &ctx->Const.ShaderCompilerOptions[stage];
196
197 /* glsl_to_nir can only handle converting certain function paramaters
198 * to NIR. If we find something we can't handle then we get the GLSL IR
199 * opts to remove it before we continue on.
200 *
201 * TODO: add missing glsl ir to nir support and remove this loop.
202 */
203 while (has_unsupported_function_param(sh->ir)) {
204 do_common_optimization(sh->ir, true, true, gl_options,
205 ctx->Const.NativeIntegers);
206 }
207
208 nir_shader *shader = nir_shader_create(NULL, stage, options,
209 &sh->Program->info);
210
211 nir_visitor v1(ctx, shader);
212 nir_function_visitor v2(&v1);
213 v2.run(sh->ir);
214 visit_exec_list(sh->ir, &v1);
215
216 nir_validate_shader(shader, "after glsl to nir, before function inline");
217
218 /* We have to lower away local constant initializers right before we
219 * inline functions. That way they get properly initialized at the top
220 * of the function and not at the top of its caller.
221 */
222 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
223 nir_lower_returns(shader);
224 nir_inline_functions(shader);
225 nir_opt_deref(shader);
226
227 nir_validate_shader(shader, "after function inlining and return lowering");
228
229 /* Now that we have inlined everything remove all of the functions except
230 * main().
231 */
232 foreach_list_typed_safe(nir_function, function, node, &(shader)->functions){
233 if (strcmp("main", function->name) != 0) {
234 exec_node_remove(&function->node);
235 }
236 }
237
238 /* Remap the locations to slots so those requiring two slots will occupy
239 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
240 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
241 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
242 if (shader->info.stage == MESA_SHADER_VERTEX)
243 nir_remap_dual_slot_attributes(shader, &sh->Program->DualSlotInputs);
244
245 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
246 if (shader_prog->Label)
247 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
248
249 /* Check for transform feedback varyings specified via the API */
250 shader->info.has_transform_feedback_varyings =
251 shader_prog->TransformFeedback.NumVarying > 0;
252
253 /* Check for transform feedback varyings specified in the Shader */
254 if (shader_prog->last_vert_prog)
255 shader->info.has_transform_feedback_varyings |=
256 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
257
258 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
259 shader->info.fs.pixel_center_integer = sh->Program->info.fs.pixel_center_integer;
260 shader->info.fs.origin_upper_left = sh->Program->info.fs.origin_upper_left;
261 }
262
263 return shader;
264 }
265
266 nir_visitor::nir_visitor(gl_context *ctx, nir_shader *shader)
267 {
268 this->supports_std430 = ctx->Const.UseSTD430AsDefaultPacking;
269 this->shader = shader;
270 this->is_global = true;
271 this->var_table = _mesa_pointer_hash_table_create(NULL);
272 this->overload_table = _mesa_pointer_hash_table_create(NULL);
273 this->result = NULL;
274 this->impl = NULL;
275 this->deref = NULL;
276 this->sig = NULL;
277 memset(&this->b, 0, sizeof(this->b));
278 }
279
280 nir_visitor::~nir_visitor()
281 {
282 _mesa_hash_table_destroy(this->var_table, NULL);
283 _mesa_hash_table_destroy(this->overload_table, NULL);
284 }
285
286 nir_deref_instr *
287 nir_visitor::evaluate_deref(ir_instruction *ir)
288 {
289 ir->accept(this);
290 return this->deref;
291 }
292
293 nir_constant *
294 nir_visitor::constant_copy(ir_constant *ir, void *mem_ctx)
295 {
296 if (ir == NULL)
297 return NULL;
298
299 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
300
301 const unsigned rows = ir->type->vector_elements;
302 const unsigned cols = ir->type->matrix_columns;
303 unsigned i;
304
305 ret->num_elements = 0;
306 switch (ir->type->base_type) {
307 case GLSL_TYPE_UINT:
308 /* Only float base types can be matrices. */
309 assert(cols == 1);
310
311 for (unsigned r = 0; r < rows; r++)
312 ret->values[r].u32 = ir->value.u[r];
313
314 break;
315
316 case GLSL_TYPE_INT:
317 /* Only float base types can be matrices. */
318 assert(cols == 1);
319
320 for (unsigned r = 0; r < rows; r++)
321 ret->values[r].i32 = ir->value.i[r];
322
323 break;
324
325 case GLSL_TYPE_FLOAT:
326 case GLSL_TYPE_DOUBLE:
327 if (cols > 1) {
328 ret->elements = ralloc_array(mem_ctx, nir_constant *, cols);
329 ret->num_elements = cols;
330 for (unsigned c = 0; c < cols; c++) {
331 nir_constant *col_const = rzalloc(mem_ctx, nir_constant);
332 col_const->num_elements = 0;
333 switch (ir->type->base_type) {
334 case GLSL_TYPE_FLOAT:
335 for (unsigned r = 0; r < rows; r++)
336 col_const->values[r].f32 = ir->value.f[c * rows + r];
337 break;
338
339 case GLSL_TYPE_DOUBLE:
340 for (unsigned r = 0; r < rows; r++)
341 col_const->values[r].f64 = ir->value.d[c * rows + r];
342 break;
343
344 default:
345 unreachable("Cannot get here from the first level switch");
346 }
347 ret->elements[c] = col_const;
348 }
349 } else {
350 switch (ir->type->base_type) {
351 case GLSL_TYPE_FLOAT:
352 for (unsigned r = 0; r < rows; r++)
353 ret->values[r].f32 = ir->value.f[r];
354 break;
355
356 case GLSL_TYPE_DOUBLE:
357 for (unsigned r = 0; r < rows; r++)
358 ret->values[r].f64 = ir->value.d[r];
359 break;
360
361 default:
362 unreachable("Cannot get here from the first level switch");
363 }
364 }
365 break;
366
367 case GLSL_TYPE_UINT64:
368 /* Only float base types can be matrices. */
369 assert(cols == 1);
370
371 for (unsigned r = 0; r < rows; r++)
372 ret->values[r].u64 = ir->value.u64[r];
373 break;
374
375 case GLSL_TYPE_INT64:
376 /* Only float base types can be matrices. */
377 assert(cols == 1);
378
379 for (unsigned r = 0; r < rows; r++)
380 ret->values[r].i64 = ir->value.i64[r];
381 break;
382
383 case GLSL_TYPE_BOOL:
384 /* Only float base types can be matrices. */
385 assert(cols == 1);
386
387 for (unsigned r = 0; r < rows; r++)
388 ret->values[r].b = ir->value.b[r];
389
390 break;
391
392 case GLSL_TYPE_STRUCT:
393 case GLSL_TYPE_ARRAY:
394 ret->elements = ralloc_array(mem_ctx, nir_constant *,
395 ir->type->length);
396 ret->num_elements = ir->type->length;
397
398 for (i = 0; i < ir->type->length; i++)
399 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
400 break;
401
402 default:
403 unreachable("not reached");
404 }
405
406 return ret;
407 }
408
409 static const glsl_type *
410 wrap_type_in_array(const glsl_type *elem_type, const glsl_type *array_type)
411 {
412 if (!array_type->is_array())
413 return elem_type;
414
415 elem_type = wrap_type_in_array(elem_type, array_type->fields.array);
416
417 return glsl_type::get_array_instance(elem_type, array_type->length);
418 }
419
420 void
421 nir_visitor::visit(ir_variable *ir)
422 {
423 /* TODO: In future we should switch to using the NIR lowering pass but for
424 * now just ignore these variables as GLSL IR should have lowered them.
425 * Anything remaining are just dead vars that weren't cleaned up.
426 */
427 if (ir->data.mode == ir_var_shader_shared)
428 return;
429
430 /* FINISHME: inout parameters */
431 assert(ir->data.mode != ir_var_function_inout);
432
433 if (ir->data.mode == ir_var_function_out)
434 return;
435
436 nir_variable *var = rzalloc(shader, nir_variable);
437 var->type = ir->type;
438 var->name = ralloc_strdup(var, ir->name);
439
440 var->data.always_active_io = ir->data.always_active_io;
441 var->data.read_only = ir->data.read_only;
442 var->data.centroid = ir->data.centroid;
443 var->data.sample = ir->data.sample;
444 var->data.patch = ir->data.patch;
445 var->data.invariant = ir->data.invariant;
446 var->data.location = ir->data.location;
447 var->data.stream = ir->data.stream;
448 if (ir->data.stream & (1u << 31))
449 var->data.stream |= NIR_STREAM_PACKED;
450 var->data.compact = false;
451
452 switch(ir->data.mode) {
453 case ir_var_auto:
454 case ir_var_temporary:
455 if (is_global)
456 var->data.mode = nir_var_shader_temp;
457 else
458 var->data.mode = nir_var_function_temp;
459 break;
460
461 case ir_var_function_in:
462 case ir_var_const_in:
463 var->data.mode = nir_var_function_temp;
464 break;
465
466 case ir_var_shader_in:
467 if (shader->info.stage == MESA_SHADER_GEOMETRY &&
468 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
469 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
470 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
471 var->data.mode = nir_var_system_value;
472 } else {
473 var->data.mode = nir_var_shader_in;
474
475 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
476 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
477 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
478 var->data.compact = ir->type->without_array()->is_scalar();
479 }
480
481 if (shader->info.stage > MESA_SHADER_VERTEX &&
482 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
483 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
484 var->data.compact = ir->type->without_array()->is_scalar();
485 }
486 }
487 break;
488
489 case ir_var_shader_out:
490 var->data.mode = nir_var_shader_out;
491 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
492 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
493 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
494 var->data.compact = ir->type->without_array()->is_scalar();
495 }
496
497 if (shader->info.stage <= MESA_SHADER_GEOMETRY &&
498 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
499 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
500 var->data.compact = ir->type->without_array()->is_scalar();
501 }
502 break;
503
504 case ir_var_uniform:
505 if (ir->get_interface_type())
506 var->data.mode = nir_var_mem_ubo;
507 else
508 var->data.mode = nir_var_uniform;
509 break;
510
511 case ir_var_shader_storage:
512 var->data.mode = nir_var_mem_ssbo;
513 break;
514
515 case ir_var_system_value:
516 var->data.mode = nir_var_system_value;
517 break;
518
519 default:
520 unreachable("not reached");
521 }
522
523 unsigned mem_access = 0;
524 if (ir->data.memory_read_only)
525 mem_access |= ACCESS_NON_WRITEABLE;
526 if (ir->data.memory_write_only)
527 mem_access |= ACCESS_NON_READABLE;
528 if (ir->data.memory_coherent)
529 mem_access |= ACCESS_COHERENT;
530 if (ir->data.memory_volatile)
531 mem_access |= ACCESS_VOLATILE;
532 if (ir->data.memory_restrict)
533 mem_access |= ACCESS_RESTRICT;
534
535 /* For UBO and SSBO variables, we need explicit types */
536 if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
537 const glsl_type *explicit_ifc_type =
538 ir->get_interface_type()->get_explicit_interface_type(supports_std430);
539
540 if (ir->type->without_array()->is_interface()) {
541 /* If the type contains the interface, wrap the explicit type in the
542 * right number of arrays.
543 */
544 var->type = wrap_type_in_array(explicit_ifc_type, ir->type);
545 } else {
546 /* Otherwise, this variable is one entry in the interface */
547 UNUSED bool found = false;
548 for (unsigned i = 0; i < explicit_ifc_type->length; i++) {
549 const glsl_struct_field *field =
550 &explicit_ifc_type->fields.structure[i];
551 if (strcmp(ir->name, field->name) != 0)
552 continue;
553
554 var->type = field->type;
555 if (field->memory_read_only)
556 mem_access |= ACCESS_NON_WRITEABLE;
557 if (field->memory_write_only)
558 mem_access |= ACCESS_NON_READABLE;
559 if (field->memory_coherent)
560 mem_access |= ACCESS_COHERENT;
561 if (field->memory_volatile)
562 mem_access |= ACCESS_VOLATILE;
563 if (field->memory_restrict)
564 mem_access |= ACCESS_RESTRICT;
565
566 found = true;
567 break;
568 }
569 assert(found);
570 }
571 }
572
573 var->data.interpolation = ir->data.interpolation;
574 var->data.location_frac = ir->data.location_frac;
575
576 switch (ir->data.depth_layout) {
577 case ir_depth_layout_none:
578 var->data.depth_layout = nir_depth_layout_none;
579 break;
580 case ir_depth_layout_any:
581 var->data.depth_layout = nir_depth_layout_any;
582 break;
583 case ir_depth_layout_greater:
584 var->data.depth_layout = nir_depth_layout_greater;
585 break;
586 case ir_depth_layout_less:
587 var->data.depth_layout = nir_depth_layout_less;
588 break;
589 case ir_depth_layout_unchanged:
590 var->data.depth_layout = nir_depth_layout_unchanged;
591 break;
592 default:
593 unreachable("not reached");
594 }
595
596 var->data.index = ir->data.index;
597 var->data.descriptor_set = 0;
598 var->data.binding = ir->data.binding;
599 var->data.explicit_binding = ir->data.explicit_binding;
600 var->data.bindless = ir->data.bindless;
601 var->data.offset = ir->data.offset;
602 var->data.access = (gl_access_qualifier)mem_access;
603
604 if (var->type->without_array()->is_image()) {
605 var->data.image.format = ir->data.image_format;
606 } else if (var->data.mode == nir_var_shader_out) {
607 var->data.xfb.buffer = ir->data.xfb_buffer;
608 var->data.xfb.stride = ir->data.xfb_stride;
609 }
610
611 var->data.fb_fetch_output = ir->data.fb_fetch_output;
612 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
613 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
614
615 var->num_state_slots = ir->get_num_state_slots();
616 if (var->num_state_slots > 0) {
617 var->state_slots = rzalloc_array(var, nir_state_slot,
618 var->num_state_slots);
619
620 ir_state_slot *state_slots = ir->get_state_slots();
621 for (unsigned i = 0; i < var->num_state_slots; i++) {
622 for (unsigned j = 0; j < 5; j++)
623 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
624 var->state_slots[i].swizzle = state_slots[i].swizzle;
625 }
626 } else {
627 var->state_slots = NULL;
628 }
629
630 var->constant_initializer = constant_copy(ir->constant_initializer, var);
631
632 var->interface_type = ir->get_interface_type();
633
634 if (var->data.mode == nir_var_function_temp)
635 nir_function_impl_add_variable(impl, var);
636 else
637 nir_shader_add_variable(shader, var);
638
639 _mesa_hash_table_insert(var_table, ir, var);
640 }
641
642 ir_visitor_status
643 nir_function_visitor::visit_enter(ir_function *ir)
644 {
645 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
646 visitor->create_function(sig);
647 }
648 return visit_continue_with_parent;
649 }
650
651 void
652 nir_visitor::create_function(ir_function_signature *ir)
653 {
654 if (ir->is_intrinsic())
655 return;
656
657 nir_function *func = nir_function_create(shader, ir->function_name());
658 if (strcmp(ir->function_name(), "main") == 0)
659 func->is_entrypoint = true;
660
661 func->num_params = ir->parameters.length() +
662 (ir->return_type != glsl_type::void_type);
663 func->params = ralloc_array(shader, nir_parameter, func->num_params);
664
665 unsigned np = 0;
666
667 if (ir->return_type != glsl_type::void_type) {
668 /* The return value is a variable deref (basically an out parameter) */
669 func->params[np].num_components = 1;
670 func->params[np].bit_size = 32;
671 np++;
672 }
673
674 foreach_in_list(ir_variable, param, &ir->parameters) {
675 /* FINISHME: pass arrays, structs, etc by reference? */
676 assert(param->type->is_vector() || param->type->is_scalar());
677
678 if (param->data.mode == ir_var_function_in) {
679 func->params[np].num_components = param->type->vector_elements;
680 func->params[np].bit_size = glsl_get_bit_size(param->type);
681 } else {
682 func->params[np].num_components = 1;
683 func->params[np].bit_size = 32;
684 }
685 np++;
686 }
687 assert(np == func->num_params);
688
689 _mesa_hash_table_insert(this->overload_table, ir, func);
690 }
691
692 void
693 nir_visitor::visit(ir_function *ir)
694 {
695 foreach_in_list(ir_function_signature, sig, &ir->signatures)
696 sig->accept(this);
697 }
698
699 void
700 nir_visitor::visit(ir_function_signature *ir)
701 {
702 if (ir->is_intrinsic())
703 return;
704
705 this->sig = ir;
706
707 struct hash_entry *entry =
708 _mesa_hash_table_search(this->overload_table, ir);
709
710 assert(entry);
711 nir_function *func = (nir_function *) entry->data;
712
713 if (ir->is_defined) {
714 nir_function_impl *impl = nir_function_impl_create(func);
715 this->impl = impl;
716
717 this->is_global = false;
718
719 nir_builder_init(&b, impl);
720 b.cursor = nir_after_cf_list(&impl->body);
721
722 unsigned i = (ir->return_type != glsl_type::void_type) ? 1 : 0;
723
724 foreach_in_list(ir_variable, param, &ir->parameters) {
725 nir_variable *var =
726 nir_local_variable_create(impl, param->type, param->name);
727
728 if (param->data.mode == ir_var_function_in) {
729 nir_store_var(&b, var, nir_load_param(&b, i), ~0);
730 }
731
732 _mesa_hash_table_insert(var_table, param, var);
733 i++;
734 }
735
736 visit_exec_list(&ir->body, this);
737
738 this->is_global = true;
739 } else {
740 func->impl = NULL;
741 }
742 }
743
744 void
745 nir_visitor::visit(ir_loop *ir)
746 {
747 nir_push_loop(&b);
748 visit_exec_list(&ir->body_instructions, this);
749 nir_pop_loop(&b, NULL);
750 }
751
752 void
753 nir_visitor::visit(ir_if *ir)
754 {
755 nir_push_if(&b, evaluate_rvalue(ir->condition));
756 visit_exec_list(&ir->then_instructions, this);
757 nir_push_else(&b, NULL);
758 visit_exec_list(&ir->else_instructions, this);
759 nir_pop_if(&b, NULL);
760 }
761
762 void
763 nir_visitor::visit(ir_discard *ir)
764 {
765 /*
766 * discards aren't treated as control flow, because before we lower them
767 * they can appear anywhere in the shader and the stuff after them may still
768 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
769 * discards will be immediately followed by a return.
770 */
771
772 nir_intrinsic_instr *discard;
773 if (ir->condition) {
774 discard = nir_intrinsic_instr_create(this->shader,
775 nir_intrinsic_discard_if);
776 discard->src[0] =
777 nir_src_for_ssa(evaluate_rvalue(ir->condition));
778 } else {
779 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
780 }
781
782 nir_builder_instr_insert(&b, &discard->instr);
783 }
784
785 void
786 nir_visitor::visit(ir_demote *ir)
787 {
788 nir_intrinsic_instr *demote =
789 nir_intrinsic_instr_create(this->shader, nir_intrinsic_demote);
790
791 nir_builder_instr_insert(&b, &demote->instr);
792 }
793
794 void
795 nir_visitor::visit(ir_emit_vertex *ir)
796 {
797 nir_intrinsic_instr *instr =
798 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
799 nir_intrinsic_set_stream_id(instr, ir->stream_id());
800 nir_builder_instr_insert(&b, &instr->instr);
801 }
802
803 void
804 nir_visitor::visit(ir_end_primitive *ir)
805 {
806 nir_intrinsic_instr *instr =
807 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
808 nir_intrinsic_set_stream_id(instr, ir->stream_id());
809 nir_builder_instr_insert(&b, &instr->instr);
810 }
811
812 void
813 nir_visitor::visit(ir_loop_jump *ir)
814 {
815 nir_jump_type type;
816 switch (ir->mode) {
817 case ir_loop_jump::jump_break:
818 type = nir_jump_break;
819 break;
820 case ir_loop_jump::jump_continue:
821 type = nir_jump_continue;
822 break;
823 default:
824 unreachable("not reached");
825 }
826
827 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
828 nir_builder_instr_insert(&b, &instr->instr);
829 }
830
831 void
832 nir_visitor::visit(ir_return *ir)
833 {
834 if (ir->value != NULL) {
835 nir_deref_instr *ret_deref =
836 nir_build_deref_cast(&b, nir_load_param(&b, 0),
837 nir_var_function_temp, ir->value->type, 0);
838
839 nir_ssa_def *val = evaluate_rvalue(ir->value);
840 nir_store_deref(&b, ret_deref, val, ~0);
841 }
842
843 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
844 nir_builder_instr_insert(&b, &instr->instr);
845 }
846
847 static void
848 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
849 {
850 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
851 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
852 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
853 }
854
855 /* Accumulate any qualifiers along the deref chain to get the actual
856 * load/store qualifier.
857 */
858
859 static enum gl_access_qualifier
860 deref_get_qualifier(nir_deref_instr *deref)
861 {
862 nir_deref_path path;
863 nir_deref_path_init(&path, deref, NULL);
864
865 unsigned qualifiers = path.path[0]->var->data.access;
866
867 const glsl_type *parent_type = path.path[0]->type;
868 for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
869 nir_deref_instr *cur = *cur_ptr;
870
871 if (parent_type->is_interface()) {
872 const struct glsl_struct_field *field =
873 &parent_type->fields.structure[cur->strct.index];
874 if (field->memory_read_only)
875 qualifiers |= ACCESS_NON_WRITEABLE;
876 if (field->memory_write_only)
877 qualifiers |= ACCESS_NON_READABLE;
878 if (field->memory_coherent)
879 qualifiers |= ACCESS_COHERENT;
880 if (field->memory_volatile)
881 qualifiers |= ACCESS_VOLATILE;
882 if (field->memory_restrict)
883 qualifiers |= ACCESS_RESTRICT;
884 }
885
886 parent_type = cur->type;
887 }
888
889 nir_deref_path_finish(&path);
890
891 return (gl_access_qualifier) qualifiers;
892 }
893
894 void
895 nir_visitor::visit(ir_call *ir)
896 {
897 if (ir->callee->is_intrinsic()) {
898 nir_intrinsic_op op;
899
900 switch (ir->callee->intrinsic_id) {
901 case ir_intrinsic_generic_atomic_add:
902 op = ir->return_deref->type->is_integer_32_64()
903 ? nir_intrinsic_deref_atomic_add : nir_intrinsic_deref_atomic_fadd;
904 break;
905 case ir_intrinsic_generic_atomic_and:
906 op = nir_intrinsic_deref_atomic_and;
907 break;
908 case ir_intrinsic_generic_atomic_or:
909 op = nir_intrinsic_deref_atomic_or;
910 break;
911 case ir_intrinsic_generic_atomic_xor:
912 op = nir_intrinsic_deref_atomic_xor;
913 break;
914 case ir_intrinsic_generic_atomic_min:
915 assert(ir->return_deref);
916 if (ir->return_deref->type == glsl_type::int_type)
917 op = nir_intrinsic_deref_atomic_imin;
918 else if (ir->return_deref->type == glsl_type::uint_type)
919 op = nir_intrinsic_deref_atomic_umin;
920 else if (ir->return_deref->type == glsl_type::float_type)
921 op = nir_intrinsic_deref_atomic_fmin;
922 else
923 unreachable("Invalid type");
924 break;
925 case ir_intrinsic_generic_atomic_max:
926 assert(ir->return_deref);
927 if (ir->return_deref->type == glsl_type::int_type)
928 op = nir_intrinsic_deref_atomic_imax;
929 else if (ir->return_deref->type == glsl_type::uint_type)
930 op = nir_intrinsic_deref_atomic_umax;
931 else if (ir->return_deref->type == glsl_type::float_type)
932 op = nir_intrinsic_deref_atomic_fmax;
933 else
934 unreachable("Invalid type");
935 break;
936 case ir_intrinsic_generic_atomic_exchange:
937 op = nir_intrinsic_deref_atomic_exchange;
938 break;
939 case ir_intrinsic_generic_atomic_comp_swap:
940 op = ir->return_deref->type->is_integer_32_64()
941 ? nir_intrinsic_deref_atomic_comp_swap
942 : nir_intrinsic_deref_atomic_fcomp_swap;
943 break;
944 case ir_intrinsic_atomic_counter_read:
945 op = nir_intrinsic_atomic_counter_read_deref;
946 break;
947 case ir_intrinsic_atomic_counter_increment:
948 op = nir_intrinsic_atomic_counter_inc_deref;
949 break;
950 case ir_intrinsic_atomic_counter_predecrement:
951 op = nir_intrinsic_atomic_counter_pre_dec_deref;
952 break;
953 case ir_intrinsic_atomic_counter_add:
954 op = nir_intrinsic_atomic_counter_add_deref;
955 break;
956 case ir_intrinsic_atomic_counter_and:
957 op = nir_intrinsic_atomic_counter_and_deref;
958 break;
959 case ir_intrinsic_atomic_counter_or:
960 op = nir_intrinsic_atomic_counter_or_deref;
961 break;
962 case ir_intrinsic_atomic_counter_xor:
963 op = nir_intrinsic_atomic_counter_xor_deref;
964 break;
965 case ir_intrinsic_atomic_counter_min:
966 op = nir_intrinsic_atomic_counter_min_deref;
967 break;
968 case ir_intrinsic_atomic_counter_max:
969 op = nir_intrinsic_atomic_counter_max_deref;
970 break;
971 case ir_intrinsic_atomic_counter_exchange:
972 op = nir_intrinsic_atomic_counter_exchange_deref;
973 break;
974 case ir_intrinsic_atomic_counter_comp_swap:
975 op = nir_intrinsic_atomic_counter_comp_swap_deref;
976 break;
977 case ir_intrinsic_image_load:
978 op = nir_intrinsic_image_deref_load;
979 break;
980 case ir_intrinsic_image_store:
981 op = nir_intrinsic_image_deref_store;
982 break;
983 case ir_intrinsic_image_atomic_add:
984 op = ir->return_deref->type->is_integer_32_64()
985 ? nir_intrinsic_image_deref_atomic_add
986 : nir_intrinsic_image_deref_atomic_fadd;
987 break;
988 case ir_intrinsic_image_atomic_min:
989 if (ir->return_deref->type == glsl_type::int_type)
990 op = nir_intrinsic_image_deref_atomic_imin;
991 else if (ir->return_deref->type == glsl_type::uint_type)
992 op = nir_intrinsic_image_deref_atomic_umin;
993 else
994 unreachable("Invalid type");
995 break;
996 case ir_intrinsic_image_atomic_max:
997 if (ir->return_deref->type == glsl_type::int_type)
998 op = nir_intrinsic_image_deref_atomic_imax;
999 else if (ir->return_deref->type == glsl_type::uint_type)
1000 op = nir_intrinsic_image_deref_atomic_umax;
1001 else
1002 unreachable("Invalid type");
1003 break;
1004 case ir_intrinsic_image_atomic_and:
1005 op = nir_intrinsic_image_deref_atomic_and;
1006 break;
1007 case ir_intrinsic_image_atomic_or:
1008 op = nir_intrinsic_image_deref_atomic_or;
1009 break;
1010 case ir_intrinsic_image_atomic_xor:
1011 op = nir_intrinsic_image_deref_atomic_xor;
1012 break;
1013 case ir_intrinsic_image_atomic_exchange:
1014 op = nir_intrinsic_image_deref_atomic_exchange;
1015 break;
1016 case ir_intrinsic_image_atomic_comp_swap:
1017 op = nir_intrinsic_image_deref_atomic_comp_swap;
1018 break;
1019 case ir_intrinsic_image_atomic_inc_wrap:
1020 op = nir_intrinsic_image_deref_atomic_inc_wrap;
1021 break;
1022 case ir_intrinsic_image_atomic_dec_wrap:
1023 op = nir_intrinsic_image_deref_atomic_dec_wrap;
1024 break;
1025 case ir_intrinsic_memory_barrier:
1026 op = nir_intrinsic_memory_barrier;
1027 break;
1028 case ir_intrinsic_image_size:
1029 op = nir_intrinsic_image_deref_size;
1030 break;
1031 case ir_intrinsic_image_samples:
1032 op = nir_intrinsic_image_deref_samples;
1033 break;
1034 case ir_intrinsic_ssbo_store:
1035 op = nir_intrinsic_store_ssbo;
1036 break;
1037 case ir_intrinsic_ssbo_load:
1038 op = nir_intrinsic_load_ssbo;
1039 break;
1040 case ir_intrinsic_ssbo_atomic_add:
1041 op = ir->return_deref->type->is_integer_32_64()
1042 ? nir_intrinsic_ssbo_atomic_add : nir_intrinsic_ssbo_atomic_fadd;
1043 break;
1044 case ir_intrinsic_ssbo_atomic_and:
1045 op = nir_intrinsic_ssbo_atomic_and;
1046 break;
1047 case ir_intrinsic_ssbo_atomic_or:
1048 op = nir_intrinsic_ssbo_atomic_or;
1049 break;
1050 case ir_intrinsic_ssbo_atomic_xor:
1051 op = nir_intrinsic_ssbo_atomic_xor;
1052 break;
1053 case ir_intrinsic_ssbo_atomic_min:
1054 assert(ir->return_deref);
1055 if (ir->return_deref->type == glsl_type::int_type)
1056 op = nir_intrinsic_ssbo_atomic_imin;
1057 else if (ir->return_deref->type == glsl_type::uint_type)
1058 op = nir_intrinsic_ssbo_atomic_umin;
1059 else if (ir->return_deref->type == glsl_type::float_type)
1060 op = nir_intrinsic_ssbo_atomic_fmin;
1061 else
1062 unreachable("Invalid type");
1063 break;
1064 case ir_intrinsic_ssbo_atomic_max:
1065 assert(ir->return_deref);
1066 if (ir->return_deref->type == glsl_type::int_type)
1067 op = nir_intrinsic_ssbo_atomic_imax;
1068 else if (ir->return_deref->type == glsl_type::uint_type)
1069 op = nir_intrinsic_ssbo_atomic_umax;
1070 else if (ir->return_deref->type == glsl_type::float_type)
1071 op = nir_intrinsic_ssbo_atomic_fmax;
1072 else
1073 unreachable("Invalid type");
1074 break;
1075 case ir_intrinsic_ssbo_atomic_exchange:
1076 op = nir_intrinsic_ssbo_atomic_exchange;
1077 break;
1078 case ir_intrinsic_ssbo_atomic_comp_swap:
1079 op = ir->return_deref->type->is_integer_32_64()
1080 ? nir_intrinsic_ssbo_atomic_comp_swap
1081 : nir_intrinsic_ssbo_atomic_fcomp_swap;
1082 break;
1083 case ir_intrinsic_shader_clock:
1084 op = nir_intrinsic_shader_clock;
1085 break;
1086 case ir_intrinsic_begin_invocation_interlock:
1087 op = nir_intrinsic_begin_invocation_interlock;
1088 break;
1089 case ir_intrinsic_end_invocation_interlock:
1090 op = nir_intrinsic_end_invocation_interlock;
1091 break;
1092 case ir_intrinsic_group_memory_barrier:
1093 op = nir_intrinsic_group_memory_barrier;
1094 break;
1095 case ir_intrinsic_memory_barrier_atomic_counter:
1096 op = nir_intrinsic_memory_barrier_atomic_counter;
1097 break;
1098 case ir_intrinsic_memory_barrier_buffer:
1099 op = nir_intrinsic_memory_barrier_buffer;
1100 break;
1101 case ir_intrinsic_memory_barrier_image:
1102 op = nir_intrinsic_memory_barrier_image;
1103 break;
1104 case ir_intrinsic_memory_barrier_shared:
1105 op = nir_intrinsic_memory_barrier_shared;
1106 break;
1107 case ir_intrinsic_shared_load:
1108 op = nir_intrinsic_load_shared;
1109 break;
1110 case ir_intrinsic_shared_store:
1111 op = nir_intrinsic_store_shared;
1112 break;
1113 case ir_intrinsic_shared_atomic_add:
1114 op = ir->return_deref->type->is_integer_32_64()
1115 ? nir_intrinsic_shared_atomic_add
1116 : nir_intrinsic_shared_atomic_fadd;
1117 break;
1118 case ir_intrinsic_shared_atomic_and:
1119 op = nir_intrinsic_shared_atomic_and;
1120 break;
1121 case ir_intrinsic_shared_atomic_or:
1122 op = nir_intrinsic_shared_atomic_or;
1123 break;
1124 case ir_intrinsic_shared_atomic_xor:
1125 op = nir_intrinsic_shared_atomic_xor;
1126 break;
1127 case ir_intrinsic_shared_atomic_min:
1128 assert(ir->return_deref);
1129 if (ir->return_deref->type == glsl_type::int_type)
1130 op = nir_intrinsic_shared_atomic_imin;
1131 else if (ir->return_deref->type == glsl_type::uint_type)
1132 op = nir_intrinsic_shared_atomic_umin;
1133 else if (ir->return_deref->type == glsl_type::float_type)
1134 op = nir_intrinsic_shared_atomic_fmin;
1135 else
1136 unreachable("Invalid type");
1137 break;
1138 case ir_intrinsic_shared_atomic_max:
1139 assert(ir->return_deref);
1140 if (ir->return_deref->type == glsl_type::int_type)
1141 op = nir_intrinsic_shared_atomic_imax;
1142 else if (ir->return_deref->type == glsl_type::uint_type)
1143 op = nir_intrinsic_shared_atomic_umax;
1144 else if (ir->return_deref->type == glsl_type::float_type)
1145 op = nir_intrinsic_shared_atomic_fmax;
1146 else
1147 unreachable("Invalid type");
1148 break;
1149 case ir_intrinsic_shared_atomic_exchange:
1150 op = nir_intrinsic_shared_atomic_exchange;
1151 break;
1152 case ir_intrinsic_shared_atomic_comp_swap:
1153 op = ir->return_deref->type->is_integer_32_64()
1154 ? nir_intrinsic_shared_atomic_comp_swap
1155 : nir_intrinsic_shared_atomic_fcomp_swap;
1156 break;
1157 case ir_intrinsic_vote_any:
1158 op = nir_intrinsic_vote_any;
1159 break;
1160 case ir_intrinsic_vote_all:
1161 op = nir_intrinsic_vote_all;
1162 break;
1163 case ir_intrinsic_vote_eq:
1164 op = nir_intrinsic_vote_ieq;
1165 break;
1166 case ir_intrinsic_ballot:
1167 op = nir_intrinsic_ballot;
1168 break;
1169 case ir_intrinsic_read_invocation:
1170 op = nir_intrinsic_read_invocation;
1171 break;
1172 case ir_intrinsic_read_first_invocation:
1173 op = nir_intrinsic_read_first_invocation;
1174 break;
1175 case ir_intrinsic_helper_invocation:
1176 op = nir_intrinsic_is_helper_invocation;
1177 break;
1178 default:
1179 unreachable("not reached");
1180 }
1181
1182 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
1183 nir_ssa_def *ret = &instr->dest.ssa;
1184
1185 switch (op) {
1186 case nir_intrinsic_deref_atomic_add:
1187 case nir_intrinsic_deref_atomic_imin:
1188 case nir_intrinsic_deref_atomic_umin:
1189 case nir_intrinsic_deref_atomic_imax:
1190 case nir_intrinsic_deref_atomic_umax:
1191 case nir_intrinsic_deref_atomic_and:
1192 case nir_intrinsic_deref_atomic_or:
1193 case nir_intrinsic_deref_atomic_xor:
1194 case nir_intrinsic_deref_atomic_exchange:
1195 case nir_intrinsic_deref_atomic_comp_swap:
1196 case nir_intrinsic_deref_atomic_fadd:
1197 case nir_intrinsic_deref_atomic_fmin:
1198 case nir_intrinsic_deref_atomic_fmax:
1199 case nir_intrinsic_deref_atomic_fcomp_swap: {
1200 int param_count = ir->actual_parameters.length();
1201 assert(param_count == 2 || param_count == 3);
1202
1203 /* Deref */
1204 exec_node *param = ir->actual_parameters.get_head();
1205 ir_rvalue *rvalue = (ir_rvalue *) param;
1206 ir_dereference *deref = rvalue->as_dereference();
1207 ir_swizzle *swizzle = NULL;
1208 if (!deref) {
1209 /* We may have a swizzle to pick off a single vec4 component */
1210 swizzle = rvalue->as_swizzle();
1211 assert(swizzle && swizzle->type->vector_elements == 1);
1212 deref = swizzle->val->as_dereference();
1213 assert(deref);
1214 }
1215 nir_deref_instr *nir_deref = evaluate_deref(deref);
1216 if (swizzle) {
1217 nir_deref = nir_build_deref_array_imm(&b, nir_deref,
1218 swizzle->mask.x);
1219 }
1220 instr->src[0] = nir_src_for_ssa(&nir_deref->dest.ssa);
1221
1222 nir_intrinsic_set_access(instr, deref_get_qualifier(nir_deref));
1223
1224 /* data1 parameter (this is always present) */
1225 param = param->get_next();
1226 ir_instruction *inst = (ir_instruction *) param;
1227 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1228
1229 /* data2 parameter (only with atomic_comp_swap) */
1230 if (param_count == 3) {
1231 assert(op == nir_intrinsic_deref_atomic_comp_swap ||
1232 op == nir_intrinsic_deref_atomic_fcomp_swap);
1233 param = param->get_next();
1234 inst = (ir_instruction *) param;
1235 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1236 }
1237
1238 /* Atomic result */
1239 assert(ir->return_deref);
1240 nir_ssa_dest_init(&instr->instr, &instr->dest,
1241 ir->return_deref->type->vector_elements, 32, NULL);
1242 nir_builder_instr_insert(&b, &instr->instr);
1243 break;
1244 }
1245 case nir_intrinsic_atomic_counter_read_deref:
1246 case nir_intrinsic_atomic_counter_inc_deref:
1247 case nir_intrinsic_atomic_counter_pre_dec_deref:
1248 case nir_intrinsic_atomic_counter_add_deref:
1249 case nir_intrinsic_atomic_counter_min_deref:
1250 case nir_intrinsic_atomic_counter_max_deref:
1251 case nir_intrinsic_atomic_counter_and_deref:
1252 case nir_intrinsic_atomic_counter_or_deref:
1253 case nir_intrinsic_atomic_counter_xor_deref:
1254 case nir_intrinsic_atomic_counter_exchange_deref:
1255 case nir_intrinsic_atomic_counter_comp_swap_deref: {
1256 /* Set the counter variable dereference. */
1257 exec_node *param = ir->actual_parameters.get_head();
1258 ir_dereference *counter = (ir_dereference *)param;
1259
1260 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
1261 param = param->get_next();
1262
1263 /* Set the intrinsic destination. */
1264 if (ir->return_deref) {
1265 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1266 }
1267
1268 /* Set the intrinsic parameters. */
1269 if (!param->is_tail_sentinel()) {
1270 instr->src[1] =
1271 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1272 param = param->get_next();
1273 }
1274
1275 if (!param->is_tail_sentinel()) {
1276 instr->src[2] =
1277 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1278 param = param->get_next();
1279 }
1280
1281 nir_builder_instr_insert(&b, &instr->instr);
1282 break;
1283 }
1284 case nir_intrinsic_image_deref_load:
1285 case nir_intrinsic_image_deref_store:
1286 case nir_intrinsic_image_deref_atomic_add:
1287 case nir_intrinsic_image_deref_atomic_imin:
1288 case nir_intrinsic_image_deref_atomic_umin:
1289 case nir_intrinsic_image_deref_atomic_imax:
1290 case nir_intrinsic_image_deref_atomic_umax:
1291 case nir_intrinsic_image_deref_atomic_and:
1292 case nir_intrinsic_image_deref_atomic_or:
1293 case nir_intrinsic_image_deref_atomic_xor:
1294 case nir_intrinsic_image_deref_atomic_exchange:
1295 case nir_intrinsic_image_deref_atomic_comp_swap:
1296 case nir_intrinsic_image_deref_atomic_fadd:
1297 case nir_intrinsic_image_deref_samples:
1298 case nir_intrinsic_image_deref_size:
1299 case nir_intrinsic_image_deref_atomic_inc_wrap:
1300 case nir_intrinsic_image_deref_atomic_dec_wrap: {
1301 nir_ssa_undef_instr *instr_undef =
1302 nir_ssa_undef_instr_create(shader, 1, 32);
1303 nir_builder_instr_insert(&b, &instr_undef->instr);
1304
1305 /* Set the image variable dereference. */
1306 exec_node *param = ir->actual_parameters.get_head();
1307 ir_dereference *image = (ir_dereference *)param;
1308 nir_deref_instr *deref = evaluate_deref(image);
1309 const glsl_type *type = deref->type;
1310
1311 nir_intrinsic_set_access(instr, deref_get_qualifier(deref));
1312
1313 instr->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1314 param = param->get_next();
1315
1316 /* Set the intrinsic destination. */
1317 if (ir->return_deref) {
1318 unsigned num_components = ir->return_deref->type->vector_elements;
1319 nir_ssa_dest_init(&instr->instr, &instr->dest,
1320 num_components, 32, NULL);
1321 }
1322
1323 if (op == nir_intrinsic_image_deref_size) {
1324 instr->num_components = instr->dest.ssa.num_components;
1325 } else if (op == nir_intrinsic_image_deref_load ||
1326 op == nir_intrinsic_image_deref_store) {
1327 instr->num_components = 4;
1328 }
1329
1330 if (op == nir_intrinsic_image_deref_size ||
1331 op == nir_intrinsic_image_deref_samples) {
1332 nir_builder_instr_insert(&b, &instr->instr);
1333 break;
1334 }
1335
1336 /* Set the address argument, extending the coordinate vector to four
1337 * components.
1338 */
1339 nir_ssa_def *src_addr =
1340 evaluate_rvalue((ir_dereference *)param);
1341 nir_ssa_def *srcs[4];
1342
1343 for (int i = 0; i < 4; i++) {
1344 if (i < type->coordinate_components())
1345 srcs[i] = nir_channel(&b, src_addr, i);
1346 else
1347 srcs[i] = &instr_undef->def;
1348 }
1349
1350 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
1351 param = param->get_next();
1352
1353 /* Set the sample argument, which is undefined for single-sample
1354 * images.
1355 */
1356 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
1357 instr->src[2] =
1358 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1359 param = param->get_next();
1360 } else {
1361 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
1362 }
1363
1364 /* Set the intrinsic parameters. */
1365 if (!param->is_tail_sentinel()) {
1366 instr->src[3] =
1367 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1368 param = param->get_next();
1369 }
1370
1371 if (!param->is_tail_sentinel()) {
1372 instr->src[4] =
1373 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1374 param = param->get_next();
1375 }
1376 nir_builder_instr_insert(&b, &instr->instr);
1377 break;
1378 }
1379 case nir_intrinsic_memory_barrier:
1380 case nir_intrinsic_group_memory_barrier:
1381 case nir_intrinsic_memory_barrier_atomic_counter:
1382 case nir_intrinsic_memory_barrier_buffer:
1383 case nir_intrinsic_memory_barrier_image:
1384 case nir_intrinsic_memory_barrier_shared:
1385 nir_builder_instr_insert(&b, &instr->instr);
1386 break;
1387 case nir_intrinsic_shader_clock:
1388 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
1389 instr->num_components = 2;
1390 nir_builder_instr_insert(&b, &instr->instr);
1391 break;
1392 case nir_intrinsic_begin_invocation_interlock:
1393 nir_builder_instr_insert(&b, &instr->instr);
1394 break;
1395 case nir_intrinsic_end_invocation_interlock:
1396 nir_builder_instr_insert(&b, &instr->instr);
1397 break;
1398 case nir_intrinsic_store_ssbo: {
1399 exec_node *param = ir->actual_parameters.get_head();
1400 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1401
1402 param = param->get_next();
1403 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1404
1405 param = param->get_next();
1406 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1407
1408 param = param->get_next();
1409 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1410 assert(write_mask);
1411
1412 nir_ssa_def *nir_val = evaluate_rvalue(val);
1413 if (val->type->is_boolean())
1414 nir_val = nir_b2i32(&b, nir_val);
1415
1416 instr->src[0] = nir_src_for_ssa(nir_val);
1417 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1418 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1419 intrinsic_set_std430_align(instr, val->type);
1420 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1421 instr->num_components = val->type->vector_elements;
1422
1423 nir_builder_instr_insert(&b, &instr->instr);
1424 break;
1425 }
1426 case nir_intrinsic_load_ssbo: {
1427 exec_node *param = ir->actual_parameters.get_head();
1428 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1429
1430 param = param->get_next();
1431 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1432
1433 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1434 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1435
1436 const glsl_type *type = ir->return_deref->var->type;
1437 instr->num_components = type->vector_elements;
1438 intrinsic_set_std430_align(instr, type);
1439
1440 /* Setup destination register */
1441 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1442 nir_ssa_dest_init(&instr->instr, &instr->dest,
1443 type->vector_elements, bit_size, NULL);
1444
1445 /* Insert the created nir instruction now since in the case of boolean
1446 * result we will need to emit another instruction after it
1447 */
1448 nir_builder_instr_insert(&b, &instr->instr);
1449
1450 /*
1451 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1452 * consider a true boolean to be ~0. Fix this up with a != 0
1453 * comparison.
1454 */
1455 if (type->is_boolean())
1456 ret = nir_i2b(&b, &instr->dest.ssa);
1457 break;
1458 }
1459 case nir_intrinsic_ssbo_atomic_add:
1460 case nir_intrinsic_ssbo_atomic_imin:
1461 case nir_intrinsic_ssbo_atomic_umin:
1462 case nir_intrinsic_ssbo_atomic_imax:
1463 case nir_intrinsic_ssbo_atomic_umax:
1464 case nir_intrinsic_ssbo_atomic_and:
1465 case nir_intrinsic_ssbo_atomic_or:
1466 case nir_intrinsic_ssbo_atomic_xor:
1467 case nir_intrinsic_ssbo_atomic_exchange:
1468 case nir_intrinsic_ssbo_atomic_comp_swap:
1469 case nir_intrinsic_ssbo_atomic_fadd:
1470 case nir_intrinsic_ssbo_atomic_fmin:
1471 case nir_intrinsic_ssbo_atomic_fmax:
1472 case nir_intrinsic_ssbo_atomic_fcomp_swap: {
1473 int param_count = ir->actual_parameters.length();
1474 assert(param_count == 3 || param_count == 4);
1475
1476 /* Block index */
1477 exec_node *param = ir->actual_parameters.get_head();
1478 ir_instruction *inst = (ir_instruction *) param;
1479 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1480
1481 /* Offset */
1482 param = param->get_next();
1483 inst = (ir_instruction *) param;
1484 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1485
1486 /* data1 parameter (this is always present) */
1487 param = param->get_next();
1488 inst = (ir_instruction *) param;
1489 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1490
1491 /* data2 parameter (only with atomic_comp_swap) */
1492 if (param_count == 4) {
1493 assert(op == nir_intrinsic_ssbo_atomic_comp_swap ||
1494 op == nir_intrinsic_ssbo_atomic_fcomp_swap);
1495 param = param->get_next();
1496 inst = (ir_instruction *) param;
1497 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1498 }
1499
1500 /* Atomic result */
1501 assert(ir->return_deref);
1502 nir_ssa_dest_init(&instr->instr, &instr->dest,
1503 ir->return_deref->type->vector_elements, 32, NULL);
1504 nir_builder_instr_insert(&b, &instr->instr);
1505 break;
1506 }
1507 case nir_intrinsic_load_shared: {
1508 exec_node *param = ir->actual_parameters.get_head();
1509 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1510
1511 nir_intrinsic_set_base(instr, 0);
1512 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1513
1514 const glsl_type *type = ir->return_deref->var->type;
1515 instr->num_components = type->vector_elements;
1516 intrinsic_set_std430_align(instr, type);
1517
1518 /* Setup destination register */
1519 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1520 nir_ssa_dest_init(&instr->instr, &instr->dest,
1521 type->vector_elements, bit_size, NULL);
1522
1523 nir_builder_instr_insert(&b, &instr->instr);
1524
1525 /* The value in shared memory is a 32-bit value */
1526 if (type->is_boolean())
1527 ret = nir_i2b(&b, &instr->dest.ssa);
1528 break;
1529 }
1530 case nir_intrinsic_store_shared: {
1531 exec_node *param = ir->actual_parameters.get_head();
1532 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1533
1534 param = param->get_next();
1535 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1536
1537 param = param->get_next();
1538 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1539 assert(write_mask);
1540
1541 nir_intrinsic_set_base(instr, 0);
1542 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1543
1544 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1545
1546 nir_ssa_def *nir_val = evaluate_rvalue(val);
1547 /* The value in shared memory is a 32-bit value */
1548 if (val->type->is_boolean())
1549 nir_val = nir_b2i32(&b, nir_val);
1550
1551 instr->src[0] = nir_src_for_ssa(nir_val);
1552 instr->num_components = val->type->vector_elements;
1553 intrinsic_set_std430_align(instr, val->type);
1554
1555 nir_builder_instr_insert(&b, &instr->instr);
1556 break;
1557 }
1558 case nir_intrinsic_shared_atomic_add:
1559 case nir_intrinsic_shared_atomic_imin:
1560 case nir_intrinsic_shared_atomic_umin:
1561 case nir_intrinsic_shared_atomic_imax:
1562 case nir_intrinsic_shared_atomic_umax:
1563 case nir_intrinsic_shared_atomic_and:
1564 case nir_intrinsic_shared_atomic_or:
1565 case nir_intrinsic_shared_atomic_xor:
1566 case nir_intrinsic_shared_atomic_exchange:
1567 case nir_intrinsic_shared_atomic_comp_swap:
1568 case nir_intrinsic_shared_atomic_fadd:
1569 case nir_intrinsic_shared_atomic_fmin:
1570 case nir_intrinsic_shared_atomic_fmax:
1571 case nir_intrinsic_shared_atomic_fcomp_swap: {
1572 int param_count = ir->actual_parameters.length();
1573 assert(param_count == 2 || param_count == 3);
1574
1575 /* Offset */
1576 exec_node *param = ir->actual_parameters.get_head();
1577 ir_instruction *inst = (ir_instruction *) param;
1578 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1579
1580 /* data1 parameter (this is always present) */
1581 param = param->get_next();
1582 inst = (ir_instruction *) param;
1583 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1584
1585 /* data2 parameter (only with atomic_comp_swap) */
1586 if (param_count == 3) {
1587 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1588 op == nir_intrinsic_shared_atomic_fcomp_swap);
1589 param = param->get_next();
1590 inst = (ir_instruction *) param;
1591 instr->src[2] =
1592 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1593 }
1594
1595 /* Atomic result */
1596 assert(ir->return_deref);
1597 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1598 nir_ssa_dest_init(&instr->instr, &instr->dest,
1599 ir->return_deref->type->vector_elements,
1600 bit_size, NULL);
1601 nir_builder_instr_insert(&b, &instr->instr);
1602 break;
1603 }
1604 case nir_intrinsic_vote_any:
1605 case nir_intrinsic_vote_all:
1606 case nir_intrinsic_vote_ieq: {
1607 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1608 instr->num_components = 1;
1609
1610 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1611 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1612
1613 nir_builder_instr_insert(&b, &instr->instr);
1614 break;
1615 }
1616
1617 case nir_intrinsic_ballot: {
1618 nir_ssa_dest_init(&instr->instr, &instr->dest,
1619 ir->return_deref->type->vector_elements, 64, NULL);
1620 instr->num_components = ir->return_deref->type->vector_elements;
1621
1622 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1623 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1624
1625 nir_builder_instr_insert(&b, &instr->instr);
1626 break;
1627 }
1628 case nir_intrinsic_read_invocation: {
1629 nir_ssa_dest_init(&instr->instr, &instr->dest,
1630 ir->return_deref->type->vector_elements, 32, NULL);
1631 instr->num_components = ir->return_deref->type->vector_elements;
1632
1633 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1634 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1635
1636 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1637 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1638
1639 nir_builder_instr_insert(&b, &instr->instr);
1640 break;
1641 }
1642 case nir_intrinsic_read_first_invocation: {
1643 nir_ssa_dest_init(&instr->instr, &instr->dest,
1644 ir->return_deref->type->vector_elements, 32, NULL);
1645 instr->num_components = ir->return_deref->type->vector_elements;
1646
1647 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1648 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1649
1650 nir_builder_instr_insert(&b, &instr->instr);
1651 break;
1652 }
1653 case nir_intrinsic_is_helper_invocation: {
1654 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1655 instr->num_components = 1;
1656 nir_builder_instr_insert(&b, &instr->instr);
1657 break;
1658 }
1659 default:
1660 unreachable("not reached");
1661 }
1662
1663 if (ir->return_deref)
1664 nir_store_deref(&b, evaluate_deref(ir->return_deref), ret, ~0);
1665
1666 return;
1667 }
1668
1669 struct hash_entry *entry =
1670 _mesa_hash_table_search(this->overload_table, ir->callee);
1671 assert(entry);
1672 nir_function *callee = (nir_function *) entry->data;
1673
1674 nir_call_instr *call = nir_call_instr_create(this->shader, callee);
1675
1676 unsigned i = 0;
1677 nir_deref_instr *ret_deref = NULL;
1678 if (ir->return_deref) {
1679 nir_variable *ret_tmp =
1680 nir_local_variable_create(this->impl, ir->return_deref->type,
1681 "return_tmp");
1682 ret_deref = nir_build_deref_var(&b, ret_tmp);
1683 call->params[i++] = nir_src_for_ssa(&ret_deref->dest.ssa);
1684 }
1685
1686 foreach_two_lists(formal_node, &ir->callee->parameters,
1687 actual_node, &ir->actual_parameters) {
1688 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1689 ir_variable *sig_param = (ir_variable *) formal_node;
1690
1691 if (sig_param->data.mode == ir_var_function_out) {
1692 nir_deref_instr *out_deref = evaluate_deref(param_rvalue);
1693 call->params[i] = nir_src_for_ssa(&out_deref->dest.ssa);
1694 } else if (sig_param->data.mode == ir_var_function_in) {
1695 nir_ssa_def *val = evaluate_rvalue(param_rvalue);
1696 nir_src src = nir_src_for_ssa(val);
1697
1698 nir_src_copy(&call->params[i], &src, call);
1699 } else if (sig_param->data.mode == ir_var_function_inout) {
1700 unreachable("unimplemented: inout parameters");
1701 }
1702
1703 i++;
1704 }
1705
1706 nir_builder_instr_insert(&b, &call->instr);
1707
1708 if (ir->return_deref)
1709 nir_store_deref(&b, evaluate_deref(ir->return_deref), nir_load_deref(&b, ret_deref), ~0);
1710 }
1711
1712 void
1713 nir_visitor::visit(ir_assignment *ir)
1714 {
1715 unsigned num_components = ir->lhs->type->vector_elements;
1716
1717 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1718 ir->lhs->variable_referenced()->data.precise;
1719
1720 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1721 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1722 nir_deref_instr *lhs = evaluate_deref(ir->lhs);
1723 nir_deref_instr *rhs = evaluate_deref(ir->rhs);
1724 enum gl_access_qualifier lhs_qualifiers = deref_get_qualifier(lhs);
1725 enum gl_access_qualifier rhs_qualifiers = deref_get_qualifier(rhs);
1726 if (ir->condition) {
1727 nir_push_if(&b, evaluate_rvalue(ir->condition));
1728 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1729 rhs_qualifiers);
1730 nir_pop_if(&b, NULL);
1731 } else {
1732 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1733 rhs_qualifiers);
1734 }
1735 return;
1736 }
1737
1738 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1739
1740 ir->lhs->accept(this);
1741 nir_deref_instr *lhs_deref = this->deref;
1742 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1743
1744 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1745 /* GLSL IR will give us the input to the write-masked assignment in a
1746 * single packed vector. So, for example, if the writemask is xzw, then
1747 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1748 * from the load.
1749 */
1750 unsigned swiz[4];
1751 unsigned component = 0;
1752 for (unsigned i = 0; i < 4; i++) {
1753 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1754 }
1755 src = nir_swizzle(&b, src, swiz, num_components);
1756 }
1757
1758 enum gl_access_qualifier qualifiers = deref_get_qualifier(lhs_deref);
1759 if (ir->condition) {
1760 nir_push_if(&b, evaluate_rvalue(ir->condition));
1761 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1762 qualifiers);
1763 nir_pop_if(&b, NULL);
1764 } else {
1765 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1766 qualifiers);
1767 }
1768 }
1769
1770 /*
1771 * Given an instruction, returns a pointer to its destination or NULL if there
1772 * is no destination.
1773 *
1774 * Note that this only handles instructions we generate at this level.
1775 */
1776 static nir_dest *
1777 get_instr_dest(nir_instr *instr)
1778 {
1779 nir_alu_instr *alu_instr;
1780 nir_intrinsic_instr *intrinsic_instr;
1781 nir_tex_instr *tex_instr;
1782
1783 switch (instr->type) {
1784 case nir_instr_type_alu:
1785 alu_instr = nir_instr_as_alu(instr);
1786 return &alu_instr->dest.dest;
1787
1788 case nir_instr_type_intrinsic:
1789 intrinsic_instr = nir_instr_as_intrinsic(instr);
1790 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1791 return &intrinsic_instr->dest;
1792 else
1793 return NULL;
1794
1795 case nir_instr_type_tex:
1796 tex_instr = nir_instr_as_tex(instr);
1797 return &tex_instr->dest;
1798
1799 default:
1800 unreachable("not reached");
1801 }
1802
1803 return NULL;
1804 }
1805
1806 void
1807 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1808 unsigned bit_size)
1809 {
1810 nir_dest *dest = get_instr_dest(instr);
1811
1812 if (dest)
1813 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1814
1815 nir_builder_instr_insert(&b, instr);
1816
1817 if (dest) {
1818 assert(dest->is_ssa);
1819 this->result = &dest->ssa;
1820 }
1821 }
1822
1823 nir_ssa_def *
1824 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1825 {
1826 ir->accept(this);
1827 if (ir->as_dereference() || ir->as_constant()) {
1828 /*
1829 * A dereference is being used on the right hand side, which means we
1830 * must emit a variable load.
1831 */
1832
1833 enum gl_access_qualifier access = deref_get_qualifier(this->deref);
1834 this->result = nir_load_deref_with_access(&b, this->deref, access);
1835 }
1836
1837 return this->result;
1838 }
1839
1840 static bool
1841 type_is_float(glsl_base_type type)
1842 {
1843 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1844 type == GLSL_TYPE_FLOAT16;
1845 }
1846
1847 static bool
1848 type_is_signed(glsl_base_type type)
1849 {
1850 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1851 type == GLSL_TYPE_INT16;
1852 }
1853
1854 void
1855 nir_visitor::visit(ir_expression *ir)
1856 {
1857 /* Some special cases */
1858 switch (ir->operation) {
1859 case ir_binop_ubo_load: {
1860 nir_intrinsic_instr *load =
1861 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1862 unsigned bit_size = ir->type->is_boolean() ? 32 :
1863 glsl_get_bit_size(ir->type);
1864 load->num_components = ir->type->vector_elements;
1865 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1866 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1867 intrinsic_set_std430_align(load, ir->type);
1868 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1869
1870 /*
1871 * In UBO's, a true boolean value is any non-zero value, but we consider
1872 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1873 */
1874
1875 if (ir->type->is_boolean())
1876 this->result = nir_i2b(&b, &load->dest.ssa);
1877
1878 return;
1879 }
1880
1881 case ir_unop_interpolate_at_centroid:
1882 case ir_binop_interpolate_at_offset:
1883 case ir_binop_interpolate_at_sample: {
1884 ir_dereference *deref = ir->operands[0]->as_dereference();
1885 ir_swizzle *swizzle = NULL;
1886 if (!deref) {
1887 /* the api does not allow a swizzle here, but the varying packing code
1888 * may have pushed one into here.
1889 */
1890 swizzle = ir->operands[0]->as_swizzle();
1891 assert(swizzle);
1892 deref = swizzle->val->as_dereference();
1893 assert(deref);
1894 }
1895
1896 deref->accept(this);
1897
1898 nir_intrinsic_op op;
1899 if (this->deref->mode == nir_var_shader_in) {
1900 switch (ir->operation) {
1901 case ir_unop_interpolate_at_centroid:
1902 op = nir_intrinsic_interp_deref_at_centroid;
1903 break;
1904 case ir_binop_interpolate_at_offset:
1905 op = nir_intrinsic_interp_deref_at_offset;
1906 break;
1907 case ir_binop_interpolate_at_sample:
1908 op = nir_intrinsic_interp_deref_at_sample;
1909 break;
1910 default:
1911 unreachable("Invalid interpolation intrinsic");
1912 }
1913 } else {
1914 /* This case can happen if the vertex shader does not write the
1915 * given varying. In this case, the linker will lower it to a
1916 * global variable. Since interpolating a variable makes no
1917 * sense, we'll just turn it into a load which will probably
1918 * eventually end up as an SSA definition.
1919 */
1920 assert(this->deref->mode == nir_var_shader_temp);
1921 op = nir_intrinsic_load_deref;
1922 }
1923
1924 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1925 intrin->num_components = deref->type->vector_elements;
1926 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1927
1928 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1929 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1930 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1931
1932 unsigned bit_size = glsl_get_bit_size(deref->type);
1933 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1934
1935 if (swizzle) {
1936 unsigned swiz[4] = {
1937 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1938 };
1939
1940 result = nir_swizzle(&b, result, swiz,
1941 swizzle->type->vector_elements);
1942 }
1943
1944 return;
1945 }
1946
1947 case ir_unop_ssbo_unsized_array_length: {
1948 nir_intrinsic_instr *intrin =
1949 nir_intrinsic_instr_create(b.shader,
1950 nir_intrinsic_deref_buffer_array_length);
1951
1952 ir_dereference *deref = ir->operands[0]->as_dereference();
1953 intrin->src[0] = nir_src_for_ssa(&evaluate_deref(deref)->dest.ssa);
1954
1955 add_instr(&intrin->instr, 1, 32);
1956 return;
1957 }
1958
1959 default:
1960 break;
1961 }
1962
1963 nir_ssa_def *srcs[4];
1964 for (unsigned i = 0; i < ir->num_operands; i++)
1965 srcs[i] = evaluate_rvalue(ir->operands[i]);
1966
1967 glsl_base_type types[4];
1968 for (unsigned i = 0; i < ir->num_operands; i++)
1969 types[i] = ir->operands[i]->type->base_type;
1970
1971 glsl_base_type out_type = ir->type->base_type;
1972
1973 switch (ir->operation) {
1974 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1975 case ir_unop_logic_not:
1976 result = nir_inot(&b, srcs[0]);
1977 break;
1978 case ir_unop_neg:
1979 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1980 : nir_ineg(&b, srcs[0]);
1981 break;
1982 case ir_unop_abs:
1983 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1984 : nir_iabs(&b, srcs[0]);
1985 break;
1986 case ir_unop_saturate:
1987 assert(type_is_float(types[0]));
1988 result = nir_fsat(&b, srcs[0]);
1989 break;
1990 case ir_unop_sign:
1991 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1992 : nir_isign(&b, srcs[0]);
1993 break;
1994 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1995 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1996 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1997 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1998 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1999 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
2000 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
2001 case ir_unop_i2f:
2002 case ir_unop_u2f:
2003 case ir_unop_b2f:
2004 case ir_unop_f2i:
2005 case ir_unop_f2u:
2006 case ir_unop_f2b:
2007 case ir_unop_i2b:
2008 case ir_unop_b2i:
2009 case ir_unop_b2i64:
2010 case ir_unop_d2f:
2011 case ir_unop_f2d:
2012 case ir_unop_d2i:
2013 case ir_unop_d2u:
2014 case ir_unop_d2b:
2015 case ir_unop_i2d:
2016 case ir_unop_u2d:
2017 case ir_unop_i642i:
2018 case ir_unop_i642u:
2019 case ir_unop_i642f:
2020 case ir_unop_i642b:
2021 case ir_unop_i642d:
2022 case ir_unop_u642i:
2023 case ir_unop_u642u:
2024 case ir_unop_u642f:
2025 case ir_unop_u642d:
2026 case ir_unop_i2i64:
2027 case ir_unop_u2i64:
2028 case ir_unop_f2i64:
2029 case ir_unop_d2i64:
2030 case ir_unop_i2u64:
2031 case ir_unop_u2u64:
2032 case ir_unop_f2u64:
2033 case ir_unop_d2u64:
2034 case ir_unop_i2u:
2035 case ir_unop_u2i:
2036 case ir_unop_i642u64:
2037 case ir_unop_u642i64: {
2038 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
2039 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
2040 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
2041 nir_rounding_mode_undef),
2042 srcs[0], NULL, NULL, NULL);
2043 /* b2i and b2f don't have fixed bit-size versions so the builder will
2044 * just assume 32 and we have to fix it up here.
2045 */
2046 result->bit_size = nir_alu_type_get_type_size(dst_type);
2047 break;
2048 }
2049
2050 case ir_unop_bitcast_i2f:
2051 case ir_unop_bitcast_f2i:
2052 case ir_unop_bitcast_u2f:
2053 case ir_unop_bitcast_f2u:
2054 case ir_unop_bitcast_i642d:
2055 case ir_unop_bitcast_d2i64:
2056 case ir_unop_bitcast_u642d:
2057 case ir_unop_bitcast_d2u64:
2058 case ir_unop_subroutine_to_int:
2059 /* no-op */
2060 result = nir_mov(&b, srcs[0]);
2061 break;
2062 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
2063 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
2064 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
2065 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
2066 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
2067 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
2068 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
2069 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
2070 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
2071 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
2072 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
2073 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
2074 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
2075 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
2076 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
2077 case ir_unop_pack_snorm_2x16:
2078 result = nir_pack_snorm_2x16(&b, srcs[0]);
2079 break;
2080 case ir_unop_pack_snorm_4x8:
2081 result = nir_pack_snorm_4x8(&b, srcs[0]);
2082 break;
2083 case ir_unop_pack_unorm_2x16:
2084 result = nir_pack_unorm_2x16(&b, srcs[0]);
2085 break;
2086 case ir_unop_pack_unorm_4x8:
2087 result = nir_pack_unorm_4x8(&b, srcs[0]);
2088 break;
2089 case ir_unop_pack_half_2x16:
2090 result = nir_pack_half_2x16(&b, srcs[0]);
2091 break;
2092 case ir_unop_unpack_snorm_2x16:
2093 result = nir_unpack_snorm_2x16(&b, srcs[0]);
2094 break;
2095 case ir_unop_unpack_snorm_4x8:
2096 result = nir_unpack_snorm_4x8(&b, srcs[0]);
2097 break;
2098 case ir_unop_unpack_unorm_2x16:
2099 result = nir_unpack_unorm_2x16(&b, srcs[0]);
2100 break;
2101 case ir_unop_unpack_unorm_4x8:
2102 result = nir_unpack_unorm_4x8(&b, srcs[0]);
2103 break;
2104 case ir_unop_unpack_half_2x16:
2105 result = nir_unpack_half_2x16(&b, srcs[0]);
2106 break;
2107 case ir_unop_pack_sampler_2x32:
2108 case ir_unop_pack_image_2x32:
2109 case ir_unop_pack_double_2x32:
2110 case ir_unop_pack_int_2x32:
2111 case ir_unop_pack_uint_2x32:
2112 result = nir_pack_64_2x32(&b, srcs[0]);
2113 break;
2114 case ir_unop_unpack_sampler_2x32:
2115 case ir_unop_unpack_image_2x32:
2116 case ir_unop_unpack_double_2x32:
2117 case ir_unop_unpack_int_2x32:
2118 case ir_unop_unpack_uint_2x32:
2119 result = nir_unpack_64_2x32(&b, srcs[0]);
2120 break;
2121 case ir_unop_bitfield_reverse:
2122 result = nir_bitfield_reverse(&b, srcs[0]);
2123 break;
2124 case ir_unop_bit_count:
2125 result = nir_bit_count(&b, srcs[0]);
2126 break;
2127 case ir_unop_find_msb:
2128 switch (types[0]) {
2129 case GLSL_TYPE_UINT:
2130 result = nir_ufind_msb(&b, srcs[0]);
2131 break;
2132 case GLSL_TYPE_INT:
2133 result = nir_ifind_msb(&b, srcs[0]);
2134 break;
2135 default:
2136 unreachable("Invalid type for findMSB()");
2137 }
2138 break;
2139 case ir_unop_find_lsb:
2140 result = nir_find_lsb(&b, srcs[0]);
2141 break;
2142
2143 case ir_unop_noise:
2144 switch (ir->type->vector_elements) {
2145 case 1:
2146 switch (ir->operands[0]->type->vector_elements) {
2147 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
2148 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
2149 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
2150 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
2151 default: unreachable("not reached");
2152 }
2153 break;
2154 case 2:
2155 switch (ir->operands[0]->type->vector_elements) {
2156 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
2157 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
2158 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
2159 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
2160 default: unreachable("not reached");
2161 }
2162 break;
2163 case 3:
2164 switch (ir->operands[0]->type->vector_elements) {
2165 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
2166 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
2167 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
2168 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
2169 default: unreachable("not reached");
2170 }
2171 break;
2172 case 4:
2173 switch (ir->operands[0]->type->vector_elements) {
2174 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
2175 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
2176 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
2177 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
2178 default: unreachable("not reached");
2179 }
2180 break;
2181 default:
2182 unreachable("not reached");
2183 }
2184 break;
2185 case ir_unop_get_buffer_size: {
2186 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
2187 this->shader,
2188 nir_intrinsic_get_buffer_size);
2189 load->num_components = ir->type->vector_elements;
2190 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
2191 unsigned bit_size = glsl_get_bit_size(ir->type);
2192 add_instr(&load->instr, ir->type->vector_elements, bit_size);
2193 return;
2194 }
2195
2196 case ir_unop_atan:
2197 result = nir_atan(&b, srcs[0]);
2198 break;
2199
2200 case ir_binop_add:
2201 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
2202 : nir_iadd(&b, srcs[0], srcs[1]);
2203 break;
2204 case ir_binop_sub:
2205 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
2206 : nir_isub(&b, srcs[0], srcs[1]);
2207 break;
2208 case ir_binop_mul:
2209 if (type_is_float(out_type))
2210 result = nir_fmul(&b, srcs[0], srcs[1]);
2211 else if (out_type == GLSL_TYPE_INT64 &&
2212 (ir->operands[0]->type->base_type == GLSL_TYPE_INT ||
2213 ir->operands[1]->type->base_type == GLSL_TYPE_INT))
2214 result = nir_imul_2x32_64(&b, srcs[0], srcs[1]);
2215 else if (out_type == GLSL_TYPE_UINT64 &&
2216 (ir->operands[0]->type->base_type == GLSL_TYPE_UINT ||
2217 ir->operands[1]->type->base_type == GLSL_TYPE_UINT))
2218 result = nir_umul_2x32_64(&b, srcs[0], srcs[1]);
2219 else
2220 result = nir_imul(&b, srcs[0], srcs[1]);
2221 break;
2222 case ir_binop_div:
2223 if (type_is_float(out_type))
2224 result = nir_fdiv(&b, srcs[0], srcs[1]);
2225 else if (type_is_signed(out_type))
2226 result = nir_idiv(&b, srcs[0], srcs[1]);
2227 else
2228 result = nir_udiv(&b, srcs[0], srcs[1]);
2229 break;
2230 case ir_binop_mod:
2231 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
2232 : nir_umod(&b, srcs[0], srcs[1]);
2233 break;
2234 case ir_binop_min:
2235 if (type_is_float(out_type))
2236 result = nir_fmin(&b, srcs[0], srcs[1]);
2237 else if (type_is_signed(out_type))
2238 result = nir_imin(&b, srcs[0], srcs[1]);
2239 else
2240 result = nir_umin(&b, srcs[0], srcs[1]);
2241 break;
2242 case ir_binop_max:
2243 if (type_is_float(out_type))
2244 result = nir_fmax(&b, srcs[0], srcs[1]);
2245 else if (type_is_signed(out_type))
2246 result = nir_imax(&b, srcs[0], srcs[1]);
2247 else
2248 result = nir_umax(&b, srcs[0], srcs[1]);
2249 break;
2250 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
2251 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
2252 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
2253 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
2254 case ir_binop_logic_and:
2255 result = nir_iand(&b, srcs[0], srcs[1]);
2256 break;
2257 case ir_binop_logic_or:
2258 result = nir_ior(&b, srcs[0], srcs[1]);
2259 break;
2260 case ir_binop_logic_xor:
2261 result = nir_ixor(&b, srcs[0], srcs[1]);
2262 break;
2263 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
2264 case ir_binop_rshift:
2265 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
2266 : nir_ushr(&b, srcs[0], srcs[1]);
2267 break;
2268 case ir_binop_imul_high:
2269 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
2270 : nir_umul_high(&b, srcs[0], srcs[1]);
2271 break;
2272 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
2273 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
2274 case ir_binop_less:
2275 if (type_is_float(types[0]))
2276 result = nir_flt(&b, srcs[0], srcs[1]);
2277 else if (type_is_signed(types[0]))
2278 result = nir_ilt(&b, srcs[0], srcs[1]);
2279 else
2280 result = nir_ult(&b, srcs[0], srcs[1]);
2281 break;
2282 case ir_binop_gequal:
2283 if (type_is_float(types[0]))
2284 result = nir_fge(&b, srcs[0], srcs[1]);
2285 else if (type_is_signed(types[0]))
2286 result = nir_ige(&b, srcs[0], srcs[1]);
2287 else
2288 result = nir_uge(&b, srcs[0], srcs[1]);
2289 break;
2290 case ir_binop_equal:
2291 if (type_is_float(types[0]))
2292 result = nir_feq(&b, srcs[0], srcs[1]);
2293 else
2294 result = nir_ieq(&b, srcs[0], srcs[1]);
2295 break;
2296 case ir_binop_nequal:
2297 if (type_is_float(types[0]))
2298 result = nir_fne(&b, srcs[0], srcs[1]);
2299 else
2300 result = nir_ine(&b, srcs[0], srcs[1]);
2301 break;
2302 case ir_binop_all_equal:
2303 if (type_is_float(types[0])) {
2304 switch (ir->operands[0]->type->vector_elements) {
2305 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
2306 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
2307 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
2308 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
2309 default:
2310 unreachable("not reached");
2311 }
2312 } else {
2313 switch (ir->operands[0]->type->vector_elements) {
2314 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
2315 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
2316 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
2317 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
2318 default:
2319 unreachable("not reached");
2320 }
2321 }
2322 break;
2323 case ir_binop_any_nequal:
2324 if (type_is_float(types[0])) {
2325 switch (ir->operands[0]->type->vector_elements) {
2326 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
2327 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
2328 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
2329 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
2330 default:
2331 unreachable("not reached");
2332 }
2333 } else {
2334 switch (ir->operands[0]->type->vector_elements) {
2335 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
2336 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
2337 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
2338 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
2339 default:
2340 unreachable("not reached");
2341 }
2342 }
2343 break;
2344 case ir_binop_dot:
2345 switch (ir->operands[0]->type->vector_elements) {
2346 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
2347 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
2348 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
2349 default:
2350 unreachable("not reached");
2351 }
2352 break;
2353 case ir_binop_vector_extract: {
2354 result = nir_channel(&b, srcs[0], 0);
2355 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
2356 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
2357 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
2358 swizzled, result);
2359 }
2360 break;
2361 }
2362
2363 case ir_binop_atan2:
2364 result = nir_atan2(&b, srcs[0], srcs[1]);
2365 break;
2366
2367 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
2368 case ir_triop_fma:
2369 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
2370 break;
2371 case ir_triop_lrp:
2372 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
2373 break;
2374 case ir_triop_csel:
2375 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
2376 break;
2377 case ir_triop_bitfield_extract:
2378 result = (out_type == GLSL_TYPE_INT) ?
2379 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
2380 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
2381 break;
2382 case ir_quadop_bitfield_insert:
2383 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
2384 break;
2385 case ir_quadop_vector:
2386 result = nir_vec(&b, srcs, ir->type->vector_elements);
2387 break;
2388
2389 default:
2390 unreachable("not reached");
2391 }
2392 }
2393
2394 void
2395 nir_visitor::visit(ir_swizzle *ir)
2396 {
2397 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
2398 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
2399 ir->type->vector_elements);
2400 }
2401
2402 void
2403 nir_visitor::visit(ir_texture *ir)
2404 {
2405 unsigned num_srcs;
2406 nir_texop op;
2407 switch (ir->op) {
2408 case ir_tex:
2409 op = nir_texop_tex;
2410 num_srcs = 1; /* coordinate */
2411 break;
2412
2413 case ir_txb:
2414 case ir_txl:
2415 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2416 num_srcs = 2; /* coordinate, bias/lod */
2417 break;
2418
2419 case ir_txd:
2420 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2421 num_srcs = 3;
2422 break;
2423
2424 case ir_txf:
2425 op = nir_texop_txf;
2426 if (ir->lod_info.lod != NULL)
2427 num_srcs = 2; /* coordinate, lod */
2428 else
2429 num_srcs = 1; /* coordinate */
2430 break;
2431
2432 case ir_txf_ms:
2433 op = nir_texop_txf_ms;
2434 num_srcs = 2; /* coordinate, sample_index */
2435 break;
2436
2437 case ir_txs:
2438 op = nir_texop_txs;
2439 if (ir->lod_info.lod != NULL)
2440 num_srcs = 1; /* lod */
2441 else
2442 num_srcs = 0;
2443 break;
2444
2445 case ir_lod:
2446 op = nir_texop_lod;
2447 num_srcs = 1; /* coordinate */
2448 break;
2449
2450 case ir_tg4:
2451 op = nir_texop_tg4;
2452 num_srcs = 1; /* coordinate */
2453 break;
2454
2455 case ir_query_levels:
2456 op = nir_texop_query_levels;
2457 num_srcs = 0;
2458 break;
2459
2460 case ir_texture_samples:
2461 op = nir_texop_texture_samples;
2462 num_srcs = 0;
2463 break;
2464
2465 case ir_samples_identical:
2466 op = nir_texop_samples_identical;
2467 num_srcs = 1; /* coordinate */
2468 break;
2469
2470 default:
2471 unreachable("not reached");
2472 }
2473
2474 if (ir->projector != NULL)
2475 num_srcs++;
2476 if (ir->shadow_comparator != NULL)
2477 num_srcs++;
2478 /* offsets are constants we store inside nir_tex_intrs.offsets */
2479 if (ir->offset != NULL && !ir->offset->type->is_array())
2480 num_srcs++;
2481
2482 /* Add one for the texture deref */
2483 num_srcs += 2;
2484
2485 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2486
2487 instr->op = op;
2488 instr->sampler_dim =
2489 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2490 instr->is_array = ir->sampler->type->sampler_array;
2491 instr->is_shadow = ir->sampler->type->sampler_shadow;
2492 if (instr->is_shadow)
2493 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2494 switch (ir->type->base_type) {
2495 case GLSL_TYPE_FLOAT:
2496 instr->dest_type = nir_type_float;
2497 break;
2498 case GLSL_TYPE_INT:
2499 instr->dest_type = nir_type_int;
2500 break;
2501 case GLSL_TYPE_BOOL:
2502 case GLSL_TYPE_UINT:
2503 instr->dest_type = nir_type_uint;
2504 break;
2505 default:
2506 unreachable("not reached");
2507 }
2508
2509 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2510
2511 /* check for bindless handles */
2512 if (sampler_deref->mode != nir_var_uniform ||
2513 nir_deref_instr_get_variable(sampler_deref)->data.bindless) {
2514 nir_ssa_def *load = nir_load_deref(&b, sampler_deref);
2515 instr->src[0].src = nir_src_for_ssa(load);
2516 instr->src[0].src_type = nir_tex_src_texture_handle;
2517 instr->src[1].src = nir_src_for_ssa(load);
2518 instr->src[1].src_type = nir_tex_src_sampler_handle;
2519 } else {
2520 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2521 instr->src[0].src_type = nir_tex_src_texture_deref;
2522 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2523 instr->src[1].src_type = nir_tex_src_sampler_deref;
2524 }
2525
2526 unsigned src_number = 2;
2527
2528 if (ir->coordinate != NULL) {
2529 instr->coord_components = ir->coordinate->type->vector_elements;
2530 instr->src[src_number].src =
2531 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2532 instr->src[src_number].src_type = nir_tex_src_coord;
2533 src_number++;
2534 }
2535
2536 if (ir->projector != NULL) {
2537 instr->src[src_number].src =
2538 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2539 instr->src[src_number].src_type = nir_tex_src_projector;
2540 src_number++;
2541 }
2542
2543 if (ir->shadow_comparator != NULL) {
2544 instr->src[src_number].src =
2545 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2546 instr->src[src_number].src_type = nir_tex_src_comparator;
2547 src_number++;
2548 }
2549
2550 if (ir->offset != NULL) {
2551 if (ir->offset->type->is_array()) {
2552 for (int i = 0; i < ir->offset->type->array_size(); i++) {
2553 const ir_constant *c =
2554 ir->offset->as_constant()->get_array_element(i);
2555
2556 for (unsigned j = 0; j < 2; ++j) {
2557 int val = c->get_int_component(j);
2558 assert(val <= 31 && val >= -32);
2559 instr->tg4_offsets[i][j] = val;
2560 }
2561 }
2562 } else {
2563 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2564
2565 instr->src[src_number].src =
2566 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2567 instr->src[src_number].src_type = nir_tex_src_offset;
2568 src_number++;
2569 }
2570 }
2571
2572 switch (ir->op) {
2573 case ir_txb:
2574 instr->src[src_number].src =
2575 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2576 instr->src[src_number].src_type = nir_tex_src_bias;
2577 src_number++;
2578 break;
2579
2580 case ir_txl:
2581 case ir_txf:
2582 case ir_txs:
2583 if (ir->lod_info.lod != NULL) {
2584 instr->src[src_number].src =
2585 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2586 instr->src[src_number].src_type = nir_tex_src_lod;
2587 src_number++;
2588 }
2589 break;
2590
2591 case ir_txd:
2592 instr->src[src_number].src =
2593 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2594 instr->src[src_number].src_type = nir_tex_src_ddx;
2595 src_number++;
2596 instr->src[src_number].src =
2597 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2598 instr->src[src_number].src_type = nir_tex_src_ddy;
2599 src_number++;
2600 break;
2601
2602 case ir_txf_ms:
2603 instr->src[src_number].src =
2604 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2605 instr->src[src_number].src_type = nir_tex_src_ms_index;
2606 src_number++;
2607 break;
2608
2609 case ir_tg4:
2610 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2611 break;
2612
2613 default:
2614 break;
2615 }
2616
2617 assert(src_number == num_srcs);
2618
2619 unsigned bit_size = glsl_get_bit_size(ir->type);
2620 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2621 }
2622
2623 void
2624 nir_visitor::visit(ir_constant *ir)
2625 {
2626 /*
2627 * We don't know if this variable is an array or struct that gets
2628 * dereferenced, so do the safe thing an make it a variable with a
2629 * constant initializer and return a dereference.
2630 */
2631
2632 nir_variable *var =
2633 nir_local_variable_create(this->impl, ir->type, "const_temp");
2634 var->data.read_only = true;
2635 var->constant_initializer = constant_copy(ir, var);
2636
2637 this->deref = nir_build_deref_var(&b, var);
2638 }
2639
2640 void
2641 nir_visitor::visit(ir_dereference_variable *ir)
2642 {
2643 if (ir->variable_referenced()->data.mode == ir_var_function_out) {
2644 unsigned i = (sig->return_type != glsl_type::void_type) ? 1 : 0;
2645
2646 foreach_in_list(ir_variable, param, &sig->parameters) {
2647 if (param == ir->variable_referenced()) {
2648 break;
2649 }
2650 i++;
2651 }
2652
2653 this->deref = nir_build_deref_cast(&b, nir_load_param(&b, i),
2654 nir_var_function_temp, ir->type, 0);
2655 return;
2656 }
2657
2658 assert(ir->variable_referenced()->data.mode != ir_var_function_inout);
2659
2660 struct hash_entry *entry =
2661 _mesa_hash_table_search(this->var_table, ir->var);
2662 assert(entry);
2663 nir_variable *var = (nir_variable *) entry->data;
2664
2665 this->deref = nir_build_deref_var(&b, var);
2666 }
2667
2668 void
2669 nir_visitor::visit(ir_dereference_record *ir)
2670 {
2671 ir->record->accept(this);
2672
2673 int field_index = ir->field_idx;
2674 assert(field_index >= 0);
2675
2676 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2677 }
2678
2679 void
2680 nir_visitor::visit(ir_dereference_array *ir)
2681 {
2682 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2683
2684 ir->array->accept(this);
2685
2686 this->deref = nir_build_deref_array(&b, this->deref, index);
2687 }
2688
2689 void
2690 nir_visitor::visit(ir_barrier *)
2691 {
2692 nir_intrinsic_instr *instr =
2693 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2694 nir_builder_instr_insert(&b, &instr->instr);
2695 }
2696
2697 nir_shader *
2698 glsl_float64_funcs_to_nir(struct gl_context *ctx,
2699 const nir_shader_compiler_options *options)
2700 {
2701 /* We pretend it's a vertex shader. Ultimately, the stage shouldn't
2702 * matter because we're not optimizing anything here.
2703 */
2704 struct gl_shader *sh = _mesa_new_shader(-1, MESA_SHADER_VERTEX);
2705 sh->Source = float64_source;
2706 sh->CompileStatus = COMPILE_FAILURE;
2707 _mesa_glsl_compile_shader(ctx, sh, false, false, true);
2708
2709 if (!sh->CompileStatus) {
2710 if (sh->InfoLog) {
2711 _mesa_problem(ctx,
2712 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
2713 sh->InfoLog, float64_source);
2714 }
2715 return NULL;
2716 }
2717
2718 nir_shader *nir = nir_shader_create(NULL, MESA_SHADER_VERTEX, options, NULL);
2719
2720 nir_visitor v1(ctx, nir);
2721 nir_function_visitor v2(&v1);
2722 v2.run(sh->ir);
2723 visit_exec_list(sh->ir, &v1);
2724
2725 /* _mesa_delete_shader will try to free sh->Source but it's static const */
2726 sh->Source = NULL;
2727 _mesa_delete_shader(ctx, sh);
2728
2729 nir_validate_shader(nir, "float64_funcs_to_nir");
2730
2731 NIR_PASS_V(nir, nir_lower_constant_initializers, nir_var_function_temp);
2732 NIR_PASS_V(nir, nir_lower_returns);
2733 NIR_PASS_V(nir, nir_inline_functions);
2734 NIR_PASS_V(nir, nir_opt_deref);
2735
2736 /* Do some optimizations to clean up the shader now. By optimizing the
2737 * functions in the library, we avoid having to re-do that work every
2738 * time we inline a copy of a function. Reducing basic blocks also helps
2739 * with compile times.
2740 */
2741 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
2742 NIR_PASS_V(nir, nir_copy_prop);
2743 NIR_PASS_V(nir, nir_opt_dce);
2744 NIR_PASS_V(nir, nir_opt_cse);
2745 NIR_PASS_V(nir, nir_opt_gcm, true);
2746 NIR_PASS_V(nir, nir_opt_peephole_select, 1, false, false);
2747 NIR_PASS_V(nir, nir_opt_dce);
2748
2749 return nir;
2750 }