glsl_to_nir: fix shader_clock
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "float64_glsl.h"
29 #include "glsl_to_nir.h"
30 #include "ir_visitor.h"
31 #include "ir_hierarchical_visitor.h"
32 #include "ir.h"
33 #include "ir_optimization.h"
34 #include "program.h"
35 #include "compiler/nir/nir_control_flow.h"
36 #include "compiler/nir/nir_builder.h"
37 #include "compiler/nir/nir_builtin_builder.h"
38 #include "compiler/nir/nir_deref.h"
39 #include "main/errors.h"
40 #include "main/mtypes.h"
41 #include "main/shaderobj.h"
42 #include "util/u_math.h"
43
44 /*
45 * pass to lower GLSL IR to NIR
46 *
47 * This will lower variable dereferences to loads/stores of corresponding
48 * variables in NIR - the variables will be converted to registers in a later
49 * pass.
50 */
51
52 namespace {
53
54 class nir_visitor : public ir_visitor
55 {
56 public:
57 nir_visitor(gl_context *ctx, nir_shader *shader);
58 ~nir_visitor();
59
60 virtual void visit(ir_variable *);
61 virtual void visit(ir_function *);
62 virtual void visit(ir_function_signature *);
63 virtual void visit(ir_loop *);
64 virtual void visit(ir_if *);
65 virtual void visit(ir_discard *);
66 virtual void visit(ir_demote *);
67 virtual void visit(ir_loop_jump *);
68 virtual void visit(ir_return *);
69 virtual void visit(ir_call *);
70 virtual void visit(ir_assignment *);
71 virtual void visit(ir_emit_vertex *);
72 virtual void visit(ir_end_primitive *);
73 virtual void visit(ir_expression *);
74 virtual void visit(ir_swizzle *);
75 virtual void visit(ir_texture *);
76 virtual void visit(ir_constant *);
77 virtual void visit(ir_dereference_variable *);
78 virtual void visit(ir_dereference_record *);
79 virtual void visit(ir_dereference_array *);
80 virtual void visit(ir_barrier *);
81
82 void create_function(ir_function_signature *ir);
83
84 private:
85 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
86 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
87
88 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
89 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
90 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
91 nir_ssa_def *src2);
92 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
93 nir_ssa_def *src2, nir_ssa_def *src3);
94
95 bool supports_std430;
96
97 nir_shader *shader;
98 nir_function_impl *impl;
99 nir_builder b;
100 nir_ssa_def *result; /* result of the expression tree last visited */
101
102 nir_deref_instr *evaluate_deref(ir_instruction *ir);
103
104 nir_constant *constant_copy(ir_constant *ir, void *mem_ctx);
105
106 /* most recent deref instruction created */
107 nir_deref_instr *deref;
108
109 /* whether the IR we're operating on is per-function or global */
110 bool is_global;
111
112 ir_function_signature *sig;
113
114 /* map of ir_variable -> nir_variable */
115 struct hash_table *var_table;
116
117 /* map of ir_function_signature -> nir_function_overload */
118 struct hash_table *overload_table;
119 };
120
121 /*
122 * This visitor runs before the main visitor, calling create_function() for
123 * each function so that the main visitor can resolve forward references in
124 * calls.
125 */
126
127 class nir_function_visitor : public ir_hierarchical_visitor
128 {
129 public:
130 nir_function_visitor(nir_visitor *v) : visitor(v)
131 {
132 }
133 virtual ir_visitor_status visit_enter(ir_function *);
134
135 private:
136 nir_visitor *visitor;
137 };
138
139 /* glsl_to_nir can only handle converting certain function paramaters
140 * to NIR. This visitor checks for parameters it can't currently handle.
141 */
142 class ir_function_param_visitor : public ir_hierarchical_visitor
143 {
144 public:
145 ir_function_param_visitor()
146 : unsupported(false)
147 {
148 }
149
150 virtual ir_visitor_status visit_enter(ir_function_signature *ir)
151 {
152
153 if (ir->is_intrinsic())
154 return visit_continue;
155
156 foreach_in_list(ir_variable, param, &ir->parameters) {
157 if (!param->type->is_vector() || !param->type->is_scalar()) {
158 unsupported = true;
159 return visit_stop;
160 }
161
162 if (param->data.mode == ir_var_function_inout) {
163 unsupported = true;
164 return visit_stop;
165 }
166 }
167
168 if (!glsl_type_is_vector_or_scalar(ir->return_type) &&
169 !ir->return_type->is_void()) {
170 unsupported = true;
171 return visit_stop;
172 }
173
174 return visit_continue;
175 }
176
177 bool unsupported;
178 };
179
180 } /* end of anonymous namespace */
181
182
183 static bool
184 has_unsupported_function_param(exec_list *ir)
185 {
186 ir_function_param_visitor visitor;
187 visit_list_elements(&visitor, ir);
188 return visitor.unsupported;
189 }
190
191 nir_shader *
192 glsl_to_nir(struct gl_context *ctx,
193 const struct gl_shader_program *shader_prog,
194 gl_shader_stage stage,
195 const nir_shader_compiler_options *options)
196 {
197 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
198
199 const struct gl_shader_compiler_options *gl_options =
200 &ctx->Const.ShaderCompilerOptions[stage];
201
202 /* glsl_to_nir can only handle converting certain function paramaters
203 * to NIR. If we find something we can't handle then we get the GLSL IR
204 * opts to remove it before we continue on.
205 *
206 * TODO: add missing glsl ir to nir support and remove this loop.
207 */
208 while (has_unsupported_function_param(sh->ir)) {
209 do_common_optimization(sh->ir, true, true, gl_options,
210 ctx->Const.NativeIntegers);
211 }
212
213 nir_shader *shader = nir_shader_create(NULL, stage, options,
214 &sh->Program->info);
215
216 nir_visitor v1(ctx, shader);
217 nir_function_visitor v2(&v1);
218 v2.run(sh->ir);
219 visit_exec_list(sh->ir, &v1);
220
221 nir_validate_shader(shader, "after glsl to nir, before function inline");
222
223 /* We have to lower away local constant initializers right before we
224 * inline functions. That way they get properly initialized at the top
225 * of the function and not at the top of its caller.
226 */
227 nir_lower_variable_initializers(shader, (nir_variable_mode)~0);
228 nir_lower_returns(shader);
229 nir_inline_functions(shader);
230 nir_opt_deref(shader);
231
232 nir_validate_shader(shader, "after function inlining and return lowering");
233
234 /* Now that we have inlined everything remove all of the functions except
235 * main().
236 */
237 foreach_list_typed_safe(nir_function, function, node, &(shader)->functions){
238 if (strcmp("main", function->name) != 0) {
239 exec_node_remove(&function->node);
240 }
241 }
242
243 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
244 if (shader_prog->Label)
245 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
246
247 /* Check for transform feedback varyings specified via the API */
248 shader->info.has_transform_feedback_varyings =
249 shader_prog->TransformFeedback.NumVarying > 0;
250
251 /* Check for transform feedback varyings specified in the Shader */
252 if (shader_prog->last_vert_prog)
253 shader->info.has_transform_feedback_varyings |=
254 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
255
256 if (shader->info.stage == MESA_SHADER_FRAGMENT) {
257 shader->info.fs.pixel_center_integer = sh->Program->info.fs.pixel_center_integer;
258 shader->info.fs.origin_upper_left = sh->Program->info.fs.origin_upper_left;
259 }
260
261 return shader;
262 }
263
264 nir_visitor::nir_visitor(gl_context *ctx, nir_shader *shader)
265 {
266 this->supports_std430 = ctx->Const.UseSTD430AsDefaultPacking;
267 this->shader = shader;
268 this->is_global = true;
269 this->var_table = _mesa_pointer_hash_table_create(NULL);
270 this->overload_table = _mesa_pointer_hash_table_create(NULL);
271 this->result = NULL;
272 this->impl = NULL;
273 this->deref = NULL;
274 this->sig = NULL;
275 memset(&this->b, 0, sizeof(this->b));
276 }
277
278 nir_visitor::~nir_visitor()
279 {
280 _mesa_hash_table_destroy(this->var_table, NULL);
281 _mesa_hash_table_destroy(this->overload_table, NULL);
282 }
283
284 nir_deref_instr *
285 nir_visitor::evaluate_deref(ir_instruction *ir)
286 {
287 ir->accept(this);
288 return this->deref;
289 }
290
291 nir_constant *
292 nir_visitor::constant_copy(ir_constant *ir, void *mem_ctx)
293 {
294 if (ir == NULL)
295 return NULL;
296
297 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
298
299 const unsigned rows = ir->type->vector_elements;
300 const unsigned cols = ir->type->matrix_columns;
301 unsigned i;
302
303 ret->num_elements = 0;
304 switch (ir->type->base_type) {
305 case GLSL_TYPE_UINT:
306 /* Only float base types can be matrices. */
307 assert(cols == 1);
308
309 for (unsigned r = 0; r < rows; r++)
310 ret->values[r].u32 = ir->value.u[r];
311
312 break;
313
314 case GLSL_TYPE_UINT16:
315 /* Only float base types can be matrices. */
316 assert(cols == 1);
317
318 for (unsigned r = 0; r < rows; r++)
319 ret->values[r].u16 = ir->value.u16[r];
320 break;
321
322 case GLSL_TYPE_INT:
323 /* Only float base types can be matrices. */
324 assert(cols == 1);
325
326 for (unsigned r = 0; r < rows; r++)
327 ret->values[r].i32 = ir->value.i[r];
328
329 break;
330
331 case GLSL_TYPE_INT16:
332 /* Only float base types can be matrices. */
333 assert(cols == 1);
334
335 for (unsigned r = 0; r < rows; r++)
336 ret->values[r].i16 = ir->value.i16[r];
337 break;
338
339 case GLSL_TYPE_FLOAT:
340 case GLSL_TYPE_FLOAT16:
341 case GLSL_TYPE_DOUBLE:
342 if (cols > 1) {
343 ret->elements = ralloc_array(mem_ctx, nir_constant *, cols);
344 ret->num_elements = cols;
345 for (unsigned c = 0; c < cols; c++) {
346 nir_constant *col_const = rzalloc(mem_ctx, nir_constant);
347 col_const->num_elements = 0;
348 switch (ir->type->base_type) {
349 case GLSL_TYPE_FLOAT:
350 for (unsigned r = 0; r < rows; r++)
351 col_const->values[r].f32 = ir->value.f[c * rows + r];
352 break;
353
354 case GLSL_TYPE_FLOAT16:
355 for (unsigned r = 0; r < rows; r++)
356 col_const->values[r].u16 = ir->value.f16[c * rows + r];
357 break;
358
359 case GLSL_TYPE_DOUBLE:
360 for (unsigned r = 0; r < rows; r++)
361 col_const->values[r].f64 = ir->value.d[c * rows + r];
362 break;
363
364 default:
365 unreachable("Cannot get here from the first level switch");
366 }
367 ret->elements[c] = col_const;
368 }
369 } else {
370 switch (ir->type->base_type) {
371 case GLSL_TYPE_FLOAT:
372 for (unsigned r = 0; r < rows; r++)
373 ret->values[r].f32 = ir->value.f[r];
374 break;
375
376 case GLSL_TYPE_FLOAT16:
377 for (unsigned r = 0; r < rows; r++)
378 ret->values[r].u16 = ir->value.f16[r];
379 break;
380
381 case GLSL_TYPE_DOUBLE:
382 for (unsigned r = 0; r < rows; r++)
383 ret->values[r].f64 = ir->value.d[r];
384 break;
385
386 default:
387 unreachable("Cannot get here from the first level switch");
388 }
389 }
390 break;
391
392 case GLSL_TYPE_UINT64:
393 /* Only float base types can be matrices. */
394 assert(cols == 1);
395
396 for (unsigned r = 0; r < rows; r++)
397 ret->values[r].u64 = ir->value.u64[r];
398 break;
399
400 case GLSL_TYPE_INT64:
401 /* Only float base types can be matrices. */
402 assert(cols == 1);
403
404 for (unsigned r = 0; r < rows; r++)
405 ret->values[r].i64 = ir->value.i64[r];
406 break;
407
408 case GLSL_TYPE_BOOL:
409 /* Only float base types can be matrices. */
410 assert(cols == 1);
411
412 for (unsigned r = 0; r < rows; r++)
413 ret->values[r].b = ir->value.b[r];
414
415 break;
416
417 case GLSL_TYPE_STRUCT:
418 case GLSL_TYPE_ARRAY:
419 ret->elements = ralloc_array(mem_ctx, nir_constant *,
420 ir->type->length);
421 ret->num_elements = ir->type->length;
422
423 for (i = 0; i < ir->type->length; i++)
424 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
425 break;
426
427 default:
428 unreachable("not reached");
429 }
430
431 return ret;
432 }
433
434 static const glsl_type *
435 wrap_type_in_array(const glsl_type *elem_type, const glsl_type *array_type)
436 {
437 if (!array_type->is_array())
438 return elem_type;
439
440 elem_type = wrap_type_in_array(elem_type, array_type->fields.array);
441
442 return glsl_type::get_array_instance(elem_type, array_type->length);
443 }
444
445 static unsigned
446 get_nir_how_declared(unsigned how_declared)
447 {
448 if (how_declared == ir_var_hidden)
449 return nir_var_hidden;
450
451 return nir_var_declared_normally;
452 }
453
454 void
455 nir_visitor::visit(ir_variable *ir)
456 {
457 /* TODO: In future we should switch to using the NIR lowering pass but for
458 * now just ignore these variables as GLSL IR should have lowered them.
459 * Anything remaining are just dead vars that weren't cleaned up.
460 */
461 if (ir->data.mode == ir_var_shader_shared)
462 return;
463
464 /* FINISHME: inout parameters */
465 assert(ir->data.mode != ir_var_function_inout);
466
467 if (ir->data.mode == ir_var_function_out)
468 return;
469
470 nir_variable *var = rzalloc(shader, nir_variable);
471 var->type = ir->type;
472 var->name = ralloc_strdup(var, ir->name);
473
474 var->data.always_active_io = ir->data.always_active_io;
475 var->data.read_only = ir->data.read_only;
476 var->data.centroid = ir->data.centroid;
477 var->data.sample = ir->data.sample;
478 var->data.patch = ir->data.patch;
479 var->data.how_declared = get_nir_how_declared(ir->data.how_declared);
480 var->data.invariant = ir->data.invariant;
481 var->data.location = ir->data.location;
482 var->data.stream = ir->data.stream;
483 if (ir->data.stream & (1u << 31))
484 var->data.stream |= NIR_STREAM_PACKED;
485
486 var->data.precision = ir->data.precision;
487 var->data.explicit_location = ir->data.explicit_location;
488 var->data.matrix_layout = ir->data.matrix_layout;
489 var->data.from_named_ifc_block = ir->data.from_named_ifc_block;
490 var->data.compact = false;
491
492 switch(ir->data.mode) {
493 case ir_var_auto:
494 case ir_var_temporary:
495 if (is_global)
496 var->data.mode = nir_var_shader_temp;
497 else
498 var->data.mode = nir_var_function_temp;
499 break;
500
501 case ir_var_function_in:
502 case ir_var_const_in:
503 var->data.mode = nir_var_function_temp;
504 break;
505
506 case ir_var_shader_in:
507 if (shader->info.stage == MESA_SHADER_GEOMETRY &&
508 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
509 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
510 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
511 var->data.mode = nir_var_system_value;
512 } else {
513 var->data.mode = nir_var_shader_in;
514
515 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
516 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
517 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
518 var->data.compact = ir->type->without_array()->is_scalar();
519 }
520
521 if (shader->info.stage > MESA_SHADER_VERTEX &&
522 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
523 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
524 var->data.compact = ir->type->without_array()->is_scalar();
525 }
526 }
527 break;
528
529 case ir_var_shader_out:
530 var->data.mode = nir_var_shader_out;
531 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
532 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
533 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
534 var->data.compact = ir->type->without_array()->is_scalar();
535 }
536
537 if (shader->info.stage <= MESA_SHADER_GEOMETRY &&
538 ir->data.location >= VARYING_SLOT_CLIP_DIST0 &&
539 ir->data.location <= VARYING_SLOT_CULL_DIST1) {
540 var->data.compact = ir->type->without_array()->is_scalar();
541 }
542 break;
543
544 case ir_var_uniform:
545 if (ir->get_interface_type())
546 var->data.mode = nir_var_mem_ubo;
547 else
548 var->data.mode = nir_var_uniform;
549 break;
550
551 case ir_var_shader_storage:
552 var->data.mode = nir_var_mem_ssbo;
553 break;
554
555 case ir_var_system_value:
556 var->data.mode = nir_var_system_value;
557 break;
558
559 default:
560 unreachable("not reached");
561 }
562
563 unsigned mem_access = 0;
564 if (ir->data.memory_read_only)
565 mem_access |= ACCESS_NON_WRITEABLE;
566 if (ir->data.memory_write_only)
567 mem_access |= ACCESS_NON_READABLE;
568 if (ir->data.memory_coherent)
569 mem_access |= ACCESS_COHERENT;
570 if (ir->data.memory_volatile)
571 mem_access |= ACCESS_VOLATILE;
572 if (ir->data.memory_restrict)
573 mem_access |= ACCESS_RESTRICT;
574
575 var->interface_type = ir->get_interface_type();
576
577 /* For UBO and SSBO variables, we need explicit types */
578 if (var->data.mode & (nir_var_mem_ubo | nir_var_mem_ssbo)) {
579 const glsl_type *explicit_ifc_type =
580 ir->get_interface_type()->get_explicit_interface_type(supports_std430);
581
582 var->interface_type = explicit_ifc_type;
583
584 if (ir->type->without_array()->is_interface()) {
585 /* If the type contains the interface, wrap the explicit type in the
586 * right number of arrays.
587 */
588 var->type = wrap_type_in_array(explicit_ifc_type, ir->type);
589 } else {
590 /* Otherwise, this variable is one entry in the interface */
591 UNUSED bool found = false;
592 for (unsigned i = 0; i < explicit_ifc_type->length; i++) {
593 const glsl_struct_field *field =
594 &explicit_ifc_type->fields.structure[i];
595 if (strcmp(ir->name, field->name) != 0)
596 continue;
597
598 var->type = field->type;
599 if (field->memory_read_only)
600 mem_access |= ACCESS_NON_WRITEABLE;
601 if (field->memory_write_only)
602 mem_access |= ACCESS_NON_READABLE;
603 if (field->memory_coherent)
604 mem_access |= ACCESS_COHERENT;
605 if (field->memory_volatile)
606 mem_access |= ACCESS_VOLATILE;
607 if (field->memory_restrict)
608 mem_access |= ACCESS_RESTRICT;
609
610 found = true;
611 break;
612 }
613 assert(found);
614 }
615 }
616
617 var->data.interpolation = ir->data.interpolation;
618 var->data.location_frac = ir->data.location_frac;
619
620 switch (ir->data.depth_layout) {
621 case ir_depth_layout_none:
622 var->data.depth_layout = nir_depth_layout_none;
623 break;
624 case ir_depth_layout_any:
625 var->data.depth_layout = nir_depth_layout_any;
626 break;
627 case ir_depth_layout_greater:
628 var->data.depth_layout = nir_depth_layout_greater;
629 break;
630 case ir_depth_layout_less:
631 var->data.depth_layout = nir_depth_layout_less;
632 break;
633 case ir_depth_layout_unchanged:
634 var->data.depth_layout = nir_depth_layout_unchanged;
635 break;
636 default:
637 unreachable("not reached");
638 }
639
640 var->data.index = ir->data.index;
641 var->data.descriptor_set = 0;
642 var->data.binding = ir->data.binding;
643 var->data.explicit_binding = ir->data.explicit_binding;
644 var->data.bindless = ir->data.bindless;
645 var->data.offset = ir->data.offset;
646 var->data.access = (gl_access_qualifier)mem_access;
647
648 if (var->type->without_array()->is_image()) {
649 var->data.image.format = ir->data.image_format;
650 } else if (var->data.mode == nir_var_shader_out) {
651 var->data.xfb.buffer = ir->data.xfb_buffer;
652 var->data.xfb.stride = ir->data.xfb_stride;
653 }
654
655 var->data.fb_fetch_output = ir->data.fb_fetch_output;
656 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
657 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
658
659 var->num_state_slots = ir->get_num_state_slots();
660 if (var->num_state_slots > 0) {
661 var->state_slots = rzalloc_array(var, nir_state_slot,
662 var->num_state_slots);
663
664 ir_state_slot *state_slots = ir->get_state_slots();
665 for (unsigned i = 0; i < var->num_state_slots; i++) {
666 for (unsigned j = 0; j < 5; j++)
667 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
668 var->state_slots[i].swizzle = state_slots[i].swizzle;
669 }
670 } else {
671 var->state_slots = NULL;
672 }
673
674 var->constant_initializer = constant_copy(ir->constant_initializer, var);
675
676 if (var->data.mode == nir_var_function_temp)
677 nir_function_impl_add_variable(impl, var);
678 else
679 nir_shader_add_variable(shader, var);
680
681 _mesa_hash_table_insert(var_table, ir, var);
682 }
683
684 ir_visitor_status
685 nir_function_visitor::visit_enter(ir_function *ir)
686 {
687 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
688 visitor->create_function(sig);
689 }
690 return visit_continue_with_parent;
691 }
692
693 void
694 nir_visitor::create_function(ir_function_signature *ir)
695 {
696 if (ir->is_intrinsic())
697 return;
698
699 nir_function *func = nir_function_create(shader, ir->function_name());
700 if (strcmp(ir->function_name(), "main") == 0)
701 func->is_entrypoint = true;
702
703 func->num_params = ir->parameters.length() +
704 (ir->return_type != glsl_type::void_type);
705 func->params = ralloc_array(shader, nir_parameter, func->num_params);
706
707 unsigned np = 0;
708
709 if (ir->return_type != glsl_type::void_type) {
710 /* The return value is a variable deref (basically an out parameter) */
711 func->params[np].num_components = 1;
712 func->params[np].bit_size = 32;
713 np++;
714 }
715
716 foreach_in_list(ir_variable, param, &ir->parameters) {
717 /* FINISHME: pass arrays, structs, etc by reference? */
718 assert(param->type->is_vector() || param->type->is_scalar());
719
720 if (param->data.mode == ir_var_function_in) {
721 func->params[np].num_components = param->type->vector_elements;
722 func->params[np].bit_size = glsl_get_bit_size(param->type);
723 } else {
724 func->params[np].num_components = 1;
725 func->params[np].bit_size = 32;
726 }
727 np++;
728 }
729 assert(np == func->num_params);
730
731 _mesa_hash_table_insert(this->overload_table, ir, func);
732 }
733
734 void
735 nir_visitor::visit(ir_function *ir)
736 {
737 foreach_in_list(ir_function_signature, sig, &ir->signatures)
738 sig->accept(this);
739 }
740
741 void
742 nir_visitor::visit(ir_function_signature *ir)
743 {
744 if (ir->is_intrinsic())
745 return;
746
747 this->sig = ir;
748
749 struct hash_entry *entry =
750 _mesa_hash_table_search(this->overload_table, ir);
751
752 assert(entry);
753 nir_function *func = (nir_function *) entry->data;
754
755 if (ir->is_defined) {
756 nir_function_impl *impl = nir_function_impl_create(func);
757 this->impl = impl;
758
759 this->is_global = false;
760
761 nir_builder_init(&b, impl);
762 b.cursor = nir_after_cf_list(&impl->body);
763
764 unsigned i = (ir->return_type != glsl_type::void_type) ? 1 : 0;
765
766 foreach_in_list(ir_variable, param, &ir->parameters) {
767 nir_variable *var =
768 nir_local_variable_create(impl, param->type, param->name);
769
770 if (param->data.mode == ir_var_function_in) {
771 nir_store_var(&b, var, nir_load_param(&b, i), ~0);
772 }
773
774 _mesa_hash_table_insert(var_table, param, var);
775 i++;
776 }
777
778 visit_exec_list(&ir->body, this);
779
780 this->is_global = true;
781 } else {
782 func->impl = NULL;
783 }
784 }
785
786 void
787 nir_visitor::visit(ir_loop *ir)
788 {
789 nir_push_loop(&b);
790 visit_exec_list(&ir->body_instructions, this);
791 nir_pop_loop(&b, NULL);
792 }
793
794 void
795 nir_visitor::visit(ir_if *ir)
796 {
797 nir_push_if(&b, evaluate_rvalue(ir->condition));
798 visit_exec_list(&ir->then_instructions, this);
799 nir_push_else(&b, NULL);
800 visit_exec_list(&ir->else_instructions, this);
801 nir_pop_if(&b, NULL);
802 }
803
804 void
805 nir_visitor::visit(ir_discard *ir)
806 {
807 /*
808 * discards aren't treated as control flow, because before we lower them
809 * they can appear anywhere in the shader and the stuff after them may still
810 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
811 * discards will be immediately followed by a return.
812 */
813
814 nir_intrinsic_instr *discard;
815 if (ir->condition) {
816 discard = nir_intrinsic_instr_create(this->shader,
817 nir_intrinsic_discard_if);
818 discard->src[0] =
819 nir_src_for_ssa(evaluate_rvalue(ir->condition));
820 } else {
821 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
822 }
823
824 nir_builder_instr_insert(&b, &discard->instr);
825 }
826
827 void
828 nir_visitor::visit(ir_demote *ir)
829 {
830 nir_intrinsic_instr *demote =
831 nir_intrinsic_instr_create(this->shader, nir_intrinsic_demote);
832
833 nir_builder_instr_insert(&b, &demote->instr);
834 }
835
836 void
837 nir_visitor::visit(ir_emit_vertex *ir)
838 {
839 nir_intrinsic_instr *instr =
840 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
841 nir_intrinsic_set_stream_id(instr, ir->stream_id());
842 nir_builder_instr_insert(&b, &instr->instr);
843 }
844
845 void
846 nir_visitor::visit(ir_end_primitive *ir)
847 {
848 nir_intrinsic_instr *instr =
849 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
850 nir_intrinsic_set_stream_id(instr, ir->stream_id());
851 nir_builder_instr_insert(&b, &instr->instr);
852 }
853
854 void
855 nir_visitor::visit(ir_loop_jump *ir)
856 {
857 nir_jump_type type;
858 switch (ir->mode) {
859 case ir_loop_jump::jump_break:
860 type = nir_jump_break;
861 break;
862 case ir_loop_jump::jump_continue:
863 type = nir_jump_continue;
864 break;
865 default:
866 unreachable("not reached");
867 }
868
869 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
870 nir_builder_instr_insert(&b, &instr->instr);
871 }
872
873 void
874 nir_visitor::visit(ir_return *ir)
875 {
876 if (ir->value != NULL) {
877 nir_deref_instr *ret_deref =
878 nir_build_deref_cast(&b, nir_load_param(&b, 0),
879 nir_var_function_temp, ir->value->type, 0);
880
881 nir_ssa_def *val = evaluate_rvalue(ir->value);
882 nir_store_deref(&b, ret_deref, val, ~0);
883 }
884
885 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
886 nir_builder_instr_insert(&b, &instr->instr);
887 }
888
889 static void
890 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
891 {
892 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
893 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
894 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
895 }
896
897 /* Accumulate any qualifiers along the deref chain to get the actual
898 * load/store qualifier.
899 */
900
901 static enum gl_access_qualifier
902 deref_get_qualifier(nir_deref_instr *deref)
903 {
904 nir_deref_path path;
905 nir_deref_path_init(&path, deref, NULL);
906
907 unsigned qualifiers = path.path[0]->var->data.access;
908
909 const glsl_type *parent_type = path.path[0]->type;
910 for (nir_deref_instr **cur_ptr = &path.path[1]; *cur_ptr; cur_ptr++) {
911 nir_deref_instr *cur = *cur_ptr;
912
913 if (parent_type->is_interface()) {
914 const struct glsl_struct_field *field =
915 &parent_type->fields.structure[cur->strct.index];
916 if (field->memory_read_only)
917 qualifiers |= ACCESS_NON_WRITEABLE;
918 if (field->memory_write_only)
919 qualifiers |= ACCESS_NON_READABLE;
920 if (field->memory_coherent)
921 qualifiers |= ACCESS_COHERENT;
922 if (field->memory_volatile)
923 qualifiers |= ACCESS_VOLATILE;
924 if (field->memory_restrict)
925 qualifiers |= ACCESS_RESTRICT;
926 }
927
928 parent_type = cur->type;
929 }
930
931 nir_deref_path_finish(&path);
932
933 return (gl_access_qualifier) qualifiers;
934 }
935
936 void
937 nir_visitor::visit(ir_call *ir)
938 {
939 if (ir->callee->is_intrinsic()) {
940 nir_intrinsic_op op;
941
942 switch (ir->callee->intrinsic_id) {
943 case ir_intrinsic_generic_atomic_add:
944 op = ir->return_deref->type->is_integer_32_64()
945 ? nir_intrinsic_deref_atomic_add : nir_intrinsic_deref_atomic_fadd;
946 break;
947 case ir_intrinsic_generic_atomic_and:
948 op = nir_intrinsic_deref_atomic_and;
949 break;
950 case ir_intrinsic_generic_atomic_or:
951 op = nir_intrinsic_deref_atomic_or;
952 break;
953 case ir_intrinsic_generic_atomic_xor:
954 op = nir_intrinsic_deref_atomic_xor;
955 break;
956 case ir_intrinsic_generic_atomic_min:
957 assert(ir->return_deref);
958 if (ir->return_deref->type == glsl_type::int_type)
959 op = nir_intrinsic_deref_atomic_imin;
960 else if (ir->return_deref->type == glsl_type::uint_type)
961 op = nir_intrinsic_deref_atomic_umin;
962 else if (ir->return_deref->type == glsl_type::float_type)
963 op = nir_intrinsic_deref_atomic_fmin;
964 else
965 unreachable("Invalid type");
966 break;
967 case ir_intrinsic_generic_atomic_max:
968 assert(ir->return_deref);
969 if (ir->return_deref->type == glsl_type::int_type)
970 op = nir_intrinsic_deref_atomic_imax;
971 else if (ir->return_deref->type == glsl_type::uint_type)
972 op = nir_intrinsic_deref_atomic_umax;
973 else if (ir->return_deref->type == glsl_type::float_type)
974 op = nir_intrinsic_deref_atomic_fmax;
975 else
976 unreachable("Invalid type");
977 break;
978 case ir_intrinsic_generic_atomic_exchange:
979 op = nir_intrinsic_deref_atomic_exchange;
980 break;
981 case ir_intrinsic_generic_atomic_comp_swap:
982 op = ir->return_deref->type->is_integer_32_64()
983 ? nir_intrinsic_deref_atomic_comp_swap
984 : nir_intrinsic_deref_atomic_fcomp_swap;
985 break;
986 case ir_intrinsic_atomic_counter_read:
987 op = nir_intrinsic_atomic_counter_read_deref;
988 break;
989 case ir_intrinsic_atomic_counter_increment:
990 op = nir_intrinsic_atomic_counter_inc_deref;
991 break;
992 case ir_intrinsic_atomic_counter_predecrement:
993 op = nir_intrinsic_atomic_counter_pre_dec_deref;
994 break;
995 case ir_intrinsic_atomic_counter_add:
996 op = nir_intrinsic_atomic_counter_add_deref;
997 break;
998 case ir_intrinsic_atomic_counter_and:
999 op = nir_intrinsic_atomic_counter_and_deref;
1000 break;
1001 case ir_intrinsic_atomic_counter_or:
1002 op = nir_intrinsic_atomic_counter_or_deref;
1003 break;
1004 case ir_intrinsic_atomic_counter_xor:
1005 op = nir_intrinsic_atomic_counter_xor_deref;
1006 break;
1007 case ir_intrinsic_atomic_counter_min:
1008 op = nir_intrinsic_atomic_counter_min_deref;
1009 break;
1010 case ir_intrinsic_atomic_counter_max:
1011 op = nir_intrinsic_atomic_counter_max_deref;
1012 break;
1013 case ir_intrinsic_atomic_counter_exchange:
1014 op = nir_intrinsic_atomic_counter_exchange_deref;
1015 break;
1016 case ir_intrinsic_atomic_counter_comp_swap:
1017 op = nir_intrinsic_atomic_counter_comp_swap_deref;
1018 break;
1019 case ir_intrinsic_image_load:
1020 op = nir_intrinsic_image_deref_load;
1021 break;
1022 case ir_intrinsic_image_store:
1023 op = nir_intrinsic_image_deref_store;
1024 break;
1025 case ir_intrinsic_image_atomic_add:
1026 op = ir->return_deref->type->is_integer_32_64()
1027 ? nir_intrinsic_image_deref_atomic_add
1028 : nir_intrinsic_image_deref_atomic_fadd;
1029 break;
1030 case ir_intrinsic_image_atomic_min:
1031 if (ir->return_deref->type == glsl_type::int_type)
1032 op = nir_intrinsic_image_deref_atomic_imin;
1033 else if (ir->return_deref->type == glsl_type::uint_type)
1034 op = nir_intrinsic_image_deref_atomic_umin;
1035 else
1036 unreachable("Invalid type");
1037 break;
1038 case ir_intrinsic_image_atomic_max:
1039 if (ir->return_deref->type == glsl_type::int_type)
1040 op = nir_intrinsic_image_deref_atomic_imax;
1041 else if (ir->return_deref->type == glsl_type::uint_type)
1042 op = nir_intrinsic_image_deref_atomic_umax;
1043 else
1044 unreachable("Invalid type");
1045 break;
1046 case ir_intrinsic_image_atomic_and:
1047 op = nir_intrinsic_image_deref_atomic_and;
1048 break;
1049 case ir_intrinsic_image_atomic_or:
1050 op = nir_intrinsic_image_deref_atomic_or;
1051 break;
1052 case ir_intrinsic_image_atomic_xor:
1053 op = nir_intrinsic_image_deref_atomic_xor;
1054 break;
1055 case ir_intrinsic_image_atomic_exchange:
1056 op = nir_intrinsic_image_deref_atomic_exchange;
1057 break;
1058 case ir_intrinsic_image_atomic_comp_swap:
1059 op = nir_intrinsic_image_deref_atomic_comp_swap;
1060 break;
1061 case ir_intrinsic_image_atomic_inc_wrap:
1062 op = nir_intrinsic_image_deref_atomic_inc_wrap;
1063 break;
1064 case ir_intrinsic_image_atomic_dec_wrap:
1065 op = nir_intrinsic_image_deref_atomic_dec_wrap;
1066 break;
1067 case ir_intrinsic_memory_barrier:
1068 op = nir_intrinsic_memory_barrier;
1069 break;
1070 case ir_intrinsic_image_size:
1071 op = nir_intrinsic_image_deref_size;
1072 break;
1073 case ir_intrinsic_image_samples:
1074 op = nir_intrinsic_image_deref_samples;
1075 break;
1076 case ir_intrinsic_ssbo_store:
1077 case ir_intrinsic_ssbo_load:
1078 case ir_intrinsic_ssbo_atomic_add:
1079 case ir_intrinsic_ssbo_atomic_and:
1080 case ir_intrinsic_ssbo_atomic_or:
1081 case ir_intrinsic_ssbo_atomic_xor:
1082 case ir_intrinsic_ssbo_atomic_min:
1083 case ir_intrinsic_ssbo_atomic_max:
1084 case ir_intrinsic_ssbo_atomic_exchange:
1085 case ir_intrinsic_ssbo_atomic_comp_swap:
1086 /* SSBO store/loads should only have been lowered in GLSL IR for
1087 * non-nir drivers, NIR drivers make use of gl_nir_lower_buffers()
1088 * instead.
1089 */
1090 unreachable("Invalid operation nir doesn't want lowered ssbo "
1091 "store/loads");
1092 case ir_intrinsic_shader_clock:
1093 op = nir_intrinsic_shader_clock;
1094 break;
1095 case ir_intrinsic_begin_invocation_interlock:
1096 op = nir_intrinsic_begin_invocation_interlock;
1097 break;
1098 case ir_intrinsic_end_invocation_interlock:
1099 op = nir_intrinsic_end_invocation_interlock;
1100 break;
1101 case ir_intrinsic_group_memory_barrier:
1102 op = nir_intrinsic_group_memory_barrier;
1103 break;
1104 case ir_intrinsic_memory_barrier_atomic_counter:
1105 op = nir_intrinsic_memory_barrier_atomic_counter;
1106 break;
1107 case ir_intrinsic_memory_barrier_buffer:
1108 op = nir_intrinsic_memory_barrier_buffer;
1109 break;
1110 case ir_intrinsic_memory_barrier_image:
1111 op = nir_intrinsic_memory_barrier_image;
1112 break;
1113 case ir_intrinsic_memory_barrier_shared:
1114 op = nir_intrinsic_memory_barrier_shared;
1115 break;
1116 case ir_intrinsic_shared_load:
1117 op = nir_intrinsic_load_shared;
1118 break;
1119 case ir_intrinsic_shared_store:
1120 op = nir_intrinsic_store_shared;
1121 break;
1122 case ir_intrinsic_shared_atomic_add:
1123 op = ir->return_deref->type->is_integer_32_64()
1124 ? nir_intrinsic_shared_atomic_add
1125 : nir_intrinsic_shared_atomic_fadd;
1126 break;
1127 case ir_intrinsic_shared_atomic_and:
1128 op = nir_intrinsic_shared_atomic_and;
1129 break;
1130 case ir_intrinsic_shared_atomic_or:
1131 op = nir_intrinsic_shared_atomic_or;
1132 break;
1133 case ir_intrinsic_shared_atomic_xor:
1134 op = nir_intrinsic_shared_atomic_xor;
1135 break;
1136 case ir_intrinsic_shared_atomic_min:
1137 assert(ir->return_deref);
1138 if (ir->return_deref->type == glsl_type::int_type)
1139 op = nir_intrinsic_shared_atomic_imin;
1140 else if (ir->return_deref->type == glsl_type::uint_type)
1141 op = nir_intrinsic_shared_atomic_umin;
1142 else if (ir->return_deref->type == glsl_type::float_type)
1143 op = nir_intrinsic_shared_atomic_fmin;
1144 else
1145 unreachable("Invalid type");
1146 break;
1147 case ir_intrinsic_shared_atomic_max:
1148 assert(ir->return_deref);
1149 if (ir->return_deref->type == glsl_type::int_type)
1150 op = nir_intrinsic_shared_atomic_imax;
1151 else if (ir->return_deref->type == glsl_type::uint_type)
1152 op = nir_intrinsic_shared_atomic_umax;
1153 else if (ir->return_deref->type == glsl_type::float_type)
1154 op = nir_intrinsic_shared_atomic_fmax;
1155 else
1156 unreachable("Invalid type");
1157 break;
1158 case ir_intrinsic_shared_atomic_exchange:
1159 op = nir_intrinsic_shared_atomic_exchange;
1160 break;
1161 case ir_intrinsic_shared_atomic_comp_swap:
1162 op = ir->return_deref->type->is_integer_32_64()
1163 ? nir_intrinsic_shared_atomic_comp_swap
1164 : nir_intrinsic_shared_atomic_fcomp_swap;
1165 break;
1166 case ir_intrinsic_vote_any:
1167 op = nir_intrinsic_vote_any;
1168 break;
1169 case ir_intrinsic_vote_all:
1170 op = nir_intrinsic_vote_all;
1171 break;
1172 case ir_intrinsic_vote_eq:
1173 op = nir_intrinsic_vote_ieq;
1174 break;
1175 case ir_intrinsic_ballot:
1176 op = nir_intrinsic_ballot;
1177 break;
1178 case ir_intrinsic_read_invocation:
1179 op = nir_intrinsic_read_invocation;
1180 break;
1181 case ir_intrinsic_read_first_invocation:
1182 op = nir_intrinsic_read_first_invocation;
1183 break;
1184 case ir_intrinsic_helper_invocation:
1185 op = nir_intrinsic_is_helper_invocation;
1186 break;
1187 default:
1188 unreachable("not reached");
1189 }
1190
1191 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
1192 nir_ssa_def *ret = &instr->dest.ssa;
1193
1194 switch (op) {
1195 case nir_intrinsic_deref_atomic_add:
1196 case nir_intrinsic_deref_atomic_imin:
1197 case nir_intrinsic_deref_atomic_umin:
1198 case nir_intrinsic_deref_atomic_imax:
1199 case nir_intrinsic_deref_atomic_umax:
1200 case nir_intrinsic_deref_atomic_and:
1201 case nir_intrinsic_deref_atomic_or:
1202 case nir_intrinsic_deref_atomic_xor:
1203 case nir_intrinsic_deref_atomic_exchange:
1204 case nir_intrinsic_deref_atomic_comp_swap:
1205 case nir_intrinsic_deref_atomic_fadd:
1206 case nir_intrinsic_deref_atomic_fmin:
1207 case nir_intrinsic_deref_atomic_fmax:
1208 case nir_intrinsic_deref_atomic_fcomp_swap: {
1209 int param_count = ir->actual_parameters.length();
1210 assert(param_count == 2 || param_count == 3);
1211
1212 /* Deref */
1213 exec_node *param = ir->actual_parameters.get_head();
1214 ir_rvalue *rvalue = (ir_rvalue *) param;
1215 ir_dereference *deref = rvalue->as_dereference();
1216 ir_swizzle *swizzle = NULL;
1217 if (!deref) {
1218 /* We may have a swizzle to pick off a single vec4 component */
1219 swizzle = rvalue->as_swizzle();
1220 assert(swizzle && swizzle->type->vector_elements == 1);
1221 deref = swizzle->val->as_dereference();
1222 assert(deref);
1223 }
1224 nir_deref_instr *nir_deref = evaluate_deref(deref);
1225 if (swizzle) {
1226 nir_deref = nir_build_deref_array_imm(&b, nir_deref,
1227 swizzle->mask.x);
1228 }
1229 instr->src[0] = nir_src_for_ssa(&nir_deref->dest.ssa);
1230
1231 nir_intrinsic_set_access(instr, deref_get_qualifier(nir_deref));
1232
1233 /* data1 parameter (this is always present) */
1234 param = param->get_next();
1235 ir_instruction *inst = (ir_instruction *) param;
1236 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1237
1238 /* data2 parameter (only with atomic_comp_swap) */
1239 if (param_count == 3) {
1240 assert(op == nir_intrinsic_deref_atomic_comp_swap ||
1241 op == nir_intrinsic_deref_atomic_fcomp_swap);
1242 param = param->get_next();
1243 inst = (ir_instruction *) param;
1244 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1245 }
1246
1247 /* Atomic result */
1248 assert(ir->return_deref);
1249 nir_ssa_dest_init(&instr->instr, &instr->dest,
1250 ir->return_deref->type->vector_elements, 32, NULL);
1251 nir_builder_instr_insert(&b, &instr->instr);
1252 break;
1253 }
1254 case nir_intrinsic_atomic_counter_read_deref:
1255 case nir_intrinsic_atomic_counter_inc_deref:
1256 case nir_intrinsic_atomic_counter_pre_dec_deref:
1257 case nir_intrinsic_atomic_counter_add_deref:
1258 case nir_intrinsic_atomic_counter_min_deref:
1259 case nir_intrinsic_atomic_counter_max_deref:
1260 case nir_intrinsic_atomic_counter_and_deref:
1261 case nir_intrinsic_atomic_counter_or_deref:
1262 case nir_intrinsic_atomic_counter_xor_deref:
1263 case nir_intrinsic_atomic_counter_exchange_deref:
1264 case nir_intrinsic_atomic_counter_comp_swap_deref: {
1265 /* Set the counter variable dereference. */
1266 exec_node *param = ir->actual_parameters.get_head();
1267 ir_dereference *counter = (ir_dereference *)param;
1268
1269 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
1270 param = param->get_next();
1271
1272 /* Set the intrinsic destination. */
1273 if (ir->return_deref) {
1274 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
1275 }
1276
1277 /* Set the intrinsic parameters. */
1278 if (!param->is_tail_sentinel()) {
1279 instr->src[1] =
1280 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1281 param = param->get_next();
1282 }
1283
1284 if (!param->is_tail_sentinel()) {
1285 instr->src[2] =
1286 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1287 param = param->get_next();
1288 }
1289
1290 nir_builder_instr_insert(&b, &instr->instr);
1291 break;
1292 }
1293 case nir_intrinsic_image_deref_load:
1294 case nir_intrinsic_image_deref_store:
1295 case nir_intrinsic_image_deref_atomic_add:
1296 case nir_intrinsic_image_deref_atomic_imin:
1297 case nir_intrinsic_image_deref_atomic_umin:
1298 case nir_intrinsic_image_deref_atomic_imax:
1299 case nir_intrinsic_image_deref_atomic_umax:
1300 case nir_intrinsic_image_deref_atomic_and:
1301 case nir_intrinsic_image_deref_atomic_or:
1302 case nir_intrinsic_image_deref_atomic_xor:
1303 case nir_intrinsic_image_deref_atomic_exchange:
1304 case nir_intrinsic_image_deref_atomic_comp_swap:
1305 case nir_intrinsic_image_deref_atomic_fadd:
1306 case nir_intrinsic_image_deref_samples:
1307 case nir_intrinsic_image_deref_size:
1308 case nir_intrinsic_image_deref_atomic_inc_wrap:
1309 case nir_intrinsic_image_deref_atomic_dec_wrap: {
1310 nir_ssa_undef_instr *instr_undef =
1311 nir_ssa_undef_instr_create(shader, 1, 32);
1312 nir_builder_instr_insert(&b, &instr_undef->instr);
1313
1314 /* Set the image variable dereference. */
1315 exec_node *param = ir->actual_parameters.get_head();
1316 ir_dereference *image = (ir_dereference *)param;
1317 nir_deref_instr *deref = evaluate_deref(image);
1318 const glsl_type *type = deref->type;
1319
1320 nir_intrinsic_set_access(instr, deref_get_qualifier(deref));
1321
1322 instr->src[0] = nir_src_for_ssa(&deref->dest.ssa);
1323 param = param->get_next();
1324
1325 /* Set the intrinsic destination. */
1326 if (ir->return_deref) {
1327 unsigned num_components = ir->return_deref->type->vector_elements;
1328 nir_ssa_dest_init(&instr->instr, &instr->dest,
1329 num_components, 32, NULL);
1330 }
1331
1332 if (op == nir_intrinsic_image_deref_size) {
1333 instr->num_components = instr->dest.ssa.num_components;
1334 } else if (op == nir_intrinsic_image_deref_load ||
1335 op == nir_intrinsic_image_deref_store) {
1336 instr->num_components = 4;
1337 }
1338
1339 if (op == nir_intrinsic_image_deref_size ||
1340 op == nir_intrinsic_image_deref_samples) {
1341 nir_builder_instr_insert(&b, &instr->instr);
1342 break;
1343 }
1344
1345 /* Set the address argument, extending the coordinate vector to four
1346 * components.
1347 */
1348 nir_ssa_def *src_addr =
1349 evaluate_rvalue((ir_dereference *)param);
1350 nir_ssa_def *srcs[4];
1351
1352 for (int i = 0; i < 4; i++) {
1353 if (i < type->coordinate_components())
1354 srcs[i] = nir_channel(&b, src_addr, i);
1355 else
1356 srcs[i] = &instr_undef->def;
1357 }
1358
1359 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
1360 param = param->get_next();
1361
1362 /* Set the sample argument, which is undefined for single-sample
1363 * images.
1364 */
1365 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
1366 instr->src[2] =
1367 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1368 param = param->get_next();
1369 } else {
1370 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
1371 }
1372
1373 /* Set the intrinsic parameters. */
1374 if (!param->is_tail_sentinel()) {
1375 instr->src[3] =
1376 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1377 param = param->get_next();
1378 } else if (op == nir_intrinsic_image_deref_load) {
1379 instr->src[3] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
1380 }
1381
1382 if (!param->is_tail_sentinel()) {
1383 instr->src[4] =
1384 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
1385 param = param->get_next();
1386 } else if (op == nir_intrinsic_image_deref_store) {
1387 instr->src[4] = nir_src_for_ssa(nir_imm_int(&b, 0)); /* LOD */
1388 }
1389
1390 nir_builder_instr_insert(&b, &instr->instr);
1391 break;
1392 }
1393 case nir_intrinsic_memory_barrier:
1394 case nir_intrinsic_group_memory_barrier:
1395 case nir_intrinsic_memory_barrier_atomic_counter:
1396 case nir_intrinsic_memory_barrier_buffer:
1397 case nir_intrinsic_memory_barrier_image:
1398 case nir_intrinsic_memory_barrier_shared:
1399 nir_builder_instr_insert(&b, &instr->instr);
1400 break;
1401 case nir_intrinsic_shader_clock:
1402 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
1403 nir_intrinsic_set_memory_scope(instr, NIR_SCOPE_SUBGROUP);
1404 nir_builder_instr_insert(&b, &instr->instr);
1405 break;
1406 case nir_intrinsic_begin_invocation_interlock:
1407 nir_builder_instr_insert(&b, &instr->instr);
1408 break;
1409 case nir_intrinsic_end_invocation_interlock:
1410 nir_builder_instr_insert(&b, &instr->instr);
1411 break;
1412 case nir_intrinsic_store_ssbo: {
1413 exec_node *param = ir->actual_parameters.get_head();
1414 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1415
1416 param = param->get_next();
1417 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1418
1419 param = param->get_next();
1420 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1421
1422 param = param->get_next();
1423 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1424 assert(write_mask);
1425
1426 nir_ssa_def *nir_val = evaluate_rvalue(val);
1427 if (val->type->is_boolean())
1428 nir_val = nir_b2i32(&b, nir_val);
1429
1430 instr->src[0] = nir_src_for_ssa(nir_val);
1431 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1432 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1433 intrinsic_set_std430_align(instr, val->type);
1434 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1435 instr->num_components = val->type->vector_elements;
1436
1437 nir_builder_instr_insert(&b, &instr->instr);
1438 break;
1439 }
1440 case nir_intrinsic_load_shared: {
1441 exec_node *param = ir->actual_parameters.get_head();
1442 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1443
1444 nir_intrinsic_set_base(instr, 0);
1445 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1446
1447 const glsl_type *type = ir->return_deref->var->type;
1448 instr->num_components = type->vector_elements;
1449 intrinsic_set_std430_align(instr, type);
1450
1451 /* Setup destination register */
1452 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1453 nir_ssa_dest_init(&instr->instr, &instr->dest,
1454 type->vector_elements, bit_size, NULL);
1455
1456 nir_builder_instr_insert(&b, &instr->instr);
1457
1458 /* The value in shared memory is a 32-bit value */
1459 if (type->is_boolean())
1460 ret = nir_b2b1(&b, &instr->dest.ssa);
1461 break;
1462 }
1463 case nir_intrinsic_store_shared: {
1464 exec_node *param = ir->actual_parameters.get_head();
1465 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1466
1467 param = param->get_next();
1468 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1469
1470 param = param->get_next();
1471 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1472 assert(write_mask);
1473
1474 nir_intrinsic_set_base(instr, 0);
1475 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1476
1477 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1478
1479 nir_ssa_def *nir_val = evaluate_rvalue(val);
1480 /* The value in shared memory is a 32-bit value */
1481 if (val->type->is_boolean())
1482 nir_val = nir_b2b32(&b, nir_val);
1483
1484 instr->src[0] = nir_src_for_ssa(nir_val);
1485 instr->num_components = val->type->vector_elements;
1486 intrinsic_set_std430_align(instr, val->type);
1487
1488 nir_builder_instr_insert(&b, &instr->instr);
1489 break;
1490 }
1491 case nir_intrinsic_shared_atomic_add:
1492 case nir_intrinsic_shared_atomic_imin:
1493 case nir_intrinsic_shared_atomic_umin:
1494 case nir_intrinsic_shared_atomic_imax:
1495 case nir_intrinsic_shared_atomic_umax:
1496 case nir_intrinsic_shared_atomic_and:
1497 case nir_intrinsic_shared_atomic_or:
1498 case nir_intrinsic_shared_atomic_xor:
1499 case nir_intrinsic_shared_atomic_exchange:
1500 case nir_intrinsic_shared_atomic_comp_swap:
1501 case nir_intrinsic_shared_atomic_fadd:
1502 case nir_intrinsic_shared_atomic_fmin:
1503 case nir_intrinsic_shared_atomic_fmax:
1504 case nir_intrinsic_shared_atomic_fcomp_swap: {
1505 int param_count = ir->actual_parameters.length();
1506 assert(param_count == 2 || param_count == 3);
1507
1508 /* Offset */
1509 exec_node *param = ir->actual_parameters.get_head();
1510 ir_instruction *inst = (ir_instruction *) param;
1511 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1512
1513 /* data1 parameter (this is always present) */
1514 param = param->get_next();
1515 inst = (ir_instruction *) param;
1516 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1517
1518 /* data2 parameter (only with atomic_comp_swap) */
1519 if (param_count == 3) {
1520 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1521 op == nir_intrinsic_shared_atomic_fcomp_swap);
1522 param = param->get_next();
1523 inst = (ir_instruction *) param;
1524 instr->src[2] =
1525 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1526 }
1527
1528 /* Atomic result */
1529 assert(ir->return_deref);
1530 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1531 nir_ssa_dest_init(&instr->instr, &instr->dest,
1532 ir->return_deref->type->vector_elements,
1533 bit_size, NULL);
1534 nir_builder_instr_insert(&b, &instr->instr);
1535 break;
1536 }
1537 case nir_intrinsic_vote_any:
1538 case nir_intrinsic_vote_all:
1539 case nir_intrinsic_vote_ieq: {
1540 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1541 instr->num_components = 1;
1542
1543 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1544 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1545
1546 nir_builder_instr_insert(&b, &instr->instr);
1547 break;
1548 }
1549
1550 case nir_intrinsic_ballot: {
1551 nir_ssa_dest_init(&instr->instr, &instr->dest,
1552 ir->return_deref->type->vector_elements, 64, NULL);
1553 instr->num_components = ir->return_deref->type->vector_elements;
1554
1555 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1556 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1557
1558 nir_builder_instr_insert(&b, &instr->instr);
1559 break;
1560 }
1561 case nir_intrinsic_read_invocation: {
1562 nir_ssa_dest_init(&instr->instr, &instr->dest,
1563 ir->return_deref->type->vector_elements, 32, NULL);
1564 instr->num_components = ir->return_deref->type->vector_elements;
1565
1566 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1567 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1568
1569 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1570 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1571
1572 nir_builder_instr_insert(&b, &instr->instr);
1573 break;
1574 }
1575 case nir_intrinsic_read_first_invocation: {
1576 nir_ssa_dest_init(&instr->instr, &instr->dest,
1577 ir->return_deref->type->vector_elements, 32, NULL);
1578 instr->num_components = ir->return_deref->type->vector_elements;
1579
1580 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1581 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1582
1583 nir_builder_instr_insert(&b, &instr->instr);
1584 break;
1585 }
1586 case nir_intrinsic_is_helper_invocation: {
1587 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1588 nir_builder_instr_insert(&b, &instr->instr);
1589 break;
1590 }
1591 default:
1592 unreachable("not reached");
1593 }
1594
1595 if (ir->return_deref)
1596 nir_store_deref(&b, evaluate_deref(ir->return_deref), ret, ~0);
1597
1598 return;
1599 }
1600
1601 struct hash_entry *entry =
1602 _mesa_hash_table_search(this->overload_table, ir->callee);
1603 assert(entry);
1604 nir_function *callee = (nir_function *) entry->data;
1605
1606 nir_call_instr *call = nir_call_instr_create(this->shader, callee);
1607
1608 unsigned i = 0;
1609 nir_deref_instr *ret_deref = NULL;
1610 if (ir->return_deref) {
1611 nir_variable *ret_tmp =
1612 nir_local_variable_create(this->impl, ir->return_deref->type,
1613 "return_tmp");
1614 ret_deref = nir_build_deref_var(&b, ret_tmp);
1615 call->params[i++] = nir_src_for_ssa(&ret_deref->dest.ssa);
1616 }
1617
1618 foreach_two_lists(formal_node, &ir->callee->parameters,
1619 actual_node, &ir->actual_parameters) {
1620 ir_rvalue *param_rvalue = (ir_rvalue *) actual_node;
1621 ir_variable *sig_param = (ir_variable *) formal_node;
1622
1623 if (sig_param->data.mode == ir_var_function_out) {
1624 nir_deref_instr *out_deref = evaluate_deref(param_rvalue);
1625 call->params[i] = nir_src_for_ssa(&out_deref->dest.ssa);
1626 } else if (sig_param->data.mode == ir_var_function_in) {
1627 nir_ssa_def *val = evaluate_rvalue(param_rvalue);
1628 nir_src src = nir_src_for_ssa(val);
1629
1630 nir_src_copy(&call->params[i], &src, call);
1631 } else if (sig_param->data.mode == ir_var_function_inout) {
1632 unreachable("unimplemented: inout parameters");
1633 }
1634
1635 i++;
1636 }
1637
1638 nir_builder_instr_insert(&b, &call->instr);
1639
1640 if (ir->return_deref)
1641 nir_store_deref(&b, evaluate_deref(ir->return_deref), nir_load_deref(&b, ret_deref), ~0);
1642 }
1643
1644 void
1645 nir_visitor::visit(ir_assignment *ir)
1646 {
1647 unsigned num_components = ir->lhs->type->vector_elements;
1648
1649 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1650 ir->lhs->variable_referenced()->data.precise;
1651
1652 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1653 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1654 nir_deref_instr *lhs = evaluate_deref(ir->lhs);
1655 nir_deref_instr *rhs = evaluate_deref(ir->rhs);
1656 enum gl_access_qualifier lhs_qualifiers = deref_get_qualifier(lhs);
1657 enum gl_access_qualifier rhs_qualifiers = deref_get_qualifier(rhs);
1658 if (ir->condition) {
1659 nir_push_if(&b, evaluate_rvalue(ir->condition));
1660 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1661 rhs_qualifiers);
1662 nir_pop_if(&b, NULL);
1663 } else {
1664 nir_copy_deref_with_access(&b, lhs, rhs, lhs_qualifiers,
1665 rhs_qualifiers);
1666 }
1667 return;
1668 }
1669
1670 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1671
1672 ir->lhs->accept(this);
1673 nir_deref_instr *lhs_deref = this->deref;
1674 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1675
1676 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1677 /* GLSL IR will give us the input to the write-masked assignment in a
1678 * single packed vector. So, for example, if the writemask is xzw, then
1679 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1680 * from the load.
1681 */
1682 unsigned swiz[4];
1683 unsigned component = 0;
1684 for (unsigned i = 0; i < 4; i++) {
1685 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1686 }
1687 src = nir_swizzle(&b, src, swiz, num_components);
1688 }
1689
1690 enum gl_access_qualifier qualifiers = deref_get_qualifier(lhs_deref);
1691 if (ir->condition) {
1692 nir_push_if(&b, evaluate_rvalue(ir->condition));
1693 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1694 qualifiers);
1695 nir_pop_if(&b, NULL);
1696 } else {
1697 nir_store_deref_with_access(&b, lhs_deref, src, ir->write_mask,
1698 qualifiers);
1699 }
1700 }
1701
1702 /*
1703 * Given an instruction, returns a pointer to its destination or NULL if there
1704 * is no destination.
1705 *
1706 * Note that this only handles instructions we generate at this level.
1707 */
1708 static nir_dest *
1709 get_instr_dest(nir_instr *instr)
1710 {
1711 nir_alu_instr *alu_instr;
1712 nir_intrinsic_instr *intrinsic_instr;
1713 nir_tex_instr *tex_instr;
1714
1715 switch (instr->type) {
1716 case nir_instr_type_alu:
1717 alu_instr = nir_instr_as_alu(instr);
1718 return &alu_instr->dest.dest;
1719
1720 case nir_instr_type_intrinsic:
1721 intrinsic_instr = nir_instr_as_intrinsic(instr);
1722 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1723 return &intrinsic_instr->dest;
1724 else
1725 return NULL;
1726
1727 case nir_instr_type_tex:
1728 tex_instr = nir_instr_as_tex(instr);
1729 return &tex_instr->dest;
1730
1731 default:
1732 unreachable("not reached");
1733 }
1734
1735 return NULL;
1736 }
1737
1738 void
1739 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1740 unsigned bit_size)
1741 {
1742 nir_dest *dest = get_instr_dest(instr);
1743
1744 if (dest)
1745 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1746
1747 nir_builder_instr_insert(&b, instr);
1748
1749 if (dest) {
1750 assert(dest->is_ssa);
1751 this->result = &dest->ssa;
1752 }
1753 }
1754
1755 nir_ssa_def *
1756 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1757 {
1758 ir->accept(this);
1759 if (ir->as_dereference() || ir->as_constant()) {
1760 /*
1761 * A dereference is being used on the right hand side, which means we
1762 * must emit a variable load.
1763 */
1764
1765 enum gl_access_qualifier access = deref_get_qualifier(this->deref);
1766 this->result = nir_load_deref_with_access(&b, this->deref, access);
1767 }
1768
1769 return this->result;
1770 }
1771
1772 static bool
1773 type_is_float(glsl_base_type type)
1774 {
1775 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1776 type == GLSL_TYPE_FLOAT16;
1777 }
1778
1779 static bool
1780 type_is_signed(glsl_base_type type)
1781 {
1782 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1783 type == GLSL_TYPE_INT16;
1784 }
1785
1786 void
1787 nir_visitor::visit(ir_expression *ir)
1788 {
1789 /* Some special cases */
1790 switch (ir->operation) {
1791 case ir_unop_interpolate_at_centroid:
1792 case ir_binop_interpolate_at_offset:
1793 case ir_binop_interpolate_at_sample: {
1794 ir_dereference *deref = ir->operands[0]->as_dereference();
1795 ir_swizzle *swizzle = NULL;
1796 if (!deref) {
1797 /* the api does not allow a swizzle here, but the varying packing code
1798 * may have pushed one into here.
1799 */
1800 swizzle = ir->operands[0]->as_swizzle();
1801 assert(swizzle);
1802 deref = swizzle->val->as_dereference();
1803 assert(deref);
1804 }
1805
1806 deref->accept(this);
1807
1808 nir_intrinsic_op op;
1809 if (this->deref->mode == nir_var_shader_in) {
1810 switch (ir->operation) {
1811 case ir_unop_interpolate_at_centroid:
1812 op = nir_intrinsic_interp_deref_at_centroid;
1813 break;
1814 case ir_binop_interpolate_at_offset:
1815 op = nir_intrinsic_interp_deref_at_offset;
1816 break;
1817 case ir_binop_interpolate_at_sample:
1818 op = nir_intrinsic_interp_deref_at_sample;
1819 break;
1820 default:
1821 unreachable("Invalid interpolation intrinsic");
1822 }
1823 } else {
1824 /* This case can happen if the vertex shader does not write the
1825 * given varying. In this case, the linker will lower it to a
1826 * global variable. Since interpolating a variable makes no
1827 * sense, we'll just turn it into a load which will probably
1828 * eventually end up as an SSA definition.
1829 */
1830 assert(this->deref->mode == nir_var_shader_temp);
1831 op = nir_intrinsic_load_deref;
1832 }
1833
1834 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1835 intrin->num_components = deref->type->vector_elements;
1836 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1837
1838 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1839 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1840 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1841
1842 unsigned bit_size = glsl_get_bit_size(deref->type);
1843 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1844
1845 if (swizzle) {
1846 unsigned swiz[4] = {
1847 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1848 };
1849
1850 result = nir_swizzle(&b, result, swiz,
1851 swizzle->type->vector_elements);
1852 }
1853
1854 return;
1855 }
1856
1857 case ir_unop_ssbo_unsized_array_length: {
1858 nir_intrinsic_instr *intrin =
1859 nir_intrinsic_instr_create(b.shader,
1860 nir_intrinsic_deref_buffer_array_length);
1861
1862 ir_dereference *deref = ir->operands[0]->as_dereference();
1863 intrin->src[0] = nir_src_for_ssa(&evaluate_deref(deref)->dest.ssa);
1864
1865 add_instr(&intrin->instr, 1, 32);
1866 return;
1867 }
1868
1869 case ir_binop_ubo_load:
1870 /* UBO loads should only have been lowered in GLSL IR for non-nir drivers,
1871 * NIR drivers make use of gl_nir_lower_buffers() instead.
1872 */
1873 unreachable("Invalid operation nir doesn't want lowered ubo loads");
1874 default:
1875 break;
1876 }
1877
1878 nir_ssa_def *srcs[4];
1879 for (unsigned i = 0; i < ir->num_operands; i++)
1880 srcs[i] = evaluate_rvalue(ir->operands[i]);
1881
1882 glsl_base_type types[4];
1883 for (unsigned i = 0; i < ir->num_operands; i++)
1884 types[i] = ir->operands[i]->type->base_type;
1885
1886 glsl_base_type out_type = ir->type->base_type;
1887
1888 switch (ir->operation) {
1889 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1890 case ir_unop_logic_not:
1891 result = nir_inot(&b, srcs[0]);
1892 break;
1893 case ir_unop_neg:
1894 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1895 : nir_ineg(&b, srcs[0]);
1896 break;
1897 case ir_unop_abs:
1898 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1899 : nir_iabs(&b, srcs[0]);
1900 break;
1901 case ir_unop_clz:
1902 result = nir_uclz(&b, srcs[0]);
1903 break;
1904 case ir_unop_saturate:
1905 assert(type_is_float(types[0]));
1906 result = nir_fsat(&b, srcs[0]);
1907 break;
1908 case ir_unop_sign:
1909 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1910 : nir_isign(&b, srcs[0]);
1911 break;
1912 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1913 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1914 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1915 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1916 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1917 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1918 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1919 case ir_unop_i2f:
1920 case ir_unop_u2f:
1921 case ir_unop_b2f:
1922 case ir_unop_f2i:
1923 case ir_unop_f2u:
1924 case ir_unop_f2b:
1925 case ir_unop_i2b:
1926 case ir_unop_b2i:
1927 case ir_unop_b2i64:
1928 case ir_unop_d2f:
1929 case ir_unop_f2d:
1930 case ir_unop_f162f:
1931 case ir_unop_f2f16:
1932 case ir_unop_f162b:
1933 case ir_unop_b2f16:
1934 case ir_unop_i2i:
1935 case ir_unop_u2u:
1936 case ir_unop_d2i:
1937 case ir_unop_d2u:
1938 case ir_unop_d2b:
1939 case ir_unop_i2d:
1940 case ir_unop_u2d:
1941 case ir_unop_i642i:
1942 case ir_unop_i642u:
1943 case ir_unop_i642f:
1944 case ir_unop_i642b:
1945 case ir_unop_i642d:
1946 case ir_unop_u642i:
1947 case ir_unop_u642u:
1948 case ir_unop_u642f:
1949 case ir_unop_u642d:
1950 case ir_unop_i2i64:
1951 case ir_unop_u2i64:
1952 case ir_unop_f2i64:
1953 case ir_unop_d2i64:
1954 case ir_unop_i2u64:
1955 case ir_unop_u2u64:
1956 case ir_unop_f2u64:
1957 case ir_unop_d2u64:
1958 case ir_unop_i2u:
1959 case ir_unop_u2i:
1960 case ir_unop_i642u64:
1961 case ir_unop_u642i64: {
1962 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1963 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1964 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1965 nir_rounding_mode_undef),
1966 srcs[0], NULL, NULL, NULL);
1967 /* b2i and b2f don't have fixed bit-size versions so the builder will
1968 * just assume 32 and we have to fix it up here.
1969 */
1970 result->bit_size = nir_alu_type_get_type_size(dst_type);
1971 break;
1972 }
1973
1974 case ir_unop_f2fmp: {
1975 result = nir_build_alu(&b, nir_op_f2fmp, srcs[0], NULL, NULL, NULL);
1976 break;
1977 }
1978
1979 case ir_unop_i2imp: {
1980 result = nir_build_alu(&b, nir_op_i2imp, srcs[0], NULL, NULL, NULL);
1981 break;
1982 }
1983
1984 case ir_unop_u2ump: {
1985 result = nir_build_alu(&b, nir_op_u2ump, srcs[0], NULL, NULL, NULL);
1986 break;
1987 }
1988
1989 case ir_unop_bitcast_i2f:
1990 case ir_unop_bitcast_f2i:
1991 case ir_unop_bitcast_u2f:
1992 case ir_unop_bitcast_f2u:
1993 case ir_unop_bitcast_i642d:
1994 case ir_unop_bitcast_d2i64:
1995 case ir_unop_bitcast_u642d:
1996 case ir_unop_bitcast_d2u64:
1997 case ir_unop_subroutine_to_int:
1998 /* no-op */
1999 result = nir_mov(&b, srcs[0]);
2000 break;
2001 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
2002 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
2003 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
2004 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
2005 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
2006 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
2007 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
2008 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
2009 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
2010 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
2011 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
2012 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
2013 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
2014 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
2015 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
2016 case ir_unop_pack_snorm_2x16:
2017 result = nir_pack_snorm_2x16(&b, srcs[0]);
2018 break;
2019 case ir_unop_pack_snorm_4x8:
2020 result = nir_pack_snorm_4x8(&b, srcs[0]);
2021 break;
2022 case ir_unop_pack_unorm_2x16:
2023 result = nir_pack_unorm_2x16(&b, srcs[0]);
2024 break;
2025 case ir_unop_pack_unorm_4x8:
2026 result = nir_pack_unorm_4x8(&b, srcs[0]);
2027 break;
2028 case ir_unop_pack_half_2x16:
2029 result = nir_pack_half_2x16(&b, srcs[0]);
2030 break;
2031 case ir_unop_unpack_snorm_2x16:
2032 result = nir_unpack_snorm_2x16(&b, srcs[0]);
2033 break;
2034 case ir_unop_unpack_snorm_4x8:
2035 result = nir_unpack_snorm_4x8(&b, srcs[0]);
2036 break;
2037 case ir_unop_unpack_unorm_2x16:
2038 result = nir_unpack_unorm_2x16(&b, srcs[0]);
2039 break;
2040 case ir_unop_unpack_unorm_4x8:
2041 result = nir_unpack_unorm_4x8(&b, srcs[0]);
2042 break;
2043 case ir_unop_unpack_half_2x16:
2044 result = nir_unpack_half_2x16(&b, srcs[0]);
2045 break;
2046 case ir_unop_pack_sampler_2x32:
2047 case ir_unop_pack_image_2x32:
2048 case ir_unop_pack_double_2x32:
2049 case ir_unop_pack_int_2x32:
2050 case ir_unop_pack_uint_2x32:
2051 result = nir_pack_64_2x32(&b, srcs[0]);
2052 break;
2053 case ir_unop_unpack_sampler_2x32:
2054 case ir_unop_unpack_image_2x32:
2055 case ir_unop_unpack_double_2x32:
2056 case ir_unop_unpack_int_2x32:
2057 case ir_unop_unpack_uint_2x32:
2058 result = nir_unpack_64_2x32(&b, srcs[0]);
2059 break;
2060 case ir_unop_bitfield_reverse:
2061 result = nir_bitfield_reverse(&b, srcs[0]);
2062 break;
2063 case ir_unop_bit_count:
2064 result = nir_bit_count(&b, srcs[0]);
2065 break;
2066 case ir_unop_find_msb:
2067 switch (types[0]) {
2068 case GLSL_TYPE_UINT:
2069 result = nir_ufind_msb(&b, srcs[0]);
2070 break;
2071 case GLSL_TYPE_INT:
2072 result = nir_ifind_msb(&b, srcs[0]);
2073 break;
2074 default:
2075 unreachable("Invalid type for findMSB()");
2076 }
2077 break;
2078 case ir_unop_find_lsb:
2079 result = nir_find_lsb(&b, srcs[0]);
2080 break;
2081
2082 case ir_unop_get_buffer_size: {
2083 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
2084 this->shader,
2085 nir_intrinsic_get_buffer_size);
2086 load->num_components = ir->type->vector_elements;
2087 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
2088 unsigned bit_size = glsl_get_bit_size(ir->type);
2089 add_instr(&load->instr, ir->type->vector_elements, bit_size);
2090 return;
2091 }
2092
2093 case ir_unop_atan:
2094 result = nir_atan(&b, srcs[0]);
2095 break;
2096
2097 case ir_binop_add:
2098 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
2099 : nir_iadd(&b, srcs[0], srcs[1]);
2100 break;
2101 case ir_binop_add_sat:
2102 result = type_is_signed(out_type) ? nir_iadd_sat(&b, srcs[0], srcs[1])
2103 : nir_uadd_sat(&b, srcs[0], srcs[1]);
2104 break;
2105 case ir_binop_sub:
2106 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
2107 : nir_isub(&b, srcs[0], srcs[1]);
2108 break;
2109 case ir_binop_sub_sat:
2110 result = type_is_signed(out_type) ? nir_isub_sat(&b, srcs[0], srcs[1])
2111 : nir_usub_sat(&b, srcs[0], srcs[1]);
2112 break;
2113 case ir_binop_abs_sub:
2114 /* out_type is always unsigned for ir_binop_abs_sub, so we have to key
2115 * on the type of the sources.
2116 */
2117 result = type_is_signed(types[0]) ? nir_uabs_isub(&b, srcs[0], srcs[1])
2118 : nir_uabs_usub(&b, srcs[0], srcs[1]);
2119 break;
2120 case ir_binop_avg:
2121 result = type_is_signed(out_type) ? nir_ihadd(&b, srcs[0], srcs[1])
2122 : nir_uhadd(&b, srcs[0], srcs[1]);
2123 break;
2124 case ir_binop_avg_round:
2125 result = type_is_signed(out_type) ? nir_irhadd(&b, srcs[0], srcs[1])
2126 : nir_urhadd(&b, srcs[0], srcs[1]);
2127 break;
2128 case ir_binop_mul_32x16:
2129 result = type_is_signed(out_type) ? nir_imul_32x16(&b, srcs[0], srcs[1])
2130 : nir_umul_32x16(&b, srcs[0], srcs[1]);
2131 break;
2132 case ir_binop_mul:
2133 if (type_is_float(out_type))
2134 result = nir_fmul(&b, srcs[0], srcs[1]);
2135 else if (out_type == GLSL_TYPE_INT64 &&
2136 (ir->operands[0]->type->base_type == GLSL_TYPE_INT ||
2137 ir->operands[1]->type->base_type == GLSL_TYPE_INT))
2138 result = nir_imul_2x32_64(&b, srcs[0], srcs[1]);
2139 else if (out_type == GLSL_TYPE_UINT64 &&
2140 (ir->operands[0]->type->base_type == GLSL_TYPE_UINT ||
2141 ir->operands[1]->type->base_type == GLSL_TYPE_UINT))
2142 result = nir_umul_2x32_64(&b, srcs[0], srcs[1]);
2143 else
2144 result = nir_imul(&b, srcs[0], srcs[1]);
2145 break;
2146 case ir_binop_div:
2147 if (type_is_float(out_type))
2148 result = nir_fdiv(&b, srcs[0], srcs[1]);
2149 else if (type_is_signed(out_type))
2150 result = nir_idiv(&b, srcs[0], srcs[1]);
2151 else
2152 result = nir_udiv(&b, srcs[0], srcs[1]);
2153 break;
2154 case ir_binop_mod:
2155 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
2156 : nir_umod(&b, srcs[0], srcs[1]);
2157 break;
2158 case ir_binop_min:
2159 if (type_is_float(out_type))
2160 result = nir_fmin(&b, srcs[0], srcs[1]);
2161 else if (type_is_signed(out_type))
2162 result = nir_imin(&b, srcs[0], srcs[1]);
2163 else
2164 result = nir_umin(&b, srcs[0], srcs[1]);
2165 break;
2166 case ir_binop_max:
2167 if (type_is_float(out_type))
2168 result = nir_fmax(&b, srcs[0], srcs[1]);
2169 else if (type_is_signed(out_type))
2170 result = nir_imax(&b, srcs[0], srcs[1]);
2171 else
2172 result = nir_umax(&b, srcs[0], srcs[1]);
2173 break;
2174 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
2175 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
2176 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
2177 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
2178 case ir_binop_logic_and:
2179 result = nir_iand(&b, srcs[0], srcs[1]);
2180 break;
2181 case ir_binop_logic_or:
2182 result = nir_ior(&b, srcs[0], srcs[1]);
2183 break;
2184 case ir_binop_logic_xor:
2185 result = nir_ixor(&b, srcs[0], srcs[1]);
2186 break;
2187 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
2188 case ir_binop_rshift:
2189 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
2190 : nir_ushr(&b, srcs[0], srcs[1]);
2191 break;
2192 case ir_binop_imul_high:
2193 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
2194 : nir_umul_high(&b, srcs[0], srcs[1]);
2195 break;
2196 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
2197 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
2198 case ir_binop_less:
2199 if (type_is_float(types[0]))
2200 result = nir_flt(&b, srcs[0], srcs[1]);
2201 else if (type_is_signed(types[0]))
2202 result = nir_ilt(&b, srcs[0], srcs[1]);
2203 else
2204 result = nir_ult(&b, srcs[0], srcs[1]);
2205 break;
2206 case ir_binop_gequal:
2207 if (type_is_float(types[0]))
2208 result = nir_fge(&b, srcs[0], srcs[1]);
2209 else if (type_is_signed(types[0]))
2210 result = nir_ige(&b, srcs[0], srcs[1]);
2211 else
2212 result = nir_uge(&b, srcs[0], srcs[1]);
2213 break;
2214 case ir_binop_equal:
2215 if (type_is_float(types[0]))
2216 result = nir_feq(&b, srcs[0], srcs[1]);
2217 else
2218 result = nir_ieq(&b, srcs[0], srcs[1]);
2219 break;
2220 case ir_binop_nequal:
2221 if (type_is_float(types[0]))
2222 result = nir_fne(&b, srcs[0], srcs[1]);
2223 else
2224 result = nir_ine(&b, srcs[0], srcs[1]);
2225 break;
2226 case ir_binop_all_equal:
2227 if (type_is_float(types[0])) {
2228 switch (ir->operands[0]->type->vector_elements) {
2229 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
2230 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
2231 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
2232 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
2233 default:
2234 unreachable("not reached");
2235 }
2236 } else {
2237 switch (ir->operands[0]->type->vector_elements) {
2238 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
2239 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
2240 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
2241 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
2242 default:
2243 unreachable("not reached");
2244 }
2245 }
2246 break;
2247 case ir_binop_any_nequal:
2248 if (type_is_float(types[0])) {
2249 switch (ir->operands[0]->type->vector_elements) {
2250 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
2251 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
2252 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
2253 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
2254 default:
2255 unreachable("not reached");
2256 }
2257 } else {
2258 switch (ir->operands[0]->type->vector_elements) {
2259 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
2260 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
2261 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
2262 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
2263 default:
2264 unreachable("not reached");
2265 }
2266 }
2267 break;
2268 case ir_binop_dot:
2269 switch (ir->operands[0]->type->vector_elements) {
2270 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
2271 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
2272 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
2273 default:
2274 unreachable("not reached");
2275 }
2276 break;
2277 case ir_binop_vector_extract: {
2278 result = nir_channel(&b, srcs[0], 0);
2279 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
2280 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
2281 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
2282 swizzled, result);
2283 }
2284 break;
2285 }
2286
2287 case ir_binop_atan2:
2288 result = nir_atan2(&b, srcs[0], srcs[1]);
2289 break;
2290
2291 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
2292 case ir_triop_fma:
2293 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
2294 break;
2295 case ir_triop_lrp:
2296 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
2297 break;
2298 case ir_triop_csel:
2299 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
2300 break;
2301 case ir_triop_bitfield_extract:
2302 result = (out_type == GLSL_TYPE_INT) ?
2303 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
2304 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
2305 break;
2306 case ir_quadop_bitfield_insert:
2307 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
2308 break;
2309 case ir_quadop_vector:
2310 result = nir_vec(&b, srcs, ir->type->vector_elements);
2311 break;
2312
2313 default:
2314 unreachable("not reached");
2315 }
2316 }
2317
2318 void
2319 nir_visitor::visit(ir_swizzle *ir)
2320 {
2321 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
2322 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
2323 ir->type->vector_elements);
2324 }
2325
2326 void
2327 nir_visitor::visit(ir_texture *ir)
2328 {
2329 unsigned num_srcs;
2330 nir_texop op;
2331 switch (ir->op) {
2332 case ir_tex:
2333 op = nir_texop_tex;
2334 num_srcs = 1; /* coordinate */
2335 break;
2336
2337 case ir_txb:
2338 case ir_txl:
2339 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
2340 num_srcs = 2; /* coordinate, bias/lod */
2341 break;
2342
2343 case ir_txd:
2344 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
2345 num_srcs = 3;
2346 break;
2347
2348 case ir_txf:
2349 op = nir_texop_txf;
2350 if (ir->lod_info.lod != NULL)
2351 num_srcs = 2; /* coordinate, lod */
2352 else
2353 num_srcs = 1; /* coordinate */
2354 break;
2355
2356 case ir_txf_ms:
2357 op = nir_texop_txf_ms;
2358 num_srcs = 2; /* coordinate, sample_index */
2359 break;
2360
2361 case ir_txs:
2362 op = nir_texop_txs;
2363 if (ir->lod_info.lod != NULL)
2364 num_srcs = 1; /* lod */
2365 else
2366 num_srcs = 0;
2367 break;
2368
2369 case ir_lod:
2370 op = nir_texop_lod;
2371 num_srcs = 1; /* coordinate */
2372 break;
2373
2374 case ir_tg4:
2375 op = nir_texop_tg4;
2376 num_srcs = 1; /* coordinate */
2377 break;
2378
2379 case ir_query_levels:
2380 op = nir_texop_query_levels;
2381 num_srcs = 0;
2382 break;
2383
2384 case ir_texture_samples:
2385 op = nir_texop_texture_samples;
2386 num_srcs = 0;
2387 break;
2388
2389 case ir_samples_identical:
2390 op = nir_texop_samples_identical;
2391 num_srcs = 1; /* coordinate */
2392 break;
2393
2394 default:
2395 unreachable("not reached");
2396 }
2397
2398 if (ir->projector != NULL)
2399 num_srcs++;
2400 if (ir->shadow_comparator != NULL)
2401 num_srcs++;
2402 /* offsets are constants we store inside nir_tex_intrs.offsets */
2403 if (ir->offset != NULL && !ir->offset->type->is_array())
2404 num_srcs++;
2405
2406 /* Add one for the texture deref */
2407 num_srcs += 2;
2408
2409 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2410
2411 instr->op = op;
2412 instr->sampler_dim =
2413 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2414 instr->is_array = ir->sampler->type->sampler_array;
2415 instr->is_shadow = ir->sampler->type->sampler_shadow;
2416 if (instr->is_shadow)
2417 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2418 switch (ir->type->base_type) {
2419 case GLSL_TYPE_FLOAT:
2420 instr->dest_type = nir_type_float;
2421 break;
2422 case GLSL_TYPE_FLOAT16:
2423 instr->dest_type = nir_type_float16;
2424 break;
2425 case GLSL_TYPE_INT16:
2426 instr->dest_type = nir_type_int16;
2427 break;
2428 case GLSL_TYPE_UINT16:
2429 instr->dest_type = nir_type_uint16;
2430 break;
2431 case GLSL_TYPE_INT:
2432 instr->dest_type = nir_type_int;
2433 break;
2434 case GLSL_TYPE_BOOL:
2435 case GLSL_TYPE_UINT:
2436 instr->dest_type = nir_type_uint;
2437 break;
2438 default:
2439 unreachable("not reached");
2440 }
2441
2442 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2443
2444 /* check for bindless handles */
2445 if (sampler_deref->mode != nir_var_uniform ||
2446 nir_deref_instr_get_variable(sampler_deref)->data.bindless) {
2447 nir_ssa_def *load = nir_load_deref(&b, sampler_deref);
2448 instr->src[0].src = nir_src_for_ssa(load);
2449 instr->src[0].src_type = nir_tex_src_texture_handle;
2450 instr->src[1].src = nir_src_for_ssa(load);
2451 instr->src[1].src_type = nir_tex_src_sampler_handle;
2452 } else {
2453 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2454 instr->src[0].src_type = nir_tex_src_texture_deref;
2455 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2456 instr->src[1].src_type = nir_tex_src_sampler_deref;
2457 }
2458
2459 unsigned src_number = 2;
2460
2461 if (ir->coordinate != NULL) {
2462 instr->coord_components = ir->coordinate->type->vector_elements;
2463 instr->src[src_number].src =
2464 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2465 instr->src[src_number].src_type = nir_tex_src_coord;
2466 src_number++;
2467 }
2468
2469 if (ir->projector != NULL) {
2470 instr->src[src_number].src =
2471 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2472 instr->src[src_number].src_type = nir_tex_src_projector;
2473 src_number++;
2474 }
2475
2476 if (ir->shadow_comparator != NULL) {
2477 instr->src[src_number].src =
2478 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2479 instr->src[src_number].src_type = nir_tex_src_comparator;
2480 src_number++;
2481 }
2482
2483 if (ir->offset != NULL) {
2484 if (ir->offset->type->is_array()) {
2485 for (int i = 0; i < ir->offset->type->array_size(); i++) {
2486 const ir_constant *c =
2487 ir->offset->as_constant()->get_array_element(i);
2488
2489 for (unsigned j = 0; j < 2; ++j) {
2490 int val = c->get_int_component(j);
2491 assert(val <= 31 && val >= -32);
2492 instr->tg4_offsets[i][j] = val;
2493 }
2494 }
2495 } else {
2496 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2497
2498 instr->src[src_number].src =
2499 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2500 instr->src[src_number].src_type = nir_tex_src_offset;
2501 src_number++;
2502 }
2503 }
2504
2505 switch (ir->op) {
2506 case ir_txb:
2507 instr->src[src_number].src =
2508 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2509 instr->src[src_number].src_type = nir_tex_src_bias;
2510 src_number++;
2511 break;
2512
2513 case ir_txl:
2514 case ir_txf:
2515 case ir_txs:
2516 if (ir->lod_info.lod != NULL) {
2517 instr->src[src_number].src =
2518 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2519 instr->src[src_number].src_type = nir_tex_src_lod;
2520 src_number++;
2521 }
2522 break;
2523
2524 case ir_txd:
2525 instr->src[src_number].src =
2526 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2527 instr->src[src_number].src_type = nir_tex_src_ddx;
2528 src_number++;
2529 instr->src[src_number].src =
2530 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2531 instr->src[src_number].src_type = nir_tex_src_ddy;
2532 src_number++;
2533 break;
2534
2535 case ir_txf_ms:
2536 instr->src[src_number].src =
2537 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2538 instr->src[src_number].src_type = nir_tex_src_ms_index;
2539 src_number++;
2540 break;
2541
2542 case ir_tg4:
2543 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2544 break;
2545
2546 default:
2547 break;
2548 }
2549
2550 assert(src_number == num_srcs);
2551
2552 unsigned bit_size = glsl_get_bit_size(ir->type);
2553 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2554 }
2555
2556 void
2557 nir_visitor::visit(ir_constant *ir)
2558 {
2559 /*
2560 * We don't know if this variable is an array or struct that gets
2561 * dereferenced, so do the safe thing an make it a variable with a
2562 * constant initializer and return a dereference.
2563 */
2564
2565 nir_variable *var =
2566 nir_local_variable_create(this->impl, ir->type, "const_temp");
2567 var->data.read_only = true;
2568 var->constant_initializer = constant_copy(ir, var);
2569
2570 this->deref = nir_build_deref_var(&b, var);
2571 }
2572
2573 void
2574 nir_visitor::visit(ir_dereference_variable *ir)
2575 {
2576 if (ir->variable_referenced()->data.mode == ir_var_function_out) {
2577 unsigned i = (sig->return_type != glsl_type::void_type) ? 1 : 0;
2578
2579 foreach_in_list(ir_variable, param, &sig->parameters) {
2580 if (param == ir->variable_referenced()) {
2581 break;
2582 }
2583 i++;
2584 }
2585
2586 this->deref = nir_build_deref_cast(&b, nir_load_param(&b, i),
2587 nir_var_function_temp, ir->type, 0);
2588 return;
2589 }
2590
2591 assert(ir->variable_referenced()->data.mode != ir_var_function_inout);
2592
2593 struct hash_entry *entry =
2594 _mesa_hash_table_search(this->var_table, ir->var);
2595 assert(entry);
2596 nir_variable *var = (nir_variable *) entry->data;
2597
2598 this->deref = nir_build_deref_var(&b, var);
2599 }
2600
2601 void
2602 nir_visitor::visit(ir_dereference_record *ir)
2603 {
2604 ir->record->accept(this);
2605
2606 int field_index = ir->field_idx;
2607 assert(field_index >= 0);
2608
2609 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2610 }
2611
2612 void
2613 nir_visitor::visit(ir_dereference_array *ir)
2614 {
2615 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2616
2617 ir->array->accept(this);
2618
2619 this->deref = nir_build_deref_array(&b, this->deref, index);
2620 }
2621
2622 void
2623 nir_visitor::visit(ir_barrier *)
2624 {
2625 if (shader->info.stage == MESA_SHADER_COMPUTE) {
2626 nir_intrinsic_instr *shared_barrier =
2627 nir_intrinsic_instr_create(this->shader,
2628 nir_intrinsic_memory_barrier_shared);
2629 nir_builder_instr_insert(&b, &shared_barrier->instr);
2630 } else if (shader->info.stage == MESA_SHADER_TESS_CTRL) {
2631 nir_intrinsic_instr *patch_barrier =
2632 nir_intrinsic_instr_create(this->shader,
2633 nir_intrinsic_memory_barrier_tcs_patch);
2634 nir_builder_instr_insert(&b, &patch_barrier->instr);
2635 }
2636
2637 nir_intrinsic_instr *instr =
2638 nir_intrinsic_instr_create(this->shader, nir_intrinsic_control_barrier);
2639 nir_builder_instr_insert(&b, &instr->instr);
2640 }
2641
2642 nir_shader *
2643 glsl_float64_funcs_to_nir(struct gl_context *ctx,
2644 const nir_shader_compiler_options *options)
2645 {
2646 /* We pretend it's a vertex shader. Ultimately, the stage shouldn't
2647 * matter because we're not optimizing anything here.
2648 */
2649 struct gl_shader *sh = _mesa_new_shader(-1, MESA_SHADER_VERTEX);
2650 sh->Source = float64_source;
2651 sh->CompileStatus = COMPILE_FAILURE;
2652 _mesa_glsl_compile_shader(ctx, sh, false, false, true);
2653
2654 if (!sh->CompileStatus) {
2655 if (sh->InfoLog) {
2656 _mesa_problem(ctx,
2657 "fp64 software impl compile failed:\n%s\nsource:\n%s\n",
2658 sh->InfoLog, float64_source);
2659 }
2660 return NULL;
2661 }
2662
2663 nir_shader *nir = nir_shader_create(NULL, MESA_SHADER_VERTEX, options, NULL);
2664
2665 nir_visitor v1(ctx, nir);
2666 nir_function_visitor v2(&v1);
2667 v2.run(sh->ir);
2668 visit_exec_list(sh->ir, &v1);
2669
2670 /* _mesa_delete_shader will try to free sh->Source but it's static const */
2671 sh->Source = NULL;
2672 _mesa_delete_shader(ctx, sh);
2673
2674 nir_validate_shader(nir, "float64_funcs_to_nir");
2675
2676 NIR_PASS_V(nir, nir_lower_variable_initializers, nir_var_function_temp);
2677 NIR_PASS_V(nir, nir_lower_returns);
2678 NIR_PASS_V(nir, nir_inline_functions);
2679 NIR_PASS_V(nir, nir_opt_deref);
2680
2681 /* Do some optimizations to clean up the shader now. By optimizing the
2682 * functions in the library, we avoid having to re-do that work every
2683 * time we inline a copy of a function. Reducing basic blocks also helps
2684 * with compile times.
2685 */
2686 NIR_PASS_V(nir, nir_lower_vars_to_ssa);
2687 NIR_PASS_V(nir, nir_copy_prop);
2688 NIR_PASS_V(nir, nir_opt_dce);
2689 NIR_PASS_V(nir, nir_opt_cse);
2690 NIR_PASS_V(nir, nir_opt_gcm, true);
2691 NIR_PASS_V(nir, nir_opt_peephole_select, 1, false, false);
2692 NIR_PASS_V(nir, nir_opt_dce);
2693
2694 return nir;
2695 }