nir: rename global/local to private/function memory
[mesa.git] / src / compiler / glsl / glsl_to_nir.cpp
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "glsl_to_nir.h"
29 #include "ir_visitor.h"
30 #include "ir_hierarchical_visitor.h"
31 #include "ir.h"
32 #include "compiler/nir/nir_control_flow.h"
33 #include "compiler/nir/nir_builder.h"
34 #include "main/imports.h"
35 #include "main/mtypes.h"
36 #include "util/u_math.h"
37
38 /*
39 * pass to lower GLSL IR to NIR
40 *
41 * This will lower variable dereferences to loads/stores of corresponding
42 * variables in NIR - the variables will be converted to registers in a later
43 * pass.
44 */
45
46 namespace {
47
48 class nir_visitor : public ir_visitor
49 {
50 public:
51 nir_visitor(nir_shader *shader);
52 ~nir_visitor();
53
54 virtual void visit(ir_variable *);
55 virtual void visit(ir_function *);
56 virtual void visit(ir_function_signature *);
57 virtual void visit(ir_loop *);
58 virtual void visit(ir_if *);
59 virtual void visit(ir_discard *);
60 virtual void visit(ir_loop_jump *);
61 virtual void visit(ir_return *);
62 virtual void visit(ir_call *);
63 virtual void visit(ir_assignment *);
64 virtual void visit(ir_emit_vertex *);
65 virtual void visit(ir_end_primitive *);
66 virtual void visit(ir_expression *);
67 virtual void visit(ir_swizzle *);
68 virtual void visit(ir_texture *);
69 virtual void visit(ir_constant *);
70 virtual void visit(ir_dereference_variable *);
71 virtual void visit(ir_dereference_record *);
72 virtual void visit(ir_dereference_array *);
73 virtual void visit(ir_barrier *);
74
75 void create_function(ir_function_signature *ir);
76
77 private:
78 void add_instr(nir_instr *instr, unsigned num_components, unsigned bit_size);
79 nir_ssa_def *evaluate_rvalue(ir_rvalue *ir);
80
81 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def **srcs);
82 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1);
83 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
84 nir_ssa_def *src2);
85 nir_alu_instr *emit(nir_op op, unsigned dest_size, nir_ssa_def *src1,
86 nir_ssa_def *src2, nir_ssa_def *src3);
87
88 bool supports_ints;
89
90 nir_shader *shader;
91 nir_function_impl *impl;
92 nir_builder b;
93 nir_ssa_def *result; /* result of the expression tree last visited */
94
95 nir_deref_instr *evaluate_deref(ir_instruction *ir);
96
97 /* most recent deref instruction created */
98 nir_deref_instr *deref;
99
100 /* whether the IR we're operating on is per-function or global */
101 bool is_global;
102
103 /* map of ir_variable -> nir_variable */
104 struct hash_table *var_table;
105
106 /* map of ir_function_signature -> nir_function_overload */
107 struct hash_table *overload_table;
108 };
109
110 /*
111 * This visitor runs before the main visitor, calling create_function() for
112 * each function so that the main visitor can resolve forward references in
113 * calls.
114 */
115
116 class nir_function_visitor : public ir_hierarchical_visitor
117 {
118 public:
119 nir_function_visitor(nir_visitor *v) : visitor(v)
120 {
121 }
122 virtual ir_visitor_status visit_enter(ir_function *);
123
124 private:
125 nir_visitor *visitor;
126 };
127
128 } /* end of anonymous namespace */
129
130 nir_shader *
131 glsl_to_nir(const struct gl_shader_program *shader_prog,
132 gl_shader_stage stage,
133 const nir_shader_compiler_options *options)
134 {
135 struct gl_linked_shader *sh = shader_prog->_LinkedShaders[stage];
136
137 nir_shader *shader = nir_shader_create(NULL, stage, options,
138 &sh->Program->info);
139
140 nir_visitor v1(shader);
141 nir_function_visitor v2(&v1);
142 v2.run(sh->ir);
143 visit_exec_list(sh->ir, &v1);
144
145 nir_lower_constant_initializers(shader, (nir_variable_mode)~0);
146
147 /* Remap the locations to slots so those requiring two slots will occupy
148 * two locations. For instance, if we have in the IR code a dvec3 attr0 in
149 * location 0 and vec4 attr1 in location 1, in NIR attr0 will use
150 * locations/slots 0 and 1, and attr1 will use location/slot 2 */
151 if (shader->info.stage == MESA_SHADER_VERTEX)
152 nir_remap_dual_slot_attributes(shader, &sh->Program->DualSlotInputs);
153
154 shader->info.name = ralloc_asprintf(shader, "GLSL%d", shader_prog->Name);
155 if (shader_prog->Label)
156 shader->info.label = ralloc_strdup(shader, shader_prog->Label);
157
158 /* Check for transform feedback varyings specified via the API */
159 shader->info.has_transform_feedback_varyings =
160 shader_prog->TransformFeedback.NumVarying > 0;
161
162 /* Check for transform feedback varyings specified in the Shader */
163 if (shader_prog->last_vert_prog)
164 shader->info.has_transform_feedback_varyings |=
165 shader_prog->last_vert_prog->sh.LinkedTransformFeedback->NumVarying > 0;
166
167 return shader;
168 }
169
170 nir_visitor::nir_visitor(nir_shader *shader)
171 {
172 this->supports_ints = shader->options->native_integers;
173 this->shader = shader;
174 this->is_global = true;
175 this->var_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
176 _mesa_key_pointer_equal);
177 this->overload_table = _mesa_hash_table_create(NULL, _mesa_hash_pointer,
178 _mesa_key_pointer_equal);
179 this->result = NULL;
180 this->impl = NULL;
181 memset(&this->b, 0, sizeof(this->b));
182 }
183
184 nir_visitor::~nir_visitor()
185 {
186 _mesa_hash_table_destroy(this->var_table, NULL);
187 _mesa_hash_table_destroy(this->overload_table, NULL);
188 }
189
190 nir_deref_instr *
191 nir_visitor::evaluate_deref(ir_instruction *ir)
192 {
193 ir->accept(this);
194 return this->deref;
195 }
196
197 static nir_constant *
198 constant_copy(ir_constant *ir, void *mem_ctx)
199 {
200 if (ir == NULL)
201 return NULL;
202
203 nir_constant *ret = rzalloc(mem_ctx, nir_constant);
204
205 const unsigned rows = ir->type->vector_elements;
206 const unsigned cols = ir->type->matrix_columns;
207 unsigned i;
208
209 ret->num_elements = 0;
210 switch (ir->type->base_type) {
211 case GLSL_TYPE_UINT:
212 /* Only float base types can be matrices. */
213 assert(cols == 1);
214
215 for (unsigned r = 0; r < rows; r++)
216 ret->values[0].u32[r] = ir->value.u[r];
217
218 break;
219
220 case GLSL_TYPE_INT:
221 /* Only float base types can be matrices. */
222 assert(cols == 1);
223
224 for (unsigned r = 0; r < rows; r++)
225 ret->values[0].i32[r] = ir->value.i[r];
226
227 break;
228
229 case GLSL_TYPE_FLOAT:
230 for (unsigned c = 0; c < cols; c++) {
231 for (unsigned r = 0; r < rows; r++)
232 ret->values[c].f32[r] = ir->value.f[c * rows + r];
233 }
234 break;
235
236 case GLSL_TYPE_DOUBLE:
237 for (unsigned c = 0; c < cols; c++) {
238 for (unsigned r = 0; r < rows; r++)
239 ret->values[c].f64[r] = ir->value.d[c * rows + r];
240 }
241 break;
242
243 case GLSL_TYPE_UINT64:
244 /* Only float base types can be matrices. */
245 assert(cols == 1);
246
247 for (unsigned r = 0; r < rows; r++)
248 ret->values[0].u64[r] = ir->value.u64[r];
249 break;
250
251 case GLSL_TYPE_INT64:
252 /* Only float base types can be matrices. */
253 assert(cols == 1);
254
255 for (unsigned r = 0; r < rows; r++)
256 ret->values[0].i64[r] = ir->value.i64[r];
257 break;
258
259 case GLSL_TYPE_BOOL:
260 /* Only float base types can be matrices. */
261 assert(cols == 1);
262
263 for (unsigned r = 0; r < rows; r++)
264 ret->values[0].b[r] = ir->value.b[r];
265
266 break;
267
268 case GLSL_TYPE_STRUCT:
269 case GLSL_TYPE_ARRAY:
270 ret->elements = ralloc_array(mem_ctx, nir_constant *,
271 ir->type->length);
272 ret->num_elements = ir->type->length;
273
274 for (i = 0; i < ir->type->length; i++)
275 ret->elements[i] = constant_copy(ir->const_elements[i], mem_ctx);
276 break;
277
278 default:
279 unreachable("not reached");
280 }
281
282 return ret;
283 }
284
285 void
286 nir_visitor::visit(ir_variable *ir)
287 {
288 /* TODO: In future we should switch to using the NIR lowering pass but for
289 * now just ignore these variables as GLSL IR should have lowered them.
290 * Anything remaining are just dead vars that weren't cleaned up.
291 */
292 if (ir->data.mode == ir_var_shader_shared)
293 return;
294
295 nir_variable *var = rzalloc(shader, nir_variable);
296 var->type = ir->type;
297 var->name = ralloc_strdup(var, ir->name);
298
299 var->data.always_active_io = ir->data.always_active_io;
300 var->data.read_only = ir->data.read_only;
301 var->data.centroid = ir->data.centroid;
302 var->data.sample = ir->data.sample;
303 var->data.patch = ir->data.patch;
304 var->data.invariant = ir->data.invariant;
305 var->data.location = ir->data.location;
306 var->data.stream = ir->data.stream;
307 var->data.compact = false;
308
309 switch(ir->data.mode) {
310 case ir_var_auto:
311 case ir_var_temporary:
312 if (is_global)
313 var->data.mode = nir_var_private;
314 else
315 var->data.mode = nir_var_function;
316 break;
317
318 case ir_var_function_in:
319 case ir_var_function_out:
320 case ir_var_function_inout:
321 case ir_var_const_in:
322 var->data.mode = nir_var_function;
323 break;
324
325 case ir_var_shader_in:
326 if (shader->info.stage == MESA_SHADER_FRAGMENT &&
327 ir->data.location == VARYING_SLOT_FACE) {
328 /* For whatever reason, GLSL IR makes gl_FrontFacing an input */
329 var->data.location = SYSTEM_VALUE_FRONT_FACE;
330 var->data.mode = nir_var_system_value;
331 } else if (shader->info.stage == MESA_SHADER_GEOMETRY &&
332 ir->data.location == VARYING_SLOT_PRIMITIVE_ID) {
333 /* For whatever reason, GLSL IR makes gl_PrimitiveIDIn an input */
334 var->data.location = SYSTEM_VALUE_PRIMITIVE_ID;
335 var->data.mode = nir_var_system_value;
336 } else {
337 var->data.mode = nir_var_shader_in;
338
339 if (shader->info.stage == MESA_SHADER_TESS_EVAL &&
340 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
341 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
342 var->data.compact = ir->type->without_array()->is_scalar();
343 }
344 }
345 break;
346
347 case ir_var_shader_out:
348 var->data.mode = nir_var_shader_out;
349 if (shader->info.stage == MESA_SHADER_TESS_CTRL &&
350 (ir->data.location == VARYING_SLOT_TESS_LEVEL_INNER ||
351 ir->data.location == VARYING_SLOT_TESS_LEVEL_OUTER)) {
352 var->data.compact = ir->type->without_array()->is_scalar();
353 }
354 break;
355
356 case ir_var_uniform:
357 if (ir->get_interface_type())
358 var->data.mode = nir_var_ubo;
359 else
360 var->data.mode = nir_var_uniform;
361 break;
362
363 case ir_var_shader_storage:
364 var->data.mode = nir_var_ssbo;
365 break;
366
367 case ir_var_system_value:
368 var->data.mode = nir_var_system_value;
369 break;
370
371 default:
372 unreachable("not reached");
373 }
374
375 var->data.interpolation = ir->data.interpolation;
376 var->data.origin_upper_left = ir->data.origin_upper_left;
377 var->data.pixel_center_integer = ir->data.pixel_center_integer;
378 var->data.location_frac = ir->data.location_frac;
379
380 if (var->data.pixel_center_integer) {
381 assert(shader->info.stage == MESA_SHADER_FRAGMENT);
382 shader->info.fs.pixel_center_integer = true;
383 }
384
385 switch (ir->data.depth_layout) {
386 case ir_depth_layout_none:
387 var->data.depth_layout = nir_depth_layout_none;
388 break;
389 case ir_depth_layout_any:
390 var->data.depth_layout = nir_depth_layout_any;
391 break;
392 case ir_depth_layout_greater:
393 var->data.depth_layout = nir_depth_layout_greater;
394 break;
395 case ir_depth_layout_less:
396 var->data.depth_layout = nir_depth_layout_less;
397 break;
398 case ir_depth_layout_unchanged:
399 var->data.depth_layout = nir_depth_layout_unchanged;
400 break;
401 default:
402 unreachable("not reached");
403 }
404
405 var->data.index = ir->data.index;
406 var->data.descriptor_set = 0;
407 var->data.binding = ir->data.binding;
408 var->data.explicit_binding = ir->data.explicit_binding;
409 var->data.bindless = ir->data.bindless;
410 var->data.offset = ir->data.offset;
411
412 unsigned image_access = 0;
413 if (ir->data.memory_read_only)
414 image_access |= ACCESS_NON_WRITEABLE;
415 if (ir->data.memory_write_only)
416 image_access |= ACCESS_NON_READABLE;
417 if (ir->data.memory_coherent)
418 image_access |= ACCESS_COHERENT;
419 if (ir->data.memory_volatile)
420 image_access |= ACCESS_VOLATILE;
421 if (ir->data.memory_restrict)
422 image_access |= ACCESS_RESTRICT;
423 var->data.image.access = (gl_access_qualifier)image_access;
424 var->data.image.format = ir->data.image_format;
425
426 var->data.fb_fetch_output = ir->data.fb_fetch_output;
427 var->data.explicit_xfb_buffer = ir->data.explicit_xfb_buffer;
428 var->data.explicit_xfb_stride = ir->data.explicit_xfb_stride;
429 var->data.xfb_buffer = ir->data.xfb_buffer;
430 var->data.xfb_stride = ir->data.xfb_stride;
431
432 var->num_state_slots = ir->get_num_state_slots();
433 if (var->num_state_slots > 0) {
434 var->state_slots = rzalloc_array(var, nir_state_slot,
435 var->num_state_slots);
436
437 ir_state_slot *state_slots = ir->get_state_slots();
438 for (unsigned i = 0; i < var->num_state_slots; i++) {
439 for (unsigned j = 0; j < 5; j++)
440 var->state_slots[i].tokens[j] = state_slots[i].tokens[j];
441 var->state_slots[i].swizzle = state_slots[i].swizzle;
442 }
443 } else {
444 var->state_slots = NULL;
445 }
446
447 var->constant_initializer = constant_copy(ir->constant_initializer, var);
448
449 var->interface_type = ir->get_interface_type();
450
451 if (var->data.mode == nir_var_function)
452 nir_function_impl_add_variable(impl, var);
453 else
454 nir_shader_add_variable(shader, var);
455
456 _mesa_hash_table_insert(var_table, ir, var);
457 }
458
459 ir_visitor_status
460 nir_function_visitor::visit_enter(ir_function *ir)
461 {
462 foreach_in_list(ir_function_signature, sig, &ir->signatures) {
463 visitor->create_function(sig);
464 }
465 return visit_continue_with_parent;
466 }
467
468 void
469 nir_visitor::create_function(ir_function_signature *ir)
470 {
471 if (ir->is_intrinsic())
472 return;
473
474 nir_function *func = nir_function_create(shader, ir->function_name());
475
476 assert(ir->parameters.is_empty());
477 assert(ir->return_type == glsl_type::void_type);
478
479 _mesa_hash_table_insert(this->overload_table, ir, func);
480 }
481
482 void
483 nir_visitor::visit(ir_function *ir)
484 {
485 foreach_in_list(ir_function_signature, sig, &ir->signatures)
486 sig->accept(this);
487 }
488
489 void
490 nir_visitor::visit(ir_function_signature *ir)
491 {
492 if (ir->is_intrinsic())
493 return;
494
495 struct hash_entry *entry =
496 _mesa_hash_table_search(this->overload_table, ir);
497
498 assert(entry);
499 nir_function *func = (nir_function *) entry->data;
500
501 if (ir->is_defined) {
502 nir_function_impl *impl = nir_function_impl_create(func);
503 this->impl = impl;
504
505 assert(strcmp(func->name, "main") == 0);
506 assert(ir->parameters.is_empty());
507
508 this->is_global = false;
509
510 nir_builder_init(&b, impl);
511 b.cursor = nir_after_cf_list(&impl->body);
512 visit_exec_list(&ir->body, this);
513
514 this->is_global = true;
515 } else {
516 func->impl = NULL;
517 }
518 }
519
520 void
521 nir_visitor::visit(ir_loop *ir)
522 {
523 nir_push_loop(&b);
524 visit_exec_list(&ir->body_instructions, this);
525 nir_pop_loop(&b, NULL);
526 }
527
528 void
529 nir_visitor::visit(ir_if *ir)
530 {
531 nir_push_if(&b, evaluate_rvalue(ir->condition));
532 visit_exec_list(&ir->then_instructions, this);
533 nir_push_else(&b, NULL);
534 visit_exec_list(&ir->else_instructions, this);
535 nir_pop_if(&b, NULL);
536 }
537
538 void
539 nir_visitor::visit(ir_discard *ir)
540 {
541 /*
542 * discards aren't treated as control flow, because before we lower them
543 * they can appear anywhere in the shader and the stuff after them may still
544 * be executed (yay, crazy GLSL rules!). However, after lowering, all the
545 * discards will be immediately followed by a return.
546 */
547
548 nir_intrinsic_instr *discard;
549 if (ir->condition) {
550 discard = nir_intrinsic_instr_create(this->shader,
551 nir_intrinsic_discard_if);
552 discard->src[0] =
553 nir_src_for_ssa(evaluate_rvalue(ir->condition));
554 } else {
555 discard = nir_intrinsic_instr_create(this->shader, nir_intrinsic_discard);
556 }
557
558 nir_builder_instr_insert(&b, &discard->instr);
559 }
560
561 void
562 nir_visitor::visit(ir_emit_vertex *ir)
563 {
564 nir_intrinsic_instr *instr =
565 nir_intrinsic_instr_create(this->shader, nir_intrinsic_emit_vertex);
566 nir_intrinsic_set_stream_id(instr, ir->stream_id());
567 nir_builder_instr_insert(&b, &instr->instr);
568 }
569
570 void
571 nir_visitor::visit(ir_end_primitive *ir)
572 {
573 nir_intrinsic_instr *instr =
574 nir_intrinsic_instr_create(this->shader, nir_intrinsic_end_primitive);
575 nir_intrinsic_set_stream_id(instr, ir->stream_id());
576 nir_builder_instr_insert(&b, &instr->instr);
577 }
578
579 void
580 nir_visitor::visit(ir_loop_jump *ir)
581 {
582 nir_jump_type type;
583 switch (ir->mode) {
584 case ir_loop_jump::jump_break:
585 type = nir_jump_break;
586 break;
587 case ir_loop_jump::jump_continue:
588 type = nir_jump_continue;
589 break;
590 default:
591 unreachable("not reached");
592 }
593
594 nir_jump_instr *instr = nir_jump_instr_create(this->shader, type);
595 nir_builder_instr_insert(&b, &instr->instr);
596 }
597
598 void
599 nir_visitor::visit(ir_return *ir)
600 {
601 assert(ir->value == NULL);
602 nir_jump_instr *instr = nir_jump_instr_create(this->shader, nir_jump_return);
603 nir_builder_instr_insert(&b, &instr->instr);
604 }
605
606 static void
607 intrinsic_set_std430_align(nir_intrinsic_instr *intrin, const glsl_type *type)
608 {
609 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
610 unsigned pow2_components = util_next_power_of_two(type->vector_elements);
611 nir_intrinsic_set_align(intrin, (bit_size / 8) * pow2_components, 0);
612 }
613
614 void
615 nir_visitor::visit(ir_call *ir)
616 {
617 if (ir->callee->is_intrinsic()) {
618 nir_intrinsic_op op;
619
620 switch (ir->callee->intrinsic_id) {
621 case ir_intrinsic_atomic_counter_read:
622 op = nir_intrinsic_atomic_counter_read_deref;
623 break;
624 case ir_intrinsic_atomic_counter_increment:
625 op = nir_intrinsic_atomic_counter_inc_deref;
626 break;
627 case ir_intrinsic_atomic_counter_predecrement:
628 op = nir_intrinsic_atomic_counter_pre_dec_deref;
629 break;
630 case ir_intrinsic_atomic_counter_add:
631 op = nir_intrinsic_atomic_counter_add_deref;
632 break;
633 case ir_intrinsic_atomic_counter_and:
634 op = nir_intrinsic_atomic_counter_and_deref;
635 break;
636 case ir_intrinsic_atomic_counter_or:
637 op = nir_intrinsic_atomic_counter_or_deref;
638 break;
639 case ir_intrinsic_atomic_counter_xor:
640 op = nir_intrinsic_atomic_counter_xor_deref;
641 break;
642 case ir_intrinsic_atomic_counter_min:
643 op = nir_intrinsic_atomic_counter_min_deref;
644 break;
645 case ir_intrinsic_atomic_counter_max:
646 op = nir_intrinsic_atomic_counter_max_deref;
647 break;
648 case ir_intrinsic_atomic_counter_exchange:
649 op = nir_intrinsic_atomic_counter_exchange_deref;
650 break;
651 case ir_intrinsic_atomic_counter_comp_swap:
652 op = nir_intrinsic_atomic_counter_comp_swap_deref;
653 break;
654 case ir_intrinsic_image_load:
655 op = nir_intrinsic_image_deref_load;
656 break;
657 case ir_intrinsic_image_store:
658 op = nir_intrinsic_image_deref_store;
659 break;
660 case ir_intrinsic_image_atomic_add:
661 op = ir->return_deref->type->is_integer_32_64()
662 ? nir_intrinsic_image_deref_atomic_add
663 : nir_intrinsic_image_deref_atomic_fadd;
664 break;
665 case ir_intrinsic_image_atomic_min:
666 op = nir_intrinsic_image_deref_atomic_min;
667 break;
668 case ir_intrinsic_image_atomic_max:
669 op = nir_intrinsic_image_deref_atomic_max;
670 break;
671 case ir_intrinsic_image_atomic_and:
672 op = nir_intrinsic_image_deref_atomic_and;
673 break;
674 case ir_intrinsic_image_atomic_or:
675 op = nir_intrinsic_image_deref_atomic_or;
676 break;
677 case ir_intrinsic_image_atomic_xor:
678 op = nir_intrinsic_image_deref_atomic_xor;
679 break;
680 case ir_intrinsic_image_atomic_exchange:
681 op = nir_intrinsic_image_deref_atomic_exchange;
682 break;
683 case ir_intrinsic_image_atomic_comp_swap:
684 op = nir_intrinsic_image_deref_atomic_comp_swap;
685 break;
686 case ir_intrinsic_memory_barrier:
687 op = nir_intrinsic_memory_barrier;
688 break;
689 case ir_intrinsic_image_size:
690 op = nir_intrinsic_image_deref_size;
691 break;
692 case ir_intrinsic_image_samples:
693 op = nir_intrinsic_image_deref_samples;
694 break;
695 case ir_intrinsic_ssbo_store:
696 op = nir_intrinsic_store_ssbo;
697 break;
698 case ir_intrinsic_ssbo_load:
699 op = nir_intrinsic_load_ssbo;
700 break;
701 case ir_intrinsic_ssbo_atomic_add:
702 op = ir->return_deref->type->is_integer_32_64()
703 ? nir_intrinsic_ssbo_atomic_add : nir_intrinsic_ssbo_atomic_fadd;
704 break;
705 case ir_intrinsic_ssbo_atomic_and:
706 op = nir_intrinsic_ssbo_atomic_and;
707 break;
708 case ir_intrinsic_ssbo_atomic_or:
709 op = nir_intrinsic_ssbo_atomic_or;
710 break;
711 case ir_intrinsic_ssbo_atomic_xor:
712 op = nir_intrinsic_ssbo_atomic_xor;
713 break;
714 case ir_intrinsic_ssbo_atomic_min:
715 assert(ir->return_deref);
716 if (ir->return_deref->type == glsl_type::int_type)
717 op = nir_intrinsic_ssbo_atomic_imin;
718 else if (ir->return_deref->type == glsl_type::uint_type)
719 op = nir_intrinsic_ssbo_atomic_umin;
720 else if (ir->return_deref->type == glsl_type::float_type)
721 op = nir_intrinsic_ssbo_atomic_fmin;
722 else
723 unreachable("Invalid type");
724 break;
725 case ir_intrinsic_ssbo_atomic_max:
726 assert(ir->return_deref);
727 if (ir->return_deref->type == glsl_type::int_type)
728 op = nir_intrinsic_ssbo_atomic_imax;
729 else if (ir->return_deref->type == glsl_type::uint_type)
730 op = nir_intrinsic_ssbo_atomic_umax;
731 else if (ir->return_deref->type == glsl_type::float_type)
732 op = nir_intrinsic_ssbo_atomic_fmax;
733 else
734 unreachable("Invalid type");
735 break;
736 case ir_intrinsic_ssbo_atomic_exchange:
737 op = nir_intrinsic_ssbo_atomic_exchange;
738 break;
739 case ir_intrinsic_ssbo_atomic_comp_swap:
740 op = ir->return_deref->type->is_integer_32_64()
741 ? nir_intrinsic_ssbo_atomic_comp_swap
742 : nir_intrinsic_ssbo_atomic_fcomp_swap;
743 break;
744 case ir_intrinsic_shader_clock:
745 op = nir_intrinsic_shader_clock;
746 break;
747 case ir_intrinsic_begin_invocation_interlock:
748 op = nir_intrinsic_begin_invocation_interlock;
749 break;
750 case ir_intrinsic_end_invocation_interlock:
751 op = nir_intrinsic_end_invocation_interlock;
752 break;
753 case ir_intrinsic_group_memory_barrier:
754 op = nir_intrinsic_group_memory_barrier;
755 break;
756 case ir_intrinsic_memory_barrier_atomic_counter:
757 op = nir_intrinsic_memory_barrier_atomic_counter;
758 break;
759 case ir_intrinsic_memory_barrier_buffer:
760 op = nir_intrinsic_memory_barrier_buffer;
761 break;
762 case ir_intrinsic_memory_barrier_image:
763 op = nir_intrinsic_memory_barrier_image;
764 break;
765 case ir_intrinsic_memory_barrier_shared:
766 op = nir_intrinsic_memory_barrier_shared;
767 break;
768 case ir_intrinsic_shared_load:
769 op = nir_intrinsic_load_shared;
770 break;
771 case ir_intrinsic_shared_store:
772 op = nir_intrinsic_store_shared;
773 break;
774 case ir_intrinsic_shared_atomic_add:
775 op = ir->return_deref->type->is_integer_32_64()
776 ? nir_intrinsic_shared_atomic_add
777 : nir_intrinsic_shared_atomic_fadd;
778 break;
779 case ir_intrinsic_shared_atomic_and:
780 op = nir_intrinsic_shared_atomic_and;
781 break;
782 case ir_intrinsic_shared_atomic_or:
783 op = nir_intrinsic_shared_atomic_or;
784 break;
785 case ir_intrinsic_shared_atomic_xor:
786 op = nir_intrinsic_shared_atomic_xor;
787 break;
788 case ir_intrinsic_shared_atomic_min:
789 assert(ir->return_deref);
790 if (ir->return_deref->type == glsl_type::int_type)
791 op = nir_intrinsic_shared_atomic_imin;
792 else if (ir->return_deref->type == glsl_type::uint_type)
793 op = nir_intrinsic_shared_atomic_umin;
794 else if (ir->return_deref->type == glsl_type::float_type)
795 op = nir_intrinsic_shared_atomic_fmin;
796 else
797 unreachable("Invalid type");
798 break;
799 case ir_intrinsic_shared_atomic_max:
800 assert(ir->return_deref);
801 if (ir->return_deref->type == glsl_type::int_type)
802 op = nir_intrinsic_shared_atomic_imax;
803 else if (ir->return_deref->type == glsl_type::uint_type)
804 op = nir_intrinsic_shared_atomic_umax;
805 else if (ir->return_deref->type == glsl_type::float_type)
806 op = nir_intrinsic_shared_atomic_fmax;
807 else
808 unreachable("Invalid type");
809 break;
810 case ir_intrinsic_shared_atomic_exchange:
811 op = nir_intrinsic_shared_atomic_exchange;
812 break;
813 case ir_intrinsic_shared_atomic_comp_swap:
814 op = ir->return_deref->type->is_integer_32_64()
815 ? nir_intrinsic_shared_atomic_comp_swap
816 : nir_intrinsic_shared_atomic_fcomp_swap;
817 break;
818 case ir_intrinsic_vote_any:
819 op = nir_intrinsic_vote_any;
820 break;
821 case ir_intrinsic_vote_all:
822 op = nir_intrinsic_vote_all;
823 break;
824 case ir_intrinsic_vote_eq:
825 op = nir_intrinsic_vote_ieq;
826 break;
827 case ir_intrinsic_ballot:
828 op = nir_intrinsic_ballot;
829 break;
830 case ir_intrinsic_read_invocation:
831 op = nir_intrinsic_read_invocation;
832 break;
833 case ir_intrinsic_read_first_invocation:
834 op = nir_intrinsic_read_first_invocation;
835 break;
836 default:
837 unreachable("not reached");
838 }
839
840 nir_intrinsic_instr *instr = nir_intrinsic_instr_create(shader, op);
841 nir_ssa_def *ret = &instr->dest.ssa;
842
843 switch (op) {
844 case nir_intrinsic_atomic_counter_read_deref:
845 case nir_intrinsic_atomic_counter_inc_deref:
846 case nir_intrinsic_atomic_counter_pre_dec_deref:
847 case nir_intrinsic_atomic_counter_add_deref:
848 case nir_intrinsic_atomic_counter_min_deref:
849 case nir_intrinsic_atomic_counter_max_deref:
850 case nir_intrinsic_atomic_counter_and_deref:
851 case nir_intrinsic_atomic_counter_or_deref:
852 case nir_intrinsic_atomic_counter_xor_deref:
853 case nir_intrinsic_atomic_counter_exchange_deref:
854 case nir_intrinsic_atomic_counter_comp_swap_deref: {
855 /* Set the counter variable dereference. */
856 exec_node *param = ir->actual_parameters.get_head();
857 ir_dereference *counter = (ir_dereference *)param;
858
859 instr->src[0] = nir_src_for_ssa(&evaluate_deref(counter)->dest.ssa);
860 param = param->get_next();
861
862 /* Set the intrinsic destination. */
863 if (ir->return_deref) {
864 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 32, NULL);
865 }
866
867 /* Set the intrinsic parameters. */
868 if (!param->is_tail_sentinel()) {
869 instr->src[1] =
870 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
871 param = param->get_next();
872 }
873
874 if (!param->is_tail_sentinel()) {
875 instr->src[2] =
876 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
877 param = param->get_next();
878 }
879
880 nir_builder_instr_insert(&b, &instr->instr);
881 break;
882 }
883 case nir_intrinsic_image_deref_load:
884 case nir_intrinsic_image_deref_store:
885 case nir_intrinsic_image_deref_atomic_add:
886 case nir_intrinsic_image_deref_atomic_min:
887 case nir_intrinsic_image_deref_atomic_max:
888 case nir_intrinsic_image_deref_atomic_and:
889 case nir_intrinsic_image_deref_atomic_or:
890 case nir_intrinsic_image_deref_atomic_xor:
891 case nir_intrinsic_image_deref_atomic_exchange:
892 case nir_intrinsic_image_deref_atomic_comp_swap:
893 case nir_intrinsic_image_deref_atomic_fadd:
894 case nir_intrinsic_image_deref_samples:
895 case nir_intrinsic_image_deref_size: {
896 nir_ssa_undef_instr *instr_undef =
897 nir_ssa_undef_instr_create(shader, 1, 32);
898 nir_builder_instr_insert(&b, &instr_undef->instr);
899
900 /* Set the image variable dereference. */
901 exec_node *param = ir->actual_parameters.get_head();
902 ir_dereference *image = (ir_dereference *)param;
903 const glsl_type *type =
904 image->variable_referenced()->type->without_array();
905
906 instr->src[0] = nir_src_for_ssa(&evaluate_deref(image)->dest.ssa);
907 param = param->get_next();
908
909 /* Set the intrinsic destination. */
910 if (ir->return_deref) {
911 unsigned num_components = ir->return_deref->type->vector_elements;
912 nir_ssa_dest_init(&instr->instr, &instr->dest,
913 num_components, 32, NULL);
914 }
915
916 if (op == nir_intrinsic_image_deref_size) {
917 instr->num_components = instr->dest.ssa.num_components;
918 } else if (op == nir_intrinsic_image_deref_load ||
919 op == nir_intrinsic_image_deref_store) {
920 instr->num_components = 4;
921 }
922
923 if (op == nir_intrinsic_image_deref_size ||
924 op == nir_intrinsic_image_deref_samples) {
925 nir_builder_instr_insert(&b, &instr->instr);
926 break;
927 }
928
929 /* Set the address argument, extending the coordinate vector to four
930 * components.
931 */
932 nir_ssa_def *src_addr =
933 evaluate_rvalue((ir_dereference *)param);
934 nir_ssa_def *srcs[4];
935
936 for (int i = 0; i < 4; i++) {
937 if (i < type->coordinate_components())
938 srcs[i] = nir_channel(&b, src_addr, i);
939 else
940 srcs[i] = &instr_undef->def;
941 }
942
943 instr->src[1] = nir_src_for_ssa(nir_vec(&b, srcs, 4));
944 param = param->get_next();
945
946 /* Set the sample argument, which is undefined for single-sample
947 * images.
948 */
949 if (type->sampler_dimensionality == GLSL_SAMPLER_DIM_MS) {
950 instr->src[2] =
951 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
952 param = param->get_next();
953 } else {
954 instr->src[2] = nir_src_for_ssa(&instr_undef->def);
955 }
956
957 /* Set the intrinsic parameters. */
958 if (!param->is_tail_sentinel()) {
959 instr->src[3] =
960 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
961 param = param->get_next();
962 }
963
964 if (!param->is_tail_sentinel()) {
965 instr->src[4] =
966 nir_src_for_ssa(evaluate_rvalue((ir_dereference *)param));
967 param = param->get_next();
968 }
969 nir_builder_instr_insert(&b, &instr->instr);
970 break;
971 }
972 case nir_intrinsic_memory_barrier:
973 case nir_intrinsic_group_memory_barrier:
974 case nir_intrinsic_memory_barrier_atomic_counter:
975 case nir_intrinsic_memory_barrier_buffer:
976 case nir_intrinsic_memory_barrier_image:
977 case nir_intrinsic_memory_barrier_shared:
978 nir_builder_instr_insert(&b, &instr->instr);
979 break;
980 case nir_intrinsic_shader_clock:
981 nir_ssa_dest_init(&instr->instr, &instr->dest, 2, 32, NULL);
982 instr->num_components = 2;
983 nir_builder_instr_insert(&b, &instr->instr);
984 break;
985 case nir_intrinsic_begin_invocation_interlock:
986 nir_builder_instr_insert(&b, &instr->instr);
987 break;
988 case nir_intrinsic_end_invocation_interlock:
989 nir_builder_instr_insert(&b, &instr->instr);
990 break;
991 case nir_intrinsic_store_ssbo: {
992 exec_node *param = ir->actual_parameters.get_head();
993 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
994
995 param = param->get_next();
996 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
997
998 param = param->get_next();
999 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1000
1001 param = param->get_next();
1002 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1003 assert(write_mask);
1004
1005 nir_ssa_def *nir_val = evaluate_rvalue(val);
1006 if (val->type->is_boolean())
1007 nir_val = nir_b2i32(&b, nir_val);
1008
1009 instr->src[0] = nir_src_for_ssa(nir_val);
1010 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(block));
1011 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(offset));
1012 intrinsic_set_std430_align(instr, val->type);
1013 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1014 instr->num_components = val->type->vector_elements;
1015
1016 nir_builder_instr_insert(&b, &instr->instr);
1017 break;
1018 }
1019 case nir_intrinsic_load_ssbo: {
1020 exec_node *param = ir->actual_parameters.get_head();
1021 ir_rvalue *block = ((ir_instruction *)param)->as_rvalue();
1022
1023 param = param->get_next();
1024 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1025
1026 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(block));
1027 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1028
1029 const glsl_type *type = ir->return_deref->var->type;
1030 instr->num_components = type->vector_elements;
1031 intrinsic_set_std430_align(instr, type);
1032
1033 /* Setup destination register */
1034 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1035 nir_ssa_dest_init(&instr->instr, &instr->dest,
1036 type->vector_elements, bit_size, NULL);
1037
1038 /* Insert the created nir instruction now since in the case of boolean
1039 * result we will need to emit another instruction after it
1040 */
1041 nir_builder_instr_insert(&b, &instr->instr);
1042
1043 /*
1044 * In SSBO/UBO's, a true boolean value is any non-zero value, but we
1045 * consider a true boolean to be ~0. Fix this up with a != 0
1046 * comparison.
1047 */
1048 if (type->is_boolean())
1049 ret = nir_i2b(&b, &instr->dest.ssa);
1050 break;
1051 }
1052 case nir_intrinsic_ssbo_atomic_add:
1053 case nir_intrinsic_ssbo_atomic_imin:
1054 case nir_intrinsic_ssbo_atomic_umin:
1055 case nir_intrinsic_ssbo_atomic_imax:
1056 case nir_intrinsic_ssbo_atomic_umax:
1057 case nir_intrinsic_ssbo_atomic_and:
1058 case nir_intrinsic_ssbo_atomic_or:
1059 case nir_intrinsic_ssbo_atomic_xor:
1060 case nir_intrinsic_ssbo_atomic_exchange:
1061 case nir_intrinsic_ssbo_atomic_comp_swap:
1062 case nir_intrinsic_ssbo_atomic_fadd:
1063 case nir_intrinsic_ssbo_atomic_fmin:
1064 case nir_intrinsic_ssbo_atomic_fmax:
1065 case nir_intrinsic_ssbo_atomic_fcomp_swap: {
1066 int param_count = ir->actual_parameters.length();
1067 assert(param_count == 3 || param_count == 4);
1068
1069 /* Block index */
1070 exec_node *param = ir->actual_parameters.get_head();
1071 ir_instruction *inst = (ir_instruction *) param;
1072 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1073
1074 /* Offset */
1075 param = param->get_next();
1076 inst = (ir_instruction *) param;
1077 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1078
1079 /* data1 parameter (this is always present) */
1080 param = param->get_next();
1081 inst = (ir_instruction *) param;
1082 instr->src[2] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1083
1084 /* data2 parameter (only with atomic_comp_swap) */
1085 if (param_count == 4) {
1086 assert(op == nir_intrinsic_ssbo_atomic_comp_swap ||
1087 op == nir_intrinsic_ssbo_atomic_fcomp_swap);
1088 param = param->get_next();
1089 inst = (ir_instruction *) param;
1090 instr->src[3] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1091 }
1092
1093 /* Atomic result */
1094 assert(ir->return_deref);
1095 nir_ssa_dest_init(&instr->instr, &instr->dest,
1096 ir->return_deref->type->vector_elements, 32, NULL);
1097 nir_builder_instr_insert(&b, &instr->instr);
1098 break;
1099 }
1100 case nir_intrinsic_load_shared: {
1101 exec_node *param = ir->actual_parameters.get_head();
1102 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1103
1104 nir_intrinsic_set_base(instr, 0);
1105 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(offset));
1106
1107 const glsl_type *type = ir->return_deref->var->type;
1108 instr->num_components = type->vector_elements;
1109 intrinsic_set_std430_align(instr, type);
1110
1111 /* Setup destination register */
1112 unsigned bit_size = type->is_boolean() ? 32 : glsl_get_bit_size(type);
1113 nir_ssa_dest_init(&instr->instr, &instr->dest,
1114 type->vector_elements, bit_size, NULL);
1115
1116 nir_builder_instr_insert(&b, &instr->instr);
1117
1118 /* The value in shared memory is a 32-bit value */
1119 if (type->is_boolean())
1120 ret = nir_i2b(&b, &instr->dest.ssa);
1121 break;
1122 }
1123 case nir_intrinsic_store_shared: {
1124 exec_node *param = ir->actual_parameters.get_head();
1125 ir_rvalue *offset = ((ir_instruction *)param)->as_rvalue();
1126
1127 param = param->get_next();
1128 ir_rvalue *val = ((ir_instruction *)param)->as_rvalue();
1129
1130 param = param->get_next();
1131 ir_constant *write_mask = ((ir_instruction *)param)->as_constant();
1132 assert(write_mask);
1133
1134 nir_intrinsic_set_base(instr, 0);
1135 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(offset));
1136
1137 nir_intrinsic_set_write_mask(instr, write_mask->value.u[0]);
1138
1139 nir_ssa_def *nir_val = evaluate_rvalue(val);
1140 /* The value in shared memory is a 32-bit value */
1141 if (val->type->is_boolean())
1142 nir_val = nir_b2i32(&b, nir_val);
1143
1144 instr->src[0] = nir_src_for_ssa(nir_val);
1145 instr->num_components = val->type->vector_elements;
1146 intrinsic_set_std430_align(instr, val->type);
1147
1148 nir_builder_instr_insert(&b, &instr->instr);
1149 break;
1150 }
1151 case nir_intrinsic_shared_atomic_add:
1152 case nir_intrinsic_shared_atomic_imin:
1153 case nir_intrinsic_shared_atomic_umin:
1154 case nir_intrinsic_shared_atomic_imax:
1155 case nir_intrinsic_shared_atomic_umax:
1156 case nir_intrinsic_shared_atomic_and:
1157 case nir_intrinsic_shared_atomic_or:
1158 case nir_intrinsic_shared_atomic_xor:
1159 case nir_intrinsic_shared_atomic_exchange:
1160 case nir_intrinsic_shared_atomic_comp_swap:
1161 case nir_intrinsic_shared_atomic_fadd:
1162 case nir_intrinsic_shared_atomic_fmin:
1163 case nir_intrinsic_shared_atomic_fmax:
1164 case nir_intrinsic_shared_atomic_fcomp_swap: {
1165 int param_count = ir->actual_parameters.length();
1166 assert(param_count == 2 || param_count == 3);
1167
1168 /* Offset */
1169 exec_node *param = ir->actual_parameters.get_head();
1170 ir_instruction *inst = (ir_instruction *) param;
1171 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1172
1173 /* data1 parameter (this is always present) */
1174 param = param->get_next();
1175 inst = (ir_instruction *) param;
1176 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1177
1178 /* data2 parameter (only with atomic_comp_swap) */
1179 if (param_count == 3) {
1180 assert(op == nir_intrinsic_shared_atomic_comp_swap ||
1181 op == nir_intrinsic_shared_atomic_fcomp_swap);
1182 param = param->get_next();
1183 inst = (ir_instruction *) param;
1184 instr->src[2] =
1185 nir_src_for_ssa(evaluate_rvalue(inst->as_rvalue()));
1186 }
1187
1188 /* Atomic result */
1189 assert(ir->return_deref);
1190 unsigned bit_size = glsl_get_bit_size(ir->return_deref->type);
1191 nir_ssa_dest_init(&instr->instr, &instr->dest,
1192 ir->return_deref->type->vector_elements,
1193 bit_size, NULL);
1194 nir_builder_instr_insert(&b, &instr->instr);
1195 break;
1196 }
1197 case nir_intrinsic_vote_any:
1198 case nir_intrinsic_vote_all:
1199 case nir_intrinsic_vote_ieq: {
1200 nir_ssa_dest_init(&instr->instr, &instr->dest, 1, 1, NULL);
1201 instr->num_components = 1;
1202
1203 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1204 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1205
1206 nir_builder_instr_insert(&b, &instr->instr);
1207 break;
1208 }
1209
1210 case nir_intrinsic_ballot: {
1211 nir_ssa_dest_init(&instr->instr, &instr->dest,
1212 ir->return_deref->type->vector_elements, 64, NULL);
1213 instr->num_components = ir->return_deref->type->vector_elements;
1214
1215 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1216 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1217
1218 nir_builder_instr_insert(&b, &instr->instr);
1219 break;
1220 }
1221 case nir_intrinsic_read_invocation: {
1222 nir_ssa_dest_init(&instr->instr, &instr->dest,
1223 ir->return_deref->type->vector_elements, 32, NULL);
1224 instr->num_components = ir->return_deref->type->vector_elements;
1225
1226 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1227 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1228
1229 ir_rvalue *invocation = (ir_rvalue *) ir->actual_parameters.get_head()->next;
1230 instr->src[1] = nir_src_for_ssa(evaluate_rvalue(invocation));
1231
1232 nir_builder_instr_insert(&b, &instr->instr);
1233 break;
1234 }
1235 case nir_intrinsic_read_first_invocation: {
1236 nir_ssa_dest_init(&instr->instr, &instr->dest,
1237 ir->return_deref->type->vector_elements, 32, NULL);
1238 instr->num_components = ir->return_deref->type->vector_elements;
1239
1240 ir_rvalue *value = (ir_rvalue *) ir->actual_parameters.get_head();
1241 instr->src[0] = nir_src_for_ssa(evaluate_rvalue(value));
1242
1243 nir_builder_instr_insert(&b, &instr->instr);
1244 break;
1245 }
1246 default:
1247 unreachable("not reached");
1248 }
1249
1250 if (ir->return_deref)
1251 nir_store_deref(&b, evaluate_deref(ir->return_deref), ret, ~0);
1252
1253 return;
1254 }
1255
1256 unreachable("glsl_to_nir only handles function calls to intrinsics");
1257 }
1258
1259 void
1260 nir_visitor::visit(ir_assignment *ir)
1261 {
1262 unsigned num_components = ir->lhs->type->vector_elements;
1263
1264 b.exact = ir->lhs->variable_referenced()->data.invariant ||
1265 ir->lhs->variable_referenced()->data.precise;
1266
1267 if ((ir->rhs->as_dereference() || ir->rhs->as_constant()) &&
1268 (ir->write_mask == (1 << num_components) - 1 || ir->write_mask == 0)) {
1269 if (ir->condition) {
1270 nir_push_if(&b, evaluate_rvalue(ir->condition));
1271 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1272 nir_pop_if(&b, NULL);
1273 } else {
1274 nir_copy_deref(&b, evaluate_deref(ir->lhs), evaluate_deref(ir->rhs));
1275 }
1276 return;
1277 }
1278
1279 assert(ir->rhs->type->is_scalar() || ir->rhs->type->is_vector());
1280
1281 ir->lhs->accept(this);
1282 nir_deref_instr *lhs_deref = this->deref;
1283 nir_ssa_def *src = evaluate_rvalue(ir->rhs);
1284
1285 if (ir->write_mask != (1 << num_components) - 1 && ir->write_mask != 0) {
1286 /* GLSL IR will give us the input to the write-masked assignment in a
1287 * single packed vector. So, for example, if the writemask is xzw, then
1288 * we have to swizzle x -> x, y -> z, and z -> w and get the y component
1289 * from the load.
1290 */
1291 unsigned swiz[4];
1292 unsigned component = 0;
1293 for (unsigned i = 0; i < 4; i++) {
1294 swiz[i] = ir->write_mask & (1 << i) ? component++ : 0;
1295 }
1296 src = nir_swizzle(&b, src, swiz, num_components, !supports_ints);
1297 }
1298
1299 if (ir->condition) {
1300 nir_push_if(&b, evaluate_rvalue(ir->condition));
1301 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1302 nir_pop_if(&b, NULL);
1303 } else {
1304 nir_store_deref(&b, lhs_deref, src, ir->write_mask);
1305 }
1306 }
1307
1308 /*
1309 * Given an instruction, returns a pointer to its destination or NULL if there
1310 * is no destination.
1311 *
1312 * Note that this only handles instructions we generate at this level.
1313 */
1314 static nir_dest *
1315 get_instr_dest(nir_instr *instr)
1316 {
1317 nir_alu_instr *alu_instr;
1318 nir_intrinsic_instr *intrinsic_instr;
1319 nir_tex_instr *tex_instr;
1320
1321 switch (instr->type) {
1322 case nir_instr_type_alu:
1323 alu_instr = nir_instr_as_alu(instr);
1324 return &alu_instr->dest.dest;
1325
1326 case nir_instr_type_intrinsic:
1327 intrinsic_instr = nir_instr_as_intrinsic(instr);
1328 if (nir_intrinsic_infos[intrinsic_instr->intrinsic].has_dest)
1329 return &intrinsic_instr->dest;
1330 else
1331 return NULL;
1332
1333 case nir_instr_type_tex:
1334 tex_instr = nir_instr_as_tex(instr);
1335 return &tex_instr->dest;
1336
1337 default:
1338 unreachable("not reached");
1339 }
1340
1341 return NULL;
1342 }
1343
1344 void
1345 nir_visitor::add_instr(nir_instr *instr, unsigned num_components,
1346 unsigned bit_size)
1347 {
1348 nir_dest *dest = get_instr_dest(instr);
1349
1350 if (dest)
1351 nir_ssa_dest_init(instr, dest, num_components, bit_size, NULL);
1352
1353 nir_builder_instr_insert(&b, instr);
1354
1355 if (dest) {
1356 assert(dest->is_ssa);
1357 this->result = &dest->ssa;
1358 }
1359 }
1360
1361 nir_ssa_def *
1362 nir_visitor::evaluate_rvalue(ir_rvalue* ir)
1363 {
1364 ir->accept(this);
1365 if (ir->as_dereference() || ir->as_constant()) {
1366 /*
1367 * A dereference is being used on the right hand side, which means we
1368 * must emit a variable load.
1369 */
1370
1371 this->result = nir_load_deref(&b, this->deref);
1372 }
1373
1374 return this->result;
1375 }
1376
1377 static bool
1378 type_is_float(glsl_base_type type)
1379 {
1380 return type == GLSL_TYPE_FLOAT || type == GLSL_TYPE_DOUBLE ||
1381 type == GLSL_TYPE_FLOAT16;
1382 }
1383
1384 static bool
1385 type_is_signed(glsl_base_type type)
1386 {
1387 return type == GLSL_TYPE_INT || type == GLSL_TYPE_INT64 ||
1388 type == GLSL_TYPE_INT16;
1389 }
1390
1391 void
1392 nir_visitor::visit(ir_expression *ir)
1393 {
1394 /* Some special cases */
1395 switch (ir->operation) {
1396 case ir_binop_ubo_load: {
1397 nir_intrinsic_instr *load =
1398 nir_intrinsic_instr_create(this->shader, nir_intrinsic_load_ubo);
1399 unsigned bit_size = ir->type->is_boolean() ? 32 :
1400 glsl_get_bit_size(ir->type);
1401 load->num_components = ir->type->vector_elements;
1402 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1403 load->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1404 intrinsic_set_std430_align(load, ir->type);
1405 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1406
1407 /*
1408 * In UBO's, a true boolean value is any non-zero value, but we consider
1409 * a true boolean to be ~0. Fix this up with a != 0 comparison.
1410 */
1411
1412 if (ir->type->is_boolean())
1413 this->result = nir_i2b(&b, &load->dest.ssa);
1414
1415 return;
1416 }
1417
1418 case ir_unop_interpolate_at_centroid:
1419 case ir_binop_interpolate_at_offset:
1420 case ir_binop_interpolate_at_sample: {
1421 ir_dereference *deref = ir->operands[0]->as_dereference();
1422 ir_swizzle *swizzle = NULL;
1423 if (!deref) {
1424 /* the api does not allow a swizzle here, but the varying packing code
1425 * may have pushed one into here.
1426 */
1427 swizzle = ir->operands[0]->as_swizzle();
1428 assert(swizzle);
1429 deref = swizzle->val->as_dereference();
1430 assert(deref);
1431 }
1432
1433 deref->accept(this);
1434
1435 nir_intrinsic_op op;
1436 if (this->deref->mode == nir_var_shader_in) {
1437 switch (ir->operation) {
1438 case ir_unop_interpolate_at_centroid:
1439 op = nir_intrinsic_interp_deref_at_centroid;
1440 break;
1441 case ir_binop_interpolate_at_offset:
1442 op = nir_intrinsic_interp_deref_at_offset;
1443 break;
1444 case ir_binop_interpolate_at_sample:
1445 op = nir_intrinsic_interp_deref_at_sample;
1446 break;
1447 default:
1448 unreachable("Invalid interpolation intrinsic");
1449 }
1450 } else {
1451 /* This case can happen if the vertex shader does not write the
1452 * given varying. In this case, the linker will lower it to a
1453 * global variable. Since interpolating a variable makes no
1454 * sense, we'll just turn it into a load which will probably
1455 * eventually end up as an SSA definition.
1456 */
1457 assert(this->deref->mode == nir_var_private);
1458 op = nir_intrinsic_load_deref;
1459 }
1460
1461 nir_intrinsic_instr *intrin = nir_intrinsic_instr_create(shader, op);
1462 intrin->num_components = deref->type->vector_elements;
1463 intrin->src[0] = nir_src_for_ssa(&this->deref->dest.ssa);
1464
1465 if (intrin->intrinsic == nir_intrinsic_interp_deref_at_offset ||
1466 intrin->intrinsic == nir_intrinsic_interp_deref_at_sample)
1467 intrin->src[1] = nir_src_for_ssa(evaluate_rvalue(ir->operands[1]));
1468
1469 unsigned bit_size = glsl_get_bit_size(deref->type);
1470 add_instr(&intrin->instr, deref->type->vector_elements, bit_size);
1471
1472 if (swizzle) {
1473 unsigned swiz[4] = {
1474 swizzle->mask.x, swizzle->mask.y, swizzle->mask.z, swizzle->mask.w
1475 };
1476
1477 result = nir_swizzle(&b, result, swiz,
1478 swizzle->type->vector_elements, false);
1479 }
1480
1481 return;
1482 }
1483
1484 default:
1485 break;
1486 }
1487
1488 nir_ssa_def *srcs[4];
1489 for (unsigned i = 0; i < ir->num_operands; i++)
1490 srcs[i] = evaluate_rvalue(ir->operands[i]);
1491
1492 glsl_base_type types[4];
1493 for (unsigned i = 0; i < ir->num_operands; i++)
1494 if (supports_ints)
1495 types[i] = ir->operands[i]->type->base_type;
1496 else
1497 types[i] = GLSL_TYPE_FLOAT;
1498
1499 glsl_base_type out_type;
1500 if (supports_ints)
1501 out_type = ir->type->base_type;
1502 else
1503 out_type = GLSL_TYPE_FLOAT;
1504
1505 switch (ir->operation) {
1506 case ir_unop_bit_not: result = nir_inot(&b, srcs[0]); break;
1507 case ir_unop_logic_not:
1508 result = supports_ints ? nir_inot(&b, srcs[0]) : nir_fnot(&b, srcs[0]);
1509 break;
1510 case ir_unop_neg:
1511 result = type_is_float(types[0]) ? nir_fneg(&b, srcs[0])
1512 : nir_ineg(&b, srcs[0]);
1513 break;
1514 case ir_unop_abs:
1515 result = type_is_float(types[0]) ? nir_fabs(&b, srcs[0])
1516 : nir_iabs(&b, srcs[0]);
1517 break;
1518 case ir_unop_saturate:
1519 assert(type_is_float(types[0]));
1520 result = nir_fsat(&b, srcs[0]);
1521 break;
1522 case ir_unop_sign:
1523 result = type_is_float(types[0]) ? nir_fsign(&b, srcs[0])
1524 : nir_isign(&b, srcs[0]);
1525 break;
1526 case ir_unop_rcp: result = nir_frcp(&b, srcs[0]); break;
1527 case ir_unop_rsq: result = nir_frsq(&b, srcs[0]); break;
1528 case ir_unop_sqrt: result = nir_fsqrt(&b, srcs[0]); break;
1529 case ir_unop_exp: unreachable("ir_unop_exp should have been lowered");
1530 case ir_unop_log: unreachable("ir_unop_log should have been lowered");
1531 case ir_unop_exp2: result = nir_fexp2(&b, srcs[0]); break;
1532 case ir_unop_log2: result = nir_flog2(&b, srcs[0]); break;
1533 case ir_unop_i2f:
1534 result = supports_ints ? nir_i2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1535 break;
1536 case ir_unop_u2f:
1537 result = supports_ints ? nir_u2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1538 break;
1539 case ir_unop_b2f:
1540 result = supports_ints ? nir_b2f32(&b, srcs[0]) : nir_fmov(&b, srcs[0]);
1541 break;
1542 case ir_unop_f2i:
1543 case ir_unop_f2u:
1544 case ir_unop_f2b:
1545 case ir_unop_i2b:
1546 case ir_unop_b2i:
1547 case ir_unop_b2i64:
1548 case ir_unop_d2f:
1549 case ir_unop_f2d:
1550 case ir_unop_d2i:
1551 case ir_unop_d2u:
1552 case ir_unop_d2b:
1553 case ir_unop_i2d:
1554 case ir_unop_u2d:
1555 case ir_unop_i642i:
1556 case ir_unop_i642u:
1557 case ir_unop_i642f:
1558 case ir_unop_i642b:
1559 case ir_unop_i642d:
1560 case ir_unop_u642i:
1561 case ir_unop_u642u:
1562 case ir_unop_u642f:
1563 case ir_unop_u642d:
1564 case ir_unop_i2i64:
1565 case ir_unop_u2i64:
1566 case ir_unop_f2i64:
1567 case ir_unop_d2i64:
1568 case ir_unop_i2u64:
1569 case ir_unop_u2u64:
1570 case ir_unop_f2u64:
1571 case ir_unop_d2u64:
1572 case ir_unop_i2u:
1573 case ir_unop_u2i:
1574 case ir_unop_i642u64:
1575 case ir_unop_u642i64: {
1576 nir_alu_type src_type = nir_get_nir_type_for_glsl_base_type(types[0]);
1577 nir_alu_type dst_type = nir_get_nir_type_for_glsl_base_type(out_type);
1578 result = nir_build_alu(&b, nir_type_conversion_op(src_type, dst_type,
1579 nir_rounding_mode_undef),
1580 srcs[0], NULL, NULL, NULL);
1581 /* b2i and b2f don't have fixed bit-size versions so the builder will
1582 * just assume 32 and we have to fix it up here.
1583 */
1584 result->bit_size = nir_alu_type_get_type_size(dst_type);
1585 break;
1586 }
1587
1588 case ir_unop_bitcast_i2f:
1589 case ir_unop_bitcast_f2i:
1590 case ir_unop_bitcast_u2f:
1591 case ir_unop_bitcast_f2u:
1592 case ir_unop_bitcast_i642d:
1593 case ir_unop_bitcast_d2i64:
1594 case ir_unop_bitcast_u642d:
1595 case ir_unop_bitcast_d2u64:
1596 case ir_unop_subroutine_to_int:
1597 /* no-op */
1598 result = nir_imov(&b, srcs[0]);
1599 break;
1600 case ir_unop_trunc: result = nir_ftrunc(&b, srcs[0]); break;
1601 case ir_unop_ceil: result = nir_fceil(&b, srcs[0]); break;
1602 case ir_unop_floor: result = nir_ffloor(&b, srcs[0]); break;
1603 case ir_unop_fract: result = nir_ffract(&b, srcs[0]); break;
1604 case ir_unop_frexp_exp: result = nir_frexp_exp(&b, srcs[0]); break;
1605 case ir_unop_frexp_sig: result = nir_frexp_sig(&b, srcs[0]); break;
1606 case ir_unop_round_even: result = nir_fround_even(&b, srcs[0]); break;
1607 case ir_unop_sin: result = nir_fsin(&b, srcs[0]); break;
1608 case ir_unop_cos: result = nir_fcos(&b, srcs[0]); break;
1609 case ir_unop_dFdx: result = nir_fddx(&b, srcs[0]); break;
1610 case ir_unop_dFdy: result = nir_fddy(&b, srcs[0]); break;
1611 case ir_unop_dFdx_fine: result = nir_fddx_fine(&b, srcs[0]); break;
1612 case ir_unop_dFdy_fine: result = nir_fddy_fine(&b, srcs[0]); break;
1613 case ir_unop_dFdx_coarse: result = nir_fddx_coarse(&b, srcs[0]); break;
1614 case ir_unop_dFdy_coarse: result = nir_fddy_coarse(&b, srcs[0]); break;
1615 case ir_unop_pack_snorm_2x16:
1616 result = nir_pack_snorm_2x16(&b, srcs[0]);
1617 break;
1618 case ir_unop_pack_snorm_4x8:
1619 result = nir_pack_snorm_4x8(&b, srcs[0]);
1620 break;
1621 case ir_unop_pack_unorm_2x16:
1622 result = nir_pack_unorm_2x16(&b, srcs[0]);
1623 break;
1624 case ir_unop_pack_unorm_4x8:
1625 result = nir_pack_unorm_4x8(&b, srcs[0]);
1626 break;
1627 case ir_unop_pack_half_2x16:
1628 result = nir_pack_half_2x16(&b, srcs[0]);
1629 break;
1630 case ir_unop_unpack_snorm_2x16:
1631 result = nir_unpack_snorm_2x16(&b, srcs[0]);
1632 break;
1633 case ir_unop_unpack_snorm_4x8:
1634 result = nir_unpack_snorm_4x8(&b, srcs[0]);
1635 break;
1636 case ir_unop_unpack_unorm_2x16:
1637 result = nir_unpack_unorm_2x16(&b, srcs[0]);
1638 break;
1639 case ir_unop_unpack_unorm_4x8:
1640 result = nir_unpack_unorm_4x8(&b, srcs[0]);
1641 break;
1642 case ir_unop_unpack_half_2x16:
1643 result = nir_unpack_half_2x16(&b, srcs[0]);
1644 break;
1645 case ir_unop_pack_sampler_2x32:
1646 case ir_unop_pack_image_2x32:
1647 case ir_unop_pack_double_2x32:
1648 case ir_unop_pack_int_2x32:
1649 case ir_unop_pack_uint_2x32:
1650 result = nir_pack_64_2x32(&b, srcs[0]);
1651 break;
1652 case ir_unop_unpack_sampler_2x32:
1653 case ir_unop_unpack_image_2x32:
1654 case ir_unop_unpack_double_2x32:
1655 case ir_unop_unpack_int_2x32:
1656 case ir_unop_unpack_uint_2x32:
1657 result = nir_unpack_64_2x32(&b, srcs[0]);
1658 break;
1659 case ir_unop_bitfield_reverse:
1660 result = nir_bitfield_reverse(&b, srcs[0]);
1661 break;
1662 case ir_unop_bit_count:
1663 result = nir_bit_count(&b, srcs[0]);
1664 break;
1665 case ir_unop_find_msb:
1666 switch (types[0]) {
1667 case GLSL_TYPE_UINT:
1668 result = nir_ufind_msb(&b, srcs[0]);
1669 break;
1670 case GLSL_TYPE_INT:
1671 result = nir_ifind_msb(&b, srcs[0]);
1672 break;
1673 default:
1674 unreachable("Invalid type for findMSB()");
1675 }
1676 break;
1677 case ir_unop_find_lsb:
1678 result = nir_find_lsb(&b, srcs[0]);
1679 break;
1680
1681 case ir_unop_noise:
1682 switch (ir->type->vector_elements) {
1683 case 1:
1684 switch (ir->operands[0]->type->vector_elements) {
1685 case 1: result = nir_fnoise1_1(&b, srcs[0]); break;
1686 case 2: result = nir_fnoise1_2(&b, srcs[0]); break;
1687 case 3: result = nir_fnoise1_3(&b, srcs[0]); break;
1688 case 4: result = nir_fnoise1_4(&b, srcs[0]); break;
1689 default: unreachable("not reached");
1690 }
1691 break;
1692 case 2:
1693 switch (ir->operands[0]->type->vector_elements) {
1694 case 1: result = nir_fnoise2_1(&b, srcs[0]); break;
1695 case 2: result = nir_fnoise2_2(&b, srcs[0]); break;
1696 case 3: result = nir_fnoise2_3(&b, srcs[0]); break;
1697 case 4: result = nir_fnoise2_4(&b, srcs[0]); break;
1698 default: unreachable("not reached");
1699 }
1700 break;
1701 case 3:
1702 switch (ir->operands[0]->type->vector_elements) {
1703 case 1: result = nir_fnoise3_1(&b, srcs[0]); break;
1704 case 2: result = nir_fnoise3_2(&b, srcs[0]); break;
1705 case 3: result = nir_fnoise3_3(&b, srcs[0]); break;
1706 case 4: result = nir_fnoise3_4(&b, srcs[0]); break;
1707 default: unreachable("not reached");
1708 }
1709 break;
1710 case 4:
1711 switch (ir->operands[0]->type->vector_elements) {
1712 case 1: result = nir_fnoise4_1(&b, srcs[0]); break;
1713 case 2: result = nir_fnoise4_2(&b, srcs[0]); break;
1714 case 3: result = nir_fnoise4_3(&b, srcs[0]); break;
1715 case 4: result = nir_fnoise4_4(&b, srcs[0]); break;
1716 default: unreachable("not reached");
1717 }
1718 break;
1719 default:
1720 unreachable("not reached");
1721 }
1722 break;
1723 case ir_unop_get_buffer_size: {
1724 nir_intrinsic_instr *load = nir_intrinsic_instr_create(
1725 this->shader,
1726 nir_intrinsic_get_buffer_size);
1727 load->num_components = ir->type->vector_elements;
1728 load->src[0] = nir_src_for_ssa(evaluate_rvalue(ir->operands[0]));
1729 unsigned bit_size = glsl_get_bit_size(ir->type);
1730 add_instr(&load->instr, ir->type->vector_elements, bit_size);
1731 return;
1732 }
1733
1734 case ir_binop_add:
1735 result = type_is_float(out_type) ? nir_fadd(&b, srcs[0], srcs[1])
1736 : nir_iadd(&b, srcs[0], srcs[1]);
1737 break;
1738 case ir_binop_sub:
1739 result = type_is_float(out_type) ? nir_fsub(&b, srcs[0], srcs[1])
1740 : nir_isub(&b, srcs[0], srcs[1]);
1741 break;
1742 case ir_binop_mul:
1743 result = type_is_float(out_type) ? nir_fmul(&b, srcs[0], srcs[1])
1744 : nir_imul(&b, srcs[0], srcs[1]);
1745 break;
1746 case ir_binop_div:
1747 if (type_is_float(out_type))
1748 result = nir_fdiv(&b, srcs[0], srcs[1]);
1749 else if (type_is_signed(out_type))
1750 result = nir_idiv(&b, srcs[0], srcs[1]);
1751 else
1752 result = nir_udiv(&b, srcs[0], srcs[1]);
1753 break;
1754 case ir_binop_mod:
1755 result = type_is_float(out_type) ? nir_fmod(&b, srcs[0], srcs[1])
1756 : nir_umod(&b, srcs[0], srcs[1]);
1757 break;
1758 case ir_binop_min:
1759 if (type_is_float(out_type))
1760 result = nir_fmin(&b, srcs[0], srcs[1]);
1761 else if (type_is_signed(out_type))
1762 result = nir_imin(&b, srcs[0], srcs[1]);
1763 else
1764 result = nir_umin(&b, srcs[0], srcs[1]);
1765 break;
1766 case ir_binop_max:
1767 if (type_is_float(out_type))
1768 result = nir_fmax(&b, srcs[0], srcs[1]);
1769 else if (type_is_signed(out_type))
1770 result = nir_imax(&b, srcs[0], srcs[1]);
1771 else
1772 result = nir_umax(&b, srcs[0], srcs[1]);
1773 break;
1774 case ir_binop_pow: result = nir_fpow(&b, srcs[0], srcs[1]); break;
1775 case ir_binop_bit_and: result = nir_iand(&b, srcs[0], srcs[1]); break;
1776 case ir_binop_bit_or: result = nir_ior(&b, srcs[0], srcs[1]); break;
1777 case ir_binop_bit_xor: result = nir_ixor(&b, srcs[0], srcs[1]); break;
1778 case ir_binop_logic_and:
1779 result = supports_ints ? nir_iand(&b, srcs[0], srcs[1])
1780 : nir_fand(&b, srcs[0], srcs[1]);
1781 break;
1782 case ir_binop_logic_or:
1783 result = supports_ints ? nir_ior(&b, srcs[0], srcs[1])
1784 : nir_for(&b, srcs[0], srcs[1]);
1785 break;
1786 case ir_binop_logic_xor:
1787 result = supports_ints ? nir_ixor(&b, srcs[0], srcs[1])
1788 : nir_fxor(&b, srcs[0], srcs[1]);
1789 break;
1790 case ir_binop_lshift: result = nir_ishl(&b, srcs[0], srcs[1]); break;
1791 case ir_binop_rshift:
1792 result = (type_is_signed(out_type)) ? nir_ishr(&b, srcs[0], srcs[1])
1793 : nir_ushr(&b, srcs[0], srcs[1]);
1794 break;
1795 case ir_binop_imul_high:
1796 result = (out_type == GLSL_TYPE_INT) ? nir_imul_high(&b, srcs[0], srcs[1])
1797 : nir_umul_high(&b, srcs[0], srcs[1]);
1798 break;
1799 case ir_binop_carry: result = nir_uadd_carry(&b, srcs[0], srcs[1]); break;
1800 case ir_binop_borrow: result = nir_usub_borrow(&b, srcs[0], srcs[1]); break;
1801 case ir_binop_less:
1802 if (supports_ints) {
1803 if (type_is_float(types[0]))
1804 result = nir_flt(&b, srcs[0], srcs[1]);
1805 else if (type_is_signed(types[0]))
1806 result = nir_ilt(&b, srcs[0], srcs[1]);
1807 else
1808 result = nir_ult(&b, srcs[0], srcs[1]);
1809 } else {
1810 result = nir_slt(&b, srcs[0], srcs[1]);
1811 }
1812 break;
1813 case ir_binop_gequal:
1814 if (supports_ints) {
1815 if (type_is_float(types[0]))
1816 result = nir_fge(&b, srcs[0], srcs[1]);
1817 else if (type_is_signed(types[0]))
1818 result = nir_ige(&b, srcs[0], srcs[1]);
1819 else
1820 result = nir_uge(&b, srcs[0], srcs[1]);
1821 } else {
1822 result = nir_sge(&b, srcs[0], srcs[1]);
1823 }
1824 break;
1825 case ir_binop_equal:
1826 if (supports_ints) {
1827 if (type_is_float(types[0]))
1828 result = nir_feq(&b, srcs[0], srcs[1]);
1829 else
1830 result = nir_ieq(&b, srcs[0], srcs[1]);
1831 } else {
1832 result = nir_seq(&b, srcs[0], srcs[1]);
1833 }
1834 break;
1835 case ir_binop_nequal:
1836 if (supports_ints) {
1837 if (type_is_float(types[0]))
1838 result = nir_fne(&b, srcs[0], srcs[1]);
1839 else
1840 result = nir_ine(&b, srcs[0], srcs[1]);
1841 } else {
1842 result = nir_sne(&b, srcs[0], srcs[1]);
1843 }
1844 break;
1845 case ir_binop_all_equal:
1846 if (supports_ints) {
1847 if (type_is_float(types[0])) {
1848 switch (ir->operands[0]->type->vector_elements) {
1849 case 1: result = nir_feq(&b, srcs[0], srcs[1]); break;
1850 case 2: result = nir_ball_fequal2(&b, srcs[0], srcs[1]); break;
1851 case 3: result = nir_ball_fequal3(&b, srcs[0], srcs[1]); break;
1852 case 4: result = nir_ball_fequal4(&b, srcs[0], srcs[1]); break;
1853 default:
1854 unreachable("not reached");
1855 }
1856 } else {
1857 switch (ir->operands[0]->type->vector_elements) {
1858 case 1: result = nir_ieq(&b, srcs[0], srcs[1]); break;
1859 case 2: result = nir_ball_iequal2(&b, srcs[0], srcs[1]); break;
1860 case 3: result = nir_ball_iequal3(&b, srcs[0], srcs[1]); break;
1861 case 4: result = nir_ball_iequal4(&b, srcs[0], srcs[1]); break;
1862 default:
1863 unreachable("not reached");
1864 }
1865 }
1866 } else {
1867 switch (ir->operands[0]->type->vector_elements) {
1868 case 1: result = nir_seq(&b, srcs[0], srcs[1]); break;
1869 case 2: result = nir_fall_equal2(&b, srcs[0], srcs[1]); break;
1870 case 3: result = nir_fall_equal3(&b, srcs[0], srcs[1]); break;
1871 case 4: result = nir_fall_equal4(&b, srcs[0], srcs[1]); break;
1872 default:
1873 unreachable("not reached");
1874 }
1875 }
1876 break;
1877 case ir_binop_any_nequal:
1878 if (supports_ints) {
1879 if (type_is_float(types[0])) {
1880 switch (ir->operands[0]->type->vector_elements) {
1881 case 1: result = nir_fne(&b, srcs[0], srcs[1]); break;
1882 case 2: result = nir_bany_fnequal2(&b, srcs[0], srcs[1]); break;
1883 case 3: result = nir_bany_fnequal3(&b, srcs[0], srcs[1]); break;
1884 case 4: result = nir_bany_fnequal4(&b, srcs[0], srcs[1]); break;
1885 default:
1886 unreachable("not reached");
1887 }
1888 } else {
1889 switch (ir->operands[0]->type->vector_elements) {
1890 case 1: result = nir_ine(&b, srcs[0], srcs[1]); break;
1891 case 2: result = nir_bany_inequal2(&b, srcs[0], srcs[1]); break;
1892 case 3: result = nir_bany_inequal3(&b, srcs[0], srcs[1]); break;
1893 case 4: result = nir_bany_inequal4(&b, srcs[0], srcs[1]); break;
1894 default:
1895 unreachable("not reached");
1896 }
1897 }
1898 } else {
1899 switch (ir->operands[0]->type->vector_elements) {
1900 case 1: result = nir_sne(&b, srcs[0], srcs[1]); break;
1901 case 2: result = nir_fany_nequal2(&b, srcs[0], srcs[1]); break;
1902 case 3: result = nir_fany_nequal3(&b, srcs[0], srcs[1]); break;
1903 case 4: result = nir_fany_nequal4(&b, srcs[0], srcs[1]); break;
1904 default:
1905 unreachable("not reached");
1906 }
1907 }
1908 break;
1909 case ir_binop_dot:
1910 switch (ir->operands[0]->type->vector_elements) {
1911 case 2: result = nir_fdot2(&b, srcs[0], srcs[1]); break;
1912 case 3: result = nir_fdot3(&b, srcs[0], srcs[1]); break;
1913 case 4: result = nir_fdot4(&b, srcs[0], srcs[1]); break;
1914 default:
1915 unreachable("not reached");
1916 }
1917 break;
1918 case ir_binop_vector_extract: {
1919 result = nir_channel(&b, srcs[0], 0);
1920 for (unsigned i = 1; i < ir->operands[0]->type->vector_elements; i++) {
1921 nir_ssa_def *swizzled = nir_channel(&b, srcs[0], i);
1922 result = nir_bcsel(&b, nir_ieq(&b, srcs[1], nir_imm_int(&b, i)),
1923 swizzled, result);
1924 }
1925 break;
1926 }
1927
1928 case ir_binop_ldexp: result = nir_ldexp(&b, srcs[0], srcs[1]); break;
1929 case ir_triop_fma:
1930 result = nir_ffma(&b, srcs[0], srcs[1], srcs[2]);
1931 break;
1932 case ir_triop_lrp:
1933 result = nir_flrp(&b, srcs[0], srcs[1], srcs[2]);
1934 break;
1935 case ir_triop_csel:
1936 if (supports_ints)
1937 result = nir_bcsel(&b, srcs[0], srcs[1], srcs[2]);
1938 else
1939 result = nir_fcsel(&b, srcs[0], srcs[1], srcs[2]);
1940 break;
1941 case ir_triop_bitfield_extract:
1942 result = (out_type == GLSL_TYPE_INT) ?
1943 nir_ibitfield_extract(&b, srcs[0], srcs[1], srcs[2]) :
1944 nir_ubitfield_extract(&b, srcs[0], srcs[1], srcs[2]);
1945 break;
1946 case ir_quadop_bitfield_insert:
1947 result = nir_bitfield_insert(&b, srcs[0], srcs[1], srcs[2], srcs[3]);
1948 break;
1949 case ir_quadop_vector:
1950 result = nir_vec(&b, srcs, ir->type->vector_elements);
1951 break;
1952
1953 default:
1954 unreachable("not reached");
1955 }
1956 }
1957
1958 void
1959 nir_visitor::visit(ir_swizzle *ir)
1960 {
1961 unsigned swizzle[4] = { ir->mask.x, ir->mask.y, ir->mask.z, ir->mask.w };
1962 result = nir_swizzle(&b, evaluate_rvalue(ir->val), swizzle,
1963 ir->type->vector_elements, !supports_ints);
1964 }
1965
1966 void
1967 nir_visitor::visit(ir_texture *ir)
1968 {
1969 unsigned num_srcs;
1970 nir_texop op;
1971 switch (ir->op) {
1972 case ir_tex:
1973 op = nir_texop_tex;
1974 num_srcs = 1; /* coordinate */
1975 break;
1976
1977 case ir_txb:
1978 case ir_txl:
1979 op = (ir->op == ir_txb) ? nir_texop_txb : nir_texop_txl;
1980 num_srcs = 2; /* coordinate, bias/lod */
1981 break;
1982
1983 case ir_txd:
1984 op = nir_texop_txd; /* coordinate, dPdx, dPdy */
1985 num_srcs = 3;
1986 break;
1987
1988 case ir_txf:
1989 op = nir_texop_txf;
1990 if (ir->lod_info.lod != NULL)
1991 num_srcs = 2; /* coordinate, lod */
1992 else
1993 num_srcs = 1; /* coordinate */
1994 break;
1995
1996 case ir_txf_ms:
1997 op = nir_texop_txf_ms;
1998 num_srcs = 2; /* coordinate, sample_index */
1999 break;
2000
2001 case ir_txs:
2002 op = nir_texop_txs;
2003 if (ir->lod_info.lod != NULL)
2004 num_srcs = 1; /* lod */
2005 else
2006 num_srcs = 0;
2007 break;
2008
2009 case ir_lod:
2010 op = nir_texop_lod;
2011 num_srcs = 1; /* coordinate */
2012 break;
2013
2014 case ir_tg4:
2015 op = nir_texop_tg4;
2016 num_srcs = 1; /* coordinate */
2017 break;
2018
2019 case ir_query_levels:
2020 op = nir_texop_query_levels;
2021 num_srcs = 0;
2022 break;
2023
2024 case ir_texture_samples:
2025 op = nir_texop_texture_samples;
2026 num_srcs = 0;
2027 break;
2028
2029 case ir_samples_identical:
2030 op = nir_texop_samples_identical;
2031 num_srcs = 1; /* coordinate */
2032 break;
2033
2034 default:
2035 unreachable("not reached");
2036 }
2037
2038 if (ir->projector != NULL)
2039 num_srcs++;
2040 if (ir->shadow_comparator != NULL)
2041 num_srcs++;
2042 if (ir->offset != NULL)
2043 num_srcs++;
2044
2045 /* Add one for the texture deref */
2046 num_srcs += 2;
2047
2048 nir_tex_instr *instr = nir_tex_instr_create(this->shader, num_srcs);
2049
2050 instr->op = op;
2051 instr->sampler_dim =
2052 (glsl_sampler_dim) ir->sampler->type->sampler_dimensionality;
2053 instr->is_array = ir->sampler->type->sampler_array;
2054 instr->is_shadow = ir->sampler->type->sampler_shadow;
2055 if (instr->is_shadow)
2056 instr->is_new_style_shadow = (ir->type->vector_elements == 1);
2057 switch (ir->type->base_type) {
2058 case GLSL_TYPE_FLOAT:
2059 instr->dest_type = nir_type_float;
2060 break;
2061 case GLSL_TYPE_INT:
2062 instr->dest_type = nir_type_int;
2063 break;
2064 case GLSL_TYPE_BOOL:
2065 case GLSL_TYPE_UINT:
2066 instr->dest_type = nir_type_uint;
2067 break;
2068 default:
2069 unreachable("not reached");
2070 }
2071
2072 nir_deref_instr *sampler_deref = evaluate_deref(ir->sampler);
2073 instr->src[0].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2074 instr->src[0].src_type = nir_tex_src_texture_deref;
2075 instr->src[1].src = nir_src_for_ssa(&sampler_deref->dest.ssa);
2076 instr->src[1].src_type = nir_tex_src_sampler_deref;
2077
2078 unsigned src_number = 2;
2079
2080 if (ir->coordinate != NULL) {
2081 instr->coord_components = ir->coordinate->type->vector_elements;
2082 instr->src[src_number].src =
2083 nir_src_for_ssa(evaluate_rvalue(ir->coordinate));
2084 instr->src[src_number].src_type = nir_tex_src_coord;
2085 src_number++;
2086 }
2087
2088 if (ir->projector != NULL) {
2089 instr->src[src_number].src =
2090 nir_src_for_ssa(evaluate_rvalue(ir->projector));
2091 instr->src[src_number].src_type = nir_tex_src_projector;
2092 src_number++;
2093 }
2094
2095 if (ir->shadow_comparator != NULL) {
2096 instr->src[src_number].src =
2097 nir_src_for_ssa(evaluate_rvalue(ir->shadow_comparator));
2098 instr->src[src_number].src_type = nir_tex_src_comparator;
2099 src_number++;
2100 }
2101
2102 if (ir->offset != NULL) {
2103 /* we don't support multiple offsets yet */
2104 assert(ir->offset->type->is_vector() || ir->offset->type->is_scalar());
2105
2106 instr->src[src_number].src =
2107 nir_src_for_ssa(evaluate_rvalue(ir->offset));
2108 instr->src[src_number].src_type = nir_tex_src_offset;
2109 src_number++;
2110 }
2111
2112 switch (ir->op) {
2113 case ir_txb:
2114 instr->src[src_number].src =
2115 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.bias));
2116 instr->src[src_number].src_type = nir_tex_src_bias;
2117 src_number++;
2118 break;
2119
2120 case ir_txl:
2121 case ir_txf:
2122 case ir_txs:
2123 if (ir->lod_info.lod != NULL) {
2124 instr->src[src_number].src =
2125 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.lod));
2126 instr->src[src_number].src_type = nir_tex_src_lod;
2127 src_number++;
2128 }
2129 break;
2130
2131 case ir_txd:
2132 instr->src[src_number].src =
2133 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdx));
2134 instr->src[src_number].src_type = nir_tex_src_ddx;
2135 src_number++;
2136 instr->src[src_number].src =
2137 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.grad.dPdy));
2138 instr->src[src_number].src_type = nir_tex_src_ddy;
2139 src_number++;
2140 break;
2141
2142 case ir_txf_ms:
2143 instr->src[src_number].src =
2144 nir_src_for_ssa(evaluate_rvalue(ir->lod_info.sample_index));
2145 instr->src[src_number].src_type = nir_tex_src_ms_index;
2146 src_number++;
2147 break;
2148
2149 case ir_tg4:
2150 instr->component = ir->lod_info.component->as_constant()->value.u[0];
2151 break;
2152
2153 default:
2154 break;
2155 }
2156
2157 assert(src_number == num_srcs);
2158
2159 unsigned bit_size = glsl_get_bit_size(ir->type);
2160 add_instr(&instr->instr, nir_tex_instr_dest_size(instr), bit_size);
2161 }
2162
2163 void
2164 nir_visitor::visit(ir_constant *ir)
2165 {
2166 /*
2167 * We don't know if this variable is an array or struct that gets
2168 * dereferenced, so do the safe thing an make it a variable with a
2169 * constant initializer and return a dereference.
2170 */
2171
2172 nir_variable *var =
2173 nir_local_variable_create(this->impl, ir->type, "const_temp");
2174 var->data.read_only = true;
2175 var->constant_initializer = constant_copy(ir, var);
2176
2177 this->deref = nir_build_deref_var(&b, var);
2178 }
2179
2180 void
2181 nir_visitor::visit(ir_dereference_variable *ir)
2182 {
2183 struct hash_entry *entry =
2184 _mesa_hash_table_search(this->var_table, ir->var);
2185 assert(entry);
2186 nir_variable *var = (nir_variable *) entry->data;
2187
2188 this->deref = nir_build_deref_var(&b, var);
2189 }
2190
2191 void
2192 nir_visitor::visit(ir_dereference_record *ir)
2193 {
2194 ir->record->accept(this);
2195
2196 int field_index = ir->field_idx;
2197 assert(field_index >= 0);
2198
2199 this->deref = nir_build_deref_struct(&b, this->deref, field_index);
2200 }
2201
2202 void
2203 nir_visitor::visit(ir_dereference_array *ir)
2204 {
2205 nir_ssa_def *index = evaluate_rvalue(ir->array_index);
2206
2207 ir->array->accept(this);
2208
2209 this->deref = nir_build_deref_array(&b, this->deref, index);
2210 }
2211
2212 void
2213 nir_visitor::visit(ir_barrier *)
2214 {
2215 nir_intrinsic_instr *instr =
2216 nir_intrinsic_instr_create(this->shader, nir_intrinsic_barrier);
2217 nir_builder_instr_insert(&b, &instr->instr);
2218 }