src/compiler/nir/nir.c

   1 /*
   2  * Copyright © 2014 Intel Corporation
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the next
  12  * paragraph) shall be included in all copies or substantial portions of the
  13  * Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
  21  * IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Connor Abbott (cwabbott0@gmail.com)
  25  *
  26  */
  27
  28 #include "nir.h"
  29 #include "nir_control_flow_private.h"
  30 #include <assert.h>
  31
  32 nir_shader *
  33 nir_shader_create(void *mem_ctx,
  34                   gl_shader_stage stage,
  35                   const nir_shader_compiler_options *options)
  36 {
  37    nir_shader *shader = ralloc(mem_ctx, nir_shader);
  38
  39    exec_list_make_empty(&shader->uniforms);
  40    exec_list_make_empty(&shader->inputs);
  41    exec_list_make_empty(&shader->outputs);
  42    exec_list_make_empty(&shader->shared);
  43
  44    shader->options = options;
  45    memset(&shader->info, 0, sizeof(shader->info));
  46
  47    exec_list_make_empty(&shader->functions);
  48    exec_list_make_empty(&shader->registers);
  49    exec_list_make_empty(&shader->globals);
  50    exec_list_make_empty(&shader->system_values);
  51    shader->reg_alloc = 0;
  52
  53    shader->num_inputs = 0;
  54    shader->num_outputs = 0;
  55    shader->num_uniforms = 0;
  56    shader->num_shared = 0;
  57
  58    shader->stage = stage;
  59
  60    return shader;
  61 }
  62
  63 static nir_register *
  64 reg_create(void *mem_ctx, struct exec_list *list)
  65 {
  66    nir_register *reg = ralloc(mem_ctx, nir_register);
  67
  68    list_inithead(&reg->uses);
  69    list_inithead(&reg->defs);
  70    list_inithead(&reg->if_uses);
  71
  72    reg->num_components = 0;
  73    reg->num_array_elems = 0;
  74    reg->is_packed = false;
  75    reg->name = NULL;
  76
  77    exec_list_push_tail(list, &reg->node);
  78
  79    return reg;
  80 }
  81
  82 nir_register *
  83 nir_global_reg_create(nir_shader *shader)
  84 {
  85    nir_register *reg = reg_create(shader, &shader->registers);
  86    reg->index = shader->reg_alloc++;
  87    reg->is_global = true;
  88
  89    return reg;
  90 }
  91
  92 nir_register *
  93 nir_local_reg_create(nir_function_impl *impl)
  94 {
  95    nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
  96    reg->index = impl->reg_alloc++;
  97    reg->is_global = false;
  98
  99    return reg;
 100 }
 101
 102 void
 103 nir_reg_remove(nir_register *reg)
 104 {
 105    exec_node_remove(&reg->node);
 106 }
 107
 108 void
 109 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
 110 {
 111    switch (var->data.mode) {
 112    case nir_var_all:
 113       assert(!"invalid mode");
 114       break;
 115
 116    case nir_var_local:
 117       assert(!"nir_shader_add_variable cannot be used for local variables");
 118       break;
 119
 120    case nir_var_global:
 121       exec_list_push_tail(&shader->globals, &var->node);
 122       break;
 123
 124    case nir_var_shader_in:
 125       exec_list_push_tail(&shader->inputs, &var->node);
 126       break;
 127
 128    case nir_var_shader_out:
 129       exec_list_push_tail(&shader->outputs, &var->node);
 130       break;
 131
 132    case nir_var_uniform:
 133    case nir_var_shader_storage:
 134       exec_list_push_tail(&shader->uniforms, &var->node);
 135       break;
 136
 137    case nir_var_shared:
 138       assert(shader->stage == MESA_SHADER_COMPUTE);
 139       exec_list_push_tail(&shader->shared, &var->node);
 140       break;
 141
 142    case nir_var_system_value:
 143       exec_list_push_tail(&shader->system_values, &var->node);
 144       break;
 145    }
 146 }
 147
 148 nir_variable *
 149 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
 150                     const struct glsl_type *type, const char *name)
 151 {
 152    nir_variable *var = rzalloc(shader, nir_variable);
 153    var->name = ralloc_strdup(var, name);
 154    var->type = type;
 155    var->data.mode = mode;
 156
 157    if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
 158        (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
 159       var->data.interpolation = INTERP_QUALIFIER_SMOOTH;
 160
 161    if (mode == nir_var_shader_in || mode == nir_var_uniform)
 162       var->data.read_only = true;
 163
 164    nir_shader_add_variable(shader, var);
 165
 166    return var;
 167 }
 168
 169 nir_variable *
 170 nir_local_variable_create(nir_function_impl *impl,
 171                           const struct glsl_type *type, const char *name)
 172 {
 173    nir_variable *var = rzalloc(impl->function->shader, nir_variable);
 174    var->name = ralloc_strdup(var, name);
 175    var->type = type;
 176    var->data.mode = nir_var_local;
 177
 178    nir_function_impl_add_variable(impl, var);
 179
 180    return var;
 181 }
 182
 183 nir_function *
 184 nir_function_create(nir_shader *shader, const char *name)
 185 {
 186    nir_function *func = ralloc(shader, nir_function);
 187
 188    exec_list_push_tail(&shader->functions, &func->node);
 189
 190    func->name = ralloc_strdup(func, name);
 191    func->shader = shader;
 192    func->num_params = 0;
 193    func->params = NULL;
 194    func->return_type = glsl_void_type();
 195    func->impl = NULL;
 196
 197    return func;
 198 }
 199
 200 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
 201 {
 202    dest->is_ssa = src->is_ssa;
 203    if (src->is_ssa) {
 204       dest->ssa = src->ssa;
 205    } else {
 206       dest->reg.base_offset = src->reg.base_offset;
 207       dest->reg.reg = src->reg.reg;
 208       if (src->reg.indirect) {
 209          dest->reg.indirect = ralloc(mem_ctx, nir_src);
 210          nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
 211       } else {
 212          dest->reg.indirect = NULL;
 213       }
 214    }
 215 }
 216
 217 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
 218 {
 219    /* Copying an SSA definition makes no sense whatsoever. */
 220    assert(!src->is_ssa);
 221
 222    dest->is_ssa = false;
 223
 224    dest->reg.base_offset = src->reg.base_offset;
 225    dest->reg.reg = src->reg.reg;
 226    if (src->reg.indirect) {
 227       dest->reg.indirect = ralloc(instr, nir_src);
 228       nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
 229    } else {
 230       dest->reg.indirect = NULL;
 231    }
 232 }
 233
 234 void
 235 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
 236                  nir_alu_instr *instr)
 237 {
 238    nir_src_copy(&dest->src, &src->src, &instr->instr);
 239    dest->abs = src->abs;
 240    dest->negate = src->negate;
 241    for (unsigned i = 0; i < 4; i++)
 242       dest->swizzle[i] = src->swizzle[i];
 243 }
 244
 245 void
 246 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
 247                   nir_alu_instr *instr)
 248 {
 249    nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
 250    dest->write_mask = src->write_mask;
 251    dest->saturate = src->saturate;
 252 }
 253
 254
 255 static void
 256 cf_init(nir_cf_node *node, nir_cf_node_type type)
 257 {
 258    exec_node_init(&node->node);
 259    node->parent = NULL;
 260    node->type = type;
 261 }
 262
 263 nir_function_impl *
 264 nir_function_impl_create_bare(nir_shader *shader)
 265 {
 266    nir_function_impl *impl = ralloc(shader, nir_function_impl);
 267
 268    impl->function = NULL;
 269
 270    cf_init(&impl->cf_node, nir_cf_node_function);
 271
 272    exec_list_make_empty(&impl->body);
 273    exec_list_make_empty(&impl->registers);
 274    exec_list_make_empty(&impl->locals);
 275    impl->num_params = 0;
 276    impl->params = NULL;
 277    impl->return_var = NULL;
 278    impl->reg_alloc = 0;
 279    impl->ssa_alloc = 0;
 280    impl->valid_metadata = nir_metadata_none;
 281
 282    /* create start & end blocks */
 283    nir_block *start_block = nir_block_create(shader);
 284    nir_block *end_block = nir_block_create(shader);
 285    start_block->cf_node.parent = &impl->cf_node;
 286    end_block->cf_node.parent = &impl->cf_node;
 287    impl->end_block = end_block;
 288
 289    exec_list_push_tail(&impl->body, &start_block->cf_node.node);
 290
 291    start_block->successors[0] = end_block;
 292    _mesa_set_add(end_block->predecessors, start_block);
 293    return impl;
 294 }
 295
 296 nir_function_impl *
 297 nir_function_impl_create(nir_function *function)
 298 {
 299    assert(function->impl == NULL);
 300
 301    nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
 302
 303    function->impl = impl;
 304    impl->function = function;
 305
 306    impl->num_params = function->num_params;
 307    impl->params = ralloc_array(function->shader,
 308                                nir_variable *, impl->num_params);
 309
 310    return impl;
 311 }
 312
 313 nir_block *
 314 nir_block_create(nir_shader *shader)
 315 {
 316    nir_block *block = ralloc(shader, nir_block);
 317
 318    cf_init(&block->cf_node, nir_cf_node_block);
 319
 320    block->successors[0] = block->successors[1] = NULL;
 321    block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
 322                                           _mesa_key_pointer_equal);
 323    block->imm_dom = NULL;
 324    /* XXX maybe it would be worth it to defer allocation?  This
 325     * way it doesn't get allocated for shader ref's that never run
 326     * nir_calc_dominance?  For example, state-tracker creates an
 327     * initial IR, clones that, runs appropriate lowering pass, passes
 328     * to driver which does common lowering/opt, and then stores ref
 329     * which is later used to do state specific lowering and futher
 330     * opt.  Do any of the references not need dominance metadata?
 331     */
 332    block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
 333                                           _mesa_key_pointer_equal);
 334
 335    exec_list_make_empty(&block->instr_list);
 336
 337    return block;
 338 }
 339
 340 static inline void
 341 src_init(nir_src *src)
 342 {
 343    src->is_ssa = false;
 344    src->reg.reg = NULL;
 345    src->reg.indirect = NULL;
 346    src->reg.base_offset = 0;
 347 }
 348
 349 nir_if *
 350 nir_if_create(nir_shader *shader)
 351 {
 352    nir_if *if_stmt = ralloc(shader, nir_if);
 353
 354    cf_init(&if_stmt->cf_node, nir_cf_node_if);
 355    src_init(&if_stmt->condition);
 356
 357    nir_block *then = nir_block_create(shader);
 358    exec_list_make_empty(&if_stmt->then_list);
 359    exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
 360    then->cf_node.parent = &if_stmt->cf_node;
 361
 362    nir_block *else_stmt = nir_block_create(shader);
 363    exec_list_make_empty(&if_stmt->else_list);
 364    exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
 365    else_stmt->cf_node.parent = &if_stmt->cf_node;
 366
 367    return if_stmt;
 368 }
 369
 370 nir_loop *
 371 nir_loop_create(nir_shader *shader)
 372 {
 373    nir_loop *loop = ralloc(shader, nir_loop);
 374
 375    cf_init(&loop->cf_node, nir_cf_node_loop);
 376
 377    nir_block *body = nir_block_create(shader);
 378    exec_list_make_empty(&loop->body);
 379    exec_list_push_tail(&loop->body, &body->cf_node.node);
 380    body->cf_node.parent = &loop->cf_node;
 381
 382    body->successors[0] = body;
 383    _mesa_set_add(body->predecessors, body);
 384
 385    return loop;
 386 }
 387
 388 static void
 389 instr_init(nir_instr *instr, nir_instr_type type)
 390 {
 391    instr->type = type;
 392    instr->block = NULL;
 393    exec_node_init(&instr->node);
 394 }
 395
 396 static void
 397 dest_init(nir_dest *dest)
 398 {
 399    dest->is_ssa = false;
 400    dest->reg.reg = NULL;
 401    dest->reg.indirect = NULL;
 402    dest->reg.base_offset = 0;
 403 }
 404
 405 static void
 406 alu_dest_init(nir_alu_dest *dest)
 407 {
 408    dest_init(&dest->dest);
 409    dest->saturate = false;
 410    dest->write_mask = 0xf;
 411 }
 412
 413 static void
 414 alu_src_init(nir_alu_src *src)
 415 {
 416    src_init(&src->src);
 417    src->abs = src->negate = false;
 418    src->swizzle[0] = 0;
 419    src->swizzle[1] = 1;
 420    src->swizzle[2] = 2;
 421    src->swizzle[3] = 3;
 422 }
 423
 424 nir_alu_instr *
 425 nir_alu_instr_create(nir_shader *shader, nir_op op)
 426 {
 427    unsigned num_srcs = nir_op_infos[op].num_inputs;
 428    nir_alu_instr *instr =
 429       ralloc_size(shader,
 430                   sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
 431
 432    instr_init(&instr->instr, nir_instr_type_alu);
 433    instr->op = op;
 434    alu_dest_init(&instr->dest);
 435    for (unsigned i = 0; i < num_srcs; i++)
 436       alu_src_init(&instr->src[i]);
 437
 438    return instr;
 439 }
 440
 441 nir_jump_instr *
 442 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
 443 {
 444    nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
 445    instr_init(&instr->instr, nir_instr_type_jump);
 446    instr->type = type;
 447    return instr;
 448 }
 449
 450 nir_load_const_instr *
 451 nir_load_const_instr_create(nir_shader *shader, unsigned num_components)
 452 {
 453    nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
 454    instr_init(&instr->instr, nir_instr_type_load_const);
 455
 456    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 457
 458    return instr;
 459 }
 460
 461 nir_intrinsic_instr *
 462 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
 463 {
 464    unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
 465    nir_intrinsic_instr *instr =
 466       ralloc_size(shader,
 467                   sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
 468
 469    instr_init(&instr->instr, nir_instr_type_intrinsic);
 470    instr->intrinsic = op;
 471
 472    if (nir_intrinsic_infos[op].has_dest)
 473       dest_init(&instr->dest);
 474
 475    for (unsigned i = 0; i < num_srcs; i++)
 476       src_init(&instr->src[i]);
 477
 478    return instr;
 479 }
 480
 481 nir_call_instr *
 482 nir_call_instr_create(nir_shader *shader, nir_function *callee)
 483 {
 484    nir_call_instr *instr = ralloc(shader, nir_call_instr);
 485    instr_init(&instr->instr, nir_instr_type_call);
 486
 487    instr->callee = callee;
 488    instr->num_params = callee->num_params;
 489    instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
 490    instr->return_deref = NULL;
 491
 492    return instr;
 493 }
 494
 495 nir_tex_instr *
 496 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
 497 {
 498    nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
 499    instr_init(&instr->instr, nir_instr_type_tex);
 500
 501    dest_init(&instr->dest);
 502
 503    instr->num_srcs = num_srcs;
 504    instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
 505    for (unsigned i = 0; i < num_srcs; i++)
 506       src_init(&instr->src[i].src);
 507
 508    instr->texture_index = 0;
 509    instr->texture_array_size = 0;
 510    instr->texture = NULL;
 511    instr->sampler_index = 0;
 512    instr->sampler = NULL;
 513
 514    return instr;
 515 }
 516
 517 nir_phi_instr *
 518 nir_phi_instr_create(nir_shader *shader)
 519 {
 520    nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
 521    instr_init(&instr->instr, nir_instr_type_phi);
 522
 523    dest_init(&instr->dest);
 524    exec_list_make_empty(&instr->srcs);
 525    return instr;
 526 }
 527
 528 nir_parallel_copy_instr *
 529 nir_parallel_copy_instr_create(nir_shader *shader)
 530 {
 531    nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
 532    instr_init(&instr->instr, nir_instr_type_parallel_copy);
 533
 534    exec_list_make_empty(&instr->entries);
 535
 536    return instr;
 537 }
 538
 539 nir_ssa_undef_instr *
 540 nir_ssa_undef_instr_create(nir_shader *shader, unsigned num_components)
 541 {
 542    nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
 543    instr_init(&instr->instr, nir_instr_type_ssa_undef);
 544
 545    nir_ssa_def_init(&instr->instr, &instr->def, num_components, NULL);
 546
 547    return instr;
 548 }
 549
 550 nir_deref_var *
 551 nir_deref_var_create(void *mem_ctx, nir_variable *var)
 552 {
 553    nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
 554    deref->deref.deref_type = nir_deref_type_var;
 555    deref->deref.child = NULL;
 556    deref->deref.type = var->type;
 557    deref->var = var;
 558    return deref;
 559 }
 560
 561 nir_deref_array *
 562 nir_deref_array_create(void *mem_ctx)
 563 {
 564    nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
 565    deref->deref.deref_type = nir_deref_type_array;
 566    deref->deref.child = NULL;
 567    deref->deref_array_type = nir_deref_array_type_direct;
 568    src_init(&deref->indirect);
 569    deref->base_offset = 0;
 570    return deref;
 571 }
 572
 573 nir_deref_struct *
 574 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
 575 {
 576    nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
 577    deref->deref.deref_type = nir_deref_type_struct;
 578    deref->deref.child = NULL;
 579    deref->index = field_index;
 580    return deref;
 581 }
 582
 583 static nir_deref_var *
 584 copy_deref_var(void *mem_ctx, nir_deref_var *deref)
 585 {
 586    nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
 587    ret->deref.type = deref->deref.type;
 588    if (deref->deref.child)
 589       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 590    return ret;
 591 }
 592
 593 static nir_deref_array *
 594 copy_deref_array(void *mem_ctx, nir_deref_array *deref)
 595 {
 596    nir_deref_array *ret = nir_deref_array_create(mem_ctx);
 597    ret->base_offset = deref->base_offset;
 598    ret->deref_array_type = deref->deref_array_type;
 599    if (deref->deref_array_type == nir_deref_array_type_indirect) {
 600       nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
 601    }
 602    ret->deref.type = deref->deref.type;
 603    if (deref->deref.child)
 604       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 605    return ret;
 606 }
 607
 608 static nir_deref_struct *
 609 copy_deref_struct(void *mem_ctx, nir_deref_struct *deref)
 610 {
 611    nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
 612    ret->deref.type = deref->deref.type;
 613    if (deref->deref.child)
 614       ret->deref.child = nir_copy_deref(ret, deref->deref.child);
 615    return ret;
 616 }
 617
 618 nir_deref *
 619 nir_copy_deref(void *mem_ctx, nir_deref *deref)
 620 {
 621    switch (deref->deref_type) {
 622    case nir_deref_type_var:
 623       return &copy_deref_var(mem_ctx, nir_deref_as_var(deref))->deref;
 624    case nir_deref_type_array:
 625       return &copy_deref_array(mem_ctx, nir_deref_as_array(deref))->deref;
 626    case nir_deref_type_struct:
 627       return &copy_deref_struct(mem_ctx, nir_deref_as_struct(deref))->deref;
 628    default:
 629       unreachable("Invalid dereference type");
 630    }
 631
 632    return NULL;
 633 }
 634
 635 /* Returns a load_const instruction that represents the constant
 636  * initializer for the given deref chain.  The caller is responsible for
 637  * ensuring that there actually is a constant initializer.
 638  */
 639 nir_load_const_instr *
 640 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
 641 {
 642    nir_constant *constant = deref->var->constant_initializer;
 643    assert(constant);
 644
 645    const nir_deref *tail = &deref->deref;
 646    unsigned matrix_offset = 0;
 647    while (tail->child) {
 648       switch (tail->child->deref_type) {
 649       case nir_deref_type_array: {
 650          nir_deref_array *arr = nir_deref_as_array(tail->child);
 651          assert(arr->deref_array_type == nir_deref_array_type_direct);
 652          if (glsl_type_is_matrix(tail->type)) {
 653             assert(arr->deref.child == NULL);
 654             matrix_offset = arr->base_offset;
 655          } else {
 656             constant = constant->elements[arr->base_offset];
 657          }
 658          break;
 659       }
 660
 661       case nir_deref_type_struct: {
 662          constant = constant->elements[nir_deref_as_struct(tail->child)->index];
 663          break;
 664       }
 665
 666       default:
 667          unreachable("Invalid deref child type");
 668       }
 669
 670       tail = tail->child;
 671    }
 672
 673    nir_load_const_instr *load =
 674       nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type));
 675
 676    matrix_offset *= load->def.num_components;
 677    for (unsigned i = 0; i < load->def.num_components; i++) {
 678       switch (glsl_get_base_type(tail->type)) {
 679       case GLSL_TYPE_FLOAT:
 680       case GLSL_TYPE_INT:
 681       case GLSL_TYPE_UINT:
 682          load->value.u[i] = constant->value.u[matrix_offset + i];
 683          break;
 684       case GLSL_TYPE_BOOL:
 685          load->value.u[i] = constant->value.b[matrix_offset + i] ?
 686                              NIR_TRUE : NIR_FALSE;
 687          break;
 688       default:
 689          unreachable("Invalid immediate type");
 690       }
 691    }
 692
 693    return load;
 694 }
 695
 696 nir_function_impl *
 697 nir_cf_node_get_function(nir_cf_node *node)
 698 {
 699    while (node->type != nir_cf_node_function) {
 700       node = node->parent;
 701    }
 702
 703    return nir_cf_node_as_function(node);
 704 }
 705
 706 /* Reduces a cursor by trying to convert everything to after and trying to
 707  * go up to block granularity when possible.
 708  */
 709 static nir_cursor
 710 reduce_cursor(nir_cursor cursor)
 711 {
 712    switch (cursor.option) {
 713    case nir_cursor_before_block:
 714       if (exec_list_is_empty(&cursor.block->instr_list)) {
 715          /* Empty block.  After is as good as before. */
 716          cursor.option = nir_cursor_after_block;
 717       } else {
 718          /* Try to switch to after the previous block if there is one.
 719           * (This isn't likely, but it can happen.)
 720           */
 721          nir_cf_node *prev_node = nir_cf_node_prev(&cursor.block->cf_node);
 722          if (prev_node && prev_node->type == nir_cf_node_block) {
 723             cursor.block = nir_cf_node_as_block(prev_node);
 724             cursor.option = nir_cursor_after_block;
 725          }
 726       }
 727       return cursor;
 728
 729    case nir_cursor_after_block:
 730       return cursor;
 731
 732    case nir_cursor_before_instr: {
 733       nir_instr *prev_instr = nir_instr_prev(cursor.instr);
 734       if (prev_instr) {
 735          /* Before this instruction is after the previous */
 736          cursor.instr = prev_instr;
 737          cursor.option = nir_cursor_after_instr;
 738       } else {
 739          /* No previous instruction.  Switch to before block */
 740          cursor.block = cursor.instr->block;
 741          cursor.option = nir_cursor_before_block;
 742       }
 743       return reduce_cursor(cursor);
 744    }
 745
 746    case nir_cursor_after_instr:
 747       if (nir_instr_next(cursor.instr) == NULL) {
 748          /* This is the last instruction, switch to after block */
 749          cursor.option = nir_cursor_after_block;
 750          cursor.block = cursor.instr->block;
 751       }
 752       return cursor;
 753
 754    default:
 755       unreachable("Inavlid cursor option");
 756    }
 757 }
 758
 759 bool
 760 nir_cursors_equal(nir_cursor a, nir_cursor b)
 761 {
 762    /* Reduced cursors should be unique */
 763    a = reduce_cursor(a);
 764    b = reduce_cursor(b);
 765
 766    return a.block == b.block && a.option == b.option;
 767 }
 768
 769 static bool
 770 add_use_cb(nir_src *src, void *state)
 771 {
 772    nir_instr *instr = state;
 773
 774    src->parent_instr = instr;
 775    list_addtail(&src->use_link,
 776                 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
 777
 778    return true;
 779 }
 780
 781 static bool
 782 add_ssa_def_cb(nir_ssa_def *def, void *state)
 783 {
 784    nir_instr *instr = state;
 785
 786    if (instr->block && def->index == UINT_MAX) {
 787       nir_function_impl *impl =
 788          nir_cf_node_get_function(&instr->block->cf_node);
 789
 790       def->index = impl->ssa_alloc++;
 791    }
 792
 793    return true;
 794 }
 795
 796 static bool
 797 add_reg_def_cb(nir_dest *dest, void *state)
 798 {
 799    nir_instr *instr = state;
 800
 801    if (!dest->is_ssa) {
 802       dest->reg.parent_instr = instr;
 803       list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
 804    }
 805
 806    return true;
 807 }
 808
 809 static void
 810 add_defs_uses(nir_instr *instr)
 811 {
 812    nir_foreach_src(instr, add_use_cb, instr);
 813    nir_foreach_dest(instr, add_reg_def_cb, instr);
 814    nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
 815 }
 816
 817 void
 818 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
 819 {
 820    switch (cursor.option) {
 821    case nir_cursor_before_block:
 822       /* Only allow inserting jumps into empty blocks. */
 823       if (instr->type == nir_instr_type_jump)
 824          assert(exec_list_is_empty(&cursor.block->instr_list));
 825
 826       instr->block = cursor.block;
 827       add_defs_uses(instr);
 828       exec_list_push_head(&cursor.block->instr_list, &instr->node);
 829       break;
 830    case nir_cursor_after_block: {
 831       /* Inserting instructions after a jump is illegal. */
 832       nir_instr *last = nir_block_last_instr(cursor.block);
 833       assert(last == NULL || last->type != nir_instr_type_jump);
 834       (void) last;
 835
 836       instr->block = cursor.block;
 837       add_defs_uses(instr);
 838       exec_list_push_tail(&cursor.block->instr_list, &instr->node);
 839       break;
 840    }
 841    case nir_cursor_before_instr:
 842       assert(instr->type != nir_instr_type_jump);
 843       instr->block = cursor.instr->block;
 844       add_defs_uses(instr);
 845       exec_node_insert_node_before(&cursor.instr->node, &instr->node);
 846       break;
 847    case nir_cursor_after_instr:
 848       /* Inserting instructions after a jump is illegal. */
 849       assert(cursor.instr->type != nir_instr_type_jump);
 850
 851       /* Only allow inserting jumps at the end of the block. */
 852       if (instr->type == nir_instr_type_jump)
 853          assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
 854
 855       instr->block = cursor.instr->block;
 856       add_defs_uses(instr);
 857       exec_node_insert_after(&cursor.instr->node, &instr->node);
 858       break;
 859    }
 860
 861    if (instr->type == nir_instr_type_jump)
 862       nir_handle_add_jump(instr->block);
 863 }
 864
 865 static bool
 866 src_is_valid(const nir_src *src)
 867 {
 868    return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
 869 }
 870
 871 static bool
 872 remove_use_cb(nir_src *src, void *state)
 873 {
 874    if (src_is_valid(src))
 875       list_del(&src->use_link);
 876
 877    return true;
 878 }
 879
 880 static bool
 881 remove_def_cb(nir_dest *dest, void *state)
 882 {
 883    if (!dest->is_ssa)
 884       list_del(&dest->reg.def_link);
 885
 886    return true;
 887 }
 888
 889 static void
 890 remove_defs_uses(nir_instr *instr)
 891 {
 892    nir_foreach_dest(instr, remove_def_cb, instr);
 893    nir_foreach_src(instr, remove_use_cb, instr);
 894 }
 895
 896 void nir_instr_remove(nir_instr *instr)
 897 {
 898    remove_defs_uses(instr);
 899    exec_node_remove(&instr->node);
 900
 901    if (instr->type == nir_instr_type_jump) {
 902       nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
 903       nir_handle_remove_jump(instr->block, jump_instr->type);
 904    }
 905 }
 906
 907 /*@}*/
 908
 909 void
 910 nir_index_local_regs(nir_function_impl *impl)
 911 {
 912    unsigned index = 0;
 913    foreach_list_typed(nir_register, reg, node, &impl->registers) {
 914       reg->index = index++;
 915    }
 916    impl->reg_alloc = index;
 917 }
 918
 919 void
 920 nir_index_global_regs(nir_shader *shader)
 921 {
 922    unsigned index = 0;
 923    foreach_list_typed(nir_register, reg, node, &shader->registers) {
 924       reg->index = index++;
 925    }
 926    shader->reg_alloc = index;
 927 }
 928
 929 static bool
 930 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
 931 {
 932    return cb(&instr->dest.dest, state);
 933 }
 934
 935 static bool
 936 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
 937                      void *state)
 938 {
 939    if (nir_intrinsic_infos[instr->intrinsic].has_dest)
 940       return cb(&instr->dest, state);
 941
 942    return true;
 943 }
 944
 945 static bool
 946 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
 947                    void *state)
 948 {
 949    return cb(&instr->dest, state);
 950 }
 951
 952 static bool
 953 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
 954 {
 955    return cb(&instr->dest, state);
 956 }
 957
 958 static bool
 959 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
 960                          nir_foreach_dest_cb cb, void *state)
 961 {
 962    nir_foreach_parallel_copy_entry(instr, entry) {
 963       if (!cb(&entry->dest, state))
 964          return false;
 965    }
 966
 967    return true;
 968 }
 969
 970 bool
 971 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
 972 {
 973    switch (instr->type) {
 974    case nir_instr_type_alu:
 975       return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
 976    case nir_instr_type_intrinsic:
 977       return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
 978    case nir_instr_type_tex:
 979       return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
 980    case nir_instr_type_phi:
 981       return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
 982    case nir_instr_type_parallel_copy:
 983       return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
 984                                       cb, state);
 985
 986    case nir_instr_type_load_const:
 987    case nir_instr_type_ssa_undef:
 988    case nir_instr_type_call:
 989    case nir_instr_type_jump:
 990       break;
 991
 992    default:
 993       unreachable("Invalid instruction type");
 994       break;
 995    }
 996
 997    return true;
 998 }
 999
1000 struct foreach_ssa_def_state {
1001    nir_foreach_ssa_def_cb cb;
1002    void *client_state;
1003 };
1004
1005 static inline bool
1006 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1007 {
1008    struct foreach_ssa_def_state *state = void_state;
1009
1010    if (dest->is_ssa)
1011       return state->cb(&dest->ssa, state->client_state);
1012    else
1013       return true;
1014 }
1015
1016 bool
1017 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1018 {
1019    switch (instr->type) {
1020    case nir_instr_type_alu:
1021    case nir_instr_type_tex:
1022    case nir_instr_type_intrinsic:
1023    case nir_instr_type_phi:
1024    case nir_instr_type_parallel_copy: {
1025       struct foreach_ssa_def_state foreach_state = {cb, state};
1026       return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1027    }
1028
1029    case nir_instr_type_load_const:
1030       return cb(&nir_instr_as_load_const(instr)->def, state);
1031    case nir_instr_type_ssa_undef:
1032       return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1033    case nir_instr_type_call:
1034    case nir_instr_type_jump:
1035       return true;
1036    default:
1037       unreachable("Invalid instruction type");
1038    }
1039 }
1040
1041 static bool
1042 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1043 {
1044    if (!cb(src, state))
1045       return false;
1046    if (!src->is_ssa && src->reg.indirect)
1047       return cb(src->reg.indirect, state);
1048    return true;
1049 }
1050
1051 static bool
1052 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1053                       void *state)
1054 {
1055    if (deref->deref_array_type == nir_deref_array_type_indirect)
1056       return visit_src(&deref->indirect, cb, state);
1057    return true;
1058 }
1059
1060 static bool
1061 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1062 {
1063    nir_deref *cur = &deref->deref;
1064    while (cur != NULL) {
1065       if (cur->deref_type == nir_deref_type_array)
1066          if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1067             return false;
1068
1069       cur = cur->child;
1070    }
1071
1072    return true;
1073 }
1074
1075 static bool
1076 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1077 {
1078    for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1079       if (!visit_src(&instr->src[i].src, cb, state))
1080          return false;
1081
1082    return true;
1083 }
1084
1085 static bool
1086 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1087 {
1088    for (unsigned i = 0; i < instr->num_srcs; i++)
1089       if (!visit_src(&instr->src[i].src, cb, state))
1090          return false;
1091
1092    if (instr->texture != NULL)
1093       if (!visit_deref_src(instr->texture, cb, state))
1094          return false;
1095
1096    if (instr->sampler != NULL)
1097       if (!visit_deref_src(instr->sampler, cb, state))
1098          return false;
1099
1100    return true;
1101 }
1102
1103 static bool
1104 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1105                     void *state)
1106 {
1107    unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1108    for (unsigned i = 0; i < num_srcs; i++)
1109       if (!visit_src(&instr->src[i], cb, state))
1110          return false;
1111
1112    unsigned num_vars =
1113       nir_intrinsic_infos[instr->intrinsic].num_variables;
1114    for (unsigned i = 0; i < num_vars; i++)
1115       if (!visit_deref_src(instr->variables[i], cb, state))
1116          return false;
1117
1118    return true;
1119 }
1120
1121 static bool
1122 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1123 {
1124    return true;
1125 }
1126
1127 static bool
1128 visit_load_const_src(nir_load_const_instr *instr, nir_foreach_src_cb cb,
1129                      void *state)
1130 {
1131    return true;
1132 }
1133
1134 static bool
1135 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1136 {
1137    nir_foreach_phi_src(instr, src) {
1138       if (!visit_src(&src->src, cb, state))
1139          return false;
1140    }
1141
1142    return true;
1143 }
1144
1145 static bool
1146 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1147                         nir_foreach_src_cb cb, void *state)
1148 {
1149    nir_foreach_parallel_copy_entry(instr, entry) {
1150       if (!visit_src(&entry->src, cb, state))
1151          return false;
1152    }
1153
1154    return true;
1155 }
1156
1157 typedef struct {
1158    void *state;
1159    nir_foreach_src_cb cb;
1160 } visit_dest_indirect_state;
1161
1162 static bool
1163 visit_dest_indirect(nir_dest *dest, void *_state)
1164 {
1165    visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1166
1167    if (!dest->is_ssa && dest->reg.indirect)
1168       return state->cb(dest->reg.indirect, state->state);
1169
1170    return true;
1171 }
1172
1173 bool
1174 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1175 {
1176    switch (instr->type) {
1177    case nir_instr_type_alu:
1178       if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1179          return false;
1180       break;
1181    case nir_instr_type_intrinsic:
1182       if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1183          return false;
1184       break;
1185    case nir_instr_type_tex:
1186       if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1187          return false;
1188       break;
1189    case nir_instr_type_call:
1190       if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1191          return false;
1192       break;
1193    case nir_instr_type_load_const:
1194       if (!visit_load_const_src(nir_instr_as_load_const(instr), cb, state))
1195          return false;
1196       break;
1197    case nir_instr_type_phi:
1198       if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1199          return false;
1200       break;
1201    case nir_instr_type_parallel_copy:
1202       if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1203                                    cb, state))
1204          return false;
1205       break;
1206    case nir_instr_type_jump:
1207    case nir_instr_type_ssa_undef:
1208       return true;
1209
1210    default:
1211       unreachable("Invalid instruction type");
1212       break;
1213    }
1214
1215    visit_dest_indirect_state dest_state;
1216    dest_state.state = state;
1217    dest_state.cb = cb;
1218    return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1219 }
1220
1221 nir_const_value *
1222 nir_src_as_const_value(nir_src src)
1223 {
1224    if (!src.is_ssa)
1225       return NULL;
1226
1227    if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1228       return NULL;
1229
1230    nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1231
1232    return &load->value;
1233 }
1234
1235 /**
1236  * Returns true if the source is known to be dynamically uniform. Otherwise it
1237  * returns false which means it may or may not be dynamically uniform but it
1238  * can't be determined.
1239  */
1240 bool
1241 nir_src_is_dynamically_uniform(nir_src src)
1242 {
1243    if (!src.is_ssa)
1244       return false;
1245
1246    /* Constants are trivially dynamically uniform */
1247    if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1248       return true;
1249
1250    /* As are uniform variables */
1251    if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1252       nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1253
1254       if (intr->intrinsic == nir_intrinsic_load_uniform)
1255          return true;
1256    }
1257
1258    /* XXX: this could have many more tests, such as when a sampler function is
1259     * called with dynamically uniform arguments.
1260     */
1261    return false;
1262 }
1263
1264 static void
1265 src_remove_all_uses(nir_src *src)
1266 {
1267    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1268       if (!src_is_valid(src))
1269          continue;
1270
1271       list_del(&src->use_link);
1272    }
1273 }
1274
1275 static void
1276 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1277 {
1278    for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1279       if (!src_is_valid(src))
1280          continue;
1281
1282       if (parent_instr) {
1283          src->parent_instr = parent_instr;
1284          if (src->is_ssa)
1285             list_addtail(&src->use_link, &src->ssa->uses);
1286          else
1287             list_addtail(&src->use_link, &src->reg.reg->uses);
1288       } else {
1289          assert(parent_if);
1290          src->parent_if = parent_if;
1291          if (src->is_ssa)
1292             list_addtail(&src->use_link, &src->ssa->if_uses);
1293          else
1294             list_addtail(&src->use_link, &src->reg.reg->if_uses);
1295       }
1296    }
1297 }
1298
1299 void
1300 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1301 {
1302    assert(!src_is_valid(src) || src->parent_instr == instr);
1303
1304    src_remove_all_uses(src);
1305    *src = new_src;
1306    src_add_all_uses(src, instr, NULL);
1307 }
1308
1309 void
1310 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1311 {
1312    assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1313
1314    src_remove_all_uses(dest);
1315    src_remove_all_uses(src);
1316    *dest = *src;
1317    *src = NIR_SRC_INIT;
1318    src_add_all_uses(dest, dest_instr, NULL);
1319 }
1320
1321 void
1322 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1323 {
1324    nir_src *src = &if_stmt->condition;
1325    assert(!src_is_valid(src) || src->parent_if == if_stmt);
1326
1327    src_remove_all_uses(src);
1328    *src = new_src;
1329    src_add_all_uses(src, NULL, if_stmt);
1330 }
1331
1332 void
1333 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1334 {
1335    if (dest->is_ssa) {
1336       /* We can only overwrite an SSA destination if it has no uses. */
1337       assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1338    } else {
1339       list_del(&dest->reg.def_link);
1340       if (dest->reg.indirect)
1341          src_remove_all_uses(dest->reg.indirect);
1342    }
1343
1344    /* We can't re-write with an SSA def */
1345    assert(!new_dest.is_ssa);
1346
1347    nir_dest_copy(dest, &new_dest, instr);
1348
1349    dest->reg.parent_instr = instr;
1350    list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1351
1352    if (dest->reg.indirect)
1353       src_add_all_uses(dest->reg.indirect, instr, NULL);
1354 }
1355
1356 void
1357 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1358                  unsigned num_components, const char *name)
1359 {
1360    def->name = name;
1361    def->parent_instr = instr;
1362    list_inithead(&def->uses);
1363    list_inithead(&def->if_uses);
1364    def->num_components = num_components;
1365
1366    if (instr->block) {
1367       nir_function_impl *impl =
1368          nir_cf_node_get_function(&instr->block->cf_node);
1369
1370       def->index = impl->ssa_alloc++;
1371    } else {
1372       def->index = UINT_MAX;
1373    }
1374 }
1375
1376 void
1377 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1378                  unsigned num_components, const char *name)
1379 {
1380    dest->is_ssa = true;
1381    nir_ssa_def_init(instr, &dest->ssa, num_components, name);
1382 }
1383
1384 void
1385 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1386 {
1387    assert(!new_src.is_ssa || def != new_src.ssa);
1388
1389    nir_foreach_use_safe(def, use_src)
1390       nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1391
1392    nir_foreach_if_use_safe(def, use_src)
1393       nir_if_rewrite_condition(use_src->parent_if, new_src);
1394 }
1395
1396 static bool
1397 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1398 {
1399    assert(start->block == end->block);
1400
1401    if (between->block != start->block)
1402       return false;
1403
1404    /* Search backwards looking for "between" */
1405    while (start != end) {
1406       if (between == end)
1407          return true;
1408
1409       end = nir_instr_prev(end);
1410       assert(end);
1411    }
1412
1413    return false;
1414 }
1415
1416 /* Replaces all uses of the given SSA def with the given source but only if
1417  * the use comes after the after_me instruction.  This can be useful if you
1418  * are emitting code to fix up the result of some instruction: you can freely
1419  * use the result in that code and then call rewrite_uses_after and pass the
1420  * last fixup instruction as after_me and it will replace all of the uses you
1421  * want without touching the fixup code.
1422  *
1423  * This function assumes that after_me is in the same block as
1424  * def->parent_instr and that after_me comes after def->parent_instr.
1425  */
1426 void
1427 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1428                                nir_instr *after_me)
1429 {
1430    assert(!new_src.is_ssa || def != new_src.ssa);
1431
1432    nir_foreach_use_safe(def, use_src) {
1433       assert(use_src->parent_instr != def->parent_instr);
1434       /* Since def already dominates all of its uses, the only way a use can
1435        * not be dominated by after_me is if it is between def and after_me in
1436        * the instruction list.
1437        */
1438       if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1439          nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1440    }
1441
1442    nir_foreach_if_use_safe(def, use_src)
1443       nir_if_rewrite_condition(use_src->parent_if, new_src);
1444 }
1445
1446 static bool foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1447                             bool reverse, void *state);
1448
1449 static inline bool
1450 foreach_if(nir_if *if_stmt, nir_foreach_block_cb cb, bool reverse, void *state)
1451 {
1452    if (reverse) {
1453       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1454                                       &if_stmt->else_list) {
1455          if (!foreach_cf_node(node, cb, reverse, state))
1456             return false;
1457       }
1458
1459       foreach_list_typed_reverse_safe(nir_cf_node, node, node,
1460                                       &if_stmt->then_list) {
1461          if (!foreach_cf_node(node, cb, reverse, state))
1462             return false;
1463       }
1464    } else {
1465       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->then_list) {
1466          if (!foreach_cf_node(node, cb, reverse, state))
1467             return false;
1468       }
1469
1470       foreach_list_typed_safe(nir_cf_node, node, node, &if_stmt->else_list) {
1471          if (!foreach_cf_node(node, cb, reverse, state))
1472             return false;
1473       }
1474    }
1475
1476    return true;
1477 }
1478
1479 static inline bool
1480 foreach_loop(nir_loop *loop, nir_foreach_block_cb cb, bool reverse, void *state)
1481 {
1482    if (reverse) {
1483       foreach_list_typed_reverse_safe(nir_cf_node, node, node, &loop->body) {
1484          if (!foreach_cf_node(node, cb, reverse, state))
1485             return false;
1486       }
1487    } else {
1488       foreach_list_typed_safe(nir_cf_node, node, node, &loop->body) {
1489          if (!foreach_cf_node(node, cb, reverse, state))
1490             return false;
1491       }
1492    }
1493
1494    return true;
1495 }
1496
1497 static bool
1498 foreach_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1499                 bool reverse, void *state)
1500 {
1501    switch (node->type) {
1502    case nir_cf_node_block:
1503       return cb(nir_cf_node_as_block(node), state);
1504    case nir_cf_node_if:
1505       return foreach_if(nir_cf_node_as_if(node), cb, reverse, state);
1506    case nir_cf_node_loop:
1507       return foreach_loop(nir_cf_node_as_loop(node), cb, reverse, state);
1508       break;
1509
1510    default:
1511       unreachable("Invalid CFG node type");
1512       break;
1513    }
1514
1515    return false;
1516 }
1517
1518 bool
1519 nir_foreach_block_in_cf_node(nir_cf_node *node, nir_foreach_block_cb cb,
1520                              void *state)
1521 {
1522    return foreach_cf_node(node, cb, false, state);
1523 }
1524
1525 bool
1526 nir_foreach_block(nir_function_impl *impl, nir_foreach_block_cb cb, void *state)
1527 {
1528    foreach_list_typed_safe(nir_cf_node, node, node, &impl->body) {
1529       if (!foreach_cf_node(node, cb, false, state))
1530          return false;
1531    }
1532
1533    return cb(impl->end_block, state);
1534 }
1535
1536 bool
1537 nir_foreach_block_reverse(nir_function_impl *impl, nir_foreach_block_cb cb,
1538                           void *state)
1539 {
1540    if (!cb(impl->end_block, state))
1541       return false;
1542
1543    foreach_list_typed_reverse_safe(nir_cf_node, node, node, &impl->body) {
1544       if (!foreach_cf_node(node, cb, true, state))
1545          return false;
1546    }
1547
1548    return true;
1549 }
1550
1551 nir_if *
1552 nir_block_get_following_if(nir_block *block)
1553 {
1554    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1555       return NULL;
1556
1557    if (nir_cf_node_is_last(&block->cf_node))
1558       return NULL;
1559
1560    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1561
1562    if (next_node->type != nir_cf_node_if)
1563       return NULL;
1564
1565    return nir_cf_node_as_if(next_node);
1566 }
1567
1568 nir_loop *
1569 nir_block_get_following_loop(nir_block *block)
1570 {
1571    if (exec_node_is_tail_sentinel(&block->cf_node.node))
1572       return NULL;
1573
1574    if (nir_cf_node_is_last(&block->cf_node))
1575       return NULL;
1576
1577    nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1578
1579    if (next_node->type != nir_cf_node_loop)
1580       return NULL;
1581
1582    return nir_cf_node_as_loop(next_node);
1583 }
1584 static bool
1585 index_block(nir_block *block, void *state)
1586 {
1587    unsigned *index = state;
1588    block->index = (*index)++;
1589    return true;
1590 }
1591
1592 void
1593 nir_index_blocks(nir_function_impl *impl)
1594 {
1595    unsigned index = 0;
1596
1597    if (impl->valid_metadata & nir_metadata_block_index)
1598       return;
1599
1600    nir_foreach_block(impl, index_block, &index);
1601
1602    impl->num_blocks = index;
1603 }
1604
1605 static bool
1606 index_ssa_def_cb(nir_ssa_def *def, void *state)
1607 {
1608    unsigned *index = (unsigned *) state;
1609    def->index = (*index)++;
1610
1611    return true;
1612 }
1613
1614 static bool
1615 index_ssa_block(nir_block *block, void *state)
1616 {
1617    nir_foreach_instr(block, instr)
1618       nir_foreach_ssa_def(instr, index_ssa_def_cb, state);
1619
1620    return true;
1621 }
1622
1623 /**
1624  * The indices are applied top-to-bottom which has the very nice property
1625  * that, if A dominates B, then A->index <= B->index.
1626  */
1627 void
1628 nir_index_ssa_defs(nir_function_impl *impl)
1629 {
1630    unsigned index = 0;
1631    nir_foreach_block(impl, index_ssa_block, &index);
1632    impl->ssa_alloc = index;
1633 }
1634
1635 static bool
1636 index_instrs_block(nir_block *block, void *state)
1637 {
1638    unsigned *index = state;
1639    nir_foreach_instr(block, instr)
1640       instr->index = (*index)++;
1641
1642    return true;
1643 }
1644
1645 /**
1646  * The indices are applied top-to-bottom which has the very nice property
1647  * that, if A dominates B, then A->index <= B->index.
1648  */
1649 unsigned
1650 nir_index_instrs(nir_function_impl *impl)
1651 {
1652    unsigned index = 0;
1653    nir_foreach_block(impl, index_instrs_block, &index);
1654    return index;
1655 }
1656
1657 nir_intrinsic_op
1658 nir_intrinsic_from_system_value(gl_system_value val)
1659 {
1660    switch (val) {
1661    case SYSTEM_VALUE_VERTEX_ID:
1662       return nir_intrinsic_load_vertex_id;
1663    case SYSTEM_VALUE_INSTANCE_ID:
1664       return nir_intrinsic_load_instance_id;
1665    case SYSTEM_VALUE_DRAW_ID:
1666       return nir_intrinsic_load_draw_id;
1667    case SYSTEM_VALUE_BASE_INSTANCE:
1668       return nir_intrinsic_load_base_instance;
1669    case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1670       return nir_intrinsic_load_vertex_id_zero_base;
1671    case SYSTEM_VALUE_BASE_VERTEX:
1672       return nir_intrinsic_load_base_vertex;
1673    case SYSTEM_VALUE_INVOCATION_ID:
1674       return nir_intrinsic_load_invocation_id;
1675    case SYSTEM_VALUE_FRONT_FACE:
1676       return nir_intrinsic_load_front_face;
1677    case SYSTEM_VALUE_SAMPLE_ID:
1678       return nir_intrinsic_load_sample_id;
1679    case SYSTEM_VALUE_SAMPLE_POS:
1680       return nir_intrinsic_load_sample_pos;
1681    case SYSTEM_VALUE_SAMPLE_MASK_IN:
1682       return nir_intrinsic_load_sample_mask_in;
1683    case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1684       return nir_intrinsic_load_local_invocation_id;
1685    case SYSTEM_VALUE_WORK_GROUP_ID:
1686       return nir_intrinsic_load_work_group_id;
1687    case SYSTEM_VALUE_NUM_WORK_GROUPS:
1688       return nir_intrinsic_load_num_work_groups;
1689    case SYSTEM_VALUE_PRIMITIVE_ID:
1690       return nir_intrinsic_load_primitive_id;
1691    case SYSTEM_VALUE_TESS_COORD:
1692       return nir_intrinsic_load_tess_coord;
1693    case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1694       return nir_intrinsic_load_tess_level_outer;
1695    case SYSTEM_VALUE_TESS_LEVEL_INNER:
1696       return nir_intrinsic_load_tess_level_inner;
1697    case SYSTEM_VALUE_VERTICES_IN:
1698       return nir_intrinsic_load_patch_vertices_in;
1699    case SYSTEM_VALUE_HELPER_INVOCATION:
1700       return nir_intrinsic_load_helper_invocation;
1701    default:
1702       unreachable("system value does not directly correspond to intrinsic");
1703    }
1704 }
1705
1706 gl_system_value
1707 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1708 {
1709    switch (intrin) {
1710    case nir_intrinsic_load_vertex_id:
1711       return SYSTEM_VALUE_VERTEX_ID;
1712    case nir_intrinsic_load_instance_id:
1713       return SYSTEM_VALUE_INSTANCE_ID;
1714    case nir_intrinsic_load_draw_id:
1715       return SYSTEM_VALUE_DRAW_ID;
1716    case nir_intrinsic_load_base_instance:
1717       return SYSTEM_VALUE_BASE_INSTANCE;
1718    case nir_intrinsic_load_vertex_id_zero_base:
1719       return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1720    case nir_intrinsic_load_base_vertex:
1721       return SYSTEM_VALUE_BASE_VERTEX;
1722    case nir_intrinsic_load_invocation_id:
1723       return SYSTEM_VALUE_INVOCATION_ID;
1724    case nir_intrinsic_load_front_face:
1725       return SYSTEM_VALUE_FRONT_FACE;
1726    case nir_intrinsic_load_sample_id:
1727       return SYSTEM_VALUE_SAMPLE_ID;
1728    case nir_intrinsic_load_sample_pos:
1729       return SYSTEM_VALUE_SAMPLE_POS;
1730    case nir_intrinsic_load_sample_mask_in:
1731       return SYSTEM_VALUE_SAMPLE_MASK_IN;
1732    case nir_intrinsic_load_local_invocation_id:
1733       return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1734    case nir_intrinsic_load_num_work_groups:
1735       return SYSTEM_VALUE_NUM_WORK_GROUPS;
1736    case nir_intrinsic_load_work_group_id:
1737       return SYSTEM_VALUE_WORK_GROUP_ID;
1738    case nir_intrinsic_load_primitive_id:
1739       return SYSTEM_VALUE_PRIMITIVE_ID;
1740    case nir_intrinsic_load_tess_coord:
1741       return SYSTEM_VALUE_TESS_COORD;
1742    case nir_intrinsic_load_tess_level_outer:
1743       return SYSTEM_VALUE_TESS_LEVEL_OUTER;
1744    case nir_intrinsic_load_tess_level_inner:
1745       return SYSTEM_VALUE_TESS_LEVEL_INNER;
1746    case nir_intrinsic_load_patch_vertices_in:
1747       return SYSTEM_VALUE_VERTICES_IN;
1748    case nir_intrinsic_load_helper_invocation:
1749       return SYSTEM_VALUE_HELPER_INVOCATION;
1750    default:
1751       unreachable("intrinsic doesn't produce a system value");
1752    }
1753 }