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nir: Add a find_variable_with_[driver_]location helper
[mesa.git] / src / compiler / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_builder.h"
30 #include "nir_control_flow_private.h"
31 #include "util/half_float.h"
32 #include <limits.h>
33 #include <assert.h>
34 #include <math.h>
35 #include "util/u_math.h"
36
37 #include "main/menums.h" /* BITFIELD64_MASK */
38
39 nir_shader *
40 nir_shader_create(void *mem_ctx,
41 gl_shader_stage stage,
42 const nir_shader_compiler_options *options,
43 shader_info *si)
44 {
45 nir_shader *shader = rzalloc(mem_ctx, nir_shader);
46
47 exec_list_make_empty(&shader->variables);
48
49 shader->options = options;
50
51 if (si) {
52 assert(si->stage == stage);
53 shader->info = *si;
54 } else {
55 shader->info.stage = stage;
56 }
57
58 exec_list_make_empty(&shader->functions);
59
60 shader->num_inputs = 0;
61 shader->num_outputs = 0;
62 shader->num_uniforms = 0;
63 shader->num_shared = 0;
64
65 return shader;
66 }
67
68 static nir_register *
69 reg_create(void *mem_ctx, struct exec_list *list)
70 {
71 nir_register *reg = ralloc(mem_ctx, nir_register);
72
73 list_inithead(&reg->uses);
74 list_inithead(&reg->defs);
75 list_inithead(&reg->if_uses);
76
77 reg->num_components = 0;
78 reg->bit_size = 32;
79 reg->num_array_elems = 0;
80 reg->name = NULL;
81
82 exec_list_push_tail(list, &reg->node);
83
84 return reg;
85 }
86
87 nir_register *
88 nir_local_reg_create(nir_function_impl *impl)
89 {
90 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
91 reg->index = impl->reg_alloc++;
92
93 return reg;
94 }
95
96 void
97 nir_reg_remove(nir_register *reg)
98 {
99 exec_node_remove(&reg->node);
100 }
101
102 void
103 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
104 {
105 switch (var->data.mode) {
106 case nir_var_function_temp:
107 assert(!"nir_shader_add_variable cannot be used for local variables");
108 return;
109
110 case nir_var_shader_temp:
111 case nir_var_shader_in:
112 case nir_var_shader_out:
113 case nir_var_uniform:
114 case nir_var_mem_ubo:
115 case nir_var_mem_ssbo:
116 case nir_var_mem_shared:
117 case nir_var_system_value:
118 break;
119
120 case nir_var_mem_global:
121 assert(!"nir_shader_add_variable cannot be used for global memory");
122 return;
123
124 case nir_var_mem_push_const:
125 assert(!"nir_var_push_constant is not supposed to be used for variables");
126 return;
127
128 default:
129 assert(!"invalid mode");
130 return;
131 }
132
133 exec_list_push_tail(&shader->variables, &var->node);
134 }
135
136 nir_variable *
137 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
138 const struct glsl_type *type, const char *name)
139 {
140 nir_variable *var = rzalloc(shader, nir_variable);
141 var->name = ralloc_strdup(var, name);
142 var->type = type;
143 var->data.mode = mode;
144 var->data.how_declared = nir_var_declared_normally;
145
146 if ((mode == nir_var_shader_in &&
147 shader->info.stage != MESA_SHADER_VERTEX) ||
148 (mode == nir_var_shader_out &&
149 shader->info.stage != MESA_SHADER_FRAGMENT))
150 var->data.interpolation = INTERP_MODE_SMOOTH;
151
152 if (mode == nir_var_shader_in || mode == nir_var_uniform)
153 var->data.read_only = true;
154
155 nir_shader_add_variable(shader, var);
156
157 return var;
158 }
159
160 nir_variable *
161 nir_local_variable_create(nir_function_impl *impl,
162 const struct glsl_type *type, const char *name)
163 {
164 nir_variable *var = rzalloc(impl->function->shader, nir_variable);
165 var->name = ralloc_strdup(var, name);
166 var->type = type;
167 var->data.mode = nir_var_function_temp;
168
169 nir_function_impl_add_variable(impl, var);
170
171 return var;
172 }
173
174 nir_variable *
175 nir_find_variable_with_location(nir_shader *shader,
176 nir_variable_mode mode,
177 unsigned location)
178 {
179 assert(util_bitcount(mode) == 1 && mode != nir_var_function_temp);
180 nir_foreach_variable_with_modes(var, shader, mode) {
181 if (var->data.location == location)
182 return var;
183 }
184 return NULL;
185 }
186
187 nir_variable *
188 nir_find_variable_with_driver_location(nir_shader *shader,
189 nir_variable_mode mode,
190 unsigned location)
191 {
192 assert(util_bitcount(mode) == 1 && mode != nir_var_function_temp);
193 nir_foreach_variable_with_modes(var, shader, mode) {
194 if (var->data.driver_location == location)
195 return var;
196 }
197 return NULL;
198 }
199
200 nir_function *
201 nir_function_create(nir_shader *shader, const char *name)
202 {
203 nir_function *func = ralloc(shader, nir_function);
204
205 exec_list_push_tail(&shader->functions, &func->node);
206
207 func->name = ralloc_strdup(func, name);
208 func->shader = shader;
209 func->num_params = 0;
210 func->params = NULL;
211 func->impl = NULL;
212 func->is_entrypoint = false;
213
214 return func;
215 }
216
217 /* NOTE: if the instruction you are copying a src to is already added
218 * to the IR, use nir_instr_rewrite_src() instead.
219 */
220 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
221 {
222 dest->is_ssa = src->is_ssa;
223 if (src->is_ssa) {
224 dest->ssa = src->ssa;
225 } else {
226 dest->reg.base_offset = src->reg.base_offset;
227 dest->reg.reg = src->reg.reg;
228 if (src->reg.indirect) {
229 dest->reg.indirect = ralloc(mem_ctx, nir_src);
230 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
231 } else {
232 dest->reg.indirect = NULL;
233 }
234 }
235 }
236
237 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
238 {
239 /* Copying an SSA definition makes no sense whatsoever. */
240 assert(!src->is_ssa);
241
242 dest->is_ssa = false;
243
244 dest->reg.base_offset = src->reg.base_offset;
245 dest->reg.reg = src->reg.reg;
246 if (src->reg.indirect) {
247 dest->reg.indirect = ralloc(instr, nir_src);
248 nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
249 } else {
250 dest->reg.indirect = NULL;
251 }
252 }
253
254 void
255 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
256 nir_alu_instr *instr)
257 {
258 nir_src_copy(&dest->src, &src->src, &instr->instr);
259 dest->abs = src->abs;
260 dest->negate = src->negate;
261 for (unsigned i = 0; i < NIR_MAX_VEC_COMPONENTS; i++)
262 dest->swizzle[i] = src->swizzle[i];
263 }
264
265 void
266 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
267 nir_alu_instr *instr)
268 {
269 nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
270 dest->write_mask = src->write_mask;
271 dest->saturate = src->saturate;
272 }
273
274
275 static void
276 cf_init(nir_cf_node *node, nir_cf_node_type type)
277 {
278 exec_node_init(&node->node);
279 node->parent = NULL;
280 node->type = type;
281 }
282
283 nir_function_impl *
284 nir_function_impl_create_bare(nir_shader *shader)
285 {
286 nir_function_impl *impl = ralloc(shader, nir_function_impl);
287
288 impl->function = NULL;
289
290 cf_init(&impl->cf_node, nir_cf_node_function);
291
292 exec_list_make_empty(&impl->body);
293 exec_list_make_empty(&impl->registers);
294 exec_list_make_empty(&impl->locals);
295 impl->reg_alloc = 0;
296 impl->ssa_alloc = 0;
297 impl->valid_metadata = nir_metadata_none;
298
299 /* create start & end blocks */
300 nir_block *start_block = nir_block_create(shader);
301 nir_block *end_block = nir_block_create(shader);
302 start_block->cf_node.parent = &impl->cf_node;
303 end_block->cf_node.parent = &impl->cf_node;
304 impl->end_block = end_block;
305
306 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
307
308 start_block->successors[0] = end_block;
309 _mesa_set_add(end_block->predecessors, start_block);
310 return impl;
311 }
312
313 nir_function_impl *
314 nir_function_impl_create(nir_function *function)
315 {
316 assert(function->impl == NULL);
317
318 nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
319
320 function->impl = impl;
321 impl->function = function;
322
323 return impl;
324 }
325
326 nir_block *
327 nir_block_create(nir_shader *shader)
328 {
329 nir_block *block = rzalloc(shader, nir_block);
330
331 cf_init(&block->cf_node, nir_cf_node_block);
332
333 block->successors[0] = block->successors[1] = NULL;
334 block->predecessors = _mesa_pointer_set_create(block);
335 block->imm_dom = NULL;
336 /* XXX maybe it would be worth it to defer allocation? This
337 * way it doesn't get allocated for shader refs that never run
338 * nir_calc_dominance? For example, state-tracker creates an
339 * initial IR, clones that, runs appropriate lowering pass, passes
340 * to driver which does common lowering/opt, and then stores ref
341 * which is later used to do state specific lowering and futher
342 * opt. Do any of the references not need dominance metadata?
343 */
344 block->dom_frontier = _mesa_pointer_set_create(block);
345
346 exec_list_make_empty(&block->instr_list);
347
348 return block;
349 }
350
351 static inline void
352 src_init(nir_src *src)
353 {
354 src->is_ssa = false;
355 src->reg.reg = NULL;
356 src->reg.indirect = NULL;
357 src->reg.base_offset = 0;
358 }
359
360 nir_if *
361 nir_if_create(nir_shader *shader)
362 {
363 nir_if *if_stmt = ralloc(shader, nir_if);
364
365 if_stmt->control = nir_selection_control_none;
366
367 cf_init(&if_stmt->cf_node, nir_cf_node_if);
368 src_init(&if_stmt->condition);
369
370 nir_block *then = nir_block_create(shader);
371 exec_list_make_empty(&if_stmt->then_list);
372 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
373 then->cf_node.parent = &if_stmt->cf_node;
374
375 nir_block *else_stmt = nir_block_create(shader);
376 exec_list_make_empty(&if_stmt->else_list);
377 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
378 else_stmt->cf_node.parent = &if_stmt->cf_node;
379
380 return if_stmt;
381 }
382
383 nir_loop *
384 nir_loop_create(nir_shader *shader)
385 {
386 nir_loop *loop = rzalloc(shader, nir_loop);
387
388 cf_init(&loop->cf_node, nir_cf_node_loop);
389
390 nir_block *body = nir_block_create(shader);
391 exec_list_make_empty(&loop->body);
392 exec_list_push_tail(&loop->body, &body->cf_node.node);
393 body->cf_node.parent = &loop->cf_node;
394
395 body->successors[0] = body;
396 _mesa_set_add(body->predecessors, body);
397
398 return loop;
399 }
400
401 static void
402 instr_init(nir_instr *instr, nir_instr_type type)
403 {
404 instr->type = type;
405 instr->block = NULL;
406 exec_node_init(&instr->node);
407 }
408
409 static void
410 dest_init(nir_dest *dest)
411 {
412 dest->is_ssa = false;
413 dest->reg.reg = NULL;
414 dest->reg.indirect = NULL;
415 dest->reg.base_offset = 0;
416 }
417
418 static void
419 alu_dest_init(nir_alu_dest *dest)
420 {
421 dest_init(&dest->dest);
422 dest->saturate = false;
423 dest->write_mask = 0xf;
424 }
425
426 static void
427 alu_src_init(nir_alu_src *src)
428 {
429 src_init(&src->src);
430 src->abs = src->negate = false;
431 for (int i = 0; i < NIR_MAX_VEC_COMPONENTS; ++i)
432 src->swizzle[i] = i;
433 }
434
435 nir_alu_instr *
436 nir_alu_instr_create(nir_shader *shader, nir_op op)
437 {
438 unsigned num_srcs = nir_op_infos[op].num_inputs;
439 /* TODO: don't use rzalloc */
440 nir_alu_instr *instr =
441 rzalloc_size(shader,
442 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
443
444 instr_init(&instr->instr, nir_instr_type_alu);
445 instr->op = op;
446 alu_dest_init(&instr->dest);
447 for (unsigned i = 0; i < num_srcs; i++)
448 alu_src_init(&instr->src[i]);
449
450 return instr;
451 }
452
453 nir_deref_instr *
454 nir_deref_instr_create(nir_shader *shader, nir_deref_type deref_type)
455 {
456 nir_deref_instr *instr =
457 rzalloc_size(shader, sizeof(nir_deref_instr));
458
459 instr_init(&instr->instr, nir_instr_type_deref);
460
461 instr->deref_type = deref_type;
462 if (deref_type != nir_deref_type_var)
463 src_init(&instr->parent);
464
465 if (deref_type == nir_deref_type_array ||
466 deref_type == nir_deref_type_ptr_as_array)
467 src_init(&instr->arr.index);
468
469 dest_init(&instr->dest);
470
471 return instr;
472 }
473
474 nir_jump_instr *
475 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
476 {
477 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
478 instr_init(&instr->instr, nir_instr_type_jump);
479 instr->type = type;
480 return instr;
481 }
482
483 nir_load_const_instr *
484 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
485 unsigned bit_size)
486 {
487 nir_load_const_instr *instr =
488 rzalloc_size(shader, sizeof(*instr) + num_components * sizeof(*instr->value));
489 instr_init(&instr->instr, nir_instr_type_load_const);
490
491 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
492
493 return instr;
494 }
495
496 nir_intrinsic_instr *
497 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
498 {
499 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
500 /* TODO: don't use rzalloc */
501 nir_intrinsic_instr *instr =
502 rzalloc_size(shader,
503 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
504
505 instr_init(&instr->instr, nir_instr_type_intrinsic);
506 instr->intrinsic = op;
507
508 if (nir_intrinsic_infos[op].has_dest)
509 dest_init(&instr->dest);
510
511 for (unsigned i = 0; i < num_srcs; i++)
512 src_init(&instr->src[i]);
513
514 return instr;
515 }
516
517 nir_call_instr *
518 nir_call_instr_create(nir_shader *shader, nir_function *callee)
519 {
520 const unsigned num_params = callee->num_params;
521 nir_call_instr *instr =
522 rzalloc_size(shader, sizeof(*instr) +
523 num_params * sizeof(instr->params[0]));
524
525 instr_init(&instr->instr, nir_instr_type_call);
526 instr->callee = callee;
527 instr->num_params = num_params;
528 for (unsigned i = 0; i < num_params; i++)
529 src_init(&instr->params[i]);
530
531 return instr;
532 }
533
534 static int8_t default_tg4_offsets[4][2] =
535 {
536 { 0, 1 },
537 { 1, 1 },
538 { 1, 0 },
539 { 0, 0 },
540 };
541
542 nir_tex_instr *
543 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
544 {
545 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
546 instr_init(&instr->instr, nir_instr_type_tex);
547
548 dest_init(&instr->dest);
549
550 instr->num_srcs = num_srcs;
551 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
552 for (unsigned i = 0; i < num_srcs; i++)
553 src_init(&instr->src[i].src);
554
555 instr->texture_index = 0;
556 instr->sampler_index = 0;
557 memcpy(instr->tg4_offsets, default_tg4_offsets, sizeof(instr->tg4_offsets));
558
559 return instr;
560 }
561
562 void
563 nir_tex_instr_add_src(nir_tex_instr *tex,
564 nir_tex_src_type src_type,
565 nir_src src)
566 {
567 nir_tex_src *new_srcs = rzalloc_array(tex, nir_tex_src,
568 tex->num_srcs + 1);
569
570 for (unsigned i = 0; i < tex->num_srcs; i++) {
571 new_srcs[i].src_type = tex->src[i].src_type;
572 nir_instr_move_src(&tex->instr, &new_srcs[i].src,
573 &tex->src[i].src);
574 }
575
576 ralloc_free(tex->src);
577 tex->src = new_srcs;
578
579 tex->src[tex->num_srcs].src_type = src_type;
580 nir_instr_rewrite_src(&tex->instr, &tex->src[tex->num_srcs].src, src);
581 tex->num_srcs++;
582 }
583
584 void
585 nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx)
586 {
587 assert(src_idx < tex->num_srcs);
588
589 /* First rewrite the source to NIR_SRC_INIT */
590 nir_instr_rewrite_src(&tex->instr, &tex->src[src_idx].src, NIR_SRC_INIT);
591
592 /* Now, move all of the other sources down */
593 for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) {
594 tex->src[i-1].src_type = tex->src[i].src_type;
595 nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src);
596 }
597 tex->num_srcs--;
598 }
599
600 bool
601 nir_tex_instr_has_explicit_tg4_offsets(nir_tex_instr *tex)
602 {
603 if (tex->op != nir_texop_tg4)
604 return false;
605 return memcmp(tex->tg4_offsets, default_tg4_offsets,
606 sizeof(tex->tg4_offsets)) != 0;
607 }
608
609 nir_phi_instr *
610 nir_phi_instr_create(nir_shader *shader)
611 {
612 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
613 instr_init(&instr->instr, nir_instr_type_phi);
614
615 dest_init(&instr->dest);
616 exec_list_make_empty(&instr->srcs);
617 return instr;
618 }
619
620 nir_parallel_copy_instr *
621 nir_parallel_copy_instr_create(nir_shader *shader)
622 {
623 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
624 instr_init(&instr->instr, nir_instr_type_parallel_copy);
625
626 exec_list_make_empty(&instr->entries);
627
628 return instr;
629 }
630
631 nir_ssa_undef_instr *
632 nir_ssa_undef_instr_create(nir_shader *shader,
633 unsigned num_components,
634 unsigned bit_size)
635 {
636 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
637 instr_init(&instr->instr, nir_instr_type_ssa_undef);
638
639 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
640
641 return instr;
642 }
643
644 static nir_const_value
645 const_value_float(double d, unsigned bit_size)
646 {
647 nir_const_value v;
648 memset(&v, 0, sizeof(v));
649 switch (bit_size) {
650 case 16: v.u16 = _mesa_float_to_half(d); break;
651 case 32: v.f32 = d; break;
652 case 64: v.f64 = d; break;
653 default:
654 unreachable("Invalid bit size");
655 }
656 return v;
657 }
658
659 static nir_const_value
660 const_value_int(int64_t i, unsigned bit_size)
661 {
662 nir_const_value v;
663 memset(&v, 0, sizeof(v));
664 switch (bit_size) {
665 case 1: v.b = i & 1; break;
666 case 8: v.i8 = i; break;
667 case 16: v.i16 = i; break;
668 case 32: v.i32 = i; break;
669 case 64: v.i64 = i; break;
670 default:
671 unreachable("Invalid bit size");
672 }
673 return v;
674 }
675
676 nir_const_value
677 nir_alu_binop_identity(nir_op binop, unsigned bit_size)
678 {
679 const int64_t max_int = (1ull << (bit_size - 1)) - 1;
680 const int64_t min_int = -max_int - 1;
681 switch (binop) {
682 case nir_op_iadd:
683 return const_value_int(0, bit_size);
684 case nir_op_fadd:
685 return const_value_float(0, bit_size);
686 case nir_op_imul:
687 return const_value_int(1, bit_size);
688 case nir_op_fmul:
689 return const_value_float(1, bit_size);
690 case nir_op_imin:
691 return const_value_int(max_int, bit_size);
692 case nir_op_umin:
693 return const_value_int(~0ull, bit_size);
694 case nir_op_fmin:
695 return const_value_float(INFINITY, bit_size);
696 case nir_op_imax:
697 return const_value_int(min_int, bit_size);
698 case nir_op_umax:
699 return const_value_int(0, bit_size);
700 case nir_op_fmax:
701 return const_value_float(-INFINITY, bit_size);
702 case nir_op_iand:
703 return const_value_int(~0ull, bit_size);
704 case nir_op_ior:
705 return const_value_int(0, bit_size);
706 case nir_op_ixor:
707 return const_value_int(0, bit_size);
708 default:
709 unreachable("Invalid reduction operation");
710 }
711 }
712
713 nir_function_impl *
714 nir_cf_node_get_function(nir_cf_node *node)
715 {
716 while (node->type != nir_cf_node_function) {
717 node = node->parent;
718 }
719
720 return nir_cf_node_as_function(node);
721 }
722
723 /* Reduces a cursor by trying to convert everything to after and trying to
724 * go up to block granularity when possible.
725 */
726 static nir_cursor
727 reduce_cursor(nir_cursor cursor)
728 {
729 switch (cursor.option) {
730 case nir_cursor_before_block:
731 assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
732 nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
733 if (exec_list_is_empty(&cursor.block->instr_list)) {
734 /* Empty block. After is as good as before. */
735 cursor.option = nir_cursor_after_block;
736 }
737 return cursor;
738
739 case nir_cursor_after_block:
740 return cursor;
741
742 case nir_cursor_before_instr: {
743 nir_instr *prev_instr = nir_instr_prev(cursor.instr);
744 if (prev_instr) {
745 /* Before this instruction is after the previous */
746 cursor.instr = prev_instr;
747 cursor.option = nir_cursor_after_instr;
748 } else {
749 /* No previous instruction. Switch to before block */
750 cursor.block = cursor.instr->block;
751 cursor.option = nir_cursor_before_block;
752 }
753 return reduce_cursor(cursor);
754 }
755
756 case nir_cursor_after_instr:
757 if (nir_instr_next(cursor.instr) == NULL) {
758 /* This is the last instruction, switch to after block */
759 cursor.option = nir_cursor_after_block;
760 cursor.block = cursor.instr->block;
761 }
762 return cursor;
763
764 default:
765 unreachable("Inavlid cursor option");
766 }
767 }
768
769 bool
770 nir_cursors_equal(nir_cursor a, nir_cursor b)
771 {
772 /* Reduced cursors should be unique */
773 a = reduce_cursor(a);
774 b = reduce_cursor(b);
775
776 return a.block == b.block && a.option == b.option;
777 }
778
779 static bool
780 add_use_cb(nir_src *src, void *state)
781 {
782 nir_instr *instr = state;
783
784 src->parent_instr = instr;
785 list_addtail(&src->use_link,
786 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
787
788 return true;
789 }
790
791 static bool
792 add_ssa_def_cb(nir_ssa_def *def, void *state)
793 {
794 nir_instr *instr = state;
795
796 if (instr->block && def->index == UINT_MAX) {
797 nir_function_impl *impl =
798 nir_cf_node_get_function(&instr->block->cf_node);
799
800 def->index = impl->ssa_alloc++;
801 }
802
803 return true;
804 }
805
806 static bool
807 add_reg_def_cb(nir_dest *dest, void *state)
808 {
809 nir_instr *instr = state;
810
811 if (!dest->is_ssa) {
812 dest->reg.parent_instr = instr;
813 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
814 }
815
816 return true;
817 }
818
819 static void
820 add_defs_uses(nir_instr *instr)
821 {
822 nir_foreach_src(instr, add_use_cb, instr);
823 nir_foreach_dest(instr, add_reg_def_cb, instr);
824 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
825 }
826
827 void
828 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
829 {
830 switch (cursor.option) {
831 case nir_cursor_before_block:
832 /* Only allow inserting jumps into empty blocks. */
833 if (instr->type == nir_instr_type_jump)
834 assert(exec_list_is_empty(&cursor.block->instr_list));
835
836 instr->block = cursor.block;
837 add_defs_uses(instr);
838 exec_list_push_head(&cursor.block->instr_list, &instr->node);
839 break;
840 case nir_cursor_after_block: {
841 /* Inserting instructions after a jump is illegal. */
842 nir_instr *last = nir_block_last_instr(cursor.block);
843 assert(last == NULL || last->type != nir_instr_type_jump);
844 (void) last;
845
846 instr->block = cursor.block;
847 add_defs_uses(instr);
848 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
849 break;
850 }
851 case nir_cursor_before_instr:
852 assert(instr->type != nir_instr_type_jump);
853 instr->block = cursor.instr->block;
854 add_defs_uses(instr);
855 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
856 break;
857 case nir_cursor_after_instr:
858 /* Inserting instructions after a jump is illegal. */
859 assert(cursor.instr->type != nir_instr_type_jump);
860
861 /* Only allow inserting jumps at the end of the block. */
862 if (instr->type == nir_instr_type_jump)
863 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
864
865 instr->block = cursor.instr->block;
866 add_defs_uses(instr);
867 exec_node_insert_after(&cursor.instr->node, &instr->node);
868 break;
869 }
870
871 if (instr->type == nir_instr_type_jump)
872 nir_handle_add_jump(instr->block);
873 }
874
875 static bool
876 src_is_valid(const nir_src *src)
877 {
878 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
879 }
880
881 static bool
882 remove_use_cb(nir_src *src, void *state)
883 {
884 (void) state;
885
886 if (src_is_valid(src))
887 list_del(&src->use_link);
888
889 return true;
890 }
891
892 static bool
893 remove_def_cb(nir_dest *dest, void *state)
894 {
895 (void) state;
896
897 if (!dest->is_ssa)
898 list_del(&dest->reg.def_link);
899
900 return true;
901 }
902
903 static void
904 remove_defs_uses(nir_instr *instr)
905 {
906 nir_foreach_dest(instr, remove_def_cb, instr);
907 nir_foreach_src(instr, remove_use_cb, instr);
908 }
909
910 void nir_instr_remove_v(nir_instr *instr)
911 {
912 remove_defs_uses(instr);
913 exec_node_remove(&instr->node);
914
915 if (instr->type == nir_instr_type_jump) {
916 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
917 nir_handle_remove_jump(instr->block, jump_instr->type);
918 }
919 }
920
921 /*@}*/
922
923 void
924 nir_index_local_regs(nir_function_impl *impl)
925 {
926 unsigned index = 0;
927 foreach_list_typed(nir_register, reg, node, &impl->registers) {
928 reg->index = index++;
929 }
930 impl->reg_alloc = index;
931 }
932
933 static bool
934 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
935 {
936 return cb(&instr->dest.dest, state);
937 }
938
939 static bool
940 visit_deref_dest(nir_deref_instr *instr, nir_foreach_dest_cb cb, void *state)
941 {
942 return cb(&instr->dest, state);
943 }
944
945 static bool
946 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
947 void *state)
948 {
949 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
950 return cb(&instr->dest, state);
951
952 return true;
953 }
954
955 static bool
956 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
957 void *state)
958 {
959 return cb(&instr->dest, state);
960 }
961
962 static bool
963 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
964 {
965 return cb(&instr->dest, state);
966 }
967
968 static bool
969 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
970 nir_foreach_dest_cb cb, void *state)
971 {
972 nir_foreach_parallel_copy_entry(entry, instr) {
973 if (!cb(&entry->dest, state))
974 return false;
975 }
976
977 return true;
978 }
979
980 bool
981 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
982 {
983 switch (instr->type) {
984 case nir_instr_type_alu:
985 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
986 case nir_instr_type_deref:
987 return visit_deref_dest(nir_instr_as_deref(instr), cb, state);
988 case nir_instr_type_intrinsic:
989 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
990 case nir_instr_type_tex:
991 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
992 case nir_instr_type_phi:
993 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
994 case nir_instr_type_parallel_copy:
995 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
996 cb, state);
997
998 case nir_instr_type_load_const:
999 case nir_instr_type_ssa_undef:
1000 case nir_instr_type_call:
1001 case nir_instr_type_jump:
1002 break;
1003
1004 default:
1005 unreachable("Invalid instruction type");
1006 break;
1007 }
1008
1009 return true;
1010 }
1011
1012 struct foreach_ssa_def_state {
1013 nir_foreach_ssa_def_cb cb;
1014 void *client_state;
1015 };
1016
1017 static inline bool
1018 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1019 {
1020 struct foreach_ssa_def_state *state = void_state;
1021
1022 if (dest->is_ssa)
1023 return state->cb(&dest->ssa, state->client_state);
1024 else
1025 return true;
1026 }
1027
1028 bool
1029 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1030 {
1031 switch (instr->type) {
1032 case nir_instr_type_alu:
1033 case nir_instr_type_deref:
1034 case nir_instr_type_tex:
1035 case nir_instr_type_intrinsic:
1036 case nir_instr_type_phi:
1037 case nir_instr_type_parallel_copy: {
1038 struct foreach_ssa_def_state foreach_state = {cb, state};
1039 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1040 }
1041
1042 case nir_instr_type_load_const:
1043 return cb(&nir_instr_as_load_const(instr)->def, state);
1044 case nir_instr_type_ssa_undef:
1045 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1046 case nir_instr_type_call:
1047 case nir_instr_type_jump:
1048 return true;
1049 default:
1050 unreachable("Invalid instruction type");
1051 }
1052 }
1053
1054 nir_ssa_def *
1055 nir_instr_ssa_def(nir_instr *instr)
1056 {
1057 switch (instr->type) {
1058 case nir_instr_type_alu:
1059 assert(nir_instr_as_alu(instr)->dest.dest.is_ssa);
1060 return &nir_instr_as_alu(instr)->dest.dest.ssa;
1061
1062 case nir_instr_type_deref:
1063 assert(nir_instr_as_deref(instr)->dest.is_ssa);
1064 return &nir_instr_as_deref(instr)->dest.ssa;
1065
1066 case nir_instr_type_tex:
1067 assert(nir_instr_as_tex(instr)->dest.is_ssa);
1068 return &nir_instr_as_tex(instr)->dest.ssa;
1069
1070 case nir_instr_type_intrinsic: {
1071 nir_intrinsic_instr *intrin = nir_instr_as_intrinsic(instr);
1072 if (nir_intrinsic_infos[intrin->intrinsic].has_dest) {
1073 assert(intrin->dest.is_ssa);
1074 return &intrin->dest.ssa;
1075 } else {
1076 return NULL;
1077 }
1078 }
1079
1080 case nir_instr_type_phi:
1081 assert(nir_instr_as_phi(instr)->dest.is_ssa);
1082 return &nir_instr_as_phi(instr)->dest.ssa;
1083
1084 case nir_instr_type_parallel_copy:
1085 unreachable("Parallel copies are unsupported by this function");
1086
1087 case nir_instr_type_load_const:
1088 return &nir_instr_as_load_const(instr)->def;
1089
1090 case nir_instr_type_ssa_undef:
1091 return &nir_instr_as_ssa_undef(instr)->def;
1092
1093 case nir_instr_type_call:
1094 case nir_instr_type_jump:
1095 return NULL;
1096 }
1097
1098 unreachable("Invalid instruction type");
1099 }
1100
1101 static bool
1102 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1103 {
1104 if (!cb(src, state))
1105 return false;
1106 if (!src->is_ssa && src->reg.indirect)
1107 return cb(src->reg.indirect, state);
1108 return true;
1109 }
1110
1111 static bool
1112 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1113 {
1114 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1115 if (!visit_src(&instr->src[i].src, cb, state))
1116 return false;
1117
1118 return true;
1119 }
1120
1121 static bool
1122 visit_deref_instr_src(nir_deref_instr *instr,
1123 nir_foreach_src_cb cb, void *state)
1124 {
1125 if (instr->deref_type != nir_deref_type_var) {
1126 if (!visit_src(&instr->parent, cb, state))
1127 return false;
1128 }
1129
1130 if (instr->deref_type == nir_deref_type_array ||
1131 instr->deref_type == nir_deref_type_ptr_as_array) {
1132 if (!visit_src(&instr->arr.index, cb, state))
1133 return false;
1134 }
1135
1136 return true;
1137 }
1138
1139 static bool
1140 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1141 {
1142 for (unsigned i = 0; i < instr->num_srcs; i++) {
1143 if (!visit_src(&instr->src[i].src, cb, state))
1144 return false;
1145 }
1146
1147 return true;
1148 }
1149
1150 static bool
1151 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1152 void *state)
1153 {
1154 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1155 for (unsigned i = 0; i < num_srcs; i++) {
1156 if (!visit_src(&instr->src[i], cb, state))
1157 return false;
1158 }
1159
1160 return true;
1161 }
1162
1163 static bool
1164 visit_call_src(nir_call_instr *instr, nir_foreach_src_cb cb, void *state)
1165 {
1166 for (unsigned i = 0; i < instr->num_params; i++) {
1167 if (!visit_src(&instr->params[i], cb, state))
1168 return false;
1169 }
1170
1171 return true;
1172 }
1173
1174 static bool
1175 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1176 {
1177 nir_foreach_phi_src(src, instr) {
1178 if (!visit_src(&src->src, cb, state))
1179 return false;
1180 }
1181
1182 return true;
1183 }
1184
1185 static bool
1186 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1187 nir_foreach_src_cb cb, void *state)
1188 {
1189 nir_foreach_parallel_copy_entry(entry, instr) {
1190 if (!visit_src(&entry->src, cb, state))
1191 return false;
1192 }
1193
1194 return true;
1195 }
1196
1197 typedef struct {
1198 void *state;
1199 nir_foreach_src_cb cb;
1200 } visit_dest_indirect_state;
1201
1202 static bool
1203 visit_dest_indirect(nir_dest *dest, void *_state)
1204 {
1205 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1206
1207 if (!dest->is_ssa && dest->reg.indirect)
1208 return state->cb(dest->reg.indirect, state->state);
1209
1210 return true;
1211 }
1212
1213 bool
1214 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1215 {
1216 switch (instr->type) {
1217 case nir_instr_type_alu:
1218 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1219 return false;
1220 break;
1221 case nir_instr_type_deref:
1222 if (!visit_deref_instr_src(nir_instr_as_deref(instr), cb, state))
1223 return false;
1224 break;
1225 case nir_instr_type_intrinsic:
1226 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1227 return false;
1228 break;
1229 case nir_instr_type_tex:
1230 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1231 return false;
1232 break;
1233 case nir_instr_type_call:
1234 if (!visit_call_src(nir_instr_as_call(instr), cb, state))
1235 return false;
1236 break;
1237 case nir_instr_type_load_const:
1238 /* Constant load instructions have no regular sources */
1239 break;
1240 case nir_instr_type_phi:
1241 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1242 return false;
1243 break;
1244 case nir_instr_type_parallel_copy:
1245 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1246 cb, state))
1247 return false;
1248 break;
1249 case nir_instr_type_jump:
1250 case nir_instr_type_ssa_undef:
1251 return true;
1252
1253 default:
1254 unreachable("Invalid instruction type");
1255 break;
1256 }
1257
1258 visit_dest_indirect_state dest_state;
1259 dest_state.state = state;
1260 dest_state.cb = cb;
1261 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1262 }
1263
1264 bool
1265 nir_foreach_phi_src_leaving_block(nir_block *block,
1266 nir_foreach_src_cb cb,
1267 void *state)
1268 {
1269 for (unsigned i = 0; i < ARRAY_SIZE(block->successors); i++) {
1270 if (block->successors[i] == NULL)
1271 continue;
1272
1273 nir_foreach_instr(instr, block->successors[i]) {
1274 if (instr->type != nir_instr_type_phi)
1275 break;
1276
1277 nir_phi_instr *phi = nir_instr_as_phi(instr);
1278 nir_foreach_phi_src(phi_src, phi) {
1279 if (phi_src->pred == block) {
1280 if (!cb(&phi_src->src, state))
1281 return false;
1282 }
1283 }
1284 }
1285 }
1286
1287 return true;
1288 }
1289
1290 nir_const_value
1291 nir_const_value_for_float(double f, unsigned bit_size)
1292 {
1293 nir_const_value v;
1294 memset(&v, 0, sizeof(v));
1295
1296 switch (bit_size) {
1297 case 16:
1298 v.u16 = _mesa_float_to_half(f);
1299 break;
1300 case 32:
1301 v.f32 = f;
1302 break;
1303 case 64:
1304 v.f64 = f;
1305 break;
1306 default:
1307 unreachable("Invalid bit size");
1308 }
1309
1310 return v;
1311 }
1312
1313 double
1314 nir_const_value_as_float(nir_const_value value, unsigned bit_size)
1315 {
1316 switch (bit_size) {
1317 case 16: return _mesa_half_to_float(value.u16);
1318 case 32: return value.f32;
1319 case 64: return value.f64;
1320 default:
1321 unreachable("Invalid bit size");
1322 }
1323 }
1324
1325 nir_const_value *
1326 nir_src_as_const_value(nir_src src)
1327 {
1328 if (!src.is_ssa)
1329 return NULL;
1330
1331 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1332 return NULL;
1333
1334 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1335
1336 return load->value;
1337 }
1338
1339 /**
1340 * Returns true if the source is known to be dynamically uniform. Otherwise it
1341 * returns false which means it may or may not be dynamically uniform but it
1342 * can't be determined.
1343 */
1344 bool
1345 nir_src_is_dynamically_uniform(nir_src src)
1346 {
1347 if (!src.is_ssa)
1348 return false;
1349
1350 /* Constants are trivially dynamically uniform */
1351 if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1352 return true;
1353
1354 /* As are uniform variables */
1355 if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1356 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1357 if (intr->intrinsic == nir_intrinsic_load_uniform &&
1358 nir_src_is_dynamically_uniform(intr->src[0]))
1359 return true;
1360 }
1361
1362 /* Operating together dynamically uniform expressions produces a
1363 * dynamically uniform result
1364 */
1365 if (src.ssa->parent_instr->type == nir_instr_type_alu) {
1366 nir_alu_instr *alu = nir_instr_as_alu(src.ssa->parent_instr);
1367 for (int i = 0; i < nir_op_infos[alu->op].num_inputs; i++) {
1368 if (!nir_src_is_dynamically_uniform(alu->src[i].src))
1369 return false;
1370 }
1371
1372 return true;
1373 }
1374
1375 /* XXX: this could have many more tests, such as when a sampler function is
1376 * called with dynamically uniform arguments.
1377 */
1378 return false;
1379 }
1380
1381 static void
1382 src_remove_all_uses(nir_src *src)
1383 {
1384 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1385 if (!src_is_valid(src))
1386 continue;
1387
1388 list_del(&src->use_link);
1389 }
1390 }
1391
1392 static void
1393 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1394 {
1395 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1396 if (!src_is_valid(src))
1397 continue;
1398
1399 if (parent_instr) {
1400 src->parent_instr = parent_instr;
1401 if (src->is_ssa)
1402 list_addtail(&src->use_link, &src->ssa->uses);
1403 else
1404 list_addtail(&src->use_link, &src->reg.reg->uses);
1405 } else {
1406 assert(parent_if);
1407 src->parent_if = parent_if;
1408 if (src->is_ssa)
1409 list_addtail(&src->use_link, &src->ssa->if_uses);
1410 else
1411 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1412 }
1413 }
1414 }
1415
1416 void
1417 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1418 {
1419 assert(!src_is_valid(src) || src->parent_instr == instr);
1420
1421 src_remove_all_uses(src);
1422 *src = new_src;
1423 src_add_all_uses(src, instr, NULL);
1424 }
1425
1426 void
1427 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1428 {
1429 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1430
1431 src_remove_all_uses(dest);
1432 src_remove_all_uses(src);
1433 *dest = *src;
1434 *src = NIR_SRC_INIT;
1435 src_add_all_uses(dest, dest_instr, NULL);
1436 }
1437
1438 void
1439 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1440 {
1441 nir_src *src = &if_stmt->condition;
1442 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1443
1444 src_remove_all_uses(src);
1445 *src = new_src;
1446 src_add_all_uses(src, NULL, if_stmt);
1447 }
1448
1449 void
1450 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1451 {
1452 if (dest->is_ssa) {
1453 /* We can only overwrite an SSA destination if it has no uses. */
1454 assert(list_is_empty(&dest->ssa.uses) && list_is_empty(&dest->ssa.if_uses));
1455 } else {
1456 list_del(&dest->reg.def_link);
1457 if (dest->reg.indirect)
1458 src_remove_all_uses(dest->reg.indirect);
1459 }
1460
1461 /* We can't re-write with an SSA def */
1462 assert(!new_dest.is_ssa);
1463
1464 nir_dest_copy(dest, &new_dest, instr);
1465
1466 dest->reg.parent_instr = instr;
1467 list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1468
1469 if (dest->reg.indirect)
1470 src_add_all_uses(dest->reg.indirect, instr, NULL);
1471 }
1472
1473 /* note: does *not* take ownership of 'name' */
1474 void
1475 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1476 unsigned num_components,
1477 unsigned bit_size, const char *name)
1478 {
1479 def->name = ralloc_strdup(instr, name);
1480 def->parent_instr = instr;
1481 list_inithead(&def->uses);
1482 list_inithead(&def->if_uses);
1483 def->num_components = num_components;
1484 def->bit_size = bit_size;
1485 def->divergent = true; /* This is the safer default */
1486
1487 if (instr->block) {
1488 nir_function_impl *impl =
1489 nir_cf_node_get_function(&instr->block->cf_node);
1490
1491 def->index = impl->ssa_alloc++;
1492 } else {
1493 def->index = UINT_MAX;
1494 }
1495 }
1496
1497 /* note: does *not* take ownership of 'name' */
1498 void
1499 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1500 unsigned num_components, unsigned bit_size,
1501 const char *name)
1502 {
1503 dest->is_ssa = true;
1504 nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1505 }
1506
1507 void
1508 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1509 {
1510 assert(!new_src.is_ssa || def != new_src.ssa);
1511
1512 nir_foreach_use_safe(use_src, def)
1513 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1514
1515 nir_foreach_if_use_safe(use_src, def)
1516 nir_if_rewrite_condition(use_src->parent_if, new_src);
1517 }
1518
1519 static bool
1520 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1521 {
1522 assert(start->block == end->block);
1523
1524 if (between->block != start->block)
1525 return false;
1526
1527 /* Search backwards looking for "between" */
1528 while (start != end) {
1529 if (between == end)
1530 return true;
1531
1532 end = nir_instr_prev(end);
1533 assert(end);
1534 }
1535
1536 return false;
1537 }
1538
1539 /* Replaces all uses of the given SSA def with the given source but only if
1540 * the use comes after the after_me instruction. This can be useful if you
1541 * are emitting code to fix up the result of some instruction: you can freely
1542 * use the result in that code and then call rewrite_uses_after and pass the
1543 * last fixup instruction as after_me and it will replace all of the uses you
1544 * want without touching the fixup code.
1545 *
1546 * This function assumes that after_me is in the same block as
1547 * def->parent_instr and that after_me comes after def->parent_instr.
1548 */
1549 void
1550 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1551 nir_instr *after_me)
1552 {
1553 if (new_src.is_ssa && def == new_src.ssa)
1554 return;
1555
1556 nir_foreach_use_safe(use_src, def) {
1557 assert(use_src->parent_instr != def->parent_instr);
1558 /* Since def already dominates all of its uses, the only way a use can
1559 * not be dominated by after_me is if it is between def and after_me in
1560 * the instruction list.
1561 */
1562 if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1563 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1564 }
1565
1566 nir_foreach_if_use_safe(use_src, def)
1567 nir_if_rewrite_condition(use_src->parent_if, new_src);
1568 }
1569
1570 nir_component_mask_t
1571 nir_ssa_def_components_read(const nir_ssa_def *def)
1572 {
1573 nir_component_mask_t read_mask = 0;
1574 nir_foreach_use(use, def) {
1575 if (use->parent_instr->type == nir_instr_type_alu) {
1576 nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1577 nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1578 int src_idx = alu_src - &alu->src[0];
1579 assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1580 read_mask |= nir_alu_instr_src_read_mask(alu, src_idx);
1581 } else {
1582 return (1 << def->num_components) - 1;
1583 }
1584 }
1585
1586 if (!list_is_empty(&def->if_uses))
1587 read_mask |= 1;
1588
1589 return read_mask;
1590 }
1591
1592 nir_block *
1593 nir_block_cf_tree_next(nir_block *block)
1594 {
1595 if (block == NULL) {
1596 /* nir_foreach_block_safe() will call this function on a NULL block
1597 * after the last iteration, but it won't use the result so just return
1598 * NULL here.
1599 */
1600 return NULL;
1601 }
1602
1603 nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1604 if (cf_next)
1605 return nir_cf_node_cf_tree_first(cf_next);
1606
1607 nir_cf_node *parent = block->cf_node.parent;
1608
1609 switch (parent->type) {
1610 case nir_cf_node_if: {
1611 /* Are we at the end of the if? Go to the beginning of the else */
1612 nir_if *if_stmt = nir_cf_node_as_if(parent);
1613 if (block == nir_if_last_then_block(if_stmt))
1614 return nir_if_first_else_block(if_stmt);
1615
1616 assert(block == nir_if_last_else_block(if_stmt));
1617 }
1618 /* fallthrough */
1619
1620 case nir_cf_node_loop:
1621 return nir_cf_node_as_block(nir_cf_node_next(parent));
1622
1623 case nir_cf_node_function:
1624 return NULL;
1625
1626 default:
1627 unreachable("unknown cf node type");
1628 }
1629 }
1630
1631 nir_block *
1632 nir_block_cf_tree_prev(nir_block *block)
1633 {
1634 if (block == NULL) {
1635 /* do this for consistency with nir_block_cf_tree_next() */
1636 return NULL;
1637 }
1638
1639 nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1640 if (cf_prev)
1641 return nir_cf_node_cf_tree_last(cf_prev);
1642
1643 nir_cf_node *parent = block->cf_node.parent;
1644
1645 switch (parent->type) {
1646 case nir_cf_node_if: {
1647 /* Are we at the beginning of the else? Go to the end of the if */
1648 nir_if *if_stmt = nir_cf_node_as_if(parent);
1649 if (block == nir_if_first_else_block(if_stmt))
1650 return nir_if_last_then_block(if_stmt);
1651
1652 assert(block == nir_if_first_then_block(if_stmt));
1653 }
1654 /* fallthrough */
1655
1656 case nir_cf_node_loop:
1657 return nir_cf_node_as_block(nir_cf_node_prev(parent));
1658
1659 case nir_cf_node_function:
1660 return NULL;
1661
1662 default:
1663 unreachable("unknown cf node type");
1664 }
1665 }
1666
1667 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1668 {
1669 switch (node->type) {
1670 case nir_cf_node_function: {
1671 nir_function_impl *impl = nir_cf_node_as_function(node);
1672 return nir_start_block(impl);
1673 }
1674
1675 case nir_cf_node_if: {
1676 nir_if *if_stmt = nir_cf_node_as_if(node);
1677 return nir_if_first_then_block(if_stmt);
1678 }
1679
1680 case nir_cf_node_loop: {
1681 nir_loop *loop = nir_cf_node_as_loop(node);
1682 return nir_loop_first_block(loop);
1683 }
1684
1685 case nir_cf_node_block: {
1686 return nir_cf_node_as_block(node);
1687 }
1688
1689 default:
1690 unreachable("unknown node type");
1691 }
1692 }
1693
1694 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1695 {
1696 switch (node->type) {
1697 case nir_cf_node_function: {
1698 nir_function_impl *impl = nir_cf_node_as_function(node);
1699 return nir_impl_last_block(impl);
1700 }
1701
1702 case nir_cf_node_if: {
1703 nir_if *if_stmt = nir_cf_node_as_if(node);
1704 return nir_if_last_else_block(if_stmt);
1705 }
1706
1707 case nir_cf_node_loop: {
1708 nir_loop *loop = nir_cf_node_as_loop(node);
1709 return nir_loop_last_block(loop);
1710 }
1711
1712 case nir_cf_node_block: {
1713 return nir_cf_node_as_block(node);
1714 }
1715
1716 default:
1717 unreachable("unknown node type");
1718 }
1719 }
1720
1721 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1722 {
1723 if (node->type == nir_cf_node_block)
1724 return nir_block_cf_tree_next(nir_cf_node_as_block(node));
1725 else if (node->type == nir_cf_node_function)
1726 return NULL;
1727 else
1728 return nir_cf_node_as_block(nir_cf_node_next(node));
1729 }
1730
1731 nir_if *
1732 nir_block_get_following_if(nir_block *block)
1733 {
1734 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1735 return NULL;
1736
1737 if (nir_cf_node_is_last(&block->cf_node))
1738 return NULL;
1739
1740 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1741
1742 if (next_node->type != nir_cf_node_if)
1743 return NULL;
1744
1745 return nir_cf_node_as_if(next_node);
1746 }
1747
1748 nir_loop *
1749 nir_block_get_following_loop(nir_block *block)
1750 {
1751 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1752 return NULL;
1753
1754 if (nir_cf_node_is_last(&block->cf_node))
1755 return NULL;
1756
1757 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1758
1759 if (next_node->type != nir_cf_node_loop)
1760 return NULL;
1761
1762 return nir_cf_node_as_loop(next_node);
1763 }
1764
1765 void
1766 nir_index_blocks(nir_function_impl *impl)
1767 {
1768 unsigned index = 0;
1769
1770 if (impl->valid_metadata & nir_metadata_block_index)
1771 return;
1772
1773 nir_foreach_block(block, impl) {
1774 block->index = index++;
1775 }
1776
1777 /* The end_block isn't really part of the program, which is why its index
1778 * is >= num_blocks.
1779 */
1780 impl->num_blocks = impl->end_block->index = index;
1781 }
1782
1783 static bool
1784 index_ssa_def_cb(nir_ssa_def *def, void *state)
1785 {
1786 unsigned *index = (unsigned *) state;
1787 def->index = (*index)++;
1788
1789 return true;
1790 }
1791
1792 /**
1793 * The indices are applied top-to-bottom which has the very nice property
1794 * that, if A dominates B, then A->index <= B->index.
1795 */
1796 void
1797 nir_index_ssa_defs(nir_function_impl *impl)
1798 {
1799 unsigned index = 0;
1800
1801 nir_foreach_block(block, impl) {
1802 nir_foreach_instr(instr, block)
1803 nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1804 }
1805
1806 impl->ssa_alloc = index;
1807 }
1808
1809 /**
1810 * The indices are applied top-to-bottom which has the very nice property
1811 * that, if A dominates B, then A->index <= B->index.
1812 */
1813 unsigned
1814 nir_index_instrs(nir_function_impl *impl)
1815 {
1816 unsigned index = 0;
1817
1818 nir_foreach_block(block, impl) {
1819 nir_foreach_instr(instr, block)
1820 instr->index = index++;
1821 }
1822
1823 return index;
1824 }
1825
1826 unsigned
1827 nir_shader_index_vars(nir_shader *shader, nir_variable_mode modes)
1828 {
1829 unsigned count = 0;
1830 nir_foreach_variable_with_modes(var, shader, modes)
1831 var->index = count++;
1832 return count;
1833 }
1834
1835 unsigned
1836 nir_function_impl_index_vars(nir_function_impl *impl)
1837 {
1838 unsigned count = 0;
1839 nir_foreach_function_temp_variable(var, impl)
1840 var->index = count++;
1841 return count;
1842 }
1843
1844 static nir_instr *
1845 cursor_next_instr(nir_cursor cursor)
1846 {
1847 switch (cursor.option) {
1848 case nir_cursor_before_block:
1849 for (nir_block *block = cursor.block; block;
1850 block = nir_block_cf_tree_next(block)) {
1851 nir_instr *instr = nir_block_first_instr(block);
1852 if (instr)
1853 return instr;
1854 }
1855 return NULL;
1856
1857 case nir_cursor_after_block:
1858 cursor.block = nir_block_cf_tree_next(cursor.block);
1859 if (cursor.block == NULL)
1860 return NULL;
1861
1862 cursor.option = nir_cursor_before_block;
1863 return cursor_next_instr(cursor);
1864
1865 case nir_cursor_before_instr:
1866 return cursor.instr;
1867
1868 case nir_cursor_after_instr:
1869 if (nir_instr_next(cursor.instr))
1870 return nir_instr_next(cursor.instr);
1871
1872 cursor.option = nir_cursor_after_block;
1873 cursor.block = cursor.instr->block;
1874 return cursor_next_instr(cursor);
1875 }
1876
1877 unreachable("Inavlid cursor option");
1878 }
1879
1880 ASSERTED static bool
1881 dest_is_ssa(nir_dest *dest, void *_state)
1882 {
1883 (void) _state;
1884 return dest->is_ssa;
1885 }
1886
1887 bool
1888 nir_function_impl_lower_instructions(nir_function_impl *impl,
1889 nir_instr_filter_cb filter,
1890 nir_lower_instr_cb lower,
1891 void *cb_data)
1892 {
1893 nir_builder b;
1894 nir_builder_init(&b, impl);
1895
1896 nir_metadata preserved = nir_metadata_block_index |
1897 nir_metadata_dominance;
1898
1899 bool progress = false;
1900 nir_cursor iter = nir_before_cf_list(&impl->body);
1901 nir_instr *instr;
1902 while ((instr = cursor_next_instr(iter)) != NULL) {
1903 if (filter && !filter(instr, cb_data)) {
1904 iter = nir_after_instr(instr);
1905 continue;
1906 }
1907
1908 assert(nir_foreach_dest(instr, dest_is_ssa, NULL));
1909 nir_ssa_def *old_def = nir_instr_ssa_def(instr);
1910 if (old_def == NULL) {
1911 iter = nir_after_instr(instr);
1912 continue;
1913 }
1914
1915 /* We're about to ask the callback to generate a replacement for instr.
1916 * Save off the uses from instr's SSA def so we know what uses to
1917 * rewrite later. If we use nir_ssa_def_rewrite_uses, it fails in the
1918 * case where the generated replacement code uses the result of instr
1919 * itself. If we use nir_ssa_def_rewrite_uses_after (which is the
1920 * normal solution to this problem), it doesn't work well if control-
1921 * flow is inserted as part of the replacement, doesn't handle cases
1922 * where the replacement is something consumed by instr, and suffers
1923 * from performance issues. This is the only way to 100% guarantee
1924 * that we rewrite the correct set efficiently.
1925 */
1926 struct list_head old_uses, old_if_uses;
1927 list_replace(&old_def->uses, &old_uses);
1928 list_inithead(&old_def->uses);
1929 list_replace(&old_def->if_uses, &old_if_uses);
1930 list_inithead(&old_def->if_uses);
1931
1932 b.cursor = nir_after_instr(instr);
1933 nir_ssa_def *new_def = lower(&b, instr, cb_data);
1934 if (new_def && new_def != NIR_LOWER_INSTR_PROGRESS) {
1935 assert(old_def != NULL);
1936 if (new_def->parent_instr->block != instr->block)
1937 preserved = nir_metadata_none;
1938
1939 nir_src new_src = nir_src_for_ssa(new_def);
1940 list_for_each_entry_safe(nir_src, use_src, &old_uses, use_link)
1941 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1942
1943 list_for_each_entry_safe(nir_src, use_src, &old_if_uses, use_link)
1944 nir_if_rewrite_condition(use_src->parent_if, new_src);
1945
1946 if (list_is_empty(&old_def->uses) && list_is_empty(&old_def->if_uses)) {
1947 iter = nir_instr_remove(instr);
1948 } else {
1949 iter = nir_after_instr(instr);
1950 }
1951 progress = true;
1952 } else {
1953 /* We didn't end up lowering after all. Put the uses back */
1954 if (old_def) {
1955 list_replace(&old_uses, &old_def->uses);
1956 list_replace(&old_if_uses, &old_def->if_uses);
1957 }
1958 iter = nir_after_instr(instr);
1959
1960 if (new_def == NIR_LOWER_INSTR_PROGRESS)
1961 progress = true;
1962 }
1963 }
1964
1965 if (progress) {
1966 nir_metadata_preserve(impl, preserved);
1967 } else {
1968 nir_metadata_preserve(impl, nir_metadata_all);
1969 }
1970
1971 return progress;
1972 }
1973
1974 bool
1975 nir_shader_lower_instructions(nir_shader *shader,
1976 nir_instr_filter_cb filter,
1977 nir_lower_instr_cb lower,
1978 void *cb_data)
1979 {
1980 bool progress = false;
1981
1982 nir_foreach_function(function, shader) {
1983 if (function->impl &&
1984 nir_function_impl_lower_instructions(function->impl,
1985 filter, lower, cb_data))
1986 progress = true;
1987 }
1988
1989 return progress;
1990 }
1991
1992 nir_intrinsic_op
1993 nir_intrinsic_from_system_value(gl_system_value val)
1994 {
1995 switch (val) {
1996 case SYSTEM_VALUE_VERTEX_ID:
1997 return nir_intrinsic_load_vertex_id;
1998 case SYSTEM_VALUE_INSTANCE_ID:
1999 return nir_intrinsic_load_instance_id;
2000 case SYSTEM_VALUE_DRAW_ID:
2001 return nir_intrinsic_load_draw_id;
2002 case SYSTEM_VALUE_BASE_INSTANCE:
2003 return nir_intrinsic_load_base_instance;
2004 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
2005 return nir_intrinsic_load_vertex_id_zero_base;
2006 case SYSTEM_VALUE_IS_INDEXED_DRAW:
2007 return nir_intrinsic_load_is_indexed_draw;
2008 case SYSTEM_VALUE_FIRST_VERTEX:
2009 return nir_intrinsic_load_first_vertex;
2010 case SYSTEM_VALUE_BASE_VERTEX:
2011 return nir_intrinsic_load_base_vertex;
2012 case SYSTEM_VALUE_INVOCATION_ID:
2013 return nir_intrinsic_load_invocation_id;
2014 case SYSTEM_VALUE_FRAG_COORD:
2015 return nir_intrinsic_load_frag_coord;
2016 case SYSTEM_VALUE_POINT_COORD:
2017 return nir_intrinsic_load_point_coord;
2018 case SYSTEM_VALUE_LINE_COORD:
2019 return nir_intrinsic_load_line_coord;
2020 case SYSTEM_VALUE_FRONT_FACE:
2021 return nir_intrinsic_load_front_face;
2022 case SYSTEM_VALUE_SAMPLE_ID:
2023 return nir_intrinsic_load_sample_id;
2024 case SYSTEM_VALUE_SAMPLE_POS:
2025 return nir_intrinsic_load_sample_pos;
2026 case SYSTEM_VALUE_SAMPLE_MASK_IN:
2027 return nir_intrinsic_load_sample_mask_in;
2028 case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
2029 return nir_intrinsic_load_local_invocation_id;
2030 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX:
2031 return nir_intrinsic_load_local_invocation_index;
2032 case SYSTEM_VALUE_WORK_GROUP_ID:
2033 return nir_intrinsic_load_work_group_id;
2034 case SYSTEM_VALUE_NUM_WORK_GROUPS:
2035 return nir_intrinsic_load_num_work_groups;
2036 case SYSTEM_VALUE_PRIMITIVE_ID:
2037 return nir_intrinsic_load_primitive_id;
2038 case SYSTEM_VALUE_TESS_COORD:
2039 return nir_intrinsic_load_tess_coord;
2040 case SYSTEM_VALUE_TESS_LEVEL_OUTER:
2041 return nir_intrinsic_load_tess_level_outer;
2042 case SYSTEM_VALUE_TESS_LEVEL_INNER:
2043 return nir_intrinsic_load_tess_level_inner;
2044 case SYSTEM_VALUE_TESS_LEVEL_OUTER_DEFAULT:
2045 return nir_intrinsic_load_tess_level_outer_default;
2046 case SYSTEM_VALUE_TESS_LEVEL_INNER_DEFAULT:
2047 return nir_intrinsic_load_tess_level_inner_default;
2048 case SYSTEM_VALUE_VERTICES_IN:
2049 return nir_intrinsic_load_patch_vertices_in;
2050 case SYSTEM_VALUE_HELPER_INVOCATION:
2051 return nir_intrinsic_load_helper_invocation;
2052 case SYSTEM_VALUE_COLOR0:
2053 return nir_intrinsic_load_color0;
2054 case SYSTEM_VALUE_COLOR1:
2055 return nir_intrinsic_load_color1;
2056 case SYSTEM_VALUE_VIEW_INDEX:
2057 return nir_intrinsic_load_view_index;
2058 case SYSTEM_VALUE_SUBGROUP_SIZE:
2059 return nir_intrinsic_load_subgroup_size;
2060 case SYSTEM_VALUE_SUBGROUP_INVOCATION:
2061 return nir_intrinsic_load_subgroup_invocation;
2062 case SYSTEM_VALUE_SUBGROUP_EQ_MASK:
2063 return nir_intrinsic_load_subgroup_eq_mask;
2064 case SYSTEM_VALUE_SUBGROUP_GE_MASK:
2065 return nir_intrinsic_load_subgroup_ge_mask;
2066 case SYSTEM_VALUE_SUBGROUP_GT_MASK:
2067 return nir_intrinsic_load_subgroup_gt_mask;
2068 case SYSTEM_VALUE_SUBGROUP_LE_MASK:
2069 return nir_intrinsic_load_subgroup_le_mask;
2070 case SYSTEM_VALUE_SUBGROUP_LT_MASK:
2071 return nir_intrinsic_load_subgroup_lt_mask;
2072 case SYSTEM_VALUE_NUM_SUBGROUPS:
2073 return nir_intrinsic_load_num_subgroups;
2074 case SYSTEM_VALUE_SUBGROUP_ID:
2075 return nir_intrinsic_load_subgroup_id;
2076 case SYSTEM_VALUE_LOCAL_GROUP_SIZE:
2077 return nir_intrinsic_load_local_group_size;
2078 case SYSTEM_VALUE_GLOBAL_INVOCATION_ID:
2079 return nir_intrinsic_load_global_invocation_id;
2080 case SYSTEM_VALUE_GLOBAL_INVOCATION_INDEX:
2081 return nir_intrinsic_load_global_invocation_index;
2082 case SYSTEM_VALUE_WORK_DIM:
2083 return nir_intrinsic_load_work_dim;
2084 case SYSTEM_VALUE_USER_DATA_AMD:
2085 return nir_intrinsic_load_user_data_amd;
2086 default:
2087 unreachable("system value does not directly correspond to intrinsic");
2088 }
2089 }
2090
2091 gl_system_value
2092 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
2093 {
2094 switch (intrin) {
2095 case nir_intrinsic_load_vertex_id:
2096 return SYSTEM_VALUE_VERTEX_ID;
2097 case nir_intrinsic_load_instance_id:
2098 return SYSTEM_VALUE_INSTANCE_ID;
2099 case nir_intrinsic_load_draw_id:
2100 return SYSTEM_VALUE_DRAW_ID;
2101 case nir_intrinsic_load_base_instance:
2102 return SYSTEM_VALUE_BASE_INSTANCE;
2103 case nir_intrinsic_load_vertex_id_zero_base:
2104 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
2105 case nir_intrinsic_load_first_vertex:
2106 return SYSTEM_VALUE_FIRST_VERTEX;
2107 case nir_intrinsic_load_is_indexed_draw:
2108 return SYSTEM_VALUE_IS_INDEXED_DRAW;
2109 case nir_intrinsic_load_base_vertex:
2110 return SYSTEM_VALUE_BASE_VERTEX;
2111 case nir_intrinsic_load_invocation_id:
2112 return SYSTEM_VALUE_INVOCATION_ID;
2113 case nir_intrinsic_load_frag_coord:
2114 return SYSTEM_VALUE_FRAG_COORD;
2115 case nir_intrinsic_load_point_coord:
2116 return SYSTEM_VALUE_POINT_COORD;
2117 case nir_intrinsic_load_line_coord:
2118 return SYSTEM_VALUE_LINE_COORD;
2119 case nir_intrinsic_load_front_face:
2120 return SYSTEM_VALUE_FRONT_FACE;
2121 case nir_intrinsic_load_sample_id:
2122 return SYSTEM_VALUE_SAMPLE_ID;
2123 case nir_intrinsic_load_sample_pos:
2124 return SYSTEM_VALUE_SAMPLE_POS;
2125 case nir_intrinsic_load_sample_mask_in:
2126 return SYSTEM_VALUE_SAMPLE_MASK_IN;
2127 case nir_intrinsic_load_local_invocation_id:
2128 return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
2129 case nir_intrinsic_load_local_invocation_index:
2130 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX;
2131 case nir_intrinsic_load_num_work_groups:
2132 return SYSTEM_VALUE_NUM_WORK_GROUPS;
2133 case nir_intrinsic_load_work_group_id:
2134 return SYSTEM_VALUE_WORK_GROUP_ID;
2135 case nir_intrinsic_load_primitive_id:
2136 return SYSTEM_VALUE_PRIMITIVE_ID;
2137 case nir_intrinsic_load_tess_coord:
2138 return SYSTEM_VALUE_TESS_COORD;
2139 case nir_intrinsic_load_tess_level_outer:
2140 return SYSTEM_VALUE_TESS_LEVEL_OUTER;
2141 case nir_intrinsic_load_tess_level_inner:
2142 return SYSTEM_VALUE_TESS_LEVEL_INNER;
2143 case nir_intrinsic_load_tess_level_outer_default:
2144 return SYSTEM_VALUE_TESS_LEVEL_OUTER_DEFAULT;
2145 case nir_intrinsic_load_tess_level_inner_default:
2146 return SYSTEM_VALUE_TESS_LEVEL_INNER_DEFAULT;
2147 case nir_intrinsic_load_patch_vertices_in:
2148 return SYSTEM_VALUE_VERTICES_IN;
2149 case nir_intrinsic_load_helper_invocation:
2150 return SYSTEM_VALUE_HELPER_INVOCATION;
2151 case nir_intrinsic_load_color0:
2152 return SYSTEM_VALUE_COLOR0;
2153 case nir_intrinsic_load_color1:
2154 return SYSTEM_VALUE_COLOR1;
2155 case nir_intrinsic_load_view_index:
2156 return SYSTEM_VALUE_VIEW_INDEX;
2157 case nir_intrinsic_load_subgroup_size:
2158 return SYSTEM_VALUE_SUBGROUP_SIZE;
2159 case nir_intrinsic_load_subgroup_invocation:
2160 return SYSTEM_VALUE_SUBGROUP_INVOCATION;
2161 case nir_intrinsic_load_subgroup_eq_mask:
2162 return SYSTEM_VALUE_SUBGROUP_EQ_MASK;
2163 case nir_intrinsic_load_subgroup_ge_mask:
2164 return SYSTEM_VALUE_SUBGROUP_GE_MASK;
2165 case nir_intrinsic_load_subgroup_gt_mask:
2166 return SYSTEM_VALUE_SUBGROUP_GT_MASK;
2167 case nir_intrinsic_load_subgroup_le_mask:
2168 return SYSTEM_VALUE_SUBGROUP_LE_MASK;
2169 case nir_intrinsic_load_subgroup_lt_mask:
2170 return SYSTEM_VALUE_SUBGROUP_LT_MASK;
2171 case nir_intrinsic_load_num_subgroups:
2172 return SYSTEM_VALUE_NUM_SUBGROUPS;
2173 case nir_intrinsic_load_subgroup_id:
2174 return SYSTEM_VALUE_SUBGROUP_ID;
2175 case nir_intrinsic_load_local_group_size:
2176 return SYSTEM_VALUE_LOCAL_GROUP_SIZE;
2177 case nir_intrinsic_load_global_invocation_id:
2178 return SYSTEM_VALUE_GLOBAL_INVOCATION_ID;
2179 case nir_intrinsic_load_user_data_amd:
2180 return SYSTEM_VALUE_USER_DATA_AMD;
2181 default:
2182 unreachable("intrinsic doesn't produce a system value");
2183 }
2184 }
2185
2186 /* OpenGL utility method that remaps the location attributes if they are
2187 * doubles. Not needed for vulkan due the differences on the input location
2188 * count for doubles on vulkan vs OpenGL
2189 *
2190 * The bitfield returned in dual_slot is one bit for each double input slot in
2191 * the original OpenGL single-slot input numbering. The mapping from old
2192 * locations to new locations is as follows:
2193 *
2194 * new_loc = loc + util_bitcount(dual_slot & BITFIELD64_MASK(loc))
2195 */
2196 void
2197 nir_remap_dual_slot_attributes(nir_shader *shader, uint64_t *dual_slot)
2198 {
2199 assert(shader->info.stage == MESA_SHADER_VERTEX);
2200
2201 *dual_slot = 0;
2202 nir_foreach_shader_in_variable(var, shader) {
2203 if (glsl_type_is_dual_slot(glsl_without_array(var->type))) {
2204 unsigned slots = glsl_count_attribute_slots(var->type, true);
2205 *dual_slot |= BITFIELD64_MASK(slots) << var->data.location;
2206 }
2207 }
2208
2209 nir_foreach_shader_in_variable(var, shader) {
2210 var->data.location +=
2211 util_bitcount64(*dual_slot & BITFIELD64_MASK(var->data.location));
2212 }
2213 }
2214
2215 /* Returns an attribute mask that has been re-compacted using the given
2216 * dual_slot mask.
2217 */
2218 uint64_t
2219 nir_get_single_slot_attribs_mask(uint64_t attribs, uint64_t dual_slot)
2220 {
2221 while (dual_slot) {
2222 unsigned loc = u_bit_scan64(&dual_slot);
2223 /* mask of all bits up to and including loc */
2224 uint64_t mask = BITFIELD64_MASK(loc + 1);
2225 attribs = (attribs & mask) | ((attribs & ~mask) >> 1);
2226 }
2227 return attribs;
2228 }
2229
2230 void
2231 nir_rewrite_image_intrinsic(nir_intrinsic_instr *intrin, nir_ssa_def *src,
2232 bool bindless)
2233 {
2234 enum gl_access_qualifier access = nir_intrinsic_access(intrin);
2235
2236 switch (intrin->intrinsic) {
2237 #define CASE(op) \
2238 case nir_intrinsic_image_deref_##op: \
2239 intrin->intrinsic = bindless ? nir_intrinsic_bindless_image_##op \
2240 : nir_intrinsic_image_##op; \
2241 break;
2242 CASE(load)
2243 CASE(store)
2244 CASE(atomic_add)
2245 CASE(atomic_imin)
2246 CASE(atomic_umin)
2247 CASE(atomic_imax)
2248 CASE(atomic_umax)
2249 CASE(atomic_and)
2250 CASE(atomic_or)
2251 CASE(atomic_xor)
2252 CASE(atomic_exchange)
2253 CASE(atomic_comp_swap)
2254 CASE(atomic_fadd)
2255 CASE(atomic_inc_wrap)
2256 CASE(atomic_dec_wrap)
2257 CASE(size)
2258 CASE(samples)
2259 CASE(load_raw_intel)
2260 CASE(store_raw_intel)
2261 #undef CASE
2262 default:
2263 unreachable("Unhanded image intrinsic");
2264 }
2265
2266 nir_deref_instr *deref = nir_src_as_deref(intrin->src[0]);
2267 nir_variable *var = nir_deref_instr_get_variable(deref);
2268
2269 nir_intrinsic_set_image_dim(intrin, glsl_get_sampler_dim(deref->type));
2270 nir_intrinsic_set_image_array(intrin, glsl_sampler_type_is_array(deref->type));
2271 nir_intrinsic_set_access(intrin, access | var->data.access);
2272 nir_intrinsic_set_format(intrin, var->data.image.format);
2273
2274 nir_instr_rewrite_src(&intrin->instr, &intrin->src[0],
2275 nir_src_for_ssa(src));
2276 }
2277
2278 unsigned
2279 nir_image_intrinsic_coord_components(const nir_intrinsic_instr *instr)
2280 {
2281 enum glsl_sampler_dim dim = nir_intrinsic_image_dim(instr);
2282 int coords = glsl_get_sampler_dim_coordinate_components(dim);
2283 if (dim == GLSL_SAMPLER_DIM_CUBE)
2284 return coords;
2285 else
2286 return coords + nir_intrinsic_image_array(instr);
2287 }