nir: Add a helper for adding texture instruction sources
[mesa.git] / src / compiler / nir / nir.c
1 /*
2 * Copyright © 2014 Intel Corporation
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
21 * IN THE SOFTWARE.
22 *
23 * Authors:
24 * Connor Abbott (cwabbott0@gmail.com)
25 *
26 */
27
28 #include "nir.h"
29 #include "nir_control_flow_private.h"
30 #include <assert.h>
31
32 nir_shader *
33 nir_shader_create(void *mem_ctx,
34 gl_shader_stage stage,
35 const nir_shader_compiler_options *options,
36 shader_info *si)
37 {
38 nir_shader *shader = rzalloc(mem_ctx, nir_shader);
39
40 exec_list_make_empty(&shader->uniforms);
41 exec_list_make_empty(&shader->inputs);
42 exec_list_make_empty(&shader->outputs);
43 exec_list_make_empty(&shader->shared);
44
45 shader->options = options;
46
47 if (si)
48 shader->info = *si;
49
50 exec_list_make_empty(&shader->functions);
51 exec_list_make_empty(&shader->registers);
52 exec_list_make_empty(&shader->globals);
53 exec_list_make_empty(&shader->system_values);
54 shader->reg_alloc = 0;
55
56 shader->num_inputs = 0;
57 shader->num_outputs = 0;
58 shader->num_uniforms = 0;
59 shader->num_shared = 0;
60
61 shader->stage = stage;
62
63 return shader;
64 }
65
66 static nir_register *
67 reg_create(void *mem_ctx, struct exec_list *list)
68 {
69 nir_register *reg = ralloc(mem_ctx, nir_register);
70
71 list_inithead(&reg->uses);
72 list_inithead(&reg->defs);
73 list_inithead(&reg->if_uses);
74
75 reg->num_components = 0;
76 reg->bit_size = 32;
77 reg->num_array_elems = 0;
78 reg->is_packed = false;
79 reg->name = NULL;
80
81 exec_list_push_tail(list, &reg->node);
82
83 return reg;
84 }
85
86 nir_register *
87 nir_global_reg_create(nir_shader *shader)
88 {
89 nir_register *reg = reg_create(shader, &shader->registers);
90 reg->index = shader->reg_alloc++;
91 reg->is_global = true;
92
93 return reg;
94 }
95
96 nir_register *
97 nir_local_reg_create(nir_function_impl *impl)
98 {
99 nir_register *reg = reg_create(ralloc_parent(impl), &impl->registers);
100 reg->index = impl->reg_alloc++;
101 reg->is_global = false;
102
103 return reg;
104 }
105
106 void
107 nir_reg_remove(nir_register *reg)
108 {
109 exec_node_remove(&reg->node);
110 }
111
112 void
113 nir_shader_add_variable(nir_shader *shader, nir_variable *var)
114 {
115 switch (var->data.mode) {
116 case nir_var_all:
117 assert(!"invalid mode");
118 break;
119
120 case nir_var_local:
121 assert(!"nir_shader_add_variable cannot be used for local variables");
122 break;
123
124 case nir_var_param:
125 assert(!"nir_shader_add_variable cannot be used for function parameters");
126 break;
127
128 case nir_var_global:
129 exec_list_push_tail(&shader->globals, &var->node);
130 break;
131
132 case nir_var_shader_in:
133 exec_list_push_tail(&shader->inputs, &var->node);
134 break;
135
136 case nir_var_shader_out:
137 exec_list_push_tail(&shader->outputs, &var->node);
138 break;
139
140 case nir_var_uniform:
141 case nir_var_shader_storage:
142 exec_list_push_tail(&shader->uniforms, &var->node);
143 break;
144
145 case nir_var_shared:
146 assert(shader->stage == MESA_SHADER_COMPUTE);
147 exec_list_push_tail(&shader->shared, &var->node);
148 break;
149
150 case nir_var_system_value:
151 exec_list_push_tail(&shader->system_values, &var->node);
152 break;
153 }
154 }
155
156 nir_variable *
157 nir_variable_create(nir_shader *shader, nir_variable_mode mode,
158 const struct glsl_type *type, const char *name)
159 {
160 nir_variable *var = rzalloc(shader, nir_variable);
161 var->name = ralloc_strdup(var, name);
162 var->type = type;
163 var->data.mode = mode;
164
165 if ((mode == nir_var_shader_in && shader->stage != MESA_SHADER_VERTEX) ||
166 (mode == nir_var_shader_out && shader->stage != MESA_SHADER_FRAGMENT))
167 var->data.interpolation = INTERP_MODE_SMOOTH;
168
169 if (mode == nir_var_shader_in || mode == nir_var_uniform)
170 var->data.read_only = true;
171
172 nir_shader_add_variable(shader, var);
173
174 return var;
175 }
176
177 nir_variable *
178 nir_local_variable_create(nir_function_impl *impl,
179 const struct glsl_type *type, const char *name)
180 {
181 nir_variable *var = rzalloc(impl->function->shader, nir_variable);
182 var->name = ralloc_strdup(var, name);
183 var->type = type;
184 var->data.mode = nir_var_local;
185
186 nir_function_impl_add_variable(impl, var);
187
188 return var;
189 }
190
191 nir_function *
192 nir_function_create(nir_shader *shader, const char *name)
193 {
194 nir_function *func = ralloc(shader, nir_function);
195
196 exec_list_push_tail(&shader->functions, &func->node);
197
198 func->name = ralloc_strdup(func, name);
199 func->shader = shader;
200 func->num_params = 0;
201 func->params = NULL;
202 func->return_type = glsl_void_type();
203 func->impl = NULL;
204
205 return func;
206 }
207
208 void nir_src_copy(nir_src *dest, const nir_src *src, void *mem_ctx)
209 {
210 dest->is_ssa = src->is_ssa;
211 if (src->is_ssa) {
212 dest->ssa = src->ssa;
213 } else {
214 dest->reg.base_offset = src->reg.base_offset;
215 dest->reg.reg = src->reg.reg;
216 if (src->reg.indirect) {
217 dest->reg.indirect = ralloc(mem_ctx, nir_src);
218 nir_src_copy(dest->reg.indirect, src->reg.indirect, mem_ctx);
219 } else {
220 dest->reg.indirect = NULL;
221 }
222 }
223 }
224
225 void nir_dest_copy(nir_dest *dest, const nir_dest *src, nir_instr *instr)
226 {
227 /* Copying an SSA definition makes no sense whatsoever. */
228 assert(!src->is_ssa);
229
230 dest->is_ssa = false;
231
232 dest->reg.base_offset = src->reg.base_offset;
233 dest->reg.reg = src->reg.reg;
234 if (src->reg.indirect) {
235 dest->reg.indirect = ralloc(instr, nir_src);
236 nir_src_copy(dest->reg.indirect, src->reg.indirect, instr);
237 } else {
238 dest->reg.indirect = NULL;
239 }
240 }
241
242 void
243 nir_alu_src_copy(nir_alu_src *dest, const nir_alu_src *src,
244 nir_alu_instr *instr)
245 {
246 nir_src_copy(&dest->src, &src->src, &instr->instr);
247 dest->abs = src->abs;
248 dest->negate = src->negate;
249 for (unsigned i = 0; i < 4; i++)
250 dest->swizzle[i] = src->swizzle[i];
251 }
252
253 void
254 nir_alu_dest_copy(nir_alu_dest *dest, const nir_alu_dest *src,
255 nir_alu_instr *instr)
256 {
257 nir_dest_copy(&dest->dest, &src->dest, &instr->instr);
258 dest->write_mask = src->write_mask;
259 dest->saturate = src->saturate;
260 }
261
262
263 static void
264 cf_init(nir_cf_node *node, nir_cf_node_type type)
265 {
266 exec_node_init(&node->node);
267 node->parent = NULL;
268 node->type = type;
269 }
270
271 nir_function_impl *
272 nir_function_impl_create_bare(nir_shader *shader)
273 {
274 nir_function_impl *impl = ralloc(shader, nir_function_impl);
275
276 impl->function = NULL;
277
278 cf_init(&impl->cf_node, nir_cf_node_function);
279
280 exec_list_make_empty(&impl->body);
281 exec_list_make_empty(&impl->registers);
282 exec_list_make_empty(&impl->locals);
283 impl->num_params = 0;
284 impl->params = NULL;
285 impl->return_var = NULL;
286 impl->reg_alloc = 0;
287 impl->ssa_alloc = 0;
288 impl->valid_metadata = nir_metadata_none;
289
290 /* create start & end blocks */
291 nir_block *start_block = nir_block_create(shader);
292 nir_block *end_block = nir_block_create(shader);
293 start_block->cf_node.parent = &impl->cf_node;
294 end_block->cf_node.parent = &impl->cf_node;
295 impl->end_block = end_block;
296
297 exec_list_push_tail(&impl->body, &start_block->cf_node.node);
298
299 start_block->successors[0] = end_block;
300 _mesa_set_add(end_block->predecessors, start_block);
301 return impl;
302 }
303
304 nir_function_impl *
305 nir_function_impl_create(nir_function *function)
306 {
307 assert(function->impl == NULL);
308
309 nir_function_impl *impl = nir_function_impl_create_bare(function->shader);
310
311 function->impl = impl;
312 impl->function = function;
313
314 impl->num_params = function->num_params;
315 impl->params = ralloc_array(function->shader,
316 nir_variable *, impl->num_params);
317
318 for (unsigned i = 0; i < impl->num_params; i++) {
319 impl->params[i] = rzalloc(function->shader, nir_variable);
320 impl->params[i]->type = function->params[i].type;
321 impl->params[i]->data.mode = nir_var_param;
322 impl->params[i]->data.location = i;
323 }
324
325 if (!glsl_type_is_void(function->return_type)) {
326 impl->return_var = rzalloc(function->shader, nir_variable);
327 impl->return_var->type = function->return_type;
328 impl->return_var->data.mode = nir_var_param;
329 impl->return_var->data.location = -1;
330 } else {
331 impl->return_var = NULL;
332 }
333
334 return impl;
335 }
336
337 nir_block *
338 nir_block_create(nir_shader *shader)
339 {
340 nir_block *block = rzalloc(shader, nir_block);
341
342 cf_init(&block->cf_node, nir_cf_node_block);
343
344 block->successors[0] = block->successors[1] = NULL;
345 block->predecessors = _mesa_set_create(block, _mesa_hash_pointer,
346 _mesa_key_pointer_equal);
347 block->imm_dom = NULL;
348 /* XXX maybe it would be worth it to defer allocation? This
349 * way it doesn't get allocated for shader refs that never run
350 * nir_calc_dominance? For example, state-tracker creates an
351 * initial IR, clones that, runs appropriate lowering pass, passes
352 * to driver which does common lowering/opt, and then stores ref
353 * which is later used to do state specific lowering and futher
354 * opt. Do any of the references not need dominance metadata?
355 */
356 block->dom_frontier = _mesa_set_create(block, _mesa_hash_pointer,
357 _mesa_key_pointer_equal);
358
359 exec_list_make_empty(&block->instr_list);
360
361 return block;
362 }
363
364 static inline void
365 src_init(nir_src *src)
366 {
367 src->is_ssa = false;
368 src->reg.reg = NULL;
369 src->reg.indirect = NULL;
370 src->reg.base_offset = 0;
371 }
372
373 nir_if *
374 nir_if_create(nir_shader *shader)
375 {
376 nir_if *if_stmt = ralloc(shader, nir_if);
377
378 cf_init(&if_stmt->cf_node, nir_cf_node_if);
379 src_init(&if_stmt->condition);
380
381 nir_block *then = nir_block_create(shader);
382 exec_list_make_empty(&if_stmt->then_list);
383 exec_list_push_tail(&if_stmt->then_list, &then->cf_node.node);
384 then->cf_node.parent = &if_stmt->cf_node;
385
386 nir_block *else_stmt = nir_block_create(shader);
387 exec_list_make_empty(&if_stmt->else_list);
388 exec_list_push_tail(&if_stmt->else_list, &else_stmt->cf_node.node);
389 else_stmt->cf_node.parent = &if_stmt->cf_node;
390
391 return if_stmt;
392 }
393
394 nir_loop *
395 nir_loop_create(nir_shader *shader)
396 {
397 nir_loop *loop = rzalloc(shader, nir_loop);
398
399 cf_init(&loop->cf_node, nir_cf_node_loop);
400
401 nir_block *body = nir_block_create(shader);
402 exec_list_make_empty(&loop->body);
403 exec_list_push_tail(&loop->body, &body->cf_node.node);
404 body->cf_node.parent = &loop->cf_node;
405
406 body->successors[0] = body;
407 _mesa_set_add(body->predecessors, body);
408
409 return loop;
410 }
411
412 static void
413 instr_init(nir_instr *instr, nir_instr_type type)
414 {
415 instr->type = type;
416 instr->block = NULL;
417 exec_node_init(&instr->node);
418 }
419
420 static void
421 dest_init(nir_dest *dest)
422 {
423 dest->is_ssa = false;
424 dest->reg.reg = NULL;
425 dest->reg.indirect = NULL;
426 dest->reg.base_offset = 0;
427 }
428
429 static void
430 alu_dest_init(nir_alu_dest *dest)
431 {
432 dest_init(&dest->dest);
433 dest->saturate = false;
434 dest->write_mask = 0xf;
435 }
436
437 static void
438 alu_src_init(nir_alu_src *src)
439 {
440 src_init(&src->src);
441 src->abs = src->negate = false;
442 src->swizzle[0] = 0;
443 src->swizzle[1] = 1;
444 src->swizzle[2] = 2;
445 src->swizzle[3] = 3;
446 }
447
448 nir_alu_instr *
449 nir_alu_instr_create(nir_shader *shader, nir_op op)
450 {
451 unsigned num_srcs = nir_op_infos[op].num_inputs;
452 /* TODO: don't use rzalloc */
453 nir_alu_instr *instr =
454 rzalloc_size(shader,
455 sizeof(nir_alu_instr) + num_srcs * sizeof(nir_alu_src));
456
457 instr_init(&instr->instr, nir_instr_type_alu);
458 instr->op = op;
459 alu_dest_init(&instr->dest);
460 for (unsigned i = 0; i < num_srcs; i++)
461 alu_src_init(&instr->src[i]);
462
463 return instr;
464 }
465
466 nir_jump_instr *
467 nir_jump_instr_create(nir_shader *shader, nir_jump_type type)
468 {
469 nir_jump_instr *instr = ralloc(shader, nir_jump_instr);
470 instr_init(&instr->instr, nir_instr_type_jump);
471 instr->type = type;
472 return instr;
473 }
474
475 nir_load_const_instr *
476 nir_load_const_instr_create(nir_shader *shader, unsigned num_components,
477 unsigned bit_size)
478 {
479 nir_load_const_instr *instr = ralloc(shader, nir_load_const_instr);
480 instr_init(&instr->instr, nir_instr_type_load_const);
481
482 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
483
484 return instr;
485 }
486
487 nir_intrinsic_instr *
488 nir_intrinsic_instr_create(nir_shader *shader, nir_intrinsic_op op)
489 {
490 unsigned num_srcs = nir_intrinsic_infos[op].num_srcs;
491 /* TODO: don't use rzalloc */
492 nir_intrinsic_instr *instr =
493 rzalloc_size(shader,
494 sizeof(nir_intrinsic_instr) + num_srcs * sizeof(nir_src));
495
496 instr_init(&instr->instr, nir_instr_type_intrinsic);
497 instr->intrinsic = op;
498
499 if (nir_intrinsic_infos[op].has_dest)
500 dest_init(&instr->dest);
501
502 for (unsigned i = 0; i < num_srcs; i++)
503 src_init(&instr->src[i]);
504
505 return instr;
506 }
507
508 nir_call_instr *
509 nir_call_instr_create(nir_shader *shader, nir_function *callee)
510 {
511 nir_call_instr *instr = ralloc(shader, nir_call_instr);
512 instr_init(&instr->instr, nir_instr_type_call);
513
514 instr->callee = callee;
515 instr->num_params = callee->num_params;
516 instr->params = ralloc_array(instr, nir_deref_var *, instr->num_params);
517 instr->return_deref = NULL;
518
519 return instr;
520 }
521
522 nir_tex_instr *
523 nir_tex_instr_create(nir_shader *shader, unsigned num_srcs)
524 {
525 nir_tex_instr *instr = rzalloc(shader, nir_tex_instr);
526 instr_init(&instr->instr, nir_instr_type_tex);
527
528 dest_init(&instr->dest);
529
530 instr->num_srcs = num_srcs;
531 instr->src = ralloc_array(instr, nir_tex_src, num_srcs);
532 for (unsigned i = 0; i < num_srcs; i++)
533 src_init(&instr->src[i].src);
534
535 instr->texture_index = 0;
536 instr->texture_array_size = 0;
537 instr->texture = NULL;
538 instr->sampler_index = 0;
539 instr->sampler = NULL;
540
541 return instr;
542 }
543
544 void
545 nir_tex_instr_add_src(nir_tex_instr *tex,
546 nir_tex_src_type src_type,
547 nir_src src)
548 {
549 nir_tex_src *new_srcs = rzalloc_array(tex, nir_tex_src,
550 tex->num_srcs + 1);
551
552 for (unsigned i = 0; i < tex->num_srcs; i++) {
553 new_srcs[i].src_type = tex->src[i].src_type;
554 nir_instr_move_src(&tex->instr, &new_srcs[i].src,
555 &tex->src[i].src);
556 }
557
558 ralloc_free(tex->src);
559 tex->src = new_srcs;
560
561 tex->src[tex->num_srcs].src_type = src_type;
562 nir_instr_rewrite_src(&tex->instr, &tex->src[tex->num_srcs].src, src);
563 tex->num_srcs++;
564 }
565
566 void
567 nir_tex_instr_remove_src(nir_tex_instr *tex, unsigned src_idx)
568 {
569 assert(src_idx < tex->num_srcs);
570
571 /* First rewrite the source to NIR_SRC_INIT */
572 nir_instr_rewrite_src(&tex->instr, &tex->src[src_idx].src, NIR_SRC_INIT);
573
574 /* Now, move all of the other sources down */
575 for (unsigned i = src_idx + 1; i < tex->num_srcs; i++) {
576 tex->src[i-1].src_type = tex->src[i].src_type;
577 nir_instr_move_src(&tex->instr, &tex->src[i-1].src, &tex->src[i].src);
578 }
579 tex->num_srcs--;
580 }
581
582 nir_phi_instr *
583 nir_phi_instr_create(nir_shader *shader)
584 {
585 nir_phi_instr *instr = ralloc(shader, nir_phi_instr);
586 instr_init(&instr->instr, nir_instr_type_phi);
587
588 dest_init(&instr->dest);
589 exec_list_make_empty(&instr->srcs);
590 return instr;
591 }
592
593 nir_parallel_copy_instr *
594 nir_parallel_copy_instr_create(nir_shader *shader)
595 {
596 nir_parallel_copy_instr *instr = ralloc(shader, nir_parallel_copy_instr);
597 instr_init(&instr->instr, nir_instr_type_parallel_copy);
598
599 exec_list_make_empty(&instr->entries);
600
601 return instr;
602 }
603
604 nir_ssa_undef_instr *
605 nir_ssa_undef_instr_create(nir_shader *shader,
606 unsigned num_components,
607 unsigned bit_size)
608 {
609 nir_ssa_undef_instr *instr = ralloc(shader, nir_ssa_undef_instr);
610 instr_init(&instr->instr, nir_instr_type_ssa_undef);
611
612 nir_ssa_def_init(&instr->instr, &instr->def, num_components, bit_size, NULL);
613
614 return instr;
615 }
616
617 nir_deref_var *
618 nir_deref_var_create(void *mem_ctx, nir_variable *var)
619 {
620 nir_deref_var *deref = ralloc(mem_ctx, nir_deref_var);
621 deref->deref.deref_type = nir_deref_type_var;
622 deref->deref.child = NULL;
623 deref->deref.type = var->type;
624 deref->var = var;
625 return deref;
626 }
627
628 nir_deref_array *
629 nir_deref_array_create(void *mem_ctx)
630 {
631 nir_deref_array *deref = ralloc(mem_ctx, nir_deref_array);
632 deref->deref.deref_type = nir_deref_type_array;
633 deref->deref.child = NULL;
634 deref->deref_array_type = nir_deref_array_type_direct;
635 src_init(&deref->indirect);
636 deref->base_offset = 0;
637 return deref;
638 }
639
640 nir_deref_struct *
641 nir_deref_struct_create(void *mem_ctx, unsigned field_index)
642 {
643 nir_deref_struct *deref = ralloc(mem_ctx, nir_deref_struct);
644 deref->deref.deref_type = nir_deref_type_struct;
645 deref->deref.child = NULL;
646 deref->index = field_index;
647 return deref;
648 }
649
650 nir_deref_var *
651 nir_deref_var_clone(const nir_deref_var *deref, void *mem_ctx)
652 {
653 if (deref == NULL)
654 return NULL;
655
656 nir_deref_var *ret = nir_deref_var_create(mem_ctx, deref->var);
657 ret->deref.type = deref->deref.type;
658 if (deref->deref.child)
659 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
660 return ret;
661 }
662
663 static nir_deref_array *
664 deref_array_clone(const nir_deref_array *deref, void *mem_ctx)
665 {
666 nir_deref_array *ret = nir_deref_array_create(mem_ctx);
667 ret->base_offset = deref->base_offset;
668 ret->deref_array_type = deref->deref_array_type;
669 if (deref->deref_array_type == nir_deref_array_type_indirect) {
670 nir_src_copy(&ret->indirect, &deref->indirect, mem_ctx);
671 }
672 ret->deref.type = deref->deref.type;
673 if (deref->deref.child)
674 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
675 return ret;
676 }
677
678 static nir_deref_struct *
679 deref_struct_clone(const nir_deref_struct *deref, void *mem_ctx)
680 {
681 nir_deref_struct *ret = nir_deref_struct_create(mem_ctx, deref->index);
682 ret->deref.type = deref->deref.type;
683 if (deref->deref.child)
684 ret->deref.child = nir_deref_clone(deref->deref.child, ret);
685 return ret;
686 }
687
688 nir_deref *
689 nir_deref_clone(const nir_deref *deref, void *mem_ctx)
690 {
691 if (deref == NULL)
692 return NULL;
693
694 switch (deref->deref_type) {
695 case nir_deref_type_var:
696 return &nir_deref_var_clone(nir_deref_as_var(deref), mem_ctx)->deref;
697 case nir_deref_type_array:
698 return &deref_array_clone(nir_deref_as_array(deref), mem_ctx)->deref;
699 case nir_deref_type_struct:
700 return &deref_struct_clone(nir_deref_as_struct(deref), mem_ctx)->deref;
701 default:
702 unreachable("Invalid dereference type");
703 }
704
705 return NULL;
706 }
707
708 /* This is the second step in the recursion. We've found the tail and made a
709 * copy. Now we need to iterate over all possible leaves and call the
710 * callback on each one.
711 */
712 static bool
713 deref_foreach_leaf_build_recur(nir_deref_var *deref, nir_deref *tail,
714 nir_deref_foreach_leaf_cb cb, void *state)
715 {
716 unsigned length;
717 union {
718 nir_deref_array arr;
719 nir_deref_struct str;
720 } tmp;
721
722 assert(tail->child == NULL);
723 switch (glsl_get_base_type(tail->type)) {
724 case GLSL_TYPE_UINT:
725 case GLSL_TYPE_UINT64:
726 case GLSL_TYPE_INT:
727 case GLSL_TYPE_INT64:
728 case GLSL_TYPE_FLOAT:
729 case GLSL_TYPE_DOUBLE:
730 case GLSL_TYPE_BOOL:
731 if (glsl_type_is_vector_or_scalar(tail->type))
732 return cb(deref, state);
733 /* Fall Through */
734
735 case GLSL_TYPE_ARRAY:
736 tmp.arr.deref.deref_type = nir_deref_type_array;
737 tmp.arr.deref.type = glsl_get_array_element(tail->type);
738 tmp.arr.deref_array_type = nir_deref_array_type_direct;
739 tmp.arr.indirect = NIR_SRC_INIT;
740 tail->child = &tmp.arr.deref;
741
742 length = glsl_get_length(tail->type);
743 for (unsigned i = 0; i < length; i++) {
744 tmp.arr.deref.child = NULL;
745 tmp.arr.base_offset = i;
746 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
747 return false;
748 }
749 return true;
750
751 case GLSL_TYPE_STRUCT:
752 tmp.str.deref.deref_type = nir_deref_type_struct;
753 tail->child = &tmp.str.deref;
754
755 length = glsl_get_length(tail->type);
756 for (unsigned i = 0; i < length; i++) {
757 tmp.arr.deref.child = NULL;
758 tmp.str.deref.type = glsl_get_struct_field(tail->type, i);
759 tmp.str.index = i;
760 if (!deref_foreach_leaf_build_recur(deref, &tmp.arr.deref, cb, state))
761 return false;
762 }
763 return true;
764
765 default:
766 unreachable("Invalid type for dereference");
767 }
768 }
769
770 /* This is the first step of the foreach_leaf recursion. In this step we are
771 * walking to the end of the deref chain and making a copy in the stack as we
772 * go. This is because we don't want to mutate the deref chain that was
773 * passed in by the caller. The downside is that this deref chain is on the
774 * stack and , if the caller wants to do anything with it, they will have to
775 * make their own copy because this one will go away.
776 */
777 static bool
778 deref_foreach_leaf_copy_recur(nir_deref_var *deref, nir_deref *tail,
779 nir_deref_foreach_leaf_cb cb, void *state)
780 {
781 union {
782 nir_deref_array arr;
783 nir_deref_struct str;
784 } c;
785
786 if (tail->child) {
787 switch (tail->child->deref_type) {
788 case nir_deref_type_array:
789 c.arr = *nir_deref_as_array(tail->child);
790 tail->child = &c.arr.deref;
791 return deref_foreach_leaf_copy_recur(deref, &c.arr.deref, cb, state);
792
793 case nir_deref_type_struct:
794 c.str = *nir_deref_as_struct(tail->child);
795 tail->child = &c.str.deref;
796 return deref_foreach_leaf_copy_recur(deref, &c.str.deref, cb, state);
797
798 case nir_deref_type_var:
799 default:
800 unreachable("Invalid deref type for a child");
801 }
802 } else {
803 /* We've gotten to the end of the original deref. Time to start
804 * building our own derefs.
805 */
806 return deref_foreach_leaf_build_recur(deref, tail, cb, state);
807 }
808 }
809
810 /**
811 * This function iterates over all of the possible derefs that can be created
812 * with the given deref as the head. It then calls the provided callback with
813 * a full deref for each one.
814 *
815 * The deref passed to the callback will be allocated on the stack. You will
816 * need to make a copy if you want it to hang around.
817 */
818 bool
819 nir_deref_foreach_leaf(nir_deref_var *deref,
820 nir_deref_foreach_leaf_cb cb, void *state)
821 {
822 nir_deref_var copy = *deref;
823 return deref_foreach_leaf_copy_recur(&copy, &copy.deref, cb, state);
824 }
825
826 /* Returns a load_const instruction that represents the constant
827 * initializer for the given deref chain. The caller is responsible for
828 * ensuring that there actually is a constant initializer.
829 */
830 nir_load_const_instr *
831 nir_deref_get_const_initializer_load(nir_shader *shader, nir_deref_var *deref)
832 {
833 nir_constant *constant = deref->var->constant_initializer;
834 assert(constant);
835
836 const nir_deref *tail = &deref->deref;
837 unsigned matrix_col = 0;
838 while (tail->child) {
839 switch (tail->child->deref_type) {
840 case nir_deref_type_array: {
841 nir_deref_array *arr = nir_deref_as_array(tail->child);
842 assert(arr->deref_array_type == nir_deref_array_type_direct);
843 if (glsl_type_is_matrix(tail->type)) {
844 assert(arr->deref.child == NULL);
845 matrix_col = arr->base_offset;
846 } else {
847 constant = constant->elements[arr->base_offset];
848 }
849 break;
850 }
851
852 case nir_deref_type_struct: {
853 constant = constant->elements[nir_deref_as_struct(tail->child)->index];
854 break;
855 }
856
857 default:
858 unreachable("Invalid deref child type");
859 }
860
861 tail = tail->child;
862 }
863
864 unsigned bit_size = glsl_get_bit_size(tail->type);
865 nir_load_const_instr *load =
866 nir_load_const_instr_create(shader, glsl_get_vector_elements(tail->type),
867 bit_size);
868
869 switch (glsl_get_base_type(tail->type)) {
870 case GLSL_TYPE_FLOAT:
871 case GLSL_TYPE_INT:
872 case GLSL_TYPE_UINT:
873 case GLSL_TYPE_DOUBLE:
874 case GLSL_TYPE_UINT64:
875 case GLSL_TYPE_INT64:
876 case GLSL_TYPE_BOOL:
877 load->value = constant->values[matrix_col];
878 break;
879 default:
880 unreachable("Invalid immediate type");
881 }
882
883 return load;
884 }
885
886 nir_function_impl *
887 nir_cf_node_get_function(nir_cf_node *node)
888 {
889 while (node->type != nir_cf_node_function) {
890 node = node->parent;
891 }
892
893 return nir_cf_node_as_function(node);
894 }
895
896 /* Reduces a cursor by trying to convert everything to after and trying to
897 * go up to block granularity when possible.
898 */
899 static nir_cursor
900 reduce_cursor(nir_cursor cursor)
901 {
902 switch (cursor.option) {
903 case nir_cursor_before_block:
904 assert(nir_cf_node_prev(&cursor.block->cf_node) == NULL ||
905 nir_cf_node_prev(&cursor.block->cf_node)->type != nir_cf_node_block);
906 if (exec_list_is_empty(&cursor.block->instr_list)) {
907 /* Empty block. After is as good as before. */
908 cursor.option = nir_cursor_after_block;
909 }
910 return cursor;
911
912 case nir_cursor_after_block:
913 return cursor;
914
915 case nir_cursor_before_instr: {
916 nir_instr *prev_instr = nir_instr_prev(cursor.instr);
917 if (prev_instr) {
918 /* Before this instruction is after the previous */
919 cursor.instr = prev_instr;
920 cursor.option = nir_cursor_after_instr;
921 } else {
922 /* No previous instruction. Switch to before block */
923 cursor.block = cursor.instr->block;
924 cursor.option = nir_cursor_before_block;
925 }
926 return reduce_cursor(cursor);
927 }
928
929 case nir_cursor_after_instr:
930 if (nir_instr_next(cursor.instr) == NULL) {
931 /* This is the last instruction, switch to after block */
932 cursor.option = nir_cursor_after_block;
933 cursor.block = cursor.instr->block;
934 }
935 return cursor;
936
937 default:
938 unreachable("Inavlid cursor option");
939 }
940 }
941
942 bool
943 nir_cursors_equal(nir_cursor a, nir_cursor b)
944 {
945 /* Reduced cursors should be unique */
946 a = reduce_cursor(a);
947 b = reduce_cursor(b);
948
949 return a.block == b.block && a.option == b.option;
950 }
951
952 static bool
953 add_use_cb(nir_src *src, void *state)
954 {
955 nir_instr *instr = state;
956
957 src->parent_instr = instr;
958 list_addtail(&src->use_link,
959 src->is_ssa ? &src->ssa->uses : &src->reg.reg->uses);
960
961 return true;
962 }
963
964 static bool
965 add_ssa_def_cb(nir_ssa_def *def, void *state)
966 {
967 nir_instr *instr = state;
968
969 if (instr->block && def->index == UINT_MAX) {
970 nir_function_impl *impl =
971 nir_cf_node_get_function(&instr->block->cf_node);
972
973 def->index = impl->ssa_alloc++;
974 }
975
976 return true;
977 }
978
979 static bool
980 add_reg_def_cb(nir_dest *dest, void *state)
981 {
982 nir_instr *instr = state;
983
984 if (!dest->is_ssa) {
985 dest->reg.parent_instr = instr;
986 list_addtail(&dest->reg.def_link, &dest->reg.reg->defs);
987 }
988
989 return true;
990 }
991
992 static void
993 add_defs_uses(nir_instr *instr)
994 {
995 nir_foreach_src(instr, add_use_cb, instr);
996 nir_foreach_dest(instr, add_reg_def_cb, instr);
997 nir_foreach_ssa_def(instr, add_ssa_def_cb, instr);
998 }
999
1000 void
1001 nir_instr_insert(nir_cursor cursor, nir_instr *instr)
1002 {
1003 switch (cursor.option) {
1004 case nir_cursor_before_block:
1005 /* Only allow inserting jumps into empty blocks. */
1006 if (instr->type == nir_instr_type_jump)
1007 assert(exec_list_is_empty(&cursor.block->instr_list));
1008
1009 instr->block = cursor.block;
1010 add_defs_uses(instr);
1011 exec_list_push_head(&cursor.block->instr_list, &instr->node);
1012 break;
1013 case nir_cursor_after_block: {
1014 /* Inserting instructions after a jump is illegal. */
1015 nir_instr *last = nir_block_last_instr(cursor.block);
1016 assert(last == NULL || last->type != nir_instr_type_jump);
1017 (void) last;
1018
1019 instr->block = cursor.block;
1020 add_defs_uses(instr);
1021 exec_list_push_tail(&cursor.block->instr_list, &instr->node);
1022 break;
1023 }
1024 case nir_cursor_before_instr:
1025 assert(instr->type != nir_instr_type_jump);
1026 instr->block = cursor.instr->block;
1027 add_defs_uses(instr);
1028 exec_node_insert_node_before(&cursor.instr->node, &instr->node);
1029 break;
1030 case nir_cursor_after_instr:
1031 /* Inserting instructions after a jump is illegal. */
1032 assert(cursor.instr->type != nir_instr_type_jump);
1033
1034 /* Only allow inserting jumps at the end of the block. */
1035 if (instr->type == nir_instr_type_jump)
1036 assert(cursor.instr == nir_block_last_instr(cursor.instr->block));
1037
1038 instr->block = cursor.instr->block;
1039 add_defs_uses(instr);
1040 exec_node_insert_after(&cursor.instr->node, &instr->node);
1041 break;
1042 }
1043
1044 if (instr->type == nir_instr_type_jump)
1045 nir_handle_add_jump(instr->block);
1046 }
1047
1048 static bool
1049 src_is_valid(const nir_src *src)
1050 {
1051 return src->is_ssa ? (src->ssa != NULL) : (src->reg.reg != NULL);
1052 }
1053
1054 static bool
1055 remove_use_cb(nir_src *src, void *state)
1056 {
1057 (void) state;
1058
1059 if (src_is_valid(src))
1060 list_del(&src->use_link);
1061
1062 return true;
1063 }
1064
1065 static bool
1066 remove_def_cb(nir_dest *dest, void *state)
1067 {
1068 (void) state;
1069
1070 if (!dest->is_ssa)
1071 list_del(&dest->reg.def_link);
1072
1073 return true;
1074 }
1075
1076 static void
1077 remove_defs_uses(nir_instr *instr)
1078 {
1079 nir_foreach_dest(instr, remove_def_cb, instr);
1080 nir_foreach_src(instr, remove_use_cb, instr);
1081 }
1082
1083 void nir_instr_remove(nir_instr *instr)
1084 {
1085 remove_defs_uses(instr);
1086 exec_node_remove(&instr->node);
1087
1088 if (instr->type == nir_instr_type_jump) {
1089 nir_jump_instr *jump_instr = nir_instr_as_jump(instr);
1090 nir_handle_remove_jump(instr->block, jump_instr->type);
1091 }
1092 }
1093
1094 /*@}*/
1095
1096 void
1097 nir_index_local_regs(nir_function_impl *impl)
1098 {
1099 unsigned index = 0;
1100 foreach_list_typed(nir_register, reg, node, &impl->registers) {
1101 reg->index = index++;
1102 }
1103 impl->reg_alloc = index;
1104 }
1105
1106 void
1107 nir_index_global_regs(nir_shader *shader)
1108 {
1109 unsigned index = 0;
1110 foreach_list_typed(nir_register, reg, node, &shader->registers) {
1111 reg->index = index++;
1112 }
1113 shader->reg_alloc = index;
1114 }
1115
1116 static bool
1117 visit_alu_dest(nir_alu_instr *instr, nir_foreach_dest_cb cb, void *state)
1118 {
1119 return cb(&instr->dest.dest, state);
1120 }
1121
1122 static bool
1123 visit_intrinsic_dest(nir_intrinsic_instr *instr, nir_foreach_dest_cb cb,
1124 void *state)
1125 {
1126 if (nir_intrinsic_infos[instr->intrinsic].has_dest)
1127 return cb(&instr->dest, state);
1128
1129 return true;
1130 }
1131
1132 static bool
1133 visit_texture_dest(nir_tex_instr *instr, nir_foreach_dest_cb cb,
1134 void *state)
1135 {
1136 return cb(&instr->dest, state);
1137 }
1138
1139 static bool
1140 visit_phi_dest(nir_phi_instr *instr, nir_foreach_dest_cb cb, void *state)
1141 {
1142 return cb(&instr->dest, state);
1143 }
1144
1145 static bool
1146 visit_parallel_copy_dest(nir_parallel_copy_instr *instr,
1147 nir_foreach_dest_cb cb, void *state)
1148 {
1149 nir_foreach_parallel_copy_entry(entry, instr) {
1150 if (!cb(&entry->dest, state))
1151 return false;
1152 }
1153
1154 return true;
1155 }
1156
1157 bool
1158 nir_foreach_dest(nir_instr *instr, nir_foreach_dest_cb cb, void *state)
1159 {
1160 switch (instr->type) {
1161 case nir_instr_type_alu:
1162 return visit_alu_dest(nir_instr_as_alu(instr), cb, state);
1163 case nir_instr_type_intrinsic:
1164 return visit_intrinsic_dest(nir_instr_as_intrinsic(instr), cb, state);
1165 case nir_instr_type_tex:
1166 return visit_texture_dest(nir_instr_as_tex(instr), cb, state);
1167 case nir_instr_type_phi:
1168 return visit_phi_dest(nir_instr_as_phi(instr), cb, state);
1169 case nir_instr_type_parallel_copy:
1170 return visit_parallel_copy_dest(nir_instr_as_parallel_copy(instr),
1171 cb, state);
1172
1173 case nir_instr_type_load_const:
1174 case nir_instr_type_ssa_undef:
1175 case nir_instr_type_call:
1176 case nir_instr_type_jump:
1177 break;
1178
1179 default:
1180 unreachable("Invalid instruction type");
1181 break;
1182 }
1183
1184 return true;
1185 }
1186
1187 struct foreach_ssa_def_state {
1188 nir_foreach_ssa_def_cb cb;
1189 void *client_state;
1190 };
1191
1192 static inline bool
1193 nir_ssa_def_visitor(nir_dest *dest, void *void_state)
1194 {
1195 struct foreach_ssa_def_state *state = void_state;
1196
1197 if (dest->is_ssa)
1198 return state->cb(&dest->ssa, state->client_state);
1199 else
1200 return true;
1201 }
1202
1203 bool
1204 nir_foreach_ssa_def(nir_instr *instr, nir_foreach_ssa_def_cb cb, void *state)
1205 {
1206 switch (instr->type) {
1207 case nir_instr_type_alu:
1208 case nir_instr_type_tex:
1209 case nir_instr_type_intrinsic:
1210 case nir_instr_type_phi:
1211 case nir_instr_type_parallel_copy: {
1212 struct foreach_ssa_def_state foreach_state = {cb, state};
1213 return nir_foreach_dest(instr, nir_ssa_def_visitor, &foreach_state);
1214 }
1215
1216 case nir_instr_type_load_const:
1217 return cb(&nir_instr_as_load_const(instr)->def, state);
1218 case nir_instr_type_ssa_undef:
1219 return cb(&nir_instr_as_ssa_undef(instr)->def, state);
1220 case nir_instr_type_call:
1221 case nir_instr_type_jump:
1222 return true;
1223 default:
1224 unreachable("Invalid instruction type");
1225 }
1226 }
1227
1228 static bool
1229 visit_src(nir_src *src, nir_foreach_src_cb cb, void *state)
1230 {
1231 if (!cb(src, state))
1232 return false;
1233 if (!src->is_ssa && src->reg.indirect)
1234 return cb(src->reg.indirect, state);
1235 return true;
1236 }
1237
1238 static bool
1239 visit_deref_array_src(nir_deref_array *deref, nir_foreach_src_cb cb,
1240 void *state)
1241 {
1242 if (deref->deref_array_type == nir_deref_array_type_indirect)
1243 return visit_src(&deref->indirect, cb, state);
1244 return true;
1245 }
1246
1247 static bool
1248 visit_deref_src(nir_deref_var *deref, nir_foreach_src_cb cb, void *state)
1249 {
1250 nir_deref *cur = &deref->deref;
1251 while (cur != NULL) {
1252 if (cur->deref_type == nir_deref_type_array) {
1253 if (!visit_deref_array_src(nir_deref_as_array(cur), cb, state))
1254 return false;
1255 }
1256
1257 cur = cur->child;
1258 }
1259
1260 return true;
1261 }
1262
1263 static bool
1264 visit_alu_src(nir_alu_instr *instr, nir_foreach_src_cb cb, void *state)
1265 {
1266 for (unsigned i = 0; i < nir_op_infos[instr->op].num_inputs; i++)
1267 if (!visit_src(&instr->src[i].src, cb, state))
1268 return false;
1269
1270 return true;
1271 }
1272
1273 static bool
1274 visit_tex_src(nir_tex_instr *instr, nir_foreach_src_cb cb, void *state)
1275 {
1276 for (unsigned i = 0; i < instr->num_srcs; i++) {
1277 if (!visit_src(&instr->src[i].src, cb, state))
1278 return false;
1279 }
1280
1281 if (instr->texture != NULL) {
1282 if (!visit_deref_src(instr->texture, cb, state))
1283 return false;
1284 }
1285
1286 if (instr->sampler != NULL) {
1287 if (!visit_deref_src(instr->sampler, cb, state))
1288 return false;
1289 }
1290
1291 return true;
1292 }
1293
1294 static bool
1295 visit_intrinsic_src(nir_intrinsic_instr *instr, nir_foreach_src_cb cb,
1296 void *state)
1297 {
1298 unsigned num_srcs = nir_intrinsic_infos[instr->intrinsic].num_srcs;
1299 for (unsigned i = 0; i < num_srcs; i++) {
1300 if (!visit_src(&instr->src[i], cb, state))
1301 return false;
1302 }
1303
1304 unsigned num_vars =
1305 nir_intrinsic_infos[instr->intrinsic].num_variables;
1306 for (unsigned i = 0; i < num_vars; i++) {
1307 if (!visit_deref_src(instr->variables[i], cb, state))
1308 return false;
1309 }
1310
1311 return true;
1312 }
1313
1314 static bool
1315 visit_phi_src(nir_phi_instr *instr, nir_foreach_src_cb cb, void *state)
1316 {
1317 nir_foreach_phi_src(src, instr) {
1318 if (!visit_src(&src->src, cb, state))
1319 return false;
1320 }
1321
1322 return true;
1323 }
1324
1325 static bool
1326 visit_parallel_copy_src(nir_parallel_copy_instr *instr,
1327 nir_foreach_src_cb cb, void *state)
1328 {
1329 nir_foreach_parallel_copy_entry(entry, instr) {
1330 if (!visit_src(&entry->src, cb, state))
1331 return false;
1332 }
1333
1334 return true;
1335 }
1336
1337 typedef struct {
1338 void *state;
1339 nir_foreach_src_cb cb;
1340 } visit_dest_indirect_state;
1341
1342 static bool
1343 visit_dest_indirect(nir_dest *dest, void *_state)
1344 {
1345 visit_dest_indirect_state *state = (visit_dest_indirect_state *) _state;
1346
1347 if (!dest->is_ssa && dest->reg.indirect)
1348 return state->cb(dest->reg.indirect, state->state);
1349
1350 return true;
1351 }
1352
1353 bool
1354 nir_foreach_src(nir_instr *instr, nir_foreach_src_cb cb, void *state)
1355 {
1356 switch (instr->type) {
1357 case nir_instr_type_alu:
1358 if (!visit_alu_src(nir_instr_as_alu(instr), cb, state))
1359 return false;
1360 break;
1361 case nir_instr_type_intrinsic:
1362 if (!visit_intrinsic_src(nir_instr_as_intrinsic(instr), cb, state))
1363 return false;
1364 break;
1365 case nir_instr_type_tex:
1366 if (!visit_tex_src(nir_instr_as_tex(instr), cb, state))
1367 return false;
1368 break;
1369 case nir_instr_type_call:
1370 /* Call instructions have no regular sources */
1371 break;
1372 case nir_instr_type_load_const:
1373 /* Constant load instructions have no regular sources */
1374 break;
1375 case nir_instr_type_phi:
1376 if (!visit_phi_src(nir_instr_as_phi(instr), cb, state))
1377 return false;
1378 break;
1379 case nir_instr_type_parallel_copy:
1380 if (!visit_parallel_copy_src(nir_instr_as_parallel_copy(instr),
1381 cb, state))
1382 return false;
1383 break;
1384 case nir_instr_type_jump:
1385 case nir_instr_type_ssa_undef:
1386 return true;
1387
1388 default:
1389 unreachable("Invalid instruction type");
1390 break;
1391 }
1392
1393 visit_dest_indirect_state dest_state;
1394 dest_state.state = state;
1395 dest_state.cb = cb;
1396 return nir_foreach_dest(instr, visit_dest_indirect, &dest_state);
1397 }
1398
1399 nir_const_value *
1400 nir_src_as_const_value(nir_src src)
1401 {
1402 if (!src.is_ssa)
1403 return NULL;
1404
1405 if (src.ssa->parent_instr->type != nir_instr_type_load_const)
1406 return NULL;
1407
1408 nir_load_const_instr *load = nir_instr_as_load_const(src.ssa->parent_instr);
1409
1410 return &load->value;
1411 }
1412
1413 /**
1414 * Returns true if the source is known to be dynamically uniform. Otherwise it
1415 * returns false which means it may or may not be dynamically uniform but it
1416 * can't be determined.
1417 */
1418 bool
1419 nir_src_is_dynamically_uniform(nir_src src)
1420 {
1421 if (!src.is_ssa)
1422 return false;
1423
1424 /* Constants are trivially dynamically uniform */
1425 if (src.ssa->parent_instr->type == nir_instr_type_load_const)
1426 return true;
1427
1428 /* As are uniform variables */
1429 if (src.ssa->parent_instr->type == nir_instr_type_intrinsic) {
1430 nir_intrinsic_instr *intr = nir_instr_as_intrinsic(src.ssa->parent_instr);
1431
1432 if (intr->intrinsic == nir_intrinsic_load_uniform)
1433 return true;
1434 }
1435
1436 /* XXX: this could have many more tests, such as when a sampler function is
1437 * called with dynamically uniform arguments.
1438 */
1439 return false;
1440 }
1441
1442 static void
1443 src_remove_all_uses(nir_src *src)
1444 {
1445 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1446 if (!src_is_valid(src))
1447 continue;
1448
1449 list_del(&src->use_link);
1450 }
1451 }
1452
1453 static void
1454 src_add_all_uses(nir_src *src, nir_instr *parent_instr, nir_if *parent_if)
1455 {
1456 for (; src; src = src->is_ssa ? NULL : src->reg.indirect) {
1457 if (!src_is_valid(src))
1458 continue;
1459
1460 if (parent_instr) {
1461 src->parent_instr = parent_instr;
1462 if (src->is_ssa)
1463 list_addtail(&src->use_link, &src->ssa->uses);
1464 else
1465 list_addtail(&src->use_link, &src->reg.reg->uses);
1466 } else {
1467 assert(parent_if);
1468 src->parent_if = parent_if;
1469 if (src->is_ssa)
1470 list_addtail(&src->use_link, &src->ssa->if_uses);
1471 else
1472 list_addtail(&src->use_link, &src->reg.reg->if_uses);
1473 }
1474 }
1475 }
1476
1477 void
1478 nir_instr_rewrite_src(nir_instr *instr, nir_src *src, nir_src new_src)
1479 {
1480 assert(!src_is_valid(src) || src->parent_instr == instr);
1481
1482 src_remove_all_uses(src);
1483 *src = new_src;
1484 src_add_all_uses(src, instr, NULL);
1485 }
1486
1487 void
1488 nir_instr_move_src(nir_instr *dest_instr, nir_src *dest, nir_src *src)
1489 {
1490 assert(!src_is_valid(dest) || dest->parent_instr == dest_instr);
1491
1492 src_remove_all_uses(dest);
1493 src_remove_all_uses(src);
1494 *dest = *src;
1495 *src = NIR_SRC_INIT;
1496 src_add_all_uses(dest, dest_instr, NULL);
1497 }
1498
1499 void
1500 nir_if_rewrite_condition(nir_if *if_stmt, nir_src new_src)
1501 {
1502 nir_src *src = &if_stmt->condition;
1503 assert(!src_is_valid(src) || src->parent_if == if_stmt);
1504
1505 src_remove_all_uses(src);
1506 *src = new_src;
1507 src_add_all_uses(src, NULL, if_stmt);
1508 }
1509
1510 void
1511 nir_instr_rewrite_dest(nir_instr *instr, nir_dest *dest, nir_dest new_dest)
1512 {
1513 if (dest->is_ssa) {
1514 /* We can only overwrite an SSA destination if it has no uses. */
1515 assert(list_empty(&dest->ssa.uses) && list_empty(&dest->ssa.if_uses));
1516 } else {
1517 list_del(&dest->reg.def_link);
1518 if (dest->reg.indirect)
1519 src_remove_all_uses(dest->reg.indirect);
1520 }
1521
1522 /* We can't re-write with an SSA def */
1523 assert(!new_dest.is_ssa);
1524
1525 nir_dest_copy(dest, &new_dest, instr);
1526
1527 dest->reg.parent_instr = instr;
1528 list_addtail(&dest->reg.def_link, &new_dest.reg.reg->defs);
1529
1530 if (dest->reg.indirect)
1531 src_add_all_uses(dest->reg.indirect, instr, NULL);
1532 }
1533
1534 void
1535 nir_instr_rewrite_deref(nir_instr *instr, nir_deref_var **deref,
1536 nir_deref_var *new_deref)
1537 {
1538 if (*deref)
1539 visit_deref_src(*deref, remove_use_cb, NULL);
1540
1541 *deref = new_deref;
1542
1543 if (*deref)
1544 visit_deref_src(*deref, add_use_cb, instr);
1545 }
1546
1547 /* note: does *not* take ownership of 'name' */
1548 void
1549 nir_ssa_def_init(nir_instr *instr, nir_ssa_def *def,
1550 unsigned num_components,
1551 unsigned bit_size, const char *name)
1552 {
1553 def->name = ralloc_strdup(instr, name);
1554 def->parent_instr = instr;
1555 list_inithead(&def->uses);
1556 list_inithead(&def->if_uses);
1557 def->num_components = num_components;
1558 def->bit_size = bit_size;
1559
1560 if (instr->block) {
1561 nir_function_impl *impl =
1562 nir_cf_node_get_function(&instr->block->cf_node);
1563
1564 def->index = impl->ssa_alloc++;
1565 } else {
1566 def->index = UINT_MAX;
1567 }
1568 }
1569
1570 /* note: does *not* take ownership of 'name' */
1571 void
1572 nir_ssa_dest_init(nir_instr *instr, nir_dest *dest,
1573 unsigned num_components, unsigned bit_size,
1574 const char *name)
1575 {
1576 dest->is_ssa = true;
1577 nir_ssa_def_init(instr, &dest->ssa, num_components, bit_size, name);
1578 }
1579
1580 void
1581 nir_ssa_def_rewrite_uses(nir_ssa_def *def, nir_src new_src)
1582 {
1583 assert(!new_src.is_ssa || def != new_src.ssa);
1584
1585 nir_foreach_use_safe(use_src, def)
1586 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1587
1588 nir_foreach_if_use_safe(use_src, def)
1589 nir_if_rewrite_condition(use_src->parent_if, new_src);
1590 }
1591
1592 static bool
1593 is_instr_between(nir_instr *start, nir_instr *end, nir_instr *between)
1594 {
1595 assert(start->block == end->block);
1596
1597 if (between->block != start->block)
1598 return false;
1599
1600 /* Search backwards looking for "between" */
1601 while (start != end) {
1602 if (between == end)
1603 return true;
1604
1605 end = nir_instr_prev(end);
1606 assert(end);
1607 }
1608
1609 return false;
1610 }
1611
1612 /* Replaces all uses of the given SSA def with the given source but only if
1613 * the use comes after the after_me instruction. This can be useful if you
1614 * are emitting code to fix up the result of some instruction: you can freely
1615 * use the result in that code and then call rewrite_uses_after and pass the
1616 * last fixup instruction as after_me and it will replace all of the uses you
1617 * want without touching the fixup code.
1618 *
1619 * This function assumes that after_me is in the same block as
1620 * def->parent_instr and that after_me comes after def->parent_instr.
1621 */
1622 void
1623 nir_ssa_def_rewrite_uses_after(nir_ssa_def *def, nir_src new_src,
1624 nir_instr *after_me)
1625 {
1626 assert(!new_src.is_ssa || def != new_src.ssa);
1627
1628 nir_foreach_use_safe(use_src, def) {
1629 assert(use_src->parent_instr != def->parent_instr);
1630 /* Since def already dominates all of its uses, the only way a use can
1631 * not be dominated by after_me is if it is between def and after_me in
1632 * the instruction list.
1633 */
1634 if (!is_instr_between(def->parent_instr, after_me, use_src->parent_instr))
1635 nir_instr_rewrite_src(use_src->parent_instr, use_src, new_src);
1636 }
1637
1638 nir_foreach_if_use_safe(use_src, def)
1639 nir_if_rewrite_condition(use_src->parent_if, new_src);
1640 }
1641
1642 uint8_t
1643 nir_ssa_def_components_read(nir_ssa_def *def)
1644 {
1645 uint8_t read_mask = 0;
1646 nir_foreach_use(use, def) {
1647 if (use->parent_instr->type == nir_instr_type_alu) {
1648 nir_alu_instr *alu = nir_instr_as_alu(use->parent_instr);
1649 nir_alu_src *alu_src = exec_node_data(nir_alu_src, use, src);
1650 int src_idx = alu_src - &alu->src[0];
1651 assert(src_idx >= 0 && src_idx < nir_op_infos[alu->op].num_inputs);
1652
1653 for (unsigned c = 0; c < 4; c++) {
1654 if (!nir_alu_instr_channel_used(alu, src_idx, c))
1655 continue;
1656
1657 read_mask |= (1 << alu_src->swizzle[c]);
1658 }
1659 } else {
1660 return (1 << def->num_components) - 1;
1661 }
1662 }
1663
1664 return read_mask;
1665 }
1666
1667 nir_block *
1668 nir_block_cf_tree_next(nir_block *block)
1669 {
1670 if (block == NULL) {
1671 /* nir_foreach_block_safe() will call this function on a NULL block
1672 * after the last iteration, but it won't use the result so just return
1673 * NULL here.
1674 */
1675 return NULL;
1676 }
1677
1678 nir_cf_node *cf_next = nir_cf_node_next(&block->cf_node);
1679 if (cf_next)
1680 return nir_cf_node_cf_tree_first(cf_next);
1681
1682 nir_cf_node *parent = block->cf_node.parent;
1683
1684 switch (parent->type) {
1685 case nir_cf_node_if: {
1686 /* Are we at the end of the if? Go to the beginning of the else */
1687 nir_if *if_stmt = nir_cf_node_as_if(parent);
1688 if (block == nir_if_last_then_block(if_stmt))
1689 return nir_if_first_else_block(if_stmt);
1690
1691 assert(block == nir_if_last_else_block(if_stmt));
1692 /* fall through */
1693 }
1694
1695 case nir_cf_node_loop:
1696 return nir_cf_node_as_block(nir_cf_node_next(parent));
1697
1698 case nir_cf_node_function:
1699 return NULL;
1700
1701 default:
1702 unreachable("unknown cf node type");
1703 }
1704 }
1705
1706 nir_block *
1707 nir_block_cf_tree_prev(nir_block *block)
1708 {
1709 if (block == NULL) {
1710 /* do this for consistency with nir_block_cf_tree_next() */
1711 return NULL;
1712 }
1713
1714 nir_cf_node *cf_prev = nir_cf_node_prev(&block->cf_node);
1715 if (cf_prev)
1716 return nir_cf_node_cf_tree_last(cf_prev);
1717
1718 nir_cf_node *parent = block->cf_node.parent;
1719
1720 switch (parent->type) {
1721 case nir_cf_node_if: {
1722 /* Are we at the beginning of the else? Go to the end of the if */
1723 nir_if *if_stmt = nir_cf_node_as_if(parent);
1724 if (block == nir_if_first_else_block(if_stmt))
1725 return nir_if_last_then_block(if_stmt);
1726
1727 assert(block == nir_if_first_then_block(if_stmt));
1728 /* fall through */
1729 }
1730
1731 case nir_cf_node_loop:
1732 return nir_cf_node_as_block(nir_cf_node_prev(parent));
1733
1734 case nir_cf_node_function:
1735 return NULL;
1736
1737 default:
1738 unreachable("unknown cf node type");
1739 }
1740 }
1741
1742 nir_block *nir_cf_node_cf_tree_first(nir_cf_node *node)
1743 {
1744 switch (node->type) {
1745 case nir_cf_node_function: {
1746 nir_function_impl *impl = nir_cf_node_as_function(node);
1747 return nir_start_block(impl);
1748 }
1749
1750 case nir_cf_node_if: {
1751 nir_if *if_stmt = nir_cf_node_as_if(node);
1752 return nir_if_first_then_block(if_stmt);
1753 }
1754
1755 case nir_cf_node_loop: {
1756 nir_loop *loop = nir_cf_node_as_loop(node);
1757 return nir_loop_first_block(loop);
1758 }
1759
1760 case nir_cf_node_block: {
1761 return nir_cf_node_as_block(node);
1762 }
1763
1764 default:
1765 unreachable("unknown node type");
1766 }
1767 }
1768
1769 nir_block *nir_cf_node_cf_tree_last(nir_cf_node *node)
1770 {
1771 switch (node->type) {
1772 case nir_cf_node_function: {
1773 nir_function_impl *impl = nir_cf_node_as_function(node);
1774 return nir_impl_last_block(impl);
1775 }
1776
1777 case nir_cf_node_if: {
1778 nir_if *if_stmt = nir_cf_node_as_if(node);
1779 return nir_if_last_else_block(if_stmt);
1780 }
1781
1782 case nir_cf_node_loop: {
1783 nir_loop *loop = nir_cf_node_as_loop(node);
1784 return nir_loop_last_block(loop);
1785 }
1786
1787 case nir_cf_node_block: {
1788 return nir_cf_node_as_block(node);
1789 }
1790
1791 default:
1792 unreachable("unknown node type");
1793 }
1794 }
1795
1796 nir_block *nir_cf_node_cf_tree_next(nir_cf_node *node)
1797 {
1798 if (node->type == nir_cf_node_block)
1799 return nir_block_cf_tree_next(nir_cf_node_as_block(node));
1800 else if (node->type == nir_cf_node_function)
1801 return NULL;
1802 else
1803 return nir_cf_node_as_block(nir_cf_node_next(node));
1804 }
1805
1806 nir_if *
1807 nir_block_get_following_if(nir_block *block)
1808 {
1809 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1810 return NULL;
1811
1812 if (nir_cf_node_is_last(&block->cf_node))
1813 return NULL;
1814
1815 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1816
1817 if (next_node->type != nir_cf_node_if)
1818 return NULL;
1819
1820 return nir_cf_node_as_if(next_node);
1821 }
1822
1823 nir_loop *
1824 nir_block_get_following_loop(nir_block *block)
1825 {
1826 if (exec_node_is_tail_sentinel(&block->cf_node.node))
1827 return NULL;
1828
1829 if (nir_cf_node_is_last(&block->cf_node))
1830 return NULL;
1831
1832 nir_cf_node *next_node = nir_cf_node_next(&block->cf_node);
1833
1834 if (next_node->type != nir_cf_node_loop)
1835 return NULL;
1836
1837 return nir_cf_node_as_loop(next_node);
1838 }
1839
1840 void
1841 nir_index_blocks(nir_function_impl *impl)
1842 {
1843 unsigned index = 0;
1844
1845 if (impl->valid_metadata & nir_metadata_block_index)
1846 return;
1847
1848 nir_foreach_block(block, impl) {
1849 block->index = index++;
1850 }
1851
1852 impl->num_blocks = index;
1853 }
1854
1855 static bool
1856 index_ssa_def_cb(nir_ssa_def *def, void *state)
1857 {
1858 unsigned *index = (unsigned *) state;
1859 def->index = (*index)++;
1860
1861 return true;
1862 }
1863
1864 /**
1865 * The indices are applied top-to-bottom which has the very nice property
1866 * that, if A dominates B, then A->index <= B->index.
1867 */
1868 void
1869 nir_index_ssa_defs(nir_function_impl *impl)
1870 {
1871 unsigned index = 0;
1872
1873 nir_foreach_block(block, impl) {
1874 nir_foreach_instr(instr, block)
1875 nir_foreach_ssa_def(instr, index_ssa_def_cb, &index);
1876 }
1877
1878 impl->ssa_alloc = index;
1879 }
1880
1881 /**
1882 * The indices are applied top-to-bottom which has the very nice property
1883 * that, if A dominates B, then A->index <= B->index.
1884 */
1885 unsigned
1886 nir_index_instrs(nir_function_impl *impl)
1887 {
1888 unsigned index = 0;
1889
1890 nir_foreach_block(block, impl) {
1891 nir_foreach_instr(instr, block)
1892 instr->index = index++;
1893 }
1894
1895 return index;
1896 }
1897
1898 nir_intrinsic_op
1899 nir_intrinsic_from_system_value(gl_system_value val)
1900 {
1901 switch (val) {
1902 case SYSTEM_VALUE_VERTEX_ID:
1903 return nir_intrinsic_load_vertex_id;
1904 case SYSTEM_VALUE_INSTANCE_ID:
1905 return nir_intrinsic_load_instance_id;
1906 case SYSTEM_VALUE_DRAW_ID:
1907 return nir_intrinsic_load_draw_id;
1908 case SYSTEM_VALUE_BASE_INSTANCE:
1909 return nir_intrinsic_load_base_instance;
1910 case SYSTEM_VALUE_VERTEX_ID_ZERO_BASE:
1911 return nir_intrinsic_load_vertex_id_zero_base;
1912 case SYSTEM_VALUE_BASE_VERTEX:
1913 return nir_intrinsic_load_base_vertex;
1914 case SYSTEM_VALUE_INVOCATION_ID:
1915 return nir_intrinsic_load_invocation_id;
1916 case SYSTEM_VALUE_FRAG_COORD:
1917 return nir_intrinsic_load_frag_coord;
1918 case SYSTEM_VALUE_FRONT_FACE:
1919 return nir_intrinsic_load_front_face;
1920 case SYSTEM_VALUE_SAMPLE_ID:
1921 return nir_intrinsic_load_sample_id;
1922 case SYSTEM_VALUE_SAMPLE_POS:
1923 return nir_intrinsic_load_sample_pos;
1924 case SYSTEM_VALUE_SAMPLE_MASK_IN:
1925 return nir_intrinsic_load_sample_mask_in;
1926 case SYSTEM_VALUE_LOCAL_INVOCATION_ID:
1927 return nir_intrinsic_load_local_invocation_id;
1928 case SYSTEM_VALUE_LOCAL_INVOCATION_INDEX:
1929 return nir_intrinsic_load_local_invocation_index;
1930 case SYSTEM_VALUE_WORK_GROUP_ID:
1931 return nir_intrinsic_load_work_group_id;
1932 case SYSTEM_VALUE_NUM_WORK_GROUPS:
1933 return nir_intrinsic_load_num_work_groups;
1934 case SYSTEM_VALUE_PRIMITIVE_ID:
1935 return nir_intrinsic_load_primitive_id;
1936 case SYSTEM_VALUE_TESS_COORD:
1937 return nir_intrinsic_load_tess_coord;
1938 case SYSTEM_VALUE_TESS_LEVEL_OUTER:
1939 return nir_intrinsic_load_tess_level_outer;
1940 case SYSTEM_VALUE_TESS_LEVEL_INNER:
1941 return nir_intrinsic_load_tess_level_inner;
1942 case SYSTEM_VALUE_VERTICES_IN:
1943 return nir_intrinsic_load_patch_vertices_in;
1944 case SYSTEM_VALUE_HELPER_INVOCATION:
1945 return nir_intrinsic_load_helper_invocation;
1946 case SYSTEM_VALUE_VIEW_INDEX:
1947 return nir_intrinsic_load_view_index;
1948 case SYSTEM_VALUE_SUBGROUP_SIZE:
1949 return nir_intrinsic_load_subgroup_size;
1950 case SYSTEM_VALUE_SUBGROUP_INVOCATION:
1951 return nir_intrinsic_load_subgroup_invocation;
1952 case SYSTEM_VALUE_SUBGROUP_EQ_MASK:
1953 return nir_intrinsic_load_subgroup_eq_mask;
1954 case SYSTEM_VALUE_SUBGROUP_GE_MASK:
1955 return nir_intrinsic_load_subgroup_ge_mask;
1956 case SYSTEM_VALUE_SUBGROUP_GT_MASK:
1957 return nir_intrinsic_load_subgroup_gt_mask;
1958 case SYSTEM_VALUE_SUBGROUP_LE_MASK:
1959 return nir_intrinsic_load_subgroup_le_mask;
1960 case SYSTEM_VALUE_SUBGROUP_LT_MASK:
1961 return nir_intrinsic_load_subgroup_lt_mask;
1962 default:
1963 unreachable("system value does not directly correspond to intrinsic");
1964 }
1965 }
1966
1967 gl_system_value
1968 nir_system_value_from_intrinsic(nir_intrinsic_op intrin)
1969 {
1970 switch (intrin) {
1971 case nir_intrinsic_load_vertex_id:
1972 return SYSTEM_VALUE_VERTEX_ID;
1973 case nir_intrinsic_load_instance_id:
1974 return SYSTEM_VALUE_INSTANCE_ID;
1975 case nir_intrinsic_load_draw_id:
1976 return SYSTEM_VALUE_DRAW_ID;
1977 case nir_intrinsic_load_base_instance:
1978 return SYSTEM_VALUE_BASE_INSTANCE;
1979 case nir_intrinsic_load_vertex_id_zero_base:
1980 return SYSTEM_VALUE_VERTEX_ID_ZERO_BASE;
1981 case nir_intrinsic_load_base_vertex:
1982 return SYSTEM_VALUE_BASE_VERTEX;
1983 case nir_intrinsic_load_invocation_id:
1984 return SYSTEM_VALUE_INVOCATION_ID;
1985 case nir_intrinsic_load_frag_coord:
1986 return SYSTEM_VALUE_FRAG_COORD;
1987 case nir_intrinsic_load_front_face:
1988 return SYSTEM_VALUE_FRONT_FACE;
1989 case nir_intrinsic_load_sample_id:
1990 return SYSTEM_VALUE_SAMPLE_ID;
1991 case nir_intrinsic_load_sample_pos:
1992 return SYSTEM_VALUE_SAMPLE_POS;
1993 case nir_intrinsic_load_sample_mask_in:
1994 return SYSTEM_VALUE_SAMPLE_MASK_IN;
1995 case nir_intrinsic_load_local_invocation_id:
1996 return SYSTEM_VALUE_LOCAL_INVOCATION_ID;
1997 case nir_intrinsic_load_local_invocation_index:
1998 return SYSTEM_VALUE_LOCAL_INVOCATION_INDEX;
1999 case nir_intrinsic_load_num_work_groups:
2000 return SYSTEM_VALUE_NUM_WORK_GROUPS;
2001 case nir_intrinsic_load_work_group_id:
2002 return SYSTEM_VALUE_WORK_GROUP_ID;
2003 case nir_intrinsic_load_primitive_id:
2004 return SYSTEM_VALUE_PRIMITIVE_ID;
2005 case nir_intrinsic_load_tess_coord:
2006 return SYSTEM_VALUE_TESS_COORD;
2007 case nir_intrinsic_load_tess_level_outer:
2008 return SYSTEM_VALUE_TESS_LEVEL_OUTER;
2009 case nir_intrinsic_load_tess_level_inner:
2010 return SYSTEM_VALUE_TESS_LEVEL_INNER;
2011 case nir_intrinsic_load_patch_vertices_in:
2012 return SYSTEM_VALUE_VERTICES_IN;
2013 case nir_intrinsic_load_helper_invocation:
2014 return SYSTEM_VALUE_HELPER_INVOCATION;
2015 case nir_intrinsic_load_view_index:
2016 return SYSTEM_VALUE_VIEW_INDEX;
2017 case nir_intrinsic_load_subgroup_size:
2018 return SYSTEM_VALUE_SUBGROUP_SIZE;
2019 case nir_intrinsic_load_subgroup_invocation:
2020 return SYSTEM_VALUE_SUBGROUP_INVOCATION;
2021 case nir_intrinsic_load_subgroup_eq_mask:
2022 return SYSTEM_VALUE_SUBGROUP_EQ_MASK;
2023 case nir_intrinsic_load_subgroup_ge_mask:
2024 return SYSTEM_VALUE_SUBGROUP_GE_MASK;
2025 case nir_intrinsic_load_subgroup_gt_mask:
2026 return SYSTEM_VALUE_SUBGROUP_GT_MASK;
2027 case nir_intrinsic_load_subgroup_le_mask:
2028 return SYSTEM_VALUE_SUBGROUP_LE_MASK;
2029 case nir_intrinsic_load_subgroup_lt_mask:
2030 return SYSTEM_VALUE_SUBGROUP_LT_MASK;
2031 default:
2032 unreachable("intrinsic doesn't produce a system value");
2033 }
2034 }